LM48820 Ground-Referenced, Ultra Low Noise, Fixed Gain, 95mW Stereo Headphone Amplifier FEATURES

LM48820 Ground-Referenced, Ultra Low Noise, Fixed Gain, 95mW Stereo Headphone Amplifier FEATURES
LM48820
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LM48820
SNAS370B – MAY 2007 – REVISED MAY 2013
Ground-Referenced, Ultra Low Noise, Fixed
Gain, 95mW Stereo Headphone Amplifier
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FEATURES
DESCRIPTION
•
The LM48820 is a ground referenced, fixed-gain
audio power amplifier capable of delivering 95mW of
continuous average power into a 16Ω single-ended
load, with less than 1% THD+N from a 3V power
supply.
1
2
•
•
•
•
•
•
•
•
Available in Space Saving 0.4mm Pitch
DSBGA Package
Fixed Logic Levels
Ground Referenced Outputs
High PSRR
Ultra Low Current Shutdown Mode
Improved Pop and Click Circuitry Eliminates
Noises During Turn-On and Turn-Off
Transitions
No Output Coupling Capacitors, Snubber
Networks, Bootstrap Capacitors, or GainSetting Resistors Required
Shutdown Either Channel Independently
Soft Start Feature Reduces Start up Transient
Current
APPLICATIONS
•
•
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Mobile Phones
MP3 Players
PDAs
Portable electronic devices
Notebook PCs
KEY SPECIFICATIONS
•
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The LM48820 features a new circuit technology that
utilizes a charge pump to generate a negative
reference voltage. This allows the outputs to be
biased about ground, thereby eliminating outputcoupling capacitors typically used with normal singleended loads.
Boomer audio power amplifiers were designed
specifically to provide high quality output power with a
minimal number of external components. The
LM48820 does not require output coupling capacitors
or bootstrap capacitors, and therefore is ideally suited
for mobile phone and other portable applications.
The LM48820 features a low-power consumption
shutdown mode selectable for each channel and a
soft start function that reduces start-up current
transients. Additionally, the LM48820 features an
internal thermal shutdown protection mechanism.
The LM48820 contains advanced pop and click
circuitry that eliminates noises which would otherwise
occur during turn-on and turn-off transitions.
The LM48820 has an internal fixed gain of 1.5V/V.
Improved PSRR at 217Hz: 80dB (typ)
Power Output at VDD = 3V, RL = 16Ω, THD+N =
1%: 95mW (typ)
Shutdown Current: 0.05μA (typ)
Internal Fixed Gain: 1.5V/V (typ)
Wide Operating Voltage Range: 1.6V to 4.5V
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007–2013, Texas Instruments Incorporated
LM48820
SNAS370B – MAY 2007 – REVISED MAY 2013
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Typical Application
CPVDD
CS1
AVDD
0.39 PF
+
+
4.7 PF
CPVDD
0.1 PF ceramic
30 k:
Rf
20 k:
LIN
CS2
-
LOUT
Ri
CINL
+
VINL
SD_LC
Shutdown
Control
SD_RC
Headphone
Jack
Click/Pop
Suppression
CCP+
CC
Charge
Pump
2.2 PF
CCP0.39 PF
+
+
RIN
20 k:
ROUT
Ri
CINR
VINR
VCP_OUT
30 k:
-AVDD PGND
Rf
SGND
CSS
2.2 PF
Figure 1. Typical Audio Amplifier Application Circuit
Connection Diagrams
1
2
3
4
A
RIN
SGND
CPVDD
CCP+
B
SD_RC
SD_LC
PGND
C
LIN
ROUT
CCP-
D
AVDD
LOUT
-AVDD
VCP_OUT
Figure 2. DSBGA Package
Top View
Package Number YFR0014AAA
2
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Figure 3. YFR0014 Package View
PIN DESCRIPTIONS
Pin
Name
A1
RIN
A2
SGND
Signal Ground
A3
CPVDD
Charge Pump Power Supply
A4
CCP+
B1
SD_RC
Active-Low Shutdown, Right Channel
B2
SD_LC
Active-Low Shutdown, Left Channel
B4
PGND
Power Ground
C1
LIN
C2
ROUT
Right Channel Output
C4
CCP-
Negative Terminal - Charge Pump Flying Capacitor
D1
AVDD
Positive Power Supply - Amplifier
D2
LOUT
Left Channel Output
D3
-AVDD
D4
VCP_OUT
Function
Right Channel Input
Positive Terminal - Charge Pump Flying Capacitor
Left Channel Input
Negative Power Supply - Amplifier
Charge Pump Power Output
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1) (2) (3)
Supply Voltage
4.75V
−65°C to +150°C
Storage Temperature
Input Voltage
-0.3V to VDD + 0.3V
Power Dissipation
(4)
Internally Limited
ESD Susceptibility
(5)
2000V
ESD Susceptibility
(6)
200V
Junction Temperature
150°C
Thermal Resistance
θJA
(1)
(2)
(7)
86°C/W (typ)
All voltages are measured with respect to the GND pin unless otherwise specified.
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions that specify performance limits. This assumes that the device is within the Operating
Ratings. Specifications are not ensured for parameters where no limit is given; however, the typical value is a good indication of device
performance.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature,
TA. The maximum allowable power dissipation is PDMAX = (TJMAX - TA) / θJA or the number given in Absolute Maximum Ratings,
whichever is lower. See Typical Performance Characteristics for more information
Human body model, 100pF discharged through a 1.5kΩ resistor.
Machine Model, 220pF - 240pF discharged through all pins.
θJA value is measured with the device mounted on a PCB with a 3” x 1.5”, 1oz copper heatsink.
(3)
(4)
(5)
(6)
(7)
Operating Ratings
Temperature Range
TMIN ≤ TA ≤ TMAX
−40°C ≤ TA ≤ 85°C
Supply Voltage (VDD)
1.6V ≤ VDD ≤ 4.5V
Electrical Characteristics VDD = 3V
(1) (2)
The following specifications apply for VDD = 3V, 16Ω load, and the conditions shown in “Typical Audio Amplifier Application
Circuit” (see Figure 1) unless otherwise specified. Limits apply to TA = 25°C.
LM48820
Symbol
Parameter
Typical
Limit
(4) (5)
Units
(Limits)
VIN = 0V, inputs terminated
both channels enabled
4.7
5.5
mA (max)
VIN = 0V, inputs terminated
one channel enabled
3
Conditions
(3)
IDD
Quiescent Power Supply Current
Full Power Mode
ISD
Shutdown Current
SD_LC = SD_RC = GND
VOS
Output Offset Voltage
RL = 32Ω, VIN = 0V
AV
Voltage Gain
ΔAV
Gain Match
(1)
(2)
(3)
(4)
(5)
4
mA (max)
0.05
2
µA (max)
1
5
mV (max)
–1.5
V/V
1
%
All voltages are measured with respect to the GND pin unless otherwise specified.
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions that specify performance limits. This assumes that the device is within the Operating
Ratings. Specifications are not ensured for parameters where no limit is given; however, the typical value is a good indication of device
performance.
Typicals are measured at 25°C and represent the parametric norm.
Limits are specified to AOQL (Average Outgoing Quality Level).
Data sheet min and max specification limits are specified by design, test, or statistical analysis.
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Electrical Characteristics VDD = 3V (1)(2) (continued)
The following specifications apply for VDD = 3V, 16Ω load, and the conditions shown in “Typical Audio Amplifier Application
Circuit” (see Figure 1) unless otherwise specified. Limits apply to TA = 25°C.
LM48820
Symbol
Parameter
Conditions
Typical
Limit
(4) (5)
Units
(Limits)
20
15
25
kΩ (min)
kΩ (max)
(3)
RIN
Input Resistance
PO
Output Power
THD+N
Total Harmonic Distortion + Noise
THD+N = 1% (max); f = 1kHz,
one channel
95
mW
THD+N = 1% (max); f = 1kHz,
RL = 32Ω, one channel
80
mW
THD+N = 1% (max); f = 1kHz,
two channels in phase
50
40
mW (min)
THD+N = 1% (max); f = 1kHz,
RL = 32Ω, two channels in phase
55
45
mW (min)
PO = 60mW, f = 1kHz,
single channel
0.01
%
PO = 50mW, f = 1kHz, RL = 32Ω
single channel
0.007
%
80
75
58
dB
dB
dB
100
dB
PSRR
Power Supply Rejection Ratio
Full Power Mode
VRIPPLE = 200mVP-P, Input Referred
f = 217Hz
f = 1kHz
f = 20kHz
SNR
Signal-to-Noise Ratio
RL = 32Ω, PO = 20mW,
(A-weighted)
f = 1kHz, BW = 20Hz to 22kHz
VIH
Shutdown Input Voltage High
VDD = 1.8V to 4.2V
1.2
V (min)
VIL
Shutdown Input Voltage Low
VDD = 1.8V to 4.2V
0.45
V (max)
XTALK
Crosstalk
PO = 1.6mW, f = 1kHz
70
ZOUT
Output Impedance
SD_LC = SD_RC = GND
Input Terminated
Input not terminated
30
30
25
kΩ (min)
ZOUT
Output Impedance
SD_LC = SD_RC = GND
–500mV ≤ VOUT ≤ VDD +500mV
8
2
kΩ (min)
IL
Input Leakage
(6)
(6)
±0.1
dB
nA
VOUT refers to signal applied to the LM48820 outputs.
External Components Description
(Figure 1)
Components
1.
Functional Description
Input coupling capacitor which blocks the DC voltage at the amplifier's input terminals. Also creates a high-pass filter
CINR/INL with Ri at fC = 1/(2πRiCIN). Refer to the section SELECTING PROPER EXTERNAL COMPONENTS, for an explanation
of how to determine the value of Ci.
2
CC
Flying capacitor. Low ESR ceramic capacitor (≤100mΩ)
3.
CSS
Output capacitor. Low ESR ceramic capacitor (≤100mΩ)
4.
CS1
Tantalum capacitor. Supply bypass capacitor which provides power supply filtering. Refer to the POWER SUPPLY
BYPASSING section for information concerning proper placement and selection of the supply bypass capacitor.
5.
CS2
Ceramic capacitor. Supply bypass capacitor which provides power supply filtering. Refer to the POWER SUPPLY
BYPASSING section for information concerning proper placement and selection of the supply bypass capacitor.
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Typical Performance Characteristics
THD+N vs Frequency
VDD = 1.6V, RL = 32Ω, Stereo, PO = 3mW
10
10
1
1
THD+N (%)
THD+N (%)
THD+N vs Frequency
VDD = 1.6V, RL = 16Ω, Stereo, PO = 3mW
0.1
0.1
0.01
100
1k
0.001
20
10k 20k
10k 20k
Figure 4.
Figure 5.
THD+N vs Frequency
VDD = 3V, RL = 16Ω, Stereo, PO = 25mW
THD+N vs Frequency
VDD = 3V, RL = 32Ω, Stereo, PO = 25mW
10
10
1
1
0.1
0.001
20
T
0.1
0.01
100
1k
10k 20k
0.001
20
100
1k
10k 20k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 6.
Figure 7.
THD+N vs Frequency
VDD = 3V, RL = 16Ω, One channel, PO = 60mW
THD+N vs Frequency
VDD = 3V, RL = 32Ω, One channel, PO = 50mW
10
10
1
1
THD+N (%)
THD+N (%)
1k
FREQUENCY (Hz)
0.01
0.1
0.01
0.001
20
6
100
FREQUENCY (Hz)
THD+N (%)
THD+N (%)
0.001
20
0.01
T
0.1
0.01
100
1k
10k 20k
0.001
20
100
1k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 8.
Figure 9.
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Typical Performance Characteristics (continued)
THD+N vs Output Power
VDD = 1.6V, RL = 16Ω, One channel
THD+N vs Output Power
VDD = 1.6V, RL = 32Ω, One channel
10
10
f = 20 Hz
f = 1 kHz
f = 20 Hz
f = 1 kHz
1
THD+N (%)
THD+N (%)
1
0.1
f = 10 kHz
0.1
f = 10 kHz
0.01
0.001
0.01
1
100
10
1
OUTPUT POWER (mW)
100
10
OUTPUT POWER (mW)
Figure 10.
Figure 11.
THD+N vs Output Power
VDD = 1.6V, RL = 16Ω, Stereo
THD+N vs Output Power
VDD = 1.6V, RL = 32Ω, Stereo
10
10
1
THD+N (%)
THD+N (%)
1
f = 20 Hz
f = 1 kHz
0.1
f = 20 Hz
f = 1 kHz
0.1
0.01
f = 10 kHz
f = 10 kHz
0.01
1
100
10
0.001
1
OUTPUT POWER (mW)
10
Figure 12.
Figure 13.
THD+N vs Output Power
VDD = 3V, RL = 16Ω, One channel
THD+N vs Output Power
VDD = 3V, RL = 32Ω, One channel
10
1
f = 10 kHz
0.1
f = 20 Hz
f = 1 kHz
THD+N (%)
THD+N (%)
1
0.01
0.1
0.01
f = 10 kHz
f = 20 Hz
f = 1 kHz
0.001
100
10
OUTPUT POWER (mW)
1
10
100
500
0.001
1
10
100
500
OUTPUT POWER (mW)
OUTPUT POWER (mW)
Figure 14.
Figure 15.
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Typical Performance Characteristics (continued)
THD+N vs Output Power
VDD = 3V, RL = 16Ω, Stereo
THD+N vs Output Power
VDD = 3V, RL = 32Ω, Stereo
10
10
1
1
THD+N (%)
THD+N (%)
f = 20 Hz
f = 1 kHz
0.1
0.1
f = 10 kHz
0.01
0.01
f = 10 kHz
0.001
1
f = 20 Hz
f = 1 kHz
0.001
100
10
500
1
OUTPUT POWER (mW)
Figure 17.
Output Power vs Power Supply Voltage
RL = 16Ω, f = 1kHz, Mono
Output Power vs Power Supply Voltage
RL = 16Ω, f = 1kHz, Stereo
300
OUTPUT POWER (mW)
OUTPUT POWER (mW)
250
400
300
THD+N = 10%
200
100
200
150
0
0
THD+N = 10%
100
50
THD+N = 1%
THD+N = 1%
0
1
2
3
4
5
0
6
1
2
3
4
5
6
POWER SUPPLY VOLTAGE (V)
POWER SUPPLY VOLTAGE (V)
Figure 18.
Figure 19.
Output Power vs Power Supply Voltage
RL = 32Ω, f = 1kHz, Mono
Output Power vs Power Supply Voltage
RL = 32Ω, f = 1kHz, Stereo
300
500
250
OUTPUT POWER (mW)
400
300
200
THD+N = 10%
100
200
150
THD+N = 10%
100
50
THD+N = 1%
THD+N = 1%
0
0
0
1
2
3
4
5
6
0
1
2
3
4
5
6
POWER SUPPLY VOLTAGE (V)
POWER SUPPLY VOLTAGE (V)
Figure 20.
8
500
Figure 16.
500
OUTPUT POWER (mW)
100
10
OUTPUT POWER (mW)
Figure 21.
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Typical Performance Characteristics (continued)
Power Dissipation vs Output Power
VDD = 1.6V, RL = 16Ω, f = 1kHz
Power Dissipation vs Output Power
VDD = 1.6V, RL = 32Ω, f = 1kHz
50
POWER DISSIPATION (mW)
POWER DISSIPATION (mW)
50
40
Stereo
30
20
Mono
10
0
0
2
4
6
10
8
40
30
Stereo
20
10
Mono
0
0
12
6
8
10
12
Figure 23.
Power Dissipation vs Output Power
VDD = 3V, RL = 16Ω, f = 1kHz
Power Dissipation vs Output Power
VDD = 3V, RL = 32Ω, f = 1kHz
300
250
250
200
Stereo
150
100
50
Mono
0
20
40
60
80
Stereo
200
150
Mono
100
50
0
100
0
60
Figure 25.
PSRR vs Frequency
VDD = 1.6V, RL = 16Ω
PSRR vs Frequency
VDD = 1.6V, RL = 32Ω
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
20
40
Figure 24.
POWER SUPPLY REJECTION RATIO (dB)
0
20
100
1k
80
100
OUTPUT POWER (mW)
OUTPUT POWER (mW)
POWER SUPPLY REJECTION RATIO (dB)
4
Figure 22.
300
0
2
OUTPUT POWER (mW)
POWER DISSIPATION (mW)
POWER DISSIPATION (mW)
OUTPUT POWER (mW)
20k
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
20
100
1k
20k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 26.
Figure 27.
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0
POWER SUPPLY REJECTION RATIO (dB)
POWER SUPPLY REJECTION RATIO (dB)
Typical Performance Characteristics (continued)
PSRR vs Frequency
VDD = 3V, RL = 16Ω
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
20
100
20k
1k
PSRR vs Frequency
VDD = 3V, RL = 32Ω
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
20
100
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 28.
Figure 29.
Power Supply Current vs Power Supply Voltage
VIN = 0V, Mono
Power Supply Current vs Power Supply Voltage
VIN = 0V, Stereo
6
POWER SUPPLY CURRENT (mA)
POWER SUPPLY CURRENT (mA)
6
5
4
3
2
1
0
5
4
3
2
1
0
0
1
2
3
4
5
POWER SUPPLY VOLTAGE (V)
0
1
2
3
4
5
POWER SUPPLY VOLTAGE (V)
Figure 30.
10
20k
1k
Figure 31.
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APPLICATION INFORMATION
SUPPLY VOLTAGE SEQUENCING
Before applying any signal to the inputs or shutdown pins of the LM48820, it is important to apply a supply
voltage to the VDD pins. After the device has been powered, signals may be applied to the shutdown pins (see
MICRO POWER SHUTDOWN) and input pins.
ELIMINATING THE OUTPUT COUPLING CAPACITOR
The LM48820 features a low noise inverting charge pump that generates an internal negative supply voltage.
This allows the outputs of the LM48820 to be biased about GND instead of a nominal DC voltage, like traditional
headphone amplifiers. Because there is no DC component, the large DC blocking capacitors (typically 220µF)
are not necessary. The coupling capacitors are replaced by two, small ceramic charge pump capacitors, saving
board space and cost.
Eliminating the output coupling capacitors also improves low frequency response. In traditional headphone
amplifiers, the headphone impedance and the output capacitor form a high pass filter that not only blocks the DC
component of the output, but also attenuates low frequencies, impacting the bass response. Because the
LM48820 does not require the output coupling capacitors, the low frequency response of the device is not
degraded by external components.
In addition to eliminating the output coupling capacitors, the ground referenced output nearly doubles the
available dynamic range of the LM48820 when compared to a traditional headphone amplifier operating from the
same supply voltage.
OUTPUT TRANSIENT ('CLICK AND POPS') ELIMINATED
The LM48820 contains advanced circuitry that virtually eliminates output transients ('clicks and pops'). This
circuitry prevents all traces of transients when the supply voltage is first applied or when the part resumes
operation after coming out of shutdown mode.
AMPLIFIER CONFIGURATION EXPLANATION
As shown in Figure 1, the LM48820 has two internal operational amplifiers. The two amplifiers have internally
configured gain, the closed loop gain is set by selecting the ratio of Rf to Ri. Consequently, the gain for each
channel of the IC is
AV = -(Rf / Ri) = 1.5 (V/V)
where
•
•
RF = 30kΩ
Ri = 20kΩ
(1)
POWER DISSIPATION
Power dissipation is a major concern when using any power amplifier and must be thoroughly understood to
ensure a successful design. Equation 2 states the maximum power dissipation point for a single-ended amplifier
operating at a given supply voltage and driving a specified output load.
PDMAX = (VDD) 2 / (2π2RL) (W)
(2)
Since the LM48820 has two operational amplifiers in one package, the maximum internal power dissipation point
is twice that of the number which results from Equation 2. Even with large internal power dissipation, the
LM48820 does not require heat sinking over a large range of ambient temperatures. From Equation 2 , assuming
a 3V power supply and a 16Ω load, the maximum power dissipation point is 28mW per amplifier. Thus the
maximum package dissipation point is 56mW. The maximum power dissipation point obtained must not be
greater than the power dissipation that results from Equation 3:
PDMAX = (TJMAX - TA) / (θJA) (W)
(3)
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For this DSBGA package, θJA = 86°C/W and TJMAX = 150°C. Depending on the ambient temperature, TA, of the
system surroundings, Equation 3 can be used to find the maximum internal power dissipation supported by the
IC packaging. If the result of Equation 2 is greater than that of Equation 3, then either the supply voltage must be
decreased, the load impedance increased or TA reduced. For the typical application of a 3V power supply, with a
16Ω load, the maximum ambient temperature possible without violating the maximum junction temperature is
approximately 127°C provided that device operation is around the maximum power dissipation point. Power
dissipation is a function of output power and thus, if typical operation is not around the maximum power
dissipation point, the ambient temperature may be increased accordingly.
POWER SUPPLY BYPASSING
As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply
rejection. Applications that employ a 3V power supply typically use a 4.7µF capacitor in parallel with a 0.1µF
ceramic filter capacitor to stabilize the power supply output, reduce noise on the supply line, and improve the
supply's transient response. Keep the length of leads and traces that connect capacitors between the LM48820's
power supply pin and ground as short as possible.
MICRO POWER SHUTDOWN
The voltage applied to the SD_LC (shutdown left channel) pin and the SD_RC (shutdown right channel) pin
controls the LM48820’s shutdown function. When active, the LM48820’s micropower shutdown feature turns off
the amplifiers’ bias circuitry, reducing the supply current. The trigger point is 0.45V (max) for a logic-low level,
and 1.2V (min) for logic-high level. The low 0.05µA (typ) shutdown current is achieved by applying a voltage that
is as near as ground a possible to the SD_LC/SD_RC pins. A voltage that is higher than ground may increase
the shutdown current.
There are a few ways to control the micro-power shutdown. These include using a single-pole, single-throw
switch, a microprocessor, or a microcontroller. When using a switch, connect an external 100kΩ pull-up resistor
between the SD_LC/SD_RC pins and VDD. Connect the switch between the SD_LC/SD_RC pins and ground.
Select normal amplifier operation by opening the switch. Closing the switch connects the SD_LC/SD_RC pins to
ground, activating micro-power shutdown. The switch and resistor ensure that the SD_LC/SD_RC pins will not
float. This prevents unwanted state changes. In a system with a microprocessor or microcontroller, use a digital
output to apply the control voltage to the SD_LC/SD_RC pins. Driving the SD_LC/SD_RC pins with active
circuitry eliminates the pull-up resistor.
SELECTING PROPER EXTERNAL COMPONENTS
Optimizing the LM48820's performance requires properly selecting external components. Though the LM48820
operates well when using external components with wide tolerances, best performance is achieved by optimizing
component values.
Charge Pump Capacitor Selection
Use low (<100mΩ) ESR (equivalent series resistance) ceramic capacitors with an X7R dielectric for best
performance. Low ESR capacitors keep the charge pump output impedance to a minimum, extending the
headroom on the negative supply. Higher ESR capacitors result in reduced output power from the audio
amplifiers.
Charge pump load regulation and output impedance are affected by the value of the flying capacitor (CC). A
larger valued CC (up to 3.3μF) improves load regulation and minimizes charge pump output resistance. The
switch-on resistance dominates the output impedance for capacitor values above 2.2μF.
The output ripple is affected by the value and ESR of the output capacitor (CSS). Larger capacitors reduce output
ripple on the negative power supply. Lower ESR capacitors minimize the output ripple and reduce the output
impedance of the charge pump.
The LM48820 charge pump design is optimized for 2.2μF, low ESR, ceramic, flying, and output capacitors.
12
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Copyright © 2007–2013, Texas Instruments Incorporated
Product Folder Links: LM48820
LM48820
www.ti.com
SNAS370B – MAY 2007 – REVISED MAY 2013
Input Capacitor Value Selection
Amplifying the lowest audio frequencies requires high value input coupling capacitors (CINL and CINR in Figure 1).
A high value capacitor can be expensive and may compromise space efficiency in portable designs. In many
cases, however, the speakers used in portable systems, whether internal or external, have little ability to
reproduce signals below 150Hz. Applications using speakers with this limited frequency response reap little
improvement by using high value input and output capacitors.
Besides affecting system cost and size, the input coupling capacitor has an effect on the LM48820's click and
pop performance. The magnitude of the pop is directly proportional to the input capacitor's size. Thus, pops can
be minimized by selecting an input capacitor value that is no higher than necessary to meet the desired −3dB
frequency.
As shown in Figure 1, the internal input resistor, Ri and the input capacitor, CINL and CINR, produce a -3dB high
pass filter cutoff frequency that is found using Equation 4.
f–3dB = 1 / 2πRiCIN (Hz)
(4)
Also, careful consideration must be taken in selecting a certain type of capacitor to be used in the system.
Different types of capacitors (tantalum, electrolytic, ceramic) have unique performance characteristics and may
affect overall system performance.
REVISION HISTORY
Rev
Date
1.0
05/09/07
Initial release.
Description
1.1
05/15/07
Added the BOM table.
1.2
06/25/07
Deleted and replaced some curves. Input text edits also.
B
05/02/2013
Changed layout of National Data Sheet to TI format
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Copyright © 2007–2013, Texas Instruments Incorporated
Product Folder Links: LM48820
13
PACKAGE OPTION ADDENDUM
www.ti.com
2-May-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
LM48820TM/NOPB
ACTIVE
DSBGA
YFR
14
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 85
GI7
LM48820TMX/NOPB
ACTIVE
DSBGA
YFR
14
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 85
GI7
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE MATERIALS INFORMATION
www.ti.com
8-May-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
LM48820TM/NOPB
DSBGA
YFR
14
250
178.0
8.4
LM48820TMX/NOPB
DSBGA
YFR
14
3000
178.0
8.4
Pack Materials-Page 1
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
1.7
1.7
0.76
4.0
8.0
Q1
1.7
1.7
0.76
4.0
8.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
8-May-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM48820TM/NOPB
DSBGA
YFR
LM48820TMX/NOPB
DSBGA
YFR
14
250
210.0
185.0
35.0
14
3000
210.0
185.0
35.0
Pack Materials-Page 2
MECHANICAL DATA
YFR0014
D
0.600
±0.075
E
TME14XXX (Rev A)
D: Max = 1.64 mm, Min = 1.58 mm
E: Max = 1.64 mm, Min = 1.58 mm
4215090/A 12/12
NOTES: A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.
B. This drawing is subject to change without notice.
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