IM P A C T O F ... F IL T E R D E S...

IM P A C T   O F ... F IL T E R   D E S...
IM P A C T O F S O U R C E IM PE D A N C E O N IN P U T
F IL T E R D ESIG N C R IT E R IA F O R A
M U L T IP L E C O N V E R T E R P O W E R SY STEM
by
Martin Florez Lizarraga
A Thesis Submitted to the Faculty of the
DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
In Partial Fulfillment o f the Requirements
For the Degree of
MASTER OF SCIENCE
WITH A MAJOR IN ELECTRICAL ENGINEERING
In the Graduate College
THE UNIVERSITY OF ARIZONA
199 1
2
S T A T E M E N T BY A U T H O R
This thesis has been submitted in partial fulfillment of requirements for an advanced
degree at the University o f Arizona and is deposited in the University Library to be made
available to borrowers under rules o f the Library.
Brief quotations from this thesis are allowable without special permission, provided
that accurate acknowledgment of the source is made. Requests for permission for extended
quotation from or reproduction of this manuscript in whole or in part may be granted by the
head o f the major department or the Dean o f the Graduate College when in his or her
judgm ent the proposed use of the material is in the interests o f scholarship. In all other
instances, however, permission must be obtained from the author.
SIGNED:, ^ V
l l
A PP R O V A L BY T H E S IS D IR E C T O R
T '
* '
’
’
’
’
---------
Assistant Professor o f
Electrical andComputer Engineering
3
TABLE OF CONTENTS
Page
LIST OF F IG U R E S........................
LIST OF TA BLES ...........................................................
ABSTRACT
..........................................
5
....8
9
1. INTRODUCTION............. ......................................... ......................................................... 10
1.1. B ackground...... ..........................................................
10
1.2. Previous w o rk ............................................................................................15
1.3. A p proach...................................................................................
16
1.4. Overview of discussion............................................................................. 17
2. ANALYSIS.......... ................................
19
2.1. Extra Element Theorem ........................................................................... 19
2.2. Effect of a general input filter................................................... .............. 26
2.3. E ffect o f source output im pedance................................................. 29
2.4. Effect of multiple converters.................................................................. .30
2.5. Multiple converter input im pedance........................................................ 32
2.6. Application of criteria to a current-mode converter......... ......................34
2.7. Sum m ary.......................................................................i........................... 38
3. E X PE R IM E N T A L V E R IF IC A T IO N ...........................
53
3.1. Power circu it.............................................................................
53
3.2. Gate D riv e......................................
.53
3.3. Input filte r.......................................................................
54
3.4. Source im pedance...........................................................................
54
3.5. Loop gain m easurem ents.........................................................
55
4 .
3.6. Loop gain for non-zero source Z q............................................................56
3.7. Loop gain for finite Z * ............. ........................................... ................—-57
4. CONCLUSION....................................... .......................................................... ..................78
REFERENCES............................................................................................... ......... .................80
5
LIST OF FIGURES
Page
Figure
1.1.
Duty ratio control of output voltage.................................................................. 11
1.2.
Feed back current control of output voltage.....................................................11
1.3.
Control scheme for current-mode.....................................................................12
1.4.
Compensation ramp added for stability............................................
12
1.5.
Centralized power system ...........................
14
1.6.
Multiple converter power system...................................................
15
1.7.
Definition of Z q and Z* in a multiple converter system ................................. 18
1.8.
Model of multiple converter system..................................................................18
2.1.
Linear system with Z element added...... ...................................................
2.2.
Impedance Z added between short circu it.................................................;.. .21
2.3.
Impedance Z added between two unconnected nodes..............................21
2.4.
Common-emitter amplifier................................................................................23
2.5.
Small-signal model of common-emitter am plifier..........................................23
2.6.
Effect of bypass capacitor on common-emitter amplifier.............................. 24
2.7.
Buck open-loop canonical m odel.........................................................
.20
25
6
2.8.
Buck open-loop canonical model with Z element added...... ........................ 25
2.9.
In p u t filte r
2.10.
System F(s) with added input filte r............
28
2.11.
System F(s) with Z0 added......... .......
29
2.12.
System F(s) w ith Z* ad d ed.............................
31
2.13.
Buck current-mode canonical m o d e l..............................................................35
3.1.
B uck current-m ode regulator c irc u it...... ............................
3.2.
Input filter impedance Z s ...... .............. ............ . —
3.3.
Experimental source condition....................
61
3.4.
Theoretical source condition for Ro=15 £2..............
62
3.5.
Theoretical source condition for Ro=20 £2............
.63
3.6.
Theoretical source condition for Rq=25 £2...................................................... 64
3.7.
Experimental loop gain ...............................
65
3.8.
Theoretical loop gain..........................
66
3.9.
Experimental loop gain for Rq=15 £2.............................................................. 67
3.10.
Experimental loop gain for Ro=20 £2...........
3.11.
Experimental loop gain for R q=25 £2.............................................................. 69
n etw o rk .................
...27
.......59
.................................60
68
7
3.12.
Theoretical loop gain for Ro=15 Q .......................................
70
3.13.
Theoretical loop gain for Ro=20 O ..................
71
3.14.
Theoretical loop gain for Ro=25 0 . . . . ...................
72
3.15.
O utput ripple for Ro=0 Q .................................................................. 73
3.16.
Output ripple for R q= 25 Q ...............................
74
3.17.
Loop gain improvement for Z*=40 Q resistor.....................................
75
3.18.
Loop gain improvement for Z*=4700 (iF capacitor....................................... 76
3.19.
Loop gain improvement for Z*=buck current-mode regulator..................... 77
8
LIST OF TABLES
Table
Page
2.1
Summary of buck current-mode properties with an input filter............ .
2.2
Summary of buck current-mode properties with an input filter and
including source impedance............................................
2.3
.39
41
Summary o f buck current-mode properties with an input filter,
source impedance and multiple converters connected.................................... 44
2.4
Summary of buck voltage-mode properties with an input filter...............47
2.5
Summary of buck voltage-mode properties with an input filter and
including source impedance...................................................................... ..... 48
2.6
Summary of buck voltage-mode properties with an input filter,
source impedance and multiple converters connected....................
50
9
A BSTRA CT
In a multiple converter pow er system (MCPS), the output impedance Z q o f the
source and the collective input impedance Z* o f the other converters on the same bus can
degrade the performance o f an individual regulator even if the input filter is properly
designed for stand-alone operation. General design inequalities are developed which show
the constraints on Z q, Z*, and the individual converter input filter that must be satisfied if
the individual regulator is to operate properly in an MCPS. Both current-mode and voltage­
mode converters are analyzed. Is is shown that proper input filter design decouples the
converters negative input impedance from the bus. Extensive experimental verification is
presented.
10
CHAPTER 1
IN T R O D U C T IO N
1.1 B A C K G R O U N D
Switching converters are devices which up-convert, down-convert or invert a DC
input voltage. Switching converters primarily use only capacitors and inductors as passive
components, and diodes and active devices which are either completely off or completely
on. Because no resistive elements are used, switching converters are theoretically 100%
efficient. Losses found in transistors and other components decrease the efficiency,
nevertheless switching converters are still one of the best ways of processing power with
very little loss.
These DC-to-DC converters are open-loop circuits. To maintain a fixed ouput
voltage in the presence of line and load variations (for example 5 volts for logic circuits),
the converter must be operated in the closed-loop fashion. The output voltage is fed back
and compared against a reference voltage and fed into a control network which keeps the
output voltage fixed. Once the converter is operated closed-loop it becomes a regulator.
There are two ways of controlling a switching regulator, by voltage-m ode control or
current-mode control.
In a voltage-mode converter the choice o f a duty ratio D(t) controls the output
voltage as shown in Fig. 1.1.
11
VOLTAGE-MODE CONVERTER
control
network
Figure 1.1 Duty ratio D(t) controls the output voltage
CURRENT-MODE CONVERTER
r
i
1
is(0 —>
|
w j
Vout
i
r
TIT
1
'
L_
'
Vs (t)
1
control
t) networl
COMPARATOR
Figure 1.2 Voltage vc(t) controls the output voltage.
6
Vref
12
In a current-mode converter [8] the transistor switch current is(t) is sensed and converted
into a proportional sense voltage vs(t). The sense voltage vs(t) is compared against a control
voltage vc(t), which controls the output voltage as shown in Fig. 1.2.
CONTROL VOLTAGE vc(t)
SENSE VOLTAGE
Figure 1.3. Proportional voltage vg(t) compared to control voltage v (\
CONTROL VOLTAGE vc(t)
COMPENSATING
^
RAMP
SENSE VOLTAGE
Figure 1.4. Compensating ramp added for stability.
As shown in Fig. 1.3, when the transistor switch is on, the current is(t) is the same as the
inductor current. When the sense voltage v s(t) reaches the control voltage vc, the
comparator turns off the transistor and the inductor current decreases for the rest of the
13
interval as the current discharges through the diode. The duty ratio is not directly controlled
as in the voltage-mode case but is an indirect function of the control voltage vc(t).
Unlike the voltage-mode buck converters, which are stable for all duty cycle values,
the current-mode converter is unstable for duty cycle values greater than 0.5, when only the
inductor current is being fed back. The remedy is to add a compensating ramp to the sense
voltage. Now, the sense voltage is compared against a control voltage and a compensating
ramp, stabilizing the converter as shown in Fig. 1.4.
The current-mode converter has advantages over the voltage-mode converter such
as over-current protection. Excessive current is prevented by limiting the control current
ic(t), thus ensuring that the transistor will turn off when the switch current becomes too
large. Also, current-mode converters can be operated in parallel with the load current
shared equally among converters, which is not possible with voltage-mode converters. A
distinct disadvantage of current-mode converters is their Complexity in both design and
analysis.
The switching action of the regulator is what makes the efficient processing o f
power possible. This benefit has a price: the regulator input current has a large ripple
component present, thus creating electromagnetic interference (EMI). An input filter is thus
required to smooth out the input current and reduce EMI. The addition o f an input filter to a
switching regulator can lead to problems in stability.
Also, the increase of high-density electronics (VLSI and VHSI devices) has created
the need for the efficent processing of power. A centralized power method with a large dcto-dc source and a high current bus distribution system is uneconomical and inefficient
(Fig. 1.5). A multiple converter power system (MCPS), shown in Fig. 1.6, is thus required
to meet the demands of high power consumption offering point-of-use regulation. In a
M CPS, an ac-to-dc source provides a dc high-voltage at a low -current. This high-
14
voltage/Iow-current scheme allows for efficient distribution of power through light-weight
conductors. Since the majority of electronic equipm ent uses low voltage, dc-to-dc
regulators are required to process the high-voltage/low-current to low-voltage/high-current
power at the point of use.
BUS
AC/DC
SOURCE
DQDC
REGULATOR
LOAD
LOAD
LOAD
LOAD
Figure 1.5. Centralized power system.
15
BUS
AC/DC
SOURCE
DC/DC
REGULATOR
LOAD
DC/DC
LOAD
REGULATOR
DC/DC
REGULATOR
DC/DC
REGULATOR
LOAD
LOAD
Figure 1.6. Multiple converter power system.
1.2 P R E V IO U S W O R K
It is well known that addition of an input filter to an individual switching regulator
can result in system instability and degradation of performance. For a given load resistance,
The feed back action of the regulator adjusts the duty cycle to maintain a constant output
voltage, and hence constant power. If the input voltage increases, the input current must
decrease since the the input power is also constant. Consequently, the regulator exhibits a
negative input impedance. The regulator negative input impedance in combination with the
16
input filter is the origin o f the system potential instability. Criteria for evaluating this effect
for voltage-mode control and current-mode control o f individual regulators are presented in
[1,2,3,4]. In previous work [1,2,3,4], the input source is assumed ideal for the switching
regulator, but in actuality the input source is an ac-to-dc converter with possibly significant
output impedance. Also, the problem of multiple converters operating off the same non­
ideal bus was not adequately addressed. Hence both the the source impedance and the total
impedance o f the other regulators must be considered when m ultiple converters are
operated on the same non-ideal bus line.
1 .3 'APPROACH
As seen from Fig. 1.7, Z0 represents the output impedance o f the source. The
impedance Z* represents the effect of the rest of the regulators on one individual regulator.
For analysis purposes, the overall system can be modelled from the standpoint o f a single
converter with the added impedances Z q and Z* as shown in Fig 1.8. In fact, each regulator
module sees a different Z* because each module has a different operating point and because
modules could either be voltage-mode or current-mode. Module #1 sees Zi*, module #2
sees Tj i , etc. For analytical purposes, the following assumption is made:
z*=z;=z%=z;...=zk
(i.D
This assumption can be made because the modules will be switching at roughly the same
frequency and thus have inpu.t filters with roughly the same cut-off frequency. It is shown
later that the negative input impedance of the converters is not significant.
The goal o f the analysis is first to determine if the source impedance can lead to
instability in a converter with an input filter designed according to previous stability criteria.
Criteria describing the effect of the source impedance on a regulators stability and
performance are sought. Second, to determine if the other regulators connected on the same
17
non-ideal source can cause instability and performance degradation. Criteria describing the
effect of multiple converters operating on the same bus are also sought The Extra Element
Theorem [7] is the tool which is used throughout the analysis. The analysis is done for the
small signal case. The small signal analysis is adequate for this purpose because small
pertubadons around a quiesent operating point arc assumed.
1.4 O V E R V IE W O F D ISC U SSIO N
In Chapter 2 analysis o f these elements (Z0, Z*) is done using the Extra Element
Theorem on a converter circuit in general. New conditions for the effect of Z q are
discovered and discussed. Also, the effect of Z* is analyzed and discussed. In Chapter 3,
experimental verification of the criteria found in Chapter 2 is presented.
18
INPUT
FILTER
AODC
REGULATOR
R li
MODULE#!
#1
INPUT
FILTER
REGULATOR
MODULE #2
RL2
REGULATOR
MODULE #3
RL3
REGULATOR
MODULE#K
Rue
#2
INPUT
FILTER
#3
Figure 1.7. Multiple-converter power
system
INPUT
REGULATOR
FILTER
#K
MODULE#K
Figure 1.8. Model of multiple-converter power system
R lk
19
CH APTER 2
A N A L Y S IS
In this chapter the Extra Element Theorem is explained and a brief example given o f
its use. The Extra Element Theorem is then applied to the small-signal model o f a dc-to-dc
converter to find the effects of the elements Z* and Z q on the converter. The results of the
analysis are then applied to a buck current-mode canonical small signal model and
X
•
conditions are found which ensure that important converter parameters such as loop gain,
output impedance, etc., are not modified by Z0 or Z*.
2.1 E x tra E lem ent T h eo rem
Because the small-signal canonical model [5] for the voltage-mode and the current­
mode converters is a linear model, and the transfer functions of interest such as the voltage
loop gain, output impedance, etc., have already been solved, it is unnessary to solve the
system again when an element is added. Instead, the effect of that element can be found as
a correcting factor times the original transfer function.
The technique which allows this procedure is known as the Extra Element Theorem
[7]. This is the same technique which is used to find the effect o f the input filter on a
switching regulator. It is appropriate to apply the technique twice: once for Z q , the source
impedance, and for Z*, the total impedance of the regulators connected to the the same bus.
Alternatively, the Extra Element Theorem can also be extended to a two element theorem
and applied once. Consider the following linear system when an element Z is added as
shown in Fig.2.1.
20
LINEAR
port w
v - output
SYSTEM
u - input
Figure 2.1. Linear system with Z element added.
The impedance Zd=vz/ix is the impedance looking into port w with input u set to zero. The
impedance ^n=vzAx is the impedance looking into port w with u and *z adjusted to null out
the output v.
l"i+_z 1
Zn
=(£)
U'new ‘u/0ld l+%
L ZdJ
i\
z
V =V
u'new U'old
L zJ
for Z —>0
( 2 . 1)
for Z—»°o
( 2 .2)
The first form is useful for inserting an impedance where there was previously a short
circuit as shown in Fig 2.1.
21
LINEAR
N
/
\ Z
\
port w
SYSTEM
( u - input
11
Figure 2.2. Impedance Z added between previous short circuit.
v - output
Figure 2.3. Impedance Z added between two unconnected nodes.
The second form is useful for inserting an impedance between two previouly unconnected
nodes as shown in Fig.2.3.
If a system quantity such as F(s) is already known, and the system has been
designed such that this quantity meets specifications, the Extra Element Theorem can be
used for finding the effect of some parasitic element Z(s) on the original analysis, for
22
finding the effect o f some additional component Z(s) on the system, and also for finding
criteria which ensure that F(s) is unchanged.
The Extra Element Theorem provides such a criteria for not degrading a system
parameter when a new component is added.
F(s)new —F(s)0ld
' “
S '
Z(s)
1+
Zd(s)
for Z(s) —$>0
(2.3)
Zn(s)
Z(S)
Zd(s)
1+
Z(S)
for Z(s)
(2 .4)
1+
F(s)new —F(s)0ld
If F(s) is to remain unchanged the correction factor must remain nearly unity.
| Z | « | Z n|
|Z |«|Z dj
forZ (s) -^ 0
(2 .5)
forZ (s)
(2 .6)
| Z | » | Zn |
|Z |»|Z d|
Equations 2.5 and 2.6 give a simple set of restrictions for not changing F(s). The
correction factor also gives a quantitive measure o f the change due to the parasitic element
Z(s). The following two examples illustrate the use of the Extra Element Theorem.
Example 1:
The use of the Extra Element Theorem is applied to the common-emitter amplifier
shown in Fig. 2.4.
23
Figure 2.4 Common Emitter Amplifier
The small-signal equivalent model of the common-emitter amplifier of Fig. 2.4 is shown in
Fig. 2.5. The quantity 6 of the transistor is assumed to be infinite.
Figure 2.5. Small-signal model of common-emmiter amplifier.
The quantity Rg is the parallel combination of R% and R]. The quantity re is the small signal
resistance calculated from the dc conditions. The capacitor Ci is assumed to be infinite and
C e is assumed to be zero. The voltage gain of Fig. 2.5 is:
V2Rc
Vi
r e + re
(2.7)
The effect of capacitor C e can now be calculated from Fig. 2.6 using the Extra Element
Theorem.
24
Figure 2.6. Effect of bypass capacitor C e on common-emitter amplifier.
The quantity Z is the impedance 1/C e s . The impedance
is defined as v*/ix when the
input voltage v i is set to zero. The impedance Zn is defined as vx/ix when the output v2 is
nulled. To find Z j, set vi to zero. The quantity Z j is REllre. To find Zn, null out v2 The
current i0 is zero. The quantity Zn is R e - Substituting the impedances Z, Z^ and Zn into Eq.
2.4 gives the following expression for the gain :
Y2 _ _ Rp / 1 -i- ReCes \
vt
R ^ l + (REllre)CEs]
(2.8)
At high frequencies the expression reduces to the familiar expression for the common
emmiter amplifier:
2i « .R c
Vi
r=
(2.9)
Example 2:
The Extra Element Theorem is now applied to the buck voltage-mode canonical
model of Fig 2.7.
Figure 2.7 Buck open-loop canonical model
The control-to-output gain of the circuit for Fig.2.7 is:
RHpL
control-to-output = -^- = D0 e(s) ------ - C s — I
d
i R lld i + LS
with v . = 0
( 2 . 10)
The effect of adding an element Z to the buck voltage-mode canonical model is shown in
Fig 2.8, where the following variables are defined as:
Zd = r 2- with vg set to 0
i*
Zn = r 2- with v0 nulled out
ix
( 2 . 11)
To find the impedance Z j , set vg to zero. Reflect the impedance through the transformer.
This gives the following impedance:
ZD=j^(Ls +R"ci)
( 2 . 12)
Figure 2.8 Buck open-loop canonical model with Z element added
26
To find the impedance Zn , null out the output voltage vo. This results in no current through
the resistor, no current through the capacitor, and no current through the inductor. These
currents result in no current flowing through the transformer. This results in the following
equations:
ix = j(s)d
vz = -e(s)d
Zn = -
j(s)
(2.13)
The control-to-output function can now be written as the old transfer function without the
impedance Z, times the correction factor.
(xoV= (v y
id ) Id )
1+i r
j(s)
|
1 + ——j--- —------ —r
- L Ls + R II j D il
Csl/
(2.14)
If no modification of the transfer funcion is to occur then the following conditions must be
met:
e(s)
» |Z |
j(s)
-U u
and I D o '
+ r h J-)!
^'1
» |Z |
(2.15)
For a buck converter, e(s) is a voltage source equal to V/D2 and j(s) is a current source
equal to V/R.
2.2 EFFECT OF A GENERAL INPUT FILTER
The Extra Element Theorem is used in this section to find the effect o f an input filter
on a general linear network and conditions for non-degradation o f network properties are
presented. Instead of finding expressions for a specific input filter, general expressions for
an input filter network are expressed in terms of z-parameters:
27
-VN "
Vl
■ Z ll
. Z21
-V2.
(2 . 16)
Which can be written in matrix notation as:
[V] = [ Z ] [ I ]
(2 . 16)
ii -»
4
<-12
4
V2
INPUT
Vl
FILTER
Figure 2.9 General input filter network.
The voltages and currents are defined for the input filter as shown in Fig. 2.9. The
following input filter parameters are defined for Fig. 2.9 using the z-parameters:
det(Z)
V2
h
9i=0
P (s)= p-
Z21
Zll
vi
h
Xl
ii
Q(S) = ^ V2
iz = 0
(2.18)
Z12
ii = 0
Z22
(2.19)
The impedance Zs is the output impedance of the filter. The impedance Zs' is the input
impedance of the filter. The quantity P(s) is the forward voltage transfer function of the
input filter, and Q(s) is the reverse voltage transfer function of the input filter.
Adding the input filter of Fig. 2.9 to a known system F(s) gives the following new
network shown in Fig. 2.10.
28
ii
o
+
vi
IN P U T
FILTE R
+
v2
F (s )
-
Figure 2.10 System F(s) with input filter.
The quantity F(s) is already known and could represent any converter system parameter of
interest such as loop gain or output impedance etc. Applying the Extra Element Theorem to
the network of Fig. 2.10 gives the following expression:
det(Z)
1 + zn
Zn
F (s) = F(s)
det(Z)
1 + ZU
( 2 .20 )
The term det(Z)/zn is the output impedance of the input filter. It is the Thevenin equivalent
of the impedance seen at the input terminals of the converter network with the input source
set to zero. Simplifying and using the relationships of Eqs. (2.18) gives the following
equation:
F'(s) = F(s)
( 2 . 21 )
The impedance Zn is the impedance at the system input port when the output is nulled. The
impedance Z j is the impedance at the systems input port when the input is set to zero. The
conditions for not modifying the system transfer function are:
l z s l « l z nl
(2.22)
|Z s | « | Z d|
(2.23)
29
Conditions (2.22-2.23) are derived for an ideal source.
2.3 E F F E C T O F SO U R C E O U T PU T IM PE D A N C E
In this section the Extra Element Theorem is applied to a network containing the
element Zq, the source impedance. The effect of this element is found, and new conditions
are found for minimum disturbance o f important network parameters. The impedance of
the source
LINEAR
SYSTEM
FILTER
Figure 2.11 System with Zq added.
can be represented by Zo. Adding Zo to the network system of Fig 2.10 gives the new
network shown in Fig 2.11. Applying the Extra Element theorem again to see the effect of
the source impedance Z q gives the following expression:
F(s) = F(s)
h ti [
l'*iJ
11
20
1
( det(Z) +ZiiZn )/( Z22 + Zn )
1+
20
( det(Z) +znZd )/( Z22 + Zd ).
(2.24)
Applying the filter parameters (2.18-2.19) gives the simplified expression:
1+
F (s) = F(s)
r r s -1 (2.25)
30
Multiplying terms and cancelling similar terms in both the numerator and the denominator
yields the expression:
1+
F (s) = F(s)
z:
(2.26)
If conditions (2.22-2.23) are already satisfied, then the criteria for not modifying the
system transfer function are:
Izo i i z J £- « | Zn I
(2.27)
|zollZs| | | | « | Zd|
(2.28)
Equations (2.27-2.28) puts constraints on the magnitude of the source impedance.
2.4 E F F E C T O F M U L T IP L E C O N V E R T E R S
In this section the effect of an element Z* is found. The effect o f the element Z* is
explained and conditions for ensuring stability are presented. The effect o f connecting
multiple converters on the same bus is represented by Z*, as shown in the network o f Fig.
1.6., with the presence o f the input filter and the source impedance giving the network
shown in Fig.2.13.
31
ii
Z o —f-
h
INPUT
+
LINEAR
V2
SYSTEM
FILTER
I
Figure 2.13. System with Z* added.
Applying the Extra Element Theorem to find the effect of Z* with the input filter and the
source impedance present gives the following results:
F (s) = F(s)
i +—
__________ z ;
Z 5. + Z ^ r P . )
1 , Zd % Q
r. „ I det(Z) + ziiZj,
H 2 0 "!
Z22 + Z,,
_______ z*____
Z q II
det(Z) + znZd
z 22 + z n
1+
z*
l + Zo
Z.
(2.29)
Use the filter relationships (2.18-2.19) to simplify the Eq.(2.29):
rl'-fc)
F (s) = F(s)
Zs +Zo ( £ . )
Zn Zn^Q^
1 + 5o
Z.
Zl + Zq ( P )
, . Zn Zn^Q^
1+
1+S,
z;
j
C t)
rl'-l)
1+^
Zs
?s. + Z2. ( P )
.
1 + , , Zd
Za ' Q ^
1
1
zs
I ' t )
1
Combine terms and cancel like terms in the numerator and the denominator:
(2.30)
32
1 +^2. + ?e-
(2.31)
The extreme case occurs when Z* approaches zero. Applying this condition to Eq. (2.31)
reduces it to the following expression:
F ( s ) « F(s)
(2.32)
in which case the impedance Z* is shorting out the impedance Z0. Equation (2.32) reduces
to Eq.(2.21). If the input filter is designed according to Eqs.(2.22-2.23), the impedance Z*
will not degrade the converter network
2.5 M U L T IP L E C O N V E R T E R IN PU T IM P E D A N C E
Now that a expression determining the effect o f Z* on a MCPS system has been
found, an expression relating Z* to the filter parameters is required. Since Z* is the
impedance sum o f all the regulators connected to the same bus, an expression for each
individual converter is required. The impedance Zik is the input impedance for each
individual regulator, and each regulator could have a different input filter connected.
Applying the Z-parameters at the terminals of the input filter for each individual regulator
gives the following expression for Z*-
33
2 * _ det(Zi) + zii Zji || det(Z 2> + zii Zjg ^ _ det(Zk) + z n
z22 + Zii
Z22 + Zi2
222 + Zik
(2.33)
Using the filter relationships (2.22-2.23) and simplifying gives the following expression:
Z*
i - Pi Oi l
" • • • Z sk
1. % %
l - p> »
r i-P kQ ki
I - P 2 Q2 1
ii 4
l * k \
1 - PkQk
i + s .
Zi k J
(2.34)
The output impedance of the input‘filter is chosen much less than the input impedance o f
each individual regulator.
|Z s | « | Z n |
|Z s |< < |Z i2|
|Z s | « | Z ikj
(2.35)
These conditions are already met automatically if Eqs. (2.22-2.23) and Eqs. (2.27-2.28)
are satisfied. Applying Eq. (2.35) to Eq. (2.34) gives the following appproximation for Z*:
Z*
IIzs2I••-zik
(2.36)
If the input filters are assumed to be have the nearly the same cut-off frequency then Eq.
(2.33) can be further simplified to the following condition:
■«_. Z
' ~ K -1
(2.37)
If conditions (2.22-2.23 ) and (2.27- 2.28) are met then Eq.(2.31) shows that Z* will not
have a detrimental effect on the system. The impedance Z0 will decrease in magnitude due
to the operation of more regulators off the same bus, thus causing the parallel combination
of Z q and Z* to become smaller than the original Z0. Condition (2.36) shows that Z* does
not depend on each regulator individual input inpedance but solely on the filter
characteristics. If the input filter is designed correctly, the input filter decouples the source
34
from the converter. The negative impedance o f the converter will have no effect on the
performance of other regulators.
2.6 A P P L IC A T IO N O F C R IT E R IA T O A C U R R E N T -M O D E C O N V E R T E R
In the last section expressions where found which showed the effect o f Z q and Z* on a
converter system in general. Now, these expressions are applied to the buck current-mode
converter canonical model as shown in Fig 2.13 [2]. The canonical m odel with added
feedback loops (with the pertubation equation found in [6]) is used instead o f the Yparameter model [8]. The Y- paramter model is not used because it is difficult to obtain
physical insight into the inner workings o f the current-mode converter. As Fig. 2.13
shows, four feedback loops are identified: the current-loop gain Tc, the input voltage
feedforward loop gain T f , the internal output voltage feedback loop gain Tvi , and the
external output voltage regulator loop gain TVe- In [2], The loops Tc and Tf are found to be
the main cause of input filter oscillation. The loop gain T Ve is the only directly measurable
loop.
The output voltage of the converter is denoted by v(t), where V is the steady-state
value and vo is the small-signal component. The input voltage of the converter is denoted
by VQ(t), where V q is the steady-state value and vg is the small-signal component. The
quantity Ts is the switching period. The quantity d is the small-signal component of the
duty cycle and D is the steady-state component. The quantity h is the small-signal
representation of the control current. The quantity vref is the small-signal component o f the
reference voltage v r e f O ). The value K is defined as:
K=21VRTS
(2.38)
For convenience the rising inductor slope current M i and the slope o f the compensation
ramp Me are included in the constant a:
The value of Rf represents the effective resistance defined as the product of the current
sense amplifier gain (N) and the current sense resistance (R&). The parameters e(s) and j(s)
are the voltage and current sources that model the effect o f d. The converter effective low
pass filter has an input impedance Zei and output impedance Zeo at the ports indicated; these
—
Buck parameters
M(D) = D
e(s) = -X
RK
>
Figure 2.13 Buck current-mode canonical model, after [2].
quantities are defined for open-loop conditions. The impedance Z l is the parallel
combination of the resistor R and the capacitor C. The impedances Z; and Z q are closed
loop regulator input and ouput impedances respectively. The converter low-pass filter is
36
defined to have a voltage transfer function He(s) in the presence o f the external load R.
Also, quantity A(s) is the gain o f the error amplifier when the converter is operated in the
closed loop configuration.
As shown in Fig. 2.9, Fi(s) and GaCs) are equal to RK. The quantity FzCs) is equal
to D2, The quantity G i(s) is equal to 2D-1 and the parameter H(s) is equal to 1/g (V q-Y).
These are the quantities which are used for Tables 2.1-2.3.
Instead of deriving the effects o f Z q and Z* on all the systems parameters, only
those loops which are known to be the cause o f instability, such as the current loop gain Tc
and the feedforward loop gain Tf will be discussed. Table 2.1 through Table 2.6 shows all
of the buck current-mode and voltage-mode converter’s properties respectively and how
they are modified with the addition of Z0 and Z*.
The two parameters which are the cause of instability with the addition of an input
filter are Tc, the current loop gain, and Tf, the feedforward loop gain. If these are not
modified by the addition of an input filter, then other properties such as external voltage
loop gain, output impedance, etc. will not be significantly modified. As Table 2.1 [2]
shows, the loop gains of an initially stable current-mode converter are not modified by the
addition of an input filter if the following conditions are met:
|Z g |« |Z d c |
(2.40)
I Zs| « I Znc I
(2.41)
| Zs | « | Znf |
(2.42)
where ZdC is the reflected converter filter impedance Zej/M2. The impedance Znc is the
closed-loop low-frequency incremental input resistance -R/D2, and Znf is the impedance at
the converter’s input when the output to the feedforward loop is nulled as defined in Table
37
2.1. The conditions (2.27-2.28) are the relationships found by [1,2] and are required for
stability and perform ance.
The first two conditions are required for voltage mode as Table 2.2 shows, and all
three are required for current-mode. One further constraint is obtained from the output
impedance condition. For non-degradation o f the the closed-loop output impedance the
following condition must be met:
|Z S| «
Re + sLe
M2
(2.43)
With the addition of the source impedance and finding the effect o f on the current loop gain
and the feedforward loop gain three new additional condition are found from Table 2.3:
|Z 0 IIZS
|Z 0 IIZS
« I Znc I
(2.44)
« | Ztfc I
(2.45)
Z0 IIZS
« I Znf I
(2.46)
The first two conditions apply to voltage-mode as shown in Table 2.4 and all three apply to
current-mode. The new conditions also put a constraint on the magnitude of the source
impedance. Also, to avoid degradation of the output closed-loop impedance an additonal
condition must be satisfied:
Re + sLe
M2
(2.47)
If conditions (2.39-2.42 ) are satisfied, then the addition of the impedance Z*, which
represents the total impedance o f the other converters connected on the same bus has no
effect on the converter. This is because Z* will decrease the total impedance at the source
38
terminals. As demonstrated earlier Z* does not depend on the regulator input impedance,
but on the input filter characteristics.
2.7 SU M M A R Y
If an input filter is added to a well designed converter, the converter performance is not
modified provided that the following three conditons are met:
I Zs I
I Zdc I
|Z s | « | Z nc|
|Z s | « | Z nf|
Three general conditions are required for a current-mode converter if the source is taken
into account:
|z0iiz,||a«|z*i
Z o l l Z ,||f |« |Z ^ |
If these conditions are met for stand-alone operation, then for a M CPS, the effect of the
other converters connected at the same bus will not have any detrimental effect on an
individual regulator. The impedance Z* does not degrade, but instead improves the
response because Z* depends on the filters characteristics and not on the regulator’s
negative impedance. Also, the impedance Z* appears in parallel with the impedance Z q,
decreasing the magnitude of Z q.
39
Table 2.1 Summary of buck current-mode converter properties with
and without an input filter % ) .
1. current loop gain
1
TC= TC
e(s)M Fi(s)H(s)
Zn -
1
e(s)
^ c " j(s)
Zdc
Zei
M2
2. feed forward loop gain
f Zs
Tf = 0
ff
i+ f* -
Zdf
Znf
,
F i(s) f l+ T c U Znc V
F2( s)M l Tc l\Z nc- Z dc!
Zdf = ( l ^ ) Z n c l l ( l 4 - T , ) Z d ,
3. internal voltage loop gain
Tvi
Znc = -
Gi(sH Tc
F i(s) l l + T e
e(s)
j(s)
Zdi = - Znf II Zdf
Tvi
Zl
1+
Zg_
Zdi J
40
Table 2.1 (cont.)
4. external voltage loop gain
_
A(s)G2(s) 1 Tvj \
Rf
7
^
-
A ie
Tve = Tve
G ^ I i + tJ
L
i + f 5-
^(S)
j(s)
z de = (1 ^
i) z ni II (1 + Tvi) Zdi
5. minor loop gain
Zi = (1 ^ ^ ) Znell(1 + T Ve) z de
T i= ^
6. output impedance
r i +
( Z
\
Z0 - Z q
L
zs
i
Re + SLe
M2
1+ ^
Zi
7. line transmission characteristic
M H e(sX l-e(s)F 2(s)H(s)]
l + T Ve
F =F
ii+| ]
J
41
Table 2.2. Summary of the buck current-mode converter properties
with and without an input filter(Zg) and including the
source impedance (Z q).
1. current loop gain
Zs_+ Zo_( P.
1 , Znc Znc \ Q
1+ Z &
TC= TC
1 + Zdc
_
Zdc Q
1 + —2-
e(s)M Fi(s)H(s)
7
z
Zs_+
e(s)
'j ( s )
Zdc = %
2. feed forward loop gain
A +
Znf
z
\Q
1 + ^2 .
Tf = 0
ze
Tf
Z
1+
Zdf
Z d flQ
1 +^9-
7 ... F%
(s) f i + T c \f Znc \
^
F2( s)M 1 Tc jlZnc-Zdc/
Zdf = (1 ^
) Zncll(1 + Tc) Zdc
42
Table 2.2 (cont.)
3. internal voltage loop gain
Z*. + Z sl I R )
2
j ^ni
l Q/
1
Tvi
^ 5 .+ ^ 2 . ( 2 1
2 3 Zdi
G i(s)
F i(s)
Tvi
ZdilQl
1 + —2z;
_
e(s)
j(s)
Znc
Zdi = -ZnflIZdf
4. external voltage loop gain
1 + ^2 .
Tve —TVe
, ,6 * 6 ( o )
=
ve
^
A ( s)G 2( s ) /
1 + ^2 .
z;
Tyj
‘ Rf G i(s) ll + Tvi
-
s
^ = ( H ~ ) (1+Tvi)
2,1511
2(11
_
43
Table 2.2 (cont.)
5. minor loop gain
z ' - ( 1 t i a ) z ~ , ( , + T " 1^
Tl " z i + z ^ ( q )
6. output impedance
Z,
Zo
+
Re + SLe Re + SLe
l ,
M2
M2
1 + ?s.
Z0 = Zo
_______________ Zs
?*+?£.( R
! , Zj
Z0
Z jjQ
1 +^2z;
Zeo |
1 + Tvei
7. line transmission characteristic
F'
MHe(s)[l - e(s)F2(s)H(s)]
1+Tve
Z s+ Z of 2 \
! n Zj Zj \ Q )
1 + ^2 .
z;
_
44
Table 2.3. Summary of the buck current-mode converter properties with
and without an input filter (Z$) including the source impedance
(Z q) and with multiple converters (Z*) connected.
1. current loop gain
S + Zo
Znc
TC= TC
e(s)M Fi(s)H(s)
Znc
( q +I ,
1 +Zo+Zo
z; z 6
Zs_ + _Zo_ Z + Zs.
Zde Zjc (Q zN
1 + Zo + Zo
e(s)
j(s)
2. feed forward loop gain
A
Znf
+^o_( Z +
Z n f VQ
Z
1 + ^ 0 +Zo
Tf = 0
z: 2r
Tf
+ ^Q-| Z +
i + Zdf
Zdf\Q
&
1
7
^
f= Fl(s)
(1 + Tc\f Znc |
F2(s)M i Tc /iZnc-ZdJ
Zdf=(1 r ^ ) Znc"(1+Tc) Zdc
z 1*,
z;
45
Table 2.3 (cont)
3. internal voltage loop gain
1 + Zni
Tvi = Tvi
Zni 1 Q
Z--o ^1-Z o
1+—
zl z°
Zj..j-Za. fz +^]
1 + Zdi Zdi Iq z4
i +z^+z^
Z.
Znc
Z*
e(s)
j(s)
Zdi = - Znf II Zdf
4. external voltage loop gain
1+
-Zg_ + Zo_ / p .+ z ^
Zne Zne \ Q %'
1
A ( s)G 2( s) / Tvi ).
Rf G i(s) U + Tvi)
Zne
e(s)
j(s)
^ = (H “ )Znill(1+Tvi)Zdi
+
zl z-
Zs.+ Z^ Z + Zs
2 j Zde Zjg Iq z*i
+ Zo
z. T
46
Table 2.3 (cent)
5. minor loop gain
H 1€ a )z- ' (1+T" )^ T i = I +I ( q + P
6. output impedance
Re + SLe
1+
M2
1+
Za---- (
Zs ’
Re + SLe \ Q
z"
M2
1 + Z q. + Z o
y
z*
1+
Z0 I Z ,
z«
Zs +Z q. Z
Zi Zi Q
Zo
\1 + Tv
7. line transmission characteristic
F'
1+
MHe(s)[l - e(s)F2(s)H(s)]
1+Tve
1
Zs + Zo | z > Zsj
Zj Zj \ Q
z!
i + Zo + A .
z ; z"
47
Table 2.4. Summary of buck voltage-mode converter properties with
and without an input filter (Zg).
1. external voltage loop gain
Tve
1
-A(s)He(s)e(s)f(s)M
Zde
e(s)
j(s)
M2
2. minor loop gain
Zi = ( ^ ^ - ) Zne H(1 + Tve) Zje
Ti = ^
3. output impedance
.1 +
Z0
Zeo |
1 + Tve/
Re + SLe
1
+"
Zs
4. line transmission characteristic
F _ MHe(s)
1+T ve
F =F
I
1+ l
J
48
Table 2.5. Summary of the buck voltage-mode converter properties
with and without an input filter(Zg) and including the
source impedance (Zq).
1. external voltage loop gain
-i-.^ Q (
A
1
Zne
E- \
^ne 1 Q /
1+:
Z&. + Z5l ( Si
^ + Zde
Zde \ Q
1 +^2Tve = -A(s)He(s)e(s)f(s)M
Zne
Zde
e(s)
j'(s)
Zei
M2
2. minor loop gain
•
Ti=I+I(q)
3. output impedance
—
------}. — Zo---- 1 P. |
Re + SLe
1 ■
Z 0 = Zo
M2
Re + SLe \ Q /
M2
_____________
Z,
Zl + Zq fP
IQ
o
1*5 _
49
Table 2.5 (cont.)
\
50
Table 2.6. Summary of the buck voltage-mode converter properties with
and without an input filter (Zg) including the source impedance
(Zq) and with multiple converters (Z*) connected.
1. external voltage loop gain
2 | ^ne
^ne \ Q
7?
1 +Zo+Zo
Tve —Tve
1+
Zde
2*10
1 + Zo + Zo
: -A(s)He(s)e(s)f(s)M
e(s) .
" j(s)
M2
2. minor loop gain
Z i = (1 ^ ^ ) Znel|(1 + Tve)Z de
T-
i
+i ( § +i
Z»
51
3. output impedance
Re + SLe
1+
M2
Zq
Re + SLe
M2
1 + ?2 . + ?2.
zc z
Z0 = Zo
1+
Zs+Zo
Zi Zi
P. + Zs
Q
1 +Zo+Zo
7?
Table 2,6 (com.)
4. line transmission characteristic
1
F '= F
1+
MHe(s)
l + T Ve
Iq
Z*l
o 4-^£L
z;
z”
53
CHAPTER 3
E X P E R IM E N T A L V E R IF IC A T IO N
Two buck current-mode converters operating at identical conditions are constructed
to validate Eqs.(2.37-2.39) The effect of different values of source impedance is observed
on the external voltage loop T Ve- Theoretical plots o f loop gain TVe for different values of
source impedance are found to be in agreement with the experimental data. The effect of Z*
is shown to improve the loop gain TVe.
3.1 P O W E R C IR C U IT
The two buck current-mode converters built for validating the theory are shown in
Fig.3.1. The n-channel M OSFET was an IRF540. The switching diode was a Schottky
MBR1635. The inductor was wound on a 42616 ferrite pot core using # 22 AWG wire
resulting in an inductance of 100 |iH. The capacitor was a 150 pF electrolytic with 0.1 Q
of equivalent series resistance. The sense transformer was wound on a toroidal core with
the secondary consisting of 80 turns of #22 AWG wire and the primary consisting o f 2
turns o f #20 AWG wire resulting in a turns ratio o f 1 to 40. The load was a 2 Q power
resistor rated at 50 watts. The impedance o f the load was resistive for the frequencies of
interest.
3.2 G A T E D R IV E
The gate drive o f Fig 3.1 was constructed. The integrated circuit used was the
current-mode chip UC1846 manufactured by Unitrode. The outputs o f the the chip were
connected in an OR configuration using diodes to obtain full use o f the switching cycle. A
54
2N2930 NPN transistor connected in an emitter follower fashion was used to drive the gate
of the power MOSFET. The gate of the MOSFET was isolated through a 1:1 transformer.
The gate signal was limited by a 13 volt Zener diode in series with a diode which was
connected between the gate and the source o f the MOSFET.
3.3 IN P U T F IL T E R
The input filter was designed to meet the conditions (2.37-2.39). The input filter is
an LC filter with some series resistance to reduce the Q of the filter and thus meet
specifications as shown in Fig.3.1. The inductor was a lOOpH pot-core inductor. The
inductor was identical to the one found in the pow er stage. The reason that the input
inductor and the output inductor were made identical was for practical reasons and to save
time in construction. The capacitor was a 15 pF high frequency electrolytic capacitor which
had very low equivalent series resistance. A 1 f2 resistor was connected in series with the
capacitor to meet the required specifications o f Chapter 2. The output impedance of the
input filter Zs is shown in Fig.3.2 and the plot clearly shows that all specifications for
stability are met.
3.4 S O U R C E IM P E D A N C E
The impedance o f the source was simulated by an inductor in parallel with a
variable resistor as shown in Fig.3.1. The impedance of the Power supply, an HP 6024A,
was measured and found to be much smaller than the artificially induced impedance. The
goal was to violate conditions (2.41-2.43) and verify that even though the input conditions
(2.37-2.39) are met, the source impedance conditions might not be met. The source
inductor was wound on a F43622 ferrite pot core using #22 AWG wire resulting in an
inductance of lOmH. The resistance was a 35 Q variable wire-wound resistor with a rating
55
o f 50 watts. The impedance of the wire-wound resistor was resistive for the frequencies of
measurement. A plot o f the experimental source condition is shown in Fig.3.3 for various
values of resistance. Figures (3.4-3.6) show the theoretical source condition for various
values o f Rq.
3.5 L O O P G A IN M E A SU R E M E N T S
The external voltage loop gain was m easured using the H P 3577A network
analyzer. The external voltage loop gain was measured because it is an accessible loop
unlike the current loop gain which is inaccessible and not directly measureable. The Yparam eter model [8] was not used because the Y-parameters were difficult to measure
experimentally. To measure the voltage loop gain, a current probe was used to inject a
signal at point X (Fig. 3.1). A step-up current transformer was also used to increase the
signal strength of the input signal and thus obtain a higher signal level. The voltage ratio on
each side of the voltage probe is defined as the voltage loop gain.
The measured voltage loop gain with the source impedance negligible and an input filter
which does not degrade performance is shown in Fig. 3.7. For the buck current-mode test
circuit shown in Fig.3.1, the input voltage is 20 V. The output voltage is 5 V. The duty
cycle D is 0.3. The load resistance is R=2.2Q. The switching frequency is fs = 36 KHz,
for a switching period of Tg = 27.8 jisec. The inductor positive slope M i=150 mA/psec. A
stabilizing ramp o f appproximately 3/8 this value, Mc=56.25 m A /psec, was used. The
conduction param eter K =2L/RTS is 3.6. The current sense resistance R s is 11Q. The
current sense transformer steps down the current by N=40. The effective resistance Rf is
Rs/N =0.275 fl.Using these values the voltage loop gain is:
56
=-A(s)
R lip
s 2 [R a ,|+ s f ^ ^ ) + i
I r + P)
where P
R K /a(l-D )
l R + P
I
(3.2)
a - 2Mc/Mi, The gain o f the error amp is A(s)= -2.87 V/V.
Using all these values and plugging it in Eq. 3.2 gives the following equation:
>
- 18'22U
t >)
CDi = 2 ju(610.2 H z)
(3.3)
The other pole is at a very high frequency and out of the 10 Hz to 10 KHz measurement
range. This range was chosen because the canonical model is valid for frequencies fg/4.
The theoretical plot using Eq.(3.3) is shown in Fig. 3.8. The theoretical and experimental
plots are in excellent agreement.
3.6 L O O P G A IN F O R NON Z E R O SO U R C E
The voltage loop gain was perturbed for various values of source resistance. The
values of 10 0 ,1 5 O, 20 O and 25 Q are used. Only the resistance value o f 25 O made the
test circuit unstable. The rest degraded the performance. Figs. (3.9-3.11) show the voltage
loop gains degraded for different values of source impedance. Table 2.3 shows that the
voltage loop gain with a non-zero source and a input filter satisfying the conditions (2.232.25) is:
(zo ii z ; ) £
1+
(zoiiz;fe
1
+
—
- —
^
(3.4)
Inserting the values for source impedance and input filter characteristics gives:
57
Y
_ y
S2(LoCA)) + S ( |p + ^ a-) + 1
. .___________ ^0 ^ne
""
(3.5)
The quantity L0 =10 mH is the source impedance inductance.The resistor Rq is the source
resistance which is being varied between 15 Q and 25 Q The quantity C a is the input
filter’s capacitor which is 15 uF. The impedance Zn& is the low frequency incremental
resistance which is -R/D2. The impedance Z<je is resistive in this frequency range and is
equal to -1.3R/D2. Plugging these values into equation (3.5) gives the value when the loop
w ill start to oscillate. W hen R q is equal to Zde the loop will oscillate with a resonant
frequency equal to
= 1/YLoC a as Eq. (3.6) demonstrates.
S2(L0C a ) ) - S ( ^ - ^ ) + 1
S2(L0C a )) + 1
(3.6)
The resistance Rq equals 28.8 Q . The resonant frequency where oscillation occurs is
410.9 Hz. These values are in agreement with the experimental data. Figs.(3.12-3.14)
show the theoretical plots o f loop gain for various values o f source resistance R q .
Figs.(3.15-3.16) show the ouput voltage ripple when the loop is not degraded and when
the source condition is violated. Figure (3.16) clearly shows that the ouput has an
oscillating waveform superimposed on the ripple corresponding to the resonant frequency
calculated above.
3.7 L O O P G A IN FO R F IN IT E Z*
It was shown that if the input filter is designed correctly, the load is decoupled and
the impedance Z* is basically the impedance of the input filter Z g. Since this impedance is a
positive quantity, Z* can never degrade the converter but instead improves it by making the
58
source impedance smaller than it already is. Figures. (3.17-3.19) show the improvement of
the loop when different impedances are added to the converter. An improvement is also
noticed when another regulator is connected. In fact, the presence o f only one additional
regulator on the same bus reduces the source impedance enough so that the loop gain of the
original regulator is restored to its “normal” condition.
59
35 f it
20 V
- ± -
100 nH
IRF540
15 |iF I
10 mH
I
100 uH
y7XXJv
Ifi I
I
100 Kfi
son
UC1846
1 C u rren t
li m it a d j u s t
2 V ic f
I
i
3 (-) C u r
sense
--- W\r
dow n
V in 15
B o u t 14
sense
4 (+ ) C u r
l Kfi
S h u t 16
V c 13
5 N .I.
G n d 12
6 In v .
A o u t 11
27 Kfi
7 Com p.
S y n c 10
1|iF
8 Ct
Rt 9
-A/W—
10 Kfi
4.7 Kfi
"v.
network analyzer
LM358N —
Figure 3.1. Buck current-mode regulator circuit.
REF L E V E L
4 0 . OOOdB
4 0 .0 0 0 3 8
,'D IV
S.O O O d B
5 .0 0 0 3 8
40 dB
START
iO .O O O H z
MARKER 1 9 7 9 . 4 0 5 H z
MAG f D l )
7 .6 0 7 d B
MARKER 1 9 7 9 . 4 0 5 H z
M A G (0 4 )
2 4 .7 9 7 3 8
STOP
10
OOO.OOOHz
Figure 3.2. Input filter impedance 2$.
61
REF L E V E L
4 5 . OOOdB
/D IV
S.OOOdB
MARKER 3 9 7 . 0 9 1 H z
MAG (UOF)
3 0 . 733dB
4 5 . OOOdB
S.OOOdB
MARKER 3 9 7 .0 9 1 H z
MAG (UOF)
3 0 . 103dB
45 dB *
20 Q
TiM
R
-— ]— r
.
STA R T
L.——
1■—-1-i-*—i
_L.i_l_LLi4_____J—
1 0 .0 0 0 H z
STOP
I— L.i. U LLj
IK
lOf
10 OOO.OOOHz
Figure 3.3. Experimental source condition (ZollZ^) (F/Q) for different values of Rq.
Znf
10000
frequency (Hz)
Figure 3.4. Theoretical source condition for Ro=15 O.
63
Znf
10000
frequency (Hz)
Figure 3.5. Theoretical source condition for Ro=20 Q.
64
Znf
10000
frequency (Hz)
Figure 3.6. Theoretical source condition for Ro=25 Q.
65
REF LEVEL
/□ IV
3 0 . OOOdB
5 . OOOdB
0 . Odog
4 5 . OOOdog
MARKER 1 0 .0 0 0 H z
MAG (UDF)
2 5 .7 3 B d B
MARKER 1 0 . 0 0 0 H z
PHASE (UDF) - 6 . 9 7 7 d e g
30 dB-
-0 deg.
10
START
1 0 .0 0 0 H z
STOP
10 OOO.OOOHz
Figure 3.7. Experimental loop gain for Ro= 0 Cl.
66
mag
phase (deg.)
magnitude (dB)
phase
frequency (Hz)
Figure3.8. Theoretical loop gain for Ro= 0 Q.
67
REF LEVEL
/D IV
3 0 .OOOdB
5 . OOOdB
0 . Odog
« 4 5 .0 0 0 d e g
MARKER 3 6 9 .8 7 6 H z
MABOJDF)
20 .0 B B d B
MARKER 3 6 9 . 8 7 6 H z
PHASE (UDF) - 4 0 . 8 7 3 d e g
1
1
'—
!
!
1
!
i!
4
r— .
! in i
’ i :l 1 | i J
i ! i R K I : !l
'
\
j
ji!
jf
ir
1
ii
I! ;
I. ri
!
i
B
1
i i
£ lii
i
mag.
—
l
\1
10
START
i_____ ___ . . .
Ll
100
1 0 .0 0 0 H z
IK
STOP 10 OOO.OOOHz
10K
Figure 3.9. Experimental loop gain for Ro=15 Q.
-0 deg.
68
REF LEVEL
/D IV
ao.ooodB
5 . OOOdB
O. OUog
4 5 . QCOtiog
MARKER 4 0 4 .1 7 5 H z
MAG (UDF)
1 6 . 675dB
MARKER 4 0 4 . 1 7 5 H z
PHASE (UDF) - 3 2 . 0 B 4 d Q g
30 dB
-0 deg.
START
1 0 .0 0 0 H z
STOP
10 OOO.OOOHz
Figure 3.10. Experimental loop gain for Ro=20 Q .
REF LEV EL
/D IV
ao.ooodB
S.OOOOB
0 .O d c g
4 5 . OOOdeg
MARKER 4 2 5 . 4 2 9 H z
HAQ(UDF)
6 .2 2 2 0 8
MARKER 4 2 5 . 4 2 9 H z
PHASE (UDF)
5 6 . 170deg
-0 deg.
10
START
1 0 .0 0 0 H z
STOP
10
OOO.OOOHz
Figure 3.11. Experimental loop gain for Ro=25 Q.
70
mag
phase (deg.)
phase
frequency (Hz)
Figure 3.12. Theoretical loop gain for Ro=15 £2.
phase (deg.)
71
frequency (Hz)
Figure 3.13. Theoretical loop gain for Ro=20 £1
phase (deg.)
72
frequency (Hz)
Figure 3.14. Theoretical loop gain for R0=25 £1
73
Figure 3.15. Output ripple for Ro=0 £1
74
TEKTRONIX
A U 1 = 0 . 4 nU
2221
A U T 0 P L OT
X
0 , 3 6 3 i BkHz
SAM
- E ■ M 1J
■ Ml
20mi
i BU E R A G E
1m!
Figure 3.16. Output ripple for Ro= 25 £2.
TeJ<
REF LEVEL
a o .o o o d B
0 . Odeg
/□ IV
S.OOOdB
4 5 . COOdeg
MARKER 3 9 0 .0 0 6 H z
MAQ (UDF)
1 7 .0 9 B d B
MARKER 3 9 0 . 0 0 6 H z
PHASE (UDF) - 3 9 . 5 0 7 d a g
-0 deg
10
START
1 0 .0 0 0 H z
STOP
10 OOO.OOOHz
Figure 3.17. Loop gain improvement (dashed) for Z*=40 Q resistor.
REF LEVEL
a o .o o o d B
O . Odeg
/D IV
5 . OOOdB
A 5
. OOOdog
MARKER 3 9 0
MAG (UDF)
MARKER 3 9 0
PHASE (UDF)
006H z
IS.BBO dB
0 06H Z
- 3 1 .0 E 3 d e g
J > S i i mag.
-0 deg.
10
START 1 0 . 0 0 0 H z
STOP 10 OOO.OOOHz
Figure 3.18. Loop gain improvement (dashed) for Z*=4700 pF capacitor.
77
REF LEVEL
/D IV
3 0 .0 0 0 d B
S.OOOdB
0 . Odeg
4 5
MARKER 3 9 0 .0 0 6 H z
MAB (UDF)
15 .B 9 9 d B
. OOOdeg
MARKER 3 9 0 . 0 0 6 H z
PHASE (UDF) - 3 2 . 3 6 6 d c g
T
rr
!;
1
A v .
Am
;/iv
i
i
________ I
!' !
T j!
!
i!
!
L
1 0 .0 0 0 H z
i j |
h rki
\n j
x
-Jb
4
!
J
i n i t N U ~ k !j
1
rr
1i
1 1 i ! 1 1 j____________ ____________ 1
100
!
nnag.
k
!'
r r r n r jH
!
Ill
L .
»
10
START
|
!l
L
-0 deg.
!
l l l j ________ I____ ___ __ 1 I 1 1 i ,
IK
STOP 10 OOO.OOOHz
1 0K
Figure 3.19. Loop gain improvement (dashed) for Z*=buck current-mode regulator.
78
CHAPTER 4
C O N C L U S IO N
To find the effect of Zo, the source impedance and Z*, the total impedance of the
other regulators connected to the same bus, the Extra Element Theorem is applied to a
multiple converter network. Design Eqs. [2.44-2.46] are discovered which put quantitative
bounds on the allowable magnitude o f the source output impedance. These equations are
applied to a small-signal canonical model o f the buck-current mode regulator. A buck
current-m ode regulator is built to test E q s.[2.44-2.46]. The source im pedance is
deliberately varied to violate Eqs.[2.44-2.46]. For values o f source resistance R q less than
Znc, the closed-loop low-frequency incremental resistance and less than Zdc, the reflected
converter impedance, the loop gain is degraded. The value where E q s.[2.44-2.46] are
equal to ZdC, the regulator start to oscillate and to become unstable. The frequency o f
oscillation is theoretically predicted and agrees with the measured frequency. The loop gain
measured for different values of source impedance is in agreement with the theoretical loop
gain calculated. The impedance Z* is found to be beneficial to the system if Eqs. [2.402.42] are met. This because the parallel combination o f Z* and Z q makes the impedance
seen at the source smaller. Its is also discovered that if E qs.[2.40-2.42] are met, the
regulator negative impedance is decoupled from the dc source. Experimental verification is
presented which shows the improvement in loop gain when Z* is added. A suiprisingly
large source impedance can be allowed, e.g., 20-25 Q which relaxes the constraint on the
output impedance of the source converter. The power supply designer now has Eqs. [2.442.46] for not over-designing a regulator. If the input filter is well designed according to
79
E qs.[2.40-2.42] , the designer need not worry about the other regulators in a MCPS,
because of the decoupling effect discovered.
80
REFEREN CES
[ 1]
R.D. Middlebrook, “Input Filter Considerations in Design and Application
of Switching Regulators.” IEEE Industry Applications Society Annual
Meeting, 1976 Record. Advances in Switched-Mode Power Conversion,
Volume I, published by Teslaco, Pasadena, CA.
[2]
Y. Jang and R.W. Erickson, “Physical Origins o f Input Filter Oscillations
in Current Programmed Converters,” IEEE Applied Power Electronics
Conference, 1991 Record.
[3]
S.Y. Erich and W.M. Polivka, “Input Filter Design for Current-Programmed
R egulators,” Applied Power Electronics Conference, 1990 pp. 781-790.
[4]
C.R. Kohut, “ Input Filter Considerations in the Design And Analysis of
Switching Converters using Current-Mode-Programming,” Applied Power
Electronics Conference, 1990, pp. 779-790.
[5]
S. Cuk and R.D. Middlebrook, “A General Unified Approach to Modeling
Switching Converter Power Stages,” 1976, pp. 18-34, (IEEE Publication
77CH1213-8 AES); also International Journal of Electronics, vol. 42, no. 6,
pp.521-550, June 1977.
[6]
G.C Verghese, C. A. Bruzos, Krishna N. Mahabir, “Average And Sampled Data
for Current Model Control: A Reexamination,” IEEE Power Electronics
Specialists Conference, 1989 Record, pp. 484-491 (IEEE Publication
89CH2721-9).
[7]
R.D. Middlebrook, “Null Double Injection and The Extra Element Theorem,”
IEEE Transactions on Education, vol. 32, no. 3, August 1989, pp. 167-180.
81
[8]
R.D. Middlebrook, “Modelling a Current-Programmed Buck Regulator,”
Proceedings of IEEE Applied Power Electronics Conference, 1987 Record, pp.
3-13.
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