Silicon Protection Array (SPA) Products PRODUCT

Silicon Protection Array (SPA) Products PRODUCT
PRODUCT
CATALOG
& DESIGN
GUIDE
Silicon Protection Array
(SPA) Products
Littelfuse Circuit Prot
Solutions Portf
Consumer Electronics Telecom White Goods Medical Equipment TVSS and Power S
DESIGN SUPPORT
Live Application Design and Technical Support—Tap into our expertise. Littelfuse engineers are available around the world to help you address design challenges and develop
unique, customized solutions for your products.
Product Sampling Programs—Most of our products are available as samples for testing and
verification within your circuit design. Visit Littelfuse.com or contact a Littelfuse product
representative for additional information.
Product Evaluation Labs and Services—Littelfuse global labs are the hub of our new
product development initiatives, and also provide design and compliance support testing
as an added-value to our customers.
1
OVERVOLTAGE SUPPRESSION TECHNOLOGIES (1-6)
1. TVS Diodes — Suppress
overvoltage transients such
as Electrical Fast Transients
(EFT), inductive load switching
and lightning in a wide
variety of applications in the
computer, industrial, telecom
and automotive markets.
4. Gas Plasma Arrestors
(GDTs) — Available in small
footprint leaded and surface
mount configurations,
Littelfuse GDTs respond
fast to transient overvoltage
events, reducing the risk of
equipment damage.
2. Varistors — Multiple forms,
from Metal Oxide Varistors
(MOVs) that suppress transient
voltages to Multi-Layer Varistors
(MLVs) designed for applications
requiring protection from
various transients in computers
and handheld devices as well
as industrial and automotive
applications.
5. Silicon Protection
Arrays — Designed specifically
to protect analog and digital
signal lines from electrostatic
discharge (ESD) and other
overvoltage transients.
3. SIDACtor® Devices—
Complete line of protection
thyristor products specifically
designed to suppress
overvoltage transients in a
broad range of telecom and
datacom applications.
2
6. PulseGuard® ESD
Suppressors — Available in
various surface mount form
factors to protect high-speed
digital lines without causing
signal distortion.
Visit
tection
folio
Supplies Lighting General Electronics
3
5
SWITCHING
TECHNOLOGIES
ACCESSORIES
Switching Thyristors—
Solid-state switches used to
control the flow of electrical
current in applications, capable
of withstanding rated blocking/
off-state voltage until triggered
to on-state.
In addition to our broad portfolio
of circuit protection technologies,
we offer an array of fuse holders
including circuit board, panel
or in-line wire mounted devices
to support a wide range of
application requirements.
7
OVERCURRENT
PROTECTION
TECHNOLOGIES (7-8)
7. Positive Temperature
Coefficient Devices (PTCs)—
Provide resettable overcurrent
protection for a wide range of
applications.
4
6
www.littelfuse.com for more information.
8
8. Fuses — Full range including
surface mount, axial, glass or
ceramic, thin-film or Nano2®
style, fast-acting or SloBlo®,
MINI® and ATO ® fuses.
Circuit Protection with Silicon Protection Arrays (SPAs)
Littesfuse SPAs are designed to protect electronics from very fast and often damaging
voltage transients, such as lightning and electrostatic discharge (ESD). They offer an ideal
protection solution for I/O interfaces and digital and analog signal lines, in computer and
consumer portable electronics markets.
Littelfuse SPAs are available in a range of surface mount and through hole (PDIP) package
configurations, including SC70, SOT23, SOT143, TSSOP-8 MSOP-8, DIP, and SOIC.
Features
tLow capacitance of 30pF to 0.65pF typically
tHigh level of protection: ESD IEC 610000-4-2 contact discharge up to ±30kV,
air discharge up to ±30kV, EFT IEC 61000-4-4 40A (5/50ns)
t Low clamping voltage
t Up to 14 inputs protection
t Space saving arrays, ultra small packages available
t ROHS compliant
tPb-Free and Halide-free designs available
Silicon Protection Arrays
TM
TABLE OF CONTENTS
Technology
Series
SCR Array
TVS Array
SP720 SP721 SP723 SP724 SP725
SP05
Surface
Mount
Packages
PDIP
SOIC
PDIP
SOIC
PDIP
SOIC
SOT23
SC70
SOT23 SC70
SOIC SOT143 SOT553
TSSOP SOT563
MSOP
SC70
SC70
SC70
Working
Voltage
2-30V
2-30V
2-30V
1-20V
2-30V
5.5V
6V
6.5V
6V
6V
Capacitance
3pF
3pF
5pF
3pF
5pF
30pF
8pF
5pF
Number of
Channels
14
6
6
4
4
2,3,4,5,6
2,4,5
1
4
ESD Rating
(Contact
Discharge,
IEC61000-4-2)
4kV
4kV
8kV
8kV
8kV
20kV
8kV
8kV
8kV
VCLAMP
(8/20)
8/20 Rating
SC70-5,
SC70-6,
SOT553, SOT563
SOT563,
MSOP10
SOIC
SC70
6V
6V
5V
5.5V
0.65pF
0.85pF
16pF
47pF
4
2,4
4
2
1
12kV
8kV
12kV
8kV
15kV
0.65pF 0.85pF
8.0V @ 9.2V @ 9.5V @ 9.5V @ 10.0V @ 10.0V @ 20V @
1A
1A
1A
1A
1A
1A
100A
3A
3A
7A
3A
14A
2A
2A
2.5 A
4.5 A
2.5 A
4A
150 A
Yes
Introduction
Overvoltage Suppression Facts
2
Transient Voltage Scenarios
3
Transient Voltage Suppression Factors and Techniques
4
Littelfuse SPA Technology Overview and Typical Applications
8
Data Sheets
RoHS
Pb
SP1001 Lead-Free/Green Series
11
RoHS
Pb
SP1002 Lead-Free/Green Series
19
RoHS
Pb
SP3001 Lead-Free/Green Series
23
RoHS
Pb
SP3002 Lead-Free/Green Series
29
RoHS
Pb
SP3003 Lead-Free/Green Series
35
RoHS
Pb
SP3004 Lead-Free/Green Series (Available Q3/2008)
43
RoHS
Pb
SP050xBA Lead-Free/Green Series
49
RoHS
Pb
SP720 Lead-Free/Green Series
57
RoHS
Pb
SP721 Lead-Free/Green Series
63
RoHS
Pb
SP723 Lead-Free/Green Series
69
RoHS
Pb
SP724 Lead-Free/Green Series
75
RoHS
Pb
SP725 Lead-Free/Green Series
81
RoHS
Pb
SP03-6 (SO-8) Series
87
SPUSB1 Series
93
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
1
Introduction
RoHS
Page Directory
Diode Array
SP1001 SP1002 SP3001 SP3002 SP3003 SP3004 SP03-6 SPUSB1
Data Sheets
Product Selection Table
Silicon Protection Arrays
TM
Overvoltage Suppression Facts
The exponential rise time of lightning is in the range
1.2μsec to 10μsec (essentially 10% to 90%) and the
duration is in the range of 50μsec to 1000μsec (50% of
peak values). ESD on the other hand, is a much shorter
duration event. The rise time has been characterized at less
than 1.0ns. The overall duration is approximately 100ns.
Transient Threats – What Are Transients?
Voltage Transients are defined as short duration surges of
electrical energy and are the result of the sudden release
of energy previously stored or induced by other means,
such as heavy inductive loads or lightning. In electrical
or electronic circuits, this energy can be released in a
predictable manner via controlled switching actions, or
randomly induced into a circuit from external sources.
Why are Transients of Increasing Concern?
Component miniaturization has resulted in increased
sensitivity to electrical stresses. Microprocessors for
example, have structures and conductive paths which
are unable to handle high currents from ESD transients.
Such components operate at very low voltages, so
voltage disturbances must be controlled to prevent device
interruption and latent or catastrophic failures.
Repeatable transients are frequently caused by the
operation of motors, generators, or the switching of
reactive circuit components. Random transients, on the
other hand, are often caused by Lightning and Electrostatic
Discharge (ESD). Lightning and ESD generally occur
unpredictably, and may require elaborate monitoring to be
accurately measured, especially if induced at the circuit
board level. Numerous electronics standards groups have
analyzed transient voltage occurrences using accepted
monitoring or testing methods. The key characteristics of
several transients are shown in the table below.
VOLTAGE
CURRENT
Sensitive microprocessors are prevelant today in a wide
range of devices. Everything from home appliances, such
as dishwashers, to industrial controls and even toys use
microprocessors to improve functionality and efficiency.
Most vehicles now also employ multiple electronic
systems to control the engine, climate, braking and, in
some cases, steering, traction and safety systems.
RISE-TIME DURATION
Lighting
25kV
20kA
10 μs
1ms
Switching
600V
500A
50μs
500ms
EMP
1kV
10A
20ns
1ms
ESD
8kV
30A
<1ns
100ns
Many of the sub- or supporting components (such as
electric motors or accessories) within appliances and
automobiles present transient threats to the entire system.
Table 1. Examples of transient sources and magnitude
Careful circuit design should not only factor environmental
scenarios but also the potential effects of these related
components. Table 2 below shows the vulnerability of
various component technologies.
Characteristics of Transient Voltage Spikes
Transient voltage spikes generally exhibit a “double
exponential” wave, as shown below for lightning and ESD.
Vp
Vp/2
t1
t
t2
Figure 1. Lightning Transient Waveform
Device Type
Vulnerability (volts)
VMOS
30-1800
MOSFET
100-200
GaAsFET
100-300
EPROM
100
JFET
140-7000
CMOS
250-3000
Schottky Diodes
300-2500
Bipolar Transistors
380-7000
SCR
680-1000
Table 2: Range of device vulnerability.
Current (I) %
100%
90%
I30
I60
10%
30n
60n
tr = 0.7 to 1.0ns
Figure 2. ESD Test Waveform
2
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Transient Voltage Scenarios
Electrostatic Discharge (ESD)
Switching
Electrostatic discharge is characterized by very fast
rise times and very high peak voltages and currents.
This energy is the result of an imbalance of positive and
negative charges between objects.
The switching of inductive loads generates high energy
transients which increase in magnitude with increasingly
heavy loads. When the inductive load is switched off, the
collapsing magnetic field is converted into electrical energy
which takes the form of a double exponential transient.
Depending on the source, these transients can be as large
as hundreds of volts and hundreds of Amps, with duration
times of 400 milliseconds.
ESD that is generated by everyday activities can far surpass
the vulnerability threshold of standard semiconductor
technologies. Following are a few examples:
t Walking across a carpet:
35kV @ RH = 20%;1.5kV @ RH = 65%
Typical sources of inductive transients include:
t Walking across a vinyl floor:
12kV @ RH = 20%;250V @ RH = 65%
tGeneratortMotor
t Worker at a bench:
6kV @ RH = 20%;100V @ RH = 65%
tTransformer
tRelay
t Poly bag picked up from desk:
20kV @ RH = 20%;1.2kV @ RH = 65%
Lightning Induced Transients
90%
The diagram at right
shows a transient
which is the result of
stored energy within
the alternator of an
automobile charging
system.
Even though a direct strike is clearly destructive, transients
induced by lightning are not the result of a direct strike.
When a lightning strike occurs, the event creates a
magnetic field which can induce transients of large
magnitude in nearby electrical cables.
A cloud-to-cloud strike
will effect not only
overhead cables, but
also buried cables.
Even a strike 1 mile
distant (1.6km) can
generate 70 volts in
electrical cables.
This diagram shows
a typical current
waveform for induced
lightning disturbances.
Inductive Load
VS
10%
VB
VS = 25V to 125V
VB = 14V
T= 40ms to 400ms
T1 = 5ms to 10ms
R = 0.5 to 4
t
A similar transient can also be caused by other DC motors
in a vehicle. For example, DC motors power amenities
such as power locks, seats and windows. These various
applications of a DC motor can produce transients that are
just as harmful to the sensitive electronic components as
transients created in the external environment.
PERCENT OF PEAK VALUE
In a cloud-to-ground
strike (as shown at
right) the transientgenerating effect is far
greater.
Introduction
These examples are common in electrical and electronic
systems. Because the sizes of the loads vary according
to the application, the wave shape, duration, peak current
and peak voltage are all variables which exist in real world
transients. Once these variables can be approximated, a
suitable suppressor
T
V
technology can be
T1
selected.
t Vinyl envelopes:
7kV @ RH = 20%;600V @ RH = 65%
100
90
50
10
O1
t
t1
TIME
t2
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
3
Silicon Protection Arrays
TM
Transient Voltage Suppression Factors and Techniques
Why Implement Circuit Protection?
ESD Electrical Characteristics
It is important to consider that most electronic equipment
will spend 99% of its useful life in environments where it is
subject to ESD.
ESD, in contrast to switching and surge transients, has
a very short transition from zero to maximum current
and voltage. The rise time of an ESD event is less than 1
nanosecond (1ns), while the other transients take longer
than 1 microsecond (1μs) to reach their peaks.
ESD can be generated from a wide range of everyday
factors such as very dry air, static from plastics, or walking
across a floor or carpet, and can be present during every
phase of useful life from manufacturing, to product
shipping, receiving, to field handling.
The International Electrotechnical Commission (IEC) has
developed a model of the human-generated ESD event.
This model is used in the IEC’s test specification for
determining if systems (computers, networks, cell phones,
set top boxes, etc.) are susceptible to ESD events. The test
specification quantifies the methodology for introducing
ESD into the system as well as the various voltage and
current levels that define the ESD event.
Electrostatic Discharge (ESD) causes millions of dollars
worth of damage to electrical components, rendering
circuit boards non-functional, and corrupting or erasing
vital data. Often the damage is not detectable until a
malfunction occurs. That could take weeks, months,
or even years before an unpredictable and premature
breakdown causes a field failure.
While these circuits have typical maximum ESD protection
levels of 2,000V, humans can generate ESD voltages in
excess of 15,000V. This level of ESD is in excess of the onchip protection circuits and can damage them.
If you use electronic components or boards in your
products, adding devices that suppress ESD damage can
result in preventing damage to your company reputation
and bottom line. Other tangible benefits include:
Common ESD Damage
A transient discharged into an electronic system creates
three general types of adverse effects:
tHigher manufacturing yields
tLess rework and inventory
tReduced overall costs
1. Soft Failures/Data Corruption: can occur to a part
of the data stream, or the system may latch up. This is a
temporary problem and is solved by data correction (for
data corruption) or by re-booting the system (for latch up).
tFewer field failures and warranty calls
tIncreased product reliability
tMore repeat business
2. Latent Defects: A component might be partially
degraded, but able to function properly. Typically a latent
defect may cause a system to fail prematurely.
Companies can also face legal liabilities if the product fails
due to ESD/Transient damage. So it is important to include
ESD/Transient Immunity in all phases of the project.
3. Catastrophic Failures: An internal component is
rendered inoperable, and cannot function properly. This is
a permanent condition. In the case of Junction Burnout,
a short circuit condition is created in a transistor of the
circuit. The metallic interconnect (Trace Line) is “pulled
through” one of the semiconductor layers (Alloy Spike)
or one of the semi conducting junctions is directly short
circuited (Junction Short). In Oxide Punch-Through, the
metallic interconnect is “pulled through” the oxide layer to
provide a short circuit on the signal line. In Metallization
Burnout, the metallic interconnect is melted, much like a
fuse. It creates an open circuit condition on the signal line.
It is wise to factor Electrostatic Discharge (ESD) Immunity
strategies early in design processes. If a device in
development fails ESD immunity tests–the scramble to
avoid complete redesign often leads to higher parts cost
and more manual assembly during manufacturing.
There is little time to fully analyze which components
do and do not provide ESD immunity. Worse, under
pressure, finding comprehensive information tailored to
ESD immunity design is very difficult, leaving your product
vulnerable to ESD/Transient damage.
Littelfuse associates can help you address these
challenges, offering extensive application expertise and
product testing capabilities. Please contact your local
Littelfuse representative for assistance.
The use of ESD circuit protection components like
Littelfuse SPAs will help you avoid such problems.
4
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Common ESD Entry Points
ESD Suppression Strategies
ESD can quickly finds weak spot(s) and sneak into
devices using a wide range of potential coupling paths.
Careful consideratation about potential weak points, and
taking steps to seal off those paths and fortify the most
vulnerable electronic components is vital.
Chip Level ESD Protection
In the heart of the device is the integrated circuitry (IC)
responsible for its processing and communication function.
Typically, trade-offs for the chip designer are ESD
protection versus die space and the demand of smaller
and faster chips-which require sub-micron processes and
very fine line widths. As more ESD protection structures
are incorporated into the chip, survivability increases. The
choice is either less space available for functional circuitry
or make the chip larger.
Below are potential ways an ESD pulse can enter an
electronic device:
1. An initial electric field from an arc can capacitively couple
over a large surface area. It can appear like a signal to highimpedance analog circuits and measure up to 4000 V/m
100 mm
tSmash through insulating layers in the component and
damage the gates of MOSFETs and CMOS devices
Input and output port connections allow the free flow
of data – including transients. ESD can enter a port–or
the disconnected end of the cable while connecting/
disconnecting cables. It will then travel through the
connector to the PC board and propagate down the data
lines toward the ICs.
tTrigger a latch-up in CMOS devices
tShort circuit reverse and forward-biased PN junctions
tMelt bonding wires
3. A voltage pulse on conductors caused by current
(V = L * dl/dt) whether from ground, power or signal
wiring, can spread into every device that is linked;
Littelfuse offers small size PSA packages to provide
maximum protection with a minimum of space. The
suppressor devices are installed between the data line and
the chassis ground (parallel connection) and shunt the ESD
transient from the data line to the ground. Optimally, SPAs
should be the first thing a transient should encounter on
the board.
4. An intense magnetic field emitted from an ESD arc
can have a frequency range of 1 to 500Mhz, which can
inductively couple into every nearby wiring loop and be as
high as 15 A/m 100 mm
5. An electro-magnetic field generated by the arc’s
magnetic field can radiate and couple into long wires that
act like receiving antennas
NOTE: For high-speed signal pins, devices with extremely
low capacitance levels should be used. Consult www.
littelfuse.com for more detailed information on which
products offer best protection for high-speed connectors.
Board Level ESD Protection
Especially critical in portable systems is the board layout.
Parasitic inductance in the protection path can result
in significant voltage overshoot, easily getting past the
insulation barriers and damaging the the circuit. This is
especially critical in the case of fast rise-time transients
such as ESD or EFT. However, the need for board-level
protection will vary from system to system.
Factors determining level of need:
tThe board layout
tESD capabilities of the IC
tPhysical ability of ESD transients to get on the data lines
Empirical testing can also be done to help determine the
system’s susceptibility.
(section continued on next page)
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
5
Introduction
In today’s market, “smaller and faster”is the goal, and ESD
protection is sacraficed for more on-chip space to boost
functionality and speed. Consequently, circuits will become
more sensitive to ESD and other transients.
2. Current or charge from the arc can be injected and:
Silicon Protection Arrays
TM
Supplemental ESD Protection
Another consideration is the Number Of Lines To Be
Protected. This is determined by the system’s data
protocol. For example, USB buses have two data lines,
RS 485 uses two lines per differential pair, 10/100 BaseT
Ethernet uses four lines, etc. In cases where multiple data
lines will be protected, it may be desirable to use a multiline suppressor to save board space and installation costs.
Littelfuse suppressors are available in single and multiple
line packages to offer a broad selection of high quality SPAs
to the circuit designer.
When deciding on more ESD protection, the next step is to
identify the appropriate suppressor. Consider the following
specifications to make an appropriate selection:
tCapacitance
tPeak voltage and clamping level
tLeakage current
tSystem operating voltage
tNumber of lines to be protected
Suppressor Location
Capacitance is becoming an extremely important
criterion since the data rates at which electronic products
are communicating continue to increase. As previously
mentioned, the Clamping Level of the suppressor
determines how much of the ESD transient is eliminated.
A related value is the Peak Voltage. As the suppressor
transitions from high to low resistance, a portion of the
ESD wave front is transmitted before the clamping voltage
is established. These are important factors for those IC’s
that do not have a substantial amount of on-chip ESD
protection. In this case, it is important that as little ESD
as possible is actually experienced by the IC. For these
circuits, the SP050x and SP72x product lines are ideal.
They have extremely low peak and clamping voltages to
provide ultimate protection to the IC.
Place the suppressor as near the line that it is protecting
as possible. ESD transient should hit the suppressor first
on entry to the board. Because ESD is such a fast rise-time
event, any distance between the protected line and the
ESD suppressor will mean more transient voltage to the
IC.
ESD Prevention During The Manufacturing Process
Manufacturers typically include structures stamped
directly on the die to provide some ESD protection of the
circuits through the manufacturing process. Production
environments tightly control and take precautions to
ensure that static electricity levels on personnel and
equipment are minimized. For example, when handling
parts or their containers, workers wear wrist straps,
anti-static garments and work at grounded workstations.
Various environmental controls (humidity/air ionization)
are also implemented. Finally, by transporting products in
special electrostatic shield packaging ensures safe arrival
to the customer.
Leakage Current is the amount of current passed
through the suppressor as the circuit operates normally
(i.e. at rated voltage). It is an important consideration for
applications where the main power supply is batterydriven. In these cases, the suppressor should allow as
little leakage as possible, to avoid increasing the battery
drainage time.
All Littelfuse ESD suppressors have very low typical
leakage current. Suppressors have varied System
Operating Voltage specifications determined by their
construction. This is used to determine if the part is
suitable for given circuit parameters. For example, a 5 VDCrated part should not be used where the ESD reference is
a 9 VDC bus. The excess voltage may cause degradation
of the part.
6
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
ESD Immunity Test Standards
Additional Transient Immunity Considerations
To test their products, manufacturers apply one of several
testing models using either the CDM (Charged Device
Model), MM (Machine Model), and/or HBM (Human Body
Model). More powerful transients await as the product
moves outside the controlled factory environment. Often
designers and/or engineers will need to provide additional
off-chip, board-level solutions to fill in the gaps.
Film Resistors
In-line film resistors between inputs and off-board
connectors provide minimal transient protection and are
often damaged themselves.
Component Quality
Active components play the biggest role towards ESD/
Transient immunity. If using substitute and/or secondary
source components, test and analyze them thoroughly.
Though functionally equivalent, they may lack the ESD/
Transient immunity of the preferred components.
Look for Technical Briefs at www.littelfuse.com that
address solutions available to reduce catastrophic
failures and allow the equipment to reliably withstand
user-generated ESD events, as typified in the IEC test
specification 61000-4-2.
Preventive Software Programming
The basic requirement of good software is to cleanly
handle abnormal operations, no matter the cause.
Internal Moving Parts
Equipment with moving parts can become its own ESD/
Transient generator. Printers and copiers are especially
susceptible because they carry paper through paper rollers
and use toner. In general, the problem areas include sliding
parts, rolling parts, flexing parts, flowing liquids and airflow
carrying particles or liquid droplets.
Finally, once the design has been approved, it’s tempting
to substitute components in effort to boost product
performance. Often newer chips and components are
faster but more sensitive to transients causing new
emissions and immunity problems. Keep fully informed,
as periodically suppliers can make changes to components
that may affect ESD Immunity. Test the new parts to
determine if they are still effective. Planning is key, in
the event the new product doesn’t work or the company
ceases producing it, having several backup plans will help
your company face unforseen challenges.
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
7
Introduction
Multi-Suppressor Combinations
ESD protection through use of Silicon Protection Arrays
(SPAs) included in combination with other filters and
transient suppressors is another strategy for inputs,
outputs and power nets. See www.Littelfuse.com for more
information.
Silicon Protection Arrays
TM
SPA Technology Overview and Typical Applications
Terms and Definitions
Introduction to Silicon Protection Arrays (SPAs)
Littelfuse Silicon Protection Arrays (SPAs) are designed to
protect analog and digital signal lines, such as USB and
HDMI, from various transient threats using the lowest
possible clamp voltage. They offer broader application
use and improved impulse protection performance over
conventional diodes.
Operating Voltage Range (Vsupply)
The range limits of the power supply voltage that may be
across the V+ and V- terminals. The SCR/Diode arrays do
not have a fixed breakover or operating voltage. These
devices ‘float’ between the input and power supply rails
and thus the same device can operate at any potential
within its range.
These robust diodes can safely absorb repetitive ESD
strikes at the maximum level (Level 4) specified in the IEC
61000-4-2 international standard, without performance
degradation.
Forward Voltage Drop
The maximum forward voltage drop between an input pin
and respective power supply pin for a specific forward
current.
Key Features
Reverse Voltage Drop
The maximum reverse voltage drop between an input pin
and respective power supply pin for a specific reverse
current.
tLow capacitance 30pF to 0.65pF typically
tHigh level of protection ESD IEC 610000-4-2 contact
discharge up to ±20kV, air discharge up to ±30kV,
EFT IEC 61000-4-4 40A (5/50ns)
Reverse Standoff Voltage
The device VR should be equal to, or greater than the
peak operating level of circuit (or part of the circuit) to be
protected. This is to ensure that SPA’s do not clip the circuit
drive voltage.
tLow clamping voltage
tLow leakage 0.5μA maximum
tUp to 14 inputs protection
tAvailable in space saving Surface Mount, Through-Hole
and small size packages for mounting close to input
ports for optimal protection
Reverse Leakage Current
Maximum of state current measured at specified voltage.
tROHS compliant and Lead-Free
Clamp Voltage
Maximum voltage which can be measured across the
protector when subjected to the maximum peak pulse
current.
Littelfuse SPAs: How they Work?
Littelfuse Silicon Protection Arrays (SPA’s), provide
high level protection against ESDs, Electromagnetic
Interferences (EMI), Electrical Fast Transients (EFT) and
Lightning, mainly for sensitive digital and analogue input
circuits, on data, signal, or control lines operating on power
supplies.
Input Leakage Current
The DC current that is measured at the input pins at the
stated voltage supplied to the input.
Quiescent Supply Current
The maximum DC current into V+/V- pins with Vsupply at
its maximum voltage
SPA’s work in two ways, first, they absorb transients with
diodes, to steer the current, and then, an avalanching or
zener diode, clamps the voltage levels. This prevents the
device from exceeding its voltage rating. During overvoltage fault conditions, the device must have a low clamp
voltage at the specified current wave form to protect
sensitive IC’s and ports.
Input Capacitance
The capacitance measured between the input pin and
either supply pin at 1MHz/1VRMS applied.
In normal operation, the reverse stand off voltage must be
higher than the equipment supply/working voltage, with
low leakage current to prevent power supply loading. The
device capacitance must be low enough to reduce input
signal distortion. The device package must have a small
footprint and low height to enable a high density Printed
Circuit Board (PCB) layout.
The device must withstand multiple ESD/EFT pulses as
specified in the IEC 61000-4-2.
8
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Common Littelfuse SPA Product Applications
Littelfuse SPAs serve a wide range of end
product circuit protection applications.
Littelfuse SPA Series and Product Applications
SP1001 SP1002 SP3001 SP3002 SP3003 SP3004 SP050X SP720 SP721 SP723 SP724 SP725 SPO3-6 SPUSB1
The lists provided here include only a short
summary of common SPA applications. For
additional information and to discuss your
application and requirements in depth, please
contact your Littelfuse products representative.
Audio Lines
Littelfuse offers extensive application expertise,
and validation testing capabilities to help you
find the ideal Littelfuse SPA solution to serve
your requirements.
Cell Phone
LCD TV
Set Top Box
Cell Phone
X
X
X
X
X
X
X
LCD TV
X
X
X
X
X
X
X
Set Top Box
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Low speed I/O Ports
USB 1.1 Ports
Cell Phone
Universal Serial Bus (USB) Products:
USB 1.1/2.0 Full Speed (12 Mbp/s)
USB 2.0 Hi-Speed (480 Mbp/s)
USB 3.0 Super-Speed (4.8 Gbp/s -- Coming Soon)
tPCI adapter cards
tDigital cameras
tPeripherals, etc.
tComputers (desktops and laptops)
tPeripherals (printers, scanners, etc.)
tHandheld devices (PDA’s, cell phones, MPEG
players, etc.)
tRepeaters and hubs
tDigital still cameras
Digital Visual Interface (DVI) Products:
DVI (1.12 Gbp/s)
tVisual Sources
tDesktop and laptop computers
tDVD’s and PVR’s
tSet top boxes Visual Displays
tLCD and CRT units
Cell Phone
X
X
X
X
X
LCD TV
X
X
X
X
X
Set Top Box
X
X
X
X
X
LCD TV
X
X
X
X
Set Top Box
X
X
X
X
LCD TV
X
X
X
X
Set Top Box
X
X
X
X
X
X
X
X
1394 Port
Introduction
Common Cables and Transmission Speeds
X
USB 2.0 Ports
HDMI Port
LCD Module
Cell Phone
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
SIM Socket
Cell Phone
MMC Interface
Cell Phone
Keypads/Buttons
Cell Phone
X
Analog Video
LCD TV
X
X
X
X
X
X
X
Set Top Box
X
X
X
X
X
X
X
Ethernet Port
LCD TV
X
X
X
X
X
Set Top Box
X
X
X
X
X
NOTE: The application summaries listed here are for reference only. Determination of suitability for a specific application is the responsibility of the customer.
tLCD overhead project
Suppressors with high capacitance can affect the data
stream by distorting the data waveforms. In addition to
low-capacitance SPAs, Littelfuse also offers PulseGuard®
ESD suppressors as a solution for ESD protection. Both
technologies will provide ESD protection and maintain the
integrity of the data signals. PulseGuard® ESD products are
surface mount devices with 0.050 pF of capacitance.
IEEE 1394 Products:
IEEE 1394a (400 Mbp/s)
IEEE 1394b (800 to 1,600 Mbp/s -- Coming Soon)
tPCI adapter cards
tHubs/routers
tComputers (desktops and laptops)
tPCI adapter cards
tRepeaters and hubs
tExternal hard drives
tDigital video recorders
tDigital still cameras
To assure suitability of any Littelfuse device, be sure to test
the device within the end application under conditions of
intended use.
tRecordable CD ROM drives
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
9
Silicon Protection Arrays
TM
10
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
8pF ESD Protection Array
RoHS
Pb
SP1001 Lead-Free/Green Series
GREEN
Description
Zener diodes fabricated in a proprietary silicon avalanche
technology protect each I/O pin to provide a high level of
protection for electronic equipment that may experience
destructive electrostatic discharges (ESD). These
robust diodes can safely absorb repetitive ESD strikes
at the maximum level specified in the IEC 61000-4-2
international standard (Level 4, 8KV contact discharge)
without performance degradation. Their very low loading
capacitance also makes them ideal for protecting highspeed signal pins.
Pinout
Features
SP1001-04
(SC70-5)
SP1001-05
(SC70-6)
1
1
3
2
5
1
6
2
2
5
3
3
4
4
SP1001-02
(SOT 553)
SP1001-04
(SOT 553)
NC
5
SP1001-05
(SOT 563)
1
5
2
2
NC
4
3
4
1
6
2
5
3
4
SP1001-02
2
t 4NBMMQBDLBHFTBWFT
board space
t $PNQVUFS1FSJQIFSBMT
t -$%1%157T
t .PCJMF1IPOFT
t 4FU5PQ#PYFT
t %JHJUBM$BNFSBT
t %7%1MBZFST
t %FTLUPQT/PUFCPPLT
t .11.1
2
SP1001-04
1
4
5
3
5
t &4%QSPUFDUJPOPGL7
contact discharge, 15kV
air discharge, (Level 4,
IEC61000-4-2)
Applications
SP1001-02
2
t -PXMFBLBHFDVSSFOUPG
0.5μA (MAX) at 5V
t &'5QSPUFDUJPO
IEC61000-4-4, 40A
(5/50 ns)
Functional Block Diagram
1
t -PXDBQBDJUBODFPGQ'
(TYP) per I/O
SP1001-05
4
6
5
4
3
1
2
3
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
11
SP1001 Lead-Free/Green Series
Lead-Free/Green SP1001
SP1001-02
(SC70-3)
Silicon Protection Arrays
TM
8pF ESD Protection Array
Absolute Maximum Ratings
Symbol
Parameter
IP
Peak Current (tp=8/20μs)
TOP
TSTOR
Value
Units
2
A
Operating Temperature
-40 to 85
°C
Storage Temperature
-60 to 150
°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Thermal Information
Parameter
Rating
Storage Temperature Range
Units
-65 to 150
°C
Maximum Junction Temperature
150
°C
Maximum Lead Temperature (Soldering 10s)
300
°C
Electrical Characteristics (TOP = 25°C)
Symbol
Test Conditions
Min
Typ
Max
Units
Forward Voltage Drop
Parameter
VF
IF=10mA
0.7
0.9
1.2
V
Reverse Voltage Drop
VR
IR=10mA
6.0
6.7
8.0
V
Reverse Standoff
VRWM
IR≤1μA
5.5
V
Reverse Leakage Current
ILEAK
VR=5V
0.5
μA
Clamp Voltage1
VC
ESD Withstand Voltage1,2
VESD
CD
Diode Capacitance1
IPP=1A, tp=8/20μs, Fwd
8.0
V
IPP=2A, tp=8/20μs, Fwd
9.6
V
IEC61000-4-2 (Contact)
±8
IEC61000-4-2 (Air)
±15
kV
kV
Reverse Bias=0V
12
pF
Reverse Bias=2.5V
8
pF
Reverse Bias=5V
7
pF
Notes:
1
Parameter is guaranteed by device characterization
2
A minimum of 1,000 ESD pulses are applied at 1s intervals between the anode and common cathode of each diode
Capacitance vs. Reverse Bias
14
12
Capacitance (pF)
10
8
6
4
2
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
DC Bias (V)
SP1001 Lead-Free/Green Series
12
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
8pF ESD Protection Array
Design Consideration
directly behind the connector so that they are the first
board-level circuit component encountered by the ESD
transient. They are connected from signal/data line to
ground.
Because of the fast rise-time of the ESD transient,
placement of ESD devices is a key design consideration.
To achieve optimal ESD suppression, the devices should
be placed on the circuit board as close to the source of
the ESD transient as possible. Install the ESD suppressors
Application Example
LCD module
Controller
Input
Outside World
D1
D2
D3
D4
SP 1001-04JTG (SC70-5)
SP 1001-04XTG (SOT553)
Shield
Ground
Signal
Ground
Soldering Parameters
Pre Heat
Pb – Free assembly
- Temperature Min (Ts(min))
150°C
- Temperature Max (Ts(max))
200°C
- Time (min to max) (ts)
60 – 180 secs
Average ramp up rate (Liquidus) Temp
(TL) to peak
3°C/second max
TS(max) to TL - Ramp-up Rate
3°C/second max
Reflow
- Temperature (TL) (Liquidus)
- Temperature (tL)
217°C
60 – 150 seconds
Peak Temperature (TP)
250+0/-5 °C
Time within 5°C of actual peak
Temperature (tp)
20 – 40 seconds
Ramp-down Rate
6°C/second max
Time 25°C to peak Temperature (TP)
8 minutes max.
Do not exceed
260°C
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Lead-Free/Green SP1001
Reflow Condition
13
SP1001 Lead-Free/Green Series
Silicon Protection Arrays
TM
8pF ESD Protection Array
Part Numbering System
Product Characteristics
SP1001-02 J T G
Silicon
Protection
Array
G= Green
T= Tape & Reel
Package
Series
J = SC70-3, -5 or -6, 3000 qty
X = SOT553 or SOT563, 5000 qty
Number of Channels
02 = 2 Channel
04 = 4 Channel
05 = 5 Channel
Part Marking System
Lead Plating
Matte Tin
Lead Material
Copper Alloy
Lead Coplanarity
0.0004 inches (0.102mm)
Subsitute Material
Silicon
Body Material
Molded Epoxy
Flammability
UL94-V-0
Notes :
1. All dimensions are in millimeters
AXX
AXX
2. Dimensions include solder plating.
3. Dimensions are exclusive of mold flash & metal burr.
Product Series
Number of Channels
A = SP1001 series
(varies)
4. All specifications comply to JEDEC SPEC MO-203 Issue A
5. Blo is facing up for mold and facing down for trim/form, i.e. reverse trim/form.
Assembly Site
6. Package surface matte finish VDI 11-13.
(varies)
Ordering Information
Part Number
Package
Marking
Min. Order Qty.
SP1001-02JTG
SC70-3
AX2
3000
SP1001-02XTG
SOT553
AX2
5000
SP1001-04JTG
SC70-5
AX4
3000
SP1001-04XTG
SOT553
AX4
5000
SP1001-05JTG
SC70-6
AX5
3000
SP1001-05XTG
SOT563
AX5
5000
Package Dimensions - SC70-3
B
Solder Pad Layout
3
Package
SC70-3
Pins
3
JEDEC
E HE
2
1
e
MO-203 Issue A
Millimeters
e
D
A2 A
Max
Min
Max
A
0.80
1.10
0.031
0.043
A1
0.00
0.10
0.000
0.004
A2
0.70
1.00
0.028
0.039
B
0.15
0.30
0.006
0.012
c
0.08
0.25
0.003
0.010
D
1.85
2.25
0.073
0.089
E
1.15
1.35
0.045
0.053
e
A1
C
Inches
Min
0.66 BSC
0.026 BSC
HE
2.00
2.40
0.079
0.094
L
0.26
0.46
0.010
0.018
L
SP1001 Lead-Free/Green Series
14
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
8pF ESD Protection Array
Package Dimensions - SC70-5
Package
e
e
6
5
Solder Pad Layout
4
not used
MO-203 Issue A
Millimeters
Min
3
2
1
5
JEDEC
HE
E
SC70-5
Pins
B
D
A2 A
A1
L
Min
Max
A
0.80
1.10
0.031
0.043
A1
0.00
0.10
0.000
0.004
A2
0.70
1.00
0.028
0.039
B
0.15
0.30
0.006
0.012
c
0.08
0.25
0.003
0.010
D
1.85
2.25
0.073
0.089
E
1.15
1.35
0.045
0.053
e
C
Inches
Max
0.65 BSC
0.026 BSC
HE
2.00
2.40
0.079
0.094
L
0.26
0.46
0.010
0.018
Package Dimensions - SC70-6
6
5
Package
Solder Pad Layout
4
E
1
2
SC70-6
Pins
6
JEDEC
MO-203 Issue A
HE
Millimeters
Max
Min
Max
A
0.80
1.10
0.031
0.043
A1
0.00
0.10
0.000
0.004
A2
0.70
1.00
0.028
0.039
B
0.15
0.30
0.006
0.012
c
0.08
0.25
0.003
0.010
D
1.85
2.25
0.073
0.089
E
1.15
1.35
0.045
0.053
3
B
D
A2 A
A1
C
e
L
Inches
Min
0.65 BSC
0.026 BSC
HE
2.00
2.40
0.079
0.094
L
0.26
0.46
0.010
0.018
Package Dimensions - SOT553
A
6
5
(not used)
2
Package
L
D
Pins
5
Millimeters
4
E
HE
Solder Pad Layout
3
e
SOT 553
A
c
B
Max
Min
Max
0.50
0.60
0.020
0.024
B
0.17
0.27
0.007
0.011
c
0.08
0.018
0.003
0.007
D
1.50
1.70
0.059
0.067
E
1.10
1.30
0.043
0.051
e
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
15
Inches
Min
0.50 BSC
0.014 BSC
L
0.10
0.30
0.004
0.012
HE
1.50
1.70
0.059
0.067
SP1001 Lead-Free/Green Series
Lead-Free/Green SP1001
B
B
Silicon Protection Arrays
TM
8pF ESD Protection Array
Package Dimensions - SOT563
A
D
6
5
4
E
2
3
e
Package
L
SOT 563
Pins
6
Millimeters
Solder Pad Layout
Max
Min
Max
0.50
0.60
0.020
0.024
B
0.17
0.27
0.007
0.011
c
0.08
0.18
0.003
0.007
D
1.50
1.70
0.059
0.067
E
1.10
1.30
0.043
0.051
A
c
B
Inches
Min
HE
e
0.50 BSC
0.020 BSC
L
0.10
0.30
0.004
0.012
HE
1.50
1.70
0.059
0.067
Embossed Carrier Tape & Reel Specification - SC70-3
Dimensions
Millimetres
Min
Max
Min
Max
E
1.65
1.85
0.065
0.073
F
3.45
3.55
0.135
0.139
P2
1.95
2.05
0.077
0.081
D
1.40
1.60
0.055
0.063
D1
1.00
1.25
0.039
0.049
P0
3.90
4.10
0.154
0.161
10P0
40.0 +/- 0.20
7.70
P
3.90
4.10
0.153
0.161
A0
2.30
2.50
0.090
0.098
2.50
0.090
1.30
0.043
B0
1.00 Ref
2.30
B1
K0
16
8.10
1.574 +/- 0.008
W
A1
SP1001 Lead-Free/Green Series
Inches
0.303
0.039 Ref
1.90 Ref
1.10
0.318
0.098
0.074
0.051
K1
0.60 Ref
0.023 Ref
t
0.27 max
0.010
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
8pF ESD Protection Array
Embossed Carrier Tape & Reel Specification - SC70-5 and SC70-6
Dimensions
Millimetres
Min
Inches
Max
Min
Max
E
1.65
1.85
0.065
0.073
F
3.45
3.55
0.135
0.139
P2
1.95
2.05
0.077
0.081
D
1.40
1.60
0.055
0.063
D1
1.00
1.25
0.039
0.049
P0
3.90
4.10
0.154
0.161
10P0
40.0 +/- 0.20
1.574 +/- 0.008
W
7.70
8.10
0.303
0.318
P
3.90
4.10
0.153
0.161
A0
2.14
2.34
0.084
0.092
B0
2.24
2.44
0.088
0.096
K0
1.12
1.32
0.044
0.051
t
0.27 max
0.010 max
Embossed Carrier Tape & Reel Specification - SOT553 and SOT563
Dimensions
17
Max
1.65
1.85
0.065
0.073
F
3.45
3.55
0.135
0.139
P2
1.95
2.05
0.077
0.081
D
1.40
1.60
0.055
0.063
D1
0.45
0.55
0.017
0.021
P0
3.90
4.1
0.154
0.161
40.0 +/- 0.20
1.574 +/- 0.008
W
7.70
8.10
0.303
0.318
P
3.90
4.10
0.153
0.161
A0
1.73
1.83
0.068
0.072
B0
1.73
1.83
0.068
0.072
K0
0.64
0.74
0.025
0.029
t
©2008 Littelfuse, Inc.
Min
E
10P0
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Inches
Max
0.22 max
0.010 max
SP1001 Lead-Free/Green Series
Lead-Free/Green SP1001
Millimetres
Min
Silicon Protection Arrays
TM
18
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Bi-Directinal ESD Protection Array
RoHS
Pb
GREEN
SP1002 Lead-Free/Green Series
Description
Back-to-Back Zener diodes fabricated in a proprietary
silicon avalanche technology protect each I/O pin to provide
a high level of protection for electronic equipment that
may experience destructive electrostatic discharges (ESD).
These robust diodes can safely absorb repetitive ESD
strikes at the maximum level specified in the IEC 610004-2 international standard (Level 4, 8KV contact discharge)
without performance degradation. Their very low loading
capacitance also makes them ideal for protecting highspeed signal pins.
Pinout
Features
SP1002-01
(SC70-3)
1
NC
t -PXDBQBDJUBODFPGQ'
(TYP) I/O to I/O
t -PXMFBLBHFDVSSFOUPG
0.5μA (MAX) at 5V
t &4%QSPUFDUJPOPGL7
contact discharge, 15kV
air discharge, (Level 4,
IEC61000-4-2)
t 4NBMMQBDLBHFTBWFT
board space
t &'5QSPUFDUJPO
IEC61000-4-4, 40A
(5/50 ns)
2
Applications
SP1002-01
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
19
t $PNQVUFS1FSJQIFSBMT
t -$%1%157T
t .PCJMF1IPOFT
t 4FU5PQ#PYFT
t %JHJUBM$BNFSBT
t %7%1MBZFST
t %FTLUPQT/PUFCPPLT
t .11.1
SP1002 Lead-Free/Green Series
Lead-Free/Green SP1002
Functional Block Diagram
Silicon Protection Arrays
TM
Bi-Directinal ESD Protection Array
Absolute Maximum Ratings
Symbol
Parameter
Value
Units
2
A
IP
Peak Current (tp=8/20μs)
TOP
Operating Temperature
-40 to 85
°C
TSTOR
Storage Temperature
-60 to 150
°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Thermal Information
Parameter
Storage Temperature Range
Rating
Units
-65 to 150
°C
Maximum Junction Temperature
150
°C
Maximum Lead Temperature (Soldering 10s)
300
°C
Electrical Characteristics (TOP = 25°C)
Parameter
Voltage Drop
Symbol
Test Conditions
Min
Typ
Max
Units
6.0
7.0
VD
IR=10mA
8.5
V
Standoff Voltage
VRWM
IR≤1μA with 1 I/O at GND
6.0
V
Leakage Current
ILEAK
VR=5V with I/O at GND
0.5
μA
VC
Clamp Voltage1
ESD Withstand Voltage1,3
Diode Capacitance
1
VESD
CD
IPP=1A, tp=8/20μs, Fwd
9.2
V
IPP=2A, tp=8/20μs, Fwd
11.2
V
IEC61000-4-2 (Contact)
±8
kV
IEC61000-4-2 (Air)
±15
kV
Reverse Bias=0V
6
pF
Reverse Bias=2.5V
5
pF
Reverse Bias=5V
5
pF
Notes:
1
2
Parameter is guaranteed by device characterization
A minimum of 1,000 ESD pulses are applied at 1s intervals
Application Example
MultiMedia
Device
MultiMedia
Device
2 x SP1002-01
Audio Out L
Audio In L
Audio Out R
Audio In R
SCART MultiMedia Application of SP1002-01
SP1002 Lead-Free/Green Series
20
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Bi-Directinal ESD Protection Array
Soldering Parameters
Reflow Condition
- Temperature Min (Ts(min))
150°C
- Temperature Max (Ts(max))
200°C
- Time (min to max) (ts)
60 – 180 secs
Average ramp up rate (Liquidus) Temp
(TL) to peak
3°C/second max
TS(max) to TL - Ramp-up Rate
3°C/second max
Reflow
- Temperature (TL) (Liquidus)
217°C
- Temperature (tL)
60 – 150 seconds
Peak Temperature (TP)
250+0/-5 °C
Time within 5°C of actual peak
Temperature (tp)
20 – 40 seconds
Ramp-down Rate
6°C/second max
Time 25°C to peak Temperature (TP)
8 minutes max.
Do not exceed
260°C
Part Numbering System
Product Characteristics
SP1002 -01J T G
Silicon
Protection
Array
Series
Number of Channels
Lead Plating
Matte Tin
G= Green
Lead Material
Copper Alloy
T= Tape & Reel
Lead Coplanarity
0.0004 inches (0.102mm)
Subsitute Material
Silicon
Body Material
Molded Epoxy
Flammability
UL94-V-0
Package
J = SC70-3, 3000 qty
Part Marking System
Notes :
1. All dimensions are in millimeters
2. Dimensions include solder plating.
BX1
BX1
Product Series
3. Dimensions are exclusive of mold flash & metal burr.
4. All specifications comply to JEDEC SPEC MO-203 Issue A
Number of Channels
5. Blo is facing up for mold and facing down for trim/form, i.e. reverse trim/form.
A = SP1002 series
6. Package surface matte finish VDI 11-13.
Assembly Site
(varies)
Ordering Information
Part Number
Package
Marking
Min. Order Qty.
SP1002-01JTG
SC70-3
BX1
3000
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
21
SP1002 Lead-Free/Green Series
Lead-Free/Green SP1002
Pre Heat
Pb – Free assembly
Silicon Protection Arrays
TM
Bi-Directinal ESD Protection Array
Package Dimensions - SC70-3
B
Solder Pad Layout
1.30
[0.0512]
3
e
e
1.90
[0.0748]
D
A2 A
A1
MO-203 Issue A
L
Inches
Min
Max
Min
Max
A
0.80
1.10
0.031
0.043
A1
0.00
0.10
0.000
0.004
A2
0.70
1.00
0.028
0.039
B
0.15
0.30
0.006
0.012
c
0.08
0.25
0.003
0.010
D
1.85
2.25
0.073
0.089
E
1.15
1.35
0.045
0.053
e
0.90
[0.0354]
C
3
Millimeters
2
1
SC70-3
Pins
JEDEC
0.65
[0.0256]
0.70
[0.0276]
E HE
Package
0.66 BSC
0.026 BSC
HE
2.00
2.40
0.079
0.094
L
0.26
0.46
0.010
0.018
Embossed Carrier Tape & Reel Specification - SC70-3
PO
Dimensions
ØD
t
Millimetres
F
W
E
P2
AO
A1
BO
B1
ØD1
K1
P
Min
Max
Min
Max
E
1.65
1.85
0.065
0.073
F
3.45
3.55
0.135
0.139
P2
1.95
2.05
0.077
0.081
D
1.40
1.60
0.055
0.063
D1
1.00
1.25
0.039
0.049
P0
3.90
4.10
0.154
0.161
KO
10P0
40.0 +/- 0.20
7.70
P
3.90
4.10
0.153
0.161
A0
2.30
2.50
0.090
0.098
B0
1.00 Ref
2.30
B1
K0
22
8.10
1.574 +/- 0.008
W
A1
SP1002 Lead-Free/Green Series
Inches
0.303
0.039 Ref
2.50
0.090
1.90 Ref
1.10
0.318
0.098
0.074
1.30
0.043
0.051
K1
0.60 Ref
0.023 Ref
t
0.27 max
0.010
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Low Capacitance ESD Protection Array
RoHS
Pb
GREEN
SP3001 Lead-Free/Green Series
Description
The SP3001 has ultra low capacitance rail-to rail diodes
with an additional zener diode fabricated in a proprietary
silicon avalanche technology to protect each I/O pin
providing a high level of protection for electronic equipment
that may experience destructive electrostatic discharges
(ESD). These robust diodes can safely absorb repetitive
ESD strikes at the maximum level specified in the IEC
61000-4-2 international standard (Level 4, 8KV contact
discharge) without performance degradation. Their very low
loading capacitance also makes them ideal for protecting
high speed signal pins such as HDMI, DVI, USB2.0, and
IEEE 1394.
Pinout
Features
I/O 1
I/O 4
GND
VCC
I/O 2
I/O 3
t-PXMFBLBHFDVSSFOUPG
0.5μA (MAX) at 5V
t&4%QSPUFDUJPOPGœL7
contact discharge, ±15kV
air discharge,
(IEC61000-4-2)
t4NBMM4$QBDLBHF
saves board space
t&'5QSPUFDUJPO
IEC61000-4-4,
40A (5/50 ns)
Applications
I/O4
VCC
t $PNQVUFS1FSJQIFSBMT
t/FUXPSL)BSEXBSF1PSUT
t.PCJMF1IPOFT
t5FTU&RVJQNFOU
t1%"T
t.FEJDBM&RVJQNFOU
t%JHJUBM$BNFSBT
I/O1
GND
I/O3
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
23
SP3001 Lead-Free/Green Series
Lead-Free/Green SP3001
Functional Block Diagram
I/O2
t-PXDBQBDJUBODFPG
0.65pF (TYP) per I/O
Silicon Protection Arrays
TM
Low Capacitance ESD Protection Array
Absolute Maximum Ratings
Symbol
Parameter
Value
Units
2.5
A
Operating Temperature
-40 to 85
°C
Storage Temperature
-50 to 150
°C
IP
Peak Current (tp=8/20μs)
TOP
TSTOR
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Thermal Information
Parameter
Storage Temperature Range
Rating
Units
-65 to 150
°C
Maximum Junction Temperature
150
°C
Maximum Lead Temperature (Soldering 10s)
300
°C
Electrical Characteristics (TOP=25ºC)
Symbol
Test Conditions
Min
Zener Breakdown Voltage
Parameter
VBR
IR=10μA
6.0
Reverse Leakage Current
ILEAK
VR=5V
Clamp Voltage1
VC
ESD Withstand Voltage1
VESD
Diode Capacitance1
CI/O-GND
Diode Capacitance
CI/O-I/O
1
Typ
Max
Units
V
0.5
μA
IPP=1A, tp=8/20μs, Fwd
9.5
V
IPP=2A, tp=8/20μs, Fwd
10.6
V
IEC61000-4-2 (Contact)
±8
kV
IEC61000-4-2 (Air)
±15
kV
Reverse Bias=0V
0.80
pF
Reverse Bias=1.65V
0.65
pF
Reverse Bias=0V
0.35
pF
Note 1: Parameter is guaranteed by device characterization
SP3001 Lead-Free/Green Series
24
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Low Capacitance ESD Protection Array
Insertion Loss (S21) I/O to GND
Capacitance vs. Bias Voltage
1
1.00
0
0.95
-1
0.90
I/O Capacitance (pF)
Insertion Loss [dB]
-2
-3
-4
-5
-6
-7
0.85
0.80
0.70
VCC = 3.3V
0.65
-8
0.60
-9
0.55
-10
VCC = Float
0.75
VCC = 5V
0.50
1.E+06
1.E+07
1.E+08
1.E+09
1.E+10
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
I/O DC Bias (V)
Frequency [Hz]
Capacitance vs. Frequency
1.4E-12
1.2E-12
Capacitance [F]
1E-12
8E-13
6E-13
4E-13
0
1.E+06
1.E+07
1.E+08
Lead-Free/Green SP3001
2E-13
1.E+09
Frequency [Hz]
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
25
SP3001 Lead-Free/Green Series
Silicon Protection Arrays
TM
Low Capacitance ESD Protection Array
Application Example
+5V
D2+
D2+
Gnd
D2-
D26
5
4
SP300x-04
1
2
3
D1+
D1+
Gnd
D1HDMI
or DVI
Connector
D1HDMI
or DVI
Interface
IC
D0+
D0+
Gnd
D0-
D06
5
4
SP300x-04
1
2
3
Clk+
Clk+
Gnd
Clk-
ClkGnd
ASIC HDMI/DVI drivers can also be protected with the
SP300x-04, the +VCC pins on the SP300x-04 can be
substituted with a suitable bypass capacitor or in some
backdrive applications the +VCC of the SP300x-04 can be
floated or NC.
HDMI or DVI application example for the Littelfuse
SP300x-04 protection devices. A single 4 channel
SP300x-04 device can be used to protect four of the data
lines in a HDMI/DVI interface. Two (2) SP300x-04 devices
provide protection for the main data lines. Low voltage
Soldering Parameters
Reflow Condition
Pre Heat
Pb – Free assembly
- Temperature Min (Ts(min))
150°C
- Temperature Max (Ts(max))
200°C
- Time (min to max) (ts)
60 – 180 secs
Average ramp up rate (Liquidus) Temp
(TL) to peak
3°C/second max
TS(max) to TL - Ramp-up Rate
3°C/second max
Reflow
- Temperature (TL) (Liquidus)
- Temperature (tL)
217°C
60 – 150 seconds
Peak Temperature (TP)
250+0/-5 °C
Time within 5°C of actual peak
Temperature (tP)
20 – 40 seconds
Ramp-down Rate
6°C/second max
Time 25°C to peak Temperature (TP)
8 minutes Max.
Do not exceed
260°C
SP3001 Lead-Free/Green Series
26
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Low Capacitance ESD Protection Array
Package Dimensions - SC70-6
e
6
5
Package
SC70-6
Pins
6
4
E
JEDEC
HE
MO-203 Issue A
Millimeters
2
1
3
B
D
A2 A
A1
C
Solder Pad Layout
Min
Max
Min
Max
A
0.80
1.10
0.031
0.043
A1
0.00
0.10
0.000
0.004
A2
0.70
1.00
0.028
0.039
B
0.15
0.30
0.006
0.012
c
0.08
0.25
0.003
0.010
D
1.85
2.25
0.073
0.089
E
1.15
1.35
0.045
0.053
e
L
Part Numbering System
Inches
0.65 BSC
0.026 BSC
HE
2.00
2.40
0.079
0.094
L
0.26
0.46
0.010
0.018
Product Characteristics
SP3001-04 J T G
Silicon
Protection
Array
G= Green
T= Tape & Reel
Series
Package
Number of Channels
J = SC70-6, 3000 quantity
-04 = 4 channel
Lead Plating
Matte Tin
Lead Material
Copper Alloy
Lead Coplanarity
0.0004 inches (0.102mm)
Subsitute Material
Silicon
Body Material
Molded Epoxy
Flammability
UL94-V-0
Notes :
1. All dimensions are in millimeters
Part Marking System
2. Dimensions include solder plating.
3. Dimensions are exclusive of mold flash & metal burr.
DX4
DX4
Product Series
4. All specifications comply to JEDEC SPEC MO-223 Issue A
5. Blo is facing up for mold and facing down for trim/form, i.e. reverse trim/form.
Number of Channels
6. Package surface matte finish VDI 11-13.
D = SP3001 series
Assembly Site
(varies)
Ordering Information
Part Number
Package
Marking
Min. Order Qty.
SP3001-04JTG
SC70-6
DX4
3000
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
27
SP3001 Lead-Free/Green Series
Lead-Free/Green SP3001
e
Silicon Protection Arrays
TM
Low Capacitance ESD Protection Array
Embossed Carrier Tape & Reel Specification - SC70-6
Symbol
Min
Max
1.65
1.85
0.064
0.072
F
3.45
3.55
0.135
0.139
P2
1.95
2.05
0.076
0.080
D
1.40
1.60
0.055
0.062
D1
1.00
1.25
0.039
0.049
P0
3.90
4.10
0.153
0.161
40.0+/- 0.20
W
7.70
8.10
1.574+/-0.007
0.303
0.318
P
3.90
4.10
0.153
0.161
A0
2.14
2.34
0.084
0.092
B0
2.24
2.44
0.088
0.960
K0
1.12
1.32
0.044
0.052
t
28
Inches
Max
E
10P0
SP3001 Lead-Free/Green Series
Millimetres
Min
0.27 max
0.010 max
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Low Capacitance ESD Protection Array
RoHS
Pb
GREEN
SP3002 Lead-Free/Green Series
Description
The SP3002 has ultra low capacitance rail-to rail diodes
with an additional zener diode fabricated in a proprietary
silicon avalanche technology to protect each I/O pin
providing a high level of protection for electronic equipment
that may experience destructive electrostatic discharges
(ESD). These robust diodes can safely absorb repetitive
ESD strikes at the maximum level (Level 4) specified in the
IEC 61000-4-2 international standard without performance
degradation. Their very low loading capacitance also makes
them ideal for protecting high speed signal pins such as
HDMI, DVI, USB2.0, and IEEE 1394.
Pinout
Features
I/O 1
I/O 4
GND
VCC
I/O 2
I/O 3
t-PXMFBLBHFDVSSFOUPG
0.5μA (MAX) at 5V
t&4%QSPUFDUJPOPG
±12kV contact discharge,
±15kV air discharge,
(IEC61000-4-2)
t4NBMM4$QBDLBHF
saves board space
t&'5QSPUFDUJPO
IEC61000-4-4, 40A
(5/50 ns)
Applications
I/O4
VCC
t$PNQVUFS1FSJQIFSBMT
t/FUXPSL)BSEXBSF1PSUT
t.PCJMF1IPOFT
t5FTU&RVJQNFOU
t1%"T
t.FEJDBM&RVJQNFOU
t%JHJUBM$BNFSBT
I/O1
GND
I/O3
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
29
SP3002 Lead-Free/Green Series
Lead-Free/Green SP3002
Functional Block Diagram
I/O2
t-PXDBQBDJUBODFPG
0.85 pF (TYP) per I/O
Silicon Protection Arrays
TM
Low Capacitance ESD Protection Array
Absolute Maximum Ratings
Symbol
Parameter
Value
Units
4.5
A
Operating Temperature
-40 to 85
°C
Storage Temperature
-50 to 150
°C
IP
Peak Current (tp=8/20μs)
TOP
TSTOR
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Thermal Information
Parameter
Storage Temperature Range
Rating
Units
-65 to 150
°C
Maximum Junction Temperature
150
°C
Maximum Lead Temperature (Soldering 10s)
300
°C
Electrical Characteristics (TOP=25ºC)
Symbol
Test Conditions
Min
Zener Breakdown Voltage
Parameter
VBR
IR=10μA
6.0
Reverse Leakage Current
ILEAK
VR=5V
Clamp Voltage1
VC
ESD Withstand Voltage1
VESD
Diode Capacitance1
CI/O-GND
Diode Capacitance
CI/O-I/O
1
Typ
Max
Units
V
0.5
μA
IPP=1A, tp=8/20μs, Fwd
9.5
V
IPP=2A, tp=8/20μs, Fwd
10.6
V
IEC61000-4-2 (Contact)
±12
kV
IEC61000-4-2 (Air)
±15
kV
Reverse Bias=0V
1.1
pF
Reverse Bias=1.65V
0.85
pF
Reverse Bias=0V
0.5
pF
Note 1: Parameter is guaranteed by device characterization
SP3002 Lead-Free/Green Series
30
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Low Capacitance ESD Protection Array
Insertion Loss (S21) I/O to GND
Capacitance vs. Bias Voltage
1.50
0
1.40
I/O Capacitance (pF)
Insertion Loss [dB]
1.30
-5
-10
-15
1.20
VCC = Float
1.10
1.00
VCC = 3.3V
0.90
0.80
VCC = 5V
0.70
0.60
-20
1.E+06
0.50
1.E+07
1.E+08
1.E+09
0.0
1.E+10
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
I/O DC Bias (V)
Frequency [Hz]
Capacitance vs. Frequency
2E-12
1.8E-12
1.6E-12
Capacitance [F]
1.4E-12
1.2E-12
1E-12
8E-13
6E-13
4E-13
2E-13
1.E+07
1.E+08
Lead-Free/Green SP3002
0
1.E+06
1.E+09
Frequency [Hz]
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
31
SP3002 Lead-Free/Green Series
Silicon Protection Arrays
TM
Low Capacitance ESD Protection Array
Application Example
+5V
D2+
D2+
Gnd
D2-
D26
5
4
SP300x-04
1
2
3
D1+
D1+
Gnd
D1HDMI
or DVI
Connector
D1HDMI
or DVI
Interface
IC
D0+
D0+
Gnd
D0-
D06
5
4
SP300x-04
1
2
3
Clk+
Clk+
Gnd
Clk-
Clk-
Gnd
ASIC HDMI/DVI drivers can also be protected with the
SP300x-04, the +VCC pins on the SP300x-04 can be
substituted with a suitable bypass capacitor or in some
backdrive applications the +VCC of the SP300x-04 can be
floated or NC.
HDMI or DVI application example for the Littelfuse
SP300x-04 protection devices. A single 4 channel
SP300x-04 device can be used to protect four of the data
lines in a HDMI/DVI interface. Two (2) SP300x-04 devices
provide protection for the main data lines. Low voltage
Soldering Parameters
Reflow Condition
Pre Heat
Pb – Free assembly
- Temperature Min (Ts(min))
150°C
- Temperature Max (Ts(max))
200°C
- Time (min to max) (ts)
60 – 180 secs
Average ramp up rate (Liquidus) Temp
(TL) to peak
3°C/second max
TS(max) to TL - Ramp-up Rate
3°C/second max
Reflow
- Temperature (TL) (Liquidus)
217°C
- Temperature (tL)
60 – 150 seconds
Peak Temperature (TP)
250+0/-5 °C
Time within 5°C of actual peak
Temperature (tp)
20 – 40 seconds
Ramp-down Rate
6°C/second max
Time 25°C to peak Temperature (TP)
8 minutes Max.
Do not exceed
260°C
SP3002 Lead-Free/Green Series
32
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Low Capacitance ESD Protection Array
Package Dimensions - SC70-6
e
6
Package
SC70-6
Pins
6
4
5
E
JEDEC
HE
MO-203 Issue A
Millimeters
3
2
1
B
D
A2 A
A1
C
Solder Pad Layout
Min
Max
Min
Max
A
0.80
1.10
0.031
0.043
A1
0.00
0.10
0.000
0.004
A2
0.70
1.00
0.028
0.039
B
0.15
0.30
0.006
0.012
c
0.08
0.25
0.003
0.010
D
1.85
2.25
0.073
0.089
E
1.15
1.35
0.045
0.053
e
L
Inches
0.65 BSC
0.026 BSC
HE
2.00
2.40
0.079
0.094
L
0.26
0.46
0.010
0.018
Product Characteristics
Part Numbering System
SP3002-04JTG
Silicon
Protection
Array
Series
Number of Channels
Lead Plating
Matte Tin
G= Green
Lead Material
Copper Alloy
T= Tape & Reel
Lead Coplanarity
0.0004 inches (0.102mm)
Subsitute Material
Silicon
Body Material
Molded Epoxy
Flammability
UL94-V-0
Package
J = SC70-6, 3000 quantity
-04 = 4 channel
Notes :
1. All dimensions are in millimeters
Part Marking System
2. Dimensions include solder plating.
3. Dimensions are exclusive of mold flash & metal burr.
E X4
EX4
Product Series
4. All specifications comply to JEDEC SPEC MO-223 Issue A
5. Blo is facing up for mold and facing down for trim/form, i.e. reverse trim/form.
Number of Channels
6. Package surface matte finish VDI 11-13.
E = SP3002 series
Assembly Site
(varies)
Ordering Information
Part Number
Package
Marking
Min. Order Qty.
SP3002-04JTG
SC70-6
EX4
3000
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
33
SP3002 Lead-Free/Green Series
Lead-Free/Green SP3002
e
Silicon Protection Arrays
TM
Low Capacitance ESD Protection Array
Embossed Carrier Tape & Reel Specification - SC70-6
Symbol
Min
Max
1.65
1.85
0.064
0.072
F
3.45
3.55
0.135
0.139
P2
1.95
2.05
0.076
0.080
D
1.40
1.60
0.055
0.062
D1
1.00
1.25
0.039
0.049
P0
3.90
4.10
0.153
0.161
40.0+/- 0.20
W
7.70
8.10
1.574+/-0.007
0.303
0.318
P
3.90
4.10
0.153
0.161
A0
2.14
2.34
0.084
0.092
B0
2.24
2.44
0.088
0.960
K0
1.12
1.32
0.044
0.052
t
34
Inches
Max
E
10P0
SP3002 Lead-Free/Green Series
Millimetres
Min
0.27 max
0.010 max
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Low Capacitance ESD Protection Array
Pb
RoHS
GREEN
SP3003 Lead-Free/Green Series
Description
The SP3003 has ultra low capacitance rail-to rail diodes
with an additional zener diode fabricated in a proprietary
silicon avalanche technology to protect each I/O pin
providing a high level of protection for electronic equipment
that may experience destructive electrostatic discharges
(ESD). These robust diodes can safely absorb repetitive
ESD strikes at the maximum level specified in the IEC
61000-4-2 international standard (Level 4, 8KV contact
discharge) without performance degradation. Their very low
loading capacitance also makes them ideal for protecting
high speed signal pins such as HDMI, DVI, USB2.0, and
IEEE 1394.
Pinout
Features
NC
SP3003-04X/J
I/O 1
GND
I/O 2
VCC
I/O 1
I/O 4
GND
VCC
I/O 2
I/O 3
t-PXDBQBDJUBODFPG
0.65pF (TYP) per I/O
t-PXMFBLBHFDVSSFOUPG
0.5μA (MAX) at 5V
t&4%QSPUFDUJPOPGœL7
contact discharge,
±15kV air discharge,
(IEC61000-4-2)
t4NBMMQBDLBHFTTBWF
board space (SC70,
SOT553, SOT563,
MSOP10)
t&'5QSPUFDUJPO
IEC61000-4-4, 40A
(5/50 ns)
SP3003-04A
I/O 1
NC
I/O 2
NC
Applications
GND
t $PNQVUFS1FSJQIFSBMT
t/FUXPSL)BSEXBSF1PSUT
I/O 3
NC
t.PCJMF1IPOFT
t5FTU&RVJQNFOU
I/O 4
NC
t1%"T
t.FEJDBM&RVJQNFOU
VCC
t%JHJUBM$BNFSBT
Functional Block Diagram
SP3003-02
SP3003-04
VCC
I/O1
I/O2
VCC
I/O4
I/O2
GND
I/O1
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
GND
I/O3
35
SP3003 Lead-Free/Green Series
Lead-Free/Green SP3003
SP3003-02X/J
Silicon Protection Arrays
TM
Low Capacitance ESD Protection Array
Absolute Maximum Ratings
Symbol
Parameter
Value
Units
2.5
A
Operating Temperature
-40 to 85
°C
Storage Temperature
-50 to 150
°C
IP
Peak Current (tp=8/20μs)
TOP
TSTOR
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Thermal Information
Parameter
Storage Temperature Range
Rating
Units
-65 to 150
°C
Maximum Junction Temperature
150
°C
Maximum Lead Temperature (Soldering 10s)
300
°C
Electrical Characteristics (TOP=25ºC)
Parameter
Symbol
Test Conditions
Min
Zener Breakdown Voltage
VBR
IR=10μA
6.0
Reverse Leakage Current
ILEAK
VR=5V
Clamp Voltage1
VC
ESD Withstand Voltage1
VESD
Diode Capacitance1
CI/O-GND
Diode Capacitance
CI/O-I/O
1
Typ
Max
Units
0.5
μA
V
IPP=1A, tp=8/20μs, Fwd
10.0
V
IPP=2A, tp=8/20μs, Fwd
11.8
V
IEC61000-4-2 (Contact)
±8
kV
IEC61000-4-2 (Air)
±15
kV
Reverse Bias=0V
0.80
pF
Reverse Bias=1.65V
0.65
pF
Reverse Bias=0V
0.35
pF
Note 1: Parameter is guaranteed by device characterization
SP3003 Lead-Free/Green Series
36
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Low Capacitance ESD Protection Array
Insertion Loss (S21) I/O to GND
Capacitance vs. Bias Voltage
1.00
1
0
0.95
0.90
-2
I/O Capacitance (pF)
Insertion Loss [dB]
-1
-3
-4
-5
-6
-7
0.85
0.80
VCC = Float
0.75
0.70
VCC = 3.3V
0.65
VCC = 5V
0.60
-8
0.55
-9
0.50
-10
1.E+06
1.E+07
1.E+08
1.E+09
0.0
1.E+10
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
I/O DC Bias (V)
Frequency [Hz]
Capacitance vs. Frequency
1.4E-12
Capacitance [F]
1.2E-12
1E-12
8E-13
6E-13
4E-13
Lead-Free/Green SP3003
2E-13
0
1.E+06
1.E+07
1.E+08
1.E+09
Frequency [Hz]
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
37
SP3003 Lead-Free/Green Series
Silicon Protection Arrays
TM
Low Capacitance ESD Protection Array
Application Example
+5V
D2+
D2+
Gnd
D2-
D26
5
4
SP300x-04
1
2
3
D1+
D1+
Gnd
D1HDMI
or DVI
Connector
D1HDMI
or DVI
Interface
IC
D0+
D0+
Gnd
D0-
D06
5
4
SP300x-04
1
2
3
Clk+
Clk+
Gnd
Clk-
ClkGnd
ASIC HDMI/DVI drivers can also be protected with the
SP300x-04, the +VCC pins on the SP300x-04 can be
substituted with a suitable bypass capacitor or in some
backdrive applications the +VCC of the SP300x-04 can be
floated or NC.
HDMI or DVI application example for the Littelfuse
SP300x-04 protection devices. A single 4 channel
SP300x-04 device can be used to protect four of the data
lines in a HDMI/DVI interface. Two (2) SP300x-04 devices
provide protection for the main data lines. Low voltage
Soldering Parameters
Reflow Condition
Pre Heat
Pb – Free assembly
- Temperature Min (Ts(min))
150°C
- Temperature Max (Ts(max))
200°C
- Time (min to max) (ts)
60 – 180 secs
Average ramp up rate (Liquidus) Temp
(TL) to peak
3°C/second max
TS(max) to TL - Ramp-up Rate
3°C/second max
Reflow
- Temperature (TL) (Liquidus)
217°C
- Temperature (tL)
60 – 150 seconds
Peak Temperature (TP)
250+0/-5 °C
Time within 5°C of actual peak
Temperature (tp)
20 – 40 seconds
Ramp-down Rate
6°C/second max
Time 25°C to peak Temperature (TP)
8 minutes Max.
Do not exceed
260°C
SP3003 Lead-Free/Green Series
38
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Low Capacitance ESD Protection Array
Package Dimensions — SC70-5
e
e
6
5
Package
Solder Pad Layout
4
not used
E
HE
SC70-5
Pins
5
JEDEC
MO-203 Issue A
Millimeters
3
2
1
Min
B
D
A2 A
A1
C
Min
Max
A
0.80
1.10
0.031
0.043
A1
0.00
0.10
0.000
0.004
A2
0.70
1.00
0.028
0.039
B
0.15
0.30
0.006
0.012
c
0.08
0.25
0.003
0.010
D
1.85
2.25
0.073
0.089
E
1.15
1.35
0.045
0.053
e
L
Inches
Max
0.65 BSC
0.026 BSC
HE
2.00
2.40
0.079
0.094
L
0.26
0.46
0.010
0.018
Package Dimensions — SC70-6
6
5
Solder Pad Layout
4
E
2
1
Package
SC70-6
Pins
6
JEDEC
HE
MO-203 Issue A
Millimeters
B
D
A2 A
A1
C
Max
Min
Max
A
0.80
1.10
0.031
0.043
A1
0.00
0.10
0.000
0.004
A2
0.70
1.00
0.028
0.039
B
0.15
0.30
0.006
0.012
c
0.08
0.25
0.003
0.010
D
1.85
2.25
0.073
0.089
E
1.15
1.35
0.045
0.053
e
L
Inches
Min
3
0.65 BSC
0.026 BSC
HE
2.00
2.40
0.079
0.094
L
0.26
0.46
0.010
0.018
Package Dimensions — SOT553
A
D
6
5
4
(not used)
2
3
e
E
Package
L
HE
SOT 553
Pins
Solder Pad Layout
c
B
Min
Max
Min
Max
0.60
0.020
0.024
B
0.17
0.27
0.007
0.011
c
0.08
0.18
0.003
0.007
D
1.50
1.70
0.059
0.067
E
1.10
1.30
0.043
0.051
e
©2008 Littelfuse, Inc.
39
Inches
0.50
A
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
5
Millimeters
0.50 BSC
0.020 BSC
L
0.10
0.30
0.004
0.012
HE
1.50
1.70
0.059
0.067
SP3003 Lead-Free/Green Series
Lead-Free/Green SP3003
e
e
Silicon Protection Arrays
TM
Low Capacitance ESD Protection Array
Package Dimensions — SOT563
A
D
Package
L
SOT 563
Pins
6
5
4
E
2
Solder Pad Layout
HE
3
e
6
Millimeters
c
B
Inches
Min
Max
Min
Max
A
0.50
B
0.17
0.60
0.020
0.024
0.27
0.007
c
0.011
0.08
0.18
0.003
0.007
D
1.50
1.70
0.059
0.067
E
1.10
1.30
0.043
0.051
e
0.50 BSC
0.020 BSC
L
0.10
0.30
0.004
0.012
HE
1.50
1.70
0.059
0.067
Package Dimensions — MSOP10
Package
MSOP10
Pins
10
Millimeters
Solder Pad Layout
Max
Min
Max
A
-
1.10
-
0.043
A1
0.00
0.15
0.000
0.006
B
0.17
0.27
0.007
0.011
c
0.08
0.23
0.003
0.009
D
2.90
3.10
0.114
0.122
E
4.67
5.10
0.184
0.200
E1
2.90
3.10
0.114
0.122
e
HE
Part Numbering System
Inches
Min
0.50 BSC
0.40
0.80
0.020 BSC
0.016
0.032
Product Characteristics
SP3003-04 X T G
Silicon
Protection
Array
G= Green
T= Tape & Reel
Series
Package
Number of Channels
A = MSOP-10, 3000 quantity
J = SC70-5 or SC70-6, 3000 quantity
X = SOT553 or SOT563, 5000 quantity
-02 = 2 channel
(SC70-5, SOT553 packages)
-04 = 4 channel
(SC70-6, SOT563, MSOP-10 packages)
Lead Plating
Matte Tin
Lead Material
Copper Alloy
Lead Coplanarity
0.0004 inches (0.102mm)
Subsitute Material
Silicon
Body Material
Molded Epoxy
Flammability
UL94-V-0
Notes :
1. All dimensions are in millimeters
Part Marking System
2. Dimensions include solder plating.
3. Dimensions are exclusive of mold flash & metal burr.
XXX
XXX
4. All specifications comply to JEDEC SPEC MO-223 Issue A
Product Series
Number of Channels
(varies) F, H or P =
SP3003 series
(varies) 2 or 4
5. Blo is facing up for mold and facing down for trim/form, i.e. reverse trim/form.
6. Package surface matte finish VDI 11-13.
Assembly Site
(varies)
SP3003 Lead-Free/Green Series
40
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Low Capacitance ESD Protection Array
Ordering Information
Part Number
Package
Marking
Min. Order Qty.
SP3003-02JTG
SC70-5
FX2
3000
SP3003-02XTG
SOT553
FX2
5000
SP3003-04ATG
MSOP-10
FX4
3000
SP3003-04JTG
SC70-6
FX4
3000
SP3003-04XTG
SOT563
FX4
5000
Embossed Carrier Tape & Reel Specifications - SC70-5 and SC70-6
Millimetres
Inches
Max
Min
Max
E
1.65
1.85
0.064
0.072
F
3.45
3.55
0.135
0.139
P2
1.95
2.05
0.076
0.080
D
1.40
1.60
0.055
0.062
D1
1.00
1.25
0.039
0.049
P0
3.90
4.10
0.153
0.161
10P0
40.0+/- 0.20
1.574+/-0.007
W
7.70
8.10
0.303
0.318
P
3.90
4.10
0.153
0.161
A0
2.14
2.34
0.084
0.092
B0
2.24
2.44
0.088
0.960
K0
1.12
1.32
0.044
0.052
t
0.27 max
0.010 max
Millimetres
Inches
Embossed Carrier Tape & Reel Specifications - SOT553 and SOT563
Min
Max
Min
Max
E
1.65
1.85
0.064
0.072
F
3.45
3.55
0.135
0.139
P2
1.95
2.05
0.076
0.080
D
1.40
1.60
0.055
0.062
D1
0.45
0.55
0.017
0.021
P0
3.90
4.10
0.153
0.161
10P0
©2008 Littelfuse, Inc.
41
1.574+/-0.007
W
7.70
8.10
P
3.90
4.10
0.153
0.161
A0
1.73
1.83
0.068
0.072
0.303
0.318
B0
1.73
1.83
0.068
0.072
K0
0.64
0.74
0.025
0.029
t
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
40.0+/- 0.20
0.22 max
0.008 max
SP3003 Lead-Free/Green Series
Lead-Free/Green SP3003
Min
Silicon Protection Arrays
TM
Low Capacitance ESD Protection Array
Embossed Carrier Tape & Reel Specification - MSOP-10
Millimetres
Min
Max
Min
Max
E
1.65
1.85
0.064
0.072
F
5.40
5.60
0.212
0.220
D
1.50
1.60
0.059
0.062
4.10
0.153
D1
P0
10P0
42
1.50 Min
3.90
0.059 Min
40.0+/- 0.20
0.161
1.574+/-0.007
W
11.90
12.10
0.468
0.476
P
7.90
8.10
0.311
0.318
A0
5.20
5.40
0.204
0.212
B0
3.20
3.40
0.125
0.133
K0
1.20
1.40
0.047
0.055
t
SP3003 Lead-Free/Green Series
Inches
0.30 +/- 0.05
0.011+/- 0.001
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Low Capacitance ESD Protection Array
RoHS
Pb
GREEN
SP3004 Lead-Free/Green Series
Scheduled for Release Q3/2008
Description
The SP3004 has ultra low capacitance rail-to rail diodes
with an additional zener diode fabricated in a proprietary
silicon avalanche technology to protect each I/O pin
providing a high level of protection for electronic equipment
that may experience destructive electrostatic discharges
(ESD). These robust diodes can safely absorb repetitive
ESD strikes at the maximum level (Level 4) specified in the
IEC 61000-4-2 international standard without performance
degradation. Their very low loading capacitance also makes
them ideal for protecting high speed signal pins such as
HDMI, DVI, USB2.0, and IEEE 1394.
Pinout
Features
I/O 1
I/O 4
GND
VCC
I/O 2
I/O 3
t-PXMFBLBHFDVSSFOUPG
0.5μA (MAX) at 5V
t&4%QSPUFDUJPOPGœL7
contact discharge,
±15kV air discharge,
(IEC61000-4-2)
t4NBMM405QBDLBHF
saves board space
t&'5QSPUFDUJPO*&$
4-4, 40A (5/50 ns)
Applications
I/O4
VCC
t$PNQVUFS1FSJQIFSBMT
t/FUXPSL)BSEXBSF1PSUT
t.PCJMF1IPOFT
t5FTU&RVJQNFOU
t1%"T
t.FEJDBM&RVJQNFOU
t%JHJUBM$BNFSBT
I/O1
GND
I/O3
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
43
SP3004 Lead-Free/Green Series
Lead-Free/Green SP3004
Functional Block Diagram
I/O2
t-PXDBQBDJUBODFPG
0.85pF (TYP) per I/O
Silicon Protection Arrays
TM
Low Capacitance ESD Protection Array
Absolute Maximum Ratings
Symbol
Parameter
Value
Units
4
A
Operating Temperature
-40 to 85
°C
Storage Temperature
-50 to 150
°C
IP
Peak Current (tp=8/20μs)
TOP
TSTOR
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Thermal Information
Parameter
Rating
Storage Temperature Range
Units
-65 to 150
°C
Maximum Junction Temperature
150
°C
Maximum Lead Temperature (Soldering 10s)
300
°C
Electrical Characteristics (TOP=25ºC)
Symbol
Test Conditions
Min
Zener Breakdown Voltage
Parameter
VBR
IR=10μA
6.0
Reverse Leakage Current
ILEAK
VR=5V
Clamp Voltage1
ESD Withstand Voltage1
VC
VESD
Diode Capacitance1
CI/O-GND
Diode Capacitance1
CI/O-I/O
Typ
Max
Units
V
0.5
μA
IPP=1A, tp=8/20μs, Fwd
10.0
V
IPP=2A, tp=8/20μs, Fwd
11.8
V
IEC61000-4-2 (Contact)
±12
kV
IEC61000-4-2 (Air)
±15
kV
Reverse Bias=0V
1.1
pF
Reverse Bias=1.65V
0.85
pF
Reverse Bias=0V
0.5
pF
Note : 1 Parameter is guaranteed by device characterization
SP3004 Lead-Free/Green Series
44
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Low Capacitance ESD Protection Array
Insertion Loss (S21) I/O to GND
Capacitance vs. Bias Voltage
1.50
0
1.40
I/O Capacitance (pF)
Insertion Loss [dB]
1.30
-5
-10
-15
1.20
VCC = Float
1.10
1.00
VCC = 3.3V
0.90
0.80
VCC = 5V
0.70
0.60
0.50
-20
1.E+06
1.E+07
1.E+08
1.E+09
0.0
1.E+10
Frequency [Hz]
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
I/O DC Bias (V)
Capacitance vs. Frequency
2E-12
1.8E-12
1.6E-12
Capacitance [F]
1.4E-12
1.2E-12
1E-12
8E-13
6E-13
4E-13
2E-13
0
1.E+07
1.E+08
1.E+09
Lead-Free/Green SP3004
1.E+06
Frequency [Hz]
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
45
SP3004 Lead-Free/Green Series
Silicon Protection Arrays
TM
Low Capacitance ESD Protection Array
Application Example
+5V
D2+
D2+
Gnd
D2-
D26
5
4
SP300x-04
1
2
3
D1+
D1+
Gnd
D1HDMI
or DVI
Connector
D1HDMI
or DVI
Interface
IC
D0+
D0+
Gnd
D0-
D06
5
4
SP300x-04
1
2
3
Clk+
Clk+
Gnd
Clk-
ClkGnd
voltage ASIC HDMI/DVI drivers can also be protected with
the SP300x-04, the +VCC pins on the SP300x-04 can be
substituted with a suitable bypass capacitor or in some
backdrive applications the +VCC of the SP300x-04 can be
floated or NC.
HDMI or DVI application example for the Littelfuse
SP300x-04 protection devices. A single 4 channel
SP300x-04 device can be used to protect four of the
data lines in a HDMI/DVI interface. Two (2) SP300x-04
devices provide protection for the main data lines. Low
Soldering Parameters
Reflow Condition
Pre Heat
Pb – Free assembly
- Temperature Min (Ts(min))
150°C
- Temperature Max (Ts(max))
200°C
- Time (min to max) (ts)
60 – 180 secs
Average ramp up rate (Liquidus) Temp
(TL) to peak
3°C/second max
TS(max) to TL - Ramp-up Rate
3°C/second max
Reflow
- Temperature (TL) (Liquidus)
217°C
- Temperature (tL)
60 – 150 seconds
Peak Temperature (TP)
250+0/-5 °C
Time within 5°C of actual peak
Temperature (tp)
20 – 40 seconds
Ramp-down Rate
6°C/second max
Time 25°C to peak Temperature (TP)
8 minutes Max.
Do not exceed
260°C
SP3004 Lead-Free/Green Series
46
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Low Capacitance ESD Protection Array
Package Dimensions - SOT563
A
Package
L
SOT 563
Pins
6
5
4
Solder Pad Layout
E
2
6
Millimeters
HE
3
Max
Min
Max
0.50
0.60
0.020
0.024
B
0.17
0.27
0.007
0.011
c
0.08
0.18
0.003
0.007
D
1.50
1.70
0.059
0.067
E
1.10
1.30
0.043
0.051
A
e
c
B
e
Part Numbering System
Silicon
Protection
Array
0.30
0.004
0.012
HE
1.50
1.70
0.059
0.067
Matte Tin
G= Green
Lead Material
Copper Alloy
T= Tape & Reel
Lead Coplanarity
0.0004 inches (0.102mm)
Subsitute Material
Silicon
Body Material
Molded Epoxy
Flammability
UL94-V-0
X = SOT563, 5000 quantity
-04 = 4 channel
0.020 BSC
0.10
Lead Plating
Package
Number of Channels
0.50 BSC
L
Product Characteristics
SP3004-04X T G
Series
Inches
Min
Part Marking System
Notes :
1. All dimensions are in millimeters
GX 4
2. Dimensions include solder plating.
3. Dimensions are exclusive of mold flash & metal burr.
GX4
Product Series
Number of Channels
4. All specifications comply to JEDEC SPEC MO-223 Issue A
G = SP3004 series
5. Blo is facing up for mold and facing down for trim/form, i.e. reverse trim/form.
Assembly Site
6. Package surface matte finish VDI 11-13.
(varies)
Ordering Information
Part Number
Package
Marking
Min. Order Qty.
SP3004-04XTG
SOT563
GX4
5000
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
47
SP3004 Lead-Free/Green Series
Lead-Free/Green SP3004
D
Silicon Protection Arrays
TM
Low Capacitance ESD Protection Array
Embossed Carrier Tape & Reel Specification - SOT563
Millimetres
Min
Max
1.65
1.85
0.064
0.072
F
3.45
3.55
0.135
0.139
P2
1.95
2.05
0.076
0.080
D
1.40
1.60
0.055
0.062
D1
0.45
0.55
0.017
0.021
P0
3.90
4.10
0.153
0.161
40.0+/- 0.20
W
7.70
8.10
1.574+/-0.007
0.303
0.318
P
3.90
4.10
0.153
0.161
A0
1.73
1.83
0.068
0.072
B0
1.73
1.83
0.068
0.072
K0
0.64
0.74
0.025
0.029
t
48
Min
E
10P0
SP3004 Lead-Free/Green Series
Inches
Max
0.22 max
0.008 max
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Surface Mount TVS Avalanche Diode Array
RoHS
SP050xBA Lead-Free/Green Series
Pb GREEN
Description
The surface mount family of arrays are designed to
suppress ESD and other transient overvoltage events.
These arrays are used to meet the International
Electrotechnical Compatibility (IEC transient immunity
standards IEC 61000-4-2 for Electrostatic Discharge
Requirements). The series are used to help protect
sensitive digital or analog input circuits on data, signal, or
control lines with voltage levels up to 5VDC.
The monolithic silicon arrays are comprised of specially
designed structures for transient voltage suppression(TVS).
The size and shape of these structures have be tailored
for transient protection. The low capacitance and clamp
voltage are ideal for high speed signal line protection.
Pinout
SP0502BAHTG
SP0502BAJTG
SP0503BAHTG
1
4
1
3
SP0504BAHTG
SP0504BAJTG
1
Features
5
t "O"SSBZPGPS574"WBMBODIF%JPEFTJOBVMUSB
small SC70, SOT-23, SOT-143, MSOP or TSSOP packages
t &4%$BQBCJMJUZ4UBOEBSET
2
- IEC 61000-4-2, Direct Discharge ........ 20kV (Level 4)
- IEC 61000-4-2, Air Discharge .............. 30kV (Level 4)
2
2
3
4
3
- MIL STD 883 3015.7 ..........................................30kV
t *OQVU1SPUFDUJPOGPS"QQMJDBUJPOT6QUP7%$
1
6
2
5
3
4
SP0504BAATG
8
7
6
5
t 'BTU3FTQPOTF5JNF ..................................................<1ns
SP0506BAATG
8
7
6
5
t -PX*OQVU$BQBDJUBODF...................................30pF Typical
t 0QFSBUJOH5FNQFSBUVSF3BOHF..................... -40ºC to 85ºC
Applications
t .PCJMFQIPOFIBOETFUT
1
2
3
4
1
2
3
t 1FSTPOBM%JHJUBM
Assistants (PDA)
4
t 1PSUBCMFIBOEIFME
equipment (Laptop,
Palmtop computers)
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
49
t $PNQVUFSQPSULFZCPBSE
(USB1.1)
t %JHJUBMTUJMMDBNFSBT
t %JHJUBMWJEFPDBNFSBT
t .1QMBZFST
SP050xBA Lead-Free/Green Series
Lead-Free/Green SP050xBA
SP0505BAHTG
SP0505BAJTG
Silicon Protection Arrays
TM
Surface Mount TVS Avalanche Diode Array
Absolute Maximum Ratings
Parameter
Storage Temperature Range
Package Power Dissipation
SC70
SOT23-3, SOT23-5, SOT23-6, SOT143
TSSOP, MSOP
Electrical Characteristics
Rating
-65 to + 150
Units
ºC
0.2
0.225
0.5
W
W
W
TA = +25ºC, Unless Otherwise Specified
Parameter
Test Conditions
Min
Typ
Max
Units
Reverse Standoff Voltage
I = 10μA
5.5
-
-
V
Reverse Standoff Leakage Current
V = 5.0V
1
100
nA
Signal Clamp Voltage
Positive
I = 10mA
5.6
6.8
8
V
Negative
I = 10mA
-1.2
-0.8
-0.4
V
Clamp Voltage during ESD
MIL-STD-883 Method 3015 (HBM) test
+ 8kV
12
V
- 8kV
-8
V
ESD Test Level (1)
IEC-61000-2, Contact discharge
20
kV
MIL-STD-883 Method 3015 (HBM)
30
kV
Capacitance
2.5V @ 1Mhz
Turn on/off Time
30
pF
<1
ns
Temperature Range
Operating
-40
85
ºC
Storage
-65
150
ºC
Diode Dynamic Resistance
Forward Conduction
1.0
Ω
Reverse Conduction
1.4
Ω
Note:
(1) ESD voltage applied between channel pins and ground, one pin at a time; all other channel pins are open; all ground pins are grounded.
SP050xBA Lead-Free/Green Series
50
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Surface Mount TVS Avalanche Diode Array
Typical Input VI Characteristics
Typical Diode Capacitance vs. Reverse Voltage
(Pulse-mode measurements, pulse width = 0.7 mS nominal)
60
1.6
1.4
1.2
Diode Capacitance (pF)
1.0
Input Current (A)
0.8
0.6
0.4
0.2
0.0
-0.2
-0.4
-0.6
40
20
-0.8
-1.0
-1.2
-1.4
-1.6
0
-3
-2
-1
0
1
2
3
4
5
6
7
8
9
0
Input Voltage (V)
1
2
3
4
5
Diode Reverse Voltage (V)
Soldering Parameters - Wave Soldering
Pre Heat
Pb – Free assembly
- Temperature Min (Ts(min))
150°C
- Temperature Max (Ts(max))
200°C
- Time (min to max) (ts)
60 – 180 secs
Average ramp up rate (Liquidus) Temp
(TL) to peak
5°C/second max
TS(max) to TL - Ramp-up Rate
5°C/second max
Reflow
- Temperature (TL) (Liquidus)
- Temperature (tL)
217°C
60 – 150 seconds
Peak Temperature (TP)
250+0/-5 °C
Time within 5°C of actual peak
Temperature (tp)
20 – 40 seconds
Ramp-down Rate
5°C/second max
Time 25°C to peak Temperature (TP)
8 minutes Max.
Do not exceed
260°C
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Lead-Free/Green SP050xBA
Reflow Condition
51
SP050xBA Lead-Free/Green Series
Silicon Protection Arrays
TM
Surface Mount TVS Avalanche Diode Array
Package Dimensions - SC70
B
Package
Pins
JEDEC
3
502
1
SP0502BAJTG - SC70-3
HE
E
2
e
A
A1
A2
B
c
D
E
e
HE
L
e
D
A2 A
A1
C
SC70-3
3
MO-203 Issue A
Millimeters
Inches
Min
Max
Min
Max
0.80
1.10
0.031
0.043
0.00
0.10
0.00
0.004
0.70
1.00
0.028
0.039
0.15
0.30
0.006
0.012
0.08
0.25
0.003
0.010
1.85
2.25
0.073
0.089
1.15
1.35
0.045
0.053
0.66 BSC
0.026 BSC
2.00
2.40
0.079
0.094
0.26
0.46
0.010
0.018
L
5
4
SP0504BAJTG - SC70-5
504
1
Package
Pins
JEDEC
e
e
E HE
A
A1
A2
B
c
D
E
e
HE
L
3
2
B
D
A2 A
A1
c
SC70-5
5
MO-203 Issue A
Millimeters
Inches
Min
Max
Min
Max
0.80
1.10
0.03
0.043
0.00
0.10
0.00
0.004
0.70
1.00
0.028
0.039
0.15
0.30
0.006
0.012
0.08
0.25
0.003
0.010
1.85
2.25
0.073
0.089
1.15
1.35
0.045
0.053
0.65 BSC
0.026 BSC
2.00
2.40
0.079
0.094
0.26
0.46
0.010
0.018
L
6
Package
Pins
JEDEC
e
e
5
SP0505BAJTG - SC70-6
4
505
E
Recommended Pad Layout
HE
A
A1
A2
B
c
D
E
e
HE
L
M
N
O
P
R
S
T
O (REF)
1
2
3
R
B
+
+
+
D
T
A2 A
+
P
S (REF)
A1
c
+
+
M (REF)
+
N (REF)
L
SP050xBA Lead-Free/Green Series
52
SC70-6
6
MO-203 Issue A
Millimeters
Inches
Min
Max
Min
Max
0.80
1.10
0.031
0.043
0.00
0.10
0.00
0.004
0.70
1.00
0.028
0.039
0.15
0.30
0.006
0.012
0.08
0.25
0.003
0.010
1.85
2.25
0.073
0.089
1.15
1.35
0.045
0.053
0.65 BSC
0.026 BSC
2.00
2.40
0.079
0.094
0.26
0.46
0.010
0.018
1.60
0.063
1.30
0.052
0.65
0.026
0.70
0.058
0.35
0.014
0.90
0.035
2.50
0.098
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Surface Mount TVS Avalanche Diode Array
Package Dimensions - SOT23
Package
Pins
JEDEC
3
SP0502BAHT - SOT23-3
502B
1
E1
E
Recommended Pad Layout
A
A1
b
c
D
E
E1
e
e1
L1
M
N
O
P
2
e
e1
M
D
P
A
A1
N
0
C
L1
e1
5
4
504B
1
Recommended Pad Layout
E1 E
A
A1
b
c
D
E
E1
e
e1
L1
M
N
O
P
3
2
B
M
D
A
P
A1
N
c
O
L1
e
5
505B
1
2
SP0505BAHTG - SOT23-6
4
E1
E
Recommended Pad Layout
A
A1
b
c
D
E
E1
e
e1
L1
M
N
O
P
3
b
M
D
A
P
A1
N
O
c
L1
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
53
Inches
Min
Max
0.035
0.044
0.0004
0.004
0.012
0.020
0.003
0.008
0.110
0.120
0.083
0.104
0.047
0.055
0.95 BSC
1.90 BSC
0.54 REF
.090
.0375
.030TYP
.030TYP
SOT23-5
5
MO-178
Millimeters
Min
Max
1.45
0
0.15
0.3
0.5
0.08
0.22
2.75
3.05
2.6
3.0
1.45
1.75
0.95 BSC
1.90 BSC
0.60 REF
2.59
0.95
0.69
0.99
Package
Pins
JEDEC
e1
6
Millimeters
Min
Max
0.89
1.12
0.01
0.1
0.3
0.5
0.08
0.2
2.8
3.04
2.1
2.64
1.2
1.4
0.95 BSC
1.90 BSC
0.54 REF
2.29
0.95
0.78
0.78
Package
Pins
JEDEC
SP0504BAHTG - SOT23-5
e
SOT23-3
3
TO-236
Inches
Min
Max
0.057
0
0.006
0.012
0.020
0.003
0.009
0.108
0.120
0.102
0.118
0.057
0.069
0.95 BSC
1.90 BSC
0.60 REF
.102
.038
.027TYP
.039TYP
SOT23-6
6
MO-178
Millimeters
Min
Max
1.45
0
0.15
0.3
0.5
0.08
0.22
2.75
3.05
2.6
3.0
1.45
1.75
0.95 BSC
1.90 BSC
0.60 REF
2.59
0.95
0.69
0.99
Inches
Min
Max
0.057
0
0.006
0.012
0.020
0.003
0.009
0.108
0.120
0.102
0.118
0.057
0.069
0.95 BSC
1.90 BSC
0.60 REF
.102
0.038
.027TYP
.039TYP
SP050xBA Lead-Free/Green Series
Lead-Free/Green SP050xBA
b
Silicon Protection Arrays
TM
Surface Mount TVS Avalanche Diode Array
Package Dimensions - SOT143
e
Package
Pins
JEDEC
SP0503BAHTG - SOT143-4
3
4
Recommended Pad Layout
503B
E1
E
A
A1
b
b2
c
D
E
E1
e
e1
L
L1
0.80 (.032")
1.00 (.040")
2
1
e1
1.40 (.055")
MAX
2.20
3.40 (.134")
(.087")
3.60 (.140")
REF
D
1.90
(.075")
1.70
(.067")
A
BSC
b2
A1
b
1.00 (.040")
1.20 (.048")
c
0.80 (.032")
1.00 (.040")
L
SOT143-4
4
TO-253
Millimeters
Min
Max
0.08
1.22
0.05
0.15
0.30
0.50
0.76
0.89
0.08
0.20
2.80
3.04
2.10
2.64
1.20
1.40
1.92 BSC
0.20 BSC
0.4
0.6
0.550 REF
Inches
Min
Max
0.031
0.048
0.002
0.006
0.012
0.019
0.030
0.035
0.003
0.008
0.110
0.119
0.082
0.103
0.047
0.055
0.076 BSC
0.008 BSC
0.016
0.024
0.022 REF
L1
Package Dimensions - TSSOP
Package
Pins
D
SP0504BAATG - TSSOP-8
LF
E1
504 BA
E
D
E
E1
A
A1
B
C
L1
L2
A
A1
C
TSSOP-8
8
Millimeters
Min
Max
2.90
3.10
6.40 REF
4.29
4.50
1.194 REF
0.051
0.152
0.30
0.66
0.51
0.76
0.102
0.203
Inches
Min
.144
Max
.122
.252 REF
.17
.18
.047 REF
.002
0.006
.12TYP
.26TYP
.020
.030
.004
.008
B
L2
L1
Package Dimensions - MSOP
Package
Pins
D
SP0506BAATG - MSOP-8
LF
E
506 B
Recommended Pad Layout
E1
H
G
F1
F
A
A1
D
E
E1
A
A1
B
C
L1
L2
F
F1
G
H
I
I
C
B
L1
L2
SP050xBA Lead-Free/Green Series
54
MSOP-8
8
Millimeters
Min
Max
2.90
3.10
4.78
4.98
2.90
3.10
0.87
1.17
0.05
0.25
0.30TYP
0.65TYP
0.52
0.54
0.18TYP
5.28
4.24
0.65
0.38
1.04
Inches
Min
.144
.188
.114
.034
.002
.017
-
Max
.122
.196
.122
.046
0.10
.12TYP
.25TYP
.025
.007TYP
.208
.167
.0256
.015
.041
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Surface Mount TVS Avalanche Diode Array
Part Numbering System
Product Characteristics
SP0502 BAHT G
Blank = NOT Green/RoHS/Lead Free*
G= Green/RoHS/Lead Free Product
Silicon
Protection
Array
Series
T= Tape & Reel
Package
BAA = MSOP-8 or TSSOP-8, 2500 qty
BAH = SOT23-3, -5, -6 or
SOT143-4, 3000 qty
BAJ = SC70-3, -5 or -6, 3000 qty
Number of Channels
02 = 2 channel (SC70-3, SOT23 packages)
03 = 3 channel (SOT143 package)
04 = 4 channel (SC70-5, SOT23-5, TSSOP-8 packages)
05 = 5 channel (SC70-6, SOT23-6 packages)
06 = 6 channel (MSOP-8 package)
Lead Plating
“G” Green version - Matte Tin (Sn);
*Non-Green version - Tin Lead
Lead Material
Copper Alloy
Lead Coplanarity
0.004 inches (0.102mm)
Subsitute Material
Silicon
Body Material
Molded Epoxy
Flammability
UL94-V-0
Notes:
1. All dimensions are in millimeters.
2. Dimensions include solder plating.
3. Dimensions are exclusive of mold flash & metal burr.
4. All specifications comply to JEDEC SPEC MO-203 ISSUE A.
5. Blo is facing up for mold and facing down for trim/form, i.e. reverse trim/form.
6. Package surface matte finish VDI 11-13.
Ordering Information
Part Number
CH
Package Type
Quantity Per Reel
SP0502BAHTG
2
SOT23-3
3000
SP0503BAHTG
3
SOT143-4
3000
SP0504BAHTG
4
SOT23-5
3000
SP0505BAHTG
5
SOT23-6
3000
SP0504BAATG
4
TSSOP-8
2500
SP0506BAATG
6
MSOP-8
2500
SP0502BAJTG
2
SC70-3
3000
SP0504BAJTG
4
SC70-5
3000
SP0505BAJTG
5
SC70-6
3000
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
55
Lead-Free/Green SP050xBA
*NOTE: To order NON-Green/RoHS/Lead Free version of product, remove “G” at the end of part number.
SP050xBA Lead-Free/Green Series
Silicon Protection Arrays
TM
56
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Electronic Protection Array for ESD and Overvoltage Protection
SP720 Lead-Free/Green Series
Pb GREEN
RoHS
Description
The SP720 is an array of SCR/Diode bipolar structures for
ESD and over-voltage protection to sensitive input circuits.
The SP720 has 2 protection SCR/Diode device structures
per input. A total of 14 available inputs can be used to
protect up to 14 external signal or bus lines. Over-voltage
protection is from the IN (pins 1-7 and 9-15) to V+ or V-.
The SCR structures are designed for fast triggering at a
threshold of one +VBE diode threshold above V+ (Pin 16) or
a -VBE diode threshold below V- (Pin 8). From an IN input,
a clamp to V+ is activated if a transient pulse causes the
input to be increased to a voltage level greater than one
VBE above V+. A similar clamp to V- is activated if a negative
pulse, one VBE less than V-, is applied to an IN input.
Standard ESD Human Body Model (HBM) Capability is:
Pinout
SP720 (PDIP, SOIC)
TOP VIEW
IN 1
16 V+
IN 2
15 IN
IN 3
14 IN
IN 4
13 IN
IN 5
12 IN
- MIL STD 3015.7 ................................................. 15kV
IN 6
11 IN
- IEC 61000-4-2, Direct Discharge,
IN 7
10 IN
- Single Input .......................................... 4kV (Level 2)
9 IN
- Two Inputs in Parallel ............................ 8kV (Level 4)
V-
8
Features
t &4%*OUFSGBDF$BQBCJMJUZGPS)#.4UBOEBSET
- IEC 61000-4-2, Air Discharge ...............15kV (Level 4)
Functional Block Diagram
- IEC 61000-4-5 (8/20μs) ....................................... ±3A
- Single Pulse, 100μs Pulse Width ........................ ±2A
V+ 16
- Single Pulse, 4μs Pulse Width ............................ ±5A
t %FTJHOFEUP1SPWJEF0WFS7PMUBHF1SPUFDUJPO
- Single-Ended Voltage Range to ........................ +30V
IN
IN 1
2
3-7
9 - 15
- Differential Voltage Range to ............................ ±15V
t 'BTU4XJUDIJOH ..............................................2ns Risetime
IN
t -PX*OQVU-FBLBHFT .................................1nA at 25º (Typ)
t -PX*OQVU$BQBDJUBODF....................................... 3pF (Typ)
t "O"SSBZPG4$3%JPEF1BJST
t 0QFSBUJOH5FNQFSBUVSF3BOHF....................-40ºC to 105ºC
V-
8
Applications
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
57
t .JDSPQSPDFTTPS-PHJD
Input Protection
t "OBMPH%FWJDF*OQVU
Protection
t %BUB#VT1SPUFDUJPO
t 7PMUBHF$MBNQ
SP720 Lead-Free/Green Series
Lead-Free/Green SP720
t )JHI1FBL$VSSFOU$BQBCJMJUZ
Silicon Protection Arrays
TM
Electronic Protection Array for ESD and Overvoltage Protection
Absolute Maximum Ratings
Parameter
Continuous Supply Voltage, (V+) - (V-)
Forward Peak Current, IIN to VCC, IIN to GND (Refer to Figure 6)
Rating
Units
+35
V
±2A, 100μs
V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Note:
ESD Ratings and Capability - See Figure 1, Table 1
Load Dump and Reverse Battery (Note 2)
Thermal Information
Parameter
Rating
θJA
Thermal Resistance (Typical, Note 1)
Units
o
C/W
PDIP Package
90
o
C/W
SOIC Package
130
o
C/W
Maximum Storage Temperature Range
Maximum Junction Temperature (Plastic Package)
Maximum Lead Temperature (Soldering 10s)
(SOIC Lead Tips Only)
-65 to 150
o
C
150
o
C
300
o
C
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Characteristics
Parameter
Operating Voltage Range,
VSUPPLY = [(V+) - (V-)]
TA = -40oC to 105oC, VIN = 0.5VCC , Unless Otherwise Specified
Symbol
Test Conditions
VSUPPLY
Forward Voltage Drop:
Min
Typ
Max
Units
-
2 to 30
-
V
IIN = 1A (Peak Pulse)
IN to V-
VFWDL
-
2
-
V
IN to V+
VFWDH
-
2
-
V
IIN
-20
5
20
nA
IQUIESCENT
-
50
200
nA
Note 3
-
1.1
-
V
VFWD/IFWD; Note 3
-
1
-
Ω
Input Leakage Current
Quiescent Supply Current
Equivalent SCR ON Threshold
Equivalent SCR ON Resistance
Input Capacitance
CIN
-
3
-
pF
Input Switching Speed
tON
-
2
-
ns
Notes:
2. In automotive and battery operated systems, the power supply lines should be externally protected for load dump and everse battery V+ and V- pins are connected to the same supply
voltage source as the device or control line under protection, a current limiting resistor should be connected in series between the external supply and the SP720 supply pins to limit
reverse battery current to within the rated maximum limits. Bypass capacitors of typically 0.01μF or larger from the V+ and V- pins to ground are recommended.
3. Refer to the Figure 3 graph for definitions of equivalent “SCR ON Threshold” and “SCR ON Resistance.” These characteristics are given here for thumb-rule nformation to determine peak
current and dissipation under EOS conditions.
SP720 Lead-Free/Green Series
58
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Electronic Protection Array for ESD and Overvoltage Protection
ESD Capability
ESD capability is dependent on the application and defined
test standard. The evaluation results for various test
standards and methods based on Figure 1 are shown in
Table 1.
ELECTROSTATIC DISCHARGE TEST
CHARGE
SWITCH
For the “Modified” MIL-STD-3015.7 condition that is
defined as an “in-circuit” method of ESD testing, the V+
and V- pins have a return path to ground and the SP720
ESD capability is typically greater than 15kV from 100pF
through 1.5kΩ. By strict definition of MIL-STD-3015.7 using
“pin-to-pin” device testing, the ESD voltage capability
is greater than 6kV. The MIL-STD-3015.7 results were
determined from AT&T ESD Test Lab measurements.
CD
IN
DUT
IEC 1000-4-2: R 1 50 to 100M
MIL STD 3015.7: R 1 1 to 10M
ESD Test Conditions
STANDARD
MIL STD 3015.7
For ESD testing of the SP720 to EIAJ IC121 Machine
Model (MM) standard, the results are typically better than
1kV from 200pF with no series resistance.
IEC 61000-4-2
EIAJ IC121
RD
CD
±VD
Modified HBM
TYPE/MODE
1.5kΩ
100pF
15kV
Standard HBM
1.5kΩ
100pF
6kV
HBM, Air Discharge
330Ω
150pF
15kV
HBM, Direct Discharge
330Ω
150pF
4kV
HBM, Direct Discharge,
Two Parallel Input Pins
330Ω
150pF
8kV
0kΩ
200pF
1kV
Machine Model
High Current SCR Forward Voltage Drop Curve
2.5
TA = 25°C
SINGLE PULSE
FORWARD
W
SCR CURRENT (A)
80
60
40
20
0
TA = 25°C
SINGLE PULSE
2
1.5
1
I FWD
EQUIV.
V SAT.
A ON
THRESHOLD ~ 1.1V
V
V FWD
0.5
0
600
800
1000
0
1200
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
1
2
3
FORWARD SCR VOLTAGE DROP (V)
FORWARD
W
SCR VOLTAGE DROP (mV)
59
SP720 Lead-Free/Green Series
Lead-Free/Green SP720
Low Current SCR Forward Voltage Drop Curve
FORWARD
W
SCR CURRENT (mA)
DISCHARGE
SWITCH
H.V.
SUPPLY
VD
The HBM capability to the IEC 61000-4-2 standard is
greater than 15kV for air discharge (Level 4) and greater
than 4kV for direct discharge (Level 2). Dual pin capability (2
adjacent pins in parallel) is well in excess of 8kV (Level 4).
100
RD
R1
Silicon Protection Arrays
TM
Electronic Protection Array for ESD and Overvoltage Protection
Typical Application of the SP720
t"QQMJDBUJPOBTBO*OQVU$MBNQGPS0WFSWPMUBHFHSFBUFSUIBO7BE Above V+ or less than -1VBE below V-)
+VCC
+VCC
INPUT
DRIVERS
OR
SIGNAL
SOURCES
LINEAR OR
DIGITAL IC
INTERFACE
IN 1-7
TO +VCC
IN 9-15
V+
SP720
V-
SP720 INPUT
PROTECTION CIRCUIT
(1 OF 14 ON CHIP)
Peak Transient Current Capability for Long Duration Surges
of a single pin. For comparison, tests were run using dual
pin combinations 1+2, 3+4, 5+6, 7+9, 10+11, 12+13 and
14+15.
The peak transient current capability rises sharply as the
width of the current pulse narrows. Destructive testing
was done to fully evaluate the SP720’s ability to withstand
a wide range of transient current pulses. The circuit used to
generate current pulses is shown in Figure 5.
The overstress curve is shown in Figure 6 for a 15V supply
condition. The dual pins are capable of 10A peak current
for a 10μs pulse and 4A peak current for a 1ms pulse. The
complete for single pulse peak current vs. pulse width time
ranging up to 1 second are shown in Figure 6.
The test circuit of Figure 5 is shown with a positive pulse
input. For a negative pulse input, the (-) current pulse input
goes to an SP720 ‘IN’ input pin and the (+) current pulse
input goes to the SP720 V- pin. The V+ to V- supply of the
SP720 must be allowed to float. (i.e., It is not tied to the
ground reference of the current pulse generator.) Figure
6 shows the point of overstress as defined by increased
leakage in excess of the data sheet published limits.
TYPICAL SP720 PEAK CURRENT TEST CIRCUIT WITH A
VARIABLE PULSE WIDTH INPUT
+
VG
-
The maximum peak input current capability is dependent
on the V+ to V- voltage supply level, improving as the
supply voltage is reduced. Values of 0, 5, 15 and 30
voltages are shown. The safe operating range of the
transient peak current should be limited to no more than
75% of the measured overstress level for any given pulse
width as shown in Figure 6.
VARIABLE TIME DURATION
CURRENT PULSE GENERA TOR
R1
CURRENT
SENSE
(-)
(+)
1 IN
V+ 16
2 IN
IN 15
3 IN
IN 14
4 IN
VOLTAGE
PROBE
R 1 ~ 10 TYPICAL
VG ADJ. 10V/ATYPICAL
C1 ~ 100 F
When adjacent input pins are paralleled, the sustained
peak current capability is increased to nearly twice that
5 IN
SP720
IN 13
+
C1
-
IN 12
6 IN
IN 11
7 IN
IN 10
8 V-
IN 9
SP720 Typical Single Pulse Peak Current Curves
t4IPXJOHUIF.FBTVSFE1PJOUPG0WFSTUSFTTJO"NQFSFTWTQVMTFXJEUIUJNFJONJMMJTFDPOET5A = 25oC)
10
CAUTION: SAFE OPERATING CONDITIONS LIMIT
THE MAXIMUM PEAK CURRENT FOR A GIVEN
PULSE WIDTH TO BE NO GREATER THAN 75%
OF THE VALUES SHOWN ON EACH CURVE.
SINGLE PIN STRESS CURVES
DUAL PIN STRESS CURVE
9
PEAK CURRENT (A)
8
7
6
5
4
3
15V
0V
5V
30V
2
1
15V
V+ TOV-SUPPLY
0
0.001
SP720 Lead-Free/Green Series
0.01
0.1
1
60
10
100
100
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Electronic Protection Array for ESD and Overvoltage Protection
Soldering Parameters
Reflow Condition
Pre Heat
Pb – Free assembly
- Temperature Min (Ts(min))
150°C
- Temperature Max (Ts(max))
200°C
- Time (min to max) (ts)
60 – 180 secs
Average ramp up rate (Liquidus) Temp
(TL) to peak
5°C/second max
TS(max) to TL - Ramp-up Rate
5°C/second max
Reflow
- Temperature (TL) (Liquidus)
217°C
- Temperature (tL)
60 – 150 seconds
Peak Temperature (TP)
250+0/-5 °C
Time within 5°C of actual peak
Temperature (tp)
20 – 40 seconds
Ramp-down Rate
5°C/second max
Time 25°C to peak Temperature (TP)
8 minutes Max.
Do not exceed
260°C
Package Dimensions - Dual-In-Line Plastic Packages (PDIP)
E1
INDEX
AREA
1 2 3
N/2
Package
PDIP
Pins
16 Lead Dual-in-Line
JEDEC
E16.3 MS-001-BB Issue D
-B-
Inches
-AD
BASE
PLANE
A2
-C-
SEATING
PLANE
A
L
D1
e
B1
D1
eA
A1
B
CL
eC
0.010 (0.25) M C A B S
C
eB
NOTES
Notes:
1. Controlling Dimensions: INCH. in case of conflict between English and Metric
dimensions, the inch dimensions control.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No.
95.
4. Dimensions A, A1 and L are measured with the package seated in JE-DEC seating
plane gauge GS-3.
Millimeters
Min
Max
A
-
A1
0.015
E
Max
0.21
-
5.33
4
-
0.39
-
4
A2
0.115
0.195
2.93
4.95
-
B
0.014
0.022
0.356
0.558
-
B1
0.045
0.070
1.15
1.77
8, 10
C
0.008
0.014
0.204
0.355
-
D
0.735
0.775
18.66
19.68
5
D1
0.005
-
0.13
-
5
E
0.300
0.325
7.62
8.25
6
E1
0.240
0.280
6.10
7.11
5
e
0.100 BSC
5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or
protrusions shall not exceed 0.010 inch (0.25mm).
eA
0.300 BSC
6. E and eA are measured with the leads constrained to be perpendicular to datum -C- .
eB
-
L
0.115
7.
eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero
or greater.
8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall
not exceed 0.010 inch (0.25mm).
Notes
Min
N
16
2.54 BSC
-
7.62 BSC
6
0.430
-
0.150
2.93
16
10.92
7
3.81
4
9
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1
dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
61
SP720 Lead-Free/Green Series
Lead-Free/Green SP720
N
Silicon Protection Arrays
TM
Electronic Protection Array for ESD and Overvoltage Protection
Package Dimensions - Small Outline Plastic Packages (SOIC)
N
Package
INDEX
AREA
0.25(0.010) M
H
B M
E
-B-
SOIC
Pins
16
JEDEC
M16.15 (JEDEC MS-012-AC Issue C)
Inches
1
2
3
L
SEATING PLANE
-A-
h x 45o
A
D
-C-
μ
e
A1
C
B
0.10(0.004)
0.25(0.010) M C A M B S
Notes:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication
Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash,
protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side.
Millimeters
Notes
Min
Max
Min
Max
A
A1
B
C
D
E
0.0532
0.0040
0.013
0.0075
0.3859
0.1497
0.0688
0.0098
0.020
0.0098
0.3937
0.1574
1.35
0.10
0.33
0.19
9.80
3.80
1.75
0.25
0.51
0.25
10.00
4.00
9
3
4
e
H
h
L
N
0.050 BSC
0.2284
0.2440
0.0099
0.0196
0.016
0.050
16
1.27 BSC
5.80
6.20
0.25
0.50
0.40
1.27
16
5
6
7
μ
0º
8º
0º
8º
-
4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and
protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index feature must be
located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7.
“N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating
plane, shall not exceed a maximum value of 0.61mm (0.024 inch).
10. Controlling dimension:MILLIMETER. Converted inch dimensions are not necessarily
exact.
Part Numbering System
Product Characteristics
SP720ABTG
Silicon
Protection
Array
P=Lead Free
G = Green
TG= Tape and Reel / Green
Series
Package
AB = 16 Ld SOIC
AP = 16 Ld PDIP
See Ordering Information section for specific options available
Lead Plating
Matte Tin
Lead Material
Copper Alloy
Lead Coplanarity
0.004 inches (0.102mm)
Subsitute Material
Silicon
Body Material
Molded Epoxy
Flammability
UL94-V-0
Ordering Information
Package
Environmental
Informaton
-40 to 105
16 Ld PDIP
-40 to 105
16 Ld SOIC
-40 to 105
16 Ld SOIC
Tape and Reel
Part Number
Temp. Range (ºC)
SP720APP
SP720ABG
SP720ABTG
SP720 Lead-Free/Green Series
Marking
Min. Order
Lead-free
720APP
1500
Green
720ABG
1920
Green
720ABG
2500
62
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Electronic Protection Array for ESD and Overvoltage Protection
Pb
RoHS
SP721 Lead-Free/Green Series
Description
The SP721 is an array of SCR/Diode bipolar structures for
ESD and over-voltage protection to sensitive input circuits.
The SP721 has 2 protection SCR/Diode device structures
per input. There are a total of 6 available inputs that can be
used to protect up to 6 external signal or bus lines. Overvoltage protection is from the IN (Pins 1 - 3 and Pins 5 - 7)
to V+ or V-.
The SCR structures are designed for fast triggering at a
threshold of one +VBE diode threshold above V+ (Pin 8) or
a -VBE diode threshold below V- (Pin 4). From an IN input,
a clamp to V+ is activated if a transient pulse causes the
input to be increased to a voltage level greater than one
VBE above V+. A similar clamp to V- is activated if a negative
pulse, one VBE less than V-, is applied to an IN input.
Standard ESD Human Body Model (HBM) Capability is:
Pinout
SP721 (PDIP, SOIC)
TOP VIEW
IN
1
8
V+
IN
2
7
IN
Features
IN
3
6
IN
t &4%*OUFSGBDF$BQBCJMJUZGPS)#.4UBOEBSET
V-
4
5
IN
- MIL STD 3015.7 ................................................. 15kV
- IEC 61000-4-2, Direct Discharge,
- Single Input .......................................... 4kV (Level 2)
Functional Block Diagram
- Two Inputs in Parallel ............................ 8kV (Level 4)
- IEC 61000-4-2, Air Discharge ...............15kV (Level 4)
V+ 8
- IEC 61000-4-5 (8/20μs) ....................................... ±3A
- Single Pulse, 100μs Pulse Width ........................ ±2A
3, 5-7
IN
1
IN 2
- Single Pulse, 4μs Pulse Width ............................ ±5A
IN
t %FTJHOFEUP1SPWJEF0WFS7PMUBHF1SPUFDUJPO
- Single-Ended Voltage Range to ........................ +30V
- Differential Voltage Range to ............................ ±15V
t 'BTU4XJUDIJOH .............................................2ns Rise Time
t -PX*OQVU-FBLBHFT ............................1nA at 25ºC Typical
V- 4
t -PX*OQVU$BQBDJUBODF.....................................3pF Typical
t "O"SSBZPG4$3%JPEF1BJST
t 0QFSBUJOH5FNQFSBUVSF3BOHF....................-40ºC to 105ºC
Applications
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
63
t .JDSPQSPDFTTPS-PHJD
Input Protection
t "OBMPH%FWJDF*OQVU
Protection
t %BUB#VT1SPUFDUJPO
t 7PMUBHF$MBNQ
SP721 Lead-Free/Green Series
Lead-Free/Green SP721
t )JHI1FBL$VSSFOU$BQBCJMJUZ
Silicon Protection Arrays
TM
Electronic Protection Array for ESD and Overvoltage Protection
Absolute Maximum Ratings
Parameter
Continuous Supply Voltage, (V+) - (V-)
Forward Peak Current, IIN to VCC, IIN to GND (Refer to Figure 6)
Rating
+35
Units
V
±2A, 100μs
V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Note:
ESD Ratings and Capability (Figure 1, Table 1)
Load Dump and Reverse Battery (Note 2)
Thermal Information
Parameter
Rating
θJA
Thermal Resistance (Typical, Note 1)
Units
o
C/W
PDIP Package
160
o
C/W
SOIC Package
170
o
C/W
Maximum Storage Temperature Range
Maximum Junction Temperature (Plastic Package)
Maximum Lead Temperature (Soldering 10s)
(SOIC Lead Tips Only)
-65 to 150
o
C
150
o
C
300
o
C
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Characteristics
Parameter
Operating Voltage Range,
TA = -40oC to 105oC, VIN = 0.5VCC , Unless Otherwise Specified
Symbol
Test Conditions
VSUPPLY
Min
Typ
Max
Units
-
2 to 30
-
V
-
2
-
V
VSUPPLY = [(V+) - (V-)]
Forward Voltage Drop
IIN = 1A (Peak Pulse)
IN to V-
VFWDL
IN to V+
VFWDH
-
2
-
V
IIN
-20
5
+20
nA
IQUIESCENT
-
50
200
nA
Note 3
-
1.1
-
V
VFWD/IFWD; Note 3
-
1
-
W
Input Leakage Current
Quiescent Supply Current
Equivalent SCR ON Threshold
Equivalent SCR ON Resistance
Input Capacitance
CIN
-
3
-
pF
Input Switching Speed
tON
-
2
-
ns
Notes:
2. In automotive and battery operated systems, the power supply lines should be externally protected for load dump and reverse battery. When the V+ and V- Pins are connected to het same
supply voltage source as the device or control line under protection, a current limiti ng resistor should be connected in series between the external supply and the SP721 supply pins to
limit reverse battery current to within the rated maximum limits. Bypass capacitors of typically 0.01μF or larger romf the V+ and V- Pins to ground are recommended.
3. Refer to the Figure 3 graph for definitions of equivalent “SCR ON Threshold” and “SCR ON Resistance”. These characteristics are given here for thumb-rule nformation to determine peak
current and dissipation under EOS conditions.
SP721 Lead-Free/Green Series
64
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Electronic Protection Array for ESD and Overvoltage Protection
ESD Capability
ESD capability is dependent on the application and defined
test standard.The evaluation results for various test
standards and methods based on Figure 1 are shown in
Table 1.
ELECTROSTATIC DISCHARGE TEST
For the “Modified”MIL-STD-3015.7 condition that is defined
as an “in-circuit” method of ESD testing, the V+ and V- pins
have a return path to ground and the SP721 ESD capability
is typically greater than 15kV from 100pF through 1.5kΩ.By
strict definition of MIL-STD-3015.7 using “pin-to-pin”device
testing, the ESD voltage capability is greater than 6kV.The
MIL-STD-3015.7 results were determined from AT&T ESD
Test Lab measurements.
CHARGE
SWITCH
CD
IN
DUT
IEC 1000-4-2: R 1 50 to 100M
MIL-STD-3015.7: R 11 to 10M
ESD Test Conditions
STANDARD
MIL STD 3015.7
For ESD testing of the SP721 to EIAJ IC121 Machine
Model (MM) standard, the results are typically better than
1kV from 200pF with no series resistance.
IEC 61000-4-2
EIAJ IC121
TYPE/MODE
RD
CD
±VD
Modified HBM
1.5kΩ 100pF
Standard HBM
1.5kΩ 100pF
6kV
HBM, Air Discharge
330Ω
150pF
15kV
HBM, Direct Discharge
330Ω
150pF
4kV
HBM, Direct Discharge,
Two Parallel Input Pins
330Ω
150pF
8kV
0kΩ
200pF
1kV
Machine Model
15kV
High Current SCR Forward Voltage Drop Curve
2.5
FORWARD SCR CURRENT (A)
TA = 25ºC
SINGLE PULSE
80
60
40
20
TA = 25ºC
SINGLE PULSE
2
1.5
1
I FWD
EQUIV. SAT. ON
THRESHOLD ~ 1.1V
0.5
V FWD
0
0
600
800
1000
0
1200
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
1
2
3
FORWARD SCT VOLTAGE DROP (V)
FORWARD SCR VOLTAGE DROP (mV)
65
SP721 Lead-Free/Green Series
Lead-Free/Green SP721
Low Current SCR Forward Voltage Drop Curve
FORWARD SCR CURRENT (mA)
DISCHARGE
SWITCH
H.V.
SUPPLY
VD
The HBM capability to the IEC 61000-4-2 standard is
greater than 15kV for air discharge (Level 4) and greater
than 4kV for direct discharge (Level 2).Dual pin capability (2
adjacent pins in parallel) is well in excess of 8kV (Level 4).
100
RD
R1
Silicon Protection Arrays
TM
Electronic Protection Array for ESD and Overvoltage Protection
Typical Application of the SP721
t"QQMJDBUJPOBTBO*OQVU$MBNQGPS0WFSWPMUBHF(SFBUFSUIBO7BE Above V+ or less than -1VBE below V-)
+VCC
+VCC
INPUT
DRIVERS
OR
SIGNAL
SOURCES
LINEAR OR
DIGITAL IC
INTERFACE
IN 1 - 3
IN 5 - 7
TO +VCC
V+
SP721
V-
SP721 INPUT PROTECTION CIRCUIT (1 OF 6 SHO WN)
Peak Transient Current Capability of the SP721
The peak transient current capability rises sharply as the
width of the current pulse narrows. Destructive testing
was done to fully evaluate the SP721’s ability to withstand
a wide range of peak current pulses vs time. The circuit
used to generate current pulses is shown in Figure 5.
Note that adjacent input pins of the SP721 may be
paralleled to improve current (and ESD) capability. The
sustained peak current capability is increased to nearly
twice that of a single pin.
The test circuit of Figure 5 is shown with a positive pulse
input. For a negative pulse input, the (-) current pulse input
goes to an SP721 ‘IN’ input pin and the (+) current pulse
input goes to the SP721 V- pin. The V+ to V- supply of the
SP721 must be allowed to float. (i.e., It is not tied to the
ground reference of the current pulse generator.) Figure
6 shows the point of overstress as defined by increased
leakage in excess of the data sheet published limits.
TYPICAL SP721 PEAK CURRENT TEST CIRCUIT WITH A
VARIABLEPULSE WIDTH INPUT
+
VX
-
VARIABLE TIME DURATION
CURRENT PULSE GENERA TOR
R1
CURRENT
SENSE
(-)
(+)
1 IN
2 IN
The maximum peak input current capability is dependent
on the ambient temperature, improving as the temperature
is reduced. Peak current curves are shown for ambient
temperatures of 25ºC and 105ºC and a 15V power supply
condition. The safe operating range of the transient peak
current should be limited to no more than 75% of the
measured overstress level for any given pulse width as
shown in the curves of Figure 6.
VOLTAGE
PROBE
V+ 8
IN
7
3 IN
IN
6
4
IN
5
SP721
V-
+
C1
-
R 1 ~ 10 TYPICAL
VX ADJ. 10V/ATYPICAL
C1 ~ 100 F
SP721 Typical Single Pulse Peak Current Curves
t4IPXJOHUIF.FBTVSFE1PJOUPG0WFSTUSFTTJO"NQFSFTWTQVMTFXJEUIUJNFJONJMMJTFDPOET
PEAK CURRENT (A)
7
CAUTION: SAFE OPERATING CONDITIONS LIMIT
THE MAXIMUM PEAK CURRENT FOR A GIVEN
PULSE WIDTH TO BE NO GREATER THAN 75%
OF THE VALUES SHOWN ON EACH CURVE.
V+ TO V-SUPPLY = 15V
6
5
TA = 25°C
4
TA = 105°C
3
2
1
0
0.001
SP721 Lead-Free/Green Series
0.01
0.1
1
66
10
100
100
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Electronic Protection Array for ESD and Overvoltage Protection
Soldering Parameters
Reflow Condition
Pre Heat
Pb – Free assembly
- Temperature Min (Ts(min))
150°C
- Temperature Max (Ts(max))
200°C
- Time (min to max) (ts)
60 – 180 secs
Average ramp up rate (Liquidus) Temp
(TL) to peak
5°C/second max
TS(max) to TL - Ramp-up Rate
5°C/second max
Reflow
- Temperature (TL) (Liquidus)
217°C
- Temperature (tL)
60 – 150 seconds
Peak Temperature (TP)
250+0/-5 °C
Time within 5°C of actual peak
Temperature (tp)
20 – 40 seconds
Ramp-down Rate
5°C/second max
Time 25°C to peak Temperature (TP)
8 minutes Max.
Do not exceed
260°C
Package Dimensions - Dual-In-Line Plastic Packages (PDIP)
E1
INDEX
AREA
1 2 3
N/2
Package
PDIP
Pins
8 Lead Dual-in-Line
JEDEC
-BD
E
BASE
PLANE
A2
-C-
SEATING
PLANE
e
B1
D1
A
A1
A2
B
B1
C
D
D1
E
E1
e
eA
eB
L
N
CL
eA
A1
B
Min
A
L
D1
eC
0.010 (0.25) M C A B S
C
eB
Notes:
1. Controlling Dimensions: INCH. In case of conflict between English and Metric
dimensions, the inch dimensions control.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No.
95.
4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane
gauge GS-3.
5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or
protrusions shall not exceed 0.010 inch (0.25mm).
6. E and eA are measured with the leads constrained to be perpendicular to datum -C- .
7.
E8.3 MS-001-BA Issue D
Inches
-A-
eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero
or greater.
Millimeters
Max
0.210
0.015
0.115
0.195
0.014
0.022
0.045
0.070
0.008
0.014
0.355
0.400
0.005
0.300
0.325
0.240
0.280
0.100 BSC
0.300 BSC
0.430
0.115
0.150
8
Min
Max
5.33
0.39
2.93
4.95
0.356
0.558
1.15
1.77
0.204
0.355
9.01
10.16
0.13
7.62
8.25
6.10
7.11
2.54 BSC
7.62 BSC
10.92
2.93
3.81
8
Notes
4
4
8, 10
5
5
6
5
6
7
4
9
8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall
not exceed 0.010 inch (0.25mm).
9. N is t he maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1
dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
67
SP721 Lead-Free/Green Series
Lead-Free/Green SP721
N
Silicon Protection Arrays
TM
Electronic Protection Array for ESD and Overvoltage Protection
Package Dimensions - Small Outline Plastic Packages (SOIC)
N
INDEX
AREA
H
0.25(0.010) M
Package
SOIC
Pins
8
B M
E
JEDEC
-B1
2
3
M8.15 (JEDEC MS-012-AA Issue C)
Inches
L
Min
SEATING PLANE
-A-
h x 45o
A
D
-C-
μ
e
A1
B
C
0.10(0.004)
0.25(0.010) M C A M B S
Millimeters
Max
Min
Max
Notes
A
0.0532
0.0688
1.35
1.75
-
A1
0.0040
0.0098
0.10
0.25
-
B
0.013
0.020
0.33
0.51
9
C
0.0075
0.0098
0.19
0.25
-
D
0.1890
0.1968
4.80
5.00
3
E
0.1497
0.1574
3.80
4.00
4
Notes:
e
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication
Number 95.
H
0.2284
0.2440
5.80
6.20
-
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
h
0.0099
0.0196
0.25
0.50
5
3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash,
protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side.
L
0.016
0.050
0.40
1.27
6
4. Dimension “E” does not include interlead flash or protrusions. Inter-lead flash and
protrusions shall not exceed 0.25mm (0.010 inch) per side.
N
5. The chamfer on the body is optional. If it is not present, a visual index feature must be
located within the crosshatched area.
μ
0.050 BSC
1.27 BSC
8
-
8
0º
8º
0º
7
8º
-
6. “L” is the length of terminal for soldering to a substrate.
7.
“N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating
plane, shall not exceed a maximum value of 0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily
exact.
Part Numbering System
Product Characteristics
SP 721 AX X X
Silicon
Protection Array
G = Green
Series
P = Lead Free
T= Tape and Reel
Package
AB = 8 Ld SOIC
AP = 8 Ld PDIP
Lead Plating
Matte Tin
Lead Material
Copper Alloy
Lead Coplanarity
0.004 inches (0.102mm)
Subsitute Material
Silicon
Body Material
Molded Epoxy
Flammability
UL94-V-0
Ordering Information
Part Number
Temp. Range (ºC)
Package
Environmental
Informaton
Marking
Min. Order
SP721APP
-40 to 105
8 Ld PDIP
Lead-free
721APP
2000
SP721ABG
-40 to 105
8 Ld SOIC
Green
721AG
1960
SP721ABTG
-40 to 105
8 Ld SOIC Tape
and Reel
Green
721AG
2500
SP721 Lead-Free/Green Series
68
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Electronic Protection Array for ESD and Overvoltage Protection
Pb
RoHS
GREEN
SP723 Lead-Free/Green Series
Description
The SP723 is an array of SCR/Diode bipolar structures for
ESD and over-voltage protection of sensitive input circuits.
The SP723 has 2 protection SCR/Diode device structures
per input. There are a total of 6 available inputs that can be
used to protect up to 6 external signal or bus lines. Overvoltage protection is from the IN (Pins 1 - 3 and Pins 5 - 7)
to V+ or V-.
The SCR structures are designed for fast triggering at a
threshold of one +VBE diode threshold above V+ (Pin 8) or
a -VBE diode threshold below V- (Pin 4). From an IN input,
a clamp to V+ is activated if a transient pulse causes the
input to be increased to a voltage level greater than one
VBE above V+. A similar clamp to V- is activated if a negative
pulse, one VBE less than V-, is applied to an IN input.
Pinout
SP723 (PDIP, SOIC)
TOP VIEW
IN
1
8
V+
IN
2
7
IN
IN
3
6
IN
V-
4
5
IN
Refer to Fig 1 and Table 1 for further details. Refer to
Application Note AN9304 and AN9612 for further detail.
Features
t &4%*OUFSGBDFQFS)#.4UBOEBSET
- IEC 61000-4-2, Direct Discharge .......... 8kV (Level 4)
- IEC 61000-4-2, Air Discharge ...............15kV (Level 4)
Functional Block Diagram
- MIL-STD-3015.7 .................................................25kV
- IEC 61000-4-5 8/20μs Peak Pulse Current .......... ±7A
- Single Transient Pulse, 100s Pulse Width ........... ±4A
t %FTJHOFEUP1SPWJEF0WFS7PMUBHF1SPUFDUJPO
3, 5-7
IN
1
IN 2
- Single-Ended Voltage Range to ........................ +30V
IN
- Differential Voltage Range to ............................ ±15V
t 'BTU4XJUDIJOH ..............................................2ns Risetime
t -PX*OQVU-FBLBHFT ............................2nA at 25ºC Typical
t -PX*OQVU$BQBDJUBODF.....................................5pF Typical
V- 4
t "O"SSBZPG4$3%JPEF1BJST
t 0QFSBUJOH5FNQFSBUVSF3BOHF....................-40ºC to 105ºC
Applications
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
69
t .JDSPQSPDFTTPS-PHJD
Input Protection
t "OBMPH%FWJDF*OQVU
Protection
t %BUB#VT1SPUFDUJPO
t 7PMUBHF$MBNQ
SP723 Lead-Free/Green Series
Lead-Free/Green SP723
t 1FBL$VSSFOU$BQBCJMJUZ
V+ 8
Silicon Protection Arrays
TM
Electronic Protection Array for ESD and Overvoltage Protection
Absolute Maximum Ratings
Parameter
Continuous Supply Voltage, (V+) - (V-)
Forward Peak Current, IIN to VCC, IIN to GND (Refer to Figure 6)
Peak Pulse Current, 8/20μs
Rating
+35
Units
V
±4A, 100μs
V
±7A
V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Note:
ESD Ratings and Capability (Figure 1, Table 1)
Load Dump and Reverse Battery (Note 2)
Thermal Information
Parameter
Rating
θJA
Thermal Resistance (Typical, Note 1)
Units
o
C/W
PDIP Package
160
o
C/W
SOIC Package
170
o
C/W
Storage Temperature Range
Maximum Junction Temperature (Plastic Package)
Lead Temperature (Soldering 10s)
(SOIC Lead Tips Only)
-65 to 150
o
C
150
o
C
300
o
C
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Characteristics
Parameter
Operating Voltage Range,
VSUPPLY =[(V+)-(V-)]
TA = -40oC to 105oC, VIN = 0.5VCC , Unless Otherwise Specified
Symbol
Test Conditions
VSUPPLY
Min
Typ
Max
Units
-
2 to 30
-
V
-
2
-
V
Forward Voltage Drop
IIN=2A(Peak Pulse)
IN to V-
VFWDL
IN to V+
VFWDH
-
2
-
V
IIN
-20
5
20
nA
Input Leakage Current
Quiescent Supply Current
-
50
200
nA
Note 3
-
1.1
-
V
VFWD/IFWD; Note 3
-
0.5
-
Ω
IQUIESCENT
Equivalent SCR ON Threshod
Equivalent SCR ON Resistance
Input Capacitance
CIN
-
5
-
PF
Input Switching Speed
tON
-
2
-
ns
Notes:
2. In automotive ans battery operated systems, the power supply lines should be externally protected for load dump and reverse battery. When the V+ and V- Pins are connected to the same
supply voltage source as the device or control line under protection, acurrent limiting resistor should be connectied in series between the external supply and the SP723 supply pins to
limit reverse battery current to within the rated maximum limits. Bypass capacitors of typically 0.01μF or larger from the V+ and V- Pins to ground are recommended.
3. Refer to the Figure 3 graph for determine peak current and dessipation under EOS conditions.
SP723 Lead-Free/Green Series
70
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Electronic Protection Array for ESD and Overvoltage Protection
ESD Capability
ESD capability is dependent on the application and defined
test standard.The evaluation results for various test
standards and methods based on Figure 1 are shown in
Table 1.
ELECTROSTATIC DISCHARGE TEST
R1
CHARGE
SWITCH
The SP723 has a Level 4 HBM capability when tested as a
device to the IEC 61000-4-2 standard. Level 4 specifies a
required capability greater than 8kV for direct discharge and
greater than 15kV for air discharge.
CD
IN
DUT
IEC 1000-4-2: R 1 50 to 100M
MIL-STD-3015.7: R 1 1 to 10M
ESD Test Conditions
STANDARD
For the SP723 EIAJ IC121 Machine Model (MM) standard,
the ESD capability is typically greater than 2kV from 200pF
with no series resistance.
TYPE/MODE
IEC 1000-4-2 HBM, Air Discharge
(Level 4)
HBM, Direct Discharge
RD
CD
±VD
330 Ω
150pF
15kV
330 Ω
150pF
8kV
MIL-STD3015.7
Modified HBM
1.5k Ω
100pF
25kV
Standard HBM
1.5k Ω
100pF
10kV
EIAJ IC121
Machine Model
0k Ω
200pF
2kV
EIAJ IC121
Machine Model
0kΩ
200pF
1kV
High Current SCR Forward Voltage Drop Curve
5
TA = 25°C
SINGLE PULSE
FORWARD SCR CURRENT (A)
TA = 25ºC
SINGLE PULSE
160
120
80
40
0
4
3
2
I FWD
EQUIV. SAT. ON.
THRESHOLD ~ 1.1V
1
V FWD
0
600
800
1000
0
1200
FORWARD SCR VOLTAGE DROP (mV)
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
1
2
3
FORWARD SCR VOLTAGE DROP (V)
71
SP723 Lead-Free/Green Series
Lead-Free/Green SP723
Low Current SCR Forward Voltage Drop Curve
FORWARD SCT CURRENT (mA)
DISCHARGE
SWITCH
H.V.
SUPPLY
VD
For the “Modified” MIL-STD-3015.7 condition that is
defined as an “in-circuit” method of ESD testing, the V+
and V- pins have a return path to ground and the SP723
ESD capability is typically greater than 25kV from 100pF
through 1.5kΩ. By strict definition of MIL-STD-3015.7 using
“pin-to-pin” device testing, the ESD voltage capability is
greater than 10kV.
200
RD
Silicon Protection Arrays
TM
Electronic Protection Array for ESD and Overvoltage Protection
Typical Application of the SP723
t"QQMJDBUJPOBTBO*OQVU$MBNQGPS0WFSWPMUBHF(SFBUFSUIBO7BE Above V+ or less than -1VBE below V-)
+VCC
+VCC
INPUT
DRIVERS
OR
SIGNAL
SOURCES
LINEAR OR
DIGITAL IC
INTERFACE
IN 1 - 3
IN 5 - 7
TO +VCC
V+
SP723
V-
SP723 INPUT PROTECTION CIRCUIT (1 OF 6 SHO WN)
Peak Transient Current Capability of the SP723
The peak transient current capability rises sharply as the
width of the current pulse narrows. Destructive testing
was done to fully evaluate the SP723’s ability to withstand
a wide range of peak current pulses vs time. The circuit
used to generate current pulses is shown in Figure 5.
Note that adjacent input pins of the SP723 may be
paralleled to improve current (and ESD) capability. The
sustained peak current capability is increased to nearly
twice that of a single pin.
The test circuit of Figure 5 is shown with a positive pulse
input. For a negative pulse input, the (-) current pulse input
goes to an SP723 ‘IN’ input pin and the (+) current pulse
input goes to the SP723 V- pin. The V+ to V- supply of the
SP723 must be allowed to float. (i.e., It is not tied to the
ground reference of the current pulse generator.) Figure
6 shows the point of overstress as defined by increased
leakage in excess of the data sheet published limits.
TYPICAL SP723 PEAK CURRENT TEST CIRCUIT WITH A
VARIABLEPULSE WIDTH INPUT
-
VARIABLE TIME DURATION
CURRENT PULSE GENERA TOR
R1
+
VX
CURRENT
SENSE
(-)
(+)
2 IN
The maximum peak input current capability is dependent
on the ambient temperature, improving as the temperature
is reduced. Peak current curves are shown for ambient
temperatures of 25ºC and 105ºC and a 15V power supply
condition. The safe operating range of the transient peak
current should be limited to no more than 75% of the
measured overstress level for any given pulse width as
shown in the curves of Figure 6.
3 IN
VOLTAGE
PROBE
V+ 8
1 IN
4 V-
SP723
+
IN 7
IN 6
C1
-
IN 5
R 1 ~ 10 TYPICAL
VX ADJ. 10V/ATYPICAL
C1 ~ 100 F
SP723 Typical Single Pulse Peak Current Curves
t4IPXJOHUIF.FBTVSFE1PJOUPG0WFSTUSFTTJO"NQFSFTWTQVMTFXJEUIUJNFJONJMMJTFDPOET
PEAK CURRENT (A)
14
CAUTION: SAFE OPERATING CONDITIONS LIMIT
THE MAXIMUM PEAK CURRENT FOR A GIVEN
PULSE WIDTH TO BE NO GREATER THAN 75%
OF THE VALUES SHOWN ON EACH CURVE.
12
TA = 25°C
10
V+ TO V-SUPPLY = 15V
8
6
TA = 105°C
4
2
0
0.001
0.01
0.1
1
PULSE WIDTH TIME (
SP723 Lead-Free/Green Series
72
10
100
100
)
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Electronic Protection Array for ESD and Overvoltage Protection
Soldering Parameters
Reflow Condition
Pre Heat
Pb – Free assembly
- Temperature Min (Ts(min))
150°C
- Temperature Max (Ts(max))
200°C
- Time (min to max) (ts)
60 – 180 secs
Average ramp up rate (Liquidus) Temp
(TL) to peak
5°C/second max
TS(max) to TL - Ramp-up Rate
5°C/second max
Reflow
- Temperature (TL) (Liquidus)
217°C
- Temperature (tL)
60 – 150 seconds
Peak Temperature (TP)
250+0/-5 °C
Time within 5°C of actual peak
Temperature (tp)
20 – 40 seconds
Ramp-down Rate
5°C/second max
Time 25°C to peak Temperature (TP)
8 minutes Max.
Do not exceed
260°C
Package Dimensions - Dual-In-Line Plastic Packages (PDIP)
Package
E1
INDEX
AREA
1 2 3
N/2
-B-
Pins
8
JEDEC
E8.3 (JEDEC MS-001-BA Issue D)
Inches
-AD
E
BASE
PLANE
Min
A2
-C-
SEATING
PLANE
A
L
D1
e
B1
D1
CL
eA
A1
B
eC
0.010 (0.25) M C A B S
C
eB
Notes:
1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions,
the inch dimensions control.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No. 95.
4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane
gauge GS-3.
5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or
protrusions shall not exceed 0.010 inch (0.25mm).
6. E and eA are measured with the leads unconstrained to be perpendicular to datum
-C- .
7.
PDIP
eB and eC are measured at the lead tips with the leads uncon-strained. eC must be zero or
greater.
A
A1
A2
B
B1
C
D
D1
E
E1
e
eA
eB
L
N
Millimeters
Max
0.210
0.015
0.115
0.195
0.014
0.022
0.045
0.070
0.008
0.014
0.355
0.400
0.005
0.300
0.325
0.240
0.280
0.100 BSC
0.300 BSC
0.430
0.115
0.150
8
Min
Max
5.33
0.39
2.93
4.95
0.356
0.558
1.15
1.77
0.204
0.355
9.01
10.16
0.13
7.62
8.25
6.1
7.11
2.54 BSC
7.62 BSC
10.92
2.93
3.81
8
Notes
4
4
8, 10
5
5
6
5
6
7
4
9
8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not
exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1
dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
73
SP723 Lead-Free/Green Series
Lead-Free/Green SP723
N
Silicon Protection Arrays
TM
Electronic Protection Array for ESD and Overvoltage Protection
Package Dimensions - Small Outline Plastic Packages (SOIC)
N
INDEX
AREA
H
0.25(0.010) M
Package
SOIC
Pins
8
B M
E
JEDEC
-B-
M8.15 (JEDEC MS-012-AA Issue C)
Inches
1
2
3
-A-
h x 45o
A
D
-C-
μ
e
A1
B
C
0.10(0.004)
Max
Min
Max
A
0.0532
0.0688
1.35
1.75
A1
0.0040
0.0098
0.10
0.25
-
B
0.013
0.020
0.33
0.51
9
-
C
0.0075
0.0098
0.19
0.25
-
D
0.1890
0.1968
4.80
5.00
3
E
0.1497
0.1574
3.80
4.00
4
e
0.25(0.010) M C A M B S
Notes
Min
L
SEATING PLANE
Millimeters
0.050 BSC
1.27 BSC
-
Notes:
H
0.2284
0.2440
5.80
6.20
-
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication
Number 95.
h
0.0099
0.0196
0.25
0.50
5
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
L
0.016
0.050
0.40
1.27
6
3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash,
protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side.
N
4. Dimension “E” does not include interlead flash or protrusions. Inter-lead flash and
protrusions shall not exceed 0.25mm (0.010 inch) per side.
μ
8º
0º
8
8
0º
7
8º
-
5. The chamfer on the body is optional. If it is not present, a visual index feature must be
located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7.
“N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The eadl width “B”, as measured 0.36mm (0.014 inch) or greater above the seating
plane, shall not exceed a maximum value of 0.61mm (0.024 inch).
10. Controlling dimension:MILLIMETER. Converted inch dimensions are not necessarily
exact.
Part Numbering System
Product Characteristics
SP 723 AX X X
Silicon
Protection Array
G=Green
Series
P=Lead Free
T= Tape and Reel
Package
AB = 8 Ld SOIC
AP = 8 Ld PDIP
Lead Plating
Matte Tin
Lead Material
Copper Alloy
Lead Coplanarity
0.004 inches (0.102mm)
Subsitute Material
Silicon
Body Material
Molded Epoxy
Flammability
UL94-V-0
Ordering Information
Part Number
Temp. Range (ºC)
Package
Environmental
Informaton
Marking
Min. Order
SP723APP
-40 to 105
8 Ld PDIP
Lead-free
723APP
2000
SP723ABG
-40 to 105
8 Ld SOIC
Green
723AG
1960
SP723ABTG
-40 to 105
8 Ld SOIC Tape
and Reel
Green
723AG
2500
SP723 Lead-Free/Green Series
74
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
SCR Diode Array for ESD and Transient Overvoltage Protection
Pb
RoHS
SP724 Lead-Free/Green Series
Description
The SP724 is a quad array of transient voltage clamping
circuits designed to suppress ESD and other transient overvoltage events. The SP724 is used to help protect sensitive
digital or analog input circuits on data, signal, or control
lines operating on power supplies up to 20VDC.
The SP724 is comprised of bipolar SCR/diode structures
to protect up to four independent lines by clamping
transients of either polarity to the power supply rails. The
SP724 offers very low leakage (1nA Typical) and low input
capacitance (3pF Typical). Additionally, the SP724 is rated
to withstand the IEC 61000-4-2 ESD specification for both
contact and air discharge methods to level 4.
Pinout
I/O
V+
I/O
6
5
4
The SP724 is connected to the sensitive input line and its
associated power supply lines. Clamping action occurs
during the transient pulse, turning on the diode and fast
triggering SCR structures when the voltage on the input
line exceeds one VBE threshold above the V+ supply (or one
VBE threshold below the V- supply). Therefore, the SP724P
operation is unaffected by poor power supply regulation or
voltage fluctuations within its operating range.
SP724
(SOT-23)
TOP VIEW
1
2
3
I/O
V–
I/O
Features
t "O"SSBZPG4$3%JPEF1BJSTJO-FBE405
Functional Block Diagram
- IEC 61000-4-2, Direct Discharge .......... 8kV (Level 4)
- IEC 61000-4-2, Air Discharge ...............15kV (Level 4)
- MIL STD 3015.7 ................................................ >8kV
t *OQVU1SPUFDUJPOGPS"QQMJDBUJPOTXJUI1PXFS4VQQMJFT6Q
to +20V (Single-Ended Voltage), and ±10V (Differential
Voltage)
3, 4 AND 6
IN
1
IN
t 1FBL$VSSFOU$BQBCJMJUZ
- IEC 61000-4-5 (8/20μs) ....................................... ±3A
- Single Pulse, 100μs Pulse Width ..................... ±2.2A
V-
2
t -PX*OQVU-FBLBHF .......................................... 1nA Typical
Notes:
t -PX*OQVU$BQBDJUBODF.....................................3pF Typical
1. The design of the SP724 SCR/Diode ESD Protection Arrays are covered by Littelfuse
patent 4567500.
t 0QFSBUJOH5FNQFSBUVSF3BOHF....................-40ºC to 105ºC
2. The full ESD capability of the SP724 is achieved when wired in a circuit that includes
connection to both the V+ and V- pins. When handling individual devices, follow proper
procedures for electrostatic discharge.
Applications
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
75
t .JDSPQSPDFTTPS-PHJD
Input Protection
t "OBMPH%FWJDF*OQVU
Protection
t %BUB#VT1SPUFDUJPO
t 7PMUBHF$MBNQ
SP724 Lead-Free/Green Series
Lead-Free/Green SP724
t &4%$BQBCJMJUZQFS)#.4UBOEBSET
V+ 5
Silicon Protection Arrays
TM
SCR Diode Array for ESD and Transient Overvoltage Protection
Absolute Maximum Ratings
Parameter
Continuous Supply Voltage, (V+) - (V-)
Forward Peak Current, IIN to VCC , GND
(Refer to Figure 6)
Rating
+20
Units
V
±2.2A, 100μs
V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Note :
ESD Ratings and Capability - See Figure 1, Table 1
Thermal Information
Parameter
Rating
θJA
Thermal Resistance (Typical, Note 3)
SOT Package
Units
o
C/W
220
Maximum Storage Temperature Range
o
C/W
-65 to 150
o
C
150
o
C
300
o
C
Maximum Junction Temperature
Maximum Lead Temperature (Soldering 10s)
(SOT - Lead Tips Only)
Note: 3. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Characteristics
TA = -40oC to 105oC, VIN = 0.5VCC , Unless Otherwise Specified
Parameter
Operating Voltage Range,
VSUPPLY = [(V+) - (V-)] (Notes 4, 5)
Symbol
Test Conditions
Min
Typ
Max
Units
1
-
20
V
-
2
-
V
VFWDH
-
2
-
V
IIN
-10
1
10
nA
VSUPPLY
Forward Voltage Drop
Forward Voltage Drop
IN to VIN to V+
Input Leakage Current
Quiescent Supply Current
VFWDL
IQUIESCENT
Equivalent SCR ON Threshold
Equivalent SCR ON Resistance
Input Capacitance
IIN = 1A (Peak Pulse)
V+ = 20V, V- = GND
-
-
100
nA
(Note 6)
-
1.1
-
V
VFWD/IFWD (Note 6)
-
1.0
-
Ω
-
3
-
pF
CIN
Notes:
4. In automotive and other battery charging systems, the SP724 power supply lines should be externally protected for load dump and reverse battery. When the V+ and V- Pins are connected
to the same supply voltage source as the device or control line under protection, a current limiting resistor should be connected in series between the external supply and the SP724
supply pins to limit reverse battery current to within the rated maximum limits.
5. Bypass capacitors of typically 0.01μF or larger should be connected closely between the V+ and V- Pins for all applications.
6. Refer to the Figure 3 graph for definitions of equivalent “SCR ON Threshold” and “SCR ON Resistance”. These characteristics are given here for information to determine peak current and
dissipation under EOS conditions.
SP724 Lead-Free/Green Series
76
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
SCR Diode Array for ESD and Transient Overvoltage Protection
ESD Capability
ESD rating is dependent on the defined test standard. The
evaluation results for various test standards and methods
based on Figure 1 are shown in Table 1.3
ELECTROSTATIC DISCHARGE TEST
R1
The SP724 has a Level 4 rating when tested to the IEC
61000-4-2 Human Body Model (HBM) standard and
connected in a circuit in which the V+ and V- pins have
a return path to ground. Level 4 specifies a required
capability greater than 8kV for direct discharge and greater
than 15kV for air discharge.
RD
CHARGE
SWITCH
DISCHARGE
SWITCH
CD
H.V.
SUPPLY
VD
IN
DUT
IEC 1000-4-2: R 1 50 to 100M
MIL STD 3015.7: R 1 1 to 10M
The “Modified” MIL-STD-3015.7 condition is defined as an
“in-circuit” method of ESD testing, the V+ and V- pins have
a return path to ground.The SP724 ESD capability is greater
than 8kV with 100pF discharged through 1.5kΩ. By strict
definition of the standard MIL-STD-3015.7 method using
“pin-to-pin” device testing, the ESD voltage capability is
greater than 2kV.
ESD Test Conditions
STANDARD
TYPE/MODE
RD
CD
±VD
330 Ω
150pF
15kV
HBM, Direct Discharge 330 Ω
Modified HBM
1.5k Ω
Standard HBM
1.5k Ω
150pF
100pF
100pF
8kV
8kV †
2kV
EIAJ IC121
Machine Model
0k Ω
200pF
400V
US ESD DS 5.3
Charged Device
Model
0k Ω
NA
3kV
HBM, Air Discharge
IEC 61000-4-2
(Level 4)
For the SP724 EIAJ IC121 Machine Model (MM) standard,
the ESD capability is typically greater than 1.8kV with
200pF discharged through 0kΩ.
MIL-STD-3015.7
The Charged Device model is based upon the selfcapacitance of the SOT-23 package through 0kΩ.
†Upper limit of laboratory test set.
High Current SCR Forward Voltage Drop Curve
5
TA = 25°C
TA = 25°C
SINGLE PULSE
SINGLE PULSE
FORWARD SCR CURRENT (A)
FORWARD SCR CURRENT (mA)
200
Lead-Free/Green SP724
Low Current SCR Forward Voltage Drop Curve
160
120
80
40
0
600
4
3
2
EQUIV. SAT. ON
THRESHOLD ~ 1.1V
1
0
800
1000
0
1200
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
1
2
3
FORWARD SCR VOLTAGE DROP (V)
FORWARD SCR VOLTAGE DROP (mV)
77
SP724 Lead-Free/Green Series
Silicon Protection Arrays
TM
SCR Diode Array for ESD and Transient Overvoltage Protection
Typical Application of the SP724
t"QQMJDBUJPOBTBO*OQVU$MBNQGPS0WFSWPMUBHF(SFBUFSUIBO7BE Above V+ or less than -1VBE below V-)
+VCC
+VCC
INPUT
DRIVERS
OR
SIGNAL
SOURCES
LINEAR OR
DIGITAL IC
INTERFACE
TO +VCC
IN 1, 3, 4 AND 6
V+
0.01 F
SP724
V-
SP724 INPUT PROTECTION CIRCUIT (1 OF 4 SHO WN)
Peak Transient Current Capability for Long Duration Surges
The peak transient current capability is inversely
proportional to the width of the current pulse. Testing was
done to fully evaluate the SP724’s ability to withstand long
duration current pulses using the circuit of Figure 5. Figure
6 shows the point of overstress as defined by increased
leakage in excess of the data sheet published limits.
The safe operating range of the transient peak current
should be limited to no more than 75% of the measured
overstress level for any given pulse width as shown in the
curve of Figure 6.
TYPICAL SP724 PEAK CURRENT TEST CIRCUIT WITH A
VARIABLE PULSE WIDTH INPUT
+
VX
VARIABLE TIME DURATION
CURRENT PULSE GENERA TOR
R1
CURRENT
SENSE
-
(-)
(+)
6
1
+
-
5
2
4
3
The test circuit of Figure 5 is shown with a positive pulse
input. For a negative pulse input, the (-) current pulse input
goes to an SP724 ‘IN’ input pin and the (+) current pulse
input goes to the SP724 V- pin. The V+ to V- supply of the
SP724 must be allowed to float. (i.e., It is not tied to the
ground reference of the current pulse generator.)
SP724
C1
VOLTAGE
PROBE
R 1 ~ 10 TYPICAL
VX ADJ. 10V/ATYPICAL
C 1 ~ 100 F
Note that two input pins of the SP724 may be paralleled to
improve current (and ESD) capability. The sustained peak
current capability is increased to nearly twice that of a
single pin.
SP724 Typical Nonrepetitive Peak Current Pulse Capability
t4IPXJOHUIF.FBTVSFE1PJOUPG0WFSTUSFTTJO"NQFSFTWTQVMTFXJEUIUJNFJONJMMJTFDPOET
8
NOTE: TO ENSURE SAFE OPERATION LIMIT
THE MAXIMUM PEAK CURRENT FOR A GIVEN
PULSE WIDTH TO BE NO GREATER THAN 75%
OF THE VALUES SHOWN.
TA = 25ºC
V+ TO V-SUPPLY = 15V
PEAK CURRENT (A)
7
6
5
4
3
2
1
0
0.001
0.01
0.1
1
10
100
10
SQUARE WAVE PULSE WIDTH (ms)
SP724 Lead-Free/Green Series
78
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
SCR Diode Array for ESD and Transient Overvoltage Protection
Soldering Parameters
Reflow Condition
Pre Heat
Pb – Free assembly
- Temperature Min (Ts(min))
150°C
- Temperature Max (Ts(max))
200°C
- Time (min to max) (ts)
60 – 180 secs
Average ramp up rate (Liquidus) Temp
(TL) to peak
5°C/second max
TS(max) to TL - Ramp-up Rate
5°C/second max
Reflow
- Temperature (TL) (Liquidus)
217°C
- Temperature (tL)
60 – 150 seconds
Peak Temperature (TP)
250+0/-5 °C
Time within 5°C of actual peak
Temperature (tp)
20 – 40 seconds
Ramp-down Rate
5°C/second max
Time 25°C to peak Temperature (TP)
8 minutes Max.
Do not exceed
260°C
Package Dimensions - Small Outline Transistor Plastic Packages (SOT23-6)
SOT23-6
Pins
6
JEDEC
MO-203 Issue A
Inches
Min
A
A1
A2
b
C
D
E
E1
e
e1
L
N
α
Notes:
1. Dimensioning and tolerances per ANSI 14.5M-1982.
2. Package conforms to EIAJ SC-74 (1992).
Max
0.057
0.036
0.000
0.0059
0.036
0.051
0.0138
0.0196
0.0036
0.0078
0.111
0.118
0.103
0.118
0.060
0.068
0.0374 Ref
0.0748 Ref
0.004
0.023
6
0º
10º
Millimeters
Min
Max
0.9
1.45
0
0.15
0.9
1.30
0.35
0.50
0.09
0.20
2.8
3.00
2.6
3.00
1.5
1.75
0.95 Ref
1.9 Ref
0.10
0.60
6
0º
10º
Notes
3
3
4, 5
6
-
3. Dimensions D and E1 are exclusive of mold flash, protrusions, or gate burrs.
4. Footlenth L measured at reference to seating plane.
5. “L” is the length of flat foot surface for soldering to substrate.
6. “N” is the number of terminal positions.
7.
Controling dimension: MILLIMETER. Converted inch dimensions are not necessarily
exact.
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
79
SP724 Lead-Free/Green Series
Lead-Free/Green SP724
Package
Silicon Protection Arrays
TM
SCR Diode Array for ESD and Transient Overvoltage Protection
Part Numbering System
Product Characteristics
SP 724 AH T G
“Green”
RoHS Compliant
Lead Plating
Matte Tin
Lead Material
Copper Alloy
Silicon Protection Array
Tape and Reel
Lead Coplanarity
0.004 inches (0.102mm)
Series
Package Type
AH: SOT-23
Subsitute Material
Silicon
Body Material
Molded Epoxy
Flammability
UL94-V-0
Notes:
1. All dimensions are in millimeters.
2. Dimensions include solder plating.
3. Dimensions are exclusive of mold flash & metal burr.
4. All specifications comply to JEDEC SPEC MO-203 ISSUE A.
5. Blo is facing up for mold and facing down for trim/form, i.e. reverse trim/form.
6. Package surface matte finish VDI 11-13.
Ordering Information
Part Number
Temp. Range (ºC)
Package
Marking
Min. Order Qty.
SP724AHTG
-40 to 105
Tape and Reel
724G
3000
Embossed Carrier Tape & Reel Specification -- SOT23-6
8mm TAPE AND REEL
ACCESS HOLE
1.5mm
DIA. HOLE
14.4mm
4.0mm
2.0mm
1.75mm
CL
8mm
13mm
4.0mm
180mm
60mm
SOT-23 (8mm POCKET PITCH)
8.4mm
USER DIRECTION OF FEED
PIN 1
GENERAL INFORMATION
1. 3000 PIECES PER REEL.
2. ORDER IN MULTIPLES OF FULL REELS ONL Y .
3. MEETS EIA-481 REVISION "A" SPECIFICA TIONS.
COVER TAPE
SP724 Lead-Free/Green Series
80
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
SCR Diode Array for ESD and Transient Overvoltage Protection
Pb
RoHS
SP725 Lead-Free/Green Series
GREEN
Description
The SP725 is an array of SCR/Diode bipolar structures for
ESD and overvoltage protection of sensitive input circuits.
The SP725 has 2 protection SCR/Diode device structures
per input. There are a total of 4 available inputs that can be
used to protect up to 4 external signal or bus lines. Overvoltage protection is from the IN (Pins 1 - 4) to V+ or V-.
The SCR structures are designed for fast triggering at a
threshold of one +VBE diode threshold above V+ (Pin 5,6)
or one –VBE diode threshold below V- (Pin 7,8). From an
IN input, a clamp to V+ is activated if a transient pulse
causes the input to be increased to a voltage level greater
than one VBE above V+. A similar clamp to V- is activated if
a negative pulse, one VBE less than V-, is applied to an IN
input.
Pinout
SP725
(SOIC)
In
1
8
V-
In
2
7
V-
In
3
6
V+
In
4
5
V+
Refer to Fig 1 and Table 1 for further details. Refer to
Application Note AN9304 and AN9612 for further detail.
Features
t &4%*OUFSGBDFQFS)#.4UBOEBSET
- IEC 61000-4-2, Direct Discharge .......... 8kV (Level 4)
- IEC 61000-4-2, Air Discharge ...............15kV (Level 4)
Functional Block Diagram
- MIL-STD-3015.7 .................................................25kV
V+
5, 6
- IEC 61000-4-5 8/20 μs Peak Pulse Current ..... ± 14 A
- Single Transient Pulse, 100 μs Pulse Width ...... ± 8 A
t %FTJHOFEUP1SPWJEF0WFS7PMUBHF1SPUFDUJPO
IN
1
IN 2
- Single-Ended Voltage Range to ........................ +30V
IN
3, 4
- Differential Voltage Range to ............................ ±15V
t 'BTU4XJUDIJOH ..............................................2ns Risetime
t -PX*OQVU-FBLBHFT ..........................5 nA at 25 ºC Typical
t -PX*OQVU$BQBDJUBODF....................................5 pF Typical
V7, 8
t "O"SSBZPG4$3%JPEF1BJST
t 0QFSBUJOH5FNQFSBUVSF3BOHF..................-40 ºC to 105 ºC
Applications
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
81
t .JDSPQSPDFTTPS-PHJD
Input Protection
t "OBMPH%FWJDF*OQVU
Protection
t %BUB#VT1SPUFDUJPO
t 7PMUBHF$MBNQ
SP725 Lead-Free/Green Series
Lead-Free/Green SP725
t 1FBL$VSSFOU$BQBCJMJUZ
Silicon Protection Arrays
TM
SCR Diode Array for ESD and Transient Overvoltage Protection
Absolute Maximum Ratings
Parameter
Continuous Supply Voltage, (V+) - (V-)
Forward Peak Current, IIN to VCC , IIN to GND
(Refer to Figure 6)
Peak Pulse Current, 8/20μs
ESD Ratings and Capability (Figure 1, Table 1)
Load Dump and Reverse Battery (Note 2)
Rating
+35
Units
V
± 8 A, 100 μs
V
± 14 A
V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Thermal Information
Parameter
Rating
θJA
Thermal Resistance (Typical, Note 1)
SOIC Package
170
Storage Temperature Range
Maximum Junction Temperature
Maximum Lead Temperature (Soldering 10s)
(SOIC - Lead Tips Only)
Electrical Characteristics
Parameter
Operating Voltage Range,
VSUPPLY = [(V+) - (V-)]
Forward Voltage Drop
IN to VIN to V+
Input Leakage Current
Quiescent Supply Current
Units
o
C/W
o
C/W
-65 to 150
o
C
150
o
C
300
o
C
TA = -40oC to 105oC, VIN = 0.5VCC , Unless Otherwise Specified
Symbol
Test Conditions
VSUPPLY
Min
Typ
Max
Units
-
2 to 30
-
V
-
2
-
V
VFWDH
-
2
-
V
IIN
-20
5
+20
nA
IQUIESCENT
-
50
200
nA
(Note 3)
-
1.1
-
V
VFWD/IFWD ; (Note 3)
-
0.5
-
Ω
5
-
pF
2
-
ns
VFWDL
Equivalent SCR ON Threshold
Equivalent SCR ON Resistance
Input Capacitance
CIN
Input Switching Speed
tON
IIN = 2A (Peak Pulse)
-
NOTES:
1. θ JA is measured with the component mounted on an evaluation PC board in free air
2. In automotive and battery operated systems, the power supply lines should be externally protected for load dump and reverse battery V+ and V- pins are connected to the same supply
voltage source as the device or control line under protection, a current limiting resistor should be connected in series between the external supply and the SP725 supply pins to limit
reverse battery current to within the rated maximum limits. Bypass capacitors of typically 0.01μF or larger from the V+ and V- pins to ground are recommended.
3. Refer to the Figure 3 graph for definitions of equivalent “SCR ON Threshold” and “SCR ON Resistance.” These characteristics are given here for thumb-rule information to determine peak
current and dissipation under EOS conditions.
SP725 Lead-Free/Green Series
82
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
SCR Diode Array for ESD and Transient Overvoltage Protection
ESD Capability
ESD capability is dependent on the application and defined
test standard.The evaluation results for various test
standards and methods based on Figure 1 are shown in
Table 1.
Figure 1: Electrostatic Discharge Test
R1
The SP725 has a Level 4 HBM capability when tested as a
device to the IEC 61000-4-2 standard. Level 4 specifies a
required capability greater than 8kV for direct discharge and
greater than 15kV for air discharge.
CHARGE
SWITCH
IN
DUT
ESD Test Conditions - Table 1
STANDARD
IEC 61000-4-2
(Level 4)
MIL-STD-3015.7
EIAJ IC121
TYPE/MODE
RD
CD
±VD
330 Ω
150pF
15kV
HBM, Direct Discharge
330 Ω
150pF
8kV
Modified HBM
1.5k Ω
100pF
25kV
Standard HBM
1.5k Ω
100pF
10kV
0k Ω
200pF
2kV
HBM, Air Discharge
Machine Model
Figure 3: High Current SCR Forward Voltage Drop Curve
5
TA = 25ºC
SINGLE PULSE
FORWARD SCR CURRENT (A)
160
120
80
40
0
TA = 25°C
SINGLE PULSE
4
3
2
I FWD
EQUIV. SAT. ON
THRESHOLD ~ 1.1V
1
V FWD
0
800
1000
1200
0
FORWARD SCRVOLTAGE DROP (mV)
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
1
2
3
FORWARD SCRVOLTAGE DROP (V)
83
SP725 Lead-Free/Green Series
Lead-Free/Green SP725
Figure 2: Low Current SCR Forward Voltage Drop Curve
FORWARD SCR CURRENT (mA)
CD
IEC 61000-4-2: R 1 50 to 100M
MIL-STD-3015.7: R 1 1 to 10M
For the SP725 EIAJ IC121 Machine Model (MM) standard,
the ESD capability is typically greater than 2kV from 200pF
with no series resistance.
600
DISCHARGE
SWITCH
H.V.
SUPPLY
± VD
For the “Modified” MIL-STD-3015.7 condition that is
defined as an “incircuit” method of ESD testing, the V+
and V- pins have a return path to ground and the SP725
ESD capability is typically greater than 25kV from 100pF
through 1.5kΩ . By strict definition of MIL-STD-3015.7 using
“pinto-pin” device testing, the ESD voltage capability is
greater than 10kV.
200
RD
Silicon Protection Arrays
TM
SCR Diode Array for ESD and Transient Overvoltage Protection
Figure 4: Typical Application of the SP725
t"QQMJDBUJPOBTBO*OQVU$MBNQGPS0WFSWPMUBHF(SFBUFSUIBO7BE Above V+ or less than -1VBE below V-)
+VCC
+VCC
INPUT
DRIVERS
OR
SIGNAL
SOURCES
LINEAR OR
DIGITAL IC
INTERFACE
IN 1 - 4
TO +VCC
V+
SP725
V-
SP725 INPUT PROTECTION CIRCUIT (1 OF 4 SHOWN)
Peak Transient Current Capability for Long Duration Surges
The peak transient current capability rises sharply as the
width of the current pulse narrows. Destructive testing
was done to fully evaluate the SP725 ’s ability to withstand
a wide range of peak current pulses vs time. The circuit
used to generate current pulses is shown in Figure 5.
Note that adjacent input pins of the SP725 may be
paralleled to improve current (and ESD) capability. The
sustained peak current capability is increased to nearly
twice that of a single pin.
The test circuit of Figure 5 is shown with a positive pulse
input. For a negative pulse input, the (-) current pulse input
goes to an SP725 ‘IN’ input pin and the (+) current pulse
input goes to the SP725 V- pin. The V+ to V- supply of the
SP725 must be allowed to float. (i.e., It is not tied to the
ground reference of the current pulse generator.) Figure
6 shows the point of overstress as defined by increased
leakage in excess of the data sheet published limits.
Figure 5: Typical SP725 Peak Current Test Circuit With a
Variable Pulse Width Input
-
VARIABLE TIME DURATION
CURRENT PULSE GENERATOR
R1
+
VX
CURRENT
SENSE
(-)
(+)
The maximum peak input current capability is dependent
on the ambient temperature, improving as the temperature
is reduced. Peak current curves are shown for ambient
temperatures of 25 º C and 105 º C and a 15V power supply
condition. The safe operating range of the transient peak
current should be limited to no more than 75% of the
measured overstress level for any given pulse width as
shown in the curves of Figure 6.
V- 8
1 IN
V- 7
2 IN
3 IN
VOLTAGE
PROBE
SP725
4 IN
+
V+ 6
-
V+ 5
C1
R 1 ~ 10 TYPICAL
VX ADJ. 10V/A TYPICAL
C1 ~ 100F
Figure 6: SP725 Typical Nonrepetitive Peak Current Pulse Capability
t4IPXJOHUIF.FBTVSFE1PJOUPG0WFSTUSFTTJO"NQFSFTWTQVMTFXJEUIUJNFJONJMMJTFDPOET
14
CAUTION: SAFE OPERATING CONDITIONS LIMIT
THE MAXIMUM PEAK CURRENT FOR A GIVEN
PULSE WIDTH TO BE NO GREATER THAN 75%
OF THE VALUES SHOWN ON EACH CURVE
PEAK CURRENT (A)
12
TA = 25ºC
10
V+ TO V-SUPPLY = 15V
8
6
TA = 105ºC
4
2
0
0.0001
SP725 Lead-Free/Green Series
0.01
0.1
1
84
10
100
10
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
SCR Diode Array for ESD and Transient Overvoltage Protection
Soldering Parameters
Reflow Condition
Pre Heat
Pb – Free assembly
- Temperature Min (Ts(min))
150°C
- Temperature Max (Ts(max))
200°C
- Time (min to max) (ts)
60 – 180 secs
Average ramp up rate (Liquidus) Temp
(TL) to peak
5°C/second max
TS(max) to TL - Ramp-up Rate
5°C/second max
Reflow
- Temperature (TL) (Liquidus)
217°C
- Temperature (tL)
60 – 150 seconds
Peak Temperature (TP)
250+0/-5 °C
Time within 5°C of actual peak
Temperature (tp)
20 – 40 seconds
Ramp-down Rate
5°C/second max
Time 25°C to peak Temperature (TP)
8 minutes Max.
Do not exceed
260°C
Package Dimensions - Small Outline Plastic Packages (SOIC)
INDEX
AREA
0.25(0.010) M
H
B M
E
SOIC
Pins
8
JEDEC
M8.15 MS-012-AA Issue C
Inches
-B-
Min
1
2
3
L
SEATING PLANE
-A-
h x 45o
A
D
-C-
μ
e
B
A1
C
0.10(0.004)
Notes:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication
Number 95.
Notes
0.0532
0.0688
1.35
1.75
-
0.0040
0.0098
0.10
0.25
9
B
0.013
0.020
0.33
0.51
C
0.0075
0.0098
0.19
0.25
-
D
0.1890
0.1968
4.80
5.00
3
E
0.1497
0.1574
3.80
4.00
4
0.050 BSC
1.27 BSC
-
H
0.2284
0.2440
5.80
6.20
-
h
0.0099
0.0196
0.25
0.50
5
L
0.016
0.050
0.40
μ
3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash,
protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side.
Max
A
N
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
Min
A1
e
0.25(0.010) M C A M B S
Millimeters
Max
8
0o
1.27
8
8o
0o
6
7
8o
-
4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and
protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index feature must be
located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7.
“N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating
plane, shall not exceed a maximum value of 0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily
exact.
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
85
SP725 Lead-Free/Green Series
Lead-Free/Green SP725
Package
N
Silicon Protection Arrays
TM
SCR Diode Array for ESD and Transient Overvoltage Protection
Part Numbering System
Product Characteristics
SP 725 AB T G
Green
Silicon
Protection Array
Tape and Reel
Series
Package Type
AB: 8 Leaded SOIC
Lead Plating
Matte Tin
Lead Material
Copper Alloy
Lead Coplanarity
0.004 inches (0.102mm)
Subsitute Material
Silicon
Body Material
Molded Epoxy
Flammability
UL94-V-0
Notes:
1. All dimensions are in millimeters.
2. Dimensions include solder plating.
3. Dimensions are exclusive of mold flash & metal burr.
4. All specifications comply to JEDEC SPEC MO-203 ISSUE A.
5. Blo is facing up for mold and facing down for trim/form, i.e. reverse trim/form.
6. Package surface matte finish VDI 11-13.
Ordering Information
Part Number
Temp. Range (ºC)
Package
Marking
Min. Order Qty.
SP725ABG
-40 to 105
8 Ld SOIC
SP725AG
1960
SP725ABTG
-40 to 105
8 Ld SOIC Tape and Reel
SP725AG
2500
Embossed Carrier Tape & Reel Specification - SOIC Package
Symbol
Millimetres
Max
Min
Max
E
1.65
1.85
0.065
0.073
F
5.4
5.6
0.213
0.22
P2
1.95
2.05
0.077
0.081
D
1.5
1.6
0.059
0.063
4.1
0.154
D1
P0
10P0
86
1.50 Min
3.9
0.059 Min
40.0 +/- 0.20
0.161
1.574 +/- 0.008
W
11.9
12.1
0.468
0.476
P
7.9
8.1
0.311
0.319
A0
6.3
6.5
0.248
0.256
B0
5.1
5.3
0.2
0.209
K0
2
2.2
0.079
0.087
t
SP725 Lead-Free/Green Series
Inches
Min
0.30 +/- 0.05
0.012 +/- 0.002
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Low Capacitance TVS protection for high-speed data interfaces
RoHS
Pb
GREEN
SP03-6 (SO-8) Series
Description
This new broadband protection device from Littelfuse
provides overvoltage protection for applications such
as 10/100/1000 BaseT Ethernet, T3/E3 DS3 interfaces,
ADSL2+, and VDSL2+. This new protector combines the
TVS diode element with a diode rectifier bridge to provide
both longitudinal and differential protection in one package.
This design innovation results in a capacitive loading
characteristic that is log-linear with respect to the signal
voltage across the device. This reduces intermodulation
(IM) distortion caused by a typical solid-state protection
solution. The application schematic provides the
connection information.
Agency Approvals - Pending
Features
Agency
Agency File Number
t 3P)4DPNQMJBOU
E128662
t .4TVSGBDFNPVOU
package (JEDEC SO-8)
Pinout
1
8
2
7
3
6
4
5
t $MBNQJOHTQFFEPG
nanoseconds
t 6-7FQPYZNPMEJOH
t -PXJOTFSUJPOMPTTMPH
linear capacitance
t 1FOEJOH6-SFDPHOJ[FE
component
t $PNCJOFEMPOHJUVEJOBM
and metallic protection
t -PXDMBNQJOHWPMUBHF
t 5&-JOFDBSET
t 5&BOE%4*OUFSGBDFT
t #BTF5
Ethernet
t 454*OUFSGBDFT
SO-8 (Top View)
Functional Block Diagram
Line in
Pin 1 and 8
Line out
Pin 2, 3, 6,
and 7
Ground
Line out
Line in
Pin 4 and 5
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
87
SP03-6 (SO-8) Series
SP03-6 (S0-8)
Applications
Silicon Protection Arrays
TM
Low Capacitance TVS protection for high-speed data interfaces
Absolute Maximum Ratings
Parameter
Rating
Units
Peak Pulse Current (8/20μs)
150
A
Peak Pulse Power (8/20μs)
2800
W
IEC 61000-4-2, Direct Discharge, (Level 4)
8
kV
IEC 61000-4-2, Air Discharge, (Level 4)
15
kV
IEC 61000-4-5 (8/20μs)
100
A
Bellcore GR 1089 (Intra-Building) (2/10μs)
100
A
ITU K.20 (5/310μs)
40
A
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Thermal Information
Parameter
SOIC Package
Storage Temperature Range
Rating
Units
170
°C/W
-65 to 150
°C
Maximum Junction Temperature
150
°C
Maximum Lead Temperature (Soldering 10s) (SOIC - Lead Tips Only)
300
°C
Electrical Characteristics (TOP = 25°C)
Parameter
Reverse Stand-Off Voltage
Reverse Breakdown Voltage
Symbol
Test Conditions
Min
Typ
Max
Units
VRWM
-
-
-
6
V
VBR
IT= 1mA
6.8
-
-
V
Reverse Leakage Current
IR
VRWM= 6V, T= 25°C
-
-
25
μA
Clamping Voltage, Line-Ground
VC
IPP= 50A, tp=8/20 μs
-
-
15
V
Clamping Voltage, Line-Ground
VC
IPP= 100A, tp=8/20 μs
-
-
20
V
Junction Capacitance
Cj
VR=0V, f= 1MHz
-
16
25
pF
VR=0V, f= 1MHz
-
8
12
pF
SP03-6 (SO-8) Series
88
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Low Capacitance TVS protection for high-speed data interfaces
Figure 1: Non-repetitive Peak Pulse Current vs. Pulse Time
Figure 2: Current Derating Curve
120
Percentage of Rated Current (%IP)
Peak Pulse Current (A)
1000
100
10
100
1
80
60
40
20
0
1
10
100
1000
0
20
40
60
80
100
120
140
160
Ambient Temperature (C)
Pulse decay time (μs)
Figure 3: Pulse Waveform
Figure 4: Clamping Voltage vs. Peak Pulse Current
25
100
VC Clamping Voltage (V)
80
60
40
15
Line-to-Ground
10
5
20
0
0
0
5
10
15
20
25
30
35
40
0
20
40
Time, μs
Figure 5: Capacitance vs. Reverse Voltage
80
100
Figure 6: Forward Voltage vs. Forward Current
7
20
18
Line-to-Ground
6
Ground-to-Line
Forward Voltage (V)
16
Capacitance (pF)
60
IP Peak Impulse Current (A)
14
12
10
8
Line-to-Line
6
4
5
4
3
2
1
2
0
0
0
1
2
3
4
5
6
7
0
Reverse Voltage (V)
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
10
20
30
40
50
60
70
80
90
100
Forward Current (A)
89
SP03-6 (SO-8) Series
SP03-6 (S0-8)
Percentage of IPP (%)
Line-to-Line
20
Silicon Protection Arrays
TM
Low Capacitance TVS protection for high-speed data interfaces
Application Example
Recommendations of ITU K.20 and .21. This device
protects against both positive and negative induced surge
events. The TeleLink fuse provides overcurrent protection
for the long term 50/60 Hz power fault events.
The following schematic shows a high-speed data interface
protection solution. The SP03-6 provides both metallic
(differential) and longitudinal (common mode) protection
from lightning induced surge events. Its surge rating is
compatible with the intra-building surge requirements
of Telcordia’s GR-1089-CORE, and the Basic Level
TIP
1
8
2
7
3
6
4
5
to chipset
(Ethernet PHY,
T3/E3 PHY, etc.)
RING
TeleLink (0461 1.25)
SP03-6
Soldering Parameters
Reflow Condition
Pre Heat
Pb – Free assembly
- Temperature Min (Ts(min))
150°C
- Temperature Max (Ts(max))
200°C
- Time (min to max) (ts)
60 – 180 secs
Average ramp up rate (Liquidus) Temp
(TL) to peak
3°C/second max
TS(max) to TL - Ramp-up Rate
3°C/second max
Reflow
- Temperature (TL) (Liquidus)
- Temperature (tL)
217°C
60 – 150 seconds
Peak Temperature (TP)
250+0/-5 °C
Time within 5°C of actual peak
Temperature (tp)
20 – 40 seconds
Ramp-down Rate
6°C/second max
Time 25°C to peak Temperature (TP)
8 minutes Max.
Do not exceed
260°C
SP03-6 (SO-8) Series
90
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Low Capacitance TVS protection for high-speed data interfaces
Package Dimensions - Mechanical Drawings and Recommended Solder Pad Outline
Package
MS-012 (SO-8)
Pins
8
JEDEC
MO-223 Issue A
Millimetres
Inches
LF
A
1.35
1.75
0.053
0.069
o
A1
0.10
0.25
0.004
0.010
Min
Recommended
Soldering Pad Outline
(Reference Only)
1.25
1.65
0.043
0.065
0.31
0.51
0.012
0.020
c
0.017
0.25
0.007
0.010
D
4.80
5.00
0.189
0.197
E
5.80
6.20
0.228
0.244
E1
3.80
4.00
0.150
0.157
1.27 BSC
0.050 BSC
1.27
0.40
0.050
0.016
G = GREEN
T = Tape & Reel
PACKAGE
B = SOIC, 2500 quantity
Lead Plating
Matte Tin
Lead Material
Copper Alloy
Lead Coplanarity
0.004 inches (0.102mm)
Subsitute Material
Silicon
Body Material
Molded Epoxy
Flammability
UL94-V-0
Notes :
1. All dimensions are in millimeters
2. Dimensions include solder plating.
Part Marking System
3. Dimensions are exclusive of mold flash & metal burr.
4. All specifications comply to JEDEC SPEC MO-223 Issue A
5. Blo is facing up for mold and facing down for trim/form, i.e. reverse trim/form.
LF SP03-6
XXXXXXXX
6. Package surface matte finish VDI 11-13.
First Line: Part number
Second Line: Date code
Ordering Information
Part Number
Package
Marking
Min. Order Qty.
SP03-6BTG
SOIC Tape & Reel
SP03-6
2500
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
91
SP03-6 (SO-8) Series
SP03-6 (S0-8)
Product Characteristics
SP03-6BTG
Series
Max
B
L
Silicon
Protection
Array
Min
A2
e
Part Numbering System
Max
Silicon Protection Arrays
TM
Low Capacitance TVS protection for high-speed data interfaces
Embossed Carrier Tape & Reel Specification - SOIC Package
Dimensions
Millimetres
Max
Min
Max
E
1.65
1.85
0.065
0.073
F
5.4
5.6
0.213
0.22
P2
1.95
2.05
0.077
0.081
D
1.5
1.6
0.059
0.063
4.1
0.154
D1
P0
10P0
92
1.50 Min
3.9
0.059 Min
40.0 +/- 0.20
0.161
1.574 +/- 0.008
W
11.9
12.1
0.468
0.476
P
7.9
8.1
0.311
0.319
A0
6.3
6.5
0.248
0.256
B0
5.1
5.3
0.2
0.209
K0
2
2.2
0.079
0.087
t
SP03-6 (SO-8) Series
Inches
Min
0.30 +/- 0.05
0.012 +/- 0.002
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Upstream USB Port Terminator with ESD Suppression & EMI Filtering
SPUSB1 Series
Description
The Littelfuse SPUSB1 Series is a multifunctional USB port
protection network designed to provide ESD protection,
EMI/RFI filtering and line termination for a single USB 1.1
port. The SPUSB1 can replace a minimum of ten typically
larger “discrete” devices resulting in inventory and
placement cost savings.
The SPUSB1 Series combines Transient Voltage
Suppression (TVS) avalanche diodes, EMI/RFI filtering
components (R1 and C1), and a1.5kΩ termination resistor
(R2). The filtering components are included to satisfy
recommendations in the USB 1.1 specification, and the
1.5kΩ resistor (R2) is included as a pull-up resistor to VBUS.
Functional Block Diagram
R1
1
5
To support a wide range of circuit conditions, Littelfuse
offers three resistance values for the series resistor (R1).
The series resistance plus the USB driver output resistance
must be close to the USB cable’s characteristic impedance
of 45Ω (90Ω balanced) to minimize transmission line
reflections.
4
Features
R2
C1
GND
6
2
VBUS
C1
3
R1
t 0OFVQTUSFBN64#QPSU
terminator, EMI filter and
transient overvoltage
protector in a single
surface-mount package
t $PNQBDU4$QBDLBHF
saves board space and
lowers manufacturing
costs compared to
discrete solutions
t &4%QSPUFDUJPOUPL7
contact discharge per
MIL-STD- 883D, method
3015
t &4%QSPUFDUJPOUPL7
contact discharge per IEC
61000-4-2 international
standard
Applications
t %FTLUPQ-BQUPQ1$T
t %JHJUBMDBNFSBT
t 64#QFSJQIFSBMTQSJOUFST
scanners, zip drives)
t .11MBZFST
t $BCMF.PEFNT
t 1%"TXJSFMFTTIBOETFUT
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
93
SPUSB1 Series
SPUSB1
The SPUSB1 Series can be used for termination and
protection of“upstream” USB devices such as PDAs,
digital cameras, scanners and hubs which are often at
risk from transient voltage surges and electromagnetic
interference from both internal and external sources.
SC70-6
Silicon Protection Arrays
TM
Upstream USB Port Terminator with ESD Suppression & EMI Filtering
Absolute Maximum Ratings
Parameter
Supply Voltage VBUS
Rating
5.5
Units
V
DC Power per Resistor
100
mW
Package Power
200
mW
Temperature Range:
Operating
Storage
-40 to +85
-65 to +150
Electrical Characteristics
o
C
Standard at 25ºC unless specified otherwise
Parameter
Min
Typ
Max
Unit
Resistance R1 (SPUSB1AJT only)
6
12
14
Ω
Resistance R1 (SPUSB1CJT only)
26
33
40
Ω
Resistance R1 (SPUSB1BJT only)
18
22
26
Ω
Resistance R2
1.2
1.5
1.8
kΩ
Capacitance C1 @ 2.5 v DC, 1MHz
38
47
56
pF
1
100
nA
Diode Leakage at 3.3v
Diode Reverse Blas Stand-off Voltage, 1= 10μA
5.5
Signal Clamp Voltage:
Positive Clamp, 10mA
Negative Clamp, 10mA
In-system ESD Withstand Voltage(1)
Human Body Model (MIL-STD-883D, method 3015)
IEC 61000-4-2, contact discharge method (I/O pins)
IEC 61000-4-2, contact discharge method (VBUS pin)
V
5.6
-1.2
6.8
-0.8
8.0
-0.4
V
V
±30
±15
±25
kV
kV
kV
Positive
Negative
Clamping Voltage During ESD Discharge (1)
MIL-STD-883D (Method 3015), 8kV
10
-5
V
V
Note:
1. ESD applied to input/outputVDD pins with respect to GND, one at a time.
Clamping Voltage is measured at the opposite side of the EMI filter to the ESD pin (ie: if ESD is applied to pin1 then clamping voltage is measured at pin 6). Unused pins are open.
These parameters guaranteed by design.
Typical Application of the SPUSB1
Full-Speed Devices (12Mbits per second)
Low-Speed Devices (1.5Mbits per second)
For full speed operation the pull-up resistor R2 is connected to the D+ pin.
D+
USB 1.1
CONTROLLER
IC
GND
R1
1
6
D+
D4
D1
Low speed connection requires the pull-up resistor R2 to be connected to the Dpin. Please
note the reversal of the D- and D+ pins on Figure 2 versus Figure 1.
D-
R2
C1
USB 1.1
CONTROLLER
IC
3.3V
2
5
GND
VBUS
USB 1.1
CONNECTOR
GND
SPUSB1 Series
3
D2
6
D-
D4
R2
C1
3.3V
2
5
GND
VBUS
USB 1.1
CONNECTOR
C1
C1
D-
R1
1
D1
R1
4
D3
D+
D-
94
3
D2
R1
4
D3
D+
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
Silicon Protection Arrays
TM
Upstream USB Port Terminator with ESD Suppression & EMI Filtering
Soldering Parameters
Reflow Condition
Pre Heat
Pb – Free assembly
- Temperature Min (Ts(min))
150°C
- Temperature Max (Ts(max))
200°C
- Time (min to max) (ts)
60 – 180 secs
Average ramp up rate (Liquidus) Temp
(TL) to peak
5°C/second max
TS(max) to TL - Ramp-up Rate
5°C/second max
Reflow
- Temperature (TL) (Liquidus)
217°C
- Temperature (tL)
60 – 150 seconds
Peak Temperature (TP)
250+0/-5 °C
Time within 5°C of actual peak
Temperature (tp)
20 – 40 seconds
Ramp-down Rate
5°C/second max
Time 25°C to peak Temperature (TP)
8 minutes Max.
Lead Plating
Tin-Lead
Do not exceed
260°C
Lead Material
Copper Alloy
Lead Coplanarity
0.004 inches (0.102mm)
Subsitute Material
Silicon
Body Material
Molded Epoxy
Flammability
UL94-V-0
Product Characteristics
B
B
6
5
4
E
1
2
Package
Pins
JEDEC
SPUSB1AJT - SC70-6
SPUSB1BJT - SC70-6
SPUSB1CJT - SC70-6
HE
Recommended Pad Layout
3
O (REF)
B
R
D
+
T
A2 A
+
+
+
P
S (REF)
+
+
M (REF)
+
A1
N (REF)
c
A
A1
A2
B
c
D
E
e
HE
L
M
N
O
P
R
S
T
SC70-6
6
MO-203 Issue A,
M8.15 MS-012-AA Issue C
Millimeters
Inches
Min
Max
Min
Max
0.80
1.10
0.031
0.043
0.00
0.10
0.000
0.004
0.70
1.00
0.028
0.039
0.15
0.30
0.006
0.012
0.08
0.25
0.003
0.010
1.85
2.25
0.073
0.089
1.15
1.35
0.045
0.053
0.65 BSC
0.026 BSC
2.00
2.40
0.079
0.094
0.26
0.46
0.010
0.018
1.60
0.063
1.30
0.052
0.65
0.026
0.70
0.058
0.35
0.014
0.90
0.035
2.50
0.098
L
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
95
SPUSB1 Series
SPUSB1
Package Dimensions - SC70
Silicon Protection Arrays
TM
Upstream USB Port Terminator with ESD Suppression & EMI Filtering
Part Numbering System
SP USB1 XJ T
Silicon
Protection Array
T= Tape & Reel
Function
Package
AJ = 12 Ohm Device
BJ = 22 Ohm Device
CJ = 33 Ohm Device
Ordering Information
Part Number
R1 (Ohm)
R2 (KOhm)
C1 (pF)
Device Brand
PKG Type
#/Reel
SPUSB1AJT
12
1.5
47
UFA
SC70-6
3000
SPUSB1BJT
22
1.5
47
UFB
SC70-6
3000
SPUSB1CJT
33
1.5
47
UFC
SC70-6
3000
Embossed Carrier Tape & Reel Specification - SC70-6
Dimensions
Symbol
Min
Max
1.65
1.85
0.065
0.073
F
3.45
3.55
0.135
0.139
P2
1.95
2.05
0.077
0.081
D
1.40
1.60
0.055
0.063
D1
1.00
1.25
0.039
0.049
P0
3.90
4.10
0.154
0.161
40.0 +/- 0.20
1.574 +/- 0.008
W
7.70
8.10
0.303
0.318
P
3.90
4.10
0.153
0.161
A0
2.14
2.34
0.084
0.092
B0
2.24
2.44
0.088
0.096
K0
1.12
1.32
0.044
0.051
t
96
Inches
Max
E
10P0
SPUSB1 Series
Millimetres
Min
0.27 max
0.010 max
©2008 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to http://www.littelfuse.com for current information.
To assist you with your electronics design and selection processes,
Littelfuse also offers:
Comprehensive Online Product Specs on Littelfuse.com—Featuring easy-to-use
navigation, search and selection tools, as well as additional product details.
You can rely on Littelfuse.com for instant answers and continuously
up-to-date information..
Printed Product Catalogs—For offline and off-the-shelf convenience, our printed
product catalogs include data sheets, selection tables and tutorials covering all
of our core technologies. Contact your Littelfuse product representative or visit
www.littelfuse.com/catalogs to check availability.
Circuit Protection Design Guides—Our application design center website,
www.littelfuse.com/designcenter, offers a wealth of circuit protection guidance
to help you select and apply the best circuit protection solution for your
application.
As the world's #1 brand in circuit protection, Littelfuse offers a complete
portfolio of circuit protection products. To request catalogs for the Littelfuse
portfolio of circuit protection technologies, please contact your authorized
Littelfuse product representative or visit our website at
www.littelfuse.com/catalogs
Littelfuse offers several technologies to protect sensitive electronic circuits from excess
current resulting from overloads, short circuits, power cross or ground faults. Our overcurrent
protection product line includes:
Fuses Littelfuse offers the world’s broadest range of fuse types and ratings, including
cartridge, leaded, surface mount and thin film designs
PTC Protectors Positive Temperature Coefficient thermistor technology provides
resettable current-limiting protection
Littelfuse offers multiple technologies for overvoltage suppression and switching to protect sensitive electronic
circuits from excessive voltage resulting from electrostatic discharge (ESD), load switching or lightning strikes.
Our overvoltage protection product line includes:
Varistors Littelfuse offers surface mount Multi-Layer Varistors (MLVs) and industrial
Metal Oxide Varistors (MOVs) to protect against transients
GDTs Gas Discharge Tubes (GDTs) to dissipate voltage through
a contained plasma gas
Thyristors Littelfuse's solid state switches control the flow of current in
a wide range of appliances, tools and equipment
SIDACtor® Devices Overvoltage protection specifically designed for telecom
and datacom requirements
TVS Diodes Silicon transient voltage suppression (TVS) devices
SPAs Silicon Protection Arrays designed for analog and digital signal line protection
PulseGuard® ESD Suppressors Small, fast-acting Electrostatic
Discharge (ESD) suppressors
©2008 Littelfuse, Inc. Printed in USA
Specifications descriptions and illustrative material in this literature are as accurate as known at the time of publication,
but are subject to changes without notice. Visit www.littelfuse.com for the most up-to-date technical information.
FORM NO. EC113
Revision Code: EC2113v1E0807
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