Supertex inc.

HV9961

LED Driver with Average-Mode

Constant Current Control

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Features

Fast average current control

Programmable constant off-time switching

Linear dimming input

PWM dimming input

Output short circuit protection with skip mode

Ambient operating temperature -40 O C to +125

Pin-compatible with the HV9910B

O C

Applications

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DC/DC or AC/DC LED driver applications

LED backlight driver for LCD displays

General purpose constant current source

LED signage and displays

Architectural and decorative LED lighting

LED street lighting

General Description

The HV9961 is an average current mode control LED driver

IC operating in a constant off-time mode. Unlike HV9910B, this control IC does not produce a peak-to-average error, and therefore greatly improves accuracy, line and load regulation of the LED current without any need for loop compensation or high-side current sensing. The output LED current accuracy is ±3%.

The IC is equipped with a current limit comparator for hiccupmode output short circuit protection.

The HV9961 can be powered from an 8.0 - 450V supply.

A PWM dimming input is provided that accepts an external control TTL compatible signal. The output current can be programmed by an internal 275mV reference, or controlled externally through a 0 - 1.5V dimming input.

HV9961 is pin-to-pin compatible with HV9910B and it can be used as a drop-in replacement for many applications to improve the LED current accuracy and regulation.

Typical Application Circuit

8.0 - 450VDC

5

6

1

PWMD

VIN

GATE

HV9961

VDD CS

4

2

7 LD

GND

3

RT 8

R

T

R

CS

Sets

LED

Current

LED

Load

Supertex inc.

● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com

HV9961

Ordering Information

Device

HV9961

Package Options

8-Lead SOIC

4.90x3.90mm body

1.75mm height (max)

1.27mm pitch

HV9961LG-G

16-Lead SOIC

9.90x3.90mm body

1.75mm height (max)

1.27mm pitch

HV9961NG-G

-G indicates package is RoHS compliant (‘Green’)

Pin Description

VIN 1

CS 2

GND 3

GATE 4

8 RT

7 LD

6 VDD

5 PWMD

8-Lead SOIC (LG)

VIN 1

NC 2

NC 3

CS 4

GND 5

NC 6

NC 7

GATE 8

16 NC

15 NC

14 RT

13 LD

12 VDD

11 NC

10 NC

9 PWMD

16-Lead SOIC (NG)

Absolute Maximum Ratings

Parameter

V

IN

to GND

V

DD

to GND

CS, LD, PWMD, GATE, RT to GND

Value

-0.5V to +470V

12V

-0.3V to (V

DD

+0.3V)

-40°C to +150°C Junction temperature range

Storage temperature range -65°C to +150°C

Continuous power dissipation (T

8-Lead SOIC

16-Lead SOIC

A

= +25°C)

650mW

1000mW

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Product Marking

YWW

H9961

LLLL

Y = Last Digit of Year Sealed

WW = Week Sealed

L = Lot Number

= “Green” Packaging

Package may or may not include the following marks: Si or

8-Lead SOIC (LG)

Top Marking

HV9961NG

YWW LLLLLLLL

Y = Last Digit of Year Sealed

WW = Week Sealed

Bottom Marking

CCCCCCCCC AAA

L = Lot Number

C = Country of Origin*

A = Assembler ID*

= “Green” Packaging

*May be part of top marking

Package may or may not include the following marks: Si or

16-Lead SOIC (NG)

Thermal Resistance

Package

8-Lead SOIC

16-Lead SOIC

θ

JA

128 O C/W

82 O C/W

Electrical Characteristics

(Specifications are at T

A

= 25°C. V

IN

= 12V, V

LD

= V

DD

, PWMD = V

DD

unless otherwise noted))

Sym

Input

V

INDC

I

INSD

Description

Shut-down mode supply current *

Min Typ Max Units Conditions

Input DC supply voltage range 1 * 8.0

-

450

0.5

1.0

V DC input voltage mA Pin PWMD to GND

Notes:

1. Also limited by package power dissipation limit, whichever is lower.

* Denotes the specifications which apply over the full operating ambient temperature range of -40°C < T

A

< +125°C.

Supertex inc.

● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com

2

HV9961

Electrical Characteristics

(Specifications are at T

A

= 25°C. V

IN

= 12V, V

LD

= V

DD

, PWMD = V

DD

unless otherwise noted))

Sym Description

Internal Regulator

Min Typ Max Units Conditions

V

DD

Internally regulated voltage 7.25

7.50

7.75

V

V

IN

= 8.0V, I

DD(ext)

= 0,

500pF at GATE; R

T

= 226kΩ

ΔV

DD, line

Line regulation of V

DD

0 1.0

V

V

IN

= 8.0 - 450V, I

500pF at GATE; R

DD(ext)

= 0,

T

= 226kΩ

ΔV

DD, load

Load regulation of V

DD

0 100 mV

I

DD(ext)

= 0 - 1.0mA,

500pF at GATE; R

T

= 226kΩ

UVLO

∆UVLO

V

DD

undervoltage lockout threshold

V

DD

undervoltage lockout hysteresis

-

* 6.45

6.70

6.95

500 -

V V

IN

rising mV V

IN

falling

I

IN,MAX

Maximum input current

(limited by UVLO)

# 3.5

# 1.5

-

-

-

mA

V

IN

= 8.0V, T

A

= 25 O C

V

IN

= 8.0V, T

A

= 125 O C

PWM Dimming

V

EN(lo)

PWMD input low voltage

V

EN(hi)

PWMD input high voltage

R

EN

Internal pull-down resistance at PWMD

-

* -

* 2.2

50

-

0.8

-

100 150

Average Current Sense Logic

V

CS

Current sense reference voltage 268

A

V(LD)

LD-to-CS voltage ratio

286

0.182

0.188

V

V

V

IN

= 8.0 - 450V

V

IN

= 8.0 - 450V kΩ V

PWMD

= 5.0V

AV

LD(OFFSET)

LD-to-CS voltage offset 0 10 mV ---

--mV

Offset = V

CS

V

LD

= 1.2V

- A

V(LD)

• V

LD

; mV --CS threshold temp regulation * 5.0

V

LD(OFF)

ΔV

LD(OFF)

T

BLANK

T

ON(min)

LD input voltage, shutdown

LD input voltage, enable -

-

-

-

Current sense blanking interval * 150

Minimum on-time

D

MAX

Maximum steady-state duty cycle

Short Circuit Protection

V

CS

Hiccup threshold voltage

-

-

75

410

150

200

-

-

-

-

-

-

320

1000

-

470 mV V

LD

falling mV V

LD

rising ns --ns CS = V

CS

+30mV

%

Reduction in output LED current may occur beyond this duty cycle mV ---

T

DELAY

T

HICCUP

Current limit delay CS-to-GATE

Short circuit hiccup time -

-

350 -

150

550 ns CS = V

μs ---

CS

+30mV

T

ON(min)

Minimum on-time (short circuit) 430 ns CS = V

DD

Notes:

* Denotes the specifications which apply over the full operating ambient temperature range of -40°C < T

# Guaranteed by design.

A

< +125°C.

Supertex inc.

● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com

3

HV9961

Electrical Characteristics

(Specifications are at T

A

= 25°C. V

IN

= 12V, V

LD

= V

DD

, PWMD = V

DD

unless otherwise noted))

Sym Description Min Typ Max Units Conditions

T

OFF

Timer

T

OFF

Off time

32

8.0

40

10

48

12

μs

R

T

= 1.00MΩ

R

T

= 226kΩ

GATE Driver

I

SOURCE

I

SINK t

RISE

GATE sourcing current

GATE sinking current

GATE output rise time

-

-

-

0.165

0.165

-

-

-

30

-

-

50

A

A

V

GATE

= 0V, V

DD

= 7.5V

V

GATE

= V

DD

, V

DD

= 7.5V

ns C

GATE

= 500pF, V

DD

= 7.5V

t

FALL

GATE output fall time 30 50 ns C

GATE

= 500pF, V

Notes:

* Denotes the specifications which apply over the full operating ambient temperature range of -40°C < T

# Guaranteed by design.

A

< +125°C.

DD

= 7.5V

Functional Block Diagram

VIN

LD

CS

Regulator

0.15/0.20V

MIN (V

LD

• 0.185, 0.275V)

L/E

Blanking

Auto-REF

IN

Average Current

Control Logic

OUT

UVLO

POR

VDD

GATE

PWMD

GND

0.44V

HV9961

R Q

S Q

CLK

400µs

T

Timer i

Current

Mirror

RT

Supertex inc.

● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com

4

HV9961

Application Information

General Description

Peak-current control (as in HV9910B) of a buck converter is the most economical and simple way to regulate its output current. However, it suffers accuracy and regulation problems that arise from the so-called peak-to-average current error, contributed by the current ripple in the output inductor and the propagation delay in the current sense comparator. The full inductor current signal is unavailable for direct sensing at the ground potential in a buck converter when the control switch is referenced to the same ground potential because the control switch is only conducting for small periods. While it is very simple to detect the peak current in the switch, controlling the average inductor current is usually implemented by level translating the sense signal from

+V

IN

. Though this is practical for relatively low input voltage

V

IN

, this type of average-current control may become excessively complex and expensive in the offline AC or other highvoltage DC applications.

feedback operates in a fast open-loop mode. No compensation is required. Output current is programmed simply as:

I

LED

=

0.275V

R CS

(2) when the voltage at the LD input V

LD

≥ 1.5V. Otherwise:

I

LED

=

V

LD

• 0.185

R

CS

(3)

The above equations are only valid for continuous conduction of the output inductor. It is a good practice to design the inductor such that the switching ripple current in it is 30~40% of its average peak-to-peak, full load, DC current. Hence, the recommended inductance can be calculated as:

L

O

=

V

O(MAX)

• T

0.4 • I O

OFF (4)

The HV9961 employs Supertex’ proprietary control scheme, achieving fast and very accurate control of average current in the buck inductor through sensing the switch current only.

No compensation of the current control loop is required. The

LED current response to PWMD input is similar to that of the

HV9910B. The inductor current ripple amplitude does not affect this control scheme significantly, and therefore, the LED current is independent of the variation in inductance, switching frequency or output voltage. Constant off-time control of the buck converter is used for stability and to improve the

LED current regulation over a wide range of input voltages.

(Note that, unlike HV9910B, the HV9961 does not support the constant-frequency mode of operation.)

OFF Timer

The timing resistor connected to RT determines the off-time of the gate driver, and it must be wired to GND. (Wiring this resistor to GATE as with HV9910B is no longer supported.)

The equation governing the off-time of the GATE output is given by:

T

OFF

(µs) =

R

T

(kΩ)

25 within the range of 30kΩ ≤ R

+ 0.3

T

≤ 1.0MΩ.

(1)

Average Current Control Feedback and Output

Short Circuit Protection

The current through the switching MOSFET source is averaged and used to give constant-current feedback. This current is detected using a sense resistor at the CS pin. The

The duty-cycle range of the current control feedback is limited to D ≤ 0.75. A reduction in the LED current may occur when the LED string voltage V input voltage V

IN

O

is greater than 75% of the

of the HV9961 LED driver.

Reducing the output LED voltage V

D

MIN

, where D

MIN

= 1.0µs/(T

OFF

O

below V

O(MIN)

= V

IN

•

+1.0µs), may also result in the loss of regulation of the LED current. This condition, however, causes an increase in the LED current and can potentially trip the short-circuit protection comparator.

The typical output characteristic of the HV9961 LED driver is shown in Fig.1. The corresponding HV9910B characteristic is given for the comparison.

Output Characteristics

0.60

0.55

V

IN

= 170VDC

0.50

0.45

0.40

0.35

HV9961

0.30

0.25

0 10 20 30

Output Voltage (V)

40

HV9910B

50 60

Fig.1. Typical output characteristic of an HV9961 LED driver.

Supertex inc.

● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com

5

HV9961

The short circuit protection comparator trips when the voltage at CS exceeds 0.44V. When this occurs, the GATE offtime T

HICCUP

= 400µs is generated to prevent stair-casing of the inductor current and potentially its saturation due to insufficient output voltage. The typical short-circuit current is shown in the waveform of Fig. 2.

0.44V/R

CS

0.35

0.30

0.25

0.20

400µs

Fig.2. Short-circuit inductor current.

A leading-edge blanking delay is provided at CS to prevent false triggering of the current feedback and the short circuit protection.

Linear Dimming

When the voltage at LD falls below 1.5V, the internal 275mV reference to the constant-current feedback becomes overridden by V

LD

• 0.185. As long as the current in the inductor remains continuous, the LED current is given by the equation (3) above. However, when V

LD

falls below 150mV, the

GATE output becomes disabled. The GATE signal recovers, when V

LD

exceeds 200mV. This is required in some applications to be able to shut the LED lamp off with the same signal input that controls the brightness. The typical linear dimming response is shown in Fig.3.

LD Response Characteristics

0.40

pulse-width modulated signal of a measured amplitude below 1.5V should be applied at LD.

Input Voltage Regulator

The HV9961 can be powered directly from an 8.0 ~ 450VDC supply through its VIN input. When this voltage is applied at the VIN pin, the HV9961 maintains a constant 7.5V level at

VDD. This voltage can be used to power the IC and external circuitry connected to VDD within the rated maximum current or within the thermal ratings of the package, whichever limit is lower. The VDD pin must be bypassed by a low ESR capacitor to provide a low impedance path for the high frequency current of the GATE output. The HV9961 can also be powered through the VDD pin directly with a voltage greater than the internally regulated 7.5V, but less than 12V.

Despite the instantaneous voltage rating of 450V, continuous voltage at VIN is limited by the power dissipation in the package. For example, when HV9961 draws I maximum continuous voltage at VIN is limited to:

IN

= 2.0mA from the VIN input, and the 8-pin SOIC package is used, the

V

IN(MAX)

=

(T

J(MAX)

- T

A

)

= 390V (5)

R θ,J-A

• I

IN where the ambient temperature T working junction temperature T

J(MAX) to-ambient thermal resistance R

θ,JA

A

= 25

= 125

= 128

O

O

C, the maximum

O C, the junction-

C/W.

In such cases, when it is needed to operate the HV9961 from a higher voltage, a resistor or a Zener diode can be added in series with the VIN input to divert some of the power loss from the HV9961. In the above example, using a 100V Zener diode will allow the circuit to work up to 490V.

The input current drawn from the VIN pin is represented by the following equation:

I

IN

≈ 1.0mA + Q

G

• f

S

(6)

0.15

0.10

0.05

In the above equation, f

S

is the switching frequency, and Q manufacturer’s datasheet.

G is the GATE charge of the external FET obtained from the

0

0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6

LD (V)

Fig.3. Typical linear dimming response of an HV9961

LED driver

The linear dimming input could also be used for “mixedmode” dimming to expand the dimming ratio. In such case a

GATE Output

The GATE output of the HV9961 is used to drive an external

MOSFET. It is recommended that the gate charge Q

G

of the external MOSFET be less than 25nC for switching frequencies ≤100kHz and less than 15nC for switching frequencies

>100kHz.

Supertex inc.

● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com

6

HV9961

PWM Dimming

Due to the fast open-loop response of the average-current control loop of the HV9961, its PWM dimming performance nearly matches that of the HV9910B. The inductor current waveform comparison is shown in Fig. 4.

The rising and falling edges are limited by the current slew rate in the inductor. The first switching cycle is terminated upon reaching the 275mV (V

LD

• 0.185) level at CS. The circuit is further reaching its steady-state within 3~4 switching cycles regardless of the switching frequency.

Fig.4. Typical PWM dimming response of an HV9961

LED driver.

[CH2 (red): PWMD; CH4 (green): Inductor Current; CH3 (blue):

Same as HV9910B for comparison]

Pin Description

Pin #

8-Lead SOIC 16-Lead SOIC

1 1

2 4

3

4

5

6

7

8

5

8

9

12

13

14

Function Description

VIN

CS

GND

GATE

PWMD

VDD

LD

RT

This pin is the input of an 8.0 - 450V linear regulator.

This pin is the current sense pin used to sense the FET current by means of an external sense resistor.

Ground return for all internal circuitry. This pin must be electrically connected to the ground of the power train.

This pin is the output GATE driver for an external N-channel power

MOSFET.

This is the PWM dimming input of the IC. When this pin is pulled to GND, the gate driver is turned off. When the pin is pulled high, the gate driver operates normally.

This is the power supply pin for all internal circuits. It must be bypassed with a low ESR capacitor to GND (at least 0.1μF).

This pin is the linear dimming input, and it sets the current sense threshold as long as the voltage at this pin is less than 1.5V. If voltage at LD falls below 150mV, the GATE output is disabled. The GATE signal recovers at

200mV at LD.

A resistor connected between this pin and GND programs the GATE offtime.

-

2, 3, 6, 7, 10,

11, 15, 16

NC No connection

Supertex inc.

● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com

7

HV9961

8-Lead SOIC (Narrow Body) Package Outline (LG)

4.90x3.90mm body, 1.75mm height (max), 1.27mm pitch

D θ1

8

E

E1

Note 1

(Index Area

D/2 x E1/2)

L2

1

Top View

L1

L

View B

θ

A

Note 1 h h

A A2

Seating

Plane

A1 e

Side View

b

A

View A-A

Gauge

Plane

Seating

Plane

View B

Note:

1.

This chamfer feature is optional. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator.

Symbol A A1 A2 b D E E1

Dimension

(mm)

MIN 1.35* 0.10 1.25 0.31 4.80* 5.80* 3.80*

NOM 4.90 6.00 3.90

MAX 1.75 0.25 1.65* 0.51 5.00* 6.20* 4.00*

JEDEC Registration MS-012, Variation AA, Issue E, Sept. 2005.

* This dimension is not specified in the JEDEC drawing.

Drawings are not to scale.

Supertex Doc. #: DSPD-8SOLGTG, Version I041309.

e

1.27

BSC h

0.25 0.40

-

L

-

0.50 1.27

L1

1.04

REF

L2

0.25

BSC

θ

0 O

8

-

O

θ1

5 O

-

15 O

Supertex inc.

● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com

8

HV9961

16-Lead SOIC (Narrow Body) Package Outline (NG)

9.90x3.90mm body, 1.75mm height (max), 1.27mm pitch

D θ1

16

Note 1

(Index Area

D/2 x E1/2)

1

Top View

A A2

A1 e

Side View

E1 E

A b

Seating

Plane

A h

L1

View B

L h

Note 1

L2

θ

View

B

Gauge

Plane

Seating

Plane

View A-A

Note:

1.

This chamfer feature is optional. If it is not present, then a Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator.

Symbol

Dimension

(mm)

A A1 A2 b D E E1

MIN 1.35* 0.10

1.25

0.31

9.80* 5.80* 3.80*

NOM -

MAX 1.75

-

0.25 1.65* 0.51 10.00* 6.20* 4.00*

JEDEC Registration MS-012, Variation AC, Issue E, Sept. 2005.

* This dimension is not specified in the JEDEC drawing.

Drawings are not to scale.

Supertex Doc. #: DSPD-16SONG, Version G041309.

9.90

6.00

3.90

e

1.27

BSC h

0.25

-

0.50

L

0.40

-

1.27

L1

1.04

REF

L2

0.25

BSC

θ

0 O

-

8 O

θ1

5

-

O

15 O

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html

.)

Supertex inc.

does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc.

does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc.

(website: http//www.supertex.com)

©2010 Supertex inc.

All rights reserved. Unauthorized use or reproduction is prohibited.

Doc.# DSFP-HV9961

B101510

Supertex inc.

1235 Bordeaux Drive, Sunnyvale, CA 94089

Tel: 408-222-8888 www.supertex.com

9