INA27xA-Q1 Automotive Grade, –16V to +80V, Low- or High-side, High-Speed,... Output Current Sense Amplifier With Simplified Filter Inputs

INA27xA-Q1 Automotive Grade, –16V to +80V, Low- or High-side, High-Speed,... Output Current Sense Amplifier With Simplified Filter Inputs
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INA270A-Q1, INA271A-Q1
SBOS401C – JULY 2007 – REVISED APRIL 2016
INA27xA-Q1 Automotive Grade, –16V to +80V, Low- or High-side, High-Speed, Voltage
Output Current Sense Amplifier With Simplified Filter Inputs
1 Features
2 Applications
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Qualified for Automotive Applications
AEC-Q100 Qualified With the Following Results:
– Device Temperature Grade 1: –40°C to
+125°C Ambient Operating Temperature
Range
– Device HBM ESD Classification Level 2
– Device CDM ESD Classification Level C6
Pinout Optimized for External Filtering
Wide Common-Mode Range: –16 V to +80 V
Accuracy:
– CMRR: 120 dB
– ±2.5-mV Offset (Maximum)
– ±1% Gain Error (Maximum)
– 20-μV/°C Offset Drift (Maximum)
– 55-ppm/°C Gain Drift (Maximum)
Bandwidth: Up to 130 kHz
Two Gain Options Available:
– 14 V/V (INA270A-Q1)
– 20 V/V (INA271A-Q1)
Quiescent Current: 900 μA (Maximum)
Power Supply: 2.7 V to 18 V
Packages: SOIC-8
Electric Power Steering (EPS) Systems
Body Control Modules
Brake Systems
Electronic Stability Control (ESC) Systems
3 Description
The INA270A-Q1 and INA271A-Q1 (INA27xA-Q1)
family of current-shunt monitors with voltage output
can sense voltage drops across current shunts at
common-mode voltages from –16 V to +80 V,
independent of the supply voltage. The INA27xA-Q1
pinouts readily enable filtering.
The INA27xA-Q1 devices are available with two
output voltage scales: 14 V/V and 20 V/V. The 130kHz bandwidth simplifies use in current-control loops.
The INA27xA-Q1 operates from a single 2.7-V to 18V supply, drawing a maximum of 900 μA of supply
current. They are specified over the extended
operating temperature range of –40°C to +125°C and
are offered in an SOIC-8 package.
Device Information(1)
PART NUMBER
INA270A-Q1
PACKAGE
SOIC (8)
INA271A-Q1
BODY SIZE (NOM)
4.90 mm × 3.91 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Schematic
RS
−16 V to +80 V
Supply
Load
Single-Pole Filter
Capacitor
+2.7 V to +18 V
IN+
IN–
5 kW
PRE OUT
BUF IN
0.01 µF
VS
0.1 µF
5 kW
OUT
A1
96 kW
A2
RL
GND
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
INA270A-Q1, INA271A-Q1
SBOS401C – JULY 2007 – REVISED APRIL 2016
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Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
3
3
7.1
7.2
7.3
7.4
7.5
7.6
3
4
4
4
4
6
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description .............................................. 9
8.1 Overview ................................................................... 9
8.2 Functional Block Diagram ......................................... 9
8.3 Feature Description................................................... 9
8.4 Device Functional Modes.......................................... 9
9
Application and Implementation ........................ 11
9.1 Application Information............................................ 11
9.2 Typical Application .................................................. 14
10 Power Supply Recommendations ..................... 16
10.1 Shutdown .............................................................. 16
11 Layout................................................................... 17
11.1 Layout Guidelines ................................................. 17
11.2 Layout Example .................................................... 17
12 Device and Documentation Support ................. 18
12.1
12.2
12.3
12.4
12.5
Related Links ........................................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
18
18
18
18
18
13 Mechanical, Packaging, and Orderable
Information ........................................................... 18
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (February 2010) to Revision C
Page
•
Updated data sheet title, Features, and Applications............................................................................................................. 1
•
Updated device name from INA270-Q1 and INA271-Q1 to INA270A-Q1 and INA271A-Q1 ................................................. 1
•
Added A-Q1 to INA270 and INA271 throughout document ................................................................................................... 1
•
Added Device Information table, ESD Ratings table, Feature Description section, Device Functional Modes,
Application and Implementation section, Power Supply Recommendations section, First- or Second-Order Filtering
section Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable
Information section. ................................................................................................................................................................ 1
•
Changed V+ to VS throughout ................................................................................................................................................ 3
•
Added equation (VIN+ + VIN–)/2 to common-mode in Absolute Maximum Ratings table......................................................... 3
•
Updated VSENSE equation........................................................................................................................................................ 4
•
Changed Input offset voltage temperature coefficient symbol ............................................................................................... 4
2
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5 Device Comparison Table
DEVICE
GAIN
INA270A-Q1
14 V/V
INA271A-Q1
20 V/V
6 Pin Configuration and Functions
D Package
8-Pin SOIC
Top View
(1)
IN±
1
8
IN+
GND
2
7
NC
PRE OUT
3
6
VS
BUF IN
4
5
OUT
(1)
NC – No internal connection
Pin Functions
PIN
TYPE (1)
DESCRIPTION
NAME
NO.
BUF IN
4
AI
Buffer Input. Connect to output of filter from PRE OUT
GND
2
A
Ground
IN–
1
AI
Negative input. Connect to load side of shunt resistor.
IN+
8
AI
Positive input. Connect to supply side of shunt resistor.
NC
7
—
Not internally connected. Connect to ground.
PRE OUT
3
AO
Pre Amplifier Output. Connect to input of filter to BUF IN.
OUT
5
AO
Output
VS
6
AI
Power supply, 2.7 V to 18 V
(1)
A = Analog, AI = Analog input, AO = Analog output
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
VS
Supply voltage
18
V
VSENSE
Differential analog input voltage range (VIN+ – VIN–)
–18
18
V
VCM
Common-mode analog input voltage range (VIN+ + VIN–)/2
–16
80
V
VO
Analog output voltage range (OUT and PRE OUT)
(GND – 0.3)
(VS) + 0.3
V
II
Input current (any pin)
5
mA
TJ
Maximum junction temperature
150
°C
TA
Operating free-air temperature
–40
125
°C
Tstg
Storage temperature
–65
150
°C
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
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7.2 ESD Ratings
VALUE
Human-body model (HBM), per AEC Q100-002 (1)
V(ESD)
(1)
Electrostatic discharge
UNIT
2000
Machine Model (MM)
100
Charged-device model (CDM), per AEC Q100-011
1000
V
AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
7.3 Recommended Operating Conditions
MIN
NOM
MAX
VS
Supply voltage
2.7
5
18
UNIT
V
VCM
Common mode input
–16
12
80
V
TA
Operating free-air temperature
–40
25
125
°C
7.4 Thermal Information
INA27xA-Q1
THERMAL METRIC
(1)
D (SOIC)
UNIT
8 PINS
RθJA
Junction-to-ambient thermal resistance
78.8
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
71.6
°C/W
RθJB
Junction-to-board thermal resistance
68.2
°C/W
ψJT
Junction-to-top characterization parameter
22
°C/W
ψJB
Junction-to-board characterization parameter
67.6
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
n/a
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
7.5 Electrical Characteristics
TA = 25°C, VS = 5 V, VCM = 12 V, VSENSE = 100 mV, PRE OUT connected to BUF IN (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
0.15
(VS – 0.2)/
Gain
V
80
V
Input
VSENSE
Full-scale input voltage
VSENSE = VIN+ - VIN–
VCM
Common-mode input voltage
TA = –40°C to +125°C
–16
VIN+ = –16 V to +80 V
80
120
VIN+ = 12 V to 80 V,
TA = –40°C to +125°C
100
120
CMRR
Common-mode rejection
VOS
Offset voltage, RTI (1)
dVOS/dT
Input offset voltage
temperature coefficient
TA = –40°C to +125°C
PSR
Offset voltage power-supply
rejection
VS = 2.7 V to 18 V, VCM = 18 V, TA = –40°C
to +125°C
IIB
Input bias current
ZO
Output impedance (2)
(1)
(2)
4
±0.5
TA = –40°C to +125°C
dB
2.5
±3
mV
2.5
20
μV/°C
5
100
μV/V
IN– pin, TA = –40°C to +125°C full range
±8
±16
PRE OUT pin
96
kΩ
Buffer input bias current
–50
nA
Buffer input bias current
temperature coefficient
±0.3
nA/°C
μA
RTI = referred to input
Initial resistor variation is ±30% with an additional –2200-ppm/°C temperature coefficient.
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Electrical Characteristics (continued)
TA = 25°C, VS = 5 V, VCM = 12 V, VSENSE = 100 mV, PRE OUT connected to BUF IN (unless otherwise noted)
PARAMETER
Output (VSENSE ≥ 20 mV)
TEST CONDITIONS
MIN
TYP
G
Gain
GBUF
Output buffer gain
INA270A-Q1
14
INA271A-Q1
20
UNIT
Total gain error
VSENSE = 20 mV to 100 mV
Total gain error
temperature coefficient
TA = –40°C to +125°C
Total output error (4)
V/V
2
±0.2%
ZO
MAX
(3)
TA = –40°C to
+125°C
TA = –40°C to +125°C
V/V
±1%
±2%
50
±0.75%
±2.2%
±1%
±3%
ppm/°C
Nonlinearity error
VSENSE = 20 mV to 100 mV
±0.002%
Output impedance
OUT pin
1.5
Ω
Maximum capacitive load
No sustained oscillation
10
nF
Voltage Output (5)
Swing to VS power-supply rail
Swing to GND
RL = 10 kΩ to GND, TA = –40°C to +125°C
RL = 10 kΩ to GND, TA = –40°C to +125°C
VS – 0.05
VS – 0.2
V
VGND +
V
+ 0.05
0.003 GND
V
Frequency Response
BW
Bandwidth
CL = 5 pF
130
kHz
φm
Phase margin
CL < 10 nF
40
degrees
SR
Slew rate
1
V/μs
ts
Settling time (1%)
2
μs
40
nV/√Hz
VSENSE = 10 mV to 100 mV, CL = 5 pF
Noise, RTI (1)
Vn
Voltage noise density
Power Supply
IQ
(3)
(4)
(5)
Quiescent current
VOUT = 2 V
700
900
VSENSE = 0 V, TA = –40°C to +125°C
350
950
μA
For output behavior when VSENSE < 20 mV, see Application Information
Total output error includes effects of gain error and VOS.
See Typical Characteristics curve Output Swing vs Output Current and Accuracy Variations as a Result of VSENSE and Common-Mode
Voltage in the Application Information section.
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7.6 Typical Characteristics
45
45
40
40
35
35
30
Gain (dB)
Gain (dB)
TA = 25°C, VS = 12 V, VCM = 12 V, VSENSE = 100 mV (unless otherwise noted)
G = 20
25
G = 14
20
30
G = 20
25
G = 14
20
15
15
10
10
5
5
10k
100k
10k
1M
100k
CLOAD = 1000 pF
CLOAD = 0 pF
Figure 1. Gain vs Frequency
Figure 2. Gain vs Frequency
140
18
130
Common−Mode and
Power−Supply Rejection (dB)
20
16
14
VOut (V)
20V/V
12
10
8
14V/V
6
4
2
1200
120
CMRR
110
100
90
PSR
80
70
60
50
40
1300
1100
900
1000
800
700
500
600
400
200
300
0
0
100
1M
Frequency (Hz)
Frequency (Hz)
10
100
1k
VDifferential (mV)
100k
10k
Frequency (Hz)
VS = 18 V
Figure 4. Common-Mode and Power-Supply Rejection vs
Frequency
4.0
0.1
3.5
0.09
0.08
3.0
Output Error (%)
Total Output Error
(% error of the ideal output value)
Figure 3. Gain Plot
2.5
2.0
1.5
1.0
0.07
0.06
0.05
0.04
0.03
0.02
0.5
0.01
0
0
50
100 150
200
250 300
350
400
450 500
0
–16 –12 –8 –4
VSENSE(mV)
Figure 5. Total Output Error vs VSENSE
6
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0
4
8
12 16
20
...
76 80
Common-Mode Voltage (V)
Figure 6. Output Error vs Common-Mode Voltage
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Typical Characteristics (continued)
TA = 25°C, VS = 12 V, VCM = 12 V, VSENSE = 100 mV (unless otherwise noted)
12
1000
11
10
9
800
25°C
8
700
–40°C
125°C
7
6
VS = 3V
Sourcing Current
25°C
5
4
600
IQ (µA)
Output Voltage (V)
900
VS = 12V
Sourcing Current
500
400
–40°C
300
3
200
2
100
1
125°C
0
0
0
5
10
20
15
25
30
0
1
2
Output Current (mA)
3
4
5
7
6
8
9
10
Output Voltage (V)
Output stage is designed to source current.
Current sinking capability is approximately 400 μA.
Figure 7. Positive Output Voltage Swing vs Output Current
Figure 8. Quiescent Current vs Output Voltage
34
VS= 12 V
VS= 2.7 V
775
IQ (µA)
675
575
475
VS= 12 V
375
VS = 2.7 V
275
175
−16 −12 −8 −4
Output Short-Circuit Current (mA)
875
–40°C
30
25°C
26
125°C
22
18
14
10
6
0
4
8
12 16
20
...
2.5 3.5
76 80
4.5
5.5 6.5
7.5
8.5
9.5 10.5 11.5 17
18
Supply Voltage (V)
VCM(V)
Figure 10. Output Short-Circuit Current vs Supply Voltage
Figure 9. Quiescent Current vs Common-Mode Voltage
200
150
Gain (dB)
Population
Phase
100
50
Gain
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
0
−50
10
100
RPREOUT (kΩ)
1k
10k
100k
1M
10M
Frequency(Hz)
Figure 11. Preout Output Resistance Production Distribution
Figure 12. Buffer Gain vs Frequency
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Typical Characteristics (continued)
50 mV/div
500 mV/div
TA = 25°C, VS = 12 V, VCM = 12 V, VSENSE = 100 mV (unless otherwise noted)
10 µs/div
10 µs/div
Figure 13. Small-Signal Step Response 10-mV to 20-mV
Input
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Figure 14. Large-Signal Step Response 10-mV to 100-mV
Input
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8 Detailed Description
8.1 Overview
The INA27xA-Q1 is a family of voltage output current-sense amplifiers. INA27xA-Q1 operates over a wide
common-mode voltage range (–16 V to +80 V). The package brings out the output of the pre amplifier stage
(PRE OUT) and the input to the output buffer stage (BUF IN). This pinout readily enables filtering, see First- or
Second-Order Filtering.
8.2 Functional Block Diagram
IN+
IN-
PRE OUT
BUF IN
VS
A1
OUT
A2
GND
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8.3 Feature Description
8.3.1 Output Voltage Range
The output of the INA27xA-Q1 is accurate within the output voltage swing range set by the power-supply pin, VS.
8.4 Device Functional Modes
8.4.1 First- or Second-Order Filtering
The INA27xA-Q1 devices readily enable the inclusion of filtering between the preamp output and buffer input.
Single-pole filtering can be accomplished with a single capacitor because of the 96-kΩ output impedance at
PRE OUT on pin 3 (see Figure 15a).
The INA27xA-Q1 devices readily lend themselves to second-order Sallen-Key configurations (see Figure 15b).
When designing these configurations consider that the PRE OUT 96-kΩ output impedance exhibits an initial
variation of ±30% with the addition of a –2200-ppm/°C temperature coefficient.
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Device Functional Modes (continued)
RS
Supply
Load
RS
Supply
Load
Second-Order, Sallen-Key Filter Connection
CFILT
Single-Pole Filter
Capacitor
RS
CFILT
+2.7 V to +18 V
IN+
PRE OUT
IN–
5 kW
BUF IN
+2.7 V to +18 V
VS
IN+
5 kW
5 kW
Output
A1
96 kW
A2
PRE OUT
IN–
BUF IN
VS
5 kW
A1
Output
96 kW
A2
RL
RL
GND
GND
a ) Single-Pole Filter
b ) Second−Order, Sallen−Key Filter
Copyright © 2016, Texas Instruments Incorporated
A.
The INA27xA-Q1 can be easily connected for first-order or second-order filtering. Remember to use the appropriate
buffer gain (INA270A-Q1 = 1.4, INA271A-Q1 = 2) when designing Sallen-Key configurations.
Figure 15. First-Order or Second-Order Filtering
10
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The INA27xA-Q1 measures the voltage developed across a current-sensing resistor when current passes
through it. There is also a filtering feature to remove unwanted transients and smooth the output voltage.
9.1.1 Basic Connection
Figure 16 illustrates the basic connection of the INA27xA-Q1. The input pins, IN+ and IN–, should be connected
as closely as possible to the shunt resistor to minimize any resistance in series with the shunt resistance. Powersupply bypass capacitors are required for stability. Applications with noisy or high-impedance power supplies
may require additional decoupling capacitors to reject power-supply noise. Minimum bypass capacitors of
0.01 μF and 0.1 μF in value should be placed close to the supply pins. Although not mandatory, an additional 10µF electrolytic capacitor placed in parallel with the other bypass capacitors may be useful in applications with
particularly noisy supplies.
RS
−16 V to +80 V
Supply
Load
Single-Pole Filter
Capacitor
+2.7 V to +18 V
IN+
IN–
5 kW
PRE OUT
BUF IN
0.01 µF
VS
0.1 µF
5 kW
OUT
A1
96 kW
A2
RL
GND
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Figure 16. INA270A-Q1 Basic Connection
9.1.2 Selecting RS
The value chosen for the shunt resistor, RS, depends on the application and is a compromise between smallsignal accuracy and maximum permissible voltage loss in the measurement line. High values of RS provide better
accuracy at lower currents by minimizing the effects of offset, while low values of RS minimize voltage loss in the
supply line. For most applications, best performance is attained with an RS value that provides a full-scale shunt
voltage range of 50 mV to 100 mV. Maximum input voltage for accurate measurements is (VS – 0.2)/Gain.
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Application Information (continued)
9.1.3 Accuracy Variations as a Result of VSENSE and Common-Mode Voltage
The accuracy of the INA27xA-Q1 current-shunt monitors is a function of two main variables: VSENSE (VIN+ – VIN–)
and common-mode voltage, VCM, relative to the supply voltage, VS. VCM is expressed as (VIN+ + VIN–)/2; however,
in practice, VCM is seen as the voltage at VIN+ because the voltage drop across VSENSE is usually small.
This section addresses the accuracy of these specific operating regions:
Normal Case 1: VSENSE ≥ 20 mV, VCM ≥ VS
Normal Case 2: VSENSE ≥ 20 mV, VCM < VS
Low VSENSE Case 1: VSENSE < 20 mV, –16 V ≤ VCM < 0
Low VSENSE Case 2: VSENSE < 20 mV, 0 V ≤ VCM ≤ VS
Low VSENSE Case 3: VSENSE < 20 mV, VS < VCM ≤ 80 V
9.1.3.1 Normal Case 1: VSENSE ≥ 20 mV, VCM ≥ VS
This region of operation provides the highest accuracy. Here, the input offset voltage is characterized and
measured using a two-step method. First, the gain is determined by Equation 1.
VOUT1 – VOUT2
G=
100 mV – 20 mV
where
•
•
VOUT1 = Output voltage with VSENSE = 100 mV
VOUT2 = Output voltage with VSENSE = 20 mV
(1)
Then the offset voltage is measured at VSENSE = 100 mV and referred to the input (RTI) of the current-shunt
monitor, as shown in Equation 2.
VOUT1
– 100 mV
VOSRTI (referred to input) =
G
(2)
(
(
In Typical Characteristics, the Output Error vs Common-Mode Voltage curve shows the highest accuracy for the
this region of operation. In this plot, VS = 12 V; for VCM ≥ 12 V, the output error is at its minimum. This case is
also used to create the VSENSE ≥ 20 mV output specifications in Electrical Characteristics.
9.1.3.2 Low VSENSE Case 1: VSENSE < 20 mV, –16 V ≤ VCM < 0; and
Low VSENSE Case 3: VSENSE < 20 mV, VS < VCM ≤ 80 V
Although the INA270A-Q1 family of devices are not designed for accurate operation in either of these regions,
some applications are exposed to these conditions. For example, when monitoring power supplies that are
switched on and off while VS is still applied to the INA27xA-Q1 devices, it is important to know what the behavior
of the devices is in these regions.
As VSENSE approaches 0 mV, in these VCM regions, the device output accuracy degrades. A larger-than-normal
offset can appear at the current-shunt monitor output with a typical maximum value of VOUT = 60 mV for
VSENSE = 0 mV. As VSENSE approaches 20 mV, VOUT returns to the expected output value with accuracy as
specified in Electrical Characteristics. Figure 17 illustrates this effect using the INA271A-Q1 (Gain = 20).
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Application Information (continued)
0.40
0.36
0.32
VOUT (V)
0.28
0.24
Actual
0.20
0.16
Ideal
0.12
0.08
0.04
0
0
2
4
6
8
10
12
14
16
18
20
VSENSE (mV)
Figure 17. Example for Low VSENSE Cases 1 and 3 (INA271A-Q1, Gain = 20)
9.1.3.3 Low VSENSE Case 2: VSENSE < 20 mV, 0 V ≤ VCM ≤ VS
This region of operation is the least accurate for the INA27xA-Q1 family. To achieve the wide input commonmode voltage range, these devices use two operational amplifier (op amp) front ends in parallel. One op amp
front end operates in the positive input common-mode voltage range, and the other in the negative input region.
For this case, neither of these two internal amplifiers dominates and overall loop gain is very low. Within this
region, VOUT approaches voltages close to linear operation levels for Normal Case 2.
This deviation from linear operation becomes greatest the closer VSENSE approaches 0 V. Within this region, as
VSENSE approaches 20 mV, device operation is closer to that described by Normal Case 2. Figure 18 illustrates
this behavior for the INA271A-Q1. The VOUT maximum peak for this case is determined by maintaining a
constant VS, setting VSENSE = 0 mV and sweeping VCM from 0 V to VS. The exact VCM at which VOUT peaks during
this case varies from part to part. The maximum peak voltage for the INA270A-Q1 is 0.28 V; for the INA271A-Q1,
the maximum peak voltage is 0.4 V.
0.48
INA271 VOUT Limit(1)
0.48
VCM1
0.40
Ideal
VOUT (V)
0.36
0.32
VCM2
0.28
VCM3
0.24
0.20
0.16
VOUT limit at VSENSE = 0mV,
0 ≤ VCM1 ≤ VS
VCM4
0.12
VCM2, VCM3, and VCM4 illustrate the variance
from part to part of the VCM that can cause
maximum VOUT with VSENSE < 20mV.
0.08
0.04
0
0
2
4
6
8
10
12
14
16
18
20
22
24
VSENSE (mV)
Figure 18. Example for Low VSENSE Case 2 (INA271A-Q1, Gain = 20)
9.1.4 Transient Protection
The –16-V to 80-V common-mode range of the INA27xA-Q1 is ideal for withstanding automotive fault conditions
ranging from 12-V battery reversal up to 80-V transients, since no additional protective components are needed
up to those levels. In the event that the INA27xA-Q1 devices are exposed to transients on the inputs in excess of
their ratings, external transient absorption with semiconductor transient absorbers (zeners or Transzorbs) are
necessary.
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Application Information (continued)
Use of MOVs or VDRs is not recommended except when they are used in addition to a semiconductor transient
absorber. Select the transient absorber such that it never allows the INA27xA-Q1 to be exposed to transients
greater than 80 V (that is, allow for transient absorber tolerance, as well as additional voltage because of
transient absorber dynamic impedance).
Despite the use of internal zener-type ESD protection, the INA27xA-Q1 devices are not suited to using external
resistors in series with the inputs, since the internal gain resistors can vary up to ±30%, but the internal resistors
are tightly matched. If gain accuracy is not important, then resistors can be added in series with the INA27xA-Q1
inputs, with two equal resistors on each input.
9.2 Typical Application
RS
−16 V to +80 V
Supply
Load
Single-Pole Filter
Capacitor
+2.7 V to +18 V
IN+
IN–
5 kW
PRE OUT
BUF IN
0.01 µF
VS
0.1 µF
5 kW
OUT
A1
96 kW
A2
RL
GND
Copyright © 2016, Texas Instruments Incorporated
Figure 19. Filtering Configuration
9.2.1 Design Requirements
In this application, the device is configured to measure a triangular periodic current at 10 kHz with filtering. The
average current through the shunt is the information that is desired. This current can be either solenoid current or
inductor current where current is being pulsed through.
Selecting the capacitor size is based on the lowest frequency component to be filtered out. The amount of signal
that is filtered out is dependant on this cutoff frequency. From the cutoff frequency, the attention is 20 dB per
decade.
9.2.2 Detailed Design Procedure
Without this filtering capability, an input filter must be used. When series resistance is added to the input, large
errors also come into play because the resistance must be large to create a low cutoff frequency. By using a
10-nF capacitor for the single-pole filter capacitor, the 10-kHz signal is averaged. The cutoff frequency made by
the capacitor is set at 166 Hz frequency. This frequency is well below the periodic frequency and reduces the
ripple on the output and the average current can easily be measured.
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Typical Application (continued)
9.2.3 Application Curves
Figure 20 shows the output waveform without filtering. The output signal tracks the input signal with a large
ripple. If this current is sampled by an ADC, many samples must be taken to average the current digitally. This
process takes additional time to sample and average and is very time consuming, thus is unwanted for this
application.
5
4.5
4.5
4
4
3.5
Output Voltage
Shunt and Output (V)
Shunt and Output (V)
Figure 21 shows the output waveform with filtering. The output signal is filtered and the average can easily be
measured with a small ripple. If this current is sampled by an ADC, only a few samples must be taken to
average. Digital averaging is now not required and the time required is significantly reduced.
3.5
Output Voltage
3
2.5
2
1.5
3
2.5
2
1.5
1
1
Shunt Voltage
Shunt Voltage
0.5
0.5
0
0
0
0.0002
0.0004
0.0006
100Ps/div
0.0008
0.001
0
0.0002
D001
Figure 20. Without Filtering
Copyright © 2007–2016, Texas Instruments Incorporated
Product Folder Links: INA270A-Q1 INA271A-Q1
0.0004
0.0006
100Ps/div
0.0008
0.001
D002
Figure 21. With Filtering
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10 Power Supply Recommendations
The input circuitry of the INA27xA-Q1 can accurately measure beyond its power-supply voltage, VS. For
example, the VS power supply can be 5 V, whereas the load power-supply voltage is up to 80 V. The output
voltage range of the OUT terminal, however, is limited by the voltages on the power-supply pin.
10.1 Shutdown
The INA27xA-Q1 devices do not provide a shutdown pin; however, because they consume a quiescent current
less than 1 mA, they can be powered by either the output of logic gates or by transistor switches to supply
power. Driving the gate low shuts down the INA27xA-Q1. Use a totem-pole output buffer or gate that can provide
sufficient drive along with 0.1-μF bypass capacitor, preferably ceramic with good high-frequency characteristics.
This gate should have a supply voltage of 3 V or greater, because the INA27xA-Q1 requires a minimum supply
greater than 2.7 V. In addition to eliminating quiescent current, this gate also turns off the 10-μA bias current
present at each of the inputs.
NOTE
The IN+ and IN– inputs are able to withstand full common-mode voltage under all
powered and under-powered conditions. Figure 22 shows an example of the shutdown
circuit.
IL
RS
−16 V to +80 V
Supply
Single-Pole Filter
Capacitor
IN+
Negative
and Positive
Common-Mode
Voltage
IN–
5 kW
PRE OUT
Load
BUF IN
VS
5 kW
VS > 3 V
OUT
A1
74HC04
0.01 µF
96 kW
A2
RL
GND
Copyright © 2016, Texas Instruments Incorporated
Figure 22. INA27xA-Q1 Example Shutdown Circuit Schematic
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SBOS401C – JULY 2007 – REVISED APRIL 2016
11 Layout
11.1 Layout Guidelines
•
•
Connect the input pins to the sensing resistor using a Kelvin or 4-wire connection. This connection technique
ensures that only the current-sensing resistor impedance is detected between the input pins. Poor routing of
the current-sensing resistor commonly results in additional resistance present between the input pins. Given
the very low ohmic value of the current resistor, any additional high-current carrying impedance can cause
significant measurement errors.
Place the power-supply bypass capacitor as closely as possible to the supply and ground pins. The
recommended value of this bypass capacitor is 0.1 μF. Additional decoupling capacitance can be added to
compensate for noisy or high-impedance power supplies.
11.1.1 RFI and EMI
Attention to good layout practices is always recommended. Keep traces short and, when possible, use a printed
circuit board (PCB) ground plane with surface-mount components placed as close to the device pins as possible.
Small ceramic capacitors placed directly across amplifier inputs can reduce RFI and EMI sensitivity. PCB layout
should locate the amplifier as far away as possible from RFI sources. Sources can include other components in
the same system as the amplifier itself, such as inductors (particularly switched inductors handling a lot of current
and at high frequencies). RFI can generally be identified as a variation in offset voltage or dc signal levels with
changes in the interfering RF signal. If the amplifier cannot be located away from sources of radiation, shielding
may be needed. Twisting wire input leads makes them more resistant to RF fields. The difference in input pin
location of the INA27xA-Q1 versus the INA193 through INA198 may provide different EMI performance.
11.2 Layout Example
Shunt Resistor
IN-
Single-Pole Filter
Capacitor
IN+
GND
NC
PRE
OUT
VS
BUF IN
Supply Bypass
Capacitor
Supply Voltage
OUT
Analog Output
Via to Power or Ground Plane
Via to Internal Layer
Figure 23. INA27xA-Q1 Example Layout
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12 Device and Documentation Support
12.1 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 1. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
INA270A-Q1
Click here
Click here
Click here
Click here
Click here
INA271A-Q1
Click here
Click here
Click here
Click here
Click here
12.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
16-Feb-2016
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
INA270AQDRQ1
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
INA270
INA271AQDRQ1
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
INA271
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
16-Feb-2016
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
IMPORTANT NOTICE
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