MOSFET DataSheet OptiMOS PowerManagement&Multimarket

MOSFET DataSheet OptiMOS PowerManagement&Multimarket
MOSFET
MetalOxideSemiconductorFieldEffectTransistor
OptiMOSTM
OptiMOSª5Power-Transistor,80V
BSZ075N08NS5
DataSheet
Rev.2.1
Final
PowerManagement&Multimarket
OptiMOSª5Power-Transistor,80V
BSZ075N08NS5
1Description
TSDSON-8FL
(enlarged source interconnection)
Features
•Idealforhighfrequencyswitchingandsync.rec.
•OptimizedtechnologyforDC/DCconverters
•ExcellentgatechargexRDS(on)product(FOM)
•Verylowon-resistanceRDS(on)
•N-channel,normallevel
•100%avalanchetested
•Pb-freeplating;RoHScompliant
•QualifiedaccordingtoJEDEC1)fortargetapplications
•Halogen-freeaccordingtoIEC61249-2-21
•Highersolderjointreliabilitywithenlargedsourceinterconnection
Table1KeyPerformanceParameters
Parameter
Value
Unit
VDS
80
V
RDS(on),max
7.5
mΩ
ID
40
A
Qoss
29
nC
QG(0V..10V)
24
nC
S1
8D
S2
7D
S3
6D
G4
5D
Type/OrderingCode
Package
Marking
RelatedLinks
BSZ075N08NS5
PG-TSDSON-8 FL
075N08N
-
1)
J-STD20 and JESD22
Final Data Sheet
2
Rev.2.1,2014-05-05
OptiMOSª5Power-Transistor,80V
BSZ075N08NS5
TableofContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Final Data Sheet
3
Rev.2.1,2014-05-05
OptiMOSª5Power-Transistor,80V
BSZ075N08NS5
2Maximumratings
atTj=25°C,unlessotherwisespecified
Table2Maximumratings
Parameter
Symbol
Continuous drain current
Values
Unit
Note/TestCondition
40
40
A
TC=25°C
TC=100°C
-
160
A
TC=25°C
-
-
104
mJ
ID=20A,RGS=25Ω
VGS
-20
-
20
V
-
Power dissipation
Ptot
-
-
69
W
TC=25°C
Operating and storage temperature
Tj,Tstg
-55
-
150
°C
IEC climatic category;
DIN IEC 68-1: 55/150/56
Unit
Note/TestCondition
Min.
Typ.
Max.
ID
-
-
ID,pulse
-
Avalanche energy, single pulse
EAS
Gate source voltage
Pulsed drain current1)
2)
3Thermalcharacteristics
Table3Thermalcharacteristics
Parameter
Symbol
Thermal resistance, junction - case
Device on PCB,
6 cm2 cooling area3)
Values
Min.
Typ.
Max.
RthJC
-
1.1
1.8
K/W
-
RthJA
-
-
60
K/W
-
1)
See figure 3 for more detailed information
See figure 13 for more detailed information
3)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection.
PCB is vertical in still air.
2)
Final Data Sheet
4
Rev.2.1,2014-05-05
OptiMOSª5Power-Transistor,80V
BSZ075N08NS5
4Electricalcharacteristics
Table4Staticcharacteristics
Parameter
Symbol
Drain-source breakdown voltage
Values
Unit
Note/TestCondition
-
V
VGS=0V,ID=1mA
3
3.8
V
VDS=VGS,ID=36µA
-
0.1
10
1
100
µA
VDS=80V,VGS=0V,Tj=25°C
VDS=80V,VGS=0V,Tj=125°C
IGSS
-
1
100
nA
VGS=20V,VDS=0V
Drain-source on-state resistance
RDS(on)
-
6.2
8.5
7.5
10.2
mΩ
VGS=10V,ID=20A
VGS=6V,ID=5A
Gate resistance
RG
-
1.3
2
Ω
-
Transconductance
gfs
21
42
-
S
|VDS|>2|ID|RDS(on)max,ID=20A
Unit
Note/TestCondition
Min.
Typ.
Max.
V(BR)DSS
80
-
Gate threshold voltage
VGS(th)
2.2
Zero gate voltage drain current
IDSS
Gate-source leakage current
Table5Dynamiccharacteristics
Parameter
Symbol
Values
Min.
Typ.
Max.
Ciss
-
1600
2080
pF
VGS=0V,VDS=40V,f=1MHz
Output capacitance
Coss
-
280
365
pF
VGS=0V,VDS=40V,f=1MHz
Reverse transfer capacitance1)
Crss
-
15
26
pF
VGS=0V,VDS=40V,f=1MHz
Turn-on delay time
td(on)
-
10
-
ns
VDD=40V,VGS=10V,ID=20A,
RG,ext=1.6Ω
Rise time
tr
-
4
-
ns
VDD=40V,VGS=10V,ID=20A,
RG,ext=1.6Ω
Turn-off delay time
td(off)
-
19
-
ns
VDD=40V,VGS=10V,ID=20A,
RG,ext=1.6Ω
Fall time
tf
-
4
-
ns
VDD=40V,VGS=10V,ID=20A,
RG,ext=1.6Ω
Unit
Note/TestCondition
Input capacitance
1)
Table6Gatechargecharacteristics2)
Parameter
Symbol
Values
Min.
Typ.
Max.
Qgs
-
7.5
-
nC
VDD=40V,ID=20A,VGS=0to10V
Gate to drain charge
Qgd
-
5.2
7.8
nC
VDD=40V,ID=20A,VGS=0to10V
Switching charge
Qsw
-
8.1
-
nC
VDD=40V,ID=20A,VGS=0to10V
Gate charge total
Qg
-
24
29.5
nC
VDD=40V,ID=20A,VGS=0to10V
Gate plateau voltage
Vplateau
-
4.6
-
V
VDD=40V,ID=20A,VGS=0to10V
Gate charge total, sync. FET
Qg(sync)
-
20
-
nC
VDS=0.1V,VGS=0to10V
Qoss
-
29
38.6
nC
VDD=40V,VGS=0V
Gate to source charge
1)
1)
Output charge
1)
2)
Defined by design. Not subject to production test
See ″Gate charge waveforms″ for parameter definition
Final Data Sheet
5
Rev.2.1,2014-05-05
OptiMOSª5Power-Transistor,80V
BSZ075N08NS5
Table7Reversediode
Parameter
Symbol
Diode continous forward current
Diode pulse current
Diode forward voltage
1)
Reverse recovery time
1)
Reverse recovery charge
1)
Values
Unit
Note/TestCondition
40
A
TC=25°C
-
160
A
TC=25°C
-
0.85
1.2
V
VGS=0V,IF=20A,Tj=25°C
trr
-
37
74
ns
VR=40V,IF=20A,diF/dt=100A/µs
Qrr
-
39
78
nC
VR=40V,IF=20A,diF/dt=100A/µs
Min.
Typ.
Max.
IS
-
-
IS,pulse
-
VSD
Defined by design. Not subject to production test
Final Data Sheet
6
Rev.2.1,2014-05-05
OptiMOSª5Power-Transistor,80V
BSZ075N08NS5
5Electricalcharacteristicsdiagrams
Diagram1:Powerdissipation
Diagram2:Draincurrent
80
50
40
60
ID[A]
Ptot[W]
30
40
20
20
10
0
0
25
50
75
100
125
150
0
175
0
25
50
75
TC[°C]
100
125
150
175
TC[°C]
Ptot=f(TC)
ID=f(TC);VGS≥10V
Diagram3:Safeoperatingarea
Diagram4:Max.transientthermalimpedance
3
101
10
1 µs
2
10
10 µs
ZthJC[K/W]
ID[A]
100
100 µs
101
DC
1 ms
10 ms
0.5
0.2
0.1
0.05
0.02
10-1
0.01
single pulse
0
10
10-1
10-1
100
101
102
10-2
10-5
10-4
VDS[V]
10-2
10-1
100
tp[s]
ID=f(VDS);TC=25°C;D=0;parameter:tp
Final Data Sheet
10-3
ZthJC=f(tp);parameter:D=tp/T
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Rev.2.1,2014-05-05
OptiMOSª5Power-Transistor,80V
BSZ075N08NS5
Diagram5:Typ.outputcharacteristics
Diagram6:Typ.drain-sourceonresistance
160
15
10 V
5V
5.5 V
7V
12
120
6V
RDS(on)[mΩ]
ID[A]
6V
80
5.5 V
40
0
5V
0
1
2
3
4
9
7V
10 V
6
3
0
5
0
20
40
VDS[V]
60
80
100
80
100
ID[A]
ID=f(VDS);Tj=25°C;parameter:VGS
RDS(on)=f(ID);Tj=25°C;parameter:VGS
Diagram7:Typ.transfercharacteristics
Diagram8:Typ.forwardtransconductance
160
100
80
120
gfs[S]
ID[A]
60
80
40
40
20
25 °C
150 °C
0
0
2
4
6
8
0
0
VGS[V]
40
60
ID[A]
ID=f(VGS);|VDS|>2|ID|RDS(on)max;parameter:Tj
Final Data Sheet
20
gfs=f(ID);Tj=25°C
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Rev.2.1,2014-05-05
OptiMOSª5Power-Transistor,80V
BSZ075N08NS5
Diagram9:Drain-sourceon-stateresistance
Diagram10:Typ.gatethresholdvoltage
15
4.0
3.5
12
360 µA
3.0
36 µA
2.5
max
VGS(th)[V]
RDS(on)[mΩ]
9
typ
6
2.0
1.5
1.0
3
0.5
0
-60
-20
20
60
100
140
0.0
-60
180
-20
20
60
Tj[°C]
100
140
180
Tj[°C]
RDS(on)=f(Tj);ID=20A;VGS=10V
VGS(th)=f(Tj);VGS=VDS;parameter:ID
Diagram11:Typ.capacitances
Diagram12:Forwardcharacteristicsofreversediode
4
103
10
25 °C
150 °C
25 °C, max
150 °C, max
Ciss
103
102
IF[A]
C[pF]
Coss
102
101
Crss
101
0
20
40
60
80
100
0.0
0.5
VDS[V]
1.5
2.0
2.5
VSD[V]
C=f(VDS);VGS=0V;f=1MHz
Final Data Sheet
1.0
IF=f(VSD);parameter:Tj
9
Rev.2.1,2014-05-05
OptiMOSª5Power-Transistor,80V
BSZ075N08NS5
Diagram13:Avalanchecharacteristics
Diagram14:Typ.gatecharge
102
12
40 V
10
20 V
60 V
25 °C
VGS[V]
IAV[A]
8
101
6
100 °C
4
125 °C
2
100
100
101
102
103
0
0
5
tAV[µs]
10
15
20
25
Qgate[nC]
IAS=f(tAV);RGS=25Ω;parameter:Tj(start)
VGS=f(Qgate);ID=20Apulsed;parameter:VDD
Diagram15:Drain-sourcebreakdownvoltage
Gate charge waveforms
90
VBR(DSS)[V]
80
70
60
-60
-20
20
60
100
140
180
Tj[°C]
VBR(DSS)=f(Tj);ID=1mA
Final Data Sheet
10
Rev.2.1,2014-05-05
OptiMOSª5Power-Transistor,80V
BSZ075N08NS5
6PackageOutlines
Figure1OutlinePG-TSDSON-8FL,dimensionsinmm/inches
Final Data Sheet
11
Rev.2.1,2014-05-05
OptiMOSª5Power-Transistor,80V
BSZ075N08NS5
RevisionHistory
BSZ075N08NS5
Revision:2014-05-05,Rev.2.1
Previous Revision
Revision
Date
Subjects (major changes since last revision)
2.1
2014-05-05
Release of Final Version
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Publishedby
InfineonTechnologiesAG
81726München,Germany
©2014InfineonTechnologiesAG
AllRightsReserved.
LegalDisclaimer
Theinformationgiveninthisdocumentshallinnoeventberegardedasaguaranteeofconditionsorcharacteristics.With
respecttoanyexamplesorhintsgivenherein,anytypicalvaluesstatedhereinand/oranyinformationregardingtheapplication
ofthedevice,InfineonTechnologiesherebydisclaimsanyandallwarrantiesandliabilitiesofanykind,includingwithout
limitation,warrantiesofnon-infringementofintellectualpropertyrightsofanythirdparty.
Information
Forfurtherinformationontechnology,deliverytermsandconditionsandpricespleasecontactyournearestInfineon
TechnologiesOffice(www.infineon.com).
Warnings
Duetotechnicalrequirements,componentsmaycontaindangeroussubstances.Forinformationonthetypesinquestion,
pleasecontactthenearestInfineonTechnologiesOffice.
TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or
automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa
failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand
aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare
intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis
reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered.
Final Data Sheet
12
Rev.2.1,2014-05-05
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