Infineon IPP027N08N5 MOSFET Data Sheet

MOSFET
MetalOxideSemiconductorFieldEffectTransistor
OptiMOSTM
OptiMOSª5Power-Transistor,80V
IPP027N08N5
DataSheet
Rev.2.0
Final
PowerManagement&Multimarket
OptiMOSª5Power-Transistor,80V
IPP027N08N5
1Description
TO-220-3
tab
Features
•Idealforhighfrequencyswitchingandsync.rec.
•ExcellentgatechargexRDS(on)product(FOM)
•Verylowon-resistanceRDS(on)
•N-channel,normallevel
•100%avalanchetested
•Pb-freeplating;RoHScompliant
•QualifiedaccordingtoJEDEC1)fortargetapplications
•Halogen-freeaccordingtoIEC61249-2-21
Table1KeyPerformanceParameters
Parameter
Value
Unit
VDS
80
V
RDS(on),max
2.7
mΩ
ID
120
A
Qoss
116
nC
QG(0V..10V)
99
nC
Type/OrderingCode
Package
IPP027N08N5
PG-TO220-3
1)
Drain
Pin 2, Tab
Gate
Pin 1
Source
Pin 3
Marking
027N08N5
RelatedLinks
-
J-STD20 and JESD22
Final Data Sheet
2
Rev.2.0,2014-12-17
OptiMOSª5Power-Transistor,80V
IPP027N08N5
TableofContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Final Data Sheet
3
Rev.2.0,2014-12-17
OptiMOSª5Power-Transistor,80V
IPP027N08N5
2Maximumratings
atTj=25°C,unlessotherwisespecified
Table2Maximumratings
Parameter
Symbol
Continuous drain current
Values
Unit
Note/TestCondition
120
120
A
TC=25°C
TC=100°C
-
480
A
TC=25°C
-
-
374
mJ
ID=100A,RGS=25Ω
VGS
-20
-
20
V
-
Power dissipation
Ptot
-
-
214
W
TC=25°C
Operating and storage temperature
Tj,Tstg
-55
-
175
°C
IEC climatic category;
DIN IEC 68-1: 55/175/56
Unit
Note/TestCondition
Min.
Typ.
Max.
ID
-
-
ID,pulse
-
Avalanche energy, single pulse
EAS
Gate source voltage
Pulsed drain current1)
2)
3Thermalcharacteristics
Table3Thermalcharacteristics
Parameter
Symbol
Thermal resistance, junction - case
Values
Min.
Typ.
Max.
RthJC
-
0.5
0.7
K/W
-
Thermal resistance, junction - ambient,
RthJA
minimal footprint
-
-
62
K/W
-
Thermal resistance, junction - ambient,
RthJA
6 cm2 cooling area3)
-
-
40
K/W
-
Soldering temperature, wave and
reflow soldering are allowed
-
-
260
°C
reflow MSL1
Tsold
1)
See figure 3 for more detailed information
See figure 13 for more detailed information
3)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection.
PCB is vertical in still air.
2)
Final Data Sheet
4
Rev.2.0,2014-12-17
OptiMOSª5Power-Transistor,80V
IPP027N08N5
4Electricalcharacteristics
Table4Staticcharacteristics
Parameter
Symbol
Drain-source breakdown voltage
Values
Unit
Note/TestCondition
-
V
VGS=0V,ID=1mA
3.0
3.8
V
VDS=VGS,ID=154µA
-
0.1
10
1
100
µA
VDS=80V,VGS=0V,Tj=25°C
VDS=80V,VGS=0V,Tj=125°C
IGSS
-
1
100
nA
VGS=20V,VDS=0V
Drain-source on-state resistance
RDS(on)
-
2.4
2.9
2.7
3.4
mΩ
VGS=10V,ID=100A
VGS=6V,ID=50A
Gate resistance1)
RG
-
1.4
2.1
Ω
-
Transconductance
gfs
89
177
-
S
|VDS|>2|ID|RDS(on)max,ID=100A
Unit
Note/TestCondition
Min.
Typ.
Max.
V(BR)DSS
80
-
Gate threshold voltage
VGS(th)
2.2
Zero gate voltage drain current
IDSS
Gate-source leakage current
Table5Dynamiccharacteristics1)
Parameter
Symbol
Input capacitance
Values
Min.
Typ.
Max.
Ciss
-
6900
8970
pF
VGS=0V,VDS=40V,f=1MHz
Output capacitance
Coss
-
1100
1430
pF
VGS=0V,VDS=40V,f=1MHz
Reverse transfer capacitance
Crss
-
49
86
pF
VGS=0V,VDS=40V,f=1MHz
Turn-on delay time
td(on)
-
22
-
ns
VDD=40V,VGS=10V,ID=100A,
RG,ext=1.6Ω
Rise time
tr
-
14
-
ns
VDD=40V,VGS=10V,ID=100A,
RG,ext=1.6Ω
Turn-off delay time
td(off)
-
46
-
ns
VDD=40V,VGS=10V,ID=100A,
RG,ext=1.6Ω
Fall time
tf
-
15
-
ns
VDD=40V,VGS=10V,ID=100A,
RG,ext=1.6Ω
Unit
Note/TestCondition
Table6Gatechargecharacteristics2)
Parameter
Symbol
Values
Min.
Typ.
Max.
Qgs
-
33
-
nC
VDD=40V,ID=100A,VGS=0to10V
Gate to drain charge
Qgd
-
21
32
nC
VDD=40V,ID=100A,VGS=0to10V
Switching charge
Qsw
-
35
-
nC
VDD=40V,ID=100A,VGS=0to10V
Gate charge total
Qg
-
99
123
nC
VDD=40V,ID=100A,VGS=0to10V
Gate plateau voltage
Vplateau
-
4.8
-
V
VDD=40V,ID=100A,VGS=0to10V
Gate charge total, sync. FET
Qg(sync)
-
85
-
nC
VDS=0.1V,VGS=0to10V
Qoss
-
116
155
nC
VDD=40V,VGS=0V
Gate to source charge
1)
1)
1)
Output charge
1)
2)
Defined by design. Not subject to production test.
See ″Gate charge waveforms″ for parameter definition
Final Data Sheet
5
Rev.2.0,2014-12-17
OptiMOSª5Power-Transistor,80V
IPP027N08N5
Table7Reversediode
Parameter
Symbol
Diode continous forward current
Diode pulse current
Diode forward voltage
1)
Reverse recovery time
1)
Reverse recovery charge
1)
Values
Unit
Note/TestCondition
120
A
TC=25°C
-
480
A
TC=25°C
-
0.95
1.2
V
VGS=0V,IF=100A,Tj=25°C
trr
-
84
168
ns
VR=40V,IF=100A,diF/dt=100A/µs
Qrr
-
187
374
nC
VR=40V,IF=100A,diF/dt=100A/µs
Min.
Typ.
Max.
IS
-
-
IS,pulse
-
VSD
Defined by design. Not subject to production test.
Final Data Sheet
6
Rev.2.0,2014-12-17
OptiMOSª5Power-Transistor,80V
IPP027N08N5
5Electricalcharacteristicsdiagrams
Diagram1:Powerdissipation
Diagram2:Draincurrent
250
140
120
200
100
150
ID[A]
Ptot[W]
80
60
100
40
50
20
0
0
50
100
150
0
200
0
50
100
TC[°C]
150
200
TC[°C]
Ptot=f(TC)
ID=f(TC);VGS≥10V
Diagram3:Safeoperatingarea
Diagram4:Max.transientthermalimpedance
3
100
10
1 µs
10 µs
102
0.5
100 µs
0.2
101
ZthJC[K/W]
ID[A]
1 ms
10 ms
DC
10-1
0.1
0.05
0.02
0.01
100
10-1
10-1
single pulse
100
101
102
10-2
10-5
10-4
VDS[V]
10-2
10-1
100
tp[s]
ID=f(VDS);TC=25°C;D=0;parameter:tp
Final Data Sheet
10-3
ZthJC=f(tp);parameter:D=tp/T
7
Rev.2.0,2014-12-17
OptiMOSª5Power-Transistor,80V
IPP027N08N5
Diagram5:Typ.outputcharacteristics
Diagram6:Typ.drain-sourceonresistance
480
5
5V
440
5.5 V
6V
7V
10 V
400
6V
4
360
320
RDS(on)[mΩ]
ID[A]
280
5.5 V
240
200
3
7V
10 V
2
160
5V
120
1
80
40
0
0
1
2
3
4
0
5
0
50
100
150
VDS[V]
200
250
300
350
400
450
500
ID[A]
ID=f(VDS);Tj=25°C;parameter:VGS
RDS(on)=f(ID);Tj=25°C;parameter:VGS
Diagram7:Typ.transfercharacteristics
Diagram8:Typ.forwardtransconductance
400
250
350
200
300
150
gfs[S]
ID[A]
250
200
100
150
100
50
175 °C
50
0
0
2
25 °C
4
6
8
0
0
VGS[V]
80
120
160
ID[A]
ID=f(VGS);|VDS|>2|ID|RDS(on)max;parameter:Tj
Final Data Sheet
40
gfs=f(ID);Tj=25°C
8
Rev.2.0,2014-12-17
OptiMOSª5Power-Transistor,80V
IPP027N08N5
Diagram9:Drain-sourceon-stateresistance
Diagram10:Typ.gatethresholdvoltage
6
4.0
3.5
5
1540 µA
3.0
4
154 µA
VGS(th)[V]
RDS(on)[mΩ]
2.5
max
3
typ
2.0
1.5
2
1.0
1
0.5
0
-60
-20
20
60
100
140
0.0
-60
180
-20
20
60
Tj[°C]
100
140
180
Tj[°C]
RDS(on)=f(Tj);ID=100A;VGS=10V
VGS(th)=f(Tj);VGS=VDS;parameter:ID
Diagram11:Typ.capacitances
Diagram12:Forwardcharacteristicsofreversediode
4
103
10
25 °C
175 °C
25 °C, max
175 °C, max
Ciss
Coss
102
IF[A]
C[pF]
103
Crss
102
101
101
0
20
40
60
80
100
0.0
0.5
VDS[V]
1.5
2.0
2.5
VSD[V]
C=f(VDS);VGS=0V;f=1MHz
Final Data Sheet
1.0
IF=f(VSD);parameter:Tj
9
Rev.2.0,2014-12-17
OptiMOSª5Power-Transistor,80V
IPP027N08N5
Diagram13:Avalanchecharacteristics
Diagram14:Typ.gatecharge
103
10
8
102
40 V
25 °C
VGS[V]
IAV[A]
6
100 °C
20 V
60 V
4
1
10
150 °C
2
100
100
101
102
103
0
0
tAV[µs]
40
80
120
Qgate[nC]
IAS=f(tAV);RGS=25Ω;parameter:Tj(start)
VGS=f(Qgate);ID=100Apulsed;parameter:VDD
Diagram15:Drain-sourcebreakdownvoltage
Gate charge waveforms
90
VBR(DSS)[V]
85
80
75
-60
-20
20
60
100
140
180
Tj[°C]
VBR(DSS)=f(Tj);ID=1mA
Final Data Sheet
10
Rev.2.0,2014-12-17
OptiMOSª5Power-Transistor,80V
IPP027N08N5
6PackageOutlines
Figure1OutlinePG-TO220-3,dimensionsinmm/inches
Final Data Sheet
11
Rev.2.0,2014-12-17
OptiMOSª5Power-Transistor,80V
IPP027N08N5
RevisionHistory
IPP027N08N5
Revision:2014-12-17,Rev.2.0
Previous Revision
Revision
Date
Subjects (major changes since last revision)
2.0
2014-12-17
Release of final version
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respecttoanyexamplesorhintsgivenherein,anytypicalvaluesstatedhereinand/oranyinformationregardingtheapplication
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Duetotechnicalrequirements,componentsmaycontaindangeroussubstances.Forinformationonthetypesinquestion,
pleasecontactthenearestInfineonTechnologiesOffice.
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automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa
failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand
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intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis
reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered.
Final Data Sheet
12
Rev.2.0,2014-12-17