Infineon 1ED020I12-FT Gate Driver Data Sheet

EiceDRIVER™

1ED020I12-FT

Single IGBT Driver IC

Final Data Sheet

Rev 2.0, 2012-07-31

Industrial Power Control

Edition 2012-07-31

Published by

Infineon Technologies AG

81726 Munich, Germany

©

2012 Infineon Technologies AG

All Rights Reserved.

Legal Disclaimer

The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party.

Information

For further information on technology, delivery terms and conditions and prices, please contact the nearest

Infineon Technologies Office (

www.infineon.com

).

Warnings

Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office.

Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

EiceDRIVER™

1ED020I12-FT

Revision History

Page or Item Subjects (major changes since previous revision)

Rev 2.0, 2012-07-31

Trademarks of Infineon Technologies AG

AURIX™, BlueMoon™, C166™, CanPAK™, CIPOS™, CIPURSE™, COMNEON™, EconoPACK™, CoolMOS™,

CoolSET™, CORECONTROL™, CROSSAVE™, DAVE™, EasyPIM™, EconoBRIDGE™, EconoDUAL™,

EconoPIM™, EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, I²RF™, ISOFACE™, IsoPACK™,

MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OmniTune™, OptiMOS™, ORIGA™, PRIMARION™,

PrimePACK™, PrimeSTACK™, PRO-SIL™, PROFET™, RASIC™, ReverSave™, SatRIC™, SIEGET™,

SINDRION™, SIPMOS™, SMARTi™, SmartLEWIS™, SOLID FLASH™, TEMPFET™, thinQ!™,

TRENCHSTOP™, TriCore™, X-GOLD™, X-PMU™, XMM™, XPOSYS™.

Other Trademarks

Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™,

PRIMECELL™, REALVIEW™, THUMB™, µVision™ of ARM Limited, UK. AUTOSAR™ is licensed by AUTOSAR development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™,

FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG.

FLEXGO™ of Microsoft Corporation. FlexRay™ is licensed by FlexRay Consortium. HYPERTERMINAL™ of

Hilgraeve Incorporated. IEC™ of Commission Electrotechnique Internationale. IrDA™ of Infrared Data

Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of

MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics

Corporation. Mifare™ of NXP. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™ of MURATA MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc.,

OmniVision™ of OmniVision Technologies, Inc. Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc.

RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc.

SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden

Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA.

UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™ of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of

Diodes Zetex Limited.

Last Trademarks Update 2010-10-26

Final Data Sheet 3 Rev 2.0, 2012-07-31

EiceDRIVER™

1ED020I12-FT

1

2

3

3.1

3.2

4.4

4.5

4.6

4.7

4.8

4.8.1

4.8.2

4.8.3

4.9

4

4.1

4.2

4.3

4.3.1

4.3.2

4.3.3

4.3.4

6

7

5.4.4

5.4.5

5.4.6

5.4.7

5.4.8

5.4.9

5

5.1

5.2

5.3

5.4

5.4.1

5.4.2

5.4.3

8

8.1

8.2

Table of Contents

Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Internal Protection Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Undervoltage Lockout (UVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

READY Status Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Watchdog Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Active Shut-Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Non-Inverting and Inverting Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Driver Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Two-Level Turn-Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Minimal On Time / Off Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

External Protection Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Desaturation Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Active Miller Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Electrical Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Recommended Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Voltage Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Logic Input and Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Active Miller Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Dynamic Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Desaturation Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Active Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Two-level Turn-off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Application Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Reference Layout for Thermal Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Printed Circuit Board Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31


EiceDRIVER™

1ED020I12-FT

List of Figures

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Typical Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Block Diagram 1ED020I12-FT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Pin Configuration PG-DSO-16-15 (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Application Example Bipolar Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Application Example Unipolar Supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Propagation Delay, Rise and Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Principle Switching Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Typical Switching Behavior. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 9 DESAT Switch-OFF Behavior. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 10 Short Switch ON Pulses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 11 Short Switch OFF Pulses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 12 Short Switch OFF Pulses, Ringing Surpression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 13 VCC2 Ramp Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Figure 14 VCC2 Ramp Down and VCC2 Drop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Figure 15 Typical

T

TLSET

Time over

C

TLSET

Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 16 PG-DSO-16-15 (Plastic (Green) Dual Small Outline Package) . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Figure 17 Reference Layout for Thermal Data (Copper thickness 102 μm) . . . . . . . . . . . . . . . . . . . . . . . . . . 31


EiceDRIVER™

1ED020I12-FT

List of Tables

Table 1

Table 2

Table 3

Table 4

Table 5

Table 6

Table 7

Table 8

Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Recommended Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Voltage Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Logic Input and Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Active Miller Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Table 9 Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Table 10 Dynamic Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Table 11 Desaturation Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Table 12 Active Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Table 13 Two-level Turn-off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24


EiceDRIVER™

Single IGBT Driver IC 1ED020I12-FT

1 Overview

Main Features

• Single channel isolated IGBT Driver

• For 600 V/1200 V IGBTs

• 2 A rail-to-rail output

• Vcesat-detection

• Active Miller Clamp

• Two level turn off

Product Highlights

• Coreless transformer isolated driver

• Galvanic Insulation

• Integrated protection features

• Suitable for operation at high ambient temperature

Typical Application

• Inverters for motor drives

• UPS systems

• Welding

Description

The 1ED020I12-FT is a galvanic isolated single channel IGBT driver in PG-DSO-16-15 package that provides an output current capability of typically 2A.

All logic pins are 5V CMOS compatible and could be directly connected to a microcontroller.

The data transfer across galvanic isolation is realized by the integrated Coreless Transformer Technology.

The 1ED020I12-FT provides several protection features like IGBT two level turn off, desaturation protection, active

Miller clamping and active shut down.

Product Name

1ED020I12-FT

Final Data Sheet

Gate Drive Current

±2 A

7

Package

PG-DSO-16-15

Rev 2.0, 2012-07-31

IN+, IN-, /RST

/FLT, RDY

Input Side

VCC1

Output Side

VCC2_H

EiceDRIVER

TM

1ED020I12-FT

DESAT

CLAMP

OUT

TLSET

GND2

CPU

IN+, IN-, /RST

/FLT, RDY

GND1

VCC1

VEE2_H

VCC2_L

EiceDRIVER

TM

1ED020I12-FT

DESAT

CLAMP

OUT

TLSET

GND2

VEE2_L

Figure 1 Typical Application

GND1

EiceDRIVER™

1ED020I12-FT

Overview


EiceDRIVER™

1ED020I12-FT

Block Diagram

2 Block Diagram

VCC1 15 UVLO

&

IN+ 10

1

VCC1

IN11

VCC1

RDY 12

1

VCC1

/FLT 13

1

VCC1

/RST 14 delay delay

& delay

/RDY

DECODER RX

FLT

Q

S

R

1

RST

9

GND1

1

16

GND1

Figure 2 Block Diagram 1ED020I12-FT

TX RX

20MHz

OSC LOGIC

TX ENCODER

1ED020I12-FT

&

UVLO 5 VCC2

K4

2V

7 CLAMP

&

VCC2

VEE2

&

6 OUT

7V

VCC2

500µA

VEE2

4 TLSET

VCC2

FLT2

Q S

R

≥1

VEE2

1

VEE2

8

VEE2

K3

9V

2

3

DESAT

GND2


3

EiceDRIVER™

1ED020I12-FT

Pin Configuration and FunctionalityPin Configuration

Pin Configuration and Functionality

3.1

Pin Configuration

13

14

15

16

9

10

11

12

5

6

7

8

1

2

3

4

Table 1 Pin Configuration

Pin No. Name Function

VEE2

DESAT

GND2

TLSET

Negative power supply output side

Desaturation protection

Signal ground output side

Two level set

VCC2

OUT

CLAMP

VEE2

Positive power supply output side

Driver output

Miller clamping


GND1

IN+

IN-

RDY

/FLT

/RST

VCC1

GND1

Ground input side

Non inverted driver input

Inverted driver input

Ready output

Fault output, low active

Reset input, low active

Positive power supply input side

Ground input side

5

6

7

8

1

2

3

4

VEE2

DESAT

GND2

TLSET

VCC2

OUT

CLAMP

VEE2

Figure 3 Pin Configuration PG-DSO-16-15 (top view)

GND1

VCC1

/RST

/FLT

RDY

IN-

IN+

GND1

12

11

10

9

16

15

14

13


EiceDRIVER™

1ED020I12-FT

Pin Configuration and FunctionalityPin Functionality

3.2

Pin Functionality

GND1

Ground connection of the input side.

IN+ Non Inverting Driver Input

IN+ control signal for the driver output if IN- is set to low. (The IGBT is on if IN+ = high and IN- = low)

A minimum pulse width is defined to make the IC robust against glitches at IN+. An internal Pull-Down-Resistor ensures IGBT Off-State.

IN- Inverting Driver Input

IN- control signal for driver output if IN+ is set to high. (IGBT is on if IN- = low and IN+ = high)

A minimum pulse width is defined to make the IC robust against glitches at IN-. An internal Pull-Up-Resistor ensures IGBT Off-State.

/RST Reset Input

Function 1: Enable/shutdown of the input chip. (The IGBT is off if /RST = low). A minimum pulse width is defined to make the IC robust against glitches at /RST.

Function 2: Resets the DESAT-FAULT-state of the chip if /RST is low for a time T

RST is used to ensure /FLT status output.

. An internal Pull-Up-Resistor

/FLT Fault Output

Open-drain output to report a desaturation error of the IGBT (/FLT is low if desaturation occurs)

RDY Ready Status

Open-drain output to report the correct operation of the device (RDY = high if both chips are above the UVLO level and the internal chip transmission is faultless).

VCC1

5 V power supply of the input chip

VEE2

Negative power supply pins of the output chip. If no negative supply voltage is available, all VEE2 pins have to be connected to GND2.

DESAT Desaturation Detection Input

Monitoring of the IGBT saturation voltage (V

CE

) to detect desaturation caused by short circuits. If OUT is high, V

CE is above a defined value and a certain blanking time has expired, the desaturation protection is activated and the

IGBT is switched off. The blanking time is adjustable by an external capacitor.

CLAMP Miller Clamping

Ties the gate voltage to ground after the IGBT has been switched off at a defined voltage to avoid a parasitic switch-on of the IGBT.During turn-off, the gate voltage is monitored and the clamp output is activated when the gate voltage goes below 2 V below VEE2.


EiceDRIVER™

1ED020I12-FT

Pin Configuration and FunctionalityPin Functionality

GND2 Reference Ground

Reference ground of the output chip.

OUT Driver Output

Output pin to drive an IGBT. The voltage is switched between VEE2 and VCC2. In normal operating mode Vout is controlled by IN+, IN- and /RST. During error mode (UVLO, internal error or DESAT) Vout is set to VEE2 independent of the input control signals.

VCC2

Positive power supply pin of the output side.

TLSET Two Level Turn Off Adjust

Circuitry at TLSET adjust the two level turn off time with an external capacitor to GND2 and the two level voltage with an external Zener diode to GND2, for wave forms please see

Figure 9

.


EiceDRIVER™

1ED020I12-FT

Functional DescriptionIntroduction

4 Functional Description

4.1

Introduction

The 1ED020I12-FT is an advanced IGBT gate driver for motor drives typical greater 10 kW. Control and protection functions are included to make possible the design of high reliability systems.

The device consists of two galvanic separated parts. The input chip can be directly connected to a standard 5 V

DSP or microcontroller with CMOS in/output and the output chip is connected to the high voltage side.

An effective active Miller clamp function avoids the need of negative gate driving in some applications and allows the use of a simple bootstrap supply for the high side driver.

A rail-to-rail driver output enables the user to provide easy clamping of the IGBTs gate voltage during short circuit of the IGBT. So an increase of short circuit current due to the feedback via the Miller capacitance can be avoided.

Further, a rail-to-rail output reduces power dissipation.

The device also includes an IGBT desaturation protection with a /FAULT status output.

A two-level turn-off feature with adjustable delay protects against excessive overvoltage at turn-off in case of overcurrent or short circuit condition. The same delay is applied at turn-on to prevent pulse width distortion.

A READY status output reports if the device is supplied and operates correctly.

+5V

SGND

IN+

RDY

FLT

RST

100n

VCC1

GND1

IN+

IN-

RDY

/FLT

/RST

VCC2

DESAT

CLAMP

OUT

TLSET

GND2

VEE2

1µ

+15V

10R

1µ

-8V

1k

10V 47p 220p

Figure 4 Application Example Bipolar Supply

4.2

Supply

The driver 1ED020I12-FT is designed to support two different supply configurations, bipolar supply and unipolar supply.

In bipolar supply the driver is typically supplied with a positive voltage of 15V at VCC2 and a negative voltage of

-8V at VEE2, refer to

Figure 4

. Negative supply prevents a dynamic turn on due to the additional charge which

is generated from IGBT input capacitance times negative supply voltage. If an appropriate negative supply voltage is used, connecting CLAMP to IGBT gate is redundant and therefore typically not necessary.

For unipolar supply configuration the driver is typically supplied with a positive voltage of 15V at VCC2. Erratically dynamic turn on of the IGBT could be prevented with active Miller clamp function, so CLAMP output is directly connected to IGBT gate, refer to

Figure 5

.


EiceDRIVER™

1ED020I12-FT

Functional DescriptionInternal Protection Features

+5V

SGND

IN+

RDY

FLT

RST

100n

VCC1

GND1

IN+

IN-

RDY

/FLT

/RST

Figure 5

4.3

Application Example Unipolar Supply

Internal Protection Features

VCC2

DESAT

CLAMP

OUT

TLSET

GND2

VEE2

1µ

+15V

1k

10R

10V 47p 220p

4.3.1

Undervoltage Lockout (UVLO)

To ensure correct switching of IGBTs the device is equipped with an undervoltage lockout for both chips, refer to

Figure 13

and

Figure 14

.

If the power supply voltage V

VCC1

of the input chip drops below V

UVLOL1

a turn-off signal is sent to the output chip before power-down. The IGBT is switched off and the signals at IN+ and IN- are ignored as long as V the power-up voltage V

UVLOH1

.

VCC1

reaches

If the power supply voltage V

VCC2

of the output chip goes down below V

UVLOL2

the IGBT is switched off and signals from the input chip are ignored as long as V

VCC2

reaches the power-up voltage V otherwise negative supply voltage range from 0 V to -12 V would not be possible.

UVLOH2

. VEE2 is not monitored,

4.3.2

READY Status Output

The READY output at pin /RDY shows the status of three internal protection features.

• UVLO of the input chip

• UVLO of the output chip after a short delay

• Internal signal transmission after a short delay

It is not necessary to reset the READY signal since its state only depends on the status of the former mentioned protection signals.

4.3.3

Watchdog Timer

During normal operation the internal signal transmission is monitored by a watchdog timer. If the transmission fails for a given time, the IGBT is switched off and the READY output reports an internal error.

4.3.4

Active Shut-Down

The Active Shut-Down feature ensures a safe IGBT off-state if the output chip is not connected to the power supply, IGBT gate is clamped at OUT to VEE2.


EiceDRIVER™

1ED020I12-FT

Functional DescriptionNon-Inverting and Inverting Inputs

4.4

Non-Inverting and Inverting Inputs

There are two possible input modes to control the IGBT. At non-inverting mode IN+ controls the driver output while

IN- is set to low. At inverting mode IN- controls the driver output while IN+ is set to high, refer to

Figure 7

. A

minimum input pulse width is defined to filter occasional glitches.

4.5

Driver Output

The output driver section uses only MOSFETs to provide a rail-to-rail output. This feature permits that tight control of gate voltage during on-state and short circuit can be maintained as long as the drivers supply is stable. Due to the low internal voltage drop, switching behaviour of the IGBT is predominantly governed by the gate resistor.

Furthermore, it reduces the power to be dissipated by the driver.

4.6

Two-Level Turn-Off

The Two-Level Turn-OFF introduces a second turn off voltage level at the driver output in between ON- and OFFlevel, refer to

Figure 8

. This additional level ensures lower V

CE

overshoots at turn off by reducing gate emitter voltage of the IGBT at short circuits or over current events. The V

GE

level is adjusting the current of the IGBT at the end two level turn off interval, the required timing is depending on stray inductance and over current at beginning of two level turn off interval.

Reference voltage level and hold up time could be adjusted at TLSET pin. The reference voltage is set by the required Zener diode connected between pin TLSET and GND2. The holdup time is set by the capacitor connected to the same pin TLSET and GND2.

The hold time can be adjusted during switch on using the whole capacitance connected at pin TLSET including capacitor, parasitic wiring capacitance and junction capacitance of Zener diode. When a switch on signal is given the IC starts to discharge C

TLSET

. Discharging C

TLSET

is stopped after 500 ns. Then Ctlset is charged with an internal charge current I charging C

TLSET

up to V

TLSET

. When the voltage of the capacitor C

ZDIODE

TLSET

exceeds 7 V a second current source starts

. At the end of this discharge-charge cycle the gate driver is switched on.

The time between IN initiated switch-on signal (minus an internal propagation delay of approximately 200 ns) and switch-on of the gate drive is sampled and stored digitally. It represents the two level turn off set time T

TLSET switch-off. Due to digitalization the tpdon time can vary in time steps of 50 ns.

during

If switch off is initiated from IN+, IN- or /RST signal, the gate driver is switched off immediately after internal propagation delay of approximately 200 ns and V

OUT

begins to decrease to the second gate voltage level.

For switch off initiated by DESAT, the gate driver switch off is delayed by desaturation sense to OUT delay, afterwards V

OUT

begins to decrease to the second gate voltage level.

For reaching second gate voltage level the output voltage V

OUT

is sensed and compared with the Zener voltage

V

ZDIODE

. When V

OUT interrupted and V

OUT

falls below the reference voltage V

ZDIODE

is adjusted to V

ZDIODE

of the Zener diode the switch off process is

. OUT is switched to VEE2 after the holdup time has passed.

The Two-Level Turn-OFF function cannot be disabled.


EiceDRIVER™

1ED020I12-FT

Functional DescriptionMinimal On Time / Off Time

4.7

Minimal On Time / Off Time

The 1ED020I12-FT driver requires minimal on and off time for proper operation in the application. Minimal on time must be greater than the adjustable two level plateau time T

TLSET

, shorter on times will be suppressed by generating of the plateau time refer to

Figure 10

. Due to the short on time, the voltage at TLSET pin does not reach the comparator threshold; therefore the driver does not turn on. A similar principle takes place for off time.

Minimal off time must be greater than T

TLSET

; shorter off times will be suppressed, which means OUT stays on

refer to

Figure 11

. A two level turn off plateau cannot be shortened by the driver. If the driver has entered the turn

off sequence it cannot switch off due to the fact, that the driver has already entered the shut off mode. But if the driver input signal is turned on again, it will leave the lower level after T

TLSET

time by switching OUT to high, refer

to

Figure 12

.

4.8

External Protection Features

4.8.1

Desaturation Protection

A desaturation protection ensures the protection of the IGBT at short circuit. When the DESAT voltage goes up and reaches 9 V, the output is driven low, refer to

Figure 9

. Further, the FAULT output is activated. A programmable blanking time is used to allow enough time for IGBT saturation. Blanking time is provided by a highly precise internal current source and an external capacitor.

4.8.2

Active Miller Clamp

In a half bridge configuration the switched off IGBT tends to dynamically turn on during turn on phase of the opposite IGBT. A Miller clamp allows sinking the Miller current across a low impedance path in this high dV/dt situation. Therefore in many applications, the use of a negative supply voltage can be avoided.

During turn-off, the gate voltage is monitored and the clamp output is activated when the gate voltage goes below typical 2 V (related to VEE2). The clamp is designed for a Miller current up to 2 A.

4.8.3

Short Circuit Clamping

During short circuit the IGBTs gate voltage tends to rise because of the feedback via the Miller capacitance. An additional protection circuit connected to OUT and CLAMP limits this voltage to a value slightly higher than the supply voltage. A current of maximum 500 mA for 10 μs may be fed back to the supply through one of this paths.

If higher currents are expected or a tighter clamping is desired external Schottky diodes may be added.

4.9

RESET

The reset input has two functions.

Firstly, /RST is in charge of setting back the FAULT output. If /RST is low longer than a given time, /FLT will be

cleared at the rising edge of /RST, refer to

Figure 9

; otherwise, it will remain unchanged. Moreover, it works as

enable/shutdown of the input logic, refer to

Figure 7

.


EiceDRIVER™

1ED020I12-FT

Electrical ParametersAbsolute Maximum Ratings

5 Electrical Parameters

5.1

Absolute Maximum Ratings

Note: Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction of the integrated circuit. Unless otherwise noted all parameters refer to GND1.

Table 2

Parameter

Absolute Maximum Ratings



Maximum power supply voltage output side

(V

VCC2

- V

VEE2

)

Gate driver output

Gate driver high output maximum current

Gate & Clamp driver low output maximum current

Maximum short circuit clamping time


Logic input voltages

(IN+,IN-,RST)

Opendrain Logic output voltage (FLT)

Opendrain Logic output voltage (RDY)

Opendrain Logic output current (FLT)

Opendrain Logic output current (RDY)

Pin DESAT voltage

Pin CLAMP voltage

Input to output isolation voltage (GND2)

Junction temperature

Storage temperature

Power dissipation, per input part

Power dissipation, per output part

Thermal resistance (Input part)

Thermal resistance (Output chip active)

ESD Capability

1) With respect to GND2.

Symbol

V

V

V

VCC2

VEE2 max2

V

OUT

I

OUT

I

OUT

t

CLP

V

VCC1

V

LogicIN

V

FLT#

V

RDY

I

FLT#

I

RDY

V

DESAT

V

CLAMP

V

ISO

T

J

T

S

P

D, IN

P

D, OUT

R

THJA,IN

R

THJA,OUT

V

ESD

Min.

-0.3

-12

–

Values

Max.

20

0.3

28

V

VEE2

-0.3

–

–

–

-0.3

-0.3

-0.3

-0.3

–

–

-0.3

-0.3

–

–

–

–

-1200

-40

-55

–

Unit

V

V

max2

+0.3 V

2.4

A

2.4

A

10

6.5

6.5

6.5

6.5

10

10

V

VCC2

+0.3

V

VCC2

+0.3

2)

1200

150

150

100

700

160

125

1.5

V

V

μs

V

V

V

V mA mA

V

V

V

°C

°C mW mW

K/W

K/W kV

– t = 2 µs t = 2 µs

–

–

–

–

1)

Note /

Test Condition

1)

1)

–

–

–

I

CLAMP/OUT

500 mA

=

3)

–

–

4)

@

T

A

= 25°C

4)

@

T

A

= 25°C

4)

@

T

A

= 25°C

4)

@

T

A

= 25°C

Human Body

Model

5)


EiceDRIVER™

1ED020I12-FT

Electrical ParametersOperating Parameters

2) May be exceeded during short circuit clamping.

3) With respect to VEE2.

4) Output IC power dissipation is derated linearly at 10 mW/°C above 62°C. Input IC power dissipation does not require derating. See

Figure 17

for reference layouts for these thermal data. Thermal performance may change significantly with layout and heat dissipation of components in close proximity.

5) According to EIA/JESD22-A114-B (discharging a 100 pF capacitor through a 1.5 k

Ω

series resistor).

5.2

Operating Parameters

Note: Within the operating range the IC operates as described in the functional description. Unless otherwise noted all parameters refer to GND1.

Table 3

Parameter

Operating Parameters

Symbol Values

Min.

Max.



V

VCC2

V

VEE2

V

max2

13

-12

20

0

Maximum power supply voltage output side

(

V

VCC2

-

V

VEE2

)


Logic input voltages

(IN+,IN-,RST)

V

VCC1

V

LogicIN

–

4.5

-0.3

28

5.5

5.5

Pin CLAMP voltage

Pin DESAT voltage

Pin TLSET voltage

V

CLAMP

V

DESAT

V

TLSET

V

VEE2

-0.3

-0.3

-0.3

V

V

V

VCC2

2)

VCC2

VCC2

Ambient temperature

Common mode transient immunity

3)

T

A

-40

|D

V

ISO

/dt| –

105

50


2) May be exceeded during short circuit clamping.

3) The parameter is not subject to production test - verified by design/characterization

Unit

V

V

V

V

V

V

V

V

°C kV/

μs

–

–

Note /

Test Condition

1)

1)

–

–

1)

1)

–

@ 500 V

5.3

Recommended Operating Parameters

Note: Unless otherwise noted all parameters refer to GND1.

Table 4 Recommended Operating Parameters

Parameter





Symbol

V

VCC2

V

VEE2

V

VCC1

Value

15

-8

5

V

V

Unit

V

Note / Test Condition

1)

1)

–


EiceDRIVER™

1ED020I12-FT

Electrical ParametersElectrical Characteristics

5.4

Electrical Characteristics

Note: The electrical characteristics include the spread of values in supply voltages, load and junction temperatures given below. Typical values represent the median values at T

A

= 25°C. Unless otherwise noted all voltages are given with respect to their respective GND (GND1 for pins 9 to 16, GND2 for pins 1 to 8).

5.4.1

Voltage Supply

Table 5

Parameter

Voltage Supply

Symbol

UVLO Threshold Input Chip

V

UVLOH1

V

UVLOL1

V

HYS1

UVLO Hysteresis Input Chip

(

V

UVLOH1

-

V

UVLOL1

)

UVLO Threshold Output Chip

UVLO Hysteresis Output Chip

(

V

UVLOH1

-

V

UVLOL1

)

Quiescent Current Input Chip

V

UVLOH2

V

UVLOL2

V

HYS2

I

Q1

Min.

–

3.5

0.15

–

10.4

0.7

–

Quiescent Current Output Chip

I

Q2

–

12.0

11.0

0.9

7

Values

Typ.

4.1

3.8

–

–

–

Max.

4.3

12.6

–

–

9

4.5

6

Unit Note / Test Condition

V

V

V

V

V

V mA mA

–

–

–

–

–

–

V

VCC1

=5 V

IN+ = High,

IN- = Low

=>OUT = High,

RDY = High,

/FLT = High

V

V

VCC2

=15 V

VEE2

=-8 V

IN+ = High,

IN- = Low

=>OUT = High,

RDY = High,

/FLT = High


EiceDRIVER™

1ED020I12-FT


5.4.2

Logic Input and Output

Table 6

Parameter

Logic Input and Output

Symbol

IN+,IN-, RST Low Input Voltage

IN+,IN-, RST High Input Voltage

IN-, RST Input Current

V

V

IN+L

,

IN-L

,

V

RSTL#

V

V

IN+H

IN-H

,

,

V

RSTH#

I

IN-

,

I

RST#

IN+ Input Current

RDY,FLT Pull Up Current

Min.

–

3.5

-400

I

IN+

,

I

PRDY

,

I

PFLT#

–

-400

Input Pulse Suppression IN+,

IN-

Input Pulse Suppression RST for ENABLE/SHUTDOWN

Pulse Width RST for Reseting FLT

FLT Low Voltage

RDY Low Voltage

T

MININ+

,

T

MININ-

T

MINRST

T

RST

V

FLTL

V

RDYL

30

30

800

–

–

–

Values

Typ.

–

Max.

1.5

Unit

V

Note /

Test Condition

–

–

–

–

–

40

40

-100

100

-100

–

400

–

–

–

–

300

300

V

μA

μA

μA ns ns ns mV mV

–

V

V

IN-

= GND1

RST#

= GND1

V

IN+

= VCC1

V

V

RDY

= GND1

FLT#

= GND1

–

–

–

I

SINK(FLT#)

= 5 mA

I

SINK(RDY)

= 5 mA


EiceDRIVER™

1ED020I12-FT


5.4.3

Gate Driver

Table 7

Parameter

Gate Driver

Symbol

High Level Output

Voltage

High Level Output Peak

Current

Low Level Output

Voltage

Low Level Output Peak

Current

V

OUTH1

V

OUTH2

V

OUTH3

V

OUTH4

I

OUTH

V

OUTL1

V

OUTL2

V

OUTL3

V

OUTL4

I

OUTL

–

–

–

–

1.5

Min.

V

VCC2

-1.2

V

VCC2

-2.5

V

VCC2

-9

–

-1.5

Values

Typ.

V

VCC2

-0.8

V

VCC2

-2.0

V

VCC2

-5

V

VCC2

-10

-2.0

–

–

–

–

Max.

–

Unit

V

VEE2

+0.04

V

VEE2

+0.3

V

VEE2

+2.1

V

VEE2

+7

2.0

V

VEE2

+0.09

V

V

VEE2

+0.85

V

V

VEE2

+5.0

V

– V

– A

V

V

V

V

A


I

OUTH

= -20 mA

I

OUTH

= -200 mA

I

OUTH

= -1 A

I

OUTH

= -2 A

IN+ = High, IN- = Low;

OUT = High

I

OUTL

= 20 mA

I

OUTL

= 200 mA

I

OUTL

= 1 A

I

OUTL

= 2 A

IN+ = Low, IN- = Low;

OUT = Low,

V

V

VCC2

=15 V,

VEE2

=-8 V

5.4.4


Table 8

Parameter


Symbol Values Unit

Min.

Typ.

Max.

Low Level Clamp

Voltage

V

CLAMPL1

V

CLAMPL2

V

CLAMPL3

I

CLAMPL

–

–

–

V

VEE2

+0.03

V

VEE2

+0.3

V

VEE2

+1.9

–

V

VEE2

+0.08 V

V

VEE2

+0.8

V

V

VEE2

+4.8

V

– A Low Level Clamp

Current

2

Clamp Threshold

Voltage

V

CLAMP

1.6

2.1

2.4


V


I

OUTL

= 20 mA

I

OUTL

= 200 mA

I

OUTL

= 1 A

1)

Related to VEE2


EiceDRIVER™

1ED020I12-FT


5.4.5


Table 9

Parameter


Symbol

Clamping voltage (OUT)

(

V

OUT

-

V

VCC2

)

Clamping voltage

(CLAMP) (

V

VCLAMP

-

V

VCC2

)

V

CLPout

Min.

–

V

CLPclamp

–

Clamping voltage (CLAMP)

V

CLPclamp

–

Values

Typ.

0.8

Max.

1.3

1.3

0.7

–

1.1

Unit

V

V

V


IN+=High, IN- = Low,

OUT = High

I

OUT

= 500 mA

(pulse test,

t

CLPmax

= 10 μs)

IN+ = High, IN- = Low,

OUT = High

I

CLAMP

= 500 mA

(pulse test,

t

CLPmax

= 10 μs)

IN+ = High, IN- = Low,

I

OUT = High

CLAMP

= 20 mA

5.4.6

Dynamic Characteristics

Dynamic characteristics are measured with

V

VCC1

= 5 V

VCC2

= 15 V and

V

VEE2

= -8 V.

Table 10 Dynamic Characteristics

Parameter Symbol Unit

Min.

1.5

Values

Typ.

1.75

Max.

2.0

μs IN+, IN- input to output propagation delay ON and

OFF

IN+, IN- input to output propagation delay distortion

(

T

PDOFF

-

T

PDON

)

IN+, IN- input to output propagation delay ON variation due to temp

IN+, IN- input to output propagation delay OFF variation due to temp

IN+, IN- input to output propagation delay distortion variation due to temp

(

T

PDOFF

-

T

PDON

)

Rise Time

T

PDON

T

PDISTO

T

PDONt

T

PDOFFt

T

PDISTOt

T

RISE

-40

–

–

–

10

-10

–

–

–

30

20

200

230

25

60 ns ns ns ns ns

150 400 800 ns


C

TLSET

= 0,

T

A

= 25°C

C

TLSET

= 0,

T

A

= 25°C

1)

C

TLSET

= 0

1)

C

TLSET

= 0

1)

C

TLSET

=0

C

V

LOAD

= 1 nF,

L

10%,

V

H

90%

C

LOAD

= 34 nF

V

L

10%,

V

H

90%


EiceDRIVER™

1ED020I12-FT


Table 10

Dynamic Characteristics (cont’d)

Parameter Symbol

Fall Time

T

FALL

Min.

10

Values

Typ.

20

Max.

40

Unit

ns

100 250 500 ns


5.4.7

Desaturation Protection


C

V

LOAD

= 1 nF

L

10%,

V

H

90%

C

LOAD

= 34 nF

V

L

10%,

V

H

90%

Table 11 Desaturation Protection


Blanking Capacitor Charge

Current

I

DESATC

Min.

450

Blanking Capacitor

Discharge Current

I

DESATD

11

Desaturation Reference

Level

Desaturation Sense to OUT

TLTO

Desaturation Sense to FLT

Low Delay

Desaturation Low Voltage

V

DESAT

T

DESATOUT

T

DESATFLT

V

DESATL

8.5

–

–

40

5.4.8

Active Shut Down

Values

Typ.

500

Max.

550

15

9

250

–

70

–

9.5

320

2.25

110

V ns

μs mV

Unit

μA mA


V

V

VCC2

=15 V,

VEE2

=-8 V

V

DESAT

= 2 V

V

V

VCC2

=15 V,

VEE2

=-8 V

V

DESAT

=6 V

V

VCC2

=15 V

V

C

OUT

=90%

LOAD

= 1 nF

I

V

FLT #

=10%;

FLT #

=5 mA

IN+=Low, IN-=Low,

OUT=Low

Table 12 Active Shut Down


Active Shut Down Voltage

1) With reference to VEE2

V

ACTSD

1)

Min.

–

Values

Typ.

–

Max.

2.0

Unit

V

Note /

Test Condition

I

V

OUT

= -200 mA,

CC2

open


EiceDRIVER™

1ED020I12-FT


5.4.9

Two-level Turn-off

Table 13 Two-level Turn-off


External reference voltage range

(Zener-Diode)

Reference Voltage for setting two-level delay time

Current for setting two-level delay time and external reference voltage (Zener-Diode)

External Capacitance Range

V

ZDIODE

V

TLSET

I

TLSET

C

TLSET

Min.

7.5

6.6

420

0

Values

Typ.

–

Unit

Max.

V

CC2

-0.5

V

7 7.3

V

500 550 μA

Note /

Test Condition

–

–

V

TLSET

= 10 V

– 220 pF –


EiceDRIVER™

1ED020I12-FT

Timing DiagramsElectrical Characteristics

6 Timing Diagrams

All diagrams related to the Two-level switch-off feature

IN+

50%

OUT

50%

T

PDON

T

PDOFF

Figure 6 Propagation Delay, Rise and Fall Time

IN+

IN-

/RST

OUT

Figure 7 Principle Switching Behavior

IN+

V

ZDIODE

TLSET

T

PD

T

ADJ1

T

TLSET

OUT

T

PDONADJ

Figure 8 Typical Switching Behavior

T

PD

T

TLFALL

90%

10%

T

RISE

V

TLSET

, typ. 7V

T

TLSET

T

FALL

V

ZDIODE


EiceDRIVER™

1ED020I12-FT


IN+

T

PDON

OUT

V

DESAT

typ. 9V

DESAT

T

DESATOUT

/FLT

/RST

T

DESATFLT

T

TLSET

T

DESATOUT

T

TLSET

>T

RSTmin

T

DESATFLT

Figure 9 DESAT Switch-OFF Behavior

IN+

TLSET

T

TLSET

T

TLSET

OUT

Figure 10 Short Switch ON Pulses

T

PD

T

TLSET

T

PDON

T

PDOFF

T

PDON

T

PD


IN+

TLSET

T

PD

T

TLSET

OUT

T

PDOFF

T

PDON

Figure 11 Short Switch OFF Pulses

IN+

TLSET

T

PD

OUT

T

TLSET

T

PDON

T

TLSET

T

PDOFF

T

TLSET

T

PDOFF

T

TLSET

T

PDOFF

EiceDRIVER™

1ED020I12-FT


T

PD

T

TLSET

T

PDOFF

T

PDON

T

TLSET

T

PDOFF

T

PD forced turn off after three consecutive on -cycles

T

PDON

Figure 12 Short Switch OFF Pulses, Ringing Surpression


EiceDRIVER™

1ED020I12-FT


V

UVLOH2

VCC2

IN+

OUT

I

DESAT

RDY

Figure 13 VCC2 Ramp Up

VCC2

V

V

UVLOH2

UVLOL2

T

PDD

IN+

TLSET

Vz

OUT

T

PDON

T

PDD

RDY

/FLT

Figure 14 VCC2 Ramp Down and VCC2 Drop

T

TLSET

T

PDON

T

PDD

T

PDOFF


EiceDRIVER™

1ED020I12-FT


5

4

3

2

1

0

0 50

C

100

TLSET

[pF]

Figure 15 Typical

T

TLSET

Time over

C

TLSET

Capacitance

150 200


7 Package Outlines

EiceDRIVER™

1ED020I12-FT

Package OutlinesElectrical Characteristics

DIM c

D

E

E1 e

N

L h

Ĭ

A

A1 b

0.12

0.35

0.23

10.21

10.16

7.42

MIN

-

MILLIMETERS

MAX

2.64

0.29

0.48

0.32

10.47

10.41

7.59

1.27 BSC

16

0.61

0.25

0°

1.02

0.41

8°

MIN

-

0.005

0.014

0.009

0.402

0.400

0.292

0.024

0.010

0°

INCHES

MAX

0.104

0.011

0.019

0.013

0.412

0.410

0.299

0.050 BSC

16

0.040

0.016

8°

Figure 16

PG-DSO-16-15 (Plastic (Green) Dual Small Outline Package)

Final Data Sheet 30

DOCUMENT NO.

Z8B00166131

SCALE

0

0 1.0

1.0

2mm

EUROPEAN PROJECTION

ISSUE DATE

31.07.2012

REVISION

02

Rev 2.0, 2012-07-31

EiceDRIVER™

1ED020I12-FT

Application NotesReference Layout for Thermal Data

8 Application Notes

8.1

Reference Layout for Thermal Data

The PCB layout shown in

Figure 17

represents the reference layout used for the thermal characterisation. Pins 9 and 16 (GND1) and pins 1 and 8 (VEE2) require ground plane connections for achiving maximum power dissipation. The 1ED020I12-FT is conceived to dissipate most of the heat generated through this pins.

Top Layer

Bottom Layer

Figure 17 Reference Layout for Thermal Data (Copper thickness 102 μm)

8.2

Printed Circuit Board Guidelines

Following factors should be taken into account for an optimum PCB layout.

• Sufficient spacing should be kept between high voltage isolated side and low voltage side circuits.

• The same minimum distance between two adjacent high-side isolated parts of the PCB should be maintained to increase the effective isolation and reduce parasitic coupling.

• In order to ensure low supply ripple and clean switching signals, bypass capacitor trace lengths should be kept as short as possible.

• Lowest trace length for VEE2 to GND2 decoupling could be achieved with capacitor closed to pins 1 and 3.


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