JUNE 1974 TT-PACKARDJOURNAL I ! © Copr. 1949-1998 Hewlett-Packard Co. A New Generation in Frequency and Time Measurements This new general-purpose electronic counter refines the art of frequency and time measurements to an impressive degree by the application of advanced technology. by James L. Sorden THE MODERN HISTORY of measuring time and frequency with general-purpose electronic in strumentation dates from the vacuum-tube counters of the early-1950's. As technology moved from vacu um tubes to transistors, better input amplifiers and digital circuits were designed and the frequency lim its of electronic counters advanced from 10 MHz to 50 MHz. Integrated circuits of the late 1960's brought the cost of electronic counters down but left perfor mance relatively unchanged. A significant jump in the performance of general-purpose machines for the measurement of time and time-related quantities awaited the development of wideband digital logic circuits and high-sensitivity de-coupled input am plifiers. In the story of the new Model 5345A Electronic Counter (Fig. 1), development of these critical cir cuits fills the largest chapter. However, the story doesn't end there. At least four major technical con tributions have gone into this radically new generalpurpose plug-in counter: High-sensitivity dc amplifiers provide state-ofthe-art front-end signal conditioning for fre quency and pulse measurements. 500-MHz E2L logic greatly improves resolution for time interval measurements. ROM-controlled reciprocal frequency measure ments provide constant high resolution independ ent of frequency. White noise modulation of the time base clock yields consistent picosecond-resolution time in terval average measurements. Model 5345A can measure any frequency from 50 /LiHz to 500 MHz. Above 1 Hz it gives nine-digit res olution in a one-second measurement. It resolves one-shot time intervals to two nanoseconds, and measures the frequencies of RF pulses as brief as 50 nanoseconds. With its improved time interval aver aging, it can resolve repetitive time intervals to one picosecond. Frequency averaging, a technique new with the 5345A, substantially improves precision in measurements of the frequencies of pulsed micro wave signals. Cover: Model 5345A Elec tronic Counter advances the art of pulsed RF frequency measurements with fre quency averaging, a new technique that improves resolution even for very short gate times. By controlling the position of the gate (inten sified section of bursts in cover photo) one can measure the frequency profile within a burst. In this Issue: A New Generation in Frequency and Time Measurements, by James L. S o r d e n p a g e 2 The 5345A Processor: An Example of State Machine Design, by Ronald E. F e l s e n s t e i n p a g e 9 Time Interval Averaging: Theory, Prob lems, and Solutions, by David C. Chu page 12 Third Input Channel Increases Counter Versatility, by Arthur S. Muto page 16 A Completely Automatic 4-GHz Heterodyne Frequency Converter, by A l i B o l o g l u . . . . . p a g e 1 9 Interface Bus Expands Instrument Util ity, by Bryce E. Jeppsen and Steven E. S c h u l t z p a g e 2 2 t Hewlett-Packard Company. 1974 Printed m U S A © Copr. 1949-1998 Hewlett-Packard Co. Fig. 1. Model 5345A Electronic Counter is a new general-purpose plug-in instrument for frequency and time measurements. It has an 1 1 -digit display, 10-mV sensitivity, and 500-MHz direct count capa bility. The p/ug-in shown, Model 5354A, extends the frequency measurement range to 4 GHz. The new counter has two input amplifier chan nels. Each has 10-mV sensitivity from dc to 500 MHz, is de-coupled, and has switchable input im pedance: 1 megohm/30 pF or 50 ohms. The 5345A is the first high-frequency counter that uses standard oscilloscope probes, either 10:1 compensating highimpedance types or 50-ohm probes. A new family of high-performance plug-ins is under design, and two are already available. How ever, virtually all of the existing plug-ins for the 5345A's predecessor, the widely-used Model 5245L, function in the 5345A with improved speed and res olution. One of the two new plug-ins is the first automatic heterodyne converter that can measure pulsed mi crowave signals as well as CW signals (see article, page 19). The second new plug-in adds a third 10-mV 500-MHz input channel, which is especially useful in analyzing data communications circuits (see ar ticle, page 16). Full digital output and remote programming input are available for the new counter, which is compa tible with the HP interface bus (see article, page 22). Frequency Measurements close the measuring gate at subnanosecond speeds. A new family of 500-MHz monolithic IC's were de signed specifically for the 5345A and are manufac tured by HP. Time interval averaging is not new with the 5345A. What is new is that for the first time, pico second-resolution time interval measurements can be made with no harmonic problems. It can be shown that averaging reduces the Â±1 count (Â±2 ns) quantization error to an rms value of 1/VrT count, where n is the number of samples averaged. How ever, for true averaging, the counter's gating signal must maintain a uniform phase distribution around the counter's clock period. Measurements made when the distribution is not uniform will lead to an "average" value that is biased away from the true value no matter how many intervals are averaged. This occurs whenever the repetition rate of the in- 500 MHz Â± 2 x 10 9 1 10 1 x 10 To make a frequency measurement, the 5345A first makes a period measurement, then inverts the period to get frequency, which it displays. Nominal gate times are set with a front-panel switch, and these determine resolution. Fig. 2 compares the reso lution of the new counter with that of conventional direct counters. The key to the new counter's highfrequency capability and high resolution in brief measuring periods is its 500-MHz clock coupled with the reciprocal technique. Time Interval and T.I. Average Measurements Time interval measurements are made by the 5345A mainframe. To resolve single time interval measurements meaningfully to two nanoseconds it is not enough to have a clock period of two nanosec onds (500 MHz). It is also necessary to open and 1 x 10 ' 1 x 10 1 x 10 - 1 x 10 1 Hz 100 Hz 10kHz 1 MHz Input Frequency 100 MHz 1 GHz Fig. 2. Model 5345A is a reciprocal-taking counter. This diagram compares its resolution with that of conventional direct frequency counters for a one-second measurement. © Copr. 1949-1998 Hewlett-Packard Co. Input Pulsed RF Signal f External Gate External Gate Event Gate Synchronizer Internal Arming Signal Event Counter 500 MHz Clock Fig. 3. Synchronizers track RF bursts in frequency-average measurements, a technique new with the 5345A. Benefit is improved resolution over single measurements. coming signal has any harmonic or submultiple rela tionship to the counter's clock frequency. The 5345A is the first counter to recognize this problem and to guarantee truly useful averaged meas urements under all circumstances. This is achieved by deliberately adding jitter to the 500-MHz clock by modulating it with white noise (see article, page 12). Jitter of slightly greater than one period at 500 MHz is generated by modulating the time base clock with band-limited Gaussian noise. Pulsed RF and Frequency Averaging Because it needs only a brief measurement period, the 5345A is well suited for frequency measure ments of pulsed RF signals. Gate openings as brief as 50 nanoseconds may be selected (one micro second is usually the minimum found in electronic counters). To make a single-shot carrier frequency measurement of an RF burst, all that is necessary is to select a gate time narrower than the burst. The counter will trigger on the leading edge of the burst and measure for the selected time. With external gating, the counter can measure the frequency profile within a burst. Or, to improve resolution for very narrow pulses, it can average frequency measurements over many pulses. This capability, new with this instrument, produces res olution never before attainable. In frequency-average measurements, synchro nizers (Fig. 3) track the RF bursts in such a manner that the averaged sum appears in the event counter and time counter. The pulsed bursts are clocked through the event gate flip-flop synchronously with an externally applied gate pulse. The event gate flipflop output is then used to synchronize the time counter such that with a zero-biased jittered 500MHz time base clock, the averaging will increase the resolution of a single shot measurement from Â±1 count to an rms value of approximately 1/Vn count, where n is the number of pulsed RF bursts averaged. This improvement is qualified by the pulsed RF gate pulse width and the noise bandwidth of the jittered clock. Accuracy also improves, the amount of im provement depending mainly on how precisely the system has been calibrated. The jittering is absolutely mandatory. Without it, it is not possible to assure either unique samples or a zero-biased answer. Fig. 4 gives theoretical (colored line) and typical (black line) improve ments of pulsed RF measurement resolution. The curve flattening in the log-log resolution improve ment plot occurs because of the band-limited nature of the Gaussian noise used to jitter the time base clock. Counter Architecture Fig. 5 is the 5345A's block diagram. System ar chitecture is designed to support a wide variety of measurement capabilities, present and future. The arithmetic processor performs fifteen-digit addition, subtraction, multiplication, and division. It also does display formatting on mainframe meas urements and sum-of-products calculations on plug-in measurements. The T2L design operates at a clock rate of 2 MHz. 4096 bits of read-only-memory Gate Time 100 s 10 s 1s 1 X 1 0 1 x 10 Â» -t 1 x 10-1 © Copr. 1949-1998 Hewlett-Packard Co. 10ns 100ns is 10 ,-s 100,. s 1ms 10ms Gate Pulse Width Fig. 4. Resolution in pulsed RF measurements as a function of external gate width. Colored lines show theoretical reso lution. Black lines show typical resolution. Other Controls Same As in Channel B I/O Connector Plug-in B Channel B Trigger Level Attenuation Slope Level or - 1 or x 20 1 Ml! Function Gate Time Strobed 11 Digit LED Display Frequency Standard Output 10 MHz 1 V rms into 50!) External Frequency Standard Input 1-10 MHz Gate Time Minimum 50 ns 100 ns to 1000 s 10 MHz Crystal Oscillator Decade Steps Multiplier Buffer *1 Arbitrary External Gate Time Fig. 5. computation 5345/4 Counter's ROM-controlled processor performs various computation and control elim For averaged measurements, jitter is added to the time base clock to elim inate coherence errors. are organized into 128 32-bit instructions. 62 quali fiers are used in the algorithmic state machine de sign (see article, page 9). Data storage and manipula tion in this three-register machine are provided by three 16 x 4-bit T2L RAMs. Instruction inputs for the various arithmetic rou tines and subroutines come from front-panel or re mote-control function definition, plug-in arithmetic requirements, output formatting instructions, and input data (contents of the event counter and time counter). For a frequency measurement, the event counter totalizes the number of cycles for a given unit of time defined by the time counter Â±2 ns. Both event and time counters consist of n-1013 scaling registers. The highest-speed element is a 500-MHz Hewlett-Packard E2L binary followed by an E2L dec ade, the next quinary (25 MHz) is commercial Schottky T2L and the last -HlO11 dividers consist of HP PMOS -105 and -nlO6 LSI divider chips. Input Amplifier and Attenuator Design The 5345A's 10-mV, 500-MHz input amplifier is a three-stage integrated-circuit design. Fig. 6 is its circuit diagram. The 500-MHz bandwidth is a result of three factors: the use of a fast 1C technology that had previously been used only for digital circuits, the somewhat unusual circuit configuration, and fre quency compensation of the circuit on the 1C wafer. The first stage is a series-shunt feedback pair, its low frequency gain proportional to (RE1 + RF1)/REl. Capacitor CEl shapes the response at high frequen cies. The second stage is a dc level shifter and low-out put-impedance emitter-follower impedance convert er. Its purpose is to minimize loading of the first stage. The dc level shift is accomplished by using the emitter-base reverse breakdown voltage of a transistor, with the collector open to reduce offsets caused by leakage currents. The third stage is a compensated cascode ampli fier that reduces the Miller effect for large load re sistors. Third stage gain is determined by resistor RE2 and capacitor CE2. An unusual aspect of this amplifier is the com pensation of the overall response by adjusting CE1 and CE2 at the second metal layer. The second metal layer is used to interconnect small MOS capacitors to obtain a total capacitor value that will compensate for wafer-to-wafer processing variations. The choice of capacitor values is governed by measurements of © Copr. 1949-1998 Hewlett-Packard Co. 38 mA 18 mA BIAS Fig. contributions 5345A. input amplifier is one of the major design contributions in the 5345A. the characteristics of a test transistor and a test re sistor on the 1C wafer. A photomicrograph of the integrated circuit is shown in Fig. 6. The MOS capacitors are visible as large rectangular metal areas. Also visible in the photomicrograph are several metal strips used in each capacitor, and the test transistor in the lower right-hand corner of the chip. The input resistance of the amplifier is greater than 10 kfl and the equivalent input capacitance is less than 1 pF.1 This monolithic 1C amplifier is incorporated into the input amplifier and attenuator design shown in Fig. 7. To meet the requirements of low-frequency, high-impedance measurements, the attenuator is constructed with high-impedance components. Fre quency compensation in the attenuator extends its useful frequency response to beyond 500 MHz. The attenuator impedance is changed to 50Ã1 by a switched, compensated 50Ã1 termination. To facilitate risetime or pulse width measure ments, in which start and stop events occur on the same signal line, the two input amplifiers may be paralleled. In this mode, good termination is assured by a 50Ã1 power splitter. High-Speed Logic The key to making high-resolution single-shot time interval and/or fast bit-rate measurements on computer or communications digital data is the development of a family of digital logic of com patible speed. Currently, several manufacturers have some form of 1C binary capable of toggling at rates in excess of 500 MHz. The problem that had to be solved to make a higher-performance counter pos sible was to develop logic circuits with enough gain and bandwidth to match the performance of the prescaling binaries. 5345A logic circuits are of E2L (emitter-emitter logic) type.2 E2L differs from ECL (emitter-coupled logic) in that the E2L output is an open collector whose logic swing is approximately 0V and â€”0.8V into an external 50ÃÃ load, whereas ECL circuits have emitter-follower outputs and logic swings of approx imately -0.8V to -1.6V. By means of a combination of techniques, including an unusual circuit configu ration, useful frequency response of a typical E2L gate has been extended to greater than 650 MHz. E2L cir cuit outputs are compatible with 50fl microstrip interconnect techniques, which are mandatory at the 500 megabit/second rates. Fig. 8 shows the 500-MHz logic circuit on a multilayer printed-circuit board using microstrip interconnect techniques. Time Base The accuracy of any counter depends ultimately on the stability of the time base. The standard time base for the 5345A Electronic Counter is a state-ofthe-art 10-MHz oven-stabilized oscillator. The 10 MHz is multiplied to 500 MHz for clock purposes. Aging rate is under 5 parts in 1010 per day, and short- © Copr. 1949-1998 Hewlett-Packard Co. Fig. switchable, or amplifier and attenuator. Input impedance is switchable, 1 Mil/30 pF or 50Ãœ. term stability is better than one part in 1011 for a 1-second average. This is the most stable standardequipment oscillator in present-day commercial in strumentation. Acknowledgments The author is indebted to Merrill Brooksby, Dexter Hartke, John Dukes, and Darwin Throne for their leadership and encouragement throughout the years of development. In addition to the several engineers who have authored other articles appearing in this journal, a special word of thanks must go to Steve Upshinsky for his design of the input amplifier and to Jose FurIan for his pioneer work on 500 MHz E2L gates. John Gliever's RF design with associated noise modula tion scheme made true time interval averaging pos sible. The product design by Keith Leslie afforded the electronic designers great latitude. Successful production has been assured by the efforts of Tom Coates, who designed most of the production testing techniques, and Phil Deaver, whose production engineering effort has been out standing. Holly Cole and Dick Holmes have assured us of a fine marketing and service program. Finally, a personal word of thanks to Dan Lansdon, whose early encouragement made it possible for me to en joy the many opportunities at Hewlett-Packard. T References 1. R.I. Ollins and S.f. Ratner, "Computer-Aided Design and Optimization of a Broad-Band High-Frequency Mono lithic Amplifier", IEEE Journal of Solid-State Circuits. Vol. SC-7, pp. 487-492, Dec. 1972. 2. M. Brooksby. et. al., Fast Logic Extends Range of HighFrequency Counters". Electronics, Vol. 43, pp. 62-67, Dec. 7, 1970. 3. "Time Interval Averaging", Hewlett-Packard Applica tion Note 162-1. © Copr. 1949-1998 Hewlett-Packard Co. Fig. 8. 5345A main gate, a 500MHz logic system. Multilayer printed-circuit boards and microstrip techniques contribute to the wide bandwidth. C O N D E N S E D S P E C I F I C A T I O N S HP Model 5345A Electronic Counter Frequency. Frequency Average. Period, Period Average Scaling luency and period are measured Dy measuring the total elapsed limi i integral number ol cycles N cri me input waveform Computation in he quantities ol N and T provides direct readout of either frequency o period RANGE. 50 uHz to 500 MHz 2 nsec to 20.000 seconds MEASUREMENT TIME: Consists ot GATE TIME plus the lime required to reach the neÂ« STOP trigger level When m MIN the GATE TIME s ess than 50 nanoseconds Decade GATE TIME ranges com too nsec to 1000 sec ACCURACY: Resolution ts nine digits per second o> measurement time With DISPLAY POSITION switch m AUTO !he least significant digit error is * 1 count it the most significant digit is i through 4 and 1 2 counls if the most significan! rj.g.1 is 5 through 9 Accuracy is Â± LSD counts - time base accur acy - Ingger error Time Interval. Time Interval Average RANGE: '0 nsec to 20 000 sec MINIMUM TIME BETWEEN TRIGGER POINTS. 10 nsec TRIGGER PULSE WIDTH' ' nsec minimum width input at minimum voltage ACCURACY TIME INTERVAL Â± trigger errpr - 2 ns - time Base accuracy TIME INTERVAL AVERAGING * (Ingger error â€¢ 2 nsl Â«/intervals averaged â€¢_ 7 nsec * time base accuracy Hot affected by harmonics of dock frequency RESOLUTION TIME INTERVAL 2 nsec TIME INTERVAL AVERAGE 1 12 nsj v'intervals averaged - 2 DS Ratio B/A ANGE Both channels accept dc to 500 MHZ CCURACY -LSD- trigger error EASUREMENT TIME Measurement time is equal to the GATE TIME se â€¢ecled times 500 MHz frequency of channel B mpul Start/Stop RANGE: dc to 500 MH; OUTPUT: Output frequency equals input frequency divided by scaling tactoi Rear aa-ie BNC supplies 80"= duty cycle TTL compatible pulses Input Channels A and B RANGE: 0 lo 500 MHz dc coupled SOU and 1 Mil 4 MHz lo 500 MHz ac coupled 501!. 200 Hz to 500 MHz ac coupled 1 Mil IMPEDANCE- Selectable i Mit shunted by less man 30 pF or sou innmmaij SENSITIVITY XI 10 mV rms sine wave and 30 mV peak-to-peak pulse X20 200 mV "ns sine wave and 600 mV peak to-peaM pulse DYNAMIC RANGE: 30 dB TRIGGER LEVEL: Continuously adjustable 10 more than cover the DYNAMIC RANGE i â€¢ 0 5V dc times the attenuateÂ» setting) Adjustment is nonlinear with more settattiity in the more sensitive region PRESET: Centers trigger Â«vel about dc at 25 C DfltFT: â€¢ lOmVdc ma* ffC to 55 C OUTPUT. Hear panel BNC connectors Dring Out CHAN A TRIG LEVEL ano CHAN SLOPE: Independent selection of positive or negative slope Common Input In this mod* me s>gnai is applied 10 channel A through a power splitter which equalizes impedances and delays lo the input amplifiers Channel B input is disabled Both input impedance switches should be m the same position All RANGE, ac coupled 50u 4 MHz to 500 MHZ ac coupled 1 Mil 300 Hi to 500 MHz IMPEDANCE: 5011 remains 50!l 1 Mil Becomes 500 Kit Shunted by 60 pF SENSITIVITY BOU X1 20 mV rms sine Â«rave and GO mv peaK-to-peak pulse X20 400 rnv rms sine wave and ' 2V peak-to-peak pulse T Mu No change TRIGGER LEVEL: Continuously adguStaoie over the range of â€¢ tv dc m SOU and â€¢05V dc in 1 Mil multiplied by the attenualor setting General ANGE: Both inputs may have repetition rates from Â« to 500 MHz ODES: A A â€¢ 6 and A B is determined by a -ea< panel switch ESOLUTION Mot affected by GATE TtME setting Resolution is one counl up to e-evei digits ACCURACY Comentem pulses may bÂ« applied to both inputs One count is re quired to initiate each input manually reset or an EXTERNAL ARM signal >s applied Number of readings per second ml generally be limited by the output device i e 5050B Printer or 9820A Calculator m COMPUTER DUMP mode the counter ca" take up to several thousand readings pe> second EXTERNAL ARM INPUT: Counter can be armed Dy a 1 0V signal applied lo the rear panel 5011 input The signal should be applied tor more than 50 nsec Minimum lime between EXT ARM and acceptance of start pulse is EXTERNAL GATE INPUT: Same conations as lor EXT ARM Minimum time between EXT GATE ant) acceptance of start pulse is - 20 nsec GATE OUTPUT: -1 volt into SOU TIME 10 Standard High Statthty Time Base Crystal Frequency. 10 MHi H0544A) STABILITY Aging Rate < 5 â€¢ 10 ~10 per day Short Term I â€¢ 10 ~ ' ' tor 1 sec average For oscillator off time less than 24 hrs SELF all A 100 MHz signal >s mtÂ«rnaiiy applied for testing all functions Push mg RESET illuminates all segments of display digits Seven internal diagnostic, switches are provided 'or verifying the operation of the input amplifiers digital front end processor and plug-ins EXTERNAL FREQUENCY STANDARD INPUT: Input voltage -1 0V rms into ' ill required from source of 1, 2. 25. S Or 10 MHz Â±5.0 * 10~^ Input can be sine or square wave FREQUENCY STANDARD OUTPUT: -1V rms into SOU at 10 0 MHz sine wave OPTION 001: Room Temperature Time Base OPTION 002: Same as 5345A but with no input amplifiers Signal must be applied through plug -in OPTION 010: Digital output only HP Interlace Bus format ASCII talk only Useful with 59301A ASCII -to-Paraliei Converter and 50SOB or 50S5A Digital Printers OPTION Oil: Digital Inpul Output Full compatibility with HP Interface (ASCIIi Bus Provides digital output as well as input 'or control over all functions except input amplifier Allows counter to operate with all ASCII Programmable Modules i see 59300 seriesi and Conlroners sucr< as card readers calculators and 2100 series computers Accessories Available 10593A 5345A TO M20A INTERFACE KIT: Inctudes ASCII I O card and PCll ROM 10631B 10631C documentation and 5345A Self Test Software PacMaoe To be used with 5345A Option 01 1 and 9820A Calculator 10590A PLUG-IN ADAPTER: increases usefulness Of 5345A Dy providing mte' they do in the S245L PRICE IN U.S.A.: 5345A. $3450 MANUFACTURING DIVISION SANTA CLARA DIVISION 5301 Stevens Creek Boulevard Santa Clara California 9505C USA James L. Sorden _. Jim Sorden is project manager for the 5345A Electronic Counter. He first joined HP in 1962 after receiving his BSEE degree from the University of Wisconsin. After a while the promise of greener pastures lured him elsewhere, but by October. 1964 he was back to stay. Jim's responsibilities at HP have been heavily concentrated in digital circuit and systems design and high-frequency integrated-circuit de sign. Earlier he served as project leader for a multichannel analyzer system An amateur winemaker who also enjoys gardening, sailing, and skiing, Jim is a native of the state of Wisconsin. He and his wife and two small children live in Saratoga, California. © Copr. 1949-1998 Hewlett-Packard Co. The 5345A Processor: An Example of State Machine Design by Ronald E. Felsenstein THE 5345A PROCESSOR is an example of state machine design.1 The first step in the design of such a machine is to draw a flow diagram showing all processor functions. Fig. 1 is a section of a typical flow diagram. The rectangular boxes in the flow diagram repre sent states. The machine spends sufficient time with in a state to execute all the commands that are active. A command might be something very simple, such as resetting a flip-flop or incrementing a counter. A more sophisticated example, one used in the 5345A processor, is a subtraction involving two serial strings of 16 binary-coded-decimal (BCD) digits. Sub traction takes a combination of commands. Two com mands gate 16 clock pulses to shift the data through a BCD adder/subtractor, one command puts the BCD adder/subtractor in "subtract" mode, and several commands route data so the resulting difference is fed back to one of the subtracting storage elements while the contents of the other storage element re main unaltered. Once sufficient time has elapsed for all of the com mands to have been executed, one of two new sets of commands will be executed. Which new set is ex ecuted depends on the status of a qualifier. An example of a 5345A qualifier is the status of a carry flip-flop that determines whether the result of a subtraction is positive or negative. Some qualifiers require considerable hardware for generation. For example, the display is made more readable by an automatic display formatting algorithm (AUTO), which gives the displayed digits an annunciator mul tiplier computed so the decimal point is within the first three positions to the right of the most significant digit. The position of the most significant digit varies according to the number of digits of resolution (in AUTO, the least significant digit is always right jus tified within the display). The generation of the quali fier that determines whether the AUTO criterion has been met requires a subtracter that outputs the dif ference between a counter containing the decimal point code and a four-bit latch storing in binary form the number of digits of resolution. The output of the subtracter is then further examined with combina tional logic to determine whether it ranges between â€” \ and -3. If the difference is between -1 and -3, the AUTO criterion has been met. This qualifier is fur ther complicated by having to recognize three special cases where the AUTO criterion of decimal point posi tioning cannot be met. Each state box within the flow diagram is coded to distinguish it from any other state box. These codes are represented in Fig. 1 by the encircled letters. Thus if state X occurs at time T, then Y or Z will occur at time T + l. The process is continuously re peated as the flow diagram is sequentially executed. ROM Addressing When the number of states and commands is large, as it is in the 5354A, it makes sense to use read-only memories (ROMs) to store the flow-diagram program. A block diagram of the first scheme that was consid- © Copr. 1949-1998 Hewlett-Packard Co. Y ) ( Possible States (T-1) z Fig. 1. A segment of the flow diagram of a state machine. As the commands of the present state are completed, a qualifier is tested to determine which of two possible states will be the next state of the machine. requiring only six ROM outputs (see Fig. 3). The reduction of ROM outputs was achieved by coding the STATE (T+l) TRUE and STATE (T + l) FALSE codes so they differ in only one bit. That bit is estab lished directly by the selected qualifier. This means that for STATE (T+i) addressing, only S-l ROM out puts are required. The final reduction was achieved by eliminating the TEST field entirely. This was possible because of the large number of unique qualifiers that the 5345A flow diagram definition required. Had a separate TEST field been used, the number of TEST bits would be S-l; thus it made sense to address the selector with the S-l bits directly. Fig. 2. State-qualifier-pair ROM address structure, a typical way to implement a state machine. Command Generation ered for the 5345A, a state-qualifier-pair ROM ad dress structure,1 is shown in Fig. 2. The storage cir cuit contains the code X at state time T. There are S bits in the state code; these become the inputs or ad dresses to the ROM. For every address presented, the ROM has been programmed to produce four output fields. The COMMANDS field activates all the lines needed to satisfy the requirements of a flow-diagram state-box description. The STATE (T+i) TRUE field contains the S-bit code representing the state at time T+l if the qualifier fol lowing state X is true; for Fig. 1 this would be the code representing state Z . Similarly, the STATE (T+i) FALSE field contains S bits and represents the qualifier-false address or the Y code in Fig. 1. The TEST field addresses a selector (multiplexer) to select the qualifier required by the flow diagram. The test field requires T bits such that 2Ts=Q, where Q is the number of unique qualifiers in the flow dia gram description. The qualifier selected then controls the switch so the STATE (T+i) TRUE code is supplied to the storage circuit if the qualifier is true, and the STATE (T+i) FALSE code is supplied if the qualifier is false. Upon completion of state X , the ROM CLOCK signal ini tiates the new state, which Will be either Y) or Z . This cycle repeats for every state box in the flow diagram until the flow diagram is completed. The hardware disadvantage of the state-qualifierpair ROM address structure is that many ROM out puts are used just for stepping through the flow dia gram. Furthermore, at a given state time, the S-bit field that does not get selected by the qualifier-con trolled switch serves no useful purpose. It is unlikely that any of the STATE (T+i) TRUE or STATE (T+i) FALSE bits could also serve as command lines. In the 5345A, the state-qualifier-pair ROM address structure would have used 20 ROM outputs. The ad dress structure that was finally used is a modification When the definition of the 5345A was complete, the S field was seven bits long and the COMMAND field was 39 bits long. The only circuits that were com mercially available in both ROM and PROM versions had 1024 bits arranged with an eight-bit input ad dress and four-bit output (256X4 organization). To convert to a seven-bit input, eight-bit output circuit (128x8 organization), the ROM is given two ad dresses at every state time and the ROM outputs dur ing the first address are stored (see Fig. 4). A new state code is presented to the ROM every time a ROM CLOCK pulse occurs and MSB (the most significant bit of the ROM address) is high. After the ROM outputs reach steady state, a WORD DOUBLING CLOCK pulse causes them to be stored and the MSB = i outputs to be generated. Then MSB goes low, offering a new address to the ROM and causing a new set of ROM outputs, called MSB=o outputs, to be generated. 'The in (Programmable Read-Only Memory) saves time and money in the design stage PROMs are also useful for implementing customers' special requirements. 10 © Copr. 1949-1998 Hewlett-Packard Co. Commands Fig. 3. 5345A ROM address structure reduces ROM output requirements. Hardware Single Pulse MSB Four 256 > ROMs MSB 0 Outputs Three 3 to 8 Line Decoders and Combinational Logic As the flow diagram of a state machine is devel oped, hardware requirements become apparent: stor age elements, flip-flops, counters, and so on. During definition of the 5345A, flow diagram and hardware development went hand in hand, each affecting the minimization of the other. The processor was built with TTL circuits. To handle 15-digit binary-coded-decimal arithmetic, there are three 16-by-4-bit random-access memories and a BCD adder/subtractor. Two six-bit counters are used to store decimal point information. Latches store the multiplier for the annunciators, the sign, and the overflow light of the display. Additional counters, latches, and flip-flops are used for special purposes such as counting and storing the number of digits of resolution. Commands 39 State (T) Acknowledgments Fig. 4. 5345A command generation scheme. Because the MSB=I outputs are stored, they have no transients, but the MSB=o outputs cannot be re lied upon while MSB is high. To take care of the MSB=o output transients, a signal called SINGLE PULSE is generated after the MSB=o outputs achieve steady state. The MSB = o outputs are gated with SINGLE PULSE so the hardware looks at these out puts only when their information is correct. Even after doubling the number of ROM outputs, if all the 39 commands had been derived directly from the ROM in addition to the S-l or six bits for the STATE (T+i) field, the processor would have re quired 6K of ROM. This would have increased the price and power consumption of the processor. With the aid of a "bit packing" computer program developed at HP Laboratories, the amount of ROM was reduced to 4K. The first step in the bit packing procedure was to feed the program with a complete listing of the STATE (T) and STATE (T+i) codes, and the status of each command bit (active, inactive, or don't care). The program then reduced the number of ROM outputs required by finding sets of mutually ex clusive commands that could be derived from a de coder, and commands that could be generated by simple logic-gate combinations of other commands, STATE (T), and/or STATE (T+l) bits. Originally, there were 45 ROM outputs: 39 com mands and six STATE (T+i) lines. After bit packing only 29 outputs were required. On four IK ROMs with 128x8 organization, three ROM outputs re main free for possible future use. Credit for design contributions is due Jim Sorden, Bob Livengood, and Tommy Thomason. Special thanks go to Gerry Alonzo for his help in "packing ROM bits" with the computer program, and Chuck McWilliams for his idea that made our ROM simula tor possible. Finally T I would like to thank Tom Coates for making the processor boards computer testable. T References 1. Christopher R. Clare, "Designing Logic Systems Using State Machines", McGraw-Hill, 1973. Ronald E. Felsenstein Ron Felsenstein received his BS degree in electrical engineer ing from Massachusetts Institute of Technology in 1969 and joined HP the same year. Designer of the digital processor for the 5345A counter, he has now been named production engineer for lasers and logic test instruments. Ron was born in Montevideo, Uruguay. He and his wife recently returned there for a visit during a two-month tour of Uruguay, Mexico, and six other countries in Central and South America. At home in Santa Clara, California, Ron is currently busy re building a 1961 Mercedes-Benz, but he also enjoys camp ing, tennis, hiking, and skiing. 11 © Copr. 1949-1998 Hewlett-Packard Co. Time Interval Averaging: Theory, Problems, and Solutions by David C. Chu Non-Averaging Because of Coherence TIME INTERVAL AVERAGING is an easy and economical way to increase resolution in meas uring repetitive time intervals. The idea is quite simple: the same interval is measured repeatedly and, given some degree of independence between measurements, the Â±1 count quantization error in each measurement is statistically reduced if the average measurement value is used to estimate the interval. There are many pitfalls in making measurements this way. My purpose here is to point these out and describe the approaches used in the 5345A to solve these problems. Another fundamental problem of time interval averaging occurs when the time intervals are re peated at a rate coherent with the clock frequency. For example, if the rate is a submultiple of the clock frequency, the occurrence of the time interval rela tive to the clock phase is the same for each measure ment. Hence, all the measurements read exactly the same and no statistical averaging takes place. In this case, the quantizing error for a million measure ments is no different from that for a single measurement. Coherence, unfortunately, is not limited to submultiples. There are other rates at which only partial averaging takes place. For example, rates given by ro/(Q + 1/2), where f0 is the clock frequency and Q is a positive integer, give rise to two alternating discrete clock phases separated by T0/2. Averaging over a large number of measurements is no better than aver aging over two successive measurements. In general, we can partition the coherent rates into classes. A "class-M" rate results in the time inter val's occurring at M discrete phases of the clock. If one is interested in gaining resolution improvement by, say, a factor of 100 over the clock period, a class-M rate where M is under 100 would be unac ceptable. A class-M rate is given by: The Folly of Direct Gating In one all too obvious implementation of time in terval averaging, the time interval repeatedly en ables a gate through which the clock pulses are passed and counted. Unfortunately, when the gate turns on and off, partial clock pulses are generated and fed to the counting circuits. The average value obtained this way is as much a function of the re sponse of the counter to partial pulses as it is to the width of the interval. Because this response is diffi cult to characterize reliably and even harder to con trol accurately, one can attach no meaningful signi ficance to the average value so obtained. In general, for averaging over a large number of measurements, a biased value, which can differ significantly from the true time interval value, will be approached. The difference can be expressed as: partial pulse bias = Tu -2i) fR(M) =- M = 1,2,3... Q+ (2) M where fR(M) is a class-M rate, Q, L, and M are nonnegative integers, and LÂ«M. Furthermore, L and M are co-prime, that is, they have no common factors. For M = 1, the class of submultiples is generated. These rates are very numerous. In fact, there is an infinite number of rates for each class. (1) where T0 is the clock period, d is the duty cycle of the clock in percent, and r is the fraction of the full clock pulse below which the counter does not re spond. The parameter r, which is always between 0 and 1, cannot be controlled precisely. The use of a synchronizer in HP averaging coun ters eliminates the partial pulse problem by reducing the effective duty cycle (d) to zero.1 The decades are fed full-width pulses under all conditions. The re mainder of this article assumes the use of synchronizers. Coherence Bandwidth If one is interested in gaining resolution by a fac tor of N, how far must the time interval rate depart from one of the coherent rates fR to assure proper averaging? Straightforward analysis of the phase of the intervals at these frequencies shows that for a 12 © Copr. 1949-1998 Hewlett-Packard Co. class-M rate fR, a departure of Â±AfR from fR can result in almost perfect averaging by the factor N, where AfR is given by: 2 ns AfR = i) f0MN The coherence bandwidth is 2AfR. In terms of fractional frequency stability AfR/fR, the stability that would cause the non-averaging effect is: f0MN Conversely, any stability worse than this destroys the coherence and allows the reduction of measure ment quantization error by statistics. The coherence bandwidth is large for high rates and low M, and non-averaging can often be observed without instrumentation. Submultiples (M = l), for example, give rise to measurements always equal to or close to whole clock periods, an easily discernible effect. Partial averaging is more subtle, and the ex perimenter is often led to accept a result which does not give an adequate interpolation factor. 2 Rms Phase Variation Fig. 1. Coherence bias error in time interval averaging is reduced by increasing random phase modulation of the counter time base. error demands just the opposite. Modulation Bandwidth Time Base Random Phase Modulation There are also two opposing requirements on the phase modulation bandwidth. With a large band width, time intervals can arrive rapidly and still maintain relative independence between measure ments. On the other hand, for very large modula tion bandwidths and relatively long time intervals, there may be only limited correlation between the time base at the start edge and at the stop edge, and the measurement accuracy may be degraded by time base short-term instability. Quantitatively, the relationship is as follows. For a given time interval T seconds, modulation band width fc (Hz), and rms phase modulation cr (cycles), the rms error caused by time base uncertainty in a single measurement is given by ETB, where Coherence between the time interval pulse train and the time base clock pulse train can be destroyed by introducing random phase modulation to either or both of the trains, allowing meaningful time inter val averaging measurements to be made without regard to the time-interval rate. In the HP 5345A Counter, phase modulation is deliberately intro duced into the clock pulse train when making time interval average and pulsed RF measurements. The modulation is random Gaussian noise band-limited to approximately 3 kHz. The bias errors caused by the non-averaging ef fect are functions of many parameters, including the time interval rate, the fractional part of the time in terval (obtained by subtracting all whole clock periods from the time interval), and the interval-toclock phase relationship. However, the worst case bias error, EB, can be expressed simply as a function of cr, the rms value of the phase modulation: Jf ' rms value of ETB = Tncr[2(l â€” e T )]  seconds. For a given time interval, this error is small er for a smaller modulation bandwidth. Thus a small modulation bandwidth is desirable. With averaging, this error is reduced by the factor 1VN, where N is the number of independent mea surements. Not all measurements averaged are in dependent if the time interval rate exceeds approxi mately twice the modulation bandwidth. In this latter respect, a large bandwidth is desirable because it makes full use of all measurements made at higher rates. Notice that ETB increases linearly with cr, the rms phase modulation, in contrast with the coherence error, which decreases with cr. 1/2] (5) 2(7 where EB is the non-averaging bias error and cr is the rms value of the phase modulation in units of 2?7 radians or periods of the time base clock. Fig. 1 shows a plot of bias error EB versus cr in ra dians, assuming a 2-ns clock period, and a time interval given by 2(Q + V2) ns. The bias error de creases rapidly with increasing phase modulation. This indicates that the phase modulation should be large. However, as will be shown, another type of 13 © Copr. 1949-1998 Hewlett-Packard Co. Normal Â±1 Count Quantization Error Even if the time interval rate is incoherent and time base uncertainty error is negligible (such as when measuring short time intervals), an error is expected in time interval average measurements be cause of the normal Â±1 count quantization error in each measurement. For a given time interval T = TO (Q + F), where Q is an integer and F a proper frac tion, this quantization error can take on only two fixed values, FT0 and (F-1)T0, with probabilities (1â€” F) and F respectively. The mean of this distribu tion is zero, and the standard deviation (rms value) is T0[F(1 -F)]1'2. The worst case occurs when F is 1/2, with the corresponding worst case rms quantization error of To/2. With proper averaging over N inde pendent measurements, this rms error is reduced by the familiar factor 1/VÃ‘. 10 MHz Reference Oscillator 10 MHz Tank with Varactor Phase Modulator Amplifier Fig. 2. Implementation of time-base-clock random phase modulation in the HP 5345A. The switch is closed only for time interval average and pulsed RF measurements. Measurement Error Summary trigger error, and plain old thermal noise. These errors are important, but have been excluded from this discussion, which is limited to those errors that are unique to the time interval averaging process. In the 5345A Counter, the phase modulating sig nal is derived from noise generated by a zener diode. The noise is amplified and filtered before being used to modulate the phase of the clock at 10 MHz with an rms value of approximately 7Â°. The frequency multi plier chain effectively increases this value by a factor of 50 to about 350Â°. The noise voltage level is accu rately controlled at all times by a feedback loop. A block diagram of the implementation scheme is shown in Fig. 2. Three types of errors in time interval averaging have been discussed. They are non-averaging bias error, time base short-term uncertainty error, and normal quantization error. The first error is caused by coherence and can be as large as one whole clock count. It is independent of the number of measurements averaged. This error can be reduced to a negligible level according to Fig. 1 by randomly phase modulating the time base clock. In the 5345A Counter, random phase modula tion of 0.8 cycle rms minimum allows meaningful time interval average measurements without regard to the time interval rate. The second error is a result of time base uncer tainty caused by the random phase modulation in troduced. For measuring time intervals less than 7 /us with the 5345A, this time base error is com pletely dominated by the quantization error, and is therefore negligible. For measuring time intervals much larger than 7 /us, the measurement deviation is increased by a factor of approximately 2.7 above that due to the normal Â±1 count quantization error. This increase can be nullified by averaging more intervals. The third type of error is a result of quantization to whole numbers in the counting process and is a function of many parameters. The worst case occurs when the time interval has a value half way between whole clock counts, giving an rms error Tg/2. Like time base uncertainty error, quantization error is re duced if averaged over N independent measure ments by the factor 1/VÃ‘. There are other errors in time interval measure ments, caused primarily by non-ideal circuit com ponents. Examples are start-stop channel mismatch, FM versus PM There are two fundamental reasons why phase Without Time Base Modulation With Time Base Random Phase Modulation 12 ns 2 Time (minutes) 10 ns Fig. 3. Effectiveness of time base random phase modulation is demonstrated by this time record of the counter reading during a time interval average measurement. Time intervals arrive at a rate of 50 MHz +0.1 Hz, which is nearly coherent with the 5345A clock frequency of 500 MHz. Without modula tion, the reading is either 10 ns or 12 ns. Modulation results in a true reading of approximately 1 1 ns. r 1 count is actually a misnomer when synchronizers are used, because they make it impossible to have an error exactly equal to one count. 14 © Copr. 1949-1998 Hewlett-Packard Co. base drifts. Zero mean modulation is difficult to ob tain with nonlinear modulation circuits. With phase modulation, this zero mean value is not a necessity, because any constant phase offset is effectively can celled by the start/stop process. modulation (PM) of the clock is superior to fre quency modulation (FM) for time interval averaging. First of all, it is the phase variations that destroy the coherence. Of course, phase variations are also generated by FM, but they decrease at 6 dB/octave as the modulating frequency is increased. Therefore, to obtain sizeable and rapid phase variations, relatively large FM signals must be used. A more fundamental reason is that with FM, the mean value of the modulating function must be ab solutely zero or errors will accumulate as the time An Experiment A simple experiment was performed to illustrate the effectiveness of phase modulation of the clock. Time intervals arriving at a rate nearly coherent with the 5345A clock frequency were measured with and without modulation. Fig. 3 shows the result. Acknowledgments The author received many useful comments from conversations with Art Muto, Jim Sorden and Ken Jochim, all of whom had been doing pioneering work in time interval averaging for some time. The elegant implementation of the phase modulation is a result of the ingenuity and expertise of John Gliever and John Dukes.5 APPENDIX Time Interval Estimation in the Presence of Quantization Error For measuring short intervals by time interval averaging, only Â± 1 count quan tization error is present An interesting problem is to determine the statistics of estimating the true time interval from the reading obtained from averaging N independent measurements. The usual rule-of-thumb estimate gives this uncertainty as TQ/\ N where T0 is the clock period. A more formal analysis shows that the actual rms uncertainty of the estimate is not so simply stated. In fact, computed actual probability density function of the interval can be computed given The counter reading after averaging N independent measurements The results can be summarized as follows An unknown time interval r is measured N independent times with a clock ; â € ¢ : â € ¢ ' ' ' i . " ' ; ; . - , ; . ' ' " â € ¢ â € ¢ ; ' â € ¢ â € ¢ ' ' References 1. K. Jochim and R. Schmidhauser, "Timer/Counter/DVM: A Synergistic Prodigy?" and R. Schmidhauser, "Measur ing Nanosecond Time Intervals by Averaging", HewlettPackard fournarr April 1970. ' ' . . ' , ' â € ¢ and K function integers and 0- K- N. What is the probability density function of e = (r r) given P, K, and N? Assuming no a priori knowledge of r. maximum likeli hood estimation may be used, and the result is as follows: Case I: the = 1,2,3 ..... N-1. The probability density function P(x). that is, the probability density of (7 - 7) taking on value x, is rÃ§ N' for -KVN Â«x<(1-K/N)T0 otherwise The mean of this distribution is [ and the standard deviation is <r. where N(N 4-ZJ K*1)(K-H)T-i N T s J - Case is K 0. The probability density function P(x) for this case is P.XI for OsxsTo P(x) for -T0Â«xÂ«0 David C. Chu The standard deviation of this function is <r. where Dave Chu holds BS, MS, and PhD degrees in electrical engineering, the BS from the University of California at Berkeley in 1 961 and the MS and PhD from Stanford University in 1962 and 1973. At HP since 1962 (except for a 1967-69 leave of absence to teach physics and mathematics at Cuttington College in Liberia), Dave has contributed to the design of many of HP's top-of-the-line counters. A mem ber of IEEE and the Optical Society of America, he's an ex pert on computer holography and inventor of the ROACH, a single transparency with controlled complex transmittance. He's authored many papers and patent applications in the fields of optics, information theory, statistics, and electronics. Dave was born in Hong Kong. He's married, has two children, and lives in a "shack" â€” which he's currently remodeling â€” on five acres of land in rural Woodside, California. He's active in his church and political party, and confesses to being addicted to Balkan and Israeli folkdancing. ; These results show that the rms uncertainty in estimating the time interval by the average measurement value is a function of K as well as of N. The parame ter K. always an integer, can be obtained directly from the measurement: K. N is the large part of the normalized measurement value (fT0). For large N. which is typical for most time interval average measurements, the rms uncer tainty of equation 2 is reduced to [11 KuKiT! (1 N)(N> For a given N. the largest T. representing the worst case estimation uncer tainty is when K N is one-half. The corresponding rms uncertainty is TÂ¡j2\ or The uncertainty becomes less when KN approaches either 0 or 1 The rule-of-thumb estimate of T0 \ Ã‘. therefore, represents twice the worst case of uncertainty for large N One can further use the knowledge of the frac tional the of the measurement value to increase confidence in estimating the time interval. 15 © Copr. 1949-1998 Hewlett-Packard Co. Third Input Channel Increases Counter Versatility by Arthur S. Muto MODEL 5353A CHANNEL C PLUG-IN con tributes several new and useful measurement capabilities to the 5345A Electronic Counter. It was conceived primarily as a solution for many measure ment problems in the new and expanding field of high-speed digital measurements, but it is useful for many other applications as well. The channel C plug-in, Fig. 1, adds a third, 10-millivolt-rms-sensitivity, dc-to-500-megahertz input channel to the two channels of the mainframe. Three of the measurement modes of the channel C plug-in, namely FREQ c, PERIOD C. and RATIO C/A, dupli cate functions found in the mainframe. As a conse quence, frequency or period measurements can be made on two different signals in a systems or pro duction environment without having to disconnect coaxial cables or reset trigger levels. One signal can be measured with the mainframe's channel A and the other with the plug-in's channel C. Similarly, the plug-in can be used to make a multiplexed ratio measurement with channel A by selecting either the mainframe's RATIO B/A function or the plug-in's RATIO C/A function. A fourth function of the channel C plug-in permits automatic sum and difference frequency measure ments to be executed by selecting FREQ C+A, or FREQ C-A. A direct application of this measurement is in determining a receiver input frequency by separately measuring the local oscillator frequency (LO) and the intermediate frequency (IF) and performing the sum or difference (LO Â± IF) calculation. By connecting the LO to channel C and the IF to channel A, automatic LOÂ±IF measurements can be performed. A nulling technique for making frequency adjust ments is another application of FREQ C-A. With a standard frequency source connected to channel A, the frequency of the channel C signal can be adjusted until the counter displays zero. The frequency of the channel C input signal is then equal to the frequency of the standard source. Events Mode Still another measurement mode of the 5353A Channel C Plug-In is called EVENTS C.A to B. In this mode, channel C events â€” pulses as narrow as one nanosecond in width â€” are totalized during a precise time interval defined by a start-pulse edge in channel A and a stop-pulse edge in channel B. The polarity of the pulse edge is determined by the user's selection of positive and/or negative trigger slopes (Fig. 2). In the digital communications field, this EVENTS measurement is especially useful in measuring data within a specific burst inside a frame of TDMA (Time-Division-Multiple-Access) formatted data. By adding a pulse generator having variable width and delay capabilities and using the COMMON A in put feature of the mainframe, any 10 nanosecond or wider portion of the burst can be isolated for bit pat tern characterization. This ability to isolate bits is also useful in troubleshooting digital systems, whenever searching for specific or even random bits may be required. To achieve greater resolution on repetitive sig nals, automatic averaging of the number of channel C events over several time intervals can be ac complished by selecting the AVERAGE EVENTS C, A to B function. Since the events measurement is basically 5353A CHANNEL C LISTENING â€¢ REMOTE â€¢ FUNCTION CHANNEL C PERIOD C IEVELÂ» I Fig. 1. Model 5353A Channel C Plug-in adds a third 10-mVsensitivity, 500-MHz input channel to the two 5345A main frame channels. 16 © Copr. 1949-1998 Hewlett-Packard Co. a given measurement. The plug-in has access to the full measurement capabilities of the mainframe; every mainframe measurement can be controlled by the plug-in through the control interface. Upon completion of any measurement, the arith metic processor in the mainframe algebraically com bines the contents stored in the BCD counters to create a meaningful result. Through the processor interface shown in Fig. 3, the plug-in can command the processor to scale the result before displaying it. The general form of equation that the processor is capable of executing is Channel C l W Ct Slope UinrLTLTL Channel C Channel A Common Channel B Channel B Slope Channel A/ - Slope Fig. 2. EVENTS C, A to B mode is especially useful in digital communications. In this example the counter display would read "4." Â± (K Â± XN) a normalized time-interval measurement, events averaging is analogous to time-interval averaging, excluding the time base jittering as described in David Chu's article in this issue. All seven 53 53 A functions are programmable via the optional HP interface bus system. The lamps on the front-panel indicate when the plug-in is listening for bus programming instructions (LISTENING lamp) and when the plug-in is under remote control (REMOTE lamp). The front-panel LOCAL reset push button s witch returns the function selection from bus control to the front-panel FUNCTION switch. Bus pro gramming can disable the LOCAL reset switch when desired. ID where X is the measurement result and K and N are values supplied by the plug-in when scaling is de sired. Arithmetic expressions of the general form Â± (K Â± PI/N)  in which numerical values for K, N and PI are sup plied by the plug-in, can also be evaluated by the processor. The algorithm that adds K and the algorithm that multiplies by N will he bypasspH if values for K or N are not supplied. Solutions to more complex arithmetic equations can be calculated by multiple executions of equations 1 and 2 before displaying the final result. Each re sult calculated by equation 1 or 2 is returned to the plug-in and can subsequently be returned to the mainframe as a plug-in variable in later processing cycles. As a consequence, extremely complex arith metic processing of measurement results is available to the plug-in. Plug-In Interface The block diagram of the 5353 A Channel C Plug-In is shown in Fig. 3. Also included in the same figure is a simplified block diagram of the 5345A Counter showing the interface between the mainframe instru ment and all plug-ins, not only the 5353A. The channel C plug-in uses two of the four RF lines available to plug-ins. Three of these four lines, the PI Channel A, PI Channel B, and PI Channel C lines, represent full-bandwidth, de-coupled, E2L channels paralleling the two mainframe input channels, A and B, and the internal 500-MHz clock, respectively. The fourth RF line is a buffered 10-MHz frequency stand ard output from the mainframe. The three PI channels, coupled with the corres ponding three channels in the mainframe, afford enormous measurement flexibility to the mainframe/ plug-in combination. Through the control interface shown in Fig. 3, the mainframe recognizes which mainframe and/or plug-in RF channels to enable for Plug-In Operation The digital control logic of the channel C plug-in relays to the mainframe the function selected by the function switch or the optional HP interface bus. In the case of the FREQ C-A function, for instance, the mainframe is commanded to perform a frequency measurement of PI Channel A, which is the plug-in channel C input signal directed to PI Channel A by the high-speed digital logic, after digitization by the input amplifier and trigger circuit. The measure ment is a standard frequency measurement using the mainframe 500-MHz clock, and the measurement result is returned directly to the FREQ CÂ±A digital logic for storage in the plug-in without additional processing. As soon as this transmission is completed a second machine cycle is initiated by the digital control logic, commanding the mainframe to perform a frequency measurement of the channel A analog input signal. During the processing of this second frequency measurement, the frequency of the channel Correction In our last issue (May 1974) the result for I0 in Fig. 4 on page 10 should be 6.278 mA. Also, the second 'user action in the second column on page 13 should be "CHS following EEX," the third "user action should be "Multiple CHS," and the third desired result should be Complement mantissa sign, or exponent sign it EEX has been pressed ' 17 © Copr. 1949-1998 Hewlett-Packard Co. 5345A Electronic Counter Oscillator and Multiplier 5353A Channel C Plug-in hannel C Input Amplifier and Trigger Circuitry Option 011 HP Interface Bus Fig. 3. Block diagram of the 5353A plug-in and the 5345A plug-in interface. The plug-in controls mainframe measure ments and processing of meas ured data. C input signal is returned to the mainframe as K in equation 1. The result is then displayed as the posi tive or negative difference in frequency between the channel A and channel C input signals. The other 5353A functions follow similar steps but require only a single machine cycle to generate a display. SPECIFICATIONS HP Model 5353A Channel C Plug-In MODES OF OPERATION: Frequency C, Period C. Ratio C/A, Events C between A and B, Average Events C between A and B, C-A. C+A. RANGE: DC COUPLED: 0 to 500 MHz AC COUPLED: 10 MHz to 500 MHz IMPEDANCE: 50!! (nominal), or 1 Mil shunted by less than 30 pF SENSITIVITY: Variable to 10 mV rms sine wave and 30 mV peak-to-peak pulse. Attenuator settings are X1 and X20. DYNAMIC RANGE: 30 dB TRIGGER LEVEL: Continuously adjustable over dynamic range. PRESET: Centers trigger level about dc at 25Â°C. DRIFT: r 10 mV dc max. 0"C to 55Â°C. OUTPUT: Rear panel BNC connectors bring out TRIGGER LEVEL for convenient DVM monitoring Accuracy is =15 mV. MAXIMUM INPUT: Same as Channel A and B. separate input. OPTION 011: Digital Input. Full compatibility with HP Interface (ASCII) Bus. Provides for digital control over all functions excluding amplifier. PRICE IN U.S.A.: S850. MANUFACTURING DIVISION: SANTA CLARA DIVISION 5301 Stevens Creek Boulevard Santa Clara. California 95050 U.S.A. Acknowledgments My associates in the design of the 5353A Channel C Plug-In were Bryce Jeppsen (T2L digital logic and HP interface bus option), Keith Leslie (mechanical design) , and Steve Upshinsky (high-frequency ampli fier and trigger). The early design efforts of Ron Felsenstein and Hans Trosch are gratefully acknowledged. Z Arthur S. Muto Art Muto designed the high-speed gating circuits for the 5345A Counter and was project leader for the 5353A Channel C Plug-In. A graduate of the University of California at Berkeley, he received his BSEE degree in 1 967 and his MSEE in 1969. He joined HP part-time in 1969 and full-time in 1970. Art is a native Californian. born in Sacramento and raised in San Francisco. He and his wife and daughter now live in Sara toga, California. His favorite leisure time pursuits are listening to classical and rock music, playing table tennis, and camping and hiking with his family. 18 © Copr. 1949-1998 Hewlett-Packard Co. A Completely Automatic 4-GHz Heterodyne Frequency Converter by Ali Bologlu A FREQUENCY CONVERTER translates an un known high-frequency signal downward in fre quency by mixing it with a precisely known signal of slightly lower frequency. This heterodyne process yields a difference frequency within the basic range of the counter. Then the counter reading and the known frequency of the mixing signal are added to give the unknown. A new plug-in for the HP 5345A Electronic Counter completely automates the heterodyne frequency con verter technique for both CW and pulsed RF input signals. The 5354A Automatic Converter (see Fig. 1) extends the basic frequency measurement range of the counter to 4 GHz. A simplified block diagram is shown in Fig. 2. The converter sends signals in the 5-to-525-MHz range directly to the mainframe. Input signals be tween 510 MHz and 4 GHz are translated by nine crystal-controlled frequencies to an intermediate frequency between 10 and 525 MHz, and are then sent to the mainframe for measurement. The frequency measured by the mainframe (IF) is then added to the crystal-controlled frequency used in the translation process (LO), and the result is displayed. The table below lists the LO and intermediate frequencies for various input frequencies. Input Frequency LO Frequency IF to Counter ( M H z ) ( M H z ) ( M H z ) 15-525 510-775 760-1025 1010-1525 1510-2025 2010-2525 2510-3025 3010-3525 3510-4025 500 750 1000 1500 2000 2500 3000 3500 Direct 10-275 10-275 10-525 10-525 10-525 10-525 10-525 10-525 Operating Modes The converter has both automatic and manual modes of operation, selectable by a front-panel switch. In the automatic mode, the converter auto matically steps through nine frequency bands repe- 1 5354A AUTOMATIC FREQUENCY CONVERTER 015 4 OGHz C O N V Ã U T O â € ¢ C O N T A N U A L B S I G N A L W A V E P U L S E D R f I BAND SELECT ' Fig. 1. Model 5354 A Automatic Converter extends the fre quency measurement range of the 5354A Electronic Counter to 4 GHz. Operation can be manual or completely automatic, even for pulsed RF signals. titively until a signal within the converter range is detected. The time required for acquisition is 160 microseconds worst case. In the manual mode, the converter remains in one of the frequency range bands until the BAND SELECT or RESET switch is pressed. Each time the BAND SELECT switch is pressed, the next higher frequency band is selected. Pushing RESET returns the converter to the zero band. In the manual mode, if there is no signal or the sig nal level is inadequate, the mainframe will display the LO frequency. In both modes, manual and auto matic, the CONV signal light comes on when the coun ter is making a correct measurement. One can oper ate the converter in the automatic mode until a signal is acquired and then switch to manual. In this case, the manual mode retains the band information and will be ready to make a measurement in that particu lar band within 20 microseconds. In the automatic mode the converter assumes that the first signal of sufficient amplitude to be detected is the correct one. When many frequencies in differ- © Copr. 1949-1998 Hewlett-Packard Co. Swit chable Filter Module 10 MHz from *â€¢ Mainframe Mainframe PI Channel A to Mainframe 15-525 MHz Fig. 2. The 5354A automatic con verter heterodynes high-fre quency input signals with one of nine crystal-controlled frequen cies to derive an intermediate frequency within the range of the 5345 A. than 250 nanoseconds can be acquired automatically in one second. For narrower pulse widths the manual mode may be used â€” the minimum RF pulse width is 50 ns. Con verter sensitivity is greater in the manual mode; sig nals of -20 dBm (typical) may be counted. Further more, the mainframe gate and plug-in signal detec tors are pre-armed in the manual mode, so actual measurement times may be as short as 2 ns. The 5354A's pulsed RF capability together with the main frame's averaging capability allows meaningful highresolution frequency measurements on narrow pulses. Displaying the auxiliary output of the plugin on an oscilloscope simultaneously with an exter nal gating signal shows exactly which portion of the RF pulse is being measured. By sliding the gate pulse along the down-converted RF signal, frequency profile measurements may be made. ent bands are present simultaneously the user may switch to the appropriate bands manually to count the higher frequencies. The rapid acquisition in the automatic mode and the flexible switching capability in the manual mode are possible because of the switching filter assembly shown in Fig. 3. CW Performance The 5354A Automatic Converter is very tolerant of signals that have various kinds of modulation. It can tolerate large frequency deviations â€” up to Â±250 MHz â€” at band centers. At band edges it is limited to deviations of about Â±10 MHz. These tolerances are sufficient for communications applications, in which carrier frequencies need to be measured under operating conditions. Specified sensitivity in the CW mode is - 10 dBm. Pulsed RF Performance Special Features The most unusual feature of the converter is its ability to measure pulsed frequencies automatically. Pulsed signals whose modulation width is greater Besides the RF circuits necessary to process micro wave signals, the converter also contains digital pro cessing circuits. These have two main functions. One is control of the interface to the mainframe and the other is the algorithms for automatic operation of the converter. For rapid troubleshooting, a self-test feature has been incorporated. This is enabled by putting an internal switch in the test position with the mainframe in self-check mode. With the plug-in in manual mode, the mainframe will display the LO frequency plus 100 MHz. When the 3.5 GHz LO is selected, the CONV signal light comes on. This rou tine checks the plug-in/mainframe interface. When the plug-in is placed in the automatic mode, the mainframe will immediately display 3.6 GHz with the CONV light on, thereby checking the automatic acquisition routine. Options and Rear-Panel Controls A buffered version of the down-converted IF signal is available at the rear-panel AUX OUT connector for such applications as viewing the down-converted Fig. 3. Switching filter assembly permits rapid acquisition of input signals. 760 us is worst case in automatic mode. 20 © Copr. 1949-1998 Hewlett-Packard Co. trum-generator modules are hybrids, all contained in one assembly (Fig. 3). It is this unique structure that makes the extremely fast acquisition of input signals possible. microwave signal on an oscilloscope. Another rearpanel control, the NORM/-L.S. slide switch, controls the mainframe processing of the converter output sig nals. In the normal position, the mainframe is instruc ted to add the frequency of the converter local-oscil lator signal to the frequency of the converter IF signal and display the result. In the manual mode the -L.S. position may be used, causing the IF to be subtracted from the LO signal frequency. One application for this control is the measurement of pulsed signals having narrow pulse widths, when the resulting con verter IF signal is a low frequency. By switching to the lower sideband (-L.S.), one can increase the number of zero crossings per unit time, and therefore the ac curacy of the measurement. When the mainframe is under remote control of the HP interface bus, option Oil for the converter gives the plug-in its own address and allows all of its func tions to be remotely programmed. An optional LOÂ±IF ON-OFF switch controls the addition or subtraction capability of the converter. With this option, input signals of microwave re ceivers can be monitored. The receiver IF signal is applied to the mainframe channel A input and the receivex local oscillator to the converter input. The LOÂ±IF ON/OFF switch is set to ON. The +IF/-IF switch is set to +IF if the receiver local-oscillator freqency is known to be below the received signal fre quency, or to -IF if the local-oscillator frequency is above the received frequency. Acknowledgments Special credit is due Hans Trosch and Al Barber for their design efforts. Larry Jackson initiated the prod uct design, which was completed by Roland Krevitt. Thanks are also due Dick Harris for production sup port and Holly Cole for market introduction. .7 SPECIFICATIONS HP Model 5354A Automatic Frequency Converter RANGE: 15 MHz to 4 GHz SENSITIVITY: -10 dBm (70 mV rms) to Â»20 dBm (2.2V rms) INPUT SIGNAL CAPABILITY: CW signals. Pulsed microwave signals. Signals with very high FM content. RF PULSE WIDTH: Determined by counter GATE TIME setting. FM SENSITIVITY: Maximum deviation at band edges Â±10 MHz. Maximum devia tion at band center: Â±250 MHz above 1 GHz and below 500 MHz. Â±125 MHz between 500 MHz and 1 GHz. OPERATING MODES: Automatic and manual. AUTOMATIC: Measures lowest frequency signal of sufficient amplitude to trigger counter. MANUAL: Measures signal within selected band. Signals of sufficient amplitude between 15 MHz and 525 MHz will also be counted ACQUISITION TIME: AUTOMATIC MODE: cont. wave <160 M sec, pulsed RF <1 sec. MANUAL MODE: When proper band has been selected: cont. wave <5 /Â¿sec, pulsed RF <20 nsec. MIXING FREQUENCIES: 0, 0.5, 0 75, 1.0. 15, 2.0, 25. 3.0, 35 GHz DAMAGE LEVEL: 25 dSm (4V rms). 10 volts peak-lo-peak. OPTION 011: Digital Interface Bus for remote control and L.O.Â±I.F. PRICE IN U.S.A.: S1950 MANUFACTURING DIVISION: SANTA CLARA DIVISION 530I Stevens Creek Boulevard Santa Clara. California 95050 U.S.A. LO Details Crystal-controlled mixing frequencies are generat ed from a 500-MHz signal derived from the 10-MHz time base. The 500-MHz signal drives a spectrumgenerator diode whose output goes to a PIN singlepole six-throw switch. Each output of this switch is connected to a band-pass filter whose center fre quency is tuned to a harmonic of 500 MHz which, in turn, is connected to a single-pole six-throw switch. The output of this switch is connected to the input mixer module. The PIN switches, filters, and spec AM Bologlu Ali Bologlu received the BSEE degree in 1962 and the MSEE degree in 1963, both from Michigan State University, and the degree of Electrical Engineer in 1965 from Stanford Uni versity. At HP since 1963, Ali has contributed to the design of the 5100A, 5102A, 5103A, 5105A, and 866CVVB Frequency Synthesizers, and was project leader for the 5354A Con verter. He now has responsibility for microwave counter development He's a member of IEEE. Born in Istanbul, Turkey, Ali now lives in Mountain View, California, where he devotes much of his free time to the local youth athletics program. 21 © Copr. 1949-1998 Hewlett-Packard Co. Interface Bus Expands Instrument Utility by Bryce E. Jeppsen and Steven E. Schultz THE PROLIFERATION OF computer-controlled instrument systems over the last decade testifies to the importance of marrying data-input and compu tational capabilities. However, most systems of this type have gone into production environments as a means of reducing test times and simplifying produc tion decision-making. The cost, complexity of system integration, and elaborateness of operating pro cedures has restricted the use of such systems in the development laboratory. Nevertheless, the engineer would often prefer to work with computed quanti ties such as pulse jitter or linearity, rather than raw time-interval or frequency data. A pair of recent developments now offer the en gineer the tools he needs to look at computed quan tities based on fundamental measurements. One is the programmable calculator, which brings comput ing power to the laboratory bench. The other is the new HP interface bus system, which greatly simpli fies the assembly of instrument/calculator systems.1 As the applications and ramifications of this "smart" interface technique become recognized, we can ex pect to see a profound change in the way bench in struments are used. The new 5345A Counter is compatible with the bus interface. Systems including the 5345A, the 9820A Calculator, and a new line of ASCII-Programmable Modules are described, complete with software, in a new series of Application Notes, AN 174. Because of space limitations, only two of these systems are dis cussed here. ations, and the like may never be investigated. Using the 5345A Electronic Counter with the new HP interface bus, this measurement may be made eas ily with the help of a calculator such as the HP 9820A. The equipment is connected as shown in Fig. 1. To program the counter, it is only necessary to enter the number of measurements desired, the width of each bin, and the number of bins. Application Note 174-5 tells how this is done. Once these parameters are defined, measurements may begin. As data is received, the calculator determines which bin each measurement falls in. When the specified number of measurements has been made, the calculator instructs the plotter to draw the histo gram. This system has been used to evaluate the overall quality of digital communications systems by meas uring the time jitter between frames, and has proved valuable in PCM communications applications that require an analysis of the statistical nature of the time between error pulses from an error-bit-rate detector. Free Running 1C Timer 5345A - 9820A Histogram Graph Center - 9.915600E-05 Bar Width - 2.000000E-09 No. of Measurements - 200 Highest Bar - 46 Mean Line - 9.915642000E-05 1 Pulse-Width Jitter Histograms A typical counter/calculator system application is the measurement and analysis of pulse-width jitter, such as that of any pulsed or clock signal. A histo gram or probability distribution provides insight into the statistical nature of the jitter. This insight is use ful in analyzing the noise characteristics of the signal source. However, the effort and time required to col lect and plot this data manually is almost prohibi tive, so the measurement is rarely performed more than once, and that one measurement is assumed to be typical. Effects of temperature, power-supply vari 9820A Calculator Fig. 1 . 5345A Counter is compatible with the HP ASCII-coded interface bus, making it easy to assemble systems like this one, which plots a histogram showing the distribution of the pulse-width jitter of an integrated-circuit timer chip. 22 © Copr. 1949-1998 Hewlett-Packard Co. ASCII Programmable Modules The ASCII Programmable Modules make the 5345A Counter more versatile as a systems compo nent. These modules can be used as "systems glue", performing necessary systems functions not per formed by the major instruments. However, they are also designed to make the basic measurement instruments like the 5345A Counter more useful in bench-top environments. The modules may be used with or without a calculator in the system. Modules now available are: 59301A ASCII-to-Parallel Converter 59303A Digital-to-Analog Converter 59304A Numeric Display 59306A Relay Actuator 59307A VHP Switch 59308A Timing Generator 59309A ASCII Digital Clock Model 59301A ASCII-to-Parallel Converter inter faces the counter to standard digital printers to pro duce hard-copy records of measured data. Model 59303A Digital-to-Analog Converter can drive a stan dard strip-chart recorder to provide trend informa tion. Model 59308A Timing Generator is useful in the monitoring of crystal warmup characteristics and similar applications. Model 59304A Numeric Display can be used to dis play intermediate results without consuming valu able calculator processing time. The 59306A Relay Actuator can control high-frequency switches and at tenuators, or simply switch bias voltages. Model 59307A VHP Switch is useful for switching highfrequency signals. VCO Characteristics An example of the usefulness of the 5345A/9820A combination in stimulus-response testing is a system to measure the characteristics of voltage-to-frequency conversion circuits. Voltage-controlled oscillators (VCO's) are present throughout electronic designs in phase-locked loops, modulators, and so on. It is often desirable to characterize the tracking characteristics of two similar oscillators. This can be done using the 5345A Counter, the 9820A Calculator, and three members of the ASCII-Programmable Module family: the 59303A Digital-to-Analog Converter, the 59304A Numeric Display, and the 59307A VHP Switch. The system is described in Application Note 174-4 and shown in Fig. 2. The D-to-A converter is told by the calculator to apply voltages to the VCO's while the VHP switch alternately applies their frequency outputs to the 5345A Counter. The numeric displays give a real time presentation of the applied voltage, the fre quency outputs, and the frequency difference. The calculator generates a linearity plot for each VCO and a plot showing how well the two VCO's track. The key to success in this experiment is the accu racy of the voltage applied to the VCO's from the digit al-to-analog converter. This D-to-A converter has 10 mV resolution and accuracy, a dynamic range of + 10 volts to -10 volts, and an operating temperature range of 0 to 55Â°. At room temperature the 59303A is typically accurate within 3mV. This D-to-A converter is also fully programmable. Various digit formats and output modes can be chosen, including a mode that adds in an offset for strip-chart recordings. Acknowledgments The authors would like to acknowledge the support given by John Dukes and Jim Sorden. The pillar of strength in the 5345A Interface and ASCII Program mable Module program has been Charlie Trimble, whose counsel and guidance has greatly contributed to the program's success. Technical support from Dave Ricci and product design by Eric Havstad and Carl Spalding is also appreciated. References 1. G.E. Nelson and D.W. Ricci, "A Practical Inter- HP Interface Bus 59304A Numeric Displays Fig. 2. The ASCII-programmable Modules complement the 5345A in systems applications. Three types are used in this system, which characterizes the tracking characteristics of two similar voltage-tuned oscillators. © Copr. 1949-1998 Hewlett-Packard Co. face System for Electronic Instruments", HewlettPackard Journal, October 1972. 2. D.C. Loughry, "A Common Digital Interface for Programmable Instruments: The Evolution of a Sys tem", Hewlett-Packard Journal, October 1972. ASCII Programmable Modules 59301 A ASCII-TO-PARALLEL CONVERTER Converts ASCII coded information to parallel BCD or lirie per function information. When used with two 562-16C cables allows direct operation of a 5345A/B Option 010 or 011 and a 5050B Digital Printer. $450. 59303A DIGITAL-TO-ANALOG CONVERTER Converts any three consecutive ASCII digits to a 0.1% accurate dc voltage within 25 /Â¿sec. Very useful ior stability measurements with strip chart recorders and XY plotters or programming VCO's and power supplies. S850. Steven E. Schultz (right) A 1970 BSEE graduate of the University of California at Ber keley, Steve Schultz is now working towards his master's degree at Stanford University. At HP since 1971, he helped design the digital I/O and mainframe boards for the 5345A Counter, and was project leader for five of the ASCII-Pro grammable Modules. Steve was born in Oakland, California. He's married, lives in Menlo Park, California, and says that most of his spare time is occupied by his master's studies and other obligations. Whenever he can, though, he indulges his many other interests which include radio controlled boats, British cars, sailing, electronics, and riding dirt motorcycles. 59304A NUMERIC DISPLAY Provides auxiliary display when used directly with 5345A/B Option 010 or 011 or display intermediate results from a 9820A Calculator without consuming calculator display time. S600 59306A RELAY ACTUATOR Provides six form "C" relays unrjer front panel or remote control. Can be used for programming 8761A/B 18 GHz control switches, 33000 series 18 GHz step attenuators, or for simply switching bias voltages. $600. 59307A VHP SWITCH Contains two dc to 500 MHz 50Ã! bi-directional coaxial switches. Each switch has one input and four outputs and can be operated either from the front panel or remotely Useful for scanning time interval signals or switching VHF signals. $700. Bryce E. Jeppsen (left) 59308A TIMING GENERATOR Bryce Jeppsen graduated from Brigham Young University in 1 970 with BES and ME degrees, then joined HP and began working on the 5340A Microwave Counter only to be drafted into the U.S. Army in October of that year. While in the service he organized and taught courses in basic semiconductor electronics. In 1972, his service completed, Bryce returned to HP and electronic counters. He designed the 10590A Plug-In Adaptor and the digital circuitry and ASCII control for the 5353A Plug-In, and has written much of the series of application notes describing 5345A systems based on the HP interface bus. Bryce and his wife have three small children and live in Santa Clara, California, where they're busy work ing on their new home and participating in church activities. Provides time intervals and delays to environments where an accurate time base is necessary Can be used in plots of crystal warmup characteristics to provide an accurate time I > b e t w e e n r e a d i n g s . U = ^ 59309A ASCII DIGITAL CLOCK Provides calendar and time of day output on the HP inter face bus. Can be used to provide a time axis on a plot, or used to control the start and stop time of measurements with a calculator This clock can be set remotely 10631A,B,C, ASCII CABLES Three, six and twelve feet respectively Double ended ASCII connector on each end. $55. $60, and S70 MANUFACTURING DIVISION SANTA CLARA DIVISION 5301 Stevens Creek Boulevard Santa Clara. California 95050 U.S. A Bulk Rate U.S. Postage Paid Hewlett-Packard Company Hewlett-Packard Company, 1501 Page Mill Road, Palo Alto, California 94304 g l g f l UNAL Jl JUNE 1974 Volume 25 â€¢ Numt Technical Information from the Laboratories of Hewlett-Packard Company Hewlett-Packard S.A.. CH-1217 Meynn 2 Geneva. Switzerland Yokogawa-Hewlett-Packard Ltd , Shibuya-Ku Tokyo 151 Japan Editorial Director â€¢ Howard L. Roberts Managing Editor â€¢ Richard P. Dolan Contributing Editors â€¢ Ross H. Snyder. Laurence D. Shergalis MR C JOHN H O P K I N S Art Director, Photographer â€¢ Arvid A. Danielson An Assistant â€¢ Sue M. Reinheimer Administrative Services â€¢ Anne S. LoPresti European Production Manager â€¢ Kurt HungerbÃ¼hler I i /*^ I NIVERSITY U APPLIED PHVSl CS LAB B621_GErjRGIA_ 6 ^ _ _ _ _ _ _ ^ _ ^ _ ^ ^ _ ^ ^ _ _ 20910 MO _ ^ ^ ^ _ _ ^ I A N I /^"^ I f~\ [ A J N I "\ I ) I O O â€¢ ^Â° change your address or delete your name from our mailing list please send us your old address lable (it peels off) v_y II f~\ i N \J L V_/ I f\ LJ I / Fi tu O O . Send changes to Hewlett-Packard Journal. 1 501 Page Mill Road. Palo Alto. California 94304 USA. Allow 60 days © Copr. 1949-1998 Hewlett-Packard Co.
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