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M4K708
ARINC 708/453
Test and Simulation Module for the
EXC-4000 Family of Carrier Boards
User’s Manual
311 Meacham Ave
♦
Elmont
♦
NY 11003
♦
tel. (516) 327-0000
♦
fax (516) 327-4645 e:mail: [email protected]
website: www.mil-1553.com
Table of Contents
Table of Contents
1 Introduction
M4K708 Module Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
M4K708 Module Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
Module Installation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
Adding Software Tools Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
M4K708 General Memory Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
2 Channel Operation
Channel Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
Channel Receive Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
Channel Transmit Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
Global Control Registers and Memory Map . . . . . . . . . . . . . . . . . . . 2-4
Channel Control Registers and Memory Map . . . . . . . . . . . . . . . . . 2-7
3 Mechanical and Electrical Specifications
Factory DIP Switch Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2
Carrier Board 96-pin Connector. . . . . . . . . . . . . . . . . . . . . 3-3
M4K708 Module Adapter Cable. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4
Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5
Appendix A ARINC 708 Display Data Bus Word Format
M4K708 Module: User’s Manual page i
Table of Contents page ii Excalibur Systems
Chapter 1
1
Introduction
Introduction
Chapter 1 provides an overview of the M4K708 avionics communication module. the following topics are covered:
M4K708 Module Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
M4K708 Module Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
Module Installation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
Adding Software Tools Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
M4K708 General Memory Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
1.1
O
verview
The M4K708 is an interface module for the multimode, multiprotocol Excalibur
EXC-4000 family of carrier boards. The module is an ARINC 708/453 2-channel test and simulation module for the Weather Radar Display Databus. The M4K708 supports two ARINC 708/453 channels, each selectable as transmit or receive.
Each channel implements an 64K
×16 FIFO and supports polling and/or interrupt driven operation.
The M4K708 comes complete with Windows software, a C-driver software library including source code. In addition, Excalibur produces adapter cables that convert the carrier board I/O Molex™ connector to two twinax CJ70-49 connectors. The cable may be purchased at an additional cost.
The M4K708-E option is an extended temperature (-40º to +85ºC), ruggedized version of the module for industrial or harsh environmental conditions.
M4K708 Module: User’s Manual
page 1 - 1
Chapter 1
1.1.1
1.1.2
Introduction
M4K708 Module Features
General Features
Supports 2 ARINC-708/453 channels, each programmable as transmit or receive
64K
× 16 FIFO per channel holds up to 655 1600bit words
Receive Channel
Receive features:
Word status tagging
Word time tagging (32-bit)
Receive count interval trigger
Receive counter [indicates number of words received]
Polling conditions:
FIFO full
FIFO half full
FIFO empty
‘n’ Words received
Interrupt conditions:
FIFO full
‘n’ Words received
Physical Characteristics
Dimensions:
Weight:
67mm
× 48mm
20g
Optional bus termination
Interrupt and polling modes of operation
Loopback test capability
Transmit Channel
Transmission modes:
One-shot [one 1600-bit word at a time]
Continuous [as long as FIFO not empty]
Continuous FIFO retransmit
Programmable inter word gap time
[0–6.5 sec @ 100
μsec resolution]
Polling conditions:
FIFO full
FIFO half full
FIFO empty
‘n’ Words transmitted
Interrupt conditions:
FIFO empty
‘n’ Words transmitted
Host Interface
EXC-4000 series of carrier boards
Power:+5V @ 600mA both channels transmitting @ 50% duty cycle
Operating Environmen
t
Temperature: 0° to 70°C standard temperature
-40° to +85°C extended temperature
Humidity:
[optional]
5%–90% condensing
Software Support
C drivers with source code
Chapter 4 Ordering Information
, for exact part numbers.
M4K708 Module Block Diagram
M4K
Local
Bus
Addr/Data/Ctrl
Ch#0
Tx/Rx
64Kx16 FIFO
Local Bus
Interface
&
Channel’s
Logic
Ch#0
Front
End
Ch#0
Bus
Ch#1
Tx/Rx
64Kx16 FIFO
FPGA
Ch#1
Front
End
Ch#1
Bus
40MHz
Osc
Config
DIP Sw
Figure 1-1 M4K708 Module Block Diagram
M4K708 Module: User’s Manual
page 1 - 2
Chapter 1
1.2
1.2.1
1.2.2
Introduction
Installation
To operate the M4K708 module:
1.
Install the EXC-4000 carrier board with the module in the computer.
2.
Add Software Tools drivers to the hard disk.
Module Installation
Warning:
Wear a suitably grounded, electrostatic discharge wrist strap whenever handling the M4K708 module and use all antistatic precautionary measures.
1.
If the module is supplied separately from the carrier board, very carefully, insert the module on to the desired module location on the carrier EXC-4000 board. The pin #1 marker (marked with a white rectangle) on the module must be aligned with the white rectangles on the carrier board.
2.
With the computer power source switched
off
,
insert the EXC-4000 carrier board with the M4K708 module into a slot in the computer.
3.
Attach the 708 adapter cable to the carrier board I/O connector and to the bus.
For more information about installing the module, see
Adding Software Tools Drivers
The standard software included with the M4K708 module is for Windows operating systems. Software compatible with other operating systems is available and can be downloaded from our website: www.mil-1553.com.
For information about installing the accompanying software drivers, see the
Readme.pdf
file for the M4K708 module on the Excalibur Installation CD that came with your module.
M4K708 Module: User’s Manual
page 1 - 3
Chapter 1
1.3
Introduction
M4K708 General Memory Map
The M4K708 memory map is divided into four regions – three memory regions and one reserved region:
Region 1 [1 Kbytes] is the Channel #0 memory space;
Region 2 [1 Kbytes] is the Channel #1 memory space;
Region 3 [1 Kbytes] is the Global memory space;
Region 4 – reserved
Region 1
1 Kbyte
Channel #0 Memory Space 00000 – 003FF H
Region 2
1 Kbyte
Channel #1 Memory Space 00400 – 007FF H
Region 3
1 Kbytes
Global Memory Space 00800 – 00AFF H
Region 4
125 Kbytes
Reserved 00B00 – 1FFFF H
Figure 1-2 M4K708 General memory Map
For a description of the channel receive and transmit operation as well as Global and Channel Control registers see Chapter 2. Chapter 3 includes details of the
Mechanical and Electrical Specifications of the M4K708 Module.
page 1 - 4 Excalibur Systems
Chapter 2
2
Channel Operation
Channel Operation
Chapter 2 describes M4K708 module operation.
Channel Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-2
Channel Receive Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-2
Channel Transmit Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-3
Global Control Registers and Memory Map . . . . . . . . . . . . . . . . . . . .2-4
Global Hardware Revision Register . . . . . . . . . . . . . . . . . . . . . .2-4
Global Software Reset Register . . . . . . . . . . . . . . . . . . . . . . . . .2-5
Global Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . .2-5
Global Start Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-5
Global Interrupt Status Register . . . . . . . . . . . . . . . . . . . . . . . . .2-6
Global Time Tag Reset Register . . . . . . . . . . . . . . . . . . . . . . . . .2-6
Global Time Tag Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-6
Channel Control Registers and Memory Map . . . . . . . . . . . . . . . . . .2-7
Channel Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-8
Channel Start/Stop Register . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-8
Channel Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-9
Channel Interrupt Mask Register. . . . . . . . . . . . . . . . . . . . . . . . .2-9
Channel Interrupt Status Register . . . . . . . . . . . . . . . . . . . . . . .2-10
Channel Interrupt Clear Register. . . . . . . . . . . . . . . . . . . . . . . .2-10
Channel Event Frequency Register. . . . . . . . . . . . . . . . . . . . . .2-11
Channel FIFO Counter Register . . . . . . . . . . . . . . . . . . . . . . . .2-11
Channel Output Trigger Mask Register . . . . . . . . . . . . . . . . . . .2-11
Receive FIFO Read Register . . . . . . . . . . . . . . . . . . . . . . . . . .2-13
Receive FIFO Word Type Register . . . . . . . . . . . . . . . . . . . . . .2-14
Receive FIFO Word Count Register . . . . . . . . . . . . . . . . . . . . .2-14
Transmit FIFO Data / First / Last Write Register . . . . . . . . . . . .2-14
Transmit Interval Value Register . . . . . . . . . . . . . . . . . . . . . . . .2-15
M4K708 Module: User’s Manual
page 2 - 1
Chapter 2 Channel Operation
2.1
Channel Operation
Each channel’s mode of operation, either transmit or receive, is selected through bits in the
. Selecting the mode sets also the direction of
the channel’s FIFO. Within the channel’s Memory space there are three groups of registers:
• The first group is common to transmit and receive modes
• The second group is dedicated to receive mode only
• The third group of registers is dedicated to transmit mode only
Each channel provides interrupts/triggers or polling bits on two occasions. The first
occasion (Word Over) is set by the
Channel Event Frequency Register
with the number of
708 Words received/sent between the occasions. The second occasion (FIFO Over) indicates a FIFO overrun/underrun Error condition. In addition the channels can be set up in an Internal loopback configuration. This crosswire connection allows the user to perform a full module’s internal self test by transmitting, receiving and comparing in both directions, including interrupts and all other registers functionality.
2.1.1
Channel Receive Operation
In receive mode, after start is activated, each 708 Word is stored in the FIFO as a block of 103 16-bit words (see
Figure 2-3 Received 708 Word Block Structure,
The first two words in the FIFO block are Time_Tag_Lo (first) and Time_Tag_Hi, indicating the word time stamp, then follow the 100 words comprising the 1600-bits of the 708 Word, and finally comes the Status Word, indicating the word status
(valid or not). During the storing process, the Channel FIFO Counter is incremented each write to the FIFO. The
Receive FIFO Word Count Register
is incremented by 1 at the end of receiving the 708 Word. The next received 103 word block is pushed into the FIFO immediately after it. The user can read the FIFO in
conjunction with interrupts or polling bits or counters value or
bits (FIFO not empty or half full). Each 16-bit word read from the FIFO can be evaluated by reading the
Receive FIFO Word Type Register
immediately after it in order to follow the block structure.
Note:
The first bit received from the 708 bus is located at the least significant bit
(LSB) of the first data word read from the fifo. In the same way each following 16 bits are shifted in (shift right).
page 2 - 2 Excalibur Systems
Chapter 2 Channel Operation
2.1.2
Channel Transmit Operation
In transmit operation the data words are loaded by the user into the FIFO and once start is activated, are transmitted in the run mode selected by the
bits. Transmission stops as soon as the FIFO reaches an empty condition.
There are three run modes: One-shot, Continuous and Continuous FIFO
Retransmit.
Run Mode
One Shot
Continuous
Continuous FIFO
Retransmit
Description
Transmits one 708 Word and then clears the Start/Stop bit
Transmits 708 Words continuously as long as the fifo is not empty
The FIFO is preloaded with a set of 708 Words and after start is activated, this set of words is retransmitted continuously
In the continuous modes the 708 Words are sent in time intervals set by the
. The user can write to the FIFO in conjunction with interrupts
not full or half full or channel in transmit).
Each 708 Word written into the FIFO is a block of 100 16-bit words, which are loaded by the user through three registers. The first word is written to the
Transmit
FIFO First Write Register
, the next 98 words are written to the
Transmit FIFO Data Register
and the last word is written to the
Transmit FIFO Last Write Register
. The reason for using three registers is to indicate to the hardware the beginning and end of the
Figure 2-2 Channel Memory Maps,
Transmit FIFO Data / First / Last
Note:
The least significant bit (LSB) of the first data word written to the FIFO is the first bit transmitted over the 708 bus. In the same way each following 16 bits are shifted out (shift right).
M4K708 Module: User’s Manual
page 2 - 3
Chapter 2
2.2
Global Control Registers and Memory Map
The global memory block contains all the module global functions.
Global Hardware Revision
Global Software Reset
Global Configuration
Global Start
Global Interrupt Status
Global Time Tag Reset
Global Time Tag Counter
Spare
Reserved [Factory test]
Reserved
Figure 2-1 Global Registers Memory Map
00800 H
00802 H
00804 H
00806 H
00808 H
0080AH
0080C – 0080E H
00810 H
00812 H
00814 – 1FFFF H
Channel Operation
2.2.1
Read
Global Hardware Revision Register Address: 00800 (H)
The Global Hardware Revision register indicates the hardware FPGA revision level.
Bit
04-15
00-03
Bit Name Description
Module ID Hard coded to value 708 H
FPGA Rev.
1 = Rev 1
2 = Rev 2
3 = Rev 3
Global Hardware Revision Register
page 2 - 4 Excalibur Systems
Chapter 2 Channel Operation
2.2.2
Write
Global Software Reset Register Address: 00802 (H)
Writing any value to the Global Software Reset register resets the whole module.
2.2.3
Write/
Read
Global Configuration Register Address: 00804 (H)
The Global Configuration register is used to set the channel configuration and select the self-test configuration.
The internal loopback configuration connects the channel’s digital internal input/ output signals. This mode can be used to check the whole channel’s logic by transmitting /receiving test words in both directions. No data is transmitted over the 708/453 bus in this mode.
This register is initialized to 0000 (H) at reset.
Bit
04-15
03
02
01
00
Bit Name Description
Reserved Set to 0
ST3
ST
Reserved
Self-test configuration
0 = No self-test
1 = Internal loopback configuration
CG1
CG0
Channel 1 Configuration set
0 = Receive
1 = Transmit
Channel 0 Configuration set
0 = Receive
1 = Transmit
Global Configuration Register
2.2.4
Write
Global Start Register Address: 00806 (H)
Writing any value to the Global Start register will start both channels running simultaneously once both channels are fully setup.
To start the channels individually, see section
2.3.3 Channel Start/Stop Register,
M4K708 Module: User’s Manual
page 2 - 5
Chapter 2 Channel Operation
2.2.5
Read
2.2.6
Write
Global Interrupt Status Register Address: 00808 (H)
The Global Interrupt register indicates the channel’s interrupt status. The
resets the status bits.
Bit
02-15
01
00
Bit Name Description
Reserved Set 0
IS1 Channel 1 Interrupt Status
0 = Bit not active
1 = Interrupt active
IS0 Channel 0 Interrupt Status
0 = Bit not active
1 = Interrupt active
Channel Interrupt Status Register
Global Time Tag Reset Register Address: 0080A (H)
Writing any value to the Global Time Tag Reset register reset’s the module’s Time
Tag Counter.
2.2.7
Read
Global Time Tag Counter Address: 0080C (H)
0080E (H)
The two Global Time Tag Counter words represent the current value of the freerunning 32-bit Time Tag counter. The counter may be read at any time. Keep the following read sequence:
FIRST: 0080C H (Lo Word - LSB)
LAST: 0080E H (Hi Word - MSB)
The resolution of the counter is 10
μsec. The counter is reset to 0 upon power-up or
Global Time Tag Reset Register
the counter starts counting. When the counter reaches the value FFFF FFFF (H), it wraps around to 0 and continues counting.
page 2 - 6 Excalibur Systems
Chapter 2 Channel Operation
2.3
Channel Control Registers and Memory Map
The Channel Control Registers must be set for each channel separately.
Register
Channel Software Reset [W]
Channel Control [W/R]
Channel Start/Stop [W/R]
Channel Status [R]
Channel Interrupt Mask [W/R]
Channel Interrupt Status [R]
Channel #0
00000 H
00002 H
00004 H
00006 H
00008 H
0000A H
Channel Interrupt Clear [W]
Channel Event Frequency [W/R]
0000C H
0000E H
Channel FIFO Counter [R] 00010 H
Channel Output Triggers Mask [W/R] 00012 H
Reserved
Receive FIFO Read [R]
Receive FIFO Word Type [R]
Receive FIFO Word Count [R]
00014 – 00001E H
00020 H
00022 H
00024 H
Receive Spare
Reserved
Transmit FIFO Data Write [W]
Transmit FIFO First Write [W]
Transmit FIFO Last Write [W]
Reserved
Transmit Interval Value [W/R]
Reserved
00026 H
00028 – 0003E H
00040 H
00042 H
00044 H
00046 –00048 H
0004A H
0004C – 003FE H
Figure 2-2 Channel Memory Maps
Channel #1
00400 H
00402 H
00404 H
00406 H
00408 H
0040A H
0040C H
0040E H
00410 H
00412 H
00414 – 0041E H
00420 H
00422 H
00424 H
00426 H
00428 – 0043E H
00440 H
00442 H
00444 H
00446 – 00448 H
0044A H
0044C – 007FE H
2.3.1
Write
Channel Software Reset Register Address: xx000 (H)
Writing any value to the Channel Software Reset register resets the whole channel.
M4K708 Module: User’s Manual
page 2 - 7
Chapter 2 Channel Operation
2.3.2
Write/
Read
Channel Control Register Address: xx002 (H)
The Channel Control register sets the parameters for the Channel Receive and
Transmit modes.
This register is initialized to 0000 (H) at reset.
Bit
02–15
00-01
Bit Name Description
Reserved Set to 0
RNM Tx Run Mode
00 = One-shot mode (single word)
01 = Continuous mode (as long as Tx FIFO not empty)
10 = Continuous FIFO retransmit mode
11 = Reserved
Channel Control Register
2.3.3
Write/
Read
Channel Start/Stop Register Address: xx004 (H)
Writing to the Channel Start/Stop Register starts or stops the channel running.
This register is initialized to 0000 (H) at reset.
Bit
01–15
00
Bit Name Description
Reserved Set 0
STR Start/Stop
0 = Stop channel transmission/reception at the end of current word processing
1 = Start the channel transmission/reception
In transmit one-shot mode this bit is automatically cleared
Channel Start/Stop Register
page 2 - 8 Excalibur Systems
Chapter 2 Channel Operation
2.3.4
Read
.
Channel Status Register Address: xx006 (H)
The Channel Status register provides various channel status bits and is initialized to 0001 (H) at reset
Bit Bit Description
05–15
04
Reserved
HCB
Set to 0
Channel FIFO Counter bit 16 [see Channel FIFO
03
ITX
02
01
00
FUL
HFL
EMT
Channel in Transmit (Tx mode)
0 = Channel not transmitting
1 = Channel is in Transmit state
Channel FIFO full (Tx mode)
0 = Bit not active
1 = FIFO full (65536 16-bit Words)
Channel FIFO half full (Tx and Rx mode)
0 = Bit not active
1 = FIFO half full (more than 32768 16-bit Words)
Channel FIFO empty (Rx mode)
0 = Bit not active
1 = FIFO empty (0 Words)
Channel Status Register
2.3.5
Write/
Read
Channel Interrupt Mask Register Address: xx008 (H)
Setting a bit of the Channel Interrupt Mask register enables the corresponding channel interrupt.
Initialized to 0000 (H) at reset.
Bit Bit Description
02–15
Reserved Set to 0
01
WOM Word Over Mask
0 = Disable WOV bit interrupt
1 = Enable WOV bit interrupt
00
FOM FIFO Over Mask
0 = Disable FOV bit interrupt
1 = Enable FOV bit interrupt
Channel Interrupt Mask Register
M4K708 Module: User’s Manual
page 2 - 9
Chapter 2 Channel Operation
2.3.6
Read
Channel Interrupt Status Register Address: xx00A (H)
Each bit in the Channel Interrupt Status register indicates the corresponding interrupt status. These bits will be set regardless of the state of the Channel
Interrupt Mask register bits.
Initialized to 0000 (H) at reset.
Note:
After receipt of an interrupt, the user must reset the interrupt condition bit via the
Channel Interrupt Clear Register
Bit
02–15
01
00
Bit Name Description
Reserved Set 0
WOV Word Over [Tx/Rx Interrupt]
0 = Bit not active
1 = Number of 708 Words, set in the Channel
Event Frequency Register, were
transmitted/received.
FOV FIFO Over [Error Interrupt]
0 = Bit not active
1 = All Words in channel were transmitted and the
FIFO is empty (in Continuous mode) in Tx mode or the FIFO reached full state in Rx mode.
Channel Interrupt Status Register
2.3.7
Write
.
Channel Interrupt Clear Register Address: xx00C (H)
Writing to the Channel Interrupt Clear Register clears the corresponding Channel
Interrupt Status register bit.
Bit Bit Name Description
02–15
Reserved Set to 0
01
00
WOC
FOC
Word Over Clear
0 = Bit not active
1 = Clear WOV bit interrupt
FIFO Over Clear
0 = Bit not active
1 = Clear FOV bit interrupt
Channel Interrupt Clear Register
page 2 - 10 Excalibur Systems
Chapter 2 Channel Operation
2.3.8
Write/
Read
Channel Event Frequency Register Address: xx00E (H)
The user sets the Channel Event Frequency Register to the number of ARINC 708
Words to be sent/received between interrupts/triggers.
Bit
10-15
00-09
Bit Name
Reserved
Intrpt_Intrvl
Description
Set to 0
Number of 708 Words to be sent/received between interrupts.
Transmit: maximum value = 655
Receive: maximum value = 636
Minimum value = 1
Set to ‘1’ upon power-up or reset
Channel Event Frequency Register
2.3.9
Channel FIFO Counter Register
Read
Address: xx010 (H)
The user reads the Channel FIFO Counter register in order to know the exact quantity of words currently residing within the channel’s FIFO. Each write to the
FIFO the counter is incremented by 1 and each read it is decremented by 1. The counter is initialized to 0000(H) at reset. While in Continuous FIFO Retransmit mode the counter holds a fixed value with the number of words written to the FIFO before start.
Bit
00-15
Bit Name Description
FIFO_Cntr Number of words residing within the FIFO. Bit 16 of this counter resides at bit 04 within the Channel
Status register. It is active for one value only when the FIFO is full to represent 65536 [10000 H].
Channel FIFO Counter
2.3.10 Channel Output Trigger Mask Register
Write/
Read
Address: xx012 (H)
Setting a bit of the Channel Output Trigger Mask register enables the corresponding trigger condition to send a pulse over the OUTRIGn output pin (see
3.3.1.1 Module Terminal Stick Pin Assignments And Description
The register is initialized to 0000(H) at reset.
Bit
02-15
01
Bit Name
Reserved
TWOM
Description
00
TFOM
Trigger Word Over Mask
0 = Disable WOV bit condition
1 = Enable WOV bit condition
Trigger FIFO Over Mask
0 = Disable FOV bit condition
1 = Enable FOV bit condition
Channel Output Trigger Mask
Channel Interrupt Status Register,
M4K708 Module: User’s Manual
page 2 - 11
Chapter 2 Channel Operation
2.3.11
Receive FIFO Read Register
Read
Address: xx020 (H)
In receive mode this FIFO register contains the received data information and may be read as long as the EMT (Channel FIFO Empty) bit is ‘0’. The type of each 16-bit
Word read from the FIFO, can be verified by reading the Receive FIFO Word Type register immediately after it.
Each received 1600-bit 708 Word block is stored in the FIFO in the following sequence:
First
Second
Third
[MSB]
15
[LSB]
0
Time Tag Lo
Time Tag Hi
Data [bits 16 -1]
•
•
•
Data [bits 1600 -1585]
Status Word
103th
Figure 2-3 Received 708 Word Block Structure
Bit
00-15
Bit Name
Ttag_Lo
Description
Lower 16 bit of the 32 bit Time_tag value
[resolution 10
μsec]
708 Word Receive Block - Time Tag Lo word
Bit
00-15
Bit Name
Ttag_Hi
Description
Upper 16 bit of the 32 bit Time_tag value
708 Word Receive Block - Time Tag Hi word
Bit
01-15
00
Bit Name
Reserved
VW
Description
Set to 0
Valid Word
0 = Not valid (Manchester/bit count error)
1 = Valid
708 Word Receive Block - Status word
page 2 - 12 Excalibur Systems
Chapter 2 Channel Operation
2.3.12
Receive FIFO Word Type Register
Read
Address: xx022 (H)
The Receive FIFO Word Type Register provides the currently read FIFO 16-bit word type. It can be read, every time, immediately after reading the Receive FIFO
Read Register to review the current Word type.
Bit
02-15
00-01
Bit Name Description
Reserved Set to 0
RFWT Receive FIFO Word Type
10 = Time Tag Lo
11 = Time Tag Hi
00 = Data
01 = Status
Receive FIFO Word Type Register
2.3.13
Receive FIFO Word Count Register
Read
Address: xx024 (H)
The Receive Word FIFO Count register indicates the number of 708 Words received
(0 – 65535). The register wraps around to 0 after reaching the maximum value of
FFFF (H).
Initialized to 0000 (H) after reset
2.3.14
Transmit FIFO Data / First / Last Write Register
Write
Address: xx040 (H), xx042 (H), xx044 (H)
In Transmit mode these FIFO registers contain the data to be transmitted and are written as long as the FUL (Channel FIFO Full) bit is ‘0’. Each 1600-bit 708 Word block is comprised of 100 16-bit words and must be written in the following sequence:
Register Sequence
First
Data
Last
First write
Content
Data bits [16 - 1]
Next 98 writes Data bits [1584 - 17]
Last write Data bits [1600 - 1585]
Address
xx042 H xx040 H xx044 H
The block is written in separate addresses in order to indicate to the hardware the beginning and end of the 708 Word block.
M4K708 Module: User’s Manual
page 2 - 13
Chapter 2 Channel Operation
2.3.15
Transmit Interval Value Register
Write/
Read
Address: xx04A (H)
In continuous modes the Transmit Interval Value Register sets the interval time between the start of each of the contiguous 708 words.
Bit
00-15
Bit Name
Intrvl_Val
Description
Interval Value
Resolution = 0.1msec/bit.
Minimum interval time = 1.6msec [0010 H value in register] for no gap between words
Maximum interval time
≅ 6.5 sec.[FFFF H]
Set to 0037 (H) upon power-up or reset for a default value of
5.5 msec
Transmit Interval Value Register
page 2 - 14 Excalibur Systems
Chapter 3
3
Mechanical and Electrical Specifications
Mechanical and Electrical Specifications
Chapter 3 describes the mechanical and electrical specification of the M4K708 module.
Factory DIP Switch Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2
Carrier Board 96-pin Connector. . . . . . . . . . . . . . . . . . . . . 3-3
M4K708 Module Adapter Cable. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4
Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5
3.1
Module Layout
P4
P3
U2
SW 1
ON
T1 T2
1 2 3 4
CH0 CH1
Polarity
Mark
66.68mm (2.625”)
Figure 3-1 M4K708 Module Layout – top view
P2
M4K708 Module: User’s Manual
page 3 - 1
Chapter 3
3.2
LED Indicators
The M4K708 contains two LEDS:
LED
LD1
LD2
Indications
Activity on channel 0
Activity on channel 1
LED Indicators
Mechanical and Electrical Specifications
3.2.1
The M4K708 SW1 DIP Switch sets the channel termination.
SW1 Switch #
1
2
3
4
Function
Channel 0 Reserved
Channel 0 Termination
Select
Channel 1 Reserved
Channel 1 Termination
Select
Position Assignment
ON = Reserved
OFF = Reserved
ON = 78 Ohm termination
OFF = None
ON = Reserved
OFF = Reserved
ON = 78 Ohm termination
OFF = None
Table 3-1 Channel Termination DIP Switch SW1
Factory DIP Switch Settings
ON
1 2
3
4
Figure 3-2 DIP Switch: top view
Dip Switch Switch Position Description
SW1
All segments to
ON
Channels set to 78 Ohm termination
Table 3-2 Factory Default DIP Switch Settings
page 3 - 2 Excalibur Systems
Chapter 3
3.3
3.3.1
Mechanical and Electrical Specifications
Connectors
The M4K708 contains four 25-pin, 0.05” spacing strips (P1 – P4), which comprise a total of 100 pins for all module connections. These pins mate with the carrier board socket strips. Out of these 100 pins, 24 pins are assigned for the communication I/O signals. On the EXC-4000 carrier board all the module’s 24
I/O signals are wired to a 96-pin female connector. This connector is divided into 4 rows (or terminal sticks) of 24 pins each. Each terminal stick is intended for a
specific module location. See Figure 3-3.
EXC-4000
Carrier Board 96-pin Connector
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1
Module#0 Terminal Stick
Module#1 Terminal Stick
Module#2 Terminal Stick
Module#3 Terminal Stick
Figure 3-3 EXC-4000 Carrier Board 96-pin Connector Layout: Front View
M4K708 Module: User’s Manual
page 3 - 3
Chapter 3 Mechanical and Electrical Specifications
3.3.1.1
Module Terminal Stick Pin Assignments And Description
3.3.2
Pin #
1
10
11
12
2
3
4–9
13–22
23
24
Signal Name
SHIELD
BUS0L
BUS0H
Reserved
BUS1L
BUS1H
SHIELD
Reserved
OUTRIGn
GND
Description
Provided for the cables shield connection. This signal is connected to the computer’s case through the carrier board’s bracket or panel.
Channel 0 Lo connection
Channel 0 Hi connection
Reserved pins - no connections
Channel 1 Lo connection
Channel 1 Hi connection
Provided for the cables shield connection. This signal is connected to the computer’s case through the carrier board’s bracket or panel.
Reserved pins - no connections
Output trigger low active output. Provides trigger pulses of approximately 500 nsec. width and is activated upon the same conditions as
interrupts. See 2.3.10 Channel Output
Trigger Mask Register on page 2-11.This
output is an open-collector type pulled up with a 330-Ohm resistor to 5V.
Provides ground reference for the OUTRIGn output.
Table 3-3 Module Terminal Stick Pin Assignments and Description
M4K708 Module Adapter Cable
Excalibur will provide at an extra cost a standard adapter cable which converts the Molex® terminal stick to two female twinax connectors [Trompeter P/N:
CJ70-49] for Channel 0 and Channel 1.
The twinax connectors mate, for example, with Trompeter PL75 male twinax connectors. These connectors are not supplied by Excalibur.
CENTER PIN
INNER SHEATH
page 3 - 4
BODY ASSEMBLY
Figure 3-4 CJ70-49 Connector– Front View
Excalibur Systems
Chapter 3 Mechanical and Electrical Specifications
3.3.2.1
M4K708 Adapter Cable Connectors Pin Assignments
CJ70-49 Pin
Position
CENTER PIN
INNER
SHEATH
BODY
ASSEMBLY
CENTER PIN
INNER
SHEATH
BODY
ASSEMBLY
Signal Name
BUS0H
BUS0L
SHIELD
BUS1H
BUS1L
SHIELD
Description
Channel 0 connection Hi
Channel 0 connection Lo
Cables shield connection
Channel 1 connection Hi
Channel 1 connection Lo
Cables shield connection
Table 3-4 Adapter Cable CJ70-49 Connectors Pin Assignments
For more information refer to
Ordering Information
in the EXC-4000 carrier board
User’s Manual.
3.4
Power Requirements
The M4K708 maximum power requirements:
Requirement Condition
+5V@150mA
+5V@400mA
Two channels receive
One receive, one transmit @ 50% duty cycle
+5V@600mA
+5V@650mA
One receive, one transmit @ 100% duty cycle
Both transmit @ 50% duty cycle
+5V@1050mA
Both transmit @ 100% duty cycle
M4K708 Module: User’s Manual
page 3 - 5
Chapter 3 Mechanical and Electrical Specifications page 3 - 6 Excalibur Systems
Chapter 4
4
Ordering Information
Ordering Information
Chapter 4 explains the options to indicate when ordering a M4K708 module.
Basic Part Number
M4K708
Option Description
ARINC 708/453 interface module for the EXC-4000 family of carrier boards. Supports 2 channels.
-E Same as above with extended temperature option: -40° to +85°C
Optional Adapter cable
X4KCx
M4K708 adapter cable, 0.5 meter length with 2 twinax CJ70-49
female connectors. See M4K708 Module Adapter Cable, page 3-4.
M4K708 Module: User’s Manual
page 4 - 1
Chapter 4 Ordering Information page 4 - 2 Excalibur Systems
ARINC 708 Display Data Bus Word Format
Appendix A ARINC 708 Display Data Bus Word Format
Appendix A-1 ARINC 708 Word Format
Bit #1
• • • • • • • • • • • • • • • • • • • • •
Bit
#1600
• • • • • • • • • • • • • • • • • • • • • • • • •
3
μsec
Begining of Word
Sync
1600
μsec
1600 Word bits
Manchester coded
3
μsec
End of Word
Sync
Figure A-1 ARINC 708 Waveform Pattern
Word Fields
MSB • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • LSB LSB • • • MSB
1600 65 64 63 52 51 50 49 11 10 9 8 1
Data Data
Accept
Control Control
Accept
Label
Figure A-2 ARINC 708 Word Fields
Bits
01– 08
09 – 10
11
Data Display
Label
Control Accept
Slave
Function details
055 (octal) see
Table A-2 Control Accept Functions
0 = Master (Normal)
1 = Slave
page
12 – 13
14 – 18
19 – 25
26
27 – 29
30 – 36
37 – 42
43 – 48
49
50 – 51
52 – 63
64
65 – 67
•
•
•
1598 – 1600
Spare
Mode Annunciation
Faults
Stabilization
Mode
Tilt
Gain
Range
Spare
Data Accept
Scan Angle
Spare
Bin 1
•
•
•
Bin 512 see
see
0 = Stabilization OFF
1 = Stabilization ON see
see
see
see
see
see
see
Table A-12 Weather Condition / Reflectivity Data
Table A-1 Display Data Bus Word Format
Note:
The lowest order bit is referred to as bit 8 for the
Label
field while for the other fields it is referred to as bit 9.
M4K708 Module:User’s Manual page A - 1
ARINC 708 Display Data Bus Word Format
Appendix A-2 ARINC 708 Word Bits
Control Accept Function
1
2
Matrix Code Bit 10 Bit 9 Function
0
0 0 Do not accept control
3
0
1
1
1
0
1
IND 1 accept control
IND 2 accept control
All INDs accept control
Table A-2 Control Accept Functions
Mode Annunciation
Bit 18 17 16 15 14 Function
0 0 0 0 0 Normal
1
0
0
1
0
0
0
0
0
0
Antenna stability limits
Sector scan
0
0
0
0
0
0
1
0
0
0
1
0
0
0
1
Anti clutter
Weather alert
Turbulence alert
Table A-3 Mode Annunciation
Bits 14 – 18 should be independently coded to indicate (when to set to 1) to the display or other receiver device the following:
Bit
14
15
16
17
18
Code indicator
Automatic sensing of a Turbulence alert has occurred
Automatic sensing of a reflectivity Weather alert has occurred
Clutter elimination circuitry is in operation
Reduced Sector scan is in operation
Aircraft attitude and /or tilt control exceeds the system’s design limits.
Table A-4 Mode annunciation code indicator
page A- 2 Excalibur Systems
ARINC 708 Display Data Bus Word Format
Faults - coded independently
Bit 25 24 23 22 21 20 19 LRU Failure Indication
0 0 0 0 0 0 0 No detected faults
1
0
0
1
0
0
0
0
0
0
0
0
0
0
Transmitter/receiver Fault
Antenna fault
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
1
Control fault
Altitude input fault
Calibration fault [T–R]
Display fault
Cooling fault
Table A-5 Faults
Operating Mode
4
5
2
3
6
7
0
1
Matrix
Code
1
1
0
1
1
0
0
Bit 29 Bit 28 Bit 27 Operating Mode
0 0 0 Standby
0
1
1
0
Weather [only]
Map
1
0
0
1
1
1
0
1
0
1
Contour
Test
Turbulence [only]
Weather & turbulence
Reserved
[Calibration annunciation]
Table A-6 Operating mode
Note:
Weather (only)
Turbulence (only)
Reflectivity (Weather) only data should be transmitted on all azimuth addresses.
Turbulence only data should be transmitted on all azimuth addresses.
Weather & turbulence Turbulence data combined with reflectivity data is allowed as a means to transmit both weather only and weather plus turbulence words when Weather & turbulence mode is selected.
M4K708 Module:User’s Manual page A - 3
ARINC 708 Display Data Bus Word Format
Tilt Data
Bit Tilt in degrees
36
–16
35
+8
34
+4
33
+2
32
+1
31
+0.5
30
+0.25
Table A-7 Tilt data
Note: TWO’s
complement tilt
Gain Data
Bit 42 41 40 39 38 37 Value
1 1 1 1 1 1 Cal
0
0
0
0
0
0
0
1
0
0
0
1
Max
-5
0
1
0
1
1
1
0
1
1
1
1
0
-11
-62
Table A-8 Gain data
Range Data
Bit 48 47 46 45 44 43 Range in NM
0 0 0 0 0 1 5
0
0
0
0
0
0
0
1
1
0
0
0
10
20
1
1
0
0
0
0
1
0
1
0
1
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
40
80
160
315
320
Table A-9 Range Data
page A- 4 Excalibur Systems
ARINC 708 Display Data Bus Word Format
Data Accept
Bit 51 50 Function
0 0 Do not accept data
0
1
1
1
0
1
Accept data 1
Accept data 2
Accept any data
Table A-10 Data accept
Scan Angle
Bit
60
59
58
63
62
61
Angle (in degrees)
180
90
45
22.5
11.25
5.625
Table A-11 Scan angle
Bit
54
53
52
57
56
55
Angle (in degrees)
2.8125
1.40625
0.703125
0.3415625
0.17578125
0.087890625
Weather Conditions/Reflectivity Data
2
3
0
1
Matrix code
[Pixel Value
3 bits]
4
5
6
7
Weather Condition
No precipitation [< Z2]
Light precipitation [Z2 to Z3]
Moderate precipitation [Z3 to Z4]
Heavy precipitation [Z4 to Z5]
Very heavy precipitation [> Z5]
Reserved
1
Medium turbulence
Heavy turbulence
Table A-12 Weather Condition / Reflectivity Data
1.
Out of Calibration Indication
Bit n2
0
0
0
0
1
1
Bin N
1
1
0
0
0
0
1
1
1
1
0
1
0
1
0
1
0
1
Black
Green
Yellow
Red
Magenta
M4K708 Module:User’s Manual page A - 5
The information contained in this document is believed to be accurate. However, no responsibility is assumed by Excalibur Systems, Inc. for its use and no license or rights are granted by implication or otherwise in connection therewith. Specifications are subject to change without notice.
January 2006, Rev A-2
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