Chapter 3 - Automation Direct

Chapter 3 - Automation Direct
CPU Specifications and
Operations
In This Chapter
Chapter
3
CPU Overview.............................................................................3–2
CPU General Specifications.........................................................3–4
CPU Base Electrical Specifications................................................3–5
CPU Hardware Setup..................................................................3–6
Selecting the Program Storage Media.........................................3–9
Using Battery Backup..................................................................3–14
CPU Operation............................................................................3–21
I/O Response Time......................................................................3–27
CPU Scan Time Considerations...................................................3–29
PLC Numbering Systems.............................................................3–35
Memory Map..............................................................................3–37
DL230 System V-memory...........................................................3–41
DL240 System V-memory...........................................................3–43
DL250–1 System V-memory (DL250 also) ..................................3–46
DL260 System V-memory...........................................................3–49
DL205 Aliases..............................................................................3–52
DL230 Memory Map..................................................................3–53
DL240 Memory Map..................................................................3–54
DL250–1 Memory Map (DL250 also)..........................................3–55
DL260 Memory Map..................................................................3–56
X Input/Y Output Bit Map...........................................................3–57
Control Relay Bit Map.................................................................3–59
Stage Control/Status Bit Map......................................................3–63
Timer and Counter Status Bit Maps............................................3–65
Remote I/O Bit Map....................................................................3–66
Chapter 3: CPU Specifications and Operations
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CPU Overview
3-2
The Central Processing Unit is the heart of the PLC. Almost all
system operations are controlled by the CPU, so it is important
that it is set up and installed correctly. This chapter provides the
information needed to understand:
• The differences between the various models of CPUs, and
• The steps required to set up and install the CPU.
General CPU Features
The DL230, DL240, DL250–1 and D2–260 are modular CPUs
which can be installed in 3, 4, 6, or 9 slot bases. All I/O modules
in the DL205 family will work with any of the CPUs. The DL205
CPUs offer a wide range of processing power and program instructions. All offer RLL and
Stage program instructions (See Chapter 5). They also provide extensive internal diagnostics
that can be monitored from the application program or from an operator interface.
DL230 CPU Features
The DL230 has 2.4K words of memory comprised of 2.0K of ladder memory and approximately
400 words of V-memory (data registers). It has 92 different instructions available for
programming, and supports a maximum of 256 I/O points.
Program storage is in the factory-installed EEPROM. In addition to the EEPROM there is
also RAM on the CPU which will store system parameters, V-memory, and other data which
is not in the application program.
The DL230 provides one built-in RS-232 communication port, so you can easily connect a
handheld programmer or a personal computer without needing any additional hardware.
DL240 CPU Features
The DL240 has a maximum of 3.8K of memory comprised of 2.5K of ladder memory and
approximately 1.3K of V-memory (data registers). There are 129 instructions available for
program development and a maximum of 256 points local I/O, and 896 points with remote
I/O are supported.
Program storage is in the factory-installed EEPROM. In addition to the EEPROM, there is
also RAM on the CPU that will store system parameters, V-memory and other data which is
not in the application program.
The DL240 has two communication ports. The top port is the same port configuration as the
DL230. The bottom port also supports the DirectNET protocol, so you can use the DL240 in
a DirectNET network. Since the port is RS-232, you must use an RS-232/RS-422 converter
for multi-drop connections.
DL205 User Manual, 4th Edition, Rev. C
Chapter 3: CPU Specifications and Operations
DL250–1 CPU Features
The DL250–1 replaces the DL250 CPU. It offers all the DL240 features, plus more program
instructions and a built–in Remote I/O Master port. It offers all the features of the DL250 CPU
with the addition of supporting Local expansion I/O. It has a maximum of 14.8K of program
memory comprised of 7.6K of ladder memory and 7.2K of V-memory (data registers). It
supports a maximum of 256 points of local I/O and a maximum of 768 I/O points (maximum
of two local expansion bases). In addition, port 2 supports up to 2048 points if you use the
DL250–1 as a Remote master. It includes an internal RISC–based microprocessor for greater
processing power. The DL250–1 has 240 instructions. The instructions are in addition to
the DL240 instruction set which includes drum timers, a print function, floating point math,
PID loop control for 4 loops and the Intelligent Box (IBox) instructions.
The DL250–1 has a total of two built–in communications ports. The top port is identical to
the top port of the DL240, with the exception of the DirectNet slave feature. The bottom port
is a 15–pin RS-232/RS-422 port. It will interface with DirectSOFT and operator interfaces,
and provides DirectNet and Modbus RTU Master/Slave connections.
DL260 CPU Features
The DL260 offers all the DL250–1 features, plus ASCII IN/OUT and expanded Modbus
instructions. It also supports up to 1280 local I/O points by using up to four local expansion
bases. It has a maximum of 30.4K of program memory comprised of 15.8K of ladder memory
(saved on flash memory) and 14.6K of V-memory (data registers). It also includes an internal
RISC–based microprocessor for greater processing power. The DL260 has 297 instructions.
In addition to those in the DL250–1 instruction set, the DL260 instruction set includes table
instructions, trigonometric instructions and support for 16 PID loops.
The DL260 has a total of two built–in communications ports. The top port is identical to the
top port of the DL250–1. The bottom port is a 15–pin RS-232/RS-422/RS-485 port. It will
interface with DirectSOFT (version 4.0 or later), operator interfaces, and provides DirectNet,
Modbus RTU Master/Slave connections. Port 2 also supports ASCII IN/OUT instructions.
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CPU General Specifications
Feature
Total Program memory (words)
Ladder memory (words)
V-memory (words)
Non-volatile V Memory (words)
Boolean execution /K
RLL and RLLPLUS Programming
Handheld programmer
DL230
DL240
DL250–1
DL260
3.8K
2560
1024
256
10–12 ms
Yes
Yes
14.8K
7680 (Flash)
7168
No
1.9 ms
Yes
Yes
DirectSOFT programming for Windows. Yes
Yes
Yes
Built-in communication ports
One RS–232
Two RS–232
EEPROM
Standard on CPU
Standard on CPU
One RS–232
One RS–232 or
RS–422
Flash
Total CPU memory I/O points available 256 (X,Y,CR)
896 (X, Y, CR)
2048 (X, Y, CR)
Local I/O points available
Local Expansion I/O points (including
local I/O and expansion I/O points)
256
256
256
N/A
N/A
768
1280
(2 exp. bases max.) (4 exp. bases max.)
Serial Remote I/O points (including
local I/O and expansion I/O points)
N/A
896
2048
8192
Serial Remote I/O Channels
N/A
2
8
8
Max Number of Serial Remote Slaves
N/A
7 Remote / 31 Slice 7 Remote / 31 Slice 7 Remote / 31 Slice
Ethernet Remote I/O Discrete points
N/A
896
Ethernet Remote I/O Analog I/O
channels
N/A
Map into V–memory Map into V–memory Map into V–memory
Ethernet Remote I/O channels
N/A
Limited by power
budget
Limited by power
budget
Limited by power
budget
Max Number of Ethernet slaves per
channel
N/A
16
16
16
I/O points per Remote channel
N/A
16,384 (limited to
896 by CPU)
16,384 (16 fully
expanded H4–EBC
slaves using V–
memory and bit–of–
word instructions)
16,384 (16 fully
expanded H4–EBC
slaves using V–
memory and bit–of–
word instructions
I/O Module Point Density
Slots per Base
4/8/12/16/32
3/4/6/9
4/8/12/16/32
3/4/6/9
4/8/12/16/32
3/4/6/9
4/8/12/16/32
3/4/6/9
3-4
2.4K
2048
256
128
4–6 ms
Yes
Yes
DL205 User Manual, 4th Edition, Rev. C
2048
30.4K
15872 (Flash)
14592
No
1.9 ms
Yes
Yes
Yes (requires
version 4.0 or
higher)
One RS–232
One RS–232,
RS–422 or RS–485
Flash
8192
(X, Y, CR, GX, GY)
256
8192
Chapter 3: CPU Specifications and Operations
Feature
Number of instructions available
(see Chapter 5 for details)
Control relays
Special relays (system defined)
Stages in RLLPLUS
Timers
Counters
Immediate I/O
Interrupt input (hardware / timed)
Subroutines
Drum Timers
Table Instructions
For/Next Loops
DL230
DL240
DL250–1
DL260
92
129
240
297
256
112
256
64
64
Yes
Yes / No
No
No
No
No
256
144
512
128
128
Yes
Yes / Yes
Yes
No
No
Yes
1024
144
1024
256
128
Yes
Yes / Yes
Yes
Yes
No
Yes
Math
Integer
Integer
Integer,
Floating Point
ASCII
PID Loop Control, Built In
Time of Day Clock/Calendar
Run Time Edits
Supports Overrides
Internal diagnostics
Password security
System error log
User error log
Battery backup
No
No
No
Yes
No
Yes
Yes
No
No
Yes (optional)
No
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes (optional)
Yes, OUT
Yes, 4 Loops
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes (optional)
2048
144
1024
256
256
Yes
Yes / Yes
Yes
Yes
Yes
Yes
Integer,
Floating Point,
Trigonometric
Yes, IN/OUT
Yes, 16 Loops
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes (optional)
CPU Base Electrical Specifications
Specification
AC Powered Bases
24 VDC Powered Bases 125 VDC Powered Bases
D2–03BDC1–1
D2–04BDC1–1
D2–06BDC2–1
D2–06BDC1–1
D2–09BDC2–1
D2–09BDC1–1
10.2–28.8 VDC (24VDC)
100–240 VAC +10% –15%
104–240 VDC +10% –15%
Input Voltage Range
with less than 10% ripple
30A
10A
20A
Maximum Inrush Current
80VA
25W
30W
Maximum Power
Voltage Withstand (dielectric) 1 minute @ 1500VAC between primary, secondary, field ground, and run relay
> 10Mq at 500VDC
Insulation Resistance
20–28 VDC, less than 1V p-p
20–28 VDC, less than 1V p-p
None
Auxiliary 24 VDC Output
300mA max.
300mA max.
Part Numbers
D2–03B–1
D2–04B–1
D2–06B–1
D2–09B–1
Fusing (internal to base power Non–replaceable 2A @ 250V Non–replaceable 3.15 A @
slow blow fuse
250V slow blow fuse
supply)
Non–replaceable 2A @ 250V
slow blow fuse
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CPU Hardware Setup
Communication Port Pinout Diagrams
Cables are available that allow you to quickly and easily connect a Handheld Programmer or
a personal computer to the DL205 CPUs. However, if you need to build a cable(s), use the
pinout descriptions shown on the following pages. You can also use the Tech Support/Cable
Wiring diagrams located on our website.
The DL240, DL250–1 and DL260 CPUs have two ports while the DL230 has only one. All
of the CPUs require at least one RJ-12 connector. The DL250-1 and DL260 require one 15
pin D-shell connector.
Port 1
DL250–1 and DL260
RJ12 Phone Jack
RS-232, 9600 baud
Communication Port
–K-sequence
–DirectNET slave
–Modbus RTU slave
–easily connect
DirectSOFT,
handhelds, operator
interfaces, any DirectNet
master
3-6
RUN
CPU
PWR
BATT
DL230
CPU
DL260
Port 2
DL250–1 and DL260
15-pin HD Connector
RS-232/RS-422, up to 38.4K baud
Communication Port
–K-sequence
–DirectNET Master/Slave
–Modbus RTU Master/Slave
–easily connect
DirectSOFT,
handhelds, operator
interfaces, any DirectNet
or Modbus master or slave
Port 1
RJ12 Phone Jack
RS-232, 9600 baud
Communication Port
–K-sequence
–easily connect
DirectSOFT, handhelds,
operator interfaces, etc.
Port 2
PORT
?1
RJ12 Phone Jack
RS-232, up to 19.2K baud
Communication Port
–K-sequence
–DirectNET slave
–easily connect
DirectSOFT, handhelds,
operator interfaces, or any
DirectNet master
DL205 User Manual, 4th Edition, Rev. C
Port 2
Additional DL260 Features
–ASCII IN/OUT Instructions
–Extended Modbus Instructions
–RS-485 support
PWR
BATT
RUN
CPU
DL240
CPU
RUN
TERM
CH1
CH2
CH3
CH4
PORT1
PORT2
Chapter 3: CPU Specifications and Operations
Port 1 Specifications
230
240
250-1
260
The operating parameters for Port 1 on the DL230 and DL240 CPUs are fixed.
• 6-pin female modular (RJ12 phone jack) type connector
• K–sequence protocol (slave only)
• RS-232, 9600 baud
• Connect to DirectSOFT, D2–HPP, DV–1000, HMI panels
• Fixed station address of 1
• 8 data bits, one stop
• Asynchronous, Half–duplex, DTE
• Odd parity
1
6
6-pin Female
Modular Connector
Port 1 Pin Descriptions (DL230 and DL240)
1
2
3
4
5
6
0V
5V
RXD
TXD
5V
0V
Power (–) connection (GND)
Power (+) connection
Receive Data (RS-232)
Transmit Data (RS-232)
Power (+) connection
Power (–) connection (GND)
Port 1 Specifications
230
240
250-1
260
The operating parameters for Port 1 on the DL250–1 and DL260 CPU are fixed. This applies
to the DL250 as well.
• 6-pin female modular (RJ12 phone jack) type connector
• K–sequence protocol (slave only)
• DirectNET (slave only)
• Modbus RTU (slave only) - supported only on D2-250-1 and D2-260
• RS-232, 9600 baud
• Connect to DirectSOFT, D2–HPP, DV1000 or DirectNET master
• 8 data bits, one start, one stop
• Asynchronous, Half–duplex, DTE
• Odd parity
Port 1 Pin Descriptions (DL250-1 and DL260)
1
6
6-pin Female
Modular Connector
1
2
3
4
5
6
0V
5V
RXD
TXD
5V
0V
Power (–) connection (GND)
Power (+) connection
Receive Data (RS-232C)
Transmit Data (RS-232C
Power (+) connection
Power (–) connection (GND)
NOTE: The 5V pins are rated at 200mA maximum, primarily for use with some operator interface units.
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Port 2 Specifications
230
240
250-1
260
The operating parameters for Port 2 on the DL240 CPU are configurable using Aux functions
on a programming device.
• 6-Pin female modular (RJ12 phone jack)
type connector
1
6
• K–sequence protocol, DirectNET (slave),
• RS-232, Up to 19.2K baud
6-pin Female
Modular Connector
• Address selectable (1–90)
• Connect to DirectSOFT, D2–HPP,
DV-1000, HMI, or DirectNET master
• 8 data bits, one start, one stop
• Asynchronous, Half–duplex, DTE
• Odd or no parity
Port 2 Specifications
230
240
250-1
260
3-8
Port 2 Pin Descriptions (DL240 only)
1
2
3
4
5
6
0V
5V
RXD
TXD
RTS
0V
Power (–) connection (GND)
Power (+) connection
Receive Data (RS-232)
Transmit Data (RS-232)
Request to Send
Power (–) connection (GND)
Port 2 on the DL250-1 and DL260 CPUs
is located on the 15-pin D-shell connector. It is configurable using AUX functions on a
programming device. This applies to the
6
11
1
DL250 as well.
• 15-Pin female D type connector
• Protocol: K-sequence, DirectNET Master/
Slave, Modbus RTU Master/Slave, Remote
I/O, (ASCII IN/OUT DL260 only)
10
5
• RS-232, non-isolated, distance within 15m
(approximately 50ft)
• RS-422, non-isolated, distance within
1000 m (approximately 3280ft)
• RS-485, non–isolated, distance within
1000m (DL260 only
15-pin Female
D Connector
Port 2 Pin Descriptions (DL250–1 / DL260)
1
2
• Up to 38.4 K baud
3
• Address selectable (1–90)
4
• Connects to DirectSOFT, D2–HPP,
5
operator interfaces, any DirectNET or
Modbus master/slave, (ASCII devices-DL260 6
7
only)
8
• 8 data bits, one start, one stop
9
• Asynchronous, Half–duplex, DTE Remote
10
I/O
11
• Odd/even/none parity
12
13
14
15
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5V
TXD2
RXD2
RTS2
CTS2
RXD2 –
0V
0V
TXD2 +
TXD2 –
RTS2 +
RTS2 –
RXD2 +
CTS2 +
CTS2 –
5VDC
Transmit Data (RS-232)
Receive Data (RS-232)
Ready to Send (RS–232)
Clear to Send (RS–232)
Receive Data – ( RS–422) (RS–485 DL260)
Logic Ground
Logic Ground
Transmit Data + (RS–422) (RS–485 DL260)
Transmit Data – (RS–422) (RS–485 DL260)
Request to Send + (RS–422) (RS–485 DL260)
Request to Send – (RS–422)(RS–485 DL260)
Receive Data + (RS–422) (RS–485 DL260)
Clear to Send + (RS422) (RS–485 DL260)
Clear to Send – (RS–422) (RS–485 DL260)
Chapter 3: CPU Specifications and Operations
Selecting the Program Storage Media
Built-in EEPROM
230
240
250-1
260
The DL230 and DL240 CPUs provide built-in EEPROM storage. This type of memory is
non-volatile and is not dependent on battery backup to retain the program. The EEPROM
can be electrically reprogrammed without being removed from the CPU. You can also set
Jumper 3, which will write protect the EEPROM. The jumper is set at the factory to allow
changes to EEPROM. If you select write protection by changing the jumper position, you
cannot make changes to the program.
WARNING: Do NOT change Jumper 2. This is for factory test operations. If you change Jumper 2, the
CPU will not operate properly.
Jumper in position
shown selects write
protect for EEPROM
EEPROM
EEPROM Sizes
The DL230 and DL240 CPUs use different sizes of EEPROMs. The CPUs come from the
factory with EEPROMs already installed. However, if you need extra EEPROMs, select one
that is compatible with the following part numbers.
CPU Type
EEPROM Part Number
Capacity
DL230
DL240
Hitachi HN58C65P–25
Hitachi HN58C256P–20
8K byte (2Kw)
32K byte (3Kw)
EEPROM Operations
Many AUX functions are specifically for use with an EEPROM in the Handheld Programmer.
This enables you to quickly and easily copy programs between a program developed offline in
the Handheld Programmer and the CPU. Also, you can erase EEPROMs, compare them, etc.
See the DL205 Handheld Programmer Manual for details on using these AUX functions with
the Handheld Programmer.
NOTE: If the instructions are supported in both CPUs and the program size is within the limits of the
DL230, you can move a program between the two CPUs. However, the EEPROM installed in the Handheld
Programmer must be the same size as (or larger than) the CPU being used. For example, you could not
install a DL240 EEPROM in the Handheld Programmer and download the program to a DL230. Instead, if
the program is within the size limits of the DL230, use a DL230 chip in the Handheld when you obtain the
program from the DL240.
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Installing the CPU
230
240
250-1
260
3-10
The CPU must be installed in the first slot in the base (closest to the power supply). You
cannot install the CPU in any other slot. When inserting the CPU into the base, align the
PC board with the grooves on the top and bottom of the base. Push the CPU straight into
the base until it is firmly seated in the backplane connector. Use the retaining clips to secure
the CPU to the base.
WARNING: To minimize the risk of electrical shock, personal injury, or equipment damage, always
disconnect the system power before installing or removing any system component.
Retaining Clips
CPU must reside in first slot!
Connecting the Programming Devices
The handheld programmer is connected to the CPU with a Handheld Programmer cable.
You can connect the Handheld Programmer to either port on a DL240 CPU. The Handheld
Programmer is shipped with a cable. The cable is approximately 6.5 ft (200cm).
Connect Handheld to either Port
If you are using a Personal Computer with the DirectSOFT programming package, you can
use either the top or bottom port.
Connect PC to either Port
DL205 User Manual, 4th Edition, Rev. C
Chapter 3: CPU Specifications and Operations
Status Indicators
PWR
PWR
BATT
RUN
CPU
BATT
DL240
Port 1
DL230
RUN
CPU
CPU
CPU
Mode Switch
RUN
TERM
CH1
CH2
CH3
CH4
Adjustments
PORT1
Port 2
PORT1
Analog
PORT?
2
Status Indicators
DL260
DL250-1
Mode Switch
Port 1
Port 2
Battery Slot
CPU Setup Information
Even if you have years of experience using PLCs, there are a few tasks you need to do before
you can start entering programs. This section includes some basic tasks, such as changing the
CPU mode, but it also includes some tasks that you may never have to use. Here’s a brief list
of the items that are discussed:
• Using auxiliary functions
• Clearing the program (and other memory areas)
• How to initialize system memory
• Setting retentive memory ranges
The following paragraphs provide the setup information necessary to ready the CPU for
programming, including set-up instructions for either type of programming device you are
using. The D2–HPP Handheld Programmer Manual provides the Handheld keystrokes
required to perform all of these operations. The DirectSOFT Manual provides a description of
the menus and keystrokes required to perform the setup procedures via DirectSOFT.
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Status Indicators
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The status indicator LEDs on the CPU front panels have specific functions that can help in
programming and troubleshooting.
Indicator
PWR
RUN
CPU
BATT
Status
ON
OFF
ON
OFF
Blinking
ON
OFF
Meaning
ON
Power good
Power failure
CPU is in Run Mode
CPU is in Stop or Program Mode
CPU is in Firmware Upgrade Mode
CPU self diagnostics error
CPU self diagnostics good
Low battery voltage (only with System
Memory bit B7633.12 set)
OFF
CPU battery voltage is good or disabled
Mode Switch Functions
The mode switch on the DL240, DL250–1 and DL260 CPUs provides positions for enabling
and disabling program changes in the CPU. Unless the mode switch is in the TERM position,
RUN and STOP mode changes will not be allowed by any interface device, (Handheld
Programmer, DirectSOFT programing package or operator interface). Programs may be
viewed or monitored but no changes may be made. If the switch is in the TERM position and
no program password is in effect, all operating modes as well as program access will be allowed
through the connected programming or monitoring device.
The CPU mode can be changed in two ways:
• Use the CPU mode switch to select the operating mode.
• Place the CPU mode switch in the TERM position and use a programming device to change
operating modes. In this position, you can change between Run and Program modes.
NOTE: If the PLC is switched to the RUN Mode without a program in the CPU, the CPU will produce a
FATAL ERROR which can be cleared by cycling the power to the PLC.
Mode Switch Position
CPU Action
RUN (Run Program)
CPU is forced into the RUN mode if no errors are encountered. No
changes are allowed by the attached programming/monitoring device.
TERM (Terminal)
RUN, PROGRAM and the TEST modes are available. Mode and
program changes are allowed by the programming/monitoring device.
STOP (DL250–1 and DL260 only Stop Program)
CPU is forced into the STOP mode. No changes are allowed by the
programming/monitoring device.
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Chapter 3: CPU Specifications and Operations
Changing Modes in the DL205 PLC
Mode Switch Position
CPU Action
CPU is forced into the RUN mode if no errors are encountered.
No changes are allowed by the attached programming/
monitoring device.
PROGRAM and the TEST modes are available. Mode and
program changes are allowed by the programming/monitoring
device.
CPU is forced into the STOP mode. No changes are allowed
by the programming/monitoring device.
RUN (Run Program)
TERM (Terminal) RUN
STOP
The CPU mode can be changed in two ways: you can use the CPU mode switch to select
the operating mode, or you can place the mode switch in the TERM position and use a
programming device to change operating modes. With the switch in this position, the CPU
can be changed between Run and Program modes. You can use either DirectSOFT or the
Handheld Programmer to change the CPU mode of operation. With DirectSOFT use the
PLC menu option PLC > Mode or use the Mode button located on the Online
toolbar. With the Handheld Programmer, use the MODE key.
PLC Menu
MODE Key
Mode of Operation at Power Up
The DL205 CPUs will normally power up in the mode that it was in just prior to the power
interruption. For example, if the CPU was in Program Mode when the power was disconnected,
the CPU will power up in Program Mode (see warning note below).
WARNING: Once the super capacitor has discharged, the system memory may not retain the previous
mode of operation. When this occurs, the PLC can power-up in either Run or Program Mode if the
mode switch is in the term position. There is no way to determine which mode will be entered as the
startup mode. Failure to adhere to this warning greatly increases the risk of unexpected equipment
startup.
The mode in which the CPU will power up in is also determined by the state of System
Memory bit B7633.13. If the bit is set and the Mode Switch is in the TERM position, the
CPU will power-up in RUN mode. If B7633.13 is not set with the Mode Switch in TERM
position, then the CPU will power up in the state it was in when it was powered down.
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Using Battery Backup
3-14
An optional lithium battery is available to maintain the system RAM retentive memory when
the DL205 system is without external power. Typical CPU battery life is five years, which
includes PLC runtime and normal shut-down periods. However, consider installing a fresh
battery if your battery has not been changed recently and the system will be shut down for a
period of more than ten days.
NOTE: Before installing or replacing your CPU battery, back up your V-memory and system parameters.
You can do this by using DirectSOFT to save the program, V-memory, and system parameters to hard/
floppy disk on a personal computer.
To install the D2–BAT CPU battery in DL230 or
DL240 CPUs:
1. G
ently push the battery connector onto the circuit
board connector.
2. P
ush the battery into the retaining clip. Don’t use
excessive force. You may break the retaining clip.
3. Make a note of the date the battery was installed.
DL250-1 and DL260
-1
DL230
and DL240
DL230 and DL240
To install the D2–BAT–1 CPU battery in the DL250–1/DL260
CPUs: (#CR2354)
1. P
ress the retaining clip on the battery door down and swing the
battery door open.
2. P
lace the battery into the coin–type slot with the +, or larger, side
out.
3. Close the battery door making sure that it locks securely in place.
4. Make a note of the date the battery was installed.
WARNING: Do not attempt to recharge the battery or dispose of an old battery by fire. The battery may
explode or release hazardous materials.
Battery Backup
The battery backup is available immediately after the battery has been installed in the DL205
CPUs. The battery low (BATT) indicator will turn on if the battery is less than 2.5VDC (refer
to the Status Indicator table on page 3-12). Special Relay 43 (SP43) will also be activated. The
low battery indication is enabled by setting bit 12 of V7633 (B7633.12). If the low-battery
feature is not desired, do not set bit V7633.12.
The super capacitor will retain memory IF it is configured as retentive regardless of the state of
B7633.12. The battery will be the same, but for a much longer time.
DL205 User Manual, 4th Edition, Rev. C
Chapter 3: CPU Specifications and Operations
Auxiliary Functions
Many CPU set-up tasks involve the use of Auxiliary (AUX) Functions. The AUX Functions
perform many different operations, including clearing ladder memory, displaying the scan
time, copying programs to EEPROM in the Handheld Programmer, etc. They are divided
into categories that affect different system parameters. Appendix A provides a description of
the AUX functions.
You can access the AUX Functions from DirectSOFT or from the DL205 Handheld
Programmer. The manuals for those products provide step-by-step procedures for accessing
the AUX Functions. Some of these AUX Functions are designed specifically for the Handheld
Programmer setup, so they will not be needed (or available) with the DirectSOFT package.
The following table shows a list of the Auxiliary functions for the different CPUs and the
Handheld Programmer.
NOTE: The Handheld Programmer may have additional AUX functions that are not supported with the
DL205 CPUs.
AUX Function and
Description
AUX Function and
Description
230 240 250–1 260
AUX 2* — RLL Operations
21
22
23
24
Check Program
Change Reference
Clear Ladder Range
Clear All Ladders
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
AUX 6* — Handheld Programmer Configuration
ü
ü
ü
ü
AUX 3* — V-Memory Operations
31 Clear V Memory
ü
ü
ü
ü
AUX 4* — I/O Configuration
41 Show I/O Configuration
42 I/O Diagnostics
Power-up I/O
44
Configuration Check
45 Select Configuration
46 Configure I/O
61 Show Revision Numbers
62 Beeper On / Off
65 Run Self Diagnostics
71
72
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
74
75
ü
X
ü
X
ü
ü
ü
ü
76
ü
Modify Program Name
Display / Change Calendar X
ü
Display Scan Time
ü
Initialize Scratchpad
ü
Set Watchdog Timer
Set CPU Network Address X
ü
Set Retentive Ranges
ü
Test Operations
Bit Override
X
Counter Interface Config. ü
Display Error History
X
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
X
X
ü
X
X
ü
X
X
ü
X
X
–
ü
ü
AUX 7* — EEPROM Operations
ü
ü
AUX 5* — CPU Configuration
51
52
53
54
55
56
57
58
59
5B
5C
230 240 250–1 260 HPP
73
Copy CPU memory to
HPP EEPROM
Write HPP EEPROM to CPU
Compare CPU to
HPP EEPROM
Blank Check (HPP EEPROM)
Erase HPP EEPROM
Show EEPROM Type
(CPU and HPP)
X
X
X
X
ü
X
X
X
X
ü
X
X
X
X
ü
X
X
X
X
X
X
X
X
ü
ü
X
X
X
X
ü
ü
ü
ü
–
–
–
AUX 8* — Password Operations
81 Modify Password
82 Unlock CPU
83 Lock CPU
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü Supported
X Not Supported
- Not Applicable
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Clearing an Existing Program
Before you enter a new program, you should always clear ladder memory. You can use AUX
Function 24 to clear the complete program.
You can also use other AUX functions to clear other memory areas.
AUX 23 — Clear Ladder Range
AUX 24 — Clear all Ladders
AUX 31 — Clear V-Memory
Initializing System Memory
The DL205 CPUs maintain system parameters in a memory area often referred to as the
“scratchpad.” In some cases, you may make changes to the system setup that will be stored in
system memory. For example, if you specify a range of Control Relays (CRs) as retentive, these
changes are stored. AUX 54 resets the system memory to the default values.
WARNING: You may never have to use this feature unless you want to clear any set-up information
that is stored in system memory. Usually, you will only need to initialize the system memory if you
are changing programs and the old program required a special system setup. You can usually change
from program to program without ever initializing system memory. Remember, this AUX function
will reset all system memory. If you have set special parameters such as retentive ranges, etc., they
will be erased when AUX 54 is used. Make sure that you have considered all ramifications of this
operation before you select it.
Setting the Clock and Calendar
230
240
250-1
260
3-16
The DL240, DL250–1 and DL260 also have a Clock/Calendar that can be used for many
purposes. If you need to use this feature, AUX functions are available that allow you to set the
date and time. For example, you would use AUX 52, Display/Change Calendar to set the time
and date with the Handheld Programmer. With DirectSOFT you would use the PLC set-up
menu options using K–Sequence protocol only.
The CPU uses the following format to display the date and time.
• Date — Year, Month, Date, Day of week (0 – 6, Sunday
through Saturday)
• Time —24-hour format, Hours, Minutes, Seconds
Handheld Programmer Display
23:08:17 08/02/20
You can use the AUX function to change any component of the date or time. However, the
CPU will not automatically correct any discrepancy between the date and the day of the week.
For example, if you change the date to the 15th of the month and the 15th is on a Thursday,
you will also have to change the day of the week (unless the CPU already shows the date as
Thursday). The day of the week can only be set using the Handheld Programmer.
DL205 User Manual, 4th Edition, Rev. C
Chapter 3: CPU Specifications and Operations
Setting the CPU Network Address
240
250-1
260
230
The DL240, DL250–1 and DL260 CPUs have built in DirectNet ports. You can use the
Handheld Programmer to set the network address for the port and the port communication
parameters. The default settings are:
• Station Address 1
• Hex Mode
• Odd Parity
• 9600 Baud
The DirectNet Manual provides additional information about choosing the communication
settings for network operation.
Setting Retentive Memory Ranges
The DL205 CPUs provide certain ranges of retentive memory by default. The default ranges
are suitable for many applications, but you can change them if your application requires
additional retentive ranges or no retentive ranges at all. The default settings are:
DL230
Memory
Area
Control Relays
V-Memory
Timers
Counters
Stages
DL240
DL250–1
DL260
Default Range Avail. Range Default Range
Avail. Range Default Range
Avail. Range Default Range
Avail. Range
C300 – C377
V2000 – V7777
None by default
CT0 – CT77
None by default
C0 – C377
V0 – V7777
T0 – T177
CT0 – CT177
S0 – S777
C0 – C1777
V0 – V17777
T0 – T377
CT0 – CT177
S0 – S1777
C0 – C3777
V0 – V37777
T0 – T377
CT0 – CT377
S0 – S1777
C0 – C377
V0 – V7777
T0 – T77
CT0 – CT77
S0 – S377
C300 – C377
V2000 – V7777
None by default
CT0 – CT177
None by default
C1000 – C1777
V1400 – V3777
None by default
CT0 – CT177
None by default
C1000 – C3777
V400 – V37777
None by default
CT0 – CT377
None by default
You can use AUX 57 to set the retentive ranges. You can also use DirectSOFT menus to select
the retentive ranges.
WARNING: The DL205 CPUs do not come with a battery. The super capacitor will retain the values in
the event of a power loss, but only for a short period of time, depending on conditions. If the retentive
ranges are important for your application, make sure you obtain the optional battery.
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Using a Password
The DL205 CPUs allow you to use a password to help minimize the risk of unauthorized
program and/or data changes. Once you enter a password you can “lock” the CPU against
access. Once the CPU is locked you must enter the password before you can use a programming
device to change any system parameters.
You can select an 8-digit numeric password. The CPUs are shipped from the factory with a
password of 00000000. All zeros removes the password protection. If a password has been
entered into the CPU, you cannot enter all zeros to remove it. Once you enter the correct
password, you can change the password to all zeros to remove the password protection. For
more information on passwords, see the appropriate appendix on auxiliary functions.
WARNING: Make sure you remember your password. If you forget your password you will not be able
to access the CPU. The CPU must be returned to the factory to have the password (along with the
ladder project) removed. It is the policy of AutomationDirect to require the memory of the PLC to be
cleared along with the password.
You can use the D2–HPP Handheld Programmer
or DirectSOFT to enter a password. The following
diagram shows how you can enter a password with the
Handheld Programmer.
Direct SOFT
Select AUX 81
CLR
CLR
I
8
B
1
AUX
ENT
D2–HPP
PASSWORD
00000000
Enter the new 8-digit password
X
X
X
ENT
PASSWORD
XXXXXXXX
Press CLR to clear the display
The CPU can be locked three ways once the password has been entered.
•If the CPU power is disconnected, the CPU will be automatically locked against access.
•If you enter the password with DirectSOFT, the CPU will be automatically locked against access
when you exit DirectSOFT.
•Use AUX 83 to lock the CPU.
When you use DirectSOFT, you will be prompted for a password if the CPU has been locked.
If you use the Handheld Programmer, you have to use AUX 82 to unlock the CPU. Once you
enter AUX 82, you will be prompted to enter the password.
NOTE: The DL240, DL250–1 and DL260 CPUs offer multi–level passwords for even more
password protection of the ladder program. This allows password protection while not locking the
communication port to an operator interface. The multi-level password can be invoked by creating a
password with an upper case “A” followed by seven numeric characters (e.g., A1234567).
DL205 User Manual, 4th Edition, Rev. C
Chapter 3: CPU Specifications and Operations
Setting the Analog Potentiometer Ranges
230
240
250-1
260
Four analog potentiometers (pots) are on the
face plate of the DL240 CPU. These pots can
be used to change timer constants, frequency of
pulse train output, value for an analog output
module, etc.
Each analog channel has corresponding
V-memory locations for setting lower and upper
limits for each analog channel.
To increase the value associated with the analog
pot, turn the pot clockwise. To decrease the
value, turn the pot counter clockwise
PWR
BATT
RUN
CPU
DL240
CPU
RUN
TERM
CH1
CH2
Analog Pots
CH3
CH4
PORT1
?
PORT2
0
Turn clockwise to increase value.
Max
CH1
The table below shows the V-memory locations
used for each analog channel. These are the
default locations for the analog pots.
CH1
Analog Data
Analog Data Lower Limit
Analog Data Upper Limit
V3774
V7640
V7641
CH2
CH2
V3775
V7642
V7643
You can use the program logic to load the limits
into these locations, or, you can use a programming
device to load the values. The range for each limit
is 0 – 9999.
These analog pots have a resolution of 256 pieces.
Therefore, if the span between the upper and lower
limits is less than or equal to 256, then you have
better resolution or, more precise control.
Use the formula shown to determine the smallest
amount of change that can be detected.
For example, a range of 100 – 600 would result in a
resolution of 1.95. Therefore, the smallest increment
would be 1.95 units. (The actual result depends on
exactly how you are using the values in the control
program).
CH3
V3776
V7644
V7645
CH4
V3777
V7646
V7647
Resolution = H – L
256
H = high limit of the range
L = low limit of the range
Example Calculations:
H = 600
L = 100
Resolution = 600–100
256
Resolution = 500
256
Resolution = 1.95
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The following example shows how you could use these analog potentiometers to change the
preset value for a timer. See Chapter 5 for details on how these instructions operate.
Program loads ranges into V-memory
DirectSOFT
SP0
LD
K100
Load the lower limit (100) for the analog range on Ch1 into V7640.
OUT
V7640
LD
K600
X1
OUT
V7641
Load the upper limit (600) for the analog range on Ch1 into V7641.
TMR
T20
V3774
Use V3774 as the preset for the timer. This will allow you to quickly
adjust the preset from 100 to 600 with the CH1 analog pot.
Y0
T20
OUT
Turn all the way counter-clockwise to use lowest value
100
Timing Diagram
preset = 100
600
CH1
X1
CH2
T2
Y0
Current
Value
0
100
200
300
400
1/10 Seconds
500
600
0
500
600
0
Turn clockwise to increase the timer preset.
3-20
100
CH1
Timing Diagram
preset = 300
600
X1
CH2
T2
Y0
Current
Value
DL205 User Manual, 4th Edition, Rev. C
0
100
200
300
400
1/10 Seconds
Chapter 3: CPU Specifications and Operations
CPU Operation
Achieving the proper control for your equipment or process requires a good understanding
of how DL205 CPUs control all aspects of system operation. The flowchart below shows the
main tasks of the CPU operating system. In this section, we
will investigate four aspects of CPU operation:
Power up
• CPU Operating System — The CPU manages all aspects of
system control.
Initialize hardware
• CPU Operating Modes — The three primary modes of
operation are Program Mode, Run Mode, and Test Mode.
Check I/O module
config. and verify
• CPU Timing — The two important areas we discuss are the
I/O response time and the CPU scan time.
Initialize various memory
based on retentive
configuration
• CPU Memory Map — The CPU’s memory map shows the
CPU addresses of various system resources, such as timers,
counters, inputs, and outputs.
Update input
Read input data from
Specialty and Remote I/O
CPU Operating System
At power up, the CPU initializes the internal electronic
hardware. Memory initialization starts with examining
the retentive memory settings. In general, the contents of
retentive memory are preserved, and non-retentive memory
is initialized to zero (unless otherwise specified).
After the one-time power-up tasks, the CPU begins the
cyclical scan activity. The flowchart to the right shows how
the tasks differ based on the CPU mode and the existence
of any errors. The “scan time” is defined as the average
time around the task loop. Note that the CPU is always
reading the inputs, even during program mode. This allows
programming tools to monitor input status at any time.
The outputs are only updated in Run mode. In Program
mode, they are in the off state.
In Run Mode, the CPU executes the user ladder program.
Immediately afterwards, any PID loops which are
configured are executed (DL250-1 and DL260). Then
the CPU writes the output results of these two tasks to the
appropriate output points.
Error detection has two levels: Non-fatal and fatal. Nonfatal errors are reported, but the CPU remains in its current
mode. If a fatal error occurs, the CPU is forced into
program mode and the outputs go off.
Service peripheral
CPU Bus Communication
Update Clock / Calendar
PGM
Mode?
RUN
Execute ladder program
PID Operations (DL250-1/DL260)
Update output
Write output data to
Specialty and Remote I/O
Do diagnostics
OK
OK?
YES
NO
Report the error, set flag,
register, turn on LED
Fatal error
YES
Force CPU into
PGM mode
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Program Mode Operation
In Program Mode the CPU does not execute
X0
Y0
_ X10
_
_
the application program or update the output
X7 X17 Y7
modules. The primary use for Program Mode
is to enter or change an application program.
You also use the program mode to set up
CPU parameters, such as the network address,
retentive memory areas, etc.
Download Program
You can use the mode switch on the DL250–1 and DL260 CPUs to select Program Mode
operation. Or, with the switch in TERM position, you can use a programming device such as
the Handheld Programmer to place the CPU in Program Mode.
Run Mode Operation
In Run Mode, the CPU executes the application
program, does PID calculations for configured
PID loops (DL250-1/DL260), and updates the
I/O system. You can perform many operations
during Run Mode. Some of these include:
• Monitor and change I/O point status
• Update timer/counter preset values
• Update Variable memory locations
Read Inputs
Read Inputs from Specialty I/O
Service Peripherals, Force I/O
CPU Bus Communication
Run Mode operation can be divided into several
Update Clock, Special Relays
key areas. It is very important you understand
how each of these areas of execution can affect
Solve the Application Program
the results of your application program solutions.
Solve PID Equations (DL250-1/DL260)
You can use the mode switch to select Run Mode
operation (DL240, DL250–1 and DL260).
Or, with the mode switch in TERM position,
Write Outputs
you can use a programming device, such as the
Handheld Programmer, to place the CPU in
Write Outputs to Specialty I/O
Run Mode.
You can also edit the program during Run Mode.
Diagnostics
The Run Mode Edits are not “bumpless.”
Instead, the CPU maintains the outputs in
their last state while it accepts the new program information. If an error is found in the new
program, then the CPU will turn all the outputs off and enter the Program Mode.
WARNING: Only authorized personnel fully familiar with all aspects of the application should make
changes to the program. Changes during Run Mode become effective immediately. Make sure you
thoroughly consider the impact of any changes to minimize the risk of personal injury or damage to
equipment.
DL205 User Manual, 4th Edition, Rev. C
Chapter 3: CPU Specifications and Operations
Read Inputs
The CPU reads the status of all inputs, then stores it in the image register. Input image register
locations are designated with an X followed by a memory location. Image register data is used
by the CPU when it solves the application program. Of course, an input may change after
the CPU has read the inputs. Generally, the CPU scan time is measured in milliseconds. If
you have an application that cannot wait until the next I/O update, you can use Immediate
Instructions. These do not use the status of the input image register to solve the application
program. The Immediate instructions immediately read the input status directly from I/O
modules. However, this lengthens the program scan since the CPU has to read the I/O point
status again. A complete list of the Immediate instructions is included in Chapter 5.
Read Inputs from Specialty and Remote I/O
After the CPU reads the inputs from the input
modules, it reads any input point data from any
Specialty modules that are installed, such as Counter
Interface modules, etc. This is also the portion of
the scan that reads the input status from Remote I/O
bases.
_
_
_
DL250–1/260
RSSS
_
_
_
NOTE: It may appear the Remote I/O point status is
updated every scan. This is not quite true. The CPU will receive information from the Remote I/O Master
module every scan, but the Remote Master may not have received an update from all the Remote Slaves.
Remember, the Remote I/O link is managed by the Remote Master, not the CPU.
Service Peripherals and Force I/O
After the CPU reads the inputs from the input modules, it reads any attached peripheral
devices. This is primarily a communications service for any attached devices. For example,
it would read a programming device to see if any input, output, or other memory type status
needs to be modified. Two basic types of forcing are available with the DL205 CPUs.
NOTE: DirectNet protocol does not support bit operations.
• Forcing from a peripheral – not a permanent force, good only for one scan
• Bit Override (DL240, DL250–1 and DL260) – holds the I/O point (or other bit) in the current
state. Valid bits are X, Y, C, T, CT, and S. These memory types are discussed in more detail later
in this chapter.
Regular Forcing — This type of forcing can temporarily change the status of a discrete bit.
For example, you may want to force an input on, even though it is really off. This allows you
to change the point status that was stored in the image register. This value will be valid until
the image register location is written to during the next scan. This is primarily useful during
testing situations when you need to force a bit on to trigger another event.
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Bit Override — (DL240, DL250–1 and DL260) Bit override can be enabled on a point-bypoint basis by using AUX 59 from the Handheld Programmer or, by a menu option from
within DirectSOFT. Bit override basically disables any changes to the discrete point by the
CPU. For example, if you enable bit override for X1, and X1 is off at the time, then the CPU
will not change the state of X1. This means that even if X1 comes on, the CPU will not
acknowledge the change. So, if you used X1 in the program, it would always be evaluated as
“off” in this case. Of course, if X1 was on when the bit override was enabled, then X1 would
always be evaluated as “on.” There is an advantage available when you use the bit override
feature. The regular forcing is not disabled because the bit override is enabled. For example, if
you enabled the Bit Override for Y0 and it was off at the time, then the CPU would not change
the state of Y0. However, you can still use a programming device to change the status. Now, if
you use the programming device to force Y0 on, it will remain on and the CPU will not change
the state of Y0. If you then force Y0 off, the CPU will maintain Y0 as off. The CPU will never
update the point with the results from the application program or from the I/O update until
the bit override is removed. The following diagram shows a brief overview of the bit override
feature. Notice the CPU does not update the Image Register when bit override is enabled
Input Update
Bit Override OFF
3-24
X128
OFF
Y128
OFF
C377
OFF
Force from
Programmer
Result of Program
Solution
...
...
...
...
...
...
X2
ON
Y2
ON
C2
ON
X1
ON
Y1
ON
C1
OFF
Input Update
X0
OFF
Y0
OFF
C0
OFF
Force from
Programmer
Bit Override ON
Result of Program
Solution
Image Register (example)
CPU Bus Communication
Specialty Modules, such as the Data Communications Module, can transfer data to and from
the CPU over the CPU bus on the backplane. This data is more than standard I/O point
status. This type of communications can only occur on the CPU (local) base. A portion of the
execution cycle is used to communicate with these modules. The CPU performs both read and
write requests during this segment.
DCM
_
_
DATA
_
DCM
_
_
_
Update Clock, Special Relays and Special Registers
The DL240 , DL250–1 and DL260 CPUs have an internal real-time clock and calendar
timer which are accessible to the application program. Special V-memory locations hold this
information. This portion of the execution cycle makes sure these locations get updated on
every scan. Several different Special Relays, such as diagnostic relays, etc., are also updated
during this segment.
DL205 User Manual, 4th Edition, Rev. C
Chapter 3: CPU Specifications and Operations
Solve Application Program
The CPU evaluates each instruction in the application
program during this segment of the scan cycle. The
instructions define the relationship between input
conditions and the system outputs.
The CPU begins with the first rung of the ladder program,
evaluating it from left to right and from top to bottom. It
continues, rung by rung, until it encounters the END coil
instruction. At that point, a new image for the outputs is
complete.
X0
X1
Y0
OUT
C0
Read Inputs from Specialty I/O
Service Peripherals, Force I/O
CPU Bus Communication
Update Clock, Special Relays
Solve the Application Program
Solve PID equations (DL250-1/DL260)
C100
X5
Read Inputs
LD
X10
K10
Write Outputs
Y3
OUT
END
Write Outputs to Specialty I/O
Diagnostics
The internal control relays (C), the stages (S), and the
variable memory (V) are also updated in this segment.
You may recall the CPU may have obtained and stored forcing information when it serviced
the peripheral devices. If any I/O points or memory data have been forced, the output image
register also contains this information.
NOTE: If an output point was used in the application program, the results of the program solution will
overwrite any forcing information that was stored. For example, if Y0 was forced on by the programming
device, and a rung containing Y0 was evaluated such that Y0 should be turned off, then the output image
register will show that Y0 should be off. Of course, you can force output points that are not used in the
application program. In this case, the point remains forced because there is no solution that results from
the application program execution.
Solve PID Loop Equations
230
240
250-1
260
The DL260 CPU can process up to 16 PID loops and the DL250–1 can process up to 4 PID
loops. The loop calculations are run as a separate task from the ladder program execution,
immediately following it. Only loops that have been configured are calculated, and then only
according to a built-in loop scheduler. The sample time (calculation interval) of each loop is
programmable. Please refer to Chapter 8, PID Loop Operation, for more on the effects of PID
loop calculation on the overall CPU scan time.
Write Outputs
Once the application program has solved the instruction logic and constructed the output
image register, the CPU writes the contents of the output image register to the corresponding
output points located in the local CPU base or the local expansion bases. Remember, the CPU
also made sure any forcing operation changes were stored in the output image register, so the
forced points get updated with the status specified earlier.
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Write Outputs to Specialty and Remote I/O
After the CPU updates the outputs in the local and expansion bases, it sends the output point
information that is required by any Specialty modules that are installed. For example, this is
the portion of the scan that writes the output status from the image register to the Remote I/O
racks.
NOTE: It may appear the Remote I/O point status is updated every scan. This is not quite true. The
CPU will send the information to the Remote I/O Master module every scan, but the Remote Master will
update the actual remote modules during the next communication sequence between the master and slave
modules. Remember, the Remote I/O link communication is managed by the Remote Master, not the CPU.
Diagnostics
During this part of the scan, the CPU performs all
system diagnostics and other tasks, such as:
• calculating the scan time
• updating special relays
Read Inputs
Read Inputs from Specialty I/O
Service Peripherals, Force I/O
• resetting the watchdog timer
CPU Bus Communication
DL205 CPUs automatically detect and report
many different error conditions. Appendix
B contains a listing of the various error codes
Update Clock, Special Relays
available with the DL205 system.
Solve the Application Program
One of the more important diagnostic tasks is
the scan time calculation and watchdog timer
Solve PID Loop Equations
control. DL205 CPUs have a “watchdog” timer
that stores the maximum time allowed for the
CPU to complete the solve application segment
Write Outputs
of the scan cycle. The default value set from the
factory is 200ms. If this time is exceeded the CPU
Write Outputs to Specialty I/O
will enter the Program Mode, turn off all outputs,
and report the error. For example, the Handheld
Diagnostics
Programmer displays “E003 S/W TIMEOUT”
when the scan overrun occurs.
You can use AUX 53 to view the minimum, maximum, and current scan time. Use AUX 55
to increase or decrease the watchdog timer value. There is also an RSTWT instruction that can
be used in the application program to reset the watch dog timer during the CPU scan.
DL205 User Manual, 4th Edition, Rev. C
Chapter 3: CPU Specifications and Operations
I/O Response Time
Is Timing Important for Your Application?
I/O response time is the amount of time required for the control system to sense a change in
an input point and update a corresponding output point. In the majority of applications, the
CPU performs this task practically instantaneously. However, some applications do require
extremely fast update times. Four things can affect the I/O response time:
• The point in the scan period when the field input changes states
• Input module Off to On delay time
• CPU scan time
• Output module Off to On delay time
Normal Minimum I/O Response
The I/O response time is shortest when the module senses the input change before the Read
Inputs portion of the execution cycle. In this case the input status is read, the application
program is solved, and the output point gets updated. The following diagram shows an
example of the timing for this situation.
Scan
Solve
Program
Scan
Solve
Program
Read
Inputs
Solve
Program
Solve
Program
Write
Outputs
Field Input
Input Module
Off/On Delay
CPU Reads
Inputs
CPU Writes
Outputs
Output Module
Off/On Delay
I/O Response Time
In this case, you can calculate the response time by simply adding the following items:
Input Delay + Scan Time + Output Delay = Response Time
Normal Maximum I/O Response
The I/O response time is longest when the module senses the input change after the Read
Inputs portion of the execution cycle. In this case the new input status does not get read until
the following scan. The following diagram shows an example of the timing for this situation.
In this case, you can calculate the response time by simply adding the following items:
Input Delay +(2 x Scan Time) + Output Delay = Response Time
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Scan
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Solve
Program
Solve
Program
Scan
Read
Inputs
Solve
Program
Solve
Program
Write
Outputs
Field Input
CPU Reads
Inputs
Input Module
Off/On Delay
CPU Writes
Outputs
Output Module
Off/On Delay
I/O Response Time
Improving Response Time
You can do a few things to help improve throughput.
• Choose instructions with faster execution times
• Use immediate I/O instructions (which update the I/O points during the ladder program
execution segment)
• Choose modules that have faster response times
Immediate I/O instructions are probably the most useful technique. The following example
shows immediate input and output instructions and their effect.
Scan
Solve
Program
Scan
Normal Read
Input
Solve
Program
Read
Input
Immediate
Solve
Program
Write
Output
Immediate
Solve
Program
Normal
Write
Outputs
Field Input
Input Module
Off/On Delay
Output Module
Off/On Delay
3-28
I/O Response Time
In this case, you can calculate the response time by simply adding the following items:
Input Delay + Instruction Execution Time + Output Delay = Response Time
The instruction execution time is calculated by adding the time for the immediate input
instruction, the immediate output instruction, and all instructions in between.
NOTE: When the immediate instruction reads the current status from a module, it uses the results to solve
that one instruction without updating the image register. Therefore, any regular instructions that follow
will still use image register values. Any immediate instructions that follow will access the module again to
update the status.
DL205 User Manual, 4th Edition, Rev. C
Chapter 3: CPU Specifications and Operations
CPU Scan Time Considerations
The scan time covers all the cyclical tasks
that the operating system performs. You
can use DirectSOFT or the Handheld
Programmer to display the minimum,
maximum, and current scan times that have
occurred since the previous Program Mode
to Run Mode transition. This information
can be very important when evaluating
system performance.
As shown previously, there are several
segments that make up the scan cycle. Each
of these segments requires a certain amount
of time to complete. Of all the segments,
the only one you really have the most control
over is the amount of time it takes to execute
the application program. This is because
different instructions take different amounts
of time to execute. So, if you think you need
a faster scan, then you can try to choose
faster instructions.
Your choice of I/O modules and system
configuration, such as expansion or remote
I/O, can also affect the scan time; however,
the application usually dictates them.
For example, if you need to count pulses at
high rates of speed, then you will probably
have to use a High-Speed Counter module.
Also, if you have I/O points that need to be
located several hundred feet from the CPU,
then you need remote I/O because it is much
faster and cheaper to install a single remote
I/O cable than it is to run all those signal
wires for each individual I/O point. The
following paragraphs provide some general
information on how much time some of the
segments can require.
Power up
Initialize hardware
Check I/O module
config. and verify
Initialize various memory
based on retentive
configuration
Update input
Read input data from
Specialty and Remote I/O
Service peripheral
CPU Bus Communication
Update Clock / Calendar
PGM
Mode?
RUN
Execute ladder program
PID Equations (DL250-1/DL260)
Update output
Write output data to
Specialty and Remote I/O
Do diagnostics
OK
OK?
YES
NO
Report the error, set flag,
register, turn on LED
Fatal error
NO
YES
Force CPU into
PGM mode
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Initialization Process
The CPU performs an initialization task once the system power is on. The initialization task
is performed once at power up, so it does not affect the scan time for the application program.
Reading Inputs
Initialization
Minimum Time
Maximum Time
DL230
1.6 Seconds
3.6 Seconds
DL240
1.0 Seconds
2.0 Seconds
DL250–1
1.2 Seconds
2.7 Seconds(w/ 2 exp. bases)
DL260
1.2 Seconds
3.7 Seconds (w/ 4 exp. bases)
The time required to read the input status for the input modules depends on which CPU you
are using and the number of input points in the base. The following table shows typical update
times required by the CPU.
For example, the time required for a DL240 to read two 8-point input modules would be
Timing Factors
Overhead
Per input point
3-30
DL230
64.0 µs
6.0 µs
DL240
32.0 µs
12.3 µs
DL250–1
12.6 µs
2.5 µs
DL260
12.6 µs
2.5 µs
calculated as follows, where NI is the total number of input points:
Formula
Time = 32µs + (12.3 x NI)
Example
Time = 32µs + (12.3 x 16)
Time = 228.8 µs
NOTE: This information provides the amount of time the CPU spends reading the input status from the
modules. Don’t confuse this with the I/O response time that was discussed earlier.
DL205 User Manual, 4th Edition, Rev. C
Chapter 3: CPU Specifications and Operations
Reading Inputs from Specialty I/O
During this portion of the cycle the CPU reads any input points associated with the following:
• Remote I/O
• Specialty Modules (such as High-Speed Counter, etc)
The time required to read any input status from these modules depends on which CPU you are
using, the number of modules, and the number of input points.
Remote Module
Overhead
Per module (with inputs)
Per input point
DL230
N/A
N/A
N/A
DL240
6.0 µs
67.0 µs
40.0 µs
DL250–1
1.82 µs
17.9 µs
2.0 µs
DL260
1.82 µs
17.9 µs
2.0 µs
For example, the time required for a DL240 to read two 8-point input modules (located in a
Remote base) would be calculated as follows, where NM is the number of modules and NI is
the total number of input points:
Remote I/O
Formula
Time = 6µs + (67µs x NM) + (40µs x NI)
Example
Time = 6µs + (67µs x 2) + (40µs x 16)
Time = 780µs
Service Peripherals
Communication requests can occur at any time during the scan, but the CPU only “logs” the
requests for service until the Service Peripherals portion of the scan. The CPU does not spend
any time on this if there are no peripherals connected.
To Log Request (anytime)
Nothing
Connected
Port 1
Port 2
DL230
DL240
DL250–1
DL260
Min. & Max.
0 µs
0 µs
0 µs
0 µs
Send Min. / Max.
Rec. Min. / Max.
Send Min. / Max.
Rec. Min. / Max.
22/28 µs
24/58 µs
N/A
N/A
23/26 µs
52/70 µs
26/30 µs
60/75 µs
3.2/9.2 µs
25.0/35.0 µs
3.6/11.5 µs
35.0/44.0 µs
3.2/9.2 µs
25.0/35.0 µs
3.6/11.5 µs
35.0/44.0 µs
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During the Service Peripherals portion of the scan, the CPU analyzes the communications
request and responds as appropriate. The amount of time required to service the peripherals
depends on the content of the request.
To Service Request
DL230
DL240
260µs
Minimum
30ms
Run Mode Max.
Program Mode Max. 3.5 Seconds
DL250–1
250µs
20ms
4 Seconds
8µs
410µs
2 Seconds
DL260
8µs
410µs
3.7 Seconds
CPU Bus Communication
Some specialty modules can also communicate directly with the CPU via the CPU bus. During
this portion of the cycle the CPU completes any CPU bus communications. The actual time
required depends on the type of modules installed and the type of request being processed.
NOTE: Some specialty modules can have a considerable impact on the CPU scan time. If timing is critical
in your application, consult the module documentation for any information concerning the impact on the
scan time.
Update Clock/Calendar, Special Relays, Special Registers
The clock, calendar, and special relays are updated and loaded into special V-memory locations
during this time. This update is performed during both Run and Program Modes.
Modes
Program Mode
Run Mode
DL230
Minimum
Maximum
Minimum
Maximum
8.0 µs fixed
8.0 µs fixed
20.0 µs
26.0 µs
DL240
DL250–1
35.0 µs
48.0 µs
60.0 µs
85.0 µs
11.0 µs
11.0 µs
19.0 µs
26.0 µs
DL260
11.0 µs
11.0 µs
19.0 µs
26.0 µs
Writing Outputs
The time required to write the output status for the local and expansion I/O modules depends
on which CPU you are using and the number of output points in the base. The following table
shows typical update times required by the CPU.
Timing Factors
Overhead
Per output point
3-32
DL230
66.0 µs
8.5 µs
DL240
33.0 µs
14.6 µs
DL250–1
28.1 µs
3.0 µs
DL260
28.1 µs
3.0 µs
For example, the time required for a DL240 to write data for two 8-point output modules
would be calculated as follows (where NO is the total number of output points):
Formula
Time = 33 + (NO x 14.6 µs)
Example
Time = 33 + (16 x 14.6 µs)
Time = 266.6 µs
DL205 User Manual, 4th Edition, Rev. C
Chapter 3: CPU Specifications and Operations
Writing Outputs to Specialty I/O
During this portion of the cycle the CPU writes any output points associated with the following.
• Remote I/O
• Specialty Modules (such as High-Speed Counter, etc)
The time required to write any output image register data to these modules depends on which
CPU you are using, the number of modules, and the number of output points.
Remote Module
Overhead
Per module (with outputs)
Per output point
DL230
N/A
N/A
N/A
DL240
6.0 µs
67.5 µs
46.0 µs
DL250–1
1.9 µs
17.7 µs
3.2 µs
DL260
1.9 µs
17.7 µs
3.2 µs
For example, the time required for a DL240 to write two 8-point output modules (located in
a Remote base) would be calculated as follows, where NM is the number of modules and NO
is the total number of output points:
Remote I/O
Formula
Time = 6µs + (67.5 µs x NM) + (46µs x NO)
Example
Time = 6µs + (67.5 µs x 2) + (46µs x 16)
Time = 877µs
NOTE: This total time is the actual time required for the CPU to update these outputs. This does not
include any additional time that is required for the CPU to actually service the particular specialty modules.
Diagnostics
The DL205 CPUs perform many types of system diagnostics. The amount of time required
depends on many things, such as the number of I/O modules installed, etc. The following
table shows the minimum and maximum times that can be expected.
Diagnostic Time
Minimum
Maximum
DL230
600.0 µs
900.0 µs
DL240
422.0 µs
855.0 µs
DL250–1
26.8 µs
103.0 µs
DL260
26.8 µs
103.0 µs
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Application Program Execution
The CPU processes the program from the top (address 0) to the END instruction. The CPU
executes the program left to right and top to bottom. As each rung is evaluated, the appropriate
image register or memory location is updated.
The time required to solve the application program depends on the type and number of
instructions used and the amount of execution overhead.
You can add the execution times for all the instructions in your program to find the total
program execution time. For example, the execution time for a DL240 running the program
shown would be calculated as follows:
Instruction
Time
STR X0
OR C0
ANDN X1
OUT Y0
STRN C100
LD K10
STRN C101
OUT V2002
STRN C102
LD K50
STRN C103
OUT V2006
STR X5
ANDN X10
OUT Y3
END
1.4µs
1.0µs
1.2µs
7.95µs
1.6µs
62.0µs
1.6µs
21.0µs
1.6µs
62.0µs
1.6µs
21.0µs
1.4µs
1.2µs
7.95µs
16.0µs
TOTAL
210.5µs
X0
X1
Y0
OUT
C0
C100
LD
C101
OUT
C102
LD
C103
X5
OUT
X10
K10
V2002
K50
V2006
Y3
OUT
END
Appendix C provides a complete list of instruction execution times for DL205 CPUs.
Program Control Instructions — the DL240, DL250–1 and DL260 CPUs offer additional
instructions that can change the way the program executes. These instructions include FOR/
NEXT loops, Subroutines, and Interrupt Routines. These instructions can interrupt the
normal program flow and affect the program execution time. Chapter 5 provides detailed
information on how these different types of instructions operate.
DL205 User Manual, 4th Edition, Rev. C
Chapter 3: CPU Specifications and Operations
PLC Numbering Systems
octal
49.832
binary
If you are a new PLC user or are using DirectLOGIC
?
1482 BCD
PLCs for the first time, please take a moment to study
?
3
0402 ?
?
how our PLCs use numbers. You’ll find that each PLC
3A9
ASCII
7
manufacturer has its own conventions on the use of
hexadecimal
numbers in their PLCs. Take a moment to familiarize 1001011011
1011
–961428
yourself with how numbers are used in DirectLOGIC
?
PLCs. The information you learn here applies to all our decimal
A
72B
?
–300124
177
PLCs.
As any good computer does, PLCs store and manipulate numbers in binary form: ones and
zeros. So why do we have to deal with numbers in so many different forms? Numbers have
meaning, and some representations are more convenient than others for particular purposes.
Sometimes we use numbers to represent a size or amount of something. Other numbers refer
to locations or addresses, or to time. In science we attach engineering units to numbers to give
a particular meaning (see Appendix H for numbering system details).
?
PLC Resources
PLCs offer a fixed number of resources, depending on the model and configuration. We use
the word “resources” to include variable memory (V-memory), I/O points, timers, counters,
etc. Most modular PLCs allow you to add I/O points in groups of eight. In fact, all the
resources of our PLCs are counted in octal. It’s easier for computers to count in groups of eight
than ten, because eight is an even power of two.
Octal means simply counting in groups of eight. Decimal 1 2 3 4 5 6 7 8
In the figure to the right, there are eight circles.
The quantity in decimal is “8,” but in octal it is
“10” (8 and 9 are not valid in octal). In octal, Octal
1 2 3 4 5 6 7 10
“10” means 1 group of 8 plus 0 (no individuals).
In the figure below, we have two groups of eight circles. Counting in octal we have “20.”items,
meaning two groups of eight, plus zero individuals Don’t say “twenty,” say “two–zero octal”.
This makes a clear distinction between number systems.
Decimal 1 2 3 4
5
6
7 8
9 10 11 12 13 14 15 16
Octal
5
6
7 10
11 12 13 14 15 16 17 20
1
2 3 4
After counting PLC resources, it’s time to access PLC resources (there’s a difference). The CPU
instruction set accesses resources of the PLC using octal addresses. Octal addresses are the
same as octal quantities, except they start counting at zero. The number zero is significant to a
computer, so we don’t skip it.
X= 0 1 2 3 4 5 6 7
Our circles are in an array of square containers to the right.
X
To access a resource, our PLC instruction will address its
1
location using the octal references shown. If these were X
counters, “CT14” would access the black circle location. 2 X
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V–Memory
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Variable memory (called “V-memory”) stores data for the ladder program and for configuration settings.
V-memory locations and V-memory addresses are the same thing, and are numbered in octal. For example,
V2073 is a valid location, while V1983 is not valid (“9” and “8” are not valid octal digits).
Each V-memory location is one data word wide, meaning 16 bits. For configuration registers, our manuals will show
each bit of a V-memory word. The least significant bit (LSB) will be on the right, and the most significant bit (MSB)
on the left. We use the word “significant,” referring to the relative binary weighting of the bits.
V-memory data is 16-bit binary, but we rarely program the data registers one bit at a time. We use
V-memory address
(octal)
V2017
LSB
0 1 0 0 1 1 1 0 0 0 1 0 1 0 0 1
instructions or viewing tools that let us work with binary, decimal, octal, and hexadecimal numbers. All
these are converted and stored as binary for us. A frequently-asked question is “How do I tell if a number is
binary, octal, BCD, or hex”? The answer is that we usually cannot tell by looking at the data, but it does not
really matter. What matters is: the source or mechanism which writes data into a V-memory location and
the thing which later reads it must both use the same data type (i.e., octal, hex, binary, or whatever). The
V-memory location is a storage box, that’s all. It does not convert or move the data on its own.
Binary-Coded Decimal Numbers
Since humans naturally count in decimal, we prefer to enter and view PLC data in decimal as well (via
operator interfaces). However, computers are more efficient in using pure binary numbers. A compromise
solution between the two is Binary-Coded Decimal (BCD) representation. A BCD digit ranges from 0 to
9, and is stored as 4 binary bits (a nibble). This permits each V-memory location to store 4 BCD digits, with
a range of decimal numbers from 0000 to 9999.
4
BCD number
8
V-memory storage
4
9
2
1
0 1 0 0
8
4
3
2
1
1 0 0 1
8
4
6
2
1
0 0 1 1
8
4
2
1
0 1 1 0
In a pure binary sense, a 16-bit word represents numbers from 0 to 65535. In storing BCD numbers, the
range is reduced to 0 to 9999. Many math instructions use BCD data, and DirectSOFT and the Handheld
Programmer allow us to enter and view data in BCD. Special RLL instructions convert from BCD to
binary, or visa–versa.
Hexadecimal Numbers
Hexadecimal numbers are similar to BCD numbers, except they utilize all possible binary values in each 4-bit
digit. They are base-16 numbers so we need 16 different digits. To extend our decimal digits 0 through 9,
we use A through F as shown.
Decimal
Hexadecimal
0 1 2 3
0 1 2 3
4 5
4 5
6
6
7
7
8 9 10 11 12 13 14 15
8 9 A B C D E F
A 4-digit hexadecimal number can represent all 65536 values in a V-memory word. The range is from 0000
to FFFF (hex). PLCs often need this full range for sensor data, etc. Hexadecimal is a convenient way for
humans to view full binary data.
Hexadecimal number
V-memory storage
3-36
V-memory data
(binary)
MSB
A
7
F
4
1 0 1 0
0 1 1 1
1 1 1 1
0 1 0 0
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Chapter 3: CPU Specifications and Operations
Memory Map
With any PLC system, you generally have many different types of information to process. This
includes input device status, output device status, various timing elements, parts counts, etc. It
is important to understand how the system represents and stores the various types of data. For
example, you need to know how the system identifies input points, output points, data words,
etc. The following paragraphs discuss the various memory types used in the DL205 CPUs.
A memory map overview for the DL230, DL240, DL250–1 and DL260 CPUs follows the
memory descriptions.
Octal Numbering System
All memory locations or areas are numbered in Octal
(base 8). For example, the diagram shows how the
octal numbering system works for the discrete input
points. Notice the octal system does not contain any
numbers with the digits 8 or 9.
X0
X1
X2
X3
X0
_
X7
X10
_
X17
Y0
_
Y7
X4
X5
X6
X7
X10 X11 X12 X13 X14 X15 X16 X17
Discrete and Word Locations
As you examine the different memory types, you’ll
notice two types of memory in the DL205, discrete and
word memory. Discrete memory is one bit that can
be either a 1 or a 0. Word memory is referred to as
V memory (variable) and is a 16-bit location normally
used to manipulate data/numbers, store data/numbers,
etc. Some information is automatically stored in
V-memory. For example, the timer current values are
stored in V-memory.
Discrete – On or Off, 1 bit
X0
Word Locations – 16 bits
0 1 0 1 00 0 0 0 0 1 0 0 1 0 1
V–Memory Locations for Discrete Memory Areas
The discrete memory area is for inputs, outputs, control relays, special relays, stages, timer status
bits and counter status bits. However, you can also access the bit data types as a V-memory
word. Each V-memory location contains 16 consecutive discrete locations. For example, the
following diagram shows how the X input points are mapped into V-memory locations.
16 Discrete (X) Input Points
X17 X16 X15 X14 X13 X12 X11 X10
Bit # 15
14
13
12
11
10
9
8
X7
X6
X5
X4
X3
X2
X1
X0
7
6
5
4
3
2
1
0
V40400
These discrete memory areas and their corresponding V-memory ranges are listed in the
memory area table for the DL230, DL240, DL250–1 and DL260 CPUs in this chapter.
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The discrete input points are noted by an X
data type. Up to 512 discrete input points
are available with the DL205 CPUs. In this
example, the output point Y0 will be turned on
when input X0 energizes.
X0
Y0
OUT
X1
Y1
OUT
X10
C5
OUT
C5
Y10
OUT
Output Points (Y Data Type)
The discrete output points are noted by a Y
data type. Up to 512 discrete output points
are available with the DL205 CPUs. In this
example, output point Y1 will turn on when
input X1 energizes.
Control Relays (C Data Type)
Control relays are discrete bits normally used to
control the user program. The control relays do
not represent a real world device; that is, they
cannot be physically tied to switches, output
coils, etc. Control relays are internal to the
CPU and can be programmed as discrete inputs
or discrete outputs. These locations are used in
programming the discrete memory locations (C)
or the corresponding word location which has 16
consecutive discrete locations. In this example,
memory location C5 will energize when input
X10 turns on. The second rung shows a simple
example of how to use a control relay as an input.
Y20
OUT
Timers and Timer Status Bits (T Data Type)
The number of timers available depends on the
model of CPU you are using. The tables at
the end of this section provide the number of
timers for the DL230, DL240, D2-250-1 and
DL260. Regardless of the number of timers,
you have access to timer status bits that reflect
the relationship between the current value and
the preset value of a specified timer. The timer
status bit will be on when the current value is
equal to or greater than the preset value of a
corresponding timer.
When input X0 turns on, timer T1 will start.
When the timer reaches the preset of 3 seconds
(K of 30), timer status contact T1 turns on.
When T1 turns on, output Y12 turns on.
DL205 User Manual, 4th Edition, Rev. C
X0
T1
TMR
K30
T1
Y12
OUT
Chapter 3: CPU Specifications and Operations
Timer Current Values (V Data Type)
Some information is automatically stored in
V-memory, such as the current values associated with
timers. For example, V0 holds the current value for
Timer 0, V1 holds the current value for Timer 1, etc.
These are 4-digit BCD values.
The primary reason for this is programming flexibility.
The example shows how you can use relational contacts
to monitor several time intervals from a single timer.
Counters and Counter Status Bits
(CT Data Type)
You have access to counter status bits that reflect the
relationship between the current value and the preset
value of a specified counter. The counter status bit will
be on when the current value is equal to or greater than
the preset value of a corresponding counter.
Each time contact X0 transitions from off to on,
the counter increments by one (If X1 comes on, the
counter is reset to zero). When the counter reaches the
preset of 10 counts (K of 10), counter status contact
CT3 turns on. When CT3 turns on, output Y12 turns
on.
Counter Current Values (V Data Type)
Just like the timers, the counter current values are
also automatically stored in V-memory. For example,
V1000 holds the current value for Counter CT0,
V1001 holds the current value for Counter CT1, etc.
These are 4-digit BCD values. The primary reason for
this is programming flexibility. The example shows
how you can use relational contacts to monitor the
counter values.
Word Memory (V Data Type)
Word memory is referred to as V-memory (variable)
and is a 16-bit location normally used to manipulate
data/numbers, store data/numbers, etc. Some
information is automatically stored in V-memory.
For example, the timer current values are stored in
V-memory. The example shows how a four-digit
BCD constant is loaded into the accumulator and then
stored in a V-memory location.
X0
TMR
T1
K1000
V1
K30
Y12
OUT
V1
K50
Y13
OUT
V1
K75
V1
X0
K100
Y14
OUT
CNT
CT3
K10
X1
CT3
Y12
OUT
X0
CNT
K10
CT3
X1
V1003
K1
Y12
OUT
V1003
K3
Y13
OUT
V1003
K5
V1003
X0
K8
LD
Y14
OUT
K1345
OUT
V1400
Word Locations – 16 bits
0 0 0 1 00 1 1 0 1 0 0 0 1 0 1
1
3
4
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Stages (S Data type)
RLLPLUS
Stages are used in
programs to create a
structured program, similar to a flowchart. Each
program stage denotes a program segment. When
the program segment, or stage, is active, the logic
within that segment is executed. If the stage is
off, or inactive, the logic is not executed and the
CPU skips to the next active stage. (See Chapter
7 for a more detailed description of RLLPLUS
programming.)
Each stage also has a discrete status bit that can be
used as an input to indicate whether the stage is
active or inactive. If the stage is active, then the
status bit is on. If the stage is inactive, then the
status bit is off. This status bit can also be turned
on or off by other instructions, such as the SET
or RESET instructions. This allows you to easily
control stages throughout the program.
ISG
S0000
Wait forStart
Start
S1
JMP
X0
SG
S500
JMP
Check for a Part
S0001
Part
Present
S2
JMP
X1
Part
Present
S6
JMP
X1
SG
Clamp the part
S0002
Clamp
SET
S400
S3
JMP
Part
Locked
X2
Special Relays (SP Data Type)
Special relays are discrete memory locations
with pre-defined functionality. There are many
different types of special relays. For example,
some aid in program development, others
provide system operating status information, etc.
Appendix D provides a complete listing of the
special relays.
In this example, control relay C10 will energize
for 50ms and de–energize for 50 ms because SP5
is a pre–defined relay that will be on for 50ms and
off for 50ms.
SP5
C10
OUT
SP4: 1 second clock
SP5: 100 ms clock
SP6: 50 ms clock
Remote I/O Points (GX Data Type)
Remote I/O points are represented by global
relays. They are generally used only to control
remote I/O, but they can be used as normal
control relays when remote I/O is not used in the
system.
In this example, memory location GX0 represents
an output point and memory location GX10
represents an input point.
DL205 User Manual, 4th Edition, Rev. C
X3
GX0
OUT
GX10
Y12
OUT
Chapter 3: CPU Specifications and Operations
DL230 System V-memory
System
V-memory
V2320–V2377
V7620–V7627
V7620
V7621
V7622
V7623
V7624
V7625
V7626
V7627
Description of Contents
The default location for multiple preset values for the UP counter.
Locations for DV–1000 operator interface parameters
Sets the V-memory location that contains the value.
Sets the V-memory location that contains the message.
Sets the total number (1 - 16) of V-memory locations to be displayed.
Sets the V-memory location that contains the numbers to be displayed.
Sets the V-memory location that contains the character code to be displayed.
Sets the bit control pointer.
Power Up mode change preset value password.
Reserved for future use.
Default Values/Ranges
N/A
V0–V2377
V0–V2377
1–16
V0–V2377
V0–V2377
V-memory location for
X,Y, or C points used.
0,1,2,3,12 Default = 0000
V7630
Starting location for the multi–step presets for channel 1. The default value is Default: V2320
2320, which indicates the first value should be obtained from V2320. Since 24 Range: V0–V2320
presets are available, the default range is V2320 – V2377. You can change the
starting point if necessary.
V7631–V7632
V7633
Not used
Sets the desired mode for the high speed counter, interrupt, pulse catch,
pulse train, and input filter (see the D2-CTRINT Manual, D2-CTRIF-M for more
information). Location is also used for setting the with/without battery option,
enable/disable CPU mode change, and power-up in Run Mode option.
N/A
V7634
Contains set-up information for high-speed counter, interrupt, pulse catch,
pulse train output, and input filter for X0 (when D2–CTRINT is installed).
Contains set up-information for high-speed counter, interrupt, pulse catch,
pulse train output, and input filter for X1 (when D2–CTRINT is installed).
Contains set-up information for high-speed counter, interrupt, pulse catch,
pulse train output, and input filter for X2 (when D2–CTRINT is installed).
Contains set-up information for high-speed counter, interrupt, pulse catch,
pulse train output, and input filter for X3 (when D2–CTRINT is installed).
Default: 0000
V7635
V7636
V7637
V7640–V7642
V7640
V7641
V7642
V7643–V7647
V7751
Additional setup parameters for the DV-1000
Timer preset value pointer
Counter preset value pointer
Timer preset block size (high byte) / Counter preset block size (low byte)
Not used
Fault Message Error Code — stores the 4-digit code used with the FAULT
instruction when the instruction is executed.
Default: 0000
Lower Byte Range:
Range: 0–None
10–Up
40–Interrupt
50–Pulse Catch
60–Filtered discrete In.
Upper Byte Range:
Bits 8–11, 14,15: Unused
Bit 12: With Batt. installed:
0 = disable BATT LED
1 = enable BATT LED
Bit 13: Power-up in Run
Default: 0000
Default: 0000
Default: 0000
V2000–V2377
V2000–V2377
1–99
N/A
N/A
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V-memory
V7752
V7753
V7754
V7755
V7756
V7757
V7760–V7764
V7765
V7666–V7774
V7775
V7776
V7777
3-42
Description of Contents
I/O Configuration Error — s tores the module ID code for the module that
does not match the current configuration.
I/O Configuration Error — stores the correct module ID code.
I/O Configuration Error — identifies the base and slot number.
Error code — stores the fatal error code.
Error code — stores the major error code.
Error code — stores the minor error code.
Module Error —stores the slot number and error code where an I/O error
occurs.
Scan — stores the total number of scan cycles that have occurred since the
last Program Mode to Run Mode transition.
Not used
Scan — stores the current scan time (milliseconds).
Scan — stores the minimum scan time that has occurred since the last
Program Mode to Run Mode transition (milliseconds).
Scan — stores the maximum scan time that has occurred since the last
Program Mode to Run Mode transition (milliseconds).
DL205 User Manual, 4th Edition, Rev. C
Default Values/Ranges
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Chapter 3: CPU Specifications and Operations
DL240 System V-memory
System
V-memory
Description of Contents
default location for multiple preset values for UP/DWN and UP counter 1 or pulse
V3630–V3707 The
output function.
V3710–V3767 The default location for multiple preset values for UP/DWN and UP counter 2.
V3770–V3773 Not used
V3774–V3777 Default locations for analog potentiometer data (channels 1–4, respectively).
V7620–V7627 Locations for DV–1000 operator interface parameters
V7620 Sets the V-memory location that contains the value.
V7621 Sets the V-memory location that contains the message.
V7622 Sets the total number (1 – 16) of V-memory locations to be displayed.
V7623 Sets the V-memory location that contains the numbers to be displayed.
V7624 Sets the V-memory location that contains the character code to be displayed.
V7625 Sets the bit control pointer
V7626 Power Up Mode
V7627 Change Preset Value Password.
V7630
V7631
V7632
Default Values/
Ranges
Starting location for the multi–step presets for channel 1. Since there are 24 presets
available, the default range is V3630 – V3707. You can change the starting point if
necessary.
Starting location for the multi–step presets for channel 2. Since there are 24 presets
available, the default range is V3710– V3767. You can change the starting point if
necessary.
Contains the baud rate setting for Port 2. You can use AUX 56 (from the Handheld
Programmer) or, use DirectSOFT to set the port parameters if 9600 baud is
unacceptable. Also allows you to set a delay time between the assertion of the RTS
signal and the transmission of data. This is useful for radio modems that require a
key-up delay before data is transmitted.
e.g., a value of 0302 sets 10ms Turnaround Delay (TAD) and 9600 baud.
N/A
N/A
N/A
Range: 0 – 9999
V0 – V3760
V0 – V3760
1 – 16
V0 – V3760
V0 – V3760
V-memory location for
X, Y, or C points used.
0,1,2,3,12
Default=0000
Default: V3630
Range: V0 – V3710
Default: V3710
Range: V0 – V3710
Default: 2 – 9600 baud
Lower Byte = Baud Rate
Lower Byte Range:
00 = 300
01 = 1200
02 = 9600
03 = 19.2K
Upper Byte = Time Delay
Upper Byte Range:
01 = 2ms
02 = 5ms
03 = 10ms
04 = 20ms
05 = 50ms
06 = 100ms
07 = 500ms
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Description of Contents
V7633
Sets the desired mode for the high speed counter, interrupt, pulse catch, pulse train,
and input filter (see the D2-CTRINT manual, D2-CTRIF-M, for more information).
Location is also used for setting the with/without battery option, enable/disable CPU
mode change.
V7634
Contains set-up information for high-speed counter, interrupt, pulse catch, pulse train
output, and input filter for X0 (when D2–CTRINT is installed).
Contains set-up information for high-speed counter, interrupt, pulse catch, pulse train
output, and input filter for X1 (when D2–CTRINT is installed).
Contains set-up information for high-speed counter, interrupt, pulse catch, pulse train
output, and input filter for X2 (when D2–CTRINT is installed).
Contains set-up information for high-speed counter, interrupt, pulse catch, pulse train
output, and input filter for X3 (when D2–CTRINT is installed).
V7635
V7636
V7637
V7644–V7645
V7646–V7647
V7650–V7737
V7720–V7722
V7720
V7721
V7722
V7746
V7747
V7751
V7752
3-44
Default: 0000
Lower Byte Range:
0 – None
10 – Up
20 – Up/Dwn.
30 – Pulse Out
40 – Interrupt
50 – Pulse Catch
60 – Filtered Dis.
Upper Byte Range:
Bits 8 – 11, 15 Unused
Bit 12: With Batt. installed:
0 = disable BATT LED
1 = enable BATT LED
Bit 13: Power-up in Run
Bit 14: Mode chg. enable
(K-sequence only)
Default: 0000
Default: 0000
Default: 0000
Default: 0000
Default: 0000
Range: 0 – 9999
Default: 0000
Location for setting the lower and upper limits for the CH2 analog pot.
Range: 0 – 9999
Default: 0000
Location for setting the lower and upper limits for the CH3 analog pot.
Range: 0 – 9999
Default: 0000
Location for setting the lower and upper limits for the CH4 analog pot.
Range: 0 – 9999
Locations reserved for set-up information used with future options (remote I/O and data communications).
Locations for DV–1000 operator interface parameters.
Titled Timer preset value pointer .
V2000–V2377
Titled Counter preset value pointer.
V2000–V2377
HiByte-Titled Timer preset block size, LoByte-Titled Counter preset block size.
1–99
Location contains the battery voltage, accurate to 0.1V. For example, a value of 32 indicates 3.2 volts.
Location contains a 10ms counter. This location increments once every 10ms.
Fault Message Error Code — stores the 4-digit code used with the FAULT instruction when the instruction is
executed. If you’ve used ASCII messages (DL240 only), then the data label (DLBL) reference number for that
message is stored here.
I/O configuration Error — stores the module ID code for the module that does not match the current configuration.
V7640–V7641 Location for setting the lower and upper limits for the CH1 analog pot.
V7642–V7643
Default Values/
Ranges
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System
V-memory
V7753
V7754
V7755
V7756
V7757
V7760–V7764
V7765
V7766
V7767
V7770
V7771
V7772
V7773
V7774
V7775
V7776
V7777
Description of Contents
I/O Configuration Error — stores the correct module ID code.
I/O Configuration Error — identifies the base and slot number.
Error code — stores the fatal error code.
Error code — stores the major error code.
Error code — stores the minor error code.
Module Error — stores the slot number and error code where an I/O error occurs.
Scan—stores the number of scan cycles that have occurred since the last Program to Run Mode transition.
Contains the number of seconds on the clock. (00 to 59).
Contains the number of minutes on the clock. (00 to 59).
Contains the number of hours on the clock. (00 to 23).
Contains the day of the week. (Mon, Tue, etc.).
Contains the day of the month (1st, 2nd, etc.).
Contains the month. (01 to 12)
Contains the year. (00 to 99)
Scan — stores the current scan time (milliseconds).
Scan — stores the minimum scan time that has occurred since the last Program Mode to Run Mode transition
(milliseconds).
Scan — stores the maximum scan time that has occurred since the last Program Mode to Run Mode transition
(milliseconds).
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Description of Contents
V3710–V3767
V3770–V3777
The default location for multiple preset values for UP/DWN and UP counter 1 or pulse N/A
output function
The default location for multiple preset values for UP/DWN and UP counter 2.
N/A
Not used
N/A
V7620–V7627
V7620
V7621
V7622
V7623
V7624
V7625
V7626
V7627
Locations for DV–1000 operator interface parameters
Sets the V-memory location that contains the value
Sets the V-memory location that contains the message
Sets the total number (1 – 32) of V-memory locations to be displayed
Sets the V-memory location that contains the numbers to be displayed
Sets the V-memory location that contains the character code to be displayed
Sets the bit control pointer
Sets the power up mode
Change Preset Value password
V3630–V3707
V7630
V7631
V7632
V7633
V7634
V7635
V7636
3-46
Starting location for the multi–step presets for channel 1. Since there are 24 presets
available, the default range is V3630 – V3707. You can change the starting point if
necessary.
Starting location for the multi–step presets for channel 2. Since there are 24 presets
available, the default range is V3710– V3767. You can change the starting point if
necessary.
Reserved
Sets the desired mode for the high-speed counter, interrupt, pulse catch, pulse train,
and input filter (see the D2-CTRINT manual, D2-CTRIF-M, for more information).
Location is also used for setting the with/without battery option, enable/disable CPU
mode change, and power-up in Run Mode option.
Default Values/
Ranges
V0 – V3760
V0 – V3760
1 – 32
V0 – V3760
V0 – V3760
V-memory for X, Y, or C
0,1,2,3,12
Default=0000
Default: V3630
Range: V0 – V3710
Default: V3710
Range: V0 – V3710
Default: 0060
Lower Byte Range:
Range: 0 – None
10 – Up
20 – Up/Dwn.
30 – Pulse Out
40 – Interrupt
50 – Pulse Catch
60 – Filtered Dis.
Upper Byte Range:
Bits 8 – 11, 14–15 Unused
Bit 12: With Batt. installed:
0 = disable BATT LED
1 = enable BATT LED
Bit 13: Power-up in Run
Contains set-up information for high-speed counter, interrupt, pulse catch,pulse train Default: 1006
output, and input filter for X0 (when D2–CTRINT is installed).
Contains set-up information for high-speed counter, interrupt, pulse catch, pulse train Default: 1006
output, and input filter for X1 (when D2–CTRINT is installed).
Contains set-up information for high-speed counter, interrupt, pulse catch, pulse train Default: 1006
output, and input filter for X2 (when D2–CTRINT is installed).
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Chapter 3: CPU Specifications and Operations
System
V-memory
Description of Contents
Default Values/Ranges
V7637
Contains set-up information for high-speed counter, interrupt, pulse catch,
pulse train output, and input filter for X3 (when D2–CTRINT is installed).
V7640
Loop Table Beginning address.
V7641
V7642
V7643–V7647
V7650
V7651
V7652
V7653
V7654
V7655
V7656
V7657
V7660–V7717
V7720–V7722
V7720
V7721
V7722
V7740
V7741
V7747
V7750
Number of Loops Enabled
Error Code – V–memory Error Location for Loop Table.
Reserved.
Port 2 End–code setting Setting (A55A), Non–procedure communications start.
Port 2 Data format – Non–procedure communications format setting.
Port 2 Format Type setting – Non–procedure communications type code setting.
Port 2 Terminate–code setting – Non–procedure communications Termination code setting.
Port 2 Store v–mem address – Non–procedure communication data store V–Memory address
Port 2 Setup area –0–7 Comm protocol (flag 0) 8–15 Comm time out/response delay time (flag 1).
Port 2 Setup area – 0–15 Communication (flag 2, flag 3).
Port 2: Setup completion code.
Set–up Information – Locations reserved for set-up information used with future options.
Locations for DV–1000 operator interface parameters.
Titled Timer preset value pointer.
Title Counter preset value pointer.
HiByte-Titled Timer preset block size, LoByte-Titled Counter preset block size.
Port 2 Communication Auto Reset Timer setup.
Output Hold or reset setting: Expansion bases 1 and 2 (DL250–1).
Location contains a 10ms counter. This location increments once every 10ms.
Reserved.
V7751
V7752
V7753
V7754
V7755
V7756
V7757
V7760–V7764
V7765
Default: 1006
V1400–V7340 V10000–
V17740
1–4
Fault Message Error Code — stores the 4-digit code used with the FAULT instruction when the instruction
is executed. If you’ve used ASCII messages (DL240 only), then the data label (DLBL) reference number for
that message is stored here.
I/O configuration Error — stores the module ID code for the module that does not match the current
configuration.
I/O Configuration Error — stores the correct module ID code.
I/O Configuration Error — identifies the base and slot number.
Error code — stores the fatal error code.
Error code — stores the major error code.
Error code — stores the minor error code.
Module Error — stores the slot number and error code where an I/O error occurs.
Scan — stores the total number of scan cycles that have occurred since the last Program Mode to Run
Mode transition.
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V-memory
V7766
V7767
V7770
V7771
V7772
V7773
V7774
V7775
V7776
V7777
V36000–36057
V36100–36157
V36400–36427
V37700–37737
System CRs
C740
C741
C743
C750 to C757
C760 to C767
3-48
Description of Contents
Contains the number of seconds on the clock. (00 to 59)
Contains the number of minutes on the clock. (00 to 59)
Contains the number of hours on the clock. (00 to 23)
Contains the day of the week. (Mon, Tue, etc.)
Contains the day of the month (1st, 2nd, etc.)
Contains the month. (01 to 12)
Contains the year. (00 to 99)
Scan — stores the current scan time (milliseconds)
Scan — stores the minimum scan time that has occurred since the last Program Mode to Run
Mode transition (milliseconds)
Scan — stores the maximum scan time that has occurred since the last Program Mode to Run
Mode transition (milliseconds)
Analog pointer method for expansion base 1 (DL250–1)
Analog pointer method for expansion base 2 (DL250–1)
Analog pointer method for local base
Port 2: Setup register for Koyo Remote I/O
Description of Contents
Completion of setups – ladder logic must turn this relay on when it has finished writing to the Remote I/O setup
table.
Erase received data – turning on this flag will erase the received data during a communication error.
Re-start – Turning on this relay will resume after a communications hang-up on an error.
Setup Error – The corresponding relay will be ON if the setup table contains an error.
(C750 = master, C751 = slave 1 C757 = slave 7)
Communications Ready – The corresponding relay will be ON if the set-up table data is valid.
(C760 = master, C761 = slave 1 C767 = slave 7)
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Chapter 3: CPU Specifications and Operations
DL260 System V-memory
System
V-memory
Description of Contents
Default Values/Ranges
V3630–V3707
The default location for multiple preset values for UP/DWN and UP counter 1 or
pulse output function
N/A
V3710–V3767
The default location for multiple preset values for UP/DWN and UP counter 2
N/A
V3770–V3777
V7620–V7627
V7620
V7621
V7622
V7623
V7624
V7625
V7626
V7627
Not used
N/A
Locations for DV–1000 operator interface parameters
Sets the V-memory location that contains the value
Sets the V-memory location that contains the message
Sets the total number (1 – 32) of V-memory locations to be displayed
Sets the V-memory location that contains the numbers to be displayed
Sets the V-memory location that contains the character code to be displayed
Sets the bit control pointer
Sets the power up mode
Change Preset Value password
V0 – V3760
V0 – V3760
1 – 32
V0 – V3760
V0 – V3760
V-memory for X, Y, or C
0,1,2,3,12
Default=0000
V7630
Starting location for the multi–step presets for channel 1. Since there are 24
presets available, the default range is V3630 – V3707. You can change the
starting point if necessary.
Default: V3630
Range: V0 – V3710
V7631
Starting location for the multi–step presets for channel 2. Since there are 24
Default: V3710
presets available, the default range is V3710– V3767. You can change the starting
Range: V0 – V3710
point if necessary.
V7632
V7633
Reserved
Sets the desired mode for the high-speed counter, interrupt, pulse catch, pulse
train, and input filter (see the D2-CTRINT manual, D2-CTRIF-M, for more
information). Location is also used for setting the with/without battery option,
enable/disable CPU mode change, and power-up in Run Mode option.
V7634
Contains set-up information for high-speed counter, interrupt, pulse catch, pulse
train output, and input filter for X0 (when D2–CTRINT is installed)
Contains set-up information for high-speed counter, interrupt, pulse catch, pulse
train output, and input filter for X1 (when D2–CTRINT is installed)
Contains set-up information for high-speed counter, interrupt, pulse catch, pulse
train output, and input filter for X2 (when D2–CTRINT is installed)
V7635
V7636
Default: 0060
Lower Byte Range:
Range: 0 – None
10 – Up
20 – Up/Dwn
30 – Pulse Ou
40 – Interrupt
50 – Pulse Catch
60 – Fltered Dis.
Upper Byte Range
Bits 8 – 11, 14–15 Unused
Bit 12: With Batt. installed:
0 = disable BATT LED
1 = enable BATT LED
Bit 13: Power-up in Run
Default: 1006
Default: 1006
Default: 1006
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V-memory
Description of Contents
Default Values/
Ranges
V7637
Contains set up information for high speed counter, interrupt, pulse catch, pulse train
output, and input filter for X3 (when D2–CTRINT is installed).
V7640
PID Loop Table Beginning address.
V7641
V7642
V7643 - V7647
V7650
V7651
V7652
V7653
V7654
V7655
V7656
V7657
V7660–V7717
V7720–V7722
V7720
V7721
V7722
V7740
V7741
V7742
V7747
V7750
Number of Loops Enabled.
Error Code – V–memory Error Location for Loop Table.
Reserved.
Port 2 End–code Setting (A55A), Non-procedure communications start.
Port 2 Data format - Non-procedure communications format setting.
Port 2 Format Type setting – Non–procedure communications type code setting.
Port 2 Terminate–code setting – Non–procedure communications Termination code setting
Port 2 Store v–mem address – Non–procedure communication data store V–Memory address.
Port 2 Setup area –0–7 Comm protocol (flag 0) 8–15 Comm time out/response delay time (flag 1)
Port 2 Setup area – 0–15 Communication (flag 2, flag 3)
Port 2: Setup completion code.
Set–up Information – Locations reserved for set up information used with future options.
Locations for DV-1000 operator interface parameters.
Titled Timer preset value pointer.
Title Counter preset value pointer.
HiByte-Titled Timer preset block size, LoByte-Titled Counter preset block size.
V7751
V7752
V7753
V7754
V7755
V7756
V7757
V7763–V7764
V7765
3-50
Default: 1006
V400–640
V1400–V7340
V10000–V35740
1–16
Port 2 Communication Auto Reset Timer setup.
Output Hold or reset setting: Expansion bases 1 and 2.
Output Hold or reset setting: Expansion bases 3 and 4.
Location contains a 10ms counter. This location increments once every 10ms.
Reserved.
Fault Message Error Code — stores the 4-digit code used with the FAULT instruction when the instruction is
executed. If you’ve used ASCII messages (DL240 only), then the data label (DLBL) reference number for that
message is stored here.
I/O configuration Error — stores the module ID code for the module that does not match the current
configuration.
I/O Configuration Error — stores the correct module ID code.
I/O Configuration Error — identifies the base and slot number.
Error code — stores the fatal error code.
Error code — stores the major error code.
Error code — stores the minor error code.
Module Error — stores the slot number and error code where an I/O error occurs.
Scan — stores the total number of scan cycles that have occurred since the last Program Mode to Run Mode
transition.
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Chapter 3: CPU Specifications and Operations
System
V-memory
V7766
V7767
V7770
V7771
V7772
V7773
V7774
V7775
V7776
V7777
V36000–36057
V36100–36157
V36200–36257
V36300–36357
V36400–36427
V37700–37737
Description of Contents
Contains the number of seconds on the clock. (00 to 59).
Contains the number of minutes on the clock. (00 to 59).
Contains the number of hours on the clock. (00 to 23).
Contains the day of the week. (Mon, Tue, etc.).
Contains the day of the month (1st, 2nd, etc.).
Contains the month. (01 to 12)
Contains the year. (00 to 99)
Scan — stores the current scan time (milliseconds).
Scan — stores the minimum scan time that has occurred since the last Program Mode to Run Mode transition
(milliseconds).
Scan — stores the maximum scan time that has occurred since the last Program Mode to Run Mode transition
(milliseconds).
Analog pointer method for expansion base 1
Analog pointer method for expansion base 2
Analog pointer method for expansion base 3
Analog pointer method for expansion base 4
Analog pointer method for local base
Port 2: Set-up register for Koyo Remote I/O
The following system control relays are used for Koyo Remote I/O setup on Communications
Port 2.
System CRs
C740
C741
C743
C750 to C757
C760 to C767
Description of Contents
Completion of setups – ladder logic must turn this relay on when it has finished writing to the Remote I/O setup
table.
Erase received data – turning on this flag will erase the received data during a communication error.
Re-start – Turning on this relay will resume after a communications hang-up on an error.
Setup Error – The corresponding relay will be ON if the set-up table contains an error.
(C750 = master, C751 = slave 1... C757= slave 7
Communications Ready – The corresponding relay will be ON if the set-up table data is valid.
(C760 = master, C761 = slave 1...C767 = slave 7
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DL205 Aliases
3-52
An alias is an alternate way of referring to certain memory types, such as timer/counter current
values, V-memory locations for I/O points, etc., which simplifies understanding the memory
address. The use of the alias is optional, but some users may find the alias to be helpful when
developing a program. The table below shows how the aliases can be used.
DL205 Aliases
Address Start
Alias Start
Example
V0
TA0
V1000
CTA0
V40000
VGX
V40200
VGY
V40400
VX0
V40500
VY0
V40600
VC0
V41000
VS0
V41100
VT0
V41140
VCT0
V41200
VSP0
V0 is the timer accumulator value for timer 0, therefore, its
alias is TA0. TA1 is the alias for V1, etc.
V1000 is the counter accumulator value for counter 0,
therefore, its alias is CTA0. CTA1 is the alias for V1001, etc.
V40000 is the word memory reference for discrete bits GX0
through GX17, therefore, its alias is VGX0. V40001 is the
word memory reference for discrete bits GX20 through GX37,
therefore, its alias is VGX20.
V40200 is the word memory reference for discrete bits GY0
through GY17, therefore, its alias is VGY0. V40201 is the
word memory reference for discrete bits GY20 through GY37,
therefore, its alias is VGY20.
V40400 is the word memory reference for discrete bits X0
through X17, therefore, its alias is VX0. V40401 is the word
memory reference for discrete bits X20 through X37, therefore,
its alias is VX20.
V40500 is the word memory reference for discrete bits Y0
through Y17, therefore, its alias is VY0. V40501 is the word
memory reference for discrete bits Y20 through Y37, therefore,
its alias is VY20.
V40600 is the word memory reference for discrete bits C0
through C17, therefore, its alias is VC0. V40601 is the word
memory reference for discrete bits C20 through C37, therefore,
its alias is VC20.
V41000 is the word memory reference for discrete bits S0
through S17, therefore, its alias is VS0. V41001 is the word
memory reference for discrete bits S20 through S37, therefore,
its alias is VS20.
V41100 is the word memory reference for discrete bits T0
through T17, therefore, its alias is VT0. V41101 is the word
memory reference for discrete bits T20 through T37, therefore,
its alias is VT20.
V41140 is the word memory reference for discrete bits CT0
through CT17, therefore, its alias is VCT0. V41141 is the
word memory reference for discrete bits CT20 through CT37,
therefore, its alias is VCT20.
V41200 is the word memory reference for discrete bits SP0
through SP17, therefore, its alias is VSP0. V41201 is the
word memory reference for discrete bits SP20 through SP37,
therefore, its alias is VSP20.
DL205 User Manual, 4th Edition, Rev. C
Chapter 3: CPU Specifications and Operations
DL230 Memory Map
Memory Type
Discrete Memory
Reference (octal)
Word Memory
Reference (octal)
Qty.
Decimal
Symbol
X0
Input Points
X0 – X177
V40400 – V40407
1281
Output Points
Y0 – Y177
V40500 – V40507
1281
Control Relays
C0 – C377
V40600 – V40617
256
Special Relays
SP0 – SP117
SP540 – SP577
V41200 – V41204
V41226 – V41227
112
Timers
T0 – T77
Timer Current Values
None
V0 – V77
64
Timer Status Bits
T0 – T77
V41100 – V41103
64
Counters
CT0 – CT77
Counter Current Values
None
V1000 – V1077
64
Counter Status Bits
CT0 – CT77
V41140 – V41143
64
Data Words
None
V2000 – V2377
256
None specific, used with many
instructions
Data Words Non–volatile None
V4000 – V4177
128
None specific, used with many
instructions
Stages
S0 – S377
V41000 – V41017
256
System parameters
None
V7620 – V7647
V7750–V7777
48
Y0
C0
C0
SP0
TMR
64
T0
K100
V0 K100
T0
CNT CT0
K10
64
V1000 K100
CT0
SG
S001
S0
None specific, used for various
purposes
NOTE 1: The DL230 systems are limited to 256 discrete I/O points (total) with the present system
hardware available. These can be mixed between inputs and output points as necessary.
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DL240 Memory Map
Memory Type
Discrete Memory
Reference (octal)
Word Memory Qty. Decimal
Reference(octal)
Symbol
X0
Input Points
X0 – X477
V40400 – V40423
3201
Output Points
Y0 – Y477
V40500 – V40523
3201
Control Relays
C0 – C377
V40600 – V40617
256
Special Relays
SP0 – SP137
SP540 – SP617
V41200 – V41205
V41226 – V41230
144
Timers
T0 – T177
Timer Current Values
None
V0 – V177
128
Timer Status Bits
T0 – T177
V41100 – V41107
128
Counters
CT0 – CT177
Counter Current Values
None
V1000 – V1177
128
Counter Status Bits
CT0 – CT177
V41140 – V41147
128
Data Words
None
V2000 – V3777
1024
None specific, used with many
instructions
Data Words Non–volatile None
V4000 – V4377
256
None specific, used with many
instructions
Stages
S0 – S777
V41000 – V41037
512
System parameters
None
V7620 – V7737
V7746–V7777
106
3-54
128
Y0
C0
C0
SP0
TMR
T0
K100
V0 K100
T0
CNT CT0
K10
128
V1000 K100
CT0
SG
S001
S0
None specific, used for various
purposes
NOTE 1: The DL240 systems are limited to 256 discrete I/O points (total) with the present system hardware
available. These can be mixed between inputs and output points as necessary.
DL205 User Manual, 4th Edition, Rev. C
Chapter 3: CPU Specifications and Operations
DL250–1 Memory Map (DL250 also)
Memory Type
Discrete Memory
Reference (octal)
Word Memory
Reference (octal)
Qty.
Decimal
Input Points
X0 – X777
V40400 – V40437
512
Output Points
Y0 – Y777
V40500 – V40537
512
Control Relays
C0 – C1777
V40600 – V40677
1024
Special Relays
SP0 – SP777
V41200 – V41237
512
Timers
T0 – T377
Timer Current Values
None
V0 – V377
256
Timer Status Bits
T0 – T377
V41100 – V41117
256
Counters
CT0 – CT177
Counter Current Values
None
V1000 – V1177
128
Counter Status Bits
CT0 – CT177
V41140 – V41147
128
Data Words
None
V1400 – V7377 V10000–
V17777
7168
Stages
S0 – S1777
V41000 – V41077
1024
System parameters
None
V7400–V7777 V36000–
V37777
768
256
128
Symbol
X0
Y0
C0
C0
SP0
TMR
T0
K100
V0 K100
T0
CNT CT0
K10
V1000 K100
CT0
None specific, used with many
instructions
SG
S001
S0
None specific, used for various
purposes
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DL260 Memory Map
Memory Type
Discrete Memory
Reference (octal)
Word Memory
Reference (octal)
Qty.
Decimal
Input Points
X0 – X1777
V40400 – V40477
1024
Output Points
Y0 – Y1777
V40500 – V40577
1024
Control Relays
C0 – C3777
V40600 – V40777
2048
Special Relays
SP0 – SP777
V41200 – V41237
512
Timers
T0 – T377
Timer Current Values
None
V0 – V377
256
Timer Status Bits
T0 – T377
V41100 – V41117
256
Counters
CT0 – CT377
Counter Current Values
None
V1000 – V1377
256
Counter Status Bits
CT0 – CT377
V41140 – V41157
256
Data Words
None
V400 – V777
V1400 – V7377 V10000–
V35777
14.6K
Stages
S0 – S1777
V41000 – V41077
1024
GX0 – GX3777
V40000 – V40177
2048
GY0 – GY3777
V40200–V40377
2048
Remote Input and
Output Points
System parameters
3-56
None
Symbol
X0
Y0
C0
SP0
TMR
256
V36000–V37777
DL205 User Manual, 4th Edition, Rev. C
1.2K
T0
K100
V0 K100
T0
CNT CT0
K10
256
V7400–V7777
C0
V1000 K100
CT0
None specific, used with many
instructions
SG
S0
S001
GX0
GY0
None specific, used for various
purposes
Chapter 3: CPU Specifications and Operations
X Input/Y Output Bit Map
This table provides a listing of the individual Input points associated with each V-memory
address bit for the DL230, DL240, and DL250–1 and DL260 CPUs. The DL250–1 ranges
apply to the DL250.
MSB
DL230/DL240/DL250-1/DL260 Input (X) and Output (Y) Points
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
017
037
057
077
117
137
157
177
016
036
056
076
116
136
156
176
015
035
055
075
115
135
155
175
014
034
054
074
114
134
154
174
013
033
053
073
113
133
153
173
012
032
052
072
112
132
152
172
011
031
051
071
111
131
151
171
010
030
050
070
110
130
150
170
007
027
047
067
107
127
147
167
006
026
046
066
106
126
146
166
005
025
045
065
105
125
145
165
004
024
044
064
104
124
144
164
003
023
043
063
103
123
143
163
002
022
042
062
102
122
142
162
001
021
041
061
101
121
141
161
216
236
256
276
316
336
356
376
416
436
456
476
215
235
255
275
315
335
355
375
415
435
455
475
202
222
242
262
302
322
342
362
402
422
442
462
201
221
241
261
301
321
341
361
401
421
441
461
516
536
556
576
616
636
656
676
716
736
756
776
515
535
555
575
615
635
655
675
715
735
755
775
MSB
217
237
257
277
317
337
357
377
417
437
457
477
DL240/DL250-1/DL260 Input (X) and Output (Y) Points
MSB
517
537
557
577
617
637
657
677
717
737
757
777
214
234
254
274
314
334
354
374
414
434
454
474
213
233
253
273
313
333
353
373
413
433
453
473
212
232
252
272
312
332
352
372
412
432
452
472
211
231
251
271
311
331
351
371
411
431
451
471
210
230
250
270
310
330
350
370
410
430
450
470
207
227
247
267
307
327
347
367
407
427
447
467
206
226
246
266
306
326
346
366
406
426
446
466
205
225
245
265
305
325
345
365
405
425
445
465
204
224
244
264
304
324
344
364
404
424
444
464
203
223
243
263
303
323
343
363
403
423
443
463
513
533
553
573
613
633
653
673
713
733
753
773
512
532
552
572
612
632
652
672
712
732
752
772
511
531
551
571
611
631
651
671
711
731
751
771
510
530
550
570
610
630
650
670
710
730
750
770
507
527
547
567
607
627
647
667
707
727
747
767
506
526
546
566
606
626
646
666
706
726
746
766
505
525
545
565
605
625
645
665
705
725
745
765
504
524
544
564
604
624
644
664
704
724
744
764
503
523
543
563
603
623
643
663
703
723
743
763
000
020
040
060
100
120
140
160
V40400
V40401
V40402
V40403
V40404
V40405
V40406
V40407
V40500
V40501
V40502
V40503
V40504
V40505
V40506
V40507
V40410
V40411
V40412
V40413
V40414
V40415
V40416
V40417
V40420
V40421
V40422
V40423
V40510
V40511
V40512
V40513
V40514
V40515
V40516
V40517
V40520
V40521
V40522
V40523
V40424
V40425
V40426
V40427
V40430
V40431
V40432
V40433
V40434
V40435
V40436
V40437
V40524
V40525
V40526
V40527
V40530
V40531
V40532
V40533
V40534
V40535
V40536
V40537
LSB
Additional DL250-1/DL260 Input (X) and Output (Y) Points
514
534
554
574
614
634
654
674
714
734
754
774
LSB X Input Y Output
0 Address Address
502
522
542
562
602
622
642
662
702
722
742
762
200
220
240
260
300
320
340
360
400
420
440
460
LSB
501
521
541
561
601
621
641
661
701
721
741
761
500
520
540
560
600
620
640
660
700
720
740
760
DL205 User Manual, 4th Edition, Rev. C
1
2
3
4
5
6
7
8
9
10
11
12
13
14
A
B
C
D
3-57
Chapter 3: CPU Specifications and Operations
1
2
3
4
5
6
7
8
9
10
11
12
13
14
A
B
C
D
MSB
Additional DL260 Input (X) and Output (Y) Points
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
1017
1037
1057
1077
1117
1137
1157
1177
1217
1237
1257
1277
1317
1337
1357
1377
1417
1437
1457
1477
1517
1537
1557
1577
1617
1637
1657
1677
1717
1737
1757
1777
1016
1036
1056
1076
1116
1136
1156
1176
1216
1236
1256
1276
1316
1336
1356
1376
1416
1436
1456
1476
1516
1536
1556
1576
1616
1636
1656
1676
1716
1736
1756
1776
1015
1035
1055
1075
1115
1135
1155
1175
1215
1235
1255
1275
1315
1335
1355
1375
1415
1435
1455
1475
1515
1535
1555
1575
1615
1635
1655
1675
1715
1735
1755
1775
1014
1034
1054
1074
1114
1134
1154
1174
1214
1234
1254
1274
1314
1334
1354
1374
1414
1434
1454
1474
1514
1534
1554
1574
1614
1634
1654
1674
1714
1734
1754
1774
1013
1033
1053
1073
1113
1133
1153
1173
1213
1233
1253
1273
1313
1333
1353
1373
1413
1433
1453
1473
1513
1533
1553
1573
1613
1633
1653
1673
1713
1733
1753
1773
1012
1032
1052
1072
1112
1132
1152
1172
1212
1232
1252
1272
1312
1332
1352
1372
1412
1432
1452
1472
1512
1532
1552
1572
1612
1632
1652
1672
1712
1732
1752
1772
1011
1031
1051
1071
1111
1131
1151
1171
1211
1231
1251
1271
1311
1331
1351
1371
1411
1431
1451
1471
1511
1531
1551
1571
1611
1631
1651
1671
1711
1731
1751
1771
1010
1030
1050
1070
1110
1130
1150
1170
1210
1230
1250
1270
1310
1330
1350
1370
1410
1430
1450
1470
1510
1530
1550
1570
1610
1630
1650
1670
1710
1730
1750
1770
1007
1027
1047
1067
1107
1127
1147
1167
1207
1227
1247
1267
1307
1327
1347
1367
1407
1427
1447
1467
1507
1527
1547
1567
1607
1627
1647
1667
1707
1727
1747
1767
1006
1026
1046
1066
1106
1126
1146
1166
1206
1226
1246
1266
1306
1326
1346
1366
1406
1426
1446
1466
1506
1526
1546
1566
1606
1626
1646
1666
1706
1726
1746
1766
1005
1025
1045
1065
1105
1125
1145
1165
1205
1225
1245
1265
1305
1325
1345
1365
1405
1425
1445
1465
1505
1525
1545
1565
1605
1625
1645
1665
1705
1725
1745
1765
1004
1024
1044
1064
1104
1124
1144
1164
1204
1224
1244
1264
1304
1324
1344
1364
1404
1424
1444
1464
1504
1524
1544
1564
1604
1624
1644
1664
1704
1724
1744
1764
1003
1023
1043
1063
1103
1123
1143
1163
1203
1223
1243
1263
1303
1323
1343
1363
1403
1423
1443
1463
1503
1523
1543
1563
1603
1623
1643
1663
1703
1723
1743
1763
1002
1022
1042
1062
1102
1122
1142
1162
1202
1222
1242
1262
1302
1322
1342
1362
1402
1422
1442
1462
1502
1522
1542
1562
1602
1622
1642
1662
1702
1722
1742
1762
1001
1021
1041
1061
1101
1121
1141
1161
1201
1221
1241
1261
1301
1321
1341
1361
1401
1421
1441
1461
1501
1521
1541
1561
1601
1621
1641
1661
1701
1721
1741
1761
3-58
DL205 User Manual, 4th Edition, Rev. C
LSB X Input Y Output
0 Address Address
1000
1020
1040
1060
1100
1120
1140
1160
1200
1220
1240
1260
1300
1320
1340
1360
1400
1420
1440
1460
1500
1520
1540
1560
1600
1620
1640
1660
1700
1720
1740
1760
V40440
V40441
V40442
V40443
V40444
V40445
V40446
V40447
V40450
V40451
V40452
V40453
V40454
V40455
V40456
V40457
V40460
V40461
V40462
V40463
V40464
V40465
V40466
V40467
V40470
V40471
V40472
V40473
V40474
V40475
V40476
V40477
V40540
V40541
V40542
V40543
V40544
V40545
V40546
V40547
V40550
V40551
V40552
V40553
V40554
V40555
V40556
V40557
V40560
V40561
V40562
V40563
V40564
V40565
V40566
V40567
V40570
V40571
V40572
V40573
V40574
V40575
V40576
V40577
Chapter 3: CPU Specifications and Operations
Control Relay Bit Map
This table provides a listing of the individual control relays associated with each V-memory address bit.
MSB
DL230/DL240/DL250-1/DL260 Control Relays (C)
LSB
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
017
037
057
077
117
137
157
177
217
237
257
277
317
337
357
377
016
036
056
076
116
136
156
176
216
236
256
276
316
336
356
376
015
035
055
075
115
135
155
175
215
235
255
275
315
335
355
375
014
034
054
074
114
134
154
174
214
234
254
274
314
334
354
374
013
033
053
073
113
133
153
173
213
233
253
273
313
333
353
373
012
032
052
072
112
132
152
172
212
232
252
272
312
332
352
372
011
031
051
071
111
131
151
171
211
231
251
271
311
331
351
371
010
030
050
070
110
130
150
170
210
230
250
270
310
330
350
370
007
027
047
067
107
127
147
167
207
227
247
267
307
327
347
367
006
026
046
066
106
126
146
166
206
226
246
266
306
326
346
366
005
025
045
065
105
125
145
165
205
225
245
265
305
325
345
365
004
024
044
064
104
124
144
164
204
224
244
264
304
324
344
364
003
023
043
063
103
123
143
163
203
223
243
263
303
323
343
363
002
022
042
062
102
122
142
162
202
222
242
262
302
322
342
362
001
021
041
061
101
121
141
161
201
221
241
261
301
321
341
361
000
020
040
060
100
120
140
160
200
220
240
260
300
320
340
360
416
436
456
476
516
536
556
576
616
636
656
676
716
736
756
776
415
435
455
475
515
535
555
575
615
635
655
675
715
735
755
775
414
434
454
474
514
534
554
574
614
634
654
674
714
734
754
774
403
423
443
463
503
523
543
563
603
623
643
663
703
723
743
763
402
422
442
462
502
522
542
562
602
622
642
662
702
722
742
762
401
421
441
461
501
521
541
561
601
621
641
661
701
721
741
761
MSB
417
437
457
477
517
537
557
577
617
637
657
677
717
737
757
777
Additional DL250-1/DL260 Control Relays (C)
413
433
453
473
513
533
553
573
613
633
653
673
713
733
753
773
412
432
452
472
512
532
552
572
612
632
652
672
712
732
752
772
411
431
451
471
511
531
551
571
611
631
651
671
711
731
751
771
410
430
450
470
510
530
550
570
610
630
650
670
710
730
750
770
407
427
447
467
507
527
547
567
607
627
647
667
707
727
747
767
406
426
446
466
506
526
546
566
606
626
646
666
706
726
746
766
405
425
445
465
505
525
545
565
605
625
645
665
705
725
745
765
404
424
444
464
504
524
544
564
604
624
644
664
704
724
744
764
Address
V40600
V40601
V40602
V40603
V40604
V40605
V40606
V40607
V40610
V40611
V40612
V40613
V40614
V40615
V40616
V40617
LSB Address
400
420
440
460
500
520
540
560
600
620
640
660
700
720
740
760
DL205 User Manual, 4th Edition, Rev. C
V40620
V40621
V40622
V40623
V40624
V40625
V40626
V40627
V40630
V40631
V40632
V40633
V40634
V40635
V40636
V40637
1
2
3
4
5
6
7
8
9
10
11
12
13
14
A
B
C
D
3-59
Chapter 3: CPU Specifications and Operations
1
2
3
4
5
6
7
8
9
10
11
12
13
14
A
B
C
D
MSB
Additional DL250-1/DL260 Control Relays (C)
15
14
13
12
11
10
1017
1037
1057
1077
1117
1137
1157
1177
1217
1237
1257
1277
1317
1337
1357
1377
1417
1437
1457
1477
1517
1537
1557
1577
1617
1637
1657
1677
1717
1737
1757
1777
1016
1036
1056
1076
1116
1136
1156
1176
1216
1236
1256
1276
1316
1336
1356
1376
1416
1436
1456
1476
1516
1536
1556
1576
1616
1636
1656
1676
1716
1736
1756
1776
1015
1035
1055
1075
1115
1135
1155
1175
1215
1235
1255
1275
1315
1335
1355
1375
1415
1435
1455
1475
1515
1535
1555
1575
1615
1635
1655
1675
1715
1735
1755
1775
1014
1034
1054
1074
1114
1134
1154
1174
1214
1234
1254
1274
1314
1334
1354
1374
1414
1434
1454
1474
1514
1534
1554
1574
1614
1634
1654
1674
1714
1734
1754
1774
1013
1033
1053
1073
1113
1133
1153
1173
1213
1233
1253
1273
1313
1333
1353
1373
1413
1433
1453
1473
1513
1533
1553
1573
1613
1633
1653
1673
1713
1733
1753
1773
1012
1032
1052
1072
1112
1132
1152
1172
1212
1232
1252
1272
1312
1332
1352
1372
1412
1432
1452
1472
1512
1532
1552
1572
1612
1632
1652
1672
1712
1732
1752
1772
3-60
9
1011
1031
1051
1071
1111
1131
1151
1171
1211
1231
1251
1271
1311
1331
1351
1371
1411
1431
1451
1471
1511
1531
1551
1571
1611
1631
1651
1671
1711
1731
1751
1771
8
1010
1030
1050
1070
1110
1130
1150
1170
1210
1230
1250
1270
1310
1330
1350
1370
1410
1430
1450
1470
1510
1530
1550
1570
1610
1630
1650
1670
1710
1730
1750
1770
7
1007
1027
1047
1067
1107
1127
1147
1167
1207
1227
1247
1267
1307
1327
1347
1367
1407
1427
1447
1467
1507
1527
1547
1567
1607
1627
1647
1667
1707
1727
1747
1767
6
1006
1026
1046
1066
1106
1126
1146
1166
1206
1226
1246
1266
1306
1326
1346
1366
1406
1426
1446
1466
1506
1526
1546
1566
1606
1626
1646
1666
1706
1726
1746
1766
DL205 User Manual, 4th Edition, Rev. C
5
1005
1025
1045
1065
1105
1125
1145
1165
1205
1225
1245
1265
1305
1325
1345
1365
1405
1425
1445
1465
1505
1525
1545
1565
1605
1625
1645
1665
1705
1725
1745
1765
4
1004
1024
1044
1064
1104
1124
1144
1164
1204
1224
1244
1264
1304
1324
1344
1364
1404
1424
1444
1464
1504
1524
1544
1564
1604
1624
1644
1664
1704
1724
1744
1764
LSB
3
1003
1023
1043
1063
1103
1123
1143
1163
1203
1223
1243
1263
1303
1323
1343
1363
1403
1423
1443
1463
1503
1523
1543
1563
1603
1623
1643
1663
1703
1723
1743
1763
2
1002
1022
1042
1062
1102
1122
1142
1162
1202
1222
1242
1262
1302
1322
1342
1362
1402
1422
1442
1462
1502
1522
1542
1562
1602
1622
1642
1662
1702
1722
1742
1762
1
1001
1021
1041
1061
1101
1121
1141
1161
1201
1221
1241
1261
1301
1321
1341
1361
1401
1421
1441
1461
1501
1521
1541
1561
1601
1621
1641
1661
1701
1721
1741
1761
0
1000
1020
1040
1060
1100
1120
1140
1160
1200
1220
1240
1260
1300
1320
1340
1360
1400
1420
1440
1460
1500
1520
1540
1560
1600
1620
1640
1660
1700
1720
1740
1760
Address
V40640
V40641
V40642
V40643
V40644
V40645
V40646
V40647
V40650
V40651
V40652
V40653
V40654
V40655
V40656
V40657
V40660
V40661
V40662
V40663
V40664
V40665
V40666
V40667
V40670
V40671
V40672
V40673
V40674
V40675
V40676
V40677
Chapter 3: CPU Specifications and Operations
This portion of the table shows additional Control Relays points available with the DL260.
MSB
Additional DL260 Control Relays (C)
LSB
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
2017
2037
2057
2077
2117
2137
2157
2177
2217
2237
2257
2277
2317
2337
2357
2377
2417
2437
2457
2477
2517
2537
2557
2577
2617
2637
2657
2677
2717
2737
2757
2777
2016
2036
2056
2076
2116
2136
2156
2176
2216
2236
2256
2276
2316
2336
2356
2376
2416
2436
2456
2476
2516
2536
2556
2576
2616
2636
2656
2676
2716
2736
2756
2776
2015
2035
2055
2075
2115
2135
2155
2175
2215
2235
2255
2275
2315
2335
2355
2375
2415
2435
2455
2475
2515
2535
2555
2575
2615
2635
2655
2675
2715
2735
2755
2775
2014
2034
2054
2074
2114
2134
2154
2174
2214
2234
2254
2274
2314
2334
2354
2374
2414
2434
2454
2474
2514
2534
2554
2574
2614
2634
2654
2674
2714
2734
2754
2774
2013
2033
2053
2073
2113
2133
2153
2173
2213
2233
2253
2273
2313
2333
2353
2373
2413
2433
2453
2473
2513
2533
2553
2573
2613
2633
2653
2673
2713
2733
2753
2773
2012
2032
2052
2072
2112
2132
2152
2172
2212
2232
2252
2272
2312
2332
2352
2372
2412
2432
2452
2472
2512
2532
2552
2572
2612
2632
2652
2672
2712
2732
2752
2772
2011
2031
2051
2071
2111
2131
2151
2171
2211
2231
2251
2271
2311
2331
2351
2371
2411
2431
2451
2471
2511
2531
2551
2571
2611
2631
2651
2671
2711
2731
2751
2771
2010
2030
2050
2070
2110
2130
2150
2170
2210
2230
2250
2270
2310
2330
2350
2370
2410
2430
2450
2470
2510
2530
2550
2570
2610
2630
2650
2670
2710
2730
2750
2770
2007
2027
2047
2067
2107
2127
2147
2167
2207
2227
2247
2267
2307
2327
2347
2367
2407
2427
2447
2467
2507
2527
2547
2567
2607
2627
2647
2667
2707
2727
2747
2767
2006
2026
2046
2066
2106
2126
2146
2166
2206
2226
2246
2266
2306
2326
2346
2366
2406
2426
2446
2466
2506
2526
2546
2566
2606
2626
2646
2666
2706
2726
2746
2766
2005
2025
2045
2065
2105
2125
2145
2165
2205
2225
2245
2265
2305
2325
2345
2365
2405
2425
2445
2465
2505
2525
2545
2565
2605
2625
2645
2665
2705
2725
2745
2765
2004
2024
2044
2064
2104
2124
2144
2164
2204
2224
2244
2264
2304
2324
2344
2364
2404
2424
2444
2464
2504
2524
2544
2564
2604
2624
2644
2664
2704
2724
2744
2764
2003
2023
2043
2063
2103
2123
2143
2163
2203
2223
2243
2263
2303
2323
2343
2363
2403
2423
2443
2463
2503
2523
2543
2563
2603
2623
2643
2663
2703
2723
2743
2763
2002
2022
2042
2062
2102
2122
2142
2162
2202
2222
2242
2262
2302
2322
2342
2362
2402
2422
2442
2462
2502
2522
2542
2562
2602
2622
2642
2662
2702
2722
2742
2762
2001
2021
2041
2061
2101
2121
2141
2161
2201
2221
2241
2261
2301
2321
2341
2361
2401
2421
2441
2461
2501
2521
2541
2561
2601
2621
2641
2661
2701
2721
2741
2761
2000
2020
2040
2060
2100
2120
2140
2160
2200
2220
2240
2260
2300
2320
2340
2360
2400
2420
2440
2460
2500
2520
2540
2560
2600
2620
2640
2660
2700
2720
2740
2760
DL205 User Manual, 4th Edition, Rev. C
Address
V40700
V40701
V40702
V40703
V40704
V40705
V40706
V40707
V40710
V40711
V40712
V40713
V40714
V40715
V40716
V40717
V40720
V40721
V40722
V40723
V40724
V40725
V40726
V40727
V40730
V40731
V40732
V40733
V40734
V40735
V40736
V40737
1
2
3
4
5
6
7
8
9
10
11
12
13
14
A
B
C
D
3-61
Chapter 3: CPU Specifications and Operations
1
2
3
4
5
6
7
8
9
10
11
12
13
14
A
B
C
D
MSB
Additional DL260 Control Relays (C)
LSB
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
3017
3037
3057
3077
3117
3137
3157
3177
3217
3237
3257
3277
3317
3337
3357
3377
3417
3437
3457
3477
3517
3537
3557
3577
3617
3637
3657
3677
3717
3737
3757
3777
3016
3036
3056
3076
3116
3136
3156
3176
3216
3236
3256
3276
3316
3336
3356
3376
3416
3436
3456
3476
3516
3536
3556
3576
3616
3636
3656
3676
3716
3736
3756
3776
3015
3035
3055
3075
3115
3135
3155
3175
3215
3235
3255
3275
3315
3335
3355
3375
3415
3435
3455
3475
3515
3535
3555
3575
3615
3635
3655
3675
3715
3735
3755
3775
3014
3034
3054
3074
3114
3134
3154
3174
3214
3234
3254
3274
3314
3334
3354
3374
3414
3434
3454
3474
3514
3534
3554
3574
3614
3634
3654
3674
3714
3734
3754
3774
3013
3033
3053
3073
3113
3133
3153
3173
3213
3233
3253
3273
3313
3333
3353
3373
3413
3433
3453
3473
3513
3533
3553
3573
3613
3633
3653
3673
3713
3733
3753
3773
3012
3032
3052
3072
3112
3132
3152
3172
3212
3232
3252
3272
3312
3332
3352
3372
3412
3432
3452
3472
3512
3532
3552
3572
3612
3632
3652
3672
3712
3732
3752
3772
3011
3031
3051
3071
3111
3131
3151
3171
3211
3231
3251
3271
3311
3331
3351
3371
3411
3431
3451
3471
3511
3531
3551
3571
3611
3631
3651
3671
3711
3731
3751
3771
3010
3030
3050
3070
3110
3130
3150
3170
3210
3230
3250
3270
3310
3330
3350
3370
3410
3430
3450
3470
3510
3530
3550
3570
3610
3630
3650
3670
3710
3730
3750
3770
3007
3027
3047
3067
3107
3127
3147
3167
3207
3227
3247
3267
3307
3327
3347
3367
3407
3427
3447
3467
3507
3527
3547
3567
3607
3627
3647
3667
3707
3727
3747
3767
3006
3026
3046
3066
3106
3126
3146
3166
3206
3226
3246
3266
3306
3326
3346
3366
3406
3426
3446
3466
3506
3526
3546
3566
3606
3626
3646
3666
3706
3726
3746
3766
3005
3025
3045
3065
3105
3125
3145
3165
3205
3225
3245
3265
3305
3325
3345
3365
3405
3425
3445
3465
3505
3525
3545
3565
3605
3625
3645
3665
3705
3725
3745
3765
3004
3024
3044
3064
3104
3124
3144
3164
3204
3224
3244
3264
3304
3324
3344
3364
3404
3424
3444
3464
3504
3524
3544
3564
3604
3624
3644
3664
3704
3724
3744
3764
3003
3023
3043
3063
3103
3123
3143
3163
3203
3223
3243
3263
3303
3323
3343
3363
3403
3423
3443
3463
3503
3523
3543
3563
3603
3623
3643
3663
3703
3723
3743
3763
3002
3022
3042
3062
3102
3122
3142
3162
3202
3222
3242
3262
3302
3322
3342
3362
3402
3422
3442
3462
3502
3522
3542
3562
3602
3622
3642
3662
3702
3722
3742
3762
3001
3021
3041
3061
3101
3121
3141
3161
3201
3221
3241
3261
3301
3321
3341
3361
3401
3421
3441
3461
3501
3521
3541
3561
3601
3621
3641
3661
3701
3721
3741
3761
3000
3020
3040
3060
3100
3120
3140
3160
3200
3220
3240
3260
3300
3320
3340
3360
3400
3420
3440
3460
3500
3520
3540
3560
3600
3620
3640
3660
3700
3720
3740
3760
3-62
DL205 User Manual, 4th Edition, Rev. C
Address
V40740
V40741
V40742
V40743
V40744
V40745
V40746
V40747
V40750
V40751
V40752
V40753
V40754
V40755
V40756
V40757
V40760
V40761
V40762
V40763
V40764
V40765
V40766
V40767
V40770
V40771
V40772
V40773
V40774
V40775
V40776
V40777
Chapter 3: CPU Specifications and Operations
Stage Control/Status Bit Map
This table provides a listing of the individual Stage control bits associated with each V-memory
address.
DL230/DL240/DL250-1/DL260 Stage (S) Control Bits
MSB
LSB
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
17
037
057
077
117
137
157
177
217
237
257
277
317
337
357
377
16
036
056
076
116
136
156
176
216
236
256
276
316
336
356
376
15
035
055
075
115
135
155
175
215
235
255
275
315
335
355
375
14
034
054
074
114
134
154
174
214
234
254
274
314
334
354
374
13
033
053
073
113
133
153
173
213
233
253
273
313
333
353
373
12
032
052
072
112
132
152
172
212
232
252
272
312
332
352
372
11
031
051
071
111
131
151
171
211
231
251
271
311
331
351
371
10
030
050
070
110
130
150
170
210
230
250
270
310
330
350
370
7
027
047
067
107
127
147
167
207
227
247
267
307
327
347
367
6
026
046
066
106
126
146
166
206
226
246
266
306
326
346
366
5
025
045
065
105
125
145
165
205
225
245
265
305
325
345
365
4
024
044
064
104
124
144
164
204
224
244
264
304
324
344
364
3
023
043
063
103
123
143
163
203
223
243
263
303
323
343
363
2
022
042
062
102
122
142
162
202
222
242
262
302
322
342
362
1
021
041
061
101
121
141
161
201
221
241
261
301
321
341
361
0
020
040
060
100
120
140
160
200
220
240
260
300
320
340
360
MSB
Additional DL240/DL250-1/DL260 Stage (S) Control Bits
Address
LSB
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
417
437
457
477
517
537
557
577
617
637
657
677
717
737
757
777
416
436
456
476
516
536
556
576
616
636
656
676
716
736
756
776
415
435
455
475
515
535
555
575
615
635
655
675
715
735
755
775
414
434
454
474
514
534
554
574
614
634
654
674
714
734
754
774
413
433
453
473
513
533
553
573
613
633
653
673
713
733
753
773
412
432
452
472
512
532
552
572
612
632
652
672
712
732
752
772
411
431
451
471
511
531
551
571
611
631
651
671
711
731
751
771
410
430
450
470
510
530
550
570
610
630
650
670
710
730
750
770
407
427
447
467
507
527
547
567
607
627
647
667
707
727
747
767
406
426
446
466
506
526
546
566
606
626
646
666
706
726
746
766
405
425
445
465
505
525
545
565
605
625
645
665
705
725
745
765
404
424
444
464
504
524
544
564
604
624
644
664
704
724
744
764
403
423
443
463
503
523
543
563
603
623
643
663
703
723
743
763
402
422
442
462
502
522
542
562
602
622
642
662
702
722
742
762
401
421
441
461
501
521
541
561
601
621
641
661
701
721
741
761
400
420
440
460
500
520
540
560
600
620
640
660
700
720
740
760
DL205 User Manual, 4th Edition, Rev. C
V41000
V41001
V41002
V41003
V41004
V41005
V41006
V41007
V41010
V41011
V41012
V41013
V41014
V41015
V41016
V41017
Address
V41020
V41021
V41022
V41023
V41024
V41025
V41026
V41027
V41030
V41031
V41032
V41033
V41034
V41035
V41036
V41037
1
2
3
4
5
6
7
8
9
10
11
12
13
14
A
B
C
D
3-63
Chapter 3: CPU Specifications and Operations
1
2
3
4
5
6
7
8
9
10
11
12
13
14
A
B
C
D
MSB
Additional DL250-1/DL260 Stage (S) Control Bits
LSB
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
1017
1037
1057
1077
1117
1137
1157
1177
1217
1237
1257
1277
1317
1337
1357
1377
1417
1437
1457
1477
1517
1537
1557
1577
1617
1637
1657
1677
1717
1737
1757
1777
1016
1036
1056
1076
1116
1136
1156
1176
1216
1236
1256
1276
1316
1336
1356
1376
1416
1436
1456
1476
1516
1536
1556
1576
1616
1636
1656
1676
1716
1736
1756
1776
1015
1035
1055
1075
1115
1135
1155
1175
1215
1235
1255
1275
1315
1335
1355
1375
1415
1435
1455
1475
1515
1535
1555
1575
1615
1635
1655
1675
1715
1735
1755
1775
1014
1034
1054
1074
1114
1134
1154
1174
1214
1234
1254
1274
1314
1334
1354
1374
1414
1434
1454
1474
1514
1534
1554
1574
1614
1634
1654
1674
1714
1734
1754
1774
1013
1033
1053
1073
1113
1133
1153
1173
1213
1233
1253
1273
1313
1333
1353
1373
1413
1433
1453
1473
1513
1533
1553
1573
1613
1633
1653
1673
1713
1733
1753
1773
1012
1032
1052
1072
1112
1132
1152
1172
1212
1232
1252
1272
1312
1332
1352
1372
1412
1432
1452
1472
1512
1532
1552
1572
1612
1632
1652
1672
1712
1732
1752
1772
1011
1031
1051
1071
1111
1131
1151
1171
1211
1231
1251
1271
1311
1331
1351
1371
1411
1431
1451
1471
1511
1531
1551
1571
1611
1631
1651
1671
1711
1731
1751
1771
1010
1030
1050
1070
1110
1130
1150
1170
1210
1230
1250
1270
1310
1330
1350
1370
1410
1430
1450
1470
1510
1530
1550
1570
1610
1630
1650
1670
1710
1730
1750
1770
1007
1027
1047
1067
1107
1127
1147
1167
1207
1227
1247
1267
1307
1327
1347
1367
1407
1427
1447
1467
1507
1527
1547
1567
1607
1627
1647
1667
1707
1727
1747
1767
1006
1026
1046
1066
1106
1126
1146
1166
1206
1226
1246
1266
1306
1326
1346
1366
1406
1426
1446
1466
1506
1526
1546
1566
1606
1626
1646
1666
1706
1726
1746
1766
1005
1025
1045
1065
1105
1125
1145
1165
1205
1225
1245
1265
1305
1325
1345
1365
1405
1425
1445
1465
1505
1525
1545
1565
1605
1625
1645
1665
1705
1725
1745
1765
1004
1024
1044
1064
1104
1124
1144
1164
1204
1224
1244
1264
1304
1324
1344
1364
1404
1424
1444
1464
1504
1524
1544
1564
1604
1624
1644
1664
1704
1724
1744
1764
1003
1023
1043
1063
1103
1123
1143
1163
1203
1223
1243
1263
1303
1323
1343
1363
1403
1423
1443
1463
1503
1523
1543
1563
1603
1623
1643
1663
1703
1723
1743
1763
1002
1022
1042
1062
1102
1122
1142
1162
1202
1222
1242
1262
1302
1322
1342
1362
1402
1422
1442
1462
1502
1522
1542
1562
1602
1622
1642
1662
1702
1722
1742
1762
1001
1021
1041
1061
1101
1121
1141
1161
1201
1221
1241
1261
1301
1321
1341
1361
1401
1421
1441
1461
1501
1521
1541
1561
1601
1621
1641
1661
1701
1721
1741
1761
1000
1020
1040
1060
1100
1120
1140
1160
1200
1220
1240
1260
1300
1320
1340
1360
1400
1420
1440
1460
1500
1520
1540
1560
1600
1620
1640
1660
1700
1720
1740
1760
3-64
DL205 User Manual, 4th Edition, Rev. C
Address
V41040
V41041
V41042
V41043
V41044
V41045
V41046
V41047
V41050
V41051
V41052
V41053
V41054
V41055
V41056
V41057
V41060
V41061
V41062
V41063
V41064
V41065
V41066
V41067
V41070
V41071
V41072
V41073
V41074
V41075
V41076
V41077
Chapter 3: CPU Specifications and Operations
Timer and Counter Status Bit Maps
This table provides a listing of the individual timer and counter contacts associated with each
V-memory address bit.
MSB
DL230/DL240/DL250-1/DL260 Timer (T) and Counter (CT) Contacts
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
017
037
057
077
016
036
056
076
015
035
055
075
014
034
054
074
013
033
053
073
012
032
052
072
011
031
051
071
010
030
050
070
007
027
047
067
006
026
046
066
005
025
045
065
004
024
044
064
003
023
043
063
002
022
042
062
LSB Timer Counter
0 Address Address
001
021
041
061
V41100
V41101
V41102
V41103
000
020
040
060
V41140
V41141
V41142
V41143
This portion of the table shows additional Timer and Counter contacts available with the
DL240/250–1/260.
MSB
Additional DL240/DL250-1/DL260 Timer (T) and Counter (CT) Contacts
LSB Timer Counter
0 Address Address
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
117
137
157
177
116
136
156
176
115
135
155
175
114
134
154
174
113
133
153
173
112
132
152
172
111
131
151
171
110
130
150
170
107
127
147
167
106
126
146
166
105
125
145
165
104
124
144
164
103
123
143
163
102
122
142
162
101
121
141
161
V41104
V41105
V41106
V41107
100
120
140
160
V41144
V41145
V41146
V41147
This portion of the table shows additional Timer contacts available with the DL250-1 and
DL260.
MSB
Additional DL250-1/DL260 Timer (T) Contacts
LSB
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Timer
Address
217
237
257
277
317
337
357
377
216
236
256
276
316
336
356
376
215
235
255
275
315
335
355
375
214
234
254
274
314
334
354
374
213
233
253
273
313
333
353
373
212
232
252
272
312
332
352
372
211
231
251
271
311
331
351
371
210
230
250
270
310
330
350
370
207
227
247
267
307
327
347
367
206
226
246
266
306
326
346
366
205
225
245
265
305
325
345
365
204
224
244
264
304
324
344
364
203
223
243
263
303
323
343
363
202
222
242
262
302
322
342
362
201
221
241
261
301
321
341
361
200
220
240
260
300
320
340
360
V41110
V41111
V41112
V41113
V41114
V41115
V41116
V41117
This portion of the table shows additional Counter contacts available with the DL260.
MSB
Additional DL260 Counter (CT) Contacts
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
217
237
257
277
317
337
357
377
216
236
256
276
316
336
356
376
215
235
255
275
315
335
355
375
214
234
254
274
314
334
354
374
213
233
253
273
313
333
353
373
212
232
252
272
312
332
352
372
211
231
251
271
311
331
351
371
210
230
250
270
310
330
350
370
207
227
247
267
307
327
347
367
206
226
246
266
306
326
346
366
205
225
245
265
305
325
345
365
204
224
244
264
304
324
344
364
203
223
243
263
303
323
343
363
202
222
242
262
302
322
342
362
201
221
241
261
301
321
341
361
LSB Counter
0 Address
200
220
240
260
300
320
340
360
DL205 User Manual, 4th Edition, Rev. C
V41150
V41151
V41152
V41153
V41154
V41155
V41156
V41157
1
2
3
4
5
6
7
8
9
10
11
12
13
14
A
B
C
D
3-65
Chapter 3: CPU Specifications and Operations
1
2
3
4
5
6
7
8
9
10
11
12
13
14
A
B
C
D
Remote I/O Bit Map
This table provides a listing of the individual remote I/O points associated with each V-memory
address bit.
MSB
DL260 Remote I/O (GX) and (GY) Points
LSB
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
GX
Address
017
037
057
077
117
137
157
177
217
237
257
277
317
337
357
377
417
437
457
477
517
537
557
577
617
637
657
677
717
737
757
777
016
036
056
076
116
136
156
176
216
236
256
276
316
336
356
376
416
436
456
476
516
536
556
576
616
636
656
676
716
736
756
776
015
035
055
075
115
135
155
175
215
235
255
275
315
335
355
375
415
435
455
475
515
535
555
575
615
635
655
675
715
735
755
775
014
034
054
074
114
134
154
174
214
234
254
274
314
334
354
374
414
434
454
474
514
534
554
574
614
634
654
674
714
734
754
774
013
033
053
073
113
133
153
173
213
233
253
273
313
333
353
373
413
433
453
473
513
533
553
573
613
633
653
673
713
733
753
773
012
032
052
072
112
132
152
172
212
232
252
272
312
332
352
372
412
432
452
472
512
532
552
572
612
632
652
672
712
732
752
772
011
031
051
071
111
131
151
171
211
231
251
271
311
331
351
371
411
431
451
471
511
531
551
571
611
631
651
671
711
731
751
771
010
030
050
070
110
130
150
170
210
230
250
270
310
330
350
370
410
430
450
470
510
530
550
570
610
630
650
670
710
730
750
770
007
027
047
067
107
127
147
167
207
227
247
267
307
327
347
367
407
427
447
467
507
527
547
567
607
627
647
667
707
727
747
767
006
026
046
066
106
126
146
166
206
226
246
266
306
326
346
366
406
426
446
466
506
526
546
566
606
626
646
666
706
726
746
766
005
025
045
065
105
125
145
165
205
225
245
265
305
325
345
365
405
425
445
465
505
525
545
565
605
625
645
665
705
725
745
765
004
024
044
064
104
124
144
164
204
224
244
264
304
324
344
364
404
424
444
464
504
524
544
564
604
624
644
664
704
724
744
764
003
023
043
063
103
123
143
163
203
223
243
263
303
323
343
363
403
423
443
463
503
523
543
563
603
623
643
663
703
723
743
763
002
022
042
062
102
122
142
162
202
222
242
262
302
322
342
362
402
422
442
462
502
522
542
562
602
622
642
662
702
722
742
762
001
021
041
061
101
121
141
161
201
221
241
261
301
321
341
361
401
421
441
461
501
521
541
561
601
621
641
661
701
721
741
761
000
020
040
060
100
120
140
160
200
220
240
260
300
320
340
360
400
420
440
460
500
520
540
560
600
620
640
660
700
720
740
760
V40000
V40001
V40002
V40003
V40004
V40005
V40006
V40007
V40010
V40011
V40012
V40013
V40004
V40015
V40016
V40007
V40020
V40021
V40022
V40023
V40024
V40025
V40026
V40027
V40030
V40031
V40032
V40033
V40034
V40035
V40036
V40037
3-66
DL205 User Manual, 4th Edition, Rev. C
GY
Address
V40200
V40201
V40202
V40203
V40204
V40205
V40206
V40207
V40210
V40211
V40212
V40213
V40214
V40215
V40216
V40217
V40220
V40221
V40222
V40223
V40224
V40225
V40226
V40227
V40230
V40231
V40232
V40233
V40234
V40235
V40236
V40237
Chapter 3: CPU Specifications and Operations
MSB
DL260 Remote I/O (GX) and (GY) Points
LSB
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
1017
1037
1057
1077
1117
1137
1157
1177
1217
1237
1257
1277
1317
1337
1357
1377
1417
1437
1457
1477
1517
1537
1557
1577
1617
1637
1657
1677
1717
1737
1757
1777
1016
1036
1056
1076
1116
1136
1156
1176
1216
1236
1256
1276
1316
1336
1356
1376
1416
1436
1456
1476
1516
1536
1556
1576
1616
1636
1656
1676
1716
1736
1756
1776
1015
1035
1055
1075
1115
1135
1155
1175
1215
1235
1255
1275
1315
1335
1355
1375
1415
1435
1455
1475
1515
1535
1555
1575
1615
1635
1655
1675
1715
1735
1755
1775
1014
1034
1054
1074
1114
1134
1154
1174
1214
1234
1254
1274
1314
1334
1354
1374
1414
1434
1454
1474
1514
1534
1554
1574
1614
1634
1654
1674
1714
1734
1754
1774
1013
1033
1053
1073
1113
1133
1153
1173
1213
1233
1253
1273
1313
1333
1353
1373
1413
1433
1453
1473
1513
1533
1553
1573
1613
1633
1653
1673
1713
1733
1753
1773
1012
1032
1052
1072
1112
1132
1152
1172
1212
1232
1252
1272
1312
1332
1352
1372
1412
1432
1452
1472
1512
1532
1552
1572
1612
1632
1652
1672
1712
1732
1752
1772
1011
1031
1051
1071
1111
1131
1151
1171
1211
1231
1251
1271
1311
1331
1351
1371
1411
1431
1451
1471
1511
1531
1551
1571
1611
1631
1651
1671
1711
1731
1751
1771
1010
1030
1050
1070
1110
1130
1150
1170
1210
1230
1250
1270
1310
1330
1350
1370
1410
1430
1450
1470
1510
1530
1550
1570
1610
1630
1650
1670
1710
1730
1750
1770
1007
1027
1047
1067
1107
1127
1147
1167
1207
1227
1247
1267
1307
1327
1347
1367
1407
1427
1447
1467
1507
1527
1547
1567
1607
1627
1647
1667
1707
1727
1747
1767
1006
1026
1046
1066
1106
1126
1146
1166
1206
1226
1246
1266
1306
1326
1346
1366
1406
1426
1446
1466
1506
1526
1546
1566
1606
1626
1646
1666
1706
1726
1746
1766
1005
1025
1045
1065
1105
1125
1145
1165
1205
1225
1245
1265
1305
1325
1345
1365
1405
1425
1445
1465
1505
1525
1545
1565
1605
1625
1645
1665
1705
1725
1745
1765
1004
1024
1044
1064
1104
1124
1144
1164
1204
1224
1244
1264
1304
1324
1344
1364
1404
1424
1444
1464
1504
1524
1544
1564
1604
1624
1644
1664
1704
1724
1744
1764
1003
1023
1043
1063
1103
1123
1143
1163
1203
1223
1243
1263
1303
1323
1343
1363
1403
1423
1443
1463
1503
1523
1543
1563
1603
1623
1643
1663
1703
1723
1743
1763
1002
1022
1042
1062
1102
1122
1142
1162
1202
1222
1242
1262
1302
1322
1342
1362
1402
1422
1442
1462
1502
1522
1542
1562
1602
1622
1642
1662
1702
1722
1742
1762
1001
1021
1041
1061
1101
1121
1141
1161
1201
1221
1241
1261
1301
1321
1341
1361
1401
1421
1441
1461
1501
1521
1541
1561
1601
1621
1641
1661
1701
1721
1741
1761
1000
1020
1040
1060
1100
1120
1140
1160
1200
1220
1240
1260
1300
1320
1340
1360
1400
1420
1440
1460
1500
1520
1540
1560
1600
1620
1640
1660
1700
1720
1740
1760
GX
GY
Address Address
V40040
V40041
V40042
V40043
V40044
V40045
V40046
V40047
V40050
V40051
V40052
V40053
V40054
V40055
V40056
V40057
V40060
V40061
V40062
V40063
V40064
V40065
V40066
V40067
V40070
V40071
V40072
V40073
V40074
V40075
V40076
V40077
DL205 User Manual, 4th Edition, Rev. C
V40240
V40241
V40242
V40243
V40244
V40245
V40246
V40247
V40250
V40251
V40252
V40253
V40254
V40255
V40256
V40257
V40260
V40261
V40262
V40263
V40264
V40265
V40266
V40267
V40270
V40271
V40272
V40273
V40274
V40275
V40276
V40277
1
2
3
4
5
6
7
8
9
10
11
12
13
14
A
B
C
D
3-67
Chapter 3: CPU Specifications and Operations
1
2
3
4
5
6
7
8
9
10
11
12
13
14
A
B
C
D
MSB
DL260 Remote I/O (GX) and (GY) Points
LSB
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
2017
2037
2057
2077
2117
2137
2157
2177
2217
2237
2257
2277
2317
2337
2357
2377
2417
2437
2457
2477
2517
2537
2557
2577
2617
2637
2657
2677
2717
2737
2757
2777
2016
2036
2056
2076
2116
2136
2156
2176
2216
2236
2256
2276
2316
2336
2356
2376
2416
2436
2456
2476
2516
2536
2556
2576
2616
2636
2656
2676
2716
2736
2756
2776
2015
2035
2055
2075
2115
2135
2155
2175
2215
2235
2255
2275
2315
2335
2355
2375
2415
2435
2455
2475
2515
2535
2555
2575
2615
2635
2655
2675
2715
2735
2755
2775
2014
2034
2054
2074
2114
2134
2154
2174
2214
2234
2254
2274
2314
2334
2354
2374
2414
2434
2454
2474
2514
2534
2554
2574
2614
2634
2654
2674
2714
2734
2754
2774
2013
2033
2053
2073
2113
2133
2153
2173
2213
2233
2253
2273
2313
2333
2353
2373
2413
2433
2453
2473
2513
2533
2553
2573
2613
2633
2653
2673
2713
2733
2753
2773
2012
2032
2052
2072
2112
2132
2152
2172
2212
2232
2252
2272
2312
2332
2352
2372
2412
2432
2452
2472
2512
2532
2552
2572
2612
2632
2652
2672
2712
2732
2752
2772
2011
2031
2051
2071
2111
2131
2151
2171
2211
2231
2251
2271
2311
2331
2351
2371
2411
2431
2451
2471
2511
2531
2551
2571
2611
2631
2651
2671
2711
2731
2751
2771
2010
2030
2050
2070
2110
2130
2150
2170
2210
2230
2250
2270
2310
2330
2350
2370
2410
2430
2450
2470
2510
2530
2550
2570
2610
2630
2650
2670
2710
2730
2750
2770
2007
2027
2047
2067
2107
2127
2147
2167
2207
2227
2247
2267
2307
2327
2347
2367
2407
2427
2447
2467
2507
2527
2547
2567
2607
2627
2647
2667
2707
2727
2747
2767
2006
2026
2046
2066
2106
2126
2146
2166
2206
2226
2246
2266
2306
2326
2346
2366
2406
2426
2446
2466
2506
2526
2546
2566
2606
2626
2646
2666
2706
2726
2736
2766
2005
2025
2045
2065
2105
2125
2145
2165
2205
2225
2245
2265
2305
2325
2345
2365
2405
2425
2445
2465
2505
2525
2545
2565
2605
2625
2645
2665
2705
2725
2735
2765
2004
2024
2044
2064
2104
2124
2144
2164
2204
2224
2244
2264
2304
2324
2344
2364
2404
2424
2444
2464
2504
2524
2544
2564
2604
2624
2644
2664
2704
2724
2734
2764
2003
2023
2043
2063
2103
2123
2143
2163
2203
2223
2243
2263
2303
2323
2343
2363
2403
2423
2443
2463
2503
2523
2543
2563
2603
2623
2643
2663
2703
2723
2733
2763
2002
2022
2042
2062
2102
2122
2142
2162
2202
2222
2242
2262
2302
2322
2342
2362
2402
2422
2442
2462
2502
2522
2542
2562
2602
2622
2642
2662
2702
2722
2732
2762
2001
2021
2041
2061
2101
2121
2141
2161
2201
2221
2241
2261
2301
2321
2341
2361
2401
2421
2441
2461
2501
2521
2541
2561
2601
2621
2641
2661
2701
2721
2731
2761
2000
2020
2040
2060
2100
2120
2140
2160
2200
2220
2240
2260
2300
2320
2340
2360
2400
2420
2440
2460
2500
2520
2540
2560
2600
2620
2640
2660
2700
2720
2730
2760
3-68
DL205 User Manual, 4th Edition, Rev. C
GX
GY
Address Address
V40100
V40101
V40102
V40103
V40104
V40105
V40106
V40107
V40110
V40111
V40112
V40113
V40114
V40115
V40116
V40117
V40120
V40121
V40122
V40123
V40124
V40125
V40126
V40127
V40130
V40131
V40132
V40133
V40134
V40135
V40136
V40137
V40300
V40301
V40302
V40303
V40304
V40305
V40306
V40307
V40310
V40311
V40312
V40313
V40314
V40315
V40316
V40317
V40320
V40321
V40322
V40323
V40324
V40325
V40326
V40327
V40330
V40331
V40332
V40333
V40334
V40335
V40336
V40337
Chapter 3: CPU Specifications and Operations
MSB
DL260 Remote I/O (GX) and (GY) Points
LSB
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
3017
3037
3057
3077
3117
3137
3157
3177
3217
3237
3257
3277
3317
3337
3357
3377
3417
3437
3457
3477
3517
3537
3557
3577
3617
3637
3657
3677
3717
3737
3757
3777
3016
3036
3056
3076
3116
3136
3156
3176
3216
3236
3256
3276
3316
3336
3356
3376
3416
3436
3456
3476
3516
3536
3556
3576
3616
3636
3656
3676
3716
3736
3756
3776
3015
3035
3055
3075
3115
3135
3155
3175
3215
3235
3255
3275
3315
3335
3355
3375
3415
3435
3455
3475
3515
3535
3555
3575
3615
3635
3655
3675
3715
3735
3755
3775
3014
3034
3054
3074
3114
3134
3154
3174
3214
3234
3254
3274
3314
3334
3354
3374
3414
3434
3454
3474
3514
3534
3554
3574
3614
3634
3654
3674
3714
3734
3754
3774
3013
3033
3053
3073
3113
3133
3153
3173
3213
3233
3253
3273
3313
3333
3353
3373
3413
3433
3453
3473
3513
3533
3553
3573
3613
3633
3653
3673
3713
3733
3753
3773
3012
3032
3052
3072
3112
3132
3152
3172
3212
3232
3252
3272
3312
3332
3352
3372
3412
3432
3452
3472
3512
3532
3552
3572
3612
3632
3652
3672
3712
3732
3752
3772
3011
3031
3051
3071
3111
3131
3151
3171
3211
3231
3251
3271
3311
3331
3351
3371
3411
3431
3451
3471
3511
3531
3551
3571
3611
3631
3651
3671
3711
3731
3751
3771
3010
3030
3050
3070
3110
3130
3150
3170
3210
3230
3250
3270
3310
3330
3350
3370
3410
3430
3450
3470
3510
3530
3550
3570
3610
3630
3650
3670
3710
3730
3750
3770
3007
3027
3047
3067
3107
3127
3147
3167
3207
3227
3247
3267
3307
3327
3347
3367
3407
3427
3447
3467
3507
3527
3547
3567
3607
3627
3647
3667
3707
3727
3747
3767
3006
3026
3046
3066
3106
3126
3146
3166
3206
3226
3246
3266
3306
3326
3346
3366
3406
3426
3446
3466
3506
3526
3546
3566
3606
3626
3646
3666
3706
3726
3746
3766
3005
3025
3045
3065
3105
3125
3145
3165
3205
3225
3245
3265
3305
3325
3345
3365
3405
3425
3445
3465
3505
3525
3545
3565
3605
3625
3645
3665
3705
3725
3745
3765
3004
3024
3044
3064
3104
3124
3144
3164
3204
3224
3244
3264
3304
3324
3344
3364
3404
3424
3444
3464
3504
3524
3544
3564
3604
3624
3644
3664
3704
3724
3744
3764
3003
3023
3043
3063
3103
3123
3143
3163
3203
3223
3243
3263
3303
3323
3343
3363
3403
3423
3443
3463
3503
3523
3543
3563
3603
3623
3643
3663
3703
3723
3743
3763
3002
3022
3042
3062
3102
3122
3142
3162
3202
3222
3242
3262
3302
3322
3342
3362
3402
3422
3442
3462
3502
3522
3542
3562
3602
3622
3642
3662
3702
3722
3742
3762
3001
3021
3041
3061
3101
3121
3141
3161
3201
3221
3241
3261
3301
3321
3341
3361
3401
3421
3441
3461
3501
3521
3541
3561
3601
3621
3641
3661
3701
3721
3741
3761
3000
3020
3040
3060
3100
3120
3140
3160
3200
3220
3240
3260
3300
3320
3340
3360
3400
3420
3440
3460
3500
3520
3540
3560
3600
3620
3640
3660
3700
3720
3740
3760
GX
GY
Address Address
V40140
V40141
V40142
V40143
V40144
V40145
V40146
V40147
V40150
V40151
V40152
V40153
V40154
V40155
V40156
V40157
V40160
V40161
V40162
V40163
V40164
V40165
V40166
V40167
V40170
V40171
V40172
V40173
V40174
V40175
V40176
V40177
DL205 User Manual, 4th Edition, Rev. C
V40340
V40341
V40342
V40343
V40344
V40345
V40346
V40347
V40350
V40351
V40352
V40353
V40354
V40355
V40356
V40357
V40360
V40361
V40362
V40363
V40364
V40365
V40366
V40367
V40370
V40371
V40372
V40373
V40374
V40375
V40376
V40377
1
2
3
4
5
6
7
8
9
10
11
12
13
14
A
B
C
D
3-69
Chapter 3: CPU Specifications and Operations
1
2
3
4
5
6
7
8
9
10
11
12
13
14
A
B
C
D
3-70
Notes
DL205 User Manual, 4th Edition, Rev. C
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