Self-Contained Audio Preamplifier SSM2017

Self-Contained Audio Preamplifier SSM2017
a
Self-Contained
Audio Preamplifier
SSM2017
FEATURES
Excellent Noise Performance: 950 pV/√Hz or 1.5 dB
Noise Figure
Ultralow THD: < 0.01% @ G = 100 Over the Full Audio
Band
Wide Bandwidth: 1 MHz @ G = 100
High Slew Rate: 17 V/ms typ
Unity Gain Stable
True Differential Inputs
Subaudio 1/f Noise Corner
8-Pin Mini-DIP with Only One External Component
Required
Very Low Cost
Extended Temperature Range: –408C to +858C
OBS
APPLICATIONS
Audio Mix Consoles
Intercom/Paging Systems
Two-Way Radio
Sonar
Digital Audio Systems
GENERAL DESCRIPTION
FUNCTIONAL BLOCK DIAGRAM
V+
SSM2017
V–
+IN
X1
–IN
5kΩ
RG1
X1
5kΩ
RG2
OLE
The SSM2017 is a latest generation audio preamplifier combining SSM preamplifier design expertise with advanced processing. The result is excellent audio performance from a selfcontained 8-pin mini-DIP device, requiring only one external
gain set resistor or potentiometer. The SSM2017 is further enhanced by its unity gain stability.
Key specifications include ultralow noise (1.5 dB noise figure)
and THD (<0.01% at G = 100), complemented by wide bandwidth and high slew rate.
Applications for this low cost device include microphone preamplifiers and bus summing amplifiers in professional and consumer audio equipment, sonar, and other applications requiring
a low noise instrumentation amplifier with high gain capability.
5kΩ
5kΩ
OUT
5kΩ
5kΩ
REFERENCE
V–
PIN CONNECTIONS
TE
Epoxy Mini-DIP (P Suffix)
RG1 1
–IN 2
+IN 3
V– 4
8
RG2
SSM2017
7
V+
TOP VIEW
(Not to Scale)
6
OUT
5
REFERENCE
16-Pin Wide Body SOL (S Suffix)
NC
1
16
NC
RG1
2
15
RG2
NC
3
14
NC
–IN
4
13
V+
12
NC
SSM2017
TOP VIEW
TOP
VIEW
(Not
to Scale)
(Not to Scale)
+IN
5
NC
6
11
OUT
V–
7
10
REFERENCE
NC
8
9
NC
NC = NO CONNECT
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
(V = 615 V and –408C ≤ T ≤ +858C, unless otherwise noted. Typical speciSSM2017–SPECIFICATIONS fications
apply at T = +258C.)
S
A
A
Parameter
Symbol
Conditions
THD+N
TA = +25°C
VO = 7 V rms
RL = 5 kΩ
G = 1000, f = 1 kHz
G = 100, f = 1 kHz
G = 10, f = 1 kHz
G = 1, f = 1 kHz
0.012
0.005
0.004
0.008
%
%
%
%
f = 1 kHz, G = 1000
f = 1 kHz; G = 100
f = 1 kHz; G = 10
f = 1 kHz; G = 1
f = 1 kHz, G = 1000
0.95
1.95
11.83
107.14
2
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
pA/√Hz
17
V/µs
200
1000
2000
4000
kHz
kHz
kHz
kHz
0.1
1.2
6
25
± 0.002 ± 2.5
mV
µA
µA
112
92
74
54
54
dB
dB
dB
dB
dB
124
118
101
82
dB
dB
dB
dB
V
MΩ
MΩ
MΩ
MΩ
DISTORTION PERFORMANCE
Total Harmonic Distortion Plus Noise
NOISE PERFORMANCE
Input Referred Voltage Noise Density
Input Current Noise Density
en
in
OBS
DYNAMIC RESPONSE
Slew Rate
Small Signal Bandwidth
INPUT
Input Offset Voltage
Input Bias Current
Input Offset Current
Common-Mode Rejection
Power Supply Rejection
Input Voltage Range
Input Resistance
OUTPUT
Output Voltage Swing
Output Offset Voltage
Minimum Resistive Load Drive
Maximum Capacitive Load Drive
Short Circuit Current Limit
Output Short Circuit Duration
GAIN
Gain Accuracy
Maximum Gain
SR
BW–3 dB
VIOS
IB
Ios
CMR
G = 10
RL = 4.7 kΩ
CL = 50 pF
TA = +25°C
G = 1000
G = 100
G = 10
G=1
Min
10
OLE
PSR
IVR
RIN
VCM = 0 V
VCM = 0 V
VCM = ± 8 V
G = 1000
G = 100
G = 10
G = 1, TA = +25°C
G = 1, TA = – 40°C to +85°C
VS = ± 6 V to ± 18 V
G = 1000
G = 100
G = 10
G=1
80
60
40
26
20
80
60
40
26
±8
VO
VOOS
RL = 2 kΩ; TA = +25°C
1
30
5.3
7.1
± 11.0
TA = +25°C
TA = –40°C to +85°C
ISC
Max
Output-to-Ground Short
± 12.3
–40
2
4.7
50
± 50
500
10
RG =
10 kΩ
G–1
TA = +25°C
RG = 10 Ω, G = 1000
RG = 101 Ω, G = 100
RG = 1.1 kΩ, G = 10
RG = `, G = 1
0.25
0.20
0.20
0.05
70
G
1
1
1
0.5
10
±8
1
VS
ISY
VCM = 0 V, RL = `
±6
Units
TE
Differential, G = 1000
G=1
Common Mode, G = 1000
G=1
REFERENCE INPUT
Input Resistance
Voltage Range
Gain to Output
POWER SUPPLY
Supply Voltage Range
Supply Current
Typ
± 10.6
V
mV
kΩ
kΩ
pF
mA
sec
dB
dB
dB
dB
dB
kΩ
V
V/V
± 22
± 14.0
V
mA
Specifications subject to change without notice.
–2–
REV. B
SSM2017
Typical Performance Characteristics
OBS
OLE
Figure 1. Typical THD+Noise* at G = 1, 10, 100, 1000;
VO = 7 VRMS, VS = ± 15 V, RL = 5 kΩ; TA = +25°C
*80 kHz low-pass filter used for Figures 1-2.
Figure 2. Typical THD+ Noise * at G = 2, 10, 100, 1000;
VO = 10 VRMS, VS = ± 18 V, RL = 5 kΩ; TA = +25°C
TE
ABSOLUTE MAXIMUM RATINGS
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 22 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . Supply Voltage
Output Short Circuit Duration . . . . . . . . . . . . . . . . . . . 10 sec
Storage Temperature Range (P, Z Packages) –65°C to +150°C
Junction Temperature (TJ) . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300°C
Operating Temperature Range . . . . . . . . . . . . –40°C to +85°C
Thermal Resistance*
8-Pin Hermetic DIP (Z): θJA = 134; θJC = 12 . . . . . . °C/W
8-Pin Plastic DIP (P): θJA = 96; θJC = 37 . . . . . . . . . . °C/W
16-Pin SOIC (S): θJA = 92; θJC = 27 . . . . . . . . . . . . . °C/W
ORDERING GUIDE
Model
Temperature
Range*
Package
Description
Package
Option
SSM2017P
SSM2017S
SSM2017S-REEL
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
8-Pin Plastic DIP
16-Lead SOL
16-Lead SOL
N-8
R-16
R-16
*XIND = –40°C to +85°C.
*θJA is specified for worst case mounting conditions, i.e., θJA is specified for device
in socket for cerdip and plastic DIP; θJA is specified for device soldered to printed
circuit board for SOL package.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the SSM2017 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
REV. B
–3–
WARNING!
ESD SENSITIVE DEVICE
SSM2017
OBS
Figure 3. Voltage Noise Density vs.
Frequency
Figure 4. RTI Voltage Noise Density
vs. Gain
Figure 5. Output Impedance vs.
Frequency
OLE
TE
Figure 6. Maximum Output Swing
vs. Frequency
Figure 7. Maximum Output Voltage
vs. Load Resistance
Figure 8. Input Voltage Range vs.
Supply Voltage
Figure 9. Output Voltage Range vs.
Supply Voltage
Figure 10. CMRR vs. Frequency
Figure 11. +PSRR vs. Frequency
–4–
REV. B
SSM2017
OBS
Figure 12. –PSRR vs. Frequency
Figure 13. VIOS vs. Temperature
Figure 14. VIOS vs. Supply Voltage
OLE
Figure 15. VOOS vs. Temperature
Figure 16. VOOS vs. Supply Voltage
TE
Figure 18. IB vs. Supply Voltage
Figure 19. ISY vs. Temperature
Figure 20. ISY vs.Supply Voltage
REV. B
–5–
Figure 17. IB vs. Temperature
SSM2017
OBS
G=
V OUT


=  10 kV +1
(+In) – (In)
R
 G 
Figure 21. Bandwidth of the SSM2017 for Various Values
of Gain
Basic Circuit Connections
GAIN
NOISE PERFORMANCE
OLE
The SSM2017 is a very low noise audio preamplifier exhibiting
a typical voltage noise density of only 1 nV/√Hz at 1 kHz. The
exceptionally low noise characteristics of the SSM2017 are in
part achieved by operating the input transistors at high collector
currents since the voltage noise is inversely proportional to the
square root of the collector current. Current noise, however, is
directly proportional to the square root of the collector current.
As a result, the outstanding voltage noise performance of the
SSM2017 is obtained at the expense of current noise performance. At low preamplifier gains, the effect of the SSM2017’s
voltage and current noise is insignificant.
The SSM2017 only requires a single external resistor to set the
voltage gain. The voltage gain, G, is:
G=
10 kΩ
+1
RG
and
RG =
10 kΩ
G –1
TE
For convenience, Table I lists various values of RG for common
gain levels.
The total noise of an audio preamplifier channel can be calculate by:
Table I. Values of RG for Various Gain Levels
AV
dB
RG
1
3.2
10
31.3
100
314
1000
0
10
20
30
40
50
60
NC
4.7k
1.1k
330
100
32
10
En =
en 2 +(in RS )2 + et 2
where:
En = total input referred noise
en = amplifier voltage noise
in = amplifier current noise
RS = source resistance
et = source resistance thermal noise.
For a microphone preamplifier, using a typical microphone impedance of 150 Ω the total input referred noise is:
The voltage gain can range from 1 to 3500. A gain set resistor is
not required for unity gain applications. Metal-film or wirewound resistors are recommended for best results.
en = 1 nV/√Hz @ 1 kHz, SSM2017 en
in = 2 pA/√Hz @ 1 kHz, SSM2017 in
The total gain accuracy of the SSM2017 is determined by the
tolerance of the external gain set resistor, RG, combined with the
gain equation accuracy of the SSM2017. Total gain drift combines the mismatch of the external gain set resistor drift with
that of the internal resistors (20 ppm/°C typ).
et = 1.6 nV/√Hz @ 1 kHz, microphone thermal noise
Bandwidth of the SSM2017 is relatively independent of gain as
shown in Figure 21. For a voltage gain of 1000, the SSM2017
has a small-signal bandwidth of 200 kHz. At unity gain, the
bandwidth of the SSM2017 exceeds 4 MHz.
This total noise is extremely low and makes the SSM2017
virtually transparent to the user.
RS = 150 Ω, microphone source impedance
En =√(1 nV√Hz)2 + 2 (pA/√Hz × 150 Ω)2 + (1.6 nV/√Hz)2
= 1.93 nV/√Hz @ 1 kHz.
–6–
REV. B
SSM2017
INPUTS
The SSM2017 has protection diodes across the base emitter
junctions of the input transistors. These prevent accidental avalanche breakdown which could seriously degrade noise performance. Additional clamp diodes are also provided to prevent the
inputs from being forced too far beyond the supplies.
REFERENCE TERMINAL
OBS
a. Single Ended
b. Pseudo Differential
Although the SSM2017’s inputs are fully floating, care must be
exercised to ensure that both inputs have a dc bias connection
capable of maintaining them within the input common-mode
range. The usual method of achieving this is to ground one side
of the transducer as in Figure 22a, but an alternative way is to
float the transducer and use two resistors to set the bias point as
in Figure 22b. The value of these resistors can be up to 10 kΩ,
but they should be kept as small as possible to limit commonmode pickup. Noise contribution by resistors themselves is negligible since it is attenuated by the transducer’s impedance. Balanced transducers give the best noise immunity and interface
directly as in Figure 22c.
The output signal is specified with respect to the reference terminal, which is normally connected to analog ground. The reference may also be used for offset correction or level shifting. A
reference source resistance will reduce the common-mode rejection by the ratio of 5 kΩ/RREF. If the reference source resistance is 1 Ω, then the CMR will be reduced to 74 dB (5 kΩ/1 Ω
= 74 dB).
OLE
COMMON-MODE REJECTION
Ideally, a microphone preamplifier responds only to the difference between the two input signals and rejects common-mode
voltages and noise. In practice, there is a small change in output
voltage when both inputs experience the same common-mode
voltage change; the ratio of these voltages is called the commonmode gain. Common-mode rejection (CMR) is the logarithm of
the ratio of differential-mode gain to common-mode gain,
expressed in dB.
PHANTOM POWERING
TE
A typical phantom microphone powering circuit is shown in
Figure 23. Z1 through Z4 provide transient overvoltage protection for the SSM2017 whenever microphones are plugged in or
unplugged.
c. True Differential
Figure 22. Three Ways of Interfacing Transducers for High
Noise Immunity
Figure 23. SSM2017 in Phantom Powered Microphone Circuit
REV. B
–7–
SSM2017
BUS SUMMING AMPLIFIER
In addition to is use as a microphone preamplifier, the SSM2017
can be used as a very low noise summing amplifier. Such a circuit is particularly useful when many medium impedance outputs are summed together to produce a high effective noise gain.
C1534–24–4/91
The principle of the summing amplifier is to ground the
SSM2017 inputs. Under these conditions, Pins 1 and 8 are ac
virtual grounds sitting about 0.55 V below ground.
To remove the 0.55 V offset, the circuit of Figure 24 is
recommended.
A2 forms a “servo” amplifier feeding the SSM2017’s inputs.
This places Pins l and 8 at a true dc virtual ground. R4 in conjunction with C2 remove the voltage noise of A2, and in fact just
about any operational amplifier will work well here since it is removed from the signal path. If the dc offset at Pins l and 8 is not
too critical, then the servo loop can be replaced by the diode biasing scheme of Figure 24. If ac coupling is used throughout,
then Pins 2 and 3 may be directly grounded.
OBS
Figure 24. Bus Summing Amplifier
OLE
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
TE
8-Pin Hermetic DIP (Z) Package
16-Pin SOIC (S) Package
PRINTED IN U.S.A.
8-Pin Plastic DIP (P) Package
–8–
REV. B
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