CBI-467101WB

CBI-467101WB
USER’S MANUAL
CBI-467101WB
RS-485(422) HDLC
Communications Card
(multidrop)
RS-485(422)
Transfer rate
4 Mbps (max.)
1 channel
1 MB
transmit/receive
memory
Half-duplex control
Hardware control
Transmission length
1000 m (max.)
External clock
function
original
HDLC
controller
www.interface.co.jp
Notes to Users
The specifications of the product are under continuous improvement and while every effort is made to keep this
manual up-to-date, we reserve the right to update the contents of this user’s manual without prior notice. Therefore,
you should thoroughly read this user’s manual even if you have often purchased this product before.
Using this product requires technical knowledge of hardware and software.
Use this product only under the specified conditions such as power supply, voltage, temperature, and humidity range.
Interface Corporation’s products are not designed with components intended to ensure a level of reliability suitable for
use under conditions that might cause serious injury or death.
Please consult our Technical Support Center if you intend to use our products for special purpose, such as use for
moving vehicles, medical treatment, aerospace engineering, controlling nuclear power, submerged translators and so
on. This product is made under strict quality management, however, when using this product for the purposes that
may result in any damages, lost profits, or any other incidental or consequential damages resulting from breakdown of
this product, the user is required to take adequate and appropriate measures, such as installing safety devices to avoid
possible serious accidents.
Conventions Used in This Manual
This icon denotes a warning, which advises you of precautions to take to avoid
injury, data loss, or system crash.
This icon denotes a note, caution, or warning.
Indemnification
Interface Corporation makes no warranties regarding damages resulting from installation or use of this product,
whether hardware or software, and the user assumes all risk.
Interface Corporation shall not be liable for any incidental or consequential damages, including damages or other
costs resulting from defects which might be contained in the product, product supply delay or product failure, even
if advised of the possibility thereof. Customer’s right to recover damages caused by fault or negligence on the part
of Interface Corporation shall be limited to the amount paid by the customer for that product.
This product including its software may be used only in Japan. Interface Corporation cannot be responsible for the
use of this product outside Japan. Interface Corporation does not provide technical support service outside Japan.
Warranty
Interface Corporation products are warranted for a period of either one year or two years from the date of shipment, as
evidenced by receipts or other documentation. This warranty does not apply to the software products and expendable
supplies such as batteries.
Note: You can determine the warranty period at our Web site by the serial number of your product. Those without
Internet access should contact the Sales Information Center.
During the warranty period Interface Corporation will, as a general rule, replace or recondition the defective product
without charge, in which case the user will be required to pay the shipping costs, except as set forth below.
The Warranty provided herein does not cover expendable supplies such as batteries and damages, defects,
malfunctions, or failures caused by impact during transportation while under owner’s responsibility; owner’s failure to
follow the instructions and the precautions contained in this manual; modification and/or repair of the product by other
than Interface Corporation, trouble caused by use with peripherals not specified by Interface Corporation, power
failure or surges, fire, earthquake, tidal wave and/or flood.
This warranty applies only when the product is used in Japan.
Interface Corporation warrants its repairs for six months, and will again repair the same defective part without
additional charge provide the product is economically repairable. In that case, the user should attach a copy of the
most recent repair report to the repair request form. If no repair report is attached, it will be considered as a new repair
request.
Before You Export Interface Products
The foreign exchange and foreign trade law of Japan controls the export of this product, due to its possible use as a STRATEGIC
MATERIAL. Therefore, before you export this product, you must secure an export permit from the Ministry of Economy, Trade and
Industry of Japan.
CBI-467101WB
Revision History
Version
1.0
Date
March 2005
Comments
User’s manual MCA-E467101WB published.
Due to constant product improvements, the information in this user’s manual is subject to change without prior
notice.
-1-
Interface Corporation
CBI-467101WB
Chapter 1
-ContentsIntroduction............................................................................... 3
1.1 Summary............................................................................................................................... 3
1.1.1 Features ................................................................................................................. 3
Chapter 2
Signal Definitions...................................................................... 5
2.1 Cable Connector Pin Assignments ....................................................................................... 5
2.1.1 Signals ................................................................................................................... 5
2.2 Equivalent Circuits ................................................................................................................ 6
2.2.1 RS-485 (422) Interface (CN1) ................................................................................ 6
2.2.2 Signal Termination ................................................................................................. 7
2.2.3 RS-485 Multi-Drop Connections............................................................................. 8
Chapter 3 Specifications ......................................................................... 10
3.1 Hardware Specifications ..................................................................................................... 10
3.2 Electric Characteristics ....................................................................................................... 11
3.2.1 Absolute Maximum Rating ................................................................................... 11
3.2.2 DC Specifications................................................................................................. 11
3.2.3 Surge Protection Voltage ..................................................................................... 11
3.3 Circuit Diagram ................................................................................................................... 11
3.4 Bit Rate Configuration......................................................................................................... 12
3.5 Interval Timer ...................................................................................................................... 13
3.6 Idle Detection ...................................................................................................................... 13
3.7 Half-Duplex Transmission and Multi-Drop Network ............................................................ 13
3.8 Control Signal Interrupt ....................................................................................................... 13
3.9 HDLC Controller Interrupt ................................................................................................... 13
3.10 Transmit/Receive Clock .................................................................................................... 14
3.11 Buffer Overflow/Buffer Overrun......................................................................................... 14
Chapter 4
External Connections ............................................................. 15
4.1 Example Connections ......................................................................................................... 15
4.1.1 Full-Duplex Transmissions ................................................................................... 15
4.1.2 Half-Duplex Transmissions .................................................................................. 17
Chapter 5
Installation .............................................................................. 22
5.1 Card Installation .................................................................................................................. 22
5.2 Driver Software Installation ................................................................................................. 22
5.3 Card Uninstallation.............................................................................................................. 22
5.4 Multiple CardBus Cards ...................................................................................................... 23
Chapter 6 Glossary ................................................................................. 24
6.1 List of Definitions................................................................................................................. 24
Chapter 7
Notes for Users ...................................................................... 25
7.1 Caution, Periodic Inspections, and Storage ........................................................................ 25
Chapter 8
Troubleshooting...................................................................... 27
8.1 Checkpoints ........................................................................................................................ 27
Interface Corporation
-2-
CBI-467101WB
Chapter 1 Introduction
1.1 Summary
The CBI-467101WB is composed of a CardBus card and cable. The CBI-467101WB, an HDLC interface card for
CardBus systems, provides one communications channel. It also achieves HDLC communications through an EIA
RS-422 (TIA/EIA-422) or RS-485 (TIA/EIA-485) physical interface. This card is compliant with PC Card
Standard Release 8.0. Moreover, it provides high-speed serial communications. The maximum bit rate is 4 Mbps.
A branch cable adapter included with the CBI-467101WB easily achieves multi-drop connections.
<Connection Diagram>
CBI-467101WB
CardBus
card
External
equipment
Cable
Packing List
Item
† CardBus Card
† Cable
Part Number
CBI-467101
JKC-4171B
Qty.
1
1
1.1.1 Features
1. HDLC protocol (one channel)
The CBI-467101WB provides the following functions using HDLC protocol.
• Transmits arbitrary data frame length.
• Controls an error by FCS (Frame Check Sequence).
• Receives an error frame and confirms frame contents.
2. Transmit/receive buffer memory
The CBI-467101WB incorporates 1 MB SRAM. This easily performs handshaking and also prevents data loss
when receiving data.
3. Bit rate
You can transmit/receive data synchronously with the external clock. (The maximum bit rate is 4 Mbps.)
Moreover, 32 MHz and 36.864 MHz oscillators are incorporated. So, you can transmint/receive data without
an external clock as follows.
Bit Rate Line
Bit Rate
9600 bps
2.4576 Mbps (only transmission), … , 307.2 kbps (only transmission), 153.6 kbps, … ,
9600 bps, …
28.8 kbps
3.6864 Mbps (only transmission), … , 921.6 kbps (only transmission), 460.8 kbps, … ,
28.8 kbps, …
48 kbps
3.072 Mbps (only transmission), 1.536 Mbps (only transmission), 768 kbps, …, 48 kbps, …
64 kbps
2.048 Mbps (only transmission), … , 512 kbps (only transmission), 256 kbps, … , 64 kbps, …
1 Mbps
4 Mbps (only transmission), 2 Mbps, 1 Mbps, 500 kbps, …
-3-
Interface Corporation
CBI-467101WB
4. Interrupt sources
The CBI-467101WB can generate an interrupt to the computer with the following sources.
• Service requests from the HDLC controller
• Status change of I signal
• Interval timer/counter
• Idle detection
• Buffer overflow, buffer overrun
5. Built-in timer/counter
The CBI-467101WB has a timer/counter circuit that can be used as an interval timer. A software selectable
clock period of 10 µs, 100 µs, 1 ms, 10 ms, and 100 ms and a software programmable frequency divisor in the
range of 1 through 15 are supported. The output of the built-in timer/counter circuit can be used as an interrupt
source.
6. Idle detection
An interrupt can be requested when the idle line status is detected. When the idle line is in the mark state
(non-communications state) for over the specified time, an interrupt will be requested. This function can
confirm if the cable is disconnected or not.
7. Half-duplex transmission and multi-drop network
The CBI-467101WB supports half-duplex transmission and multi-drop network. In this case, you can connect
up to 32 terminals. The hardware controls the switch of half-duplex transmission. This improves
communications efficiency.
8. Surge suppressors
The CBI-467101WB incorporates surge suppressors to protect signal lines from voltage surges. The
protection voltage range is -15 kV to +15 kV.
Interface Corporation
-4-
CBI-467101WB
Chapter 2 Signal Definitions
2.1 Cable Connector Pin Assignments
The CBI-467101WB cable adapter can connect an on-card connector and 15-pin D-sub cable. The pin assignment
is as follows.
Note: The same pins of CN1 and CN2 are connected inside the branch cable. For half-duplex connections, use
either CN1 or CN2.
Screw: M3
<CN1, CN2>
NC
T(A)
C(A)
R(A)
I(A)
RT(A)
ST(A)
SG
1
2
3
4
5
6
7
8
T(B)
C(B)
R(B)
I(B)
RT(B)
9
10
11
12
13
14
15
ST(B)
NC
NC: Not connected
Connector catalog number: 17JE-13150-02(D2B) (DDK Ltd.) or equivalent
2.1.1 Signals
Signal Description
Pin Number
Signal
1
NC
2
T(A)
3
C(A)
4
R(A)
5
I(A)
6
RT(A)
7
ST(A)
8
SG
9
T(B)
10
C(B)
11
R(B)
12
I(B)
13
RT(B)
14
ST(B)
15
NC
Direction

Output
Input
Input/Output

Output
Input
Input/Output

Description

Transmit (A)
Control (A)
Receive (A)
Indication (A)
Receiver signal element timing (A)
Transmitter signal element timing (A)
Ground
Transmit (B)
Control (B)
Receive (B)
Indication (B)
Receiver signal element timing (B)
Transmitter signal element timing (B)

Note: Connect the attached cable only with the CBI-467101WB.
-5-
Interface Corporation
CBI-467101WB
2.2 Equivalent Circuits
2.2.1 RS-485 (422) Interface (CN1)
• Output signals: C, ST, T
Communications controller
OUTPUT (B)
OUTPUT (A)
R
MAX3491
110 Ω
Photo-MOS relay
R
Control circuit
• Input signals: I, R, RT, ST
33 kΩ
R
Communications controller
4.7 kΩ
INPUT (B)
R
4.7 kΩ
INPUT (A)
R
MAX3491
33 kΩ
R
R
110 Ω
Photo-MOS relay
R
Control circuit
! Never connect CN1and CN2 to any signals other than RS-422 and RS-485 standard.
! Do not apply voltages including surges less than -7 V or greater than +12 V to any of the input or
output pins.
! The direction of the ST signal is software programmable: input or output.
! Polarity Consideration
Line A: Inverted (-)
Line B: Non-Inverted (+)
When you connect cables, make sure that the polarity is correct.
B
Output signal
A
RS-485 (422) driver
+
+
-
RS-485 (422) receiver
Output signal
A
B
Input signal
Interface Corporation
Input signal
-6-
CBI-467101WB
2.2.2 Signal Termination
The signal termination is software programmable. The photo-MOS relay sets the terminators. Refer to the
following table about the termination of transmit/receive signals.
Signal
Power Supply (On)
Power Supply (Off)
I, R, RT (receive signals)
Connected (Default setting)
Unconnected
C, ST, T (transmit signals)
Unconnected (Default setting)
• Multi-drop network
! Do not set the power supply of the CBI-467101WB while other terminals are communicating in the
same network by multi-drop connection. The power supply of the CBI-467101WB indicates the
following.
- The power supply of the host computer.
- Insert or remove of the CBI-467101WB.
- Uninstall of the CBI-467101WB by operating system.
*
R
R
R
Terminal A
HDLC RS-485
CardBus card
Terminal B
Terminal C
HDLC RS-485
HDLC RS-485
CardBus card
<Multi-drop network>
Note: * Communications may not be properly performed by turning off the CBI-467101WB if the
network is terminated.
-7-
Interface Corporation
CBI-467101WB
2.2.3 RS-485 Multi-Drop Connections
The RS-485 resembles RS-422 except that associated drivers are three-state not dual-state. Transmission length
and bit rates are the same as RS-422. The RS-485 supports multi-point connections: one driver to 31 receivers
(max.). The following figures show multi-drop connections.
You can transmit data from an arbitrary single driver to arbitrary receivers in the multi-drop connections. One or
more drivers/receivers can share the same serial bus.
R
Terminating
resistor
R
Serial bus
Receiver
Driver
(a) Multi-drop connection
The data will come to collision if two or more drivers are activated at the same time.
(b) Avoiding data collision
R
R
You have to terminate the both ends of the serial bus by using the characteristic impedance, so the driver requires
two times of the driverbility.
R = Characteristic impedance
(c) Load consideration
Interface Corporation
-8-
CBI-467101WB
<Electrical Specifications of RS-485>
The following table shows the differences between RS-422 and RS-485.
Parameter
RS-422
RS-485
Driver output current
(at OFF state)
Terminator impedance
Receiver input impedance
Number of drivers/receivers
Not specified
+/-100 µA (max.)
100 Ω
4 kΩ (min.)
1 driver, 10 receivers
54 Ω
12 kΩ (min.)
32 drivers, 32 receivers
The RS-485 has the following three features:
• 3-state output for the driver
• High input impedance of receivers
• High current-drive*
Note: * The third feature is effective for various use including multi-drop connections. For example,
the RS-422 cannot drive the coaxial cable (50 Ω/75 Ω), but the RS-485 can drive it.
-9-
Interface Corporation
CBI-467101WB
Chapter 3 Specifications
3.1 Hardware Specifications
Parameter
Number of channels
Communications standards
Isolation
Control signals
Base clock frequencies
Bit rates
Maximum bit rate
HDLC controller
Full-duplex transmission/
Half-duplex transmission
Interrupt sources
Transmit/receive buffer memory
Number of slots required
Maximum cable length
Memory size
Power consumption
Bus requirements
Card size
Acceptable cable connector
Environmental conditions
Interface Corporation
Specification
1
RS-485(TIA/EIA-485) standard, RS-422(TIA/EIA-422) standard
No-isolation
C, I, R, RT, ST, T
36.864 MHz, 32 MHz
488.3 bps to 4 Mbps (Internal clock receiving: 488.3 bps to 2 Mbps)
4 Mbps
original
Software programmable
6 sources: buffer overflow, buffer overrun, HDLC status, idle,
I signal, and interval timer
1 Mbyte
1 slot
1000 m
1 Mbyte + 32 bytes
+3.3 Vdc (+/-0.3 V): 0.35 A (typ.)
PC Card Standards-Based CardBus
PCMCIA/JEITA Type II
CN1, CN2: 15-pin D-sub male connector (attached cable connection)
Operating temperature: 0 °C to 50 °C
Relative humidity: 20% to 90% (non-condensing)
-10-
CBI-467101WB
3.2 Electric Characteristics
This chapter shows the electric characteristics of the CBI-467101WB.
3.2.1 Absolute Maximum Rating
Item
Input voltage
Differential input potential difference
Equation*

x (A) - x (B)
Min.
-7.5 V
-6.0 V
Max.
+12.5 V
+6.0 V
Equation*
Min.
Max.
| x (A) - x (B) |
+1.5 V

x (A) - x (B)
-0.2 V
+0.2 V
3.2.2 DC Specifications
Item
Differential output potential
difference
Differential input threshold voltage
Condition
Resistance is 54 Ω.
( x (A) = x (B))
Input voltage is not specified.
(-0.2 V to +0.2 V)
Note: * x indicates any of the following external signals: C, I, R, RT, ST, T.
3.2.3 Surge Protection Voltage
Item
Surge protection voltage
Min.
-15 kV
-8 kV
-15 kV
Max.
+15 kV
+8 kV
+15 kV
Condition
Human body model
Contact discharge
Air gap discharge
3.3 Circuit Diagram
The same pins of CN1 and CN2 are connected inside the branch cable.
FPGA
RS-485 (422)
transceiver,
terminating
resistor circuit
Register access
Reset
HDLC
controller
Memory bus
-11-
CN1
Reset
Communications
backup circuit
CN2
CardBus bridge circuit,
control circuit
CardBus
Register access
Base clock
PC card connector, branch cable
Interrupt
SRAM
Interface Corporation
CBI-467101WB
3.4 Bit Rate Configuration
The following equation shows the relationship between the transmit bit rate (TxBitRate), base clock frequency
(BaseClk), and clock divisor (TxDivisor).
BaseClk
TxDivisor =
TxBitRate
With the following constraints:
• TxDivisor is an integer such that for 1 < Divisor < 65535.
• BaseClk can be one of two possible values: 36.864 MHz and 32 MHz.
• TxBitRate is a bit rate in bps.
The following equation shows the relationship between the receive bit rate (RxBitRate), base clock frequency
(BaseClk), and clock divisor (RxDivisor) when using DPLL.
BaseClk
RxDivisor =
RxBitRate × 16
With the following constraints:
• RxDivisor is an integer such that for 1 < Divisor < 65535.
• BaseClk can be one of two possible values: 36.864 MHz and 32 MHz.
• RxBitRate is a bit rate in bps.
Example) For a bit rate of 9600 bps with DPLL, a solution exists for BaseClk = 36.864 MHz.
TxDivisor =
RxDivisor =
36.864 MHz
9600 bps
36.864 MHz
(9600 bps × 16)
= 3840
= 240
The transmit clock divisor is 3840. The receive clock divisor is 240.
Note: When receiving a frame continuing “0” in NRZ mode, the DPLL will not be used and then garbled data will
be found. When using the DPLL, set the NRZI mode.
! Bit Rates
Please keep in mind that there are some bit rates which are not configured by the CBI-467101WB when
using the internal clock (DPLL). The following table shows bit rates which are configured by our
products. Also, it shows bit rates which are configured or not configured by the CBI-467101WB.
Bit Rate
Line
9600 bps
28.8 kbps
48 kbps
64 kbps
1 Mbps
Interface Corporation
Configured Bit Rate by Our Products
Not Configured
Configured
1228.8 kbps, 614.4 kbps, 307.2 kbps
153.6 kbps, 76.8 kbps…, 9600 bps…
921.6 kbps
460.6 kbps…, 28.8 kbps, 14.4 kbps…
768 kbps…, 48 kbps, 24 kbps…

1024 kbps, 512 kbps
256 kbps, 128 kbps, 64 kbps…
2 Mbps, 1 Mbps, 500 kbps…

-12-
CBI-467101WB
3.5 Interval Timer
The interval timer can be used to generate an interrupt to the host computer every timer cycle. The timer cycle
period is given by the following equation:
T = RATE × CLK.
T: Timer cycle period
RATE: 1 through 15
CLK: 10 µs, 100 µs, 1 ms, 10 ms, 100 ms
This timer begins counting immediately after both RATE and CLK are programmed, and it will keep counting until
a stop instruction is issued.
3.6 Idle Detection
An interrupt can be generated by the idle detection when the specified time receive line is in the mark state
(non-communications state). After an interrupt occurs, the idle detection will be in waiting state and will not
generate an interrupt. The detection period can be specified between 1 µs and approximately 16.7 s. (by 1 µs)
3.7 Half-Duplex Transmission and Multi-Drop Network
To improve communications efficiency by multi-drop network, the CBI-467101WB supports the transmit/receive
switch by hardware. The delay time can be switched to the frame transmit or frame transmit/receive. The delay
time is given by the following equation:
Delay time = Bit time × Bit count.
Bit time: 1 bit time (s) (= 1/bit rate)
Bit count: 1 through 255
3.8 Control Signal Interrupt
An interrupt can be generated by the I signal status change. An I signal interrupt will be cleared by any of the
following conditions:
• Reset
• Read of the interrupt status register
• Interrupt release
3.9 HDLC Controller Interrupt
An interrupt can be generated by the HDLC controller. An HDLC controller interrupt will be cleared by any of the
following conditions:
• Reset
• Read of the interrupt status register
• Interrupt release
-13-
Interface Corporation
CBI-467101WB
3.10 Transmit/Receive Clock
The following table shows selectable clocks by the receive clock (RX clock) or transmit clock (TX clock).
Internal clock for receive
Receive Clock (RX Clock)
External clock for receive (RT signal)
Internal clock for transmit
Transmit Clock (TX Clock)
External clock for transmit (ST signal)
External clock for receive (RT signal)
Internal clock for receive
1
0
QD
Receive data
(R signal)
<
Transmit clock
(TX clock)
Transmit data
DQ
2
0
1
>
Transmit data
(T signal)
External clock output for
transmit (ST signal output)
Internal clock for transmit
External clock input for
transmit (ST signal input)
3.11 Buffer Overflow/Buffer Overrun
An interrupt can be generated when a buffer overflow or buffer overrun occurs. A buffer overflow or buffer
overrun will be cleared by any of the following conditions:
• Reset
• Read of the interrupt status register
• Interrupt release
Interface Corporation
-14-
RS-485 (422) driver
HDLC controller
Receive clock
(RX clock)
Receive data
External clock for receive
(RT signal)
1
0
CBI-467101WB
Chapter 4 External Connections
4.1 Example Connections
The table below shows example connections of RS-485. Please keep in mind that there are more RX clock and TX
clock settings than the following examples. Moreover, the following may only be applicable to some of the RX
clock and TX clock settings.
Setting
Primary Station
Secondary Station
Type*
Clock
Internal Clock External Clock Internal Clock External Clock
1
TX
Connected
Connected


Connected
Connected
RX


2
TX
Connected

RX
Connected

3
TX
Connected
Connected
RX


4
TX
Connected

Connected
RX

Notes:
• * Refer to “4.1.1 Full-Duplex Transmissions,” page 15, about type 1 through type 4.
• For half-duplex connections, use either CN1 or CN2.
4.1.1 Full-Duplex Transmissions
<Type 1>
z External Receive Clock Configuration (Crossover Transmit/Receive Clock)
On the primary station, use the transmit timing signal of the secondary station for the receive clock. On the
secondary station, use the transmit timing signal of the primary station for the receive clock. On both stations,
use the internal clocks for the transmit clocks.
Primary station
Signal
Signal
T(A)
C(A)
R(A)
I(A)
RT(A)
ST(A)
SG
T(B)
C(B)
R(B)
I(B)
RT(B)
ST(B)
T(A)
C(A)
R(A)
I(A)
RT(A)
ST(A)
SG
T(B)
C(B)
R(B)
I(B)
RT(B)
ST(B)
Secondary station
-15-
Interface Corporation
CBI-467101WB
<Type 2>
z Independent Receive Clock Configuration
On both stations, use DPLL to generate receive clocks and use the internal clocks for transmit clocks.
Primary station
Signal
Signal
T(A)
C(A)
R(A)
I(A)
RT(A)
ST(A)
SG
T(B)
C(B)
R(B)
I(B)
RT(B)
ST(B)
T(A)
C(A)
R(A)
I(A)
RT(A)
ST(A)
SG
T(B)
C(B)
R(B)
I(B)
RT(B)
Secondary station
ST(B)
<Type 3>
z Single Transmit/Receive Clock Configuration (1)
On the primary station, use the internal clock for transmit clock and use the transmit timing signal for the receive
clock (loop-back). On the secondary station, use the transmit timing signal of the primary station for the transmit
and receive clocks.
Primary station
Signal
Signal
T(A)
C(A)
R(A)
I(A)
RT(A)
ST(A)
SG
T(B)
C(B)
R(B)
I(B)
RT(B)
ST(B)
T(A)
C(A)
R(A)
I(A)
RT(A)
ST(A)
SG
T(B)
C(B)
R(B)
I(B)
RT(B)
ST(B)
Secondary station
<Type 4>
z Single Transmit/Receive Clock Configuration (2)
On the primary station, use the internal clock for the transmit clock. On the secondary station, use the transmit
timing signal of the primary station for the transmit clock. On both stations, use DPLL to generate receive clock.
Primary station
Signal
Signal
T(A)
C(A)
R(A)
I(A)
RT(A)
ST(A)
SG
T(B)
C(B)
R(B)
T(A)
C(A)
R(A)
I(A)
RT(A)
ST(A)
SG
T(B)
C(B)
R(B)
I(B)
RT(B)
ST(B)
I(B)
RT(B)
ST(B)
Secondary station
Note: In any cases, connect the C and I signals as required. The connections in this section are examples, so refer to
the manual of the equipment you use.
Interface Corporation
-16-
CBI-467101WB
4.1.2 Half-Duplex Transmissions
z External Receive Clock Configuration (1) (Common Clock Line)
On the receiving station, use the transmit timing signal of the transmitting station for the receive clocks. On the
transmitting station, use the internal clocks for the transmit clocks.
Primary station
Signal
Signal
SG
T(A)
R(A)
I(A)
C(A)
T(B)
R(B)
I(B)
SG
T(A)
R(A)
I(A)
C(A)
T(B)
R(B)
I(B)
C(B)
ST(A)
RT(A)
ST(B)
RT(B)
C(B)
ST(A)
RT(A)
ST(B)
RT(B)
Secondary station 1
Signal
SG
T(A)
R(A)
I(A)
C(A)
T(B)
R(B)
I(B)
C(B)
ST(A)
RT(A)
ST(B)
RT(B)
Secondary station 2
Signal
SG
T(A)
R(A)
I(A)
C(A)
T(B)
R(B)
I(B)
C(B)
ST(A)
RT(A)
ST(B)
RT(B)
Secondary station n (< 31)
-17-
Interface Corporation
CBI-467101WB
z External Receive Clock Configuration (2) (Crossover Transmit/Receive Clock)
On the primary station, use the transmit timing signals of the secondary stations for the receive clock. On the
secondary stations, use the transmit timing signal of the primary station for the receive clocks. On both stations,
use the internal clocks for the transmit clocks.
Primary station
Signal
Signal
SG
T(A)
R(A)
I(A)
C(A)
T(B)
R(B)
I(B)
C(B)
ST(A)
RT(A)
ST(B)
RT(B)
SG
T(A)
R(A)
I(A)
C(A)
T(B)
R(B)
I(B)
C(B)
ST(A)
Secondary station 1
RT(A)
ST(B)
RT(B)
Signal
SG
T(A)
R(A)
I(A)
C(A)
T(B)
R(B)
I(B)
C(B)
ST(A)
RT(A)
ST(B)
RT(B)
Secondary station 2
Signal
SG
T(A)
R(A)
I(A)
C(A)
T(B)
R(B)
I(B)
C(B)
ST(A)
RT(A)
ST(B)
RT(B)
Interface Corporation
-18-
Secondary station n (< 31)
CBI-467101WB
z Independent Receive Clock Configuration (1)
On both stations, use DPLL to generate receive clocks and use the internal clocks for transmit clocks.
Primary station
Signal
Signal
SG
T(A)
R(A)
I(A)
C(A)
T(B)
R(B)
I(B)
C(B)
ST(A)
RT(A)
ST(B)
RT(B)
SG
T(A)
R(A)
I(A)
C(A)
T(B)
R(B)
I(B)
C(B)
ST(A)
RT(A)
ST(B)
RT(B)
Secondary station 1
Signal
SG
T(A)
R(A)
I(A)
C(A)
T(B)
R(B)
I(B)
C(B)
ST(A)
RT(A)
ST(B)
RT(B)
Secondary station 2
Signal
SG
T(A)
R(A)
I(A)
C(A)
T(B)
R(B)
I(B)
C(B)
ST(A)
RT(A)
ST(B)
RT(B)
Secondary station n (< 31)
-19-
Interface Corporation
CBI-467101WB
z Independent Receive Clock Configuration (2)
On both stations, use DPLL to generate receive clocks and use the internal clocks for transmit clocks.
Primary station
Signal
Signal
SG
T(A)
R(A)
I(A)
C(A)
T(B)
R(B)
I(B)
C(B)
ST(A)
RT(A)
ST(B)
RT(B)
SG
T(A)
R(A)
I(A)
C(A)
T(B)
R(B)
I(B)
C(B)
ST(A)
RT(A)
ST(B)
RT(B)
Secondary station 1
Signal
SG
T(A)
R(A)
I(A)
C(A)
T(B)
R(B)
I(B)
C(B)
ST(A)
RT(A)
ST(B)
RT(B)
Secondary station 2
Signal
SG
T(A)
R(A)
I(A)
C(A)
T(B)
R(B)
I(B)
C(B)
ST(A)
RT(A)
ST(B)
RT(B)
Interface Corporation
-20-
Secondary station n (< 31)
CBI-467101WB
z Single Transmit/Receive Clock Configuration
On the primary station, use the internal clock for transmit clock and use the transmit timing signal for the receive
clock (loop-back). On the secondary station, use the transmit timing signal of the primary station for the transmit
and receive clocks.
Primary station
Signal
Signal
SG
T(A)
R(A)
I(A)
C(A)
T(B)
R(B)
I(B)
C(B)
ST(A)
RT(A)
ST(B)
RT(B)
SG
T(A)
R(A)
I(A)
C(A)
T(B)
R(B)
I(B)
C(B)
ST(A)
RT(A)
Secondary station 1
ST(B)
RT(B)
Signal
SG
T(A)
R(A)
I(A)
C(A)
T(B)
R(B)
I(B)
C(B)
ST(A)
RT(A)
ST(B)
RT(B)
Secondary station 2
Signal
SG
T(A)
R(A)
I(A)
C(A)
T(B)
R(B)
I(B)
C(B)
ST(A)
RT(A)
Secondary station n (< 31)
ST(B)
RT(B)
Note: The connections in this section are examples, so refer to the manual of the equipment you use.
-21-
Interface Corporation
CBI-467101WB
Chapter 5 Installation
BE SURE TO ELIMINATE STATIC ELECTRICITY OF YOUR BODY BEFORE YOU INSTALL OR
REMOVE THIS PRODUCT.
5.1 Card Installation
When you install this product in your system, read the manual of your system which refers to the PC card slot.
1. Make sure that the system is turned off and the power cable is unplugged.
(This card corresponds to Hot Swap. You can insert this card when the system turns on.)
2. Insert the card into the PC card slot in your system.
3. Plug in the power cord, and turn on the system.
! Be careful of the insert direction when you insert this product into your system to avoid system damage.
! The attached cable may interfere with the card cable connector for the adjacent slot or computer because
of the connector form of the attached cable. The figure below shows an example.
Attached cable connector
PC card
Another cable connector
Computer
5.2 Driver Software Installation
Refer to our Web site for the Help of each optional software when you install and use it.
5.3 Card Uninstallation
The method of removing PC card from your system differs depending on each system. Please read the manual of
your system.
! Do not remove this product when accessing to the external equipment. Your system may not operate
correctly.
Interface Corporation
-22-
CBI-467101WB
5.4 Multiple CardBus Cards
When using multiple cards in one system, it is required to write the CardBus ID number to the ROM in the card.
The CardBus ID configuration utility program in the software can configure the number. Refer to Help files for
more details.
Notes:
• Write the configured CardBus ID number on the back side of each card to easily confirm the number.
• Please download and use the newest version about software.
The following example shows the CardBus ID number is “0.”
Color seal
0
Back side of the card
-23-
Interface Corporation
CBI-467101WB
Chapter 6 Glossary
6.1 List of Definitions
The list below explains a selection of technical terms used in this manual.
Term
Definition
HDLC
HDLC is an acronym for High-level Data Link Control. HDLC provides
arbitrary bit pattern transmission and also achieves high-reliability
transmission at high speed. HDLC is mainly used for data communications
between computers or communications which require high-reliability.
RS-232C
An asynchronous serial data communications standard. The RS-232C
allows a single instrument to be connected with a computer or device. The
maximum communications distance is 15 m.
RS-422
RS-422 is an upgraded interface of RS-232C. RS-422 enables
bi-directional communications. Communications speed and distance are
much greater than RS-232C. RS-422 is highly reliable and can connect
multiple devices. The maximum communications distance is
approximately 1000 m.
RS-485
RS-485 is an upgraded interface of RS-232C. RS-485 enables
bi-directional communications. Communications speed and distance are
much greater than RS-232C. RS-485 is highly reliable and can connect
multiple devices. The maximum communications distance is
approximately 1000 m.
Base clock
A standard clock frequency during data transmission.
Terminating resistor
The resistor used in order to minimize reflection of an electric signal, also
called a terminator.
Serial communications
A communications method of transferring data between computers and
peripheral devices one bit at a time. The RS-232C is serial
communications standard.
Full-duplex
A communications channel which transmits/receives data in both
directions at a time.
Half-duplex
A communications channel which transmits/receives data in either
direction, but only one direction at a time.
Bit rate
A data rate expressed in bits per second. This is similar to baud rate but the
latter is more applicable to channels with more than two states.
Multi-drop
Arbitrary data transmission can be achieved by connecting multiple drivers
and receivers to one cable.
Interface Corporation
-24-
CBI-467101WB
Chapter 7 Notes for Users
For your safety, follow all warnings and instructions described in this manual.
7.1 Caution, Periodic Inspections, and Storage
Failure to follow this warning may result in electric shock, burns, serious injury, and in some cases, even cause
death.
! Warning!
z Keep this product away from flammable gases.
Use this product only under the conditions as shown below.
Environmental Specifications
Parameter
Specification
Temperature Range
0 °C to 50 °C
Relative Humidity Range 20% to 90% (non-condensing)
Dust
Typical office environment
Corrosive Gas
None
Noise
Keep this card away from power source such as motors as
far as possible to avoid electromagnetic interference.
Voltage Requirements
CardBus specification: +3.3 Vdc (+/-0.3 V)
The following inspections should be carried out on this card periodically.
Periodic Inspections
Item
Cable Connections
Connector Contacts
Checkpoint
Be sure that all connectors and cables are installed correctly.
Check for dirt or corrosion.
-25-
Interface Corporation
CBI-467101WB
TO AVOID DAMAGE TO THE CARD AND POSSIBLE INJURY, TAKE APPROPRIATE
PRECAUTIONS AS DESCRIBED BELOW WHEN HANDLING IT.
Caution!
! The card should be stored exactly the same way as when it was received. Proceed as follows:
1. Put the card back in its PC card case.
2. Wrap the PC card case with the original packing material.
3. Avoid excessive humidity.
4. Do not expose the card to the direct rays of the sun.
5. Store the card at room temperature.
! Do not modify the card. Interface Corporation assumes no liability for any malfunctions resulting
from users’ unauthorized modification of the card.
! Take measures to avoid and minimize shock, vibration, magnetic fields, and static electricity in the
storage or operating environment of this card.
! Make sure that the card is disconnected from the cable before inserting or removing any cards.
! Please keep the attached cable in a horizontal position for approximately 10 cm from the card
connection part as below, and fix it not to move, even if stress starts. The connector may be
damaged, if the 10N (approximately 1 kgf) or more loads are added its connection part.
CBI-467101WB
Fixed
Attached cable
Approximately 10 cm
computer
Interface Corporation
-26-
CBI-467101WB
Chapter 8 Troubleshooting
8.1 Checkpoints
Problem
Data cannot be transferred
correctly.
The computer does not
respond after Standby mode.
(Input and output are disabled.)
Communications are not
reliable. A transmit/receive
error occurs.
The computer does not
recognize this card.
Solution
Double-check all cable connections.
If the pins are connected incorrectly, the data cannot be transferred.
Make sure that there are no incorrect connections.
If the communications parameters for transmitter and receiver are not
the same values, the data cannot be correctly transferred. Configure
them to be the same.
To use the multiple CardBus cards, configure the CardBus ID number
by using the CardBus ID utility program. In case multiple Interface
CardBus cards of the same type are installed in the same system, the
ID number on each Interface CardBus card is used to uniquely
identify each card.
If the power requirements exceed the system power budget, the
circuits on the card or connected external circuits cannot be powered
properly. Prepare an external power supply for your CardBus card.
Set the System standby setting to “Never.”
Check whether the selected terminating resistor is suitable for your
system.
Use the PCI device viewer (BPF-0801) to examine the CardBus card
on your computer. Please send the result to our Technical Support
Center by fax or e-mail. The PCI device viewer may be downloaded
from our Web site free of charge.
-27-
Interface Corporation
CBI-467101WB
-IndexHDLC.................................................. 3, 10, 13, 24
HDLC protocol......................................................3
A
Acceptable cable connector ................................ 10
I
B
Idle detection....................................................4, 13
Interrupt
Interrupt source................................................10
Interval timer......................................................4
Base clock...................................................... 10, 24
Bit rate..................................................3, 10, 12, 24
C
M
Card installation .................................................. 22
Card uninstallation .............................................. 22
Multi-drop ..................................................4, 13, 24
Multiple CardBus cards.......................................23
D
P
DPLL .......................................................16, 19, 20
Driver software installation................................. 22
PCI device viewer................................................27
R
E
RS-232C...............................................................24
RS-422..................................................................24
RS-485..............................................................3, 24
Environmental specifications ............................. 25
F
S
Full-duplex .......................................................... 24
Full-duplex transmission..................................... 10
Serial communications ........................................24
Signal description ..................................................5
Surge suppressor....................................................4
H
Half-duplex.......................................................... 24
Half-duplex transmission.......................... 4, 10, 13
Interface Corporation
-28-
For Assistance:
If you would like to inquire our products, please contact below.
E-mail
URL
support@interface.co.jp
www.interface.co.jp/support/
Repair and Maintenance:
We provide repair and maintenance service for your damaged product. If you need this service, please refer to
“Repair and Maintenance” of a user’s manual of Japanese version and follow the procedures for repair and
maintenance applications.
PLEASE NOTE: We do not accept the repair for the product which is not used in Japan. If you use our products in
other countries, please contact the store where you purchased them.
You can download a user’s manual of Japanese version from our Web site below.
URL: www.interface.co.jp
Visit our Web site (www.interface.co.jp) for:
Various services listed below are provided on our Web site.
Product Information The latest information about our products; specifications, product selection guides, etc
Technical Support
Online questions and answers, rental service, frequently asked questions, and glossary
Sales
Mail order, distributors list
Downloads Service User’s manual, software, and tutorial
The design and contents of the Web site are under constant review. Therefore, there might be some changes in its
design and contents.
is a trademark of Interface Corporation (under application).
is a collective mark of Japan Electronics and Information Technology Industries Association (JEITA).
Other product and company names are trademarks, registered trademarks, or servicemarks of their respective
owners.
 2005 Interface Corporation
All rights reserved. No part of this publication may be reproduced or altered in any form or by any means without the
written permission of Interface Corporation.
MCA-E467101WB Ver. 1.0 Vol. 1/1
Was this manual useful for you? yes no
Thank you for your participation!

* Your assessment is very important for improving the work of artificial intelligence, which forms the content of this project

Download PDF

advertising