Programmable Controllers Theory and Implementation

Programmable Controllers Theory and Implementation

Programmable Controllers

Theory and Implementation

Second Edition

L.A. Bryan

E.A. Bryan

PROGRAMMABLE

CONTROLLERS

T

HEORY AND

I

MPLEMENTATION

Second Edition

L. A. Bryan

E. A. Bryan

An Industrial Text Company Publication

Atlanta • Georgia • USA

© 1988, 1997 by Industrial Text Company

Published by Industrial Text Company

All rights reserved

First edition 1988. Second edition 1997

Printed and bound in the United States of America

03 02 01 00 99 98 97 10 9 8 7 6 5 4 3 2

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Reproduction or translation of any part of this work beyond that permitted by Sections 107 and 108 of the 1976 United

States Copyright act are unlawful.

Requests for permission, accompanying workbooks, or further information should be addressed to:

Industrial Text and Video Company

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L ibrary of Congress Cataloging-in-Publication Data

Bryan, L.A.

Programmable controllers: theory and implementation/L.A. Bryan,

E.A. Bryan.—2nd ed.

p. cm.

Includes index.

ISBN 0-944107-32-X

1. Programmable controllers. I. Bryan, E.A. II. Title.

TJ223.P76B795 1997

629.8'9—dc21 96-49350

CIP

Due to the nature of this publication and because of the different applications of programmable controllers, the readers or users and those responsible for applying the information herein contained must satisfy themselves to the acceptability of each application and the use of equipment therein mentioned. In no event shall the publisher and others involved in this publication be liable for direct, indirect, or consequential damages resulting from the use of any technique or equipment herein mentioned.

The illustrations, charts, and examples in this book are intended solely to illustrate the methods used in each application example. The publisher and others involved in this publication cannot assume responsibility or liability for actual use based on the illustrative uses and applications.

No patent liability is assumed with respect to use of information, circuits, illustrations, equipment, or software described in this text.

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Contents

C

ONTENTS

Preface ..................................................................................................... ix

About the Authors .................................................................................... x

How to Use this Book ............................................................................. xi

S

ECTION

1 I

NTRODUCTORY

C

ONCEPTS

Chapter 1 Introduction to Programmable Controllers

1-1 Definition ................................................................................................. 4

1-2 A Historical Background .......................................................................... 5

1-3 Principles of Operation ........................................................................... 10

1-4 PLCs Versus Other Types of Controls ................................................... 13

1-5 PLC Product Application Ranges .......................................................... 22

1-6 Ladder Diagrams and the PLC ............................................................... 24

1-7 Advantages of PLCs ............................................................................... 26

Chapter 2 Number Systems and Codes

2-1 Number Systems .................................................................................... 34

2-2 Number Conversions .............................................................................. 41

2-3 One’s and Two’s Complement ............................................................... 43

2-4 Binary Codes .......................................................................................... 46

2-5 Register Word Formats .......................................................................... 50

Chapter 3 Logic Concepts

3-1 The Binary Concept ............................................................................... 56

3-2 Logic Functions ...................................................................................... 57

3-3 Principles of Boolean Algebra and Logic .............................................. 64

3-4 PLC Circuits and Logic Contact Symbology ......................................... 68

S

ECTION

2 C

OMPONENTS AND

S

YSTEMS

Chapter 4 Processors, the Power Supply, and Programming Devices

4-1 Introduction ............................................................................................ 82

4-2 Processors ............................................................................................... 84

4-3 Processor Scan ........................................................................................ 86

4-4 Error Checking and Diagnostics ............................................................ 92

4-5 The System Power Supply ..................................................................... 98

4-6 Programming Devices .......................................................................... 104

Chapter 5 The Memory System and I/O Interaction

5-1 Memory Overview ............................................................................... 110

5-2 Memory Types ..................................................................................... 111

5-3 Memory Structure and Capacity .......................................................... 115

5-4 Memory Organization and I/O Interaction ........................................... 119

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Contents

5-5 Configuring the PLC Memory—I/O Addressing ................................. 127

5-6 Summary of Memory, Scanning, and I/O Interaction .......................... 132

5-7 Memory Considerations ....................................................................... 133

Chapter 6 The Discrete Input/Output System

6-1 Introduction to Discrete I/O Systems ................................................... 138

6-2 I/O Rack Enclosures and Table Mapping ............................................ 139

6-3 Remote I/O Systems ............................................................................. 146

6-4 PLC Instructions for Discrete Inputs .................................................... 147

6-5 Types of Discrete Inputs ...................................................................... 150

6-6 PLC Instructions for Discrete Outputs ................................................. 162

6-7 Discrete Outputs ................................................................................... 165

6-8 Discrete Bypass/Control Stations ......................................................... 177

6-9 Interpreting I/O Specifications ............................................................. 178

6-10 Summary of Discrete I/O ..................................................................... 182

Chapter 7 The Analog Input/Output System

7-1 Overview of Analog Input Signals ....................................................... 186

7-2 Instructions for Analog Input Modules ................................................ 187

7-3 Analog Input Data Representation ....................................................... 189

7-4 Analog Input Data Handling ................................................................ 196

7-5 Analog Input Connections .................................................................... 199

7-6 Overview of Analog Output Signals .................................................... 201

7-7 Instructions for Analog Output Modules ............................................. 201

7-8 Analog Output Data Representation .................................................... 203

7-9 Analog Output Data Handling .............................................................. 207

7-10 Analog Output Connections ................................................................. 213

7-11 Analog Output Bypass/Control Stations .............................................. 214

Chapter 8 Special Function I/O and Serial Communication Interfacing

8-1 Introduction to Special I/O Modules .................................................... 218

8-2 Special Discrete Interfaces ................................................................... 220

8-3 Special Analog, Temperature, and PID Interfaces ............................... 224

8-4 Positioning Interfaces ........................................................................... 233

8-5 ASCII, Computer, and Network Interfaces .......................................... 248

8-6 Fuzzy Logic Interfaces ......................................................................... 255

8-7 Peripheral Interfacing ........................................................................... 260

S

ECTION

3 PLC P

ROGRAMMING

Chapter 9 Programming Languages

9-1 Introduction to Programming Languages ............................................. 276

9-2 Types of PLC Languages ..................................................................... 276

9-3 Ladder Diagram Format ....................................................................... 282

9-4 Ladder Relay Instructions .................................................................... 289

9-5 Ladder Relay Programming ................................................................. 298

9-6 Timers and Counters ............................................................................ 306

9-7 Timer Instructions ................................................................................ 308

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Contents

9-8 Counter Instructions ............................................................................. 312

9-9 Program/Flow Control Instructions ...................................................... 317

9-10 Arithmetic Instructions ......................................................................... 322

9-11 Data Manipulation Instructions ............................................................ 334

9-12 Data Transfer Instructions .................................................................... 348

9-13 Special Function Instructions ............................................................... 358

9-14 Network Communication Instructions ................................................. 363

9-15 Boolean Mnemonics ............................................................................. 369

Chapter 10 The IEC 1131 Standard and Programming Language

10-1 Introduction to the IEC 1131 ................................................................ 374

10-2 IEC 1131-3 Programming Languages .................................................. 380

10-3 Sequential Function Chart Programming ............................................. 403

10-4 Types of Step Actions .......................................................................... 419

10-5 IEC 1131-3 Software Systems ............................................................. 429

10-6 Summary .............................................................................................. 439

Chapter 11 System Programming and Implementation

11-1 Control Task Definition ....................................................................... 444

11-2 Control Strategy ................................................................................... 444

11-3 Implementation Guidelines .................................................................. 445

11-4 Programming Organization and Implementation ................................. 446

11-5 Discrete I/O Control Programming ...................................................... 465

11-6 Analog I/O Control Programming ........................................................ 492

11-7 Short Programming Examples ............................................................. 521

Chapter 12 PLC System Documentation

12-1 Introduction to Documentation ............................................................ 536

12-2 Steps for Documentation ...................................................................... 537

12-3 PLC Documentation Systems ............................................................... 547

12-4 Conclusion ............................................................................................ 549

S

ECTION

4 PLC P

ROCESS

A

PPLICATIONS

Chapter 13 Data Measurements and Transducers

13-1 Basic Measurement Concepts .............................................................. 554

13-2 Interpreting Errors in Measurements .................................................... 560

13-3 Transducer Measurements .................................................................... 565

13-4 Thermal Transducers ............................................................................ 572

13-5 Displacement Transducers ................................................................... 586

13-6 Pressure Transducers ............................................................................ 588

13-7 Flow Transducers ................................................................................. 591

13-8 Vibration Transducers .......................................................................... 599

13-9 Summary .............................................................................................. 608

Chapter 14 Process Responses and Transfer Functions

14-1 Process Control Basics ......................................................................... 610

14-2 Control System Parameters .................................................................. 614

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Contents

14-3 Process Dynamics ................................................................................ 623

14-4 Laplace Transform Basics .................................................................... 632

14-5 Dead Time Responses in Laplace Form ............................................... 644

14-6 Lag Responses in Laplace Form .......................................................... 645

14-7 Types of Second-Order Responses ...................................................... 653

14-8 Summary .............................................................................................. 665

Chapter 15 Process Controllers and Loop Tuning

15-1 Introduction .......................................................................................... 670

15-2 Controller Actions ................................................................................ 671

15-3 Discrete-Mode Controllers ................................................................... 676

15-4 Continuous-Mode Controllers .............................................................. 690

15-5 Proportional Controllers (P Mode) ....................................................... 692

15-6 Integral Controllers (I Mode) ............................................................... 706

15-7 Proportional-Integral Controllers (PI Mode) ........................................ 715

15-8 Derivative Controllers (D Mode) ......................................................... 725

15-9 Proportional-Derivative Controllers (PD Mode) .................................. 729

15-10 Proportional-Integral-Derivative Controllers (PID Mode) .................. 736

15-11 Advanced Control Systems .................................................................. 744

15-12 Controller Loop Tuning ....................................................................... 747

15-13 Summary .............................................................................................. 766

S

ECTION

5 A

DVANCED

PLC T

OPICS AND

N

ETWORKS

Chapter 16 Artificial Intelligence and PLC Systems

16-1 Introduction to AI Systems .................................................................. 774

16-2 Types of AI Systems ............................................................................ 774

16-3 Organizational Structure of an AI System ........................................... 776

16-4 Knowledge Representation .................................................................. 778

16-5 Knowledge Inference ........................................................................... 781

16-6 AI Fault Diagnostics Application ......................................................... 788

Chapter 17 Fuzzy Logic

17-1 Introduction to Fuzzy Logic ................................................................. 798

17-2 History of Fuzzy Logic ........................................................................ 801

17-3 Fuzzy Logic Operation ......................................................................... 802

17-4 Fuzzy Logic Control Components ....................................................... 805

17-5 Fuzzy Logic Control Example ............................................................. 828

17-6 Fuzzy Logic Design Guidelines ........................................................... 835

Chapter 18 Local Area Networks

18-1 History of Local Area Networks .......................................................... 848

18-2 Principles of Local Area Networks ...................................................... 848

18-3 Network Topologies ............................................................................. 851

18-4 Network Access Methods ..................................................................... 857

18-5 Communication Media ......................................................................... 860

18-6 Understanding Network Specifications ................................................ 862

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Contents

18-7 Network Protocols ................................................................................ 866

18-8 Network Testing and Troubleshooting ................................................. 874

18-9 Network Comparison and Selection Criteria ....................................... 875

Chapter 19 I/O Bus Networks

19-1 Introduction to I/O Bus Networks ........................................................ 880

19-2 Types of I/O Bus Networks .................................................................. 883

19-3 Advantages of I/O Bus Networks ......................................................... 885

19-4 Device Bus Networks ........................................................................... 886

19-5 Process Bus Networks .......................................................................... 899

19-6 I/O Bus Installation and Wiring Connections ...................................... 910

19-7 Summary of I/O Bus Networks ............................................................ 916

S

ECTION

6 I

NSTALLATION AND

S

TART

-U

P

Chapter 20 PLC Start-Up and Maintenance

20-1 PLC System Layout ............................................................................. 922

20-2 Power Requirements and Safety Circuitry ........................................... 931

20-3 Noise, Heat, and Voltage Considerations ............................................. 935

20-4 I/O Installation, Wiring, and Precautions ............................................. 942

20-5 PLC Start-Up and Checking Procedures .............................................. 948

20-6 PLC System Maintenance .................................................................... 952

20-7 Troubleshooting the PLC System ........................................................ 954

Chapter 21 System Selection Guidelines

21-1 Introduction to PLC System Selection ................................................. 962

21-2 PLC Sizes and Scopes of Applications ................................................ 962

21-3 Process Control System Definition ...................................................... 969

21-4 Other Considerations ............................................................................ 981

21-5 Summary .............................................................................................. 982

A

PPENDICES

Appendix A Logic Symbols, Truth Tables, and Equivalent Ladder/Logic Diagrams ..... 987

Appendix B ASCII Reference .................................................................................. 989

Appendix C Electrical Relay Diagram Symbols ...................................................... 991

Appendix D P&ID Symbols ..................................................................................... 993

Appendix E Equation of a Line and Number Tables ............................................... 995

Appendix F Abbreviations and Acronyms ............................................................... 997

Appendix G Voltage-Current Laplace Transfer Function Relationships ................. 999

Glossary .............................................................................................. 1001

Index ................................................................................................... 1025

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Preface

P

REFACE

Since the first edition of this book in 1988, the capabilities of programmable logic controllers have grown by leaps and bounds. Likewise, the applications of PLCs have grown with them. In fact, in today’s increasingly computercontrolled environment, it is almost impossible to find a technical industry that does not use programmable controllers in one form or another. To respond to these phenomenal changes, we introduce the second edition of

Programmable Controllers: Theory and Implementation.

This second edition, like the first, provides a comprehensive theoretical, yet practical, look at all aspects of PLCs and their associated devices and systems.

However, this version goes one step further with new chapters on advanced

PLC topics, such as I/O bus networks, fuzzy logic, the IEC 1131-3 programming standard, process control, and PID algorithms. This new edition also presents revised, up-to-date information about existing topics, with expanded graphics and new, hands-on examples. Furthermore, the new layout of the book—with features like two-tone graphics, key terms lists, well-defined headings and sections, callout icons, and a revised, expanded glossary— makes the information presented even easier to understand.

This new edition has been a labor-intensive learning experience for all those involved. As with any task so large, we could never have done it alone.

Therefore, we would like to thank the following companies for their help in bringing this book to press: Allen-Bradley Company—Industrial Computer

Group, ASI-USA, B & R Industrial Automation, Bailey Controls Company,

DeviceNet Vendors Association, ExperTune Software, Fieldbus Foundation,

Hoffman Engineering Company, Honeywell—MicroSwitch Division,

LANcity—Cable Modem Division of Bay Networks, Mitsubishi Electronics,

Omron Electronics, Phoenix Contact, PLC Direct, PMC/BETA LP, Profibus

Trade Organization, Schaevitz Engineering Company, Siemens Automation,

Square D Company, Thermometrics, and WAGO.

We hope that you will find this book to be a valuable learning and reference tool. We have tried to present a variety of programmable control operations; however, with the unlimited variations in control systems, we certainly have not been able to provide an exhaustive list of PLC applications. Only you, armed with the knowledge gained through this book, can explore the true limits of programmable logic controllers.

Stephanie Philippo

Editor

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ix

About the Authors

A

BOUT THE

A

UTHORS

L

UIS

B

RYAN

Luis Bryan holds a Bachelor of Science in Electrical Engineering degree and a Master of Science in Electrical Engineering degree, both from the University of Tennessee. His major areas of expertise are digital systems, electronics, and computer engineering. During his graduate studies, Luis was involved in several projects with national and international governmental agencies.

Luis has extensive experience in the field of programmable controllers. He was involved in international marketing activities, as well as PLC applications development, for a major programmable controller manufacturer. He also worked for a consulting firm, providing market studies and companyspecific consultations about PLCs. Furthermore, Luis has given lectures and seminars in Canada, Mexico, and South America about the uses of programmable controllers. He continues to teach seminars to industry and government entities, including the National Aeronautics and Space Administration

(NASA).

Luis is an active member of several professional organizations, including the

Institute of Electrical and Electronics Engineers (IEEE) and the IEEE’s instrument and computer societies. He is a senior member of the Instrument

Society of America, as well as a member of Phi Kappa Phi honor society and

Eta Kappa Nu electrical engineering honor society. Luis has coauthored several other books about programmable controllers.

E

RIC

B

RYAN

Eric Bryan graduated from the University of Tennessee with a Bachelor of

Science in Electrical Engineering degree, concentrating in digital design and computer architecture. He received a Master of Science in Engineering degree from the Georgia Institute of Technology, where he participated in a special computer-integrated manufacturing (CIM) program. Eric’s specialties are industrial automation methods, flexible manufacturing systems

(FMS), and artificial intelligence. He is an advocate of artificial intelligence implementation and its application in industrial automation.

Eric worked for a leading automatic laser inspection systems company, as well as a programmable controller consulting firm. His industrial experience includes designing and implementing large inspection systems, along with developing PLC-based systems. Eric has coauthored other publications about

PLCs and is a member of several professional and technical societies.

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x

How to Use this Book

H

OW TO

U

SE THIS

B

OOK

Welcome to Programmable Controllers: Theory and Implementation. Before you begin reading, please review the following strategies for using this book. By following these study strategies, you will more thoroughly understand the information presented in the text and, thus, be better able to apply this knowledge in real-life situations.

B

EFORE

Y

OU

B

EGIN

R

EADING

• Look through the book to familiarize yourself with its structure.

• Read the table of contents to review the subjects you will be studying.

• Familiarize yourself with the icons used throughout the text:

Chapter Highlights

Key Terms

• Look at the appendices to see what reference materials have been provided.

A

S

Y

OU

S

TUDY

E

ACH

C

HAPTER

• Before you start a chapter, read the Chapter Highlights paragraph at the beginning of the chapter’s text. This paragraph will give you an overview of what you’ll learn, as well as explain how the information presented in the chapter fits into what you’ve already learned and what you will learn.

• Read the chapter, paying special attention to the bolded items. These are key terms that indicate important topics that you should understand after finishing the chapter.

• When you encounter an exercise, try to solve the problem yourself before looking at the solution. This way, you'll determine which topics you understand and which topics you should study further.

W

HEN

Y

OU

F

INISH

E

ACH

C

HAPTER

• At the end of each chapter, look over the list of key terms to ensure that you understand all of the important subjects presented in the chapter. If you’re not sure about a term, review it in the text.

• Review the exercises to ensure that you understand the logic and equations involved in each problem. Also, review the workbook and study guide, making sure that you can work all of the problems correctly.

• When you’re sure that you thoroughly understand the information that has been presented, you’re ready to move on to the next chapter.

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xi

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ECTION

O

NE

I

NTRODUCTORY

C

ONCEPTS

Introduction to Programmable Controllers

Number Systems and Codes

Logic Concepts

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C

HAPTER

O

NE

I

NTRODUCTION TO

P

ROGRAMMABLE

C

ONTROLLERS

I find the great thing in this world is not so much where we stand as in what direction we are moving.

—Oliver Wendell Holmes

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ECTION

1

Introductory

Concepts

Introduction to

Programmable Controllers

C

HAPTER

1

C

HAPTER

H

IGHLIGHTS

Every aspect of industry—from power generation to automobile painting to food packaging—uses programmable controllers to expand and enhance production. In this book, you will learn about all aspects of these powerful and versatile tools. This chapter will introduce you to the basics of programmable controllers—from their operation to their vast range of applications. In it, we will give you an inside look at the design philosophy behind their creation, along with a brief history of their evolution. We will also compare programmable controllers to other types of controls to highlight the benefits and drawbacks of each, as well as pinpoint situations where PLCs work best.

When you finish this chapter, you will understand the fundamentals of programmable controllers and be ready to explore the number systems associated with them.

1-1 D

EFINITION

Programmable logic controllers, also called programmable controllers or

PLCs, are solid-state members of the computer family, using integrated circuits instead of electromechanical devices to implement control functions.

They are capable of storing instructions, such as sequencing, timing, counting, arithmetic, data manipulation, and communication, to control industrial machines and processes. Figure 1-1 illustrates a conceptual diagram of a PLC application.

Process or

Machine

Measure Control

Programmable

Controller

Field

Inputs

Field

Outputs

Figure 1-1.

PLC conceptual application diagram.

Programmable controllers have many definitions. However, PLCs can be thought of in simple terms as industrial computers with specially designed architecture in both their central units (the PLC itself) and their interfacing circuitry to field devices (input/output connections to the real world).

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Introductory

Concepts

Introduction to

Programmable Controllers

C

HAPTER

1

As you will see throughout this book, programmable logic controllers are mature industrial controllers with their design roots based on the principles of simplicity and practical application.

1-2 A H

ISTORICAL

B

ACKGROUND

The Hydramatic Division of the General Motors Corporation specified the design criteria for the first programmable controller in 1968. Their primary goal was to eliminate the high costs associated with inflexible, relaycontrolled systems. The specifications required a solid-state system with computer flexibility able to (1) survive in an industrial environment, (2) be easily programmed and maintained by plant engineers and technicians, and

(3) be reusable. Such a control system would reduce machine downtime and provide expandability for the future. Some of the initial specifications included the following:

• The new control system had to be price competitive with the use of relay systems.

• The system had to be capable of sustaining an industrial environment.

• The input and output interfaces had to be easily replaceable.

• The controller had to be designed in modular form, so that subassemblies could be removed easily for replacement or repair.

• The control system needed the capability to pass data collection to a central system.

• The system had to be reusable.

• The method used to program the controller had to be simple, so that it could be easily understood by plant personnel.

T

HE

F

IRST

P

ROGRAMMABLE

C

ONTROLLER

The product implementation to satisfy Hydramatic’s specifications was underway in 1968; and by 1969, the programmable controller had its first product offsprings. These early controllers met the original specifications and opened the door to the development of a new control technology.

The first PLCs offered relay functionality, thus replacing the original hardwired relay logic, which used electrically operated devices to mechanically switch electrical circuits. They met the requirements of modularity, expandability, programmability, and ease of use in an industrial environment.

These controllers were easily installed, used less space, and were reusable.

The controller programming, although a little tedious, had a recognizable plant standard: the ladder diagram format.

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ECTION

1

Introductory

Concepts

Introduction to

Programmable Controllers

C

HAPTER

1

In a short period, programmable controller use started to spread to other industries. By 1971, PLCs were being used to provide relay replacement as the first steps toward control automation in other industries, such as food and beverage, metals, manufacturing, and pulp and paper.

T

HE

C

ONCEPTUAL

D

ESIGN OF THE

PLC

The first programmable controllers were more or less just relay replacers.

Their primary function was to perform the sequential operations that were previously implemented with relays. These operations included ON/OFF control of machines and processes that required repetitive operations, such as transfer lines and grinding and boring machines. However, these programmable controllers were a vast improvement over relays. They were easily installed, used considerably less space and energy, had diagnostic indicators that aided troubleshooting, and unlike relays, were reusable if a project was scrapped.

Programmable controllers can be considered newcomers when they are compared to their elder predecessors in traditional control equipment technology, such as old hardwired relay systems, analog instrumentation, and other types of early solid-state logic. Although PLC functions, such as speed of operation, types of interfaces, and data-processing capabilities, have improved throughout the years, their specifications still hold to the designers’ original intentions—they are simple to use and maintain.

T

ODAY

S

P

ROGRAMMABLE

C

ONTROLLERS

Many technological advances in the programmable controller industry continue today. These advances not only affect programmable controller design, but also the philosophical approach to control system architecture.

Changes include both hardware (physical components) and software (control program) upgrades. The following list describes some recent PLC hardware enhancements:

• Faster scan times are being achieved using new, advanced microprocessor and electronic technology.

• Small, low-cost PLCs (see Figure 1-2), which can replace four to ten relays, now have more power than their predecessor, the simple relay replacer.

• High-density input/output (I/O) systems (see Figure 1-3) provide space-efficient interfaces at low cost.

• Intelligent, microprocessor-based I/O interfaces have expanded distributed processing. Typical interfaces include PID (proportional-

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Introductory

Concepts

Introduction to

Programmable Controllers

C

HAPTER

1 integral-derivative), network, CANbus, fieldbus, ASCII communication, positioning, host computer, and language modules (e.g., BASIC,

Pascal).

• Mechanical design improvements have included rugged input/output enclosures and input/output systems that have made the terminal an integral unit.

• Special interfaces have allowed certain devices to be connected directly to the controller. Typical interfaces include thermocouples, strain gauges, and fast-response inputs.

• Peripheral equipment has improved operator interface techniques, and system documentation is now a standard part of the system.

Figure 1-2.

Small PLC with built-in

I/O and detachable, handheld programming unit.

Figure 1-3.

PLC system with high-density I/O

(64-point modules).

All of these hardware enhancements have led to the development of programmable controller families like the one shown in Figure 1-4. These families consist of a product line that ranges from very small

“microcontrollers,” with as few as 10 I/O points, to very large and

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Introductory

Concepts

Introduction to

Programmable Controllers

C

HAPTER

1 sophisticated PLCs, with as many as 8,000 I/O points and 128,000 words of memory. These family members, using common I/O systems and programming peripherals, can interface to a local communication network.

The family concept is an important cost-saving development for users.

Figure 1-4.

Allen-Bradley’s programmable controller family concept with several PLCs.

Like hardware advances, software advances, such as the ones listed below, have led to more powerful PLCs:

• PLCs have incorporated object-oriented programming tools and multiple languages based on the IEC 1131-3 standard.

• Small PLCs have been provided with powerful instructions, which extend the area of application for these small controllers.

• High-level languages, such as BASIC and C, have been implemented in some controllers’ modules to provide greater programming flexibility when communicating with peripheral devices and manipulating data.

• Advanced functional block instructions have been implemented for ladder diagram instruction sets to provide enhanced software capability using simple programming commands.

• Diagnostics and fault detection have been expanded from simple system diagnostics, which diagnose controller malfunctions, to include machine diagnostics, which diagnose failures or malfunctions of the controlled machine or process.

• Floating-point math has made it possible to perform complex calculations in control applications that require gauging, balancing, and statistical computation.

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Introductory

Concepts

Introduction to

Programmable Controllers

C

HAPTER

1

• Data handling and manipulation instructions have been improved and simplified to accommodate complex control and data acquisition applications that involve storage, tracking, and retrieval of large amounts of data.

Programmable controllers are now mature control systems offering many more capabilities than were ever anticipated. They are capable of communicating with other control systems, providing production reports, scheduling production, and diagnosing their own failures and those of the machine or process. These enhancements have made programmable controllers important contributors in meeting today’s demands for higher quality and productivity. Despite the fact that programmable controllers have become much more sophisticated, they still retain the simplicity and ease of operation that was intended in their original design.

P

ROGRAMMABLE

C

ONTROLLERS AND THE

F

UTURE

The future of programmable controllers relies not only on the continuation of new product developments, but also on the integration of PLCs with other control and factory management equipment. PLCs are being incorporated, through networks, into computer-integrated manufacturing (CIM) systems, combining their power and resources with numerical controls, robots, CAD/

CAM systems, personal computers, management information systems, and hierarchical computer-based systems. There is no doubt that programmable controllers will play a substantial role in the factory of the future.

New advances in PLC technology include features such as better operator interfaces, graphic user interfaces (GUIs), and more human-oriented man/ machine interfaces (such as voice modules). They also include the development of interfaces that allow communication with equipment, hardware, and software that supports artificial intelligence, such as fuzzy logic I/O systems.

Software advances provide better connections between different types of equipment, using communication standards through widely used networks.

New PLC instructions are developed out of the need to add intelligence to a controller. Knowledge-based and process learning–type instructions may be introduced to enhance the capabilities of a system.

The user’s concept of the flexible manufacturing system (FMS) will determine the control philosophy of the future. The future will almost certainly continue to cast programmable controllers as an important player in the factory. Control strategies will be distributed with “intelligence” instead of being centralized. Super PLCs will be used in applications requiring complex calculations, network communication, and supervision of smaller PLCs and machine controllers.

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1-3 P

RINCIPLES OF

O

PERATION

A programmable controller, as illustrated in Figure 1-5, consists of two basic sections:

• the central processing unit

• the input/output interface system

I

N

P

U

T

S

Central

Processing

Unit

P

U

T

S

O

U

T

Figure 1-5.

Programmable controller block diagram .

The central processing unit (CPU) governs all PLC activities. The following three components, shown in Figure 1-6, form the CPU:

• the processor

• the memory system

• the system power supply

Processor Memory

Power

Supply

Figure 1-6.

Block diagram of major CPU components.

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The operation of a programmable controller is relatively simple. The input/

output (I/O) system is physically connected to the field devices that are encountered in the machine or that are used in the control of a process. These field devices may be discrete or analog input/output devices, such as limit switches, pressure transducers, push buttons, motor starters, solenoids, etc.

The I/O interfaces provide the connection between the CPU and the information providers (inputs) and controllable devices (outputs).

During its operation, the CPU completes three processes: (1) it reads, or accepts, the input data from the field devices via the input interfaces, (2) it

executes, or performs, the control program stored in the memory system, and

(3) it writes, or updates, the output devices via the output interfaces. This process of sequentially reading the inputs, executing the program in memory, and updating the outputs is known as scanning. Figure 1-7 illustrates a graphic representation of a scan.

SCAN

(1)

READ

EXECUTE

(2)

WRITE

(3)

Figure 1-7.

Illustration of a scan.

The input/output system forms the interface by which field devices are connected to the controller (see Figure 1-8). The main purpose of the interface is to condition the various signals received from or sent to external field devices. Incoming signals from sensors (e.g., push buttons, limit switches, analog sensors, selector switches, and thumbwheel switches) are wired to terminals on the input interfaces. Devices that will be controlled, like motor starters, solenoid valves, pilot lights, and position valves, are connected to the terminals of the output interfaces. The system power supply provides all the voltages required for the proper operation of the various central processing unit sections.

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Processor and

Power Supply

0

5

6

7

3

4

1

2

0

5

6

7

3

4

1

2

0

0

5

6

7

3

4

1

2

0

5

6

7

3

4

1

2

1

0

5

6

7

3

4

1

2

0

5

6

7

3

4

1

2

2

0

5

6

7

3

4

1

2

0

5

6

7

3

4

1

2

3

OUTPUT

MODULE

I/O Interfaces

Figure 1-8.

Input/output interface.

6

7

4

5

2

3

0

1

5

6

3

4

7

0

1

2

INPUT

MODULE

Although not generally considered a part of the controller, the programming

device, usually a personal computer or a manufacturer’s miniprogrammer unit, is required to enter the control program into memory (see Figure 1-9).

The programming device must be connected to the controller when entering or monitoring the control program.

(a) (b)

Figure 1-9. (a)

Personal computer used as a programming device and

(b)

a miniprogrammer unit.

Chapters 4 and 5 will present a more detailed discussion of the central processing unit and how it interacts with memory and input/output interfaces.

Chapters 6, 7, and 8 discuss the input/output system.

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1-4 PLC

S

V

ERSUS

O

THER

T

YPES OF

C

ONTROLS

PLC

S

V

ERSUS

R

ELAY

C

ONTROL

For years, the question many engineers, plant managers, and original equipment manufacturers (OEMs) asked was, “Should I be using a programmable controller?” At one time, much of a systems engineer’s time was spent trying to determine the cost-effectiveness of a PLC over relay control. Even today, many control system designers still think that they are faced with this decision. One thing, however, is certain—today’s demand for high quality and productivity can hardly be fulfilled economically without electronic control equipment. With rapid technology developments and increasing competition, the cost of programmable controls has been driven down to the point where a PLC-versus-relay cost study is no longer necessary or valid. Programmable controller applications can now be evaluated on their own merits.

When deciding whether to use a PLC-based system or a hardwired relay system, the designer must ask several questions. Some of these questions are:

• Is there a need for flexibility in control logic changes?

• Is there a need for high reliability?

• Are space requirements important?

• Are increased capability and output required?

• Are there data collection requirements?

• Will there be frequent control logic changes?

• Will there be a need for rapid modification?

• Must similar control logic be used on different machines?

• Is there a need for future growth?

• What are the overall costs?

The merits of PLC systems make them especially suitable for applications in which the requirements listed above are particularly important for the economic viability of the machine or process operation. A case which speaks for itself, the system shown in Figure 1-10, shows why programmable controllers are easily favored over relays. The implementation of this system using electromechanical standard and timing relays would have made this control panel a maze of large bundles of wires and interconnections.

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Figure 1-10.

The uncluttered control panel of an installed PLC system.

If system requirements call for flexibility or future growth, a programmable controller brings returns that outweigh any initial cost advantage of a relay control system. Even in a case where no flexibility or future expansion is required, a large system can benefit tremendously from the troubleshooting and maintenance aids provided by a PLC. The extremely short cycle (scan) time of a PLC allows the productivity of machines that were previously under electromechanical control to increase considerably. Also, although relay control may cost less initially, this advantage is lost if production downtime due to failures is high.

PLC

S

V

ERSUS

C

OMPUTER

C

ONTROLS

The architecture of a PLC’s CPU is basically the same as that of a general purpose computer; however, some important characteristics set them apart.

First, unlike computers, PLCs are specifically designed to survive the harsh conditions of the industrial environment. A well-designed PLC can be placed in an area with substantial amounts of electrical noise, electromagnetic interference, mechanical vibration, and noncondensing humidity.

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A second distinction of PLCs is that their hardware and software are designed for easy use by plant electricians and technicians. The hardware interfaces for connecting field devices are actually part of the PLC itself and are easily connected. The modular and self-diagnosing interface circuits are able to pinpoint malfunctions and, moreover, are easily removed and replaced. Also, the software programming uses conventional relay ladder symbols, or other easily learned languages, which are familiar to plant personnel.

Whereas computers are complex computing machines capable of executing several programs or tasks simultaneously and in any order, the standard PLC executes a single program in an orderly, sequential fashion from first to last instruction. Bear in mind, however, that PLCs as a system continue to become more intelligent. Complex PLC systems now provide multiprocessor and multitasking capabilities, where one PLC may control several programs in a single CPU enclosure with several processors (see Figure 1-11).

Figure 1-11.

PLC system with multiprocessing and multitasking capabilities.

PLC

S

V

ERSUS

P

ERSONAL

C

OMPUTERS

With the proliferation of the personal computer (PC), many engineers have found that the personal computer is not a direct competitor of the PLC in control applications. Rather, it is an ally in the implementation of the control solution. The personal computer and the PLC possess similar CPU architecture; however, they distinctively differ in the way they connect field devices.

While new, rugged, industrial personal computers can sometimes sustain midrange industrial environments, their interconnection to field devices still presents difficulties. These computers must communicate with I/O interfaces not necessarily designed for them, and their programming languages may not meet the standards of ladder diagram programming. This presents a problem to people familiar with the ladder diagram standard when troubleshooting and making changes to the system.

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Introduction to

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The personal computer is, however, being used as the programming device of choice for PLCs in the market, where PLC manufacturers and third-party

PLC support developers come up with programming and documentation systems for their PLC product lines. Personal computers are also being employed to gather process data from PLCs and to display information about the process or machine (i.e., they are being used as graphic user interfaces, or GUIs). Because of their number-crunching capabilities, personal computers are also well suited to complement programmable controllers and to bridge the communication gap, through a network, between a PLC system and other mainframe computers (see Figure 1-12).

Main

Computer

System

Personal

Computer

PLC

Figure 1-12.

A personal computer used as a bridge between a PLC system and a main computer system.

Some control software manufacturers, however, utilize PCs as CPU hardware to implement a PLC-like environment. The language they use is based on the International Electrotechnical Commission (IEC) 1131-3 standard, which is a graphic representation language (sequential function charts) that includes ladder diagrams, functional blocks, instruction lists, and structured text. These software manufacturers generally do not provide I/O hardware interfaces; but with the use of internal PC communication cards, these systems can communicate with other PLC manufacturers’ I/O hardware modules. Chapter 10 explains the IEC 1131-3 standard.

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T

YPICAL

A

REAS OF

PLC A

PPLICATIONS

Since its inception, the PLC has been successfully applied in virtually every segment of industry, including steel mills, paper plants, food-processing plants, chemical plants, and power plants. PLCs perform a great variety of control tasks, from repetitive ON/OFF control of simple machines to sophisticated manufacturing and process control. Table 1-1 lists a few of the major industries that use programmable controllers, as well as some of their typical applications.

C

H E M I C A L

/ P

E T R O C H E M I C A L

B a t c h p r o c e s s

F i n i s h e d p r o d u c t h a n d il n g

M a t e r i a l s h a n d il n g

M i x i n g

O f f s h o r e d r li il n g

P i p e il n e c o n t r o l

W a t e r / w a s t e t r e a t m e n t

G

L A S S

/ F

I L M

C u ll e t w e i g h i n g

F i n i s h i n g

F o r m i n g

L e h r c o n t r o l

P a c k a g i n g

P r o c e s s i n g

F

O O D

/ B

E V E R A G E

A c c u m u l a t i n g c o n v e y o r s

B l e n d i n g

B r e w i n g

C o n t a i n e r h a n d il n g

D i s t li il n g

F li il n g

L o a d f o r m i n g

M e t a l f o r m i n g l o a d i n g / u n l o a d i n g

P a ll e t i z i n g

P r o d u c t h a n d il n g

S o r t i n g c o n v e y o r s

W a r e h o u s e s t o r a g e / r e t r i e v a l

W e i g h i n g

L

U M B E R

/ P

U L P

/ P

A P E R

B a t c h d i g e s t e r s

C h i p h a n d il n g

C o a t i n g

W r a p p i n g / s t a m p i n g

M

A N U F A C T U R I N G

/ M

A C H I N I N G

A s s e m b l y m a c h i n e s

B o r i n g

C r a n e s

E n e r g y d e m a n d

G r i n d i n g

I n j e c t i o n / b l o w m o l d i n g

M a t e r i a l c o n v e y o r s

M e t a l c a s t i n g

M li il n g

P a i n t i n g

P l a t i n g

T e s t s t a n d s

T r a c e r l a t h e

W e l d i n g

M

E T A L S

B l a s t f u r n a c e c o n t r o l

C o n t i n u o u s c a s t i n g

R o l il n g m i ll s

S o a k i n g p i t

M

I N I N G

B u l k m a t e r i a l c o n v e y o r s

L o a d i n g / u n l o a d i n g

O r e p r o c e s s i n g

W a t e r / w a s t e m a n a g e m e n t

P

O W E R

B u r n e r c o n t r o l

C o a l h a n d il n g

C u t t o l e n g t h p r o c e s s i n g

F l u e c o n t r o l

L o a d s h e d d i n g

S o r t i n g

W i n d i n g / p r o c e s s i n g

W o o d w o r k i n g

Table 1-1.

Typical programmable controller applications.

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Because the applications of programmable controllers are extensive, it is impossible to list them all in this book. However, Table 1-2 provides a small sample of how PLCs are being used in industry.

A

U T O M O T I V E

I n t e r n

s e n s o r w a t e r

a

s

l

l

C

o

o

c

m

a t t e m p e r e

b

d

u s

a a t u r t

t i

e

o

,

n

t h e o i l

E n g i n e

i n t e r n a l t e m p e r

M o n i t o r i n g .

c o a t m b u s u r e , t i

R o n

P M

A P L C e n g i n e .

s , t o r q u a c e , q e u x i r h e a s u d a t a

M e a s u r e m e n t s s t t e r e c o r d e d t a k e n i n c f r o m l u d e m p e r a t u r e , o i l p r e s s u r e , m a n i f o l d p r e s s u r e , a n d t i m i n g .

C a r b u r e t o

c a r b u r e t o r s

r

i

P r

n a

o d u c t i o n

p r o d u c t i o n

T e s t i

a s s e

n g .

m b l

P y

L C s il n e .

p

T r o h e v i d e s y s t o n e m s l i n s e i g n a n a l y s i s i f i c a n t l y o f a u t o m o t i v e r e d u c e t h e t e s t t i m e , w h li e p r o v i d i n g g r e a t e r y i e l d a n d b e t t e r a n d f u e l a n d a i r f l o w a r e s o m e o f t h e v a r i a b l q u e s a il t y c a t e s t e d .

r b u r e t o r s .

P r e s s u r e , v a c u u m , r

M

e

o

j

n

e c

i t

t

o

e

r

d

i n

S t a t i s t i c a l p

g

a r

A

t

u

s ,

t o

d a t a i s p

m

a r

o

t a v a

t

s

i

li

v e

p r a b l

P

o d u c e t

r o

o

d u

e

c

d t h e

,

t

o

i o

m p

n

a c h i e r

M

a t

a

o n r

c h

e

i n

c y

e s

c l

.

e a n y t i m e

T t h o r e i m a s e , f t y e s t e m a n d r m o n i t o r s m e a c h a c s h h i n e i f t .

t o t a l p a r t s , e f f i c i e n c y .

P o w e r S t e e r i n g V a l v e A s s e m b l y a n d

T h e P L C s y s t e m a m a c h i n e t o e n s u r e p r o p e r b a l a n c e o f t h e v a l v e s a n d t o m a x i m i z e l e f t a n d r i g h t t u r n i n g r a t i o s .

T e s t i n g .

c o n t r o l s

C

H E M I C A L A N D

P

E T R O C H E M I C A L

A

P

m

L C

m

c o n t r o

o

l

n

l a

i

r

a

g

a

e m o n i t o r

n d E

c o m s b e

t

p r a r

h

i e

y l

n s s g

e n

o r

e

s t e m

P

u s p e

r

e

o

d r a

c e

t u r

s s

d u e r i s ,

i n

n g o

g

p

.

e r

P a r t o i g o r n a a m m o n i a m o f m a n d c l a e b e a r l t e h y l c e o a n c e n t n e p r o l m o l c k e r s e t s , m a n u f a c o n c t u r o m i t o r i n g .

p r e a n d

T h e s s o r s p e e d s u c t i o n

, p o w e r f l o w .

c o n s u m p t i o n , v i b r a t i o n , d i s c h a r g e t e m p e r a t u r e s , p r e s s u r e , a n d

D y e s .

P L C s m o n i t o r a n d c o n t r o l t h e d y e p r o c e s s i n g u s e d i n t h e t e x t li e i n d u s t r y .

T h e y m a t c h a n d b l e n d c o l o r s t o p r e d e t e r m i n e d v a l u e s .

C h e m i c a l

i n a c o n m a t e r i a l r e t r e i v e d t i n u o u s a n d a

B

u t

a

o

t

k

c

e

h

e m a

i n g .

p p r s o t i c a c i

T e s s .

n v h e e ll y o r

P n t o r o

T n

L C h y e c r c o n t r o l s s y s t e m t d h e e t e b a t c h i n g r m i n e s t r h a t e i r o a t o f e t w o o f d i o r s m c h o r e a r g e m a t e r i a l s o f e a c h e c o o m r d s .

m a n d

S e v e r a l f r o m t h e b a t c h r e c o p e r a t o r .

i p e s c a n b e l o g g e d a n d

F

c o

C

n t

o

a

n t

m i

r o

n

l

a

.

t i o n r e a c h e d .

n s b p r o d u c t i o n e n v i r o n m e n t .

T h i s s y s t e m o f

a n

P L C s i s c o n t r o l f a

T h e a

P s e d o n l e e f f e c t i v e l y

L C c o n t r o v l e s l s r e m t o v h o f e e f t s a o x g n i a c s e g a s e s s s t a r t / s t o p , i n a c h e m i c a l w h e n a p r e s e t l e v e l c y c l i n g , a n d s p e e d s , s o t h a t s a f e t y l e v e l s a r e m a i n t a i n e d w h li e e n e r g y c o n s u m p t i o n i s m i n i m i z e d .

r

G a s

e g u l

T r a n

a t e p r

s m i s s i o

e s s u r e s

n

a n

a n d

d

D i

f l o w s

s t

o f

r i b

g a

u t i o n .

s t r a n

P s m r o g r a i s s i o n m a m n a b l e d d i s t r c o n t r o i b u t i o n l l e r s s y s t m o e m n s .

i t o r

D a a t a n d i s g a t h e r e d a n d m e a s u r e d i n t h e f i e l d a n d t r a n s m i t t e d t o t h e P L C s y s t e m .

P i p e l

c r u d e

i n

l i m i t s .

o

e

i

P l o

P

d i

A c q u i s t i o n )

u m p

s t r i s s s b i b l e y s t u e

S t a t

t c i o o m s n .

i o

T

n

h m m u c a n

C

e y

o

n i c p r o

n

m v i

t r o

e a d e t

l .

s u a t i o n

P L r w o t e a l i t

C f h s s l o w

S u p c

,

C e r o n t r o s u c t

A D A l i o v i s i o n

( m a n o f

, i t n l i n e a n d d i s c h a r g e ,

S u p e r h e v i s o r y p i p e il n b o o a n d s t e r p u m p s t a n k l o w / h i f o r g h

C e .

o n t r o l a n d D a t a

O i l F i e

c h a r a c t

l d s

e r i s

.

t i

P L c s

C s s u c p r h o a v i s d e d e o n p t h s i t e a n d g a t h e r d e n s i t i n y g o f a n d d r i l l p r o i n g c r e s i g s i n g s .

T o h e f d a t

P L C a p e r t i n e c o n t r o l s n t a t o n d m o n i t o r s t h e t o t a l r i g o p e r a t i o n a n d a l e r t s t h e o p e r a t o r o f a n y p o s s i b l e m a l f u n c t i o n s .

Table 1-2.

Examples of PLC applications.

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G

L A S S

P

R O C E S S I N G

A n n e a l i n g

f r o m g l a s s

L

p r

e h r

o d u

C o n t r o l .

c t s .

T h e

P L C s s y s t e m c o n t r c o n t o l r o l t h e s t h l e e h r u s e d t o o p e r a t i o n r b e y m o f o v e ll o w t h e i n g i n t e r n a l t h e a n n s t r e a e s s il n g t t e m p r o p e r a c e s s t u e s r e t h r c u r v e o u g h d u r i n g d i f f e r e n t t h e h e a r t e h e a t i n g a i n n d g c

, o a n n e a o il n g il n z o g n e

, s s t

.

r a i n

I m p r i n g , a o v e m n d e n t r a p i d s a r e c o o m a d e il n g i n h e r a t i o o f g o o d g l a s s t o s c r a p , r e d u c t i o n i n l a b o r c o s t , a n d e n e r g y u t i il z a t i o n .

G l

f o r

a s s

m u l

B a t c h

a s .

T h

i n

e

g .

s y

P L C s s t e m c o n a l s o t r c o l o t n t h e b r o l s a t t c h h e w e i g e l e c t r h i n g o m a s y s t e m g n e t i c f a c c o r e e d e r d i s n g f o r t o i n s t o r e d f e e d t o g l a s s a n d o u t f e e d f r o m t h e w e i g h h o p p e r s , m a n u a l s h u t o f f g a t e s , a n d o t h e r e q u i p m e n t .

C u l l e t W e i g h i n g .

P L C s d i r e c t t h e c u ll e t s y s t e m b y c o n t r o l il n g t h e f e e d e i n v e n r , t o r w e i y o f g h t q u

b e a n t i l t t i s c a l e , e s a n d w e i g h e d s h u a r e t t l e k e p t c o n v e b y t h y o e r

P

.

L

A ll

C f s e q u e o r f u t u r n c e e s o f u s e .

v i b r a t o r y o p e r a t i o n c u ll e t a n d f

B a t c h

r d i o m t s c h a h

T

e r g

r

e

a

m d

n

i x t

s p

o e t r

o r

h a

t

e

.

n

P d

L f u ll

C s c o n t r o l t h t r l a n s e n g t f e h r s o f t h e t h e e b m i a x t c e h d f u r n a c e t r a n s p b a t c h f e e d o r t o t t s y s h e t e h o p p e r .

m , i n c f u r n a c e l u d i n g r e v e r s s h u t t l e , w h i b l e e r e i b t e l c o n v e y o r s , c o n v e y o r s , t r a a n d n s f e r m a g n e c o t i c n v e y o r s t o s e p a r a t o r s .

t h e

T h e c u l l e t c o n t r o h o ll e r u t s e , a k h e s o l d a c t i i n g o n h o p p a f t e r t e r h e s , d i s s h u c h a r t t l e g e i s t

M

A N U F A C T U R I N G

/ M

A C H I N I N G

P r o d u c t i o n

m a c h i n e s a t

M

h i

a

g

c h

h

i n e s

e f f i c i

.

e

T h e n c y

P L C r a t e s .

c o n t r o l s

I t a l s o a n d m o n m o n i t o r s p i t o r i e c s e a u t o m a c o u n t p r t i c o d p r u c o d u c t i o n t i a o n n d m a c h i n e f a li u r e .

s t a t u s .

C o r r e c t i v e a c t i o n c a n b e t a k e n i m m e d i a t e l y i f t h e P L C d e t e c t s a

T r a n s f e r L i n e M a c h i n e s .

P L C s m o n i t o r a n d c o n t r o l a ll t r a n s f e r i s t a t i o n n p u t s f o p e r r o m a t t i o h e n s a n o p e r d a t t h e o r i n t o t e r c h l o c k i n g e c k t h e b e t w e e n o p e r a t i e n g a c h c o s t a n d i t t i o n i o n s

.

T o h e n t h e il n il e n m s y s t e m e a c h i r e c e n i n g i v e s m o u n t e d c o e f f n t r o i c i e l s n c a y , n d h i r g e p o r h e r t s q u a a n y il t y m p r a l f u o d u n c t i c t s , o n s .

a n d

T h i s l o w e r a r r a n g e m e n t s c r a p l e v e l s .

p r o v i d e s g r e a t e r m a c h i n e

W

d r

i

a

r e

w i

M a

n g

c h i n e

m a c h i

.

n

T e .

h e

T h c e o n t r o ll e r s y s t e m m p r o n o v i t o r s i d e s t h e t i m e r a m p i n g e l e c t r m a c h i i c n m e ' s o t o e f r f i c d r i v e s .

i e n c y a

A ll s c c a y c l e l c u l s a t a r e e d b r e c o r y t h e d e d a n d

P L C .

r e a n c o n t r p o d O N / O F F o r t e d l a n d c y c l e s y n c h r s o f o n i z a a t i w i r e o n o f o n d e m a n d t o o b t a i n t h e

T o o l C h a n g i n g .

T h e P L C c o n t r o l s a s y c h r o n o u s m e t a l c u t t i n g m a c h i n e w i t h s e v e r a l t o o l o n t h g r e o u n u p s .

m b

T h e e r o f s y s t e m p a r t s i t k e e p s t r a c m a n u f a c t u r k e o f s .

w h e n

I t a l s o e a c h d i s p t o o l a y s l s h t h e o u l d c o u b n t e a r e n d p r l a c e d , e p l b a s e d a c e m e n t s o f a ll t h e t o o l g r o u p s .

P a i n t

P L C s c o n t r o l t h e p a i n t i n g s e q u e n c e s i n a u t o m a n u f a c t u r i n g .

T h e t o p e r a t o r h r o u g h o r t h e a c h o o s n v t c o e y o r m p u n u t e r t li i t e r n t e a e r s c h e s t y l e s t h e a n d s p r c a y o l b o r o i n f o t h .

o r

T m a t i o n h e c o n a t r n o d t ll e r r a c k s d e c t h e o d e s p a r t t h e p m a r t o v

S p r a y i n g .

i n f o r m e m e n t i a s t i o n a n o p t i m d i z t h e n e d t o c o n t r o l s c o n s e r v e t h p e a i s p r n t a y a n d g u n s i n c r t o p e a s e a i p n t a r t t h e t h r p a r t .

T h o u g h p u t .

e s p r a y g u n

M

A T E R I A L S

H

A N D L I N G

A u t o m a t i c

w h i c h c a n

P l a t i n g

t r a v e r s e

T h e s y s t e m k n o w s l

L

e

i n

f t ,

e .

r i

T h e g h t ,

P L C u p , c o a n d n t d r o l s o w n a t s h r e t p a o u g h t t t e r n h e f o r t h e v a r i o u s a u t o m p l a t i n g a t e d h o i s t , s o l u t i o n s .

w h e r e t h e h o i s t i s a t a ll t i m e s .

Table 1-2 continued.

Industrial Text and Video Company 1-800-752-8398 www.industrialtext.com

19

S

ECTION

1

Introductory

Concepts

Introduction to

Programmable Controllers

C

HAPTER

1

S t o r a g e a n d R e t r

t o t e s i n t h e s t o r a g e

i e v a l S y s t e m s .

A P L a n d r e t r i e v a l s y s t e m .

C i s u s e d

T h e c o n t r o t o ll e r l o a d p a r t s a n d c a r r y t r a c k s i n f o r m a t i o n il t k e h e m i n a l a n e n u m b e r s , t h e p a r t s a s s i g n e d t o s p e c i f i c l a n e s , a n d t h e q u a n t i t y o f p a r t s i n a p a r t i c u l a r l i a n f n o e u n l o r

.

a d m

T s h e i d s t h e

P L o

C f r o m p e r t a r r a n g e m e n t h e a t o r s y o f s t a e n m y

.

m a

T h ll o e w s r a p c o n t r o i d ll e c h a r a l n g s o e s i n t h e p r o v i d e s s t a t u s o f i n v e n t o r p y a r t s p r i n t l o o a d u t s e d o r a n d a l f u n c t i o n s .

C o n v e y o r

p a t a t ll e t h e i z e r d

S y s t e m s .

u t y .

R e c e n d o f e a c h o r

T d s s h i f t .

h e s y s t e m c o n t r o l s a ll o f t h e s e q u e n t i a l o p e r a t i o n s , a l a r m s , a n d a l s o s a f e t y s o r t s l p r o g o d i c u c n e c e s s a r y t s t o t h e i r t o c o r r l o a d e c t a n d l a n e s c i r c u a n d l a t e c a n p a r t s s c h e d o n a u l e m a i n l a n e s o r il n e t i n g c o t o n v o e y o r p t i m i

.

I t z e d e t a i il n g t h e r a t i o o f g o o d p a r t s t o r e j e c t s c a n b e o b t a i n e d

A u t o m a t e d W a r e h o u s i n g .

T h e P L C c o n t r o l s a n d o p t i m i z e s t h e m o v e m e n t o f s t a c k i n g c r a n e s a n d p r o v i d e s h i g h t u r n a r o u n d o f m a t e r i a l s r e q u e s t s i n a n a u t o m a t e d , h i g h c u b e , p a ll e t i z e r s v t o e r t i c a l s i g n i f i c w a a n t r e l y h o u s e .

r e d u c e

T h e P m a n p

L C o w e a l r s o c o r e q u i r n t r o e m e l s n t a s .

i s

I l e n v c o n v e y o r s e n t o r y a n d c o n t r o l f i g c a u r s e e s a r e m a i n t a i n e d a n d c a n b e p r o v i d e d o n r e q u e s t .

M

E T A L S

S t e e

a c c o r

l

d

M a k i n

a n c e

g .

w i t

T h h e p r e

P L C s e t c o n t r o l s a n d s p e c i f i c a t i o n s .

o p e r

T h e a t e s c o n t f u r r o l l n e a c r e s t o a l s o p r o d u c e c a l c u l a t e s m e t a l o x y g i n e n r e q u i r e m e n t s , a ll o y a d d i t i o n s , a n d p o w e r r e q u i r e m e n t s .

t

L o

s e

a d i n

q u e n

g

c e

a n

s ,

d

t h e

U n l o a

s y s t e

d i

m

n g o

c o n t r

f

o l

A l l o y s .

s a n d m

T h r o n i t o u o r g s h t h a e c c u r a t e q u a n t i t y w e i g h i n g o f c o a l , i r a n d o n l o a o r e , d i n g a n d il m o r e p s e t d o o n e t o c a r .

b e m e l t e d .

I t c a n a l s o c o n t r o l t h e u n l o a d i n g s e q u e n c e o f t h e s t e e l t o a

C o n t i n u o u s C a s t i n g .

P L C s d i r e c t t h e m o l t e n s t e e l t r a n s p o r t l a d l e t o t h e c o n t i n u o u s c a s t i n g m a c h i n e , w h e r e t h e s t e e l i s p o u r e d i n t o a w a t e r c o o l e d m o l d f o r s o il d i f i c a t i o n .

C o l d R o l l i n g .

P L C s c o n t r o l t h e c o n v e r s i o n o f s e m i f i n i s h e d p r o d u c t s i n t o f i n i s h e d g o o d s t e n s i o n t h r a o u n d g h c o l d p r o v i d e

r o l il n g a d e q u m i a t e ll s .

T g a u h e g i n s y g s t e m o f t h e c o n t r r o ll e o d l s m o t o r m a t e r i a l .

s p e e d t o o b t a i n c o r r e c t r

A l u m i n u m M a k i n g .

C o n t r o ll e r s m o n i t o r e m o v e d f r o m b a u x i t e b y h e a t a n d c h e m t h e r e f i n i n g p r o c e s s , i n w h i c h i m p u r i t i e s a r e i c a l s .

T h e s y s t e m g r i n d s a n d m i x e s t h e o r e w i t h c h h e a t e d , e m f i c a l s li t e r e d , a n d a n d t h e n p u m p s t h e m i n t o p r e s s u r c o m b i n e d w i t h m o r e c h e m i c a l s .

e c o n t a i n e r s , w h e r e t h e y a r e

P

O W E R

P l a n t P o w e r

o f a v a li a b l e e

S y s t e m .

T h e p r o g r a m m a b l e l e c t r i c i t y , g a s , o r s t e a m .

I n c o n t r o ll e r a d d i t i o n , t r e g u l a t e s h e P L C t h e m o n p r o p i t o r s e r d i s t r i b u t i o n p o w e r h o u s e f a c i

P L C il t i e s , c o n t r s c h e d o l s t h u l e e l s o a d d i s s t r i b u t i o d u r i n g n o o f p e r e n e a t i o r g n y , o f a n d t h e p g e n e r l a n t , a t a s e s w e d i s t ll a r i b u s t h t i e o n a u r e p o r t s .

t o m a t i c

T h e l o a d s h e d d i n g o r r e s t o r i n g d u r i n g p o w e r o u t a g e s .

E n e r g y M a n a g e m e n t .

T h r o u g h t h e r e a d i n g o f i n s i d e a n d o u t s i d e t e m p e r a t u r e s , t h e

P L C c o n t r c o n t r o l s o l s t h e l o h e a a d s t i

, n g a n d c y c il n g c o o t h e il n m g d u n i t s u r i n g i p n r e a d m a n u f e t e r m i a c t u n e d r i n c y g c l e p l s a n t .

a n d

T h e k e e

P L C p i n g s y s t e m t r a c k o f h o w l o n g s c h e d u l e d e a c h s r e p o r t s h o o u l n t d h b e e a o m n o r o u n t o o f f f e d u r i n g n e r g y t h e u s e d c y c l e b y t h t e i m e .

T h e s y h e a t i n g a n d s t e m p c o o il n g r o v i d e s u n i t s .

Table 1-2 continued.

Industrial Text and Video Company 1-800-752-8398 www.industrialtext.com

20

S

ECTION

1

Introductory

Concepts

Introduction to

Programmable Controllers

C

HAPTER

1

C o a l

g e n e r

F l u i d i

a t e d f r

z a t i o

o m a

n

g i v

P r o

e n

c e s s i n

a m o u n t

g

o f

.

T h e c o a l c o a n n t d r o l l e r e g u l r a t m o e s n i t t h e o r s c o a h l o w m u c h c r u s h i n g e n e r g y i s a n d m i x i n g w i t h c r u s h e d g e n e r a t e d , s e il m e s q u e n t o n e c i n g

.

T h e P L C o f v a l v e s , m o n i t o r s a n d a n a l a n o g d c c o n t r o l s o n t r o l o f b u r n i n g r a t e s , j e t v a l v e s .

t e m p e r a t u r e s

C o m p

c o m p

r e s s o r

r e s s o r s

E f f i c i e n

t a t i o n .

c y

T h e

C o n t r o l .

s y s t e m

P L C s c o n t r o l h a n d l e s s a f s e t e y v i e r a l n t e r l c o o c m p r k s , e s s s o r s t a r t u p a t a t y p i c a

/ s h u t d o w n l s m e q u e a x n c e s i m u m

, e f a f i c i n d e n c o m p r e s s o r c y u s i n g t h e c y c l i n g .

n o n il n e a r

T h c u e r v

P e s

L C o f s k e e p t h e c o c o m p m p r e s s o r e s s o r s .

r s r u n n i n g a t

P

U L P A N D

P

A P E R

P u l p B a t c h B l e n d i n g .

T m e a s u r e m e n t , o p e r a t o r s t o m a n o d d i f y r e c i p e b a t c h h e s t o e n t

P L C r a g e r i e s c o n t r o l s s e q u e n c e o p e r a t i o n , i n g r e d i e n t f o r o f t h e e a c h b l e n d i n g q u a n t i t y , p r o c e s s .

i f n e c e

T s s h e a r y , s y s t e m a n d p r a l o v l o w s i d e s h a r d c o p y p r i n t o u t s f o r i n v e n t o r y c o n t r o l a n d f o r a c c o u n t i n g o f i n g r e d i e n t s u s e d .

B a t c h

t h e c o

P

m

r e p a

p l e t e

r a

s t

t i o n

o c k

f o r P a p e r -

p r e p a r a t i o n

M a

s y

k i n g

s t e m

P r o c e s s i n g .

f o r p a p e r m

A p p il c a t i o n s a n u f a c t u r i n g .

i n c l u d e

R e c i p e s c o n f o r t r o l o f e a c h b a t c h t a n k a r e s e l e c t e d a n d a d j u s t e d v i a o p e r a t o r e n t r i e s .

P L C s c a n c o n t r o l f e e d b a c k l o g i c f o r c h e m i c a l a d d i t i o n b a s e d o n t a n k l e v e l m e a s u r e m e n t s i g n a l s .

A t t h e c o m p l e t i o n o f e a c h u s e .

s h i f t , t h e P L C s y s t e m p r o v i d e s m a n a g e m e n t r e p o r t s o n m a t e r i a l s t

P a p e r

t h e s e e m p e

M i l l

a m o r a t u r

D i g e s t e r .

u n e t s u n t

P L C s a r e a d d e d li t h e c o o t o k i n g c o n t r o l t h i s e s e q t h u e e n p c r o e c o m p l e t e d .

.

c e s s

T h e o f m a k i n g

P L C r a m p s p a p e r a n d h p u l p o l d s t f r o m h e w o o d c h i p d i g e s .

s t

T h e s y s t e m e r v o l u m e .

T c a l c u l a t e s h e n , t h e a n p e r d c c o n t e n t r o o f l s t h e r e q u i r a m e d o u n c o o t o k i f n c g h i p l i q s u b a s e d o r s i s c o n a d e l c u l n s i t y a t e d a n d a n d c o o k i n g

P

m o i s a

a

d j

p

u

e

s t u t

r

s r

M

e t h

i l

v a e

l

r s

P r o

i t a o b c l

d u

e k v f

c t

o a r

i

l v

o

p

n

a p e s

.

t e

T o r h e g r r e a c o g u d e l a n t r o

.

t e

T h w l l e e e i r s y g h r e g u l t s

, t e a m n a d t e m a n m s t i p u l o n i h e a v e a t o r s t e a s n r a g e t d h e b a s i s s t e a m c o n t r o l s t w o t e a l i f l o w g h t a n d v a l v e s , f l o w .

R

U B B E R A N D

P

L A S T I C

t

T i r

i m

e -

e ,

C u r i n

p r e s s

g

u r

P

e

r e

,

s s

a n d

M o n i t o r i n g .

t e m p e r a t u r e

T h e d u r i

P L C n g e p e r f a c h o r m s p r e s s i n c d i v i y c l d u e .

a

T l h p e r e s s y s s t m o n i t o r i n g e m a l e r t s f o r t h e o i n o f p e t a g r b l e s o a o t o d r f o f o r a l n a c u r e s y t e r a p n r e u d s s p s e .

r e m

R a s s e l f p o r t d u o n c w t i g o n e n n t i m s .

e e

I d n r a u f o r t i o n e m a t o t i m o n p r i n t a l f c u o o u t s n c n f t i c o e r r n e o n s .

i a n g c h m s a h i f c t h i i n e n c s l u t a d e t u a s i s s t o r e d s u m m a r y

T i r e M a n u f a c t u r i n g .

P r o g r a m m a b l e c o n t r o ll e r s a r e u s e d f o r t i r e p r e s s / c u r e s y s t e m s t r o o a c o d .

n t r o l

T h i s t h e c o n t s e r o l q u e n c i n g i n c l u d e s o f m o e v e n t s l d i n g t h t h e a t t r e t r a n s f o r m s a d p a t t e r n a a n r d a w t i r e c u r i n g i n t o t h e a t i r e r u b b e r f i t t o f o r o b t h e t a i n r o a d r r e q u i r e s e d i s t a n a n d t i n c h a r a c t e c r e a s e s r i s t i c s .

r e il a b i il

T h t y i s o f

P L C t h e a p p il c a s y s t e m t i o n a n d s u b s t a n t i a ll y t h e q u a il t y o f r e d u c e s t h e p r o d t h e u c t .

s p a c e

R u b b e r P r o d u c t i o n .

P L C s p r o v i d e a c c u r a t e s c a l e c o n t r o l , m i x e r l o g i c f u n c t i o n s , a n d m u o f l t i p r u b l e b e f o r m u l a r .

T h e s o p e r a y s t e m t i o n m o f a x i c a r b o n m i z e s b u t i l a c l i z a k t i

, o o li , n a n d o f m p a c i g m e h i n e n t t u o o s e l s d i n t h e d u r i n g p r o d u c t i o n p r o d u c t i o n t s c o h e d u l s u p e r e s v i

, s t r e t a c h k e s p r i n p r o c e s s o d u c t i o n a i n v e c t i v i t n t o r y a i e n d s , a n d t h e s h i r e f t d u c e

e n d s r e t i m p o e a r t s .

n d p e r s o n n e l r e q u i r e d

P l a s t i c I n j e c t i o n

m a i n t a i n c o n s i s t e

M o l d i n g .

n t f li il n g , r e

A d u

P L C c e s s y s t e m u r f a c e d c o n t r o l s e f e c t s , a v a r i a b l e s , n d s h o r t e n s u a n d p r o v i p r e s s d e s u r c l o e , s e w h i c h d l o o p a r i n e j e u s e d c t i o n , t o o p t i m i z e w h e r e s e v t h e e r a l i n j e c t i o n v e l o c i t y l m o l e v e d i l s n g c a p r o c n b e e s p r s .

T h o g r a e m s y s t e m m e d t o c c y h c l e a s t i t e m p e r a t u r e m e .

Table 1-2 continued.

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Introduction to

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1

1-5 PLC P

RODUCT

A

PPLICATION

R

ANGES

Figure 1-13 graphically illustrates programmable controller product ranges.

This chart is not definitive, but for practical purposes, it is valid. The PLC market can be segmented into five groups:

1. micro PLCs

2. small PLCs

3. medium PLCs

4. large PLCs

5. very large PLCs

5

C

4

B

3

A

2

1

32 64 128 512 1024 2048 4096

I/O Count

8192

Figure 1-13.

PLC product ranges.

Micro PLCs are used in applications controlling up to 32 input and output devices, 20 or less I/O being the norm. The micros are followed by the small

PLC category, which controls 32 to 128 I/O. The medium (64 to 1024 I/O), large (512 to 4096 I/O), and very large (2048 to 8192 I/O) PLCs complete the segmentation. Figure 1-14 shows several PLCs that fall into this category classification.

The A, B, and C overlapping areas in Figure 1-13 reflect enhancements, by adding options, of the standard features of the PLCs within a particular segment. These options allow a product to be closely matched to the application without having to purchase the next larger unit. Chapter 20

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Concepts

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HAPTER

1 covers, in detail, the differences between PLCs in overlapping areas. These differences include I/O count, memory size, programming language, software functions, and other factors. An understanding of the PLC product ranges and their characteristics will allow the user to properly identify the controller that will satisfy a particular application.

(a)

(c)

(b)

(d)

(e)

(f)

Figure 1-14. (a)

Mitsubishi’s smallest print size PLC (14 I/O),

(b)

PLC Direct DL105 with 18

I/O and a capacity of 6 amps per output channel,

(c)

Giddings & Lewis PIC90 capable of handling 128 I/O with motion control capabilities,

(d)

Allen-Bradley’s

PLC 5/15 (512 I/O),

(e)

Omron’s C200H PLC (1392 I/O), and

(f)

Allen-Bradley’s

PLC 5/80 (3072 I/O).

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1

1-6 L

ADDER

D

IAGRAMS AND THE

PLC

The ladder diagram has and continues to be the traditional way of representing electrical sequences of operations. These diagrams represent the interconnection of field devices in such a way that the activation, or turning

ON, of one device will turn ON another device according to a predetermined sequence of events. Figure 1-15 illustrates a simple electrical ladder diagram.

L1 L2

PB1 PL

LS1

LS2

Figure 1-15.

Simple electrical ladder diagram.

The original ladder diagrams were established to represent hardwired logic circuits used to control machines or equipment. Due to wide industry use, they became a standard way of communicating control information from the designers to the users of equipment. As programmable controllers were introduced, this type of circuit representation was also desirable because it was easy to use and interpret and was widely accepted in industry.

Programmable controllers can implement all of the “old” ladder diagram conditions and much more. Their purpose is to perform these control operations in a more reliable manner at a lower cost. A PLC implements, in its CPU, all of the old hardwired interconnections using its software instructions. This is accomplished using familiar ladder diagrams in a manner that is transparent to the engineer or programmer. As you will see throughout this book, a knowledge of PLC operation, scanning, and instruction programming is vital to the proper implementation of a control system.

Figure 1-16 illustrates the PLC transformation of the simple diagram shown in Figure 1-15 to a PLC format. Note that the “real” I/O field devices are connected to input and output interfaces, while the ladder program is implemented in a manner, similar to hardwiring, inside the programmable controller (i.e., softwired inside the PLC’s CPU instead of hardwired in a panel). As previously mentioned, the CPU reads the status of inputs, energizes the corresponding circuit element according to the program, and controls a real output device via the output interfaces.

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Introductory

Concepts

L1

PB1

L2

PB1 LS1 PL

Introduction to

Programmable Controllers

C

HAPTER

1

L1

PL

L2

LS1

LS2

LS2 represents input module represents output module

Figure 1-16.

PLC implementation of Figure 1-15.

As you will see later, each instruction is represented inside the PLC by a reference address, an alphanumeric value by which each device is known in the PLC program. For example, the push button PB1 is represented inside the

PLC by the name PB1 (indicated on top of the instruction symbol) and likewise for the other devices shown in Figure 1-16. These instructions are represented here, for simplicity, with the same device and instruction names.

Chapters 3 and 5 further discuss basic addressing techniques, while Chapter

6 covers input/output wiring connections. Example 1-1 illustrates the similarity in operation between hardwired and PLC circuits.

E

XAMPLE

1-1

In the hardwired circuit shown in Figure 1-15, the pilot light PL will turn

ON if the limit switch LS1 closes and if either push button PB1 or limit switch LS2 closes. In the PLC circuit, the same series of events will cause the pilot light—connected to an output module—to turn ON.

Note that in the PLC circuit in Figure 1-16, the internal representation of contacts provides the equivalent power logic as a hardwired circuit when the referenced input field device closes or is pushed. Sketch hardwired and PLC implementation diagrams for the circuit in Figure

1-15 illustrating the configurations of inputs that will turn PL ON.

S

OLUTION

Figure 1-17 shows several possible configurations for the circuit in

Figure 1-15. The highlighted blue lines indicate that power is present at that connection point, which is also the way a programming or monitoring device represents power in a PLC circuit. The last two configurations in Figure 1-17 are the only ones that will turn PL ON.

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1

Introductory

Concepts

PB1

Hardwired

LS1

PL

LS2

Description

No Event

Takes Place

PB1 is Open

LS1 is Open

LS2 is Open

PL is OFF

PB1

LS1

LS2

Introduction to

Programmable Controllers

C

HAPTER

1

PLC

PB1 LS1

PL

PL

LS2

PB1

LS1

PL

LS2

PB1 is Closed

LS1 is Open

LS2 is Open

PL is OFF

PB1

LS1

LS2

PB1

LS1

PL

LS2

PB1 is Closed

LS1 is Open

LS2 is Closed

PL is OFF

PB1

LS1

LS2

PB1

LS1

PL

LS2

PB1 is Closed

LS1 is Closed

LS2 is Open

PL is ON

PB1

LS1

LS2

PB1 LS1

PL

LS2

PB1 LS1

PL

LS2

PB1 LS1

PL

LS2

PL

PL

PL

PB1

LS1

PL

LS2

PB1 is Open

LS1 is Closed

LS2 is Closed

PL is ON

PB1

LS1

LS2

PB1 LS1

PL

LS2

PL

Figure 1-17.

Possible configurations of inputs and corresponding outputs.

1-7 A

DVANTAGES OF

PLC

S

In general, PLC architecture is modular and flexible, allowing hardware and software elements to expand as the application requirements change. In the event that an application outgrows the limitations of the programmable controller, the unit can be easily replaced with a unit having greater memory and I/O capacity, and the old hardware can be reused for a smaller application.

A PLC system provides many benefits to control solutions, from reliability and repeatability to programmability. The benefits achieved with programmable controllers will grow with the individual using them—the more you learn about PLCs, the more you will be able to solve other control problems.

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1

Table 1-3 lists some of the many features and benefits obtained with a programmable controller.

I n h e r e n t F e a t u r e s

S o il d s t a t e c o m p o n e n t s

P r o g r a m m a b l e m e m o r y

S m a ll s i z e

M i c r o p r o c e s s o r b a s e d

S o f t w a r e t i m e r s / c o u n t e r s

S o f t w a r e c o n t r o l r e l a y s

M o d u l a r a r c h i t e c t u r e

V a r i e t y o f I / O i n t e r f a c e s

R e m o t e I / O s t a t i o n s

D i a g n o s t i c i n d i c a t o r s

M o d u l a r I / O i n t e r f a c e

Q u i c k I / O d i s c o n n e c t s

S y s t e m v a r i a b l e s s t o r e d i n m e m o r y d a t a

B e n e f i t s

• H i g h r e il a b i il t y

• S i m p il f i e s c h a n g e s

• F l e x i b l e c o n t r o l

• M i n i m a l s p a c e r e q u i r e m e n t s

• C o m m u n i c a t i o n c a p a b i il t y

• H i g h e r l e v e l o f p e r f o r m a n c e

• H i g h e r q u a il t y p r o d u c t s

• M u l t i f u n c t i o n a l c a p a b i il t y

• E il m i n a t e h a r d w a r e

• E a s li y c h a n g e d p r e s e t s

• R e d u c e h a r d w a r e / w i r i n g c o s t

• R e d u c e s p a c e r e q u i r e m e n t s

• I n s t a ll a t i o n f l e x i b i il t y

• E a s li y i n s t a ll e d

• R e d u c e s h a r d w a r e c o s t

• E x p a n d a b i il t y

• C o n t r o l s a v a r i e t y o f d e v i c e s

• E il m i n a t e s c u s t o m i z e d c o n t r o l

• E il m i n a t e l o n g w i r e / c o n d u i t r u n s

• R e d u c e t r o u b l e s h o o t i n g t i m e

• S i g n a l p r o p e r o p e r a t i o n

• N e a t a p p e a r a n c e o f c o n t r o l p a n e l

• E a s li y m a i n t a i n e d

• E a s li y w i r e d

• S e r v i c e w i t h o u t d i s t u r b i n g w i r i n g

U s e f u l

C a n b e m a n a g e m e n t / m a i n t e n a n c e o u t p u t i n r e p o r t f o r m

Table 1-3.

Typical programmable controller features and benefits.

Without question, the “programmable” feature provides the single greatest benefit for the use and installation of programmable controllers. Eliminating hardwired control in favor of programmable control is the first step towards achieving a flexible control system. Once installed, the control plan can be manually or automatically altered to meet day-to-day control requirements without changing the field wiring. This easy alteration is possible since there are no physical connections between the field input devices and output devices (see Figure 1-18), as in hardwired systems. The only connection is through the control program, which can be easily altered.

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Introductory

Concepts

L1

PLC

Power L1

5

6

3

4

1

2

L1

0

7

L2

POWER

RUN

OK

L1

PROG-E

CPU-E

L2

Introduction to

Programmable Controllers

C

HAPTER

1

L2

AC Power

For Outputs

PLC

Common L2

Ground

OUTPUTS

Common For Inputs

Figure 1-18.

Programmable controller I/O connection diagram showing no physical connections between the inputs and outputs.

A typical example of the benefits of softwiring is a solenoid that is controlled by two limit switches connected in series (see Figure 1-19a). Changing the solenoid operation by placing the two limit switches in parallel (see Figure 1-

19b) or by adding a third switch to the existing circuit (see Figure 1-19c) would take less than one minute in a PLC. In most cases, this simple program change can be made without shutting down the system. This same change to a hardwired system could take as much as thirty to sixty minutes of downtime, and even a half hour of downtime can mean a costly loss of production. A similar situation exists if there is a need to change a timer preset value or some other constant. A software timer in a PLC can be changed in as little as five seconds. A set of thumbwheel switches and a push button can be easily configured to input new preset values to any number of software timers. The time savings benefit of altering software timers, as opposed to altering several hardware timers, is obvious.

The hardware features of programmable controllers provide similar flexibility and cost savings. An intelligent CPU is capable of communicating with other intelligent devices. This capability allows the controller to be integrated into local or plantwide control schemes. With such a control

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1 configuration, a PLC can send useful English messages regarding the controlled system to an intelligent display. On the other hand, a PLC can receive supervisory information, such as production changes or scheduling information, from a host computer. A standard I/O system includes a variety of digital, analog, and special interface modules, which allow sophisticated control without the use of expensive, customized interface electronics.

HARDWIRED PLC

LS1 LS2

SOL

LS1 LS2

SOL

LS1

LS2

SOL

LS1

LS2

SOL

LS1 LS3

SOL

LS2

LS1 LS3

SOL

LS2

Figure 1-19.

Example of hardwiring changes as opposed to softwiring changes.

E

ASE OF

I

NSTALLATION

Several attributes make PLC installation an easy, cost-effective project. Its relatively small size allows a PLC to be conveniently located in less than half the space required by an equivalent relay control panel (see Figure 1-20). On a small-scale changeover from relays, a PLC’s small, modular construction allows it to be mounted in the same enclosure where the relays were located.

Actual changeover can be made quickly by simply connecting the input/ output devices to the prewired terminal strips.

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Figure 1-20.

Space-efficient design of a PLC.

In large installations, remote input/output stations are placed at optimum locations (see Figure 1-21). A coaxial cable or a twisted pair of wires connects the remote station to the CPU. This configuration results in a considerable reduction in material and labor costs as compared to a hardwired system, which would involve running multiple wires and installing large conduits.

The remote subsystem approach also means that various sections of a total system can be completely prewired by an OEM or PLC vendor prior to reaching the installation site. This approach considerably reduces the time spent by an electrician during an on-site installation.

PLC

Main

Plant

Location

Subsystem

3

4

5

6

7

0

1

2

3

4

5

6

7

0

1

2

3

4

5

6

7

0

1

2

3

4

5

6

7

0

1

2

Remote Location

Coaxial cable or twisted pair of wires used for subsystem communication

Subsystem

3

4

5

6

7

0

1

2

3

4

5

6

7

0

1

2

3

4

5

6

7

0

1

2

3

4

5

6

7

0

1

2

Remote Location

Subsystem

0

1

2

3

4

5

6

7

0

1

2

3

4

5

6

7

0

1

2

3

4

5

6

7

0

1

2

3

4

5

6

7

Remote Location

Wiring to many

I/O field devices from I/O modules

Figure 1-21.

Remote I/O station installation.

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1

E

ASE OF

M

AINTENANCE AND

T

ROUBLESHOOTING

From the beginning, programmable controllers have been designed with ease of maintenance in mind. With virtually all components being solid-state, maintenance is reduced to the replacement of modular, plug-in components.

Fault detection circuits and diagnostic indicators (see Figure 1-22), incorporated in each major component, signal whether the component is working properly or malfunctioning. In fact, most failures associated with a PLCbased system stem from failures directly related to the field input/output devices, rather than the PLC’s CPU or I/O interface system (see Figure 1-23).

However, the monitoring capability of a PLC system can easily detect and correct these field device failures.

(a)

(b)

Figure 1-22. (a)

A PLC processor and

(b)

an intelligent module containing several status indicators.

CPU

5%

I/O

10%

Field device failures

85%

Figure 1-23.

Failures in a PLC-based system.

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With the aid of the programming device, any programmed logic can be viewed to see if inputs or outputs are ON or OFF (see Figure 1-24).

Programmed instructions can also be written to enunciate certain failures.

Figure 1-24.

A programming device being used to monitor inputs and outputs, with highlighted contacts indicating an ON condition.

These and several other attributes of the PLC make it a valuable part of any control system. Once installed, its contribution will be quickly noticed and payback will be readily realized. The potential benefits of the PLC, like any intelligent device, will depend on the creativity with which it is applied.

It is obvious from the preceding discussion that the potential benefits of applying programmable controllers in an industrial application are substantial. The bottom line is that, through the use of programmable controllers, users will achieve high performance and reliability, resulting in higher quality at a reduced cost.

K

EY

T

ERMS address central processing unit (CPU) execute hardware input/output system interface ladder diagram programmable logic controller (PLC) programming device read relay logic scan software solid-state write

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C

HAPTER

T

WO

N

UMBER

S

YSTEMS

AND

C

ODES

I have often admired the mystical ways of

Pythagoras and the secret magic of numbers.

—Sir Thomas Browne

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Introductory

Concepts

Number Systems and Codes

C

HAPTER

2

C

HAPTER

H

IGHLIGHTS

In this chapter, we will explain the number systems and digital codes that are most often used in programmable controller applications. We will first introduce the four number systems most frequently used during input/output address assignment and programming: binary, octal, decimal, and hexadecimal. Then, we will discuss the binary coded decimal (BCD) and Gray codes, along with the ASCII character set and several PLC register formats. Since these codes and systems are the foundation of the logic behind PLCs, a basic knowledge of them will help you understand how PLCs work.

2-1 N

UMBER

S

YSTEMS

A familiarity with number systems is quite useful when working with programmable controllers, since a basic function of these devices is to represent, store, and operate on numbers, even when performing the simplest of operations. In general, programmable controllers use binary numbers in one form or another to represent various codes and quantities. Although these number operations are transparent for the most part, there are occasions where a knowledge of number systems is helpful.

First, let’s review some basics. The following statements apply to any number system:

• Every number system has a base or radix.

• Every system can be used for counting.

• Every system can be used to represent quantities or codes.

• Every system has a set of symbols.

The base of a number system determines the total number of unique symbols used by that system. The largest-valued symbol always has a value of one less than the base. Since the base defines the number of symbols, it is possible to have a number system of any base. However, number system bases are typically chosen for their convenience. The number systems usually encountered while using programmable controllers are base 2, base 8, base

10, and base 16. These systems are called binary, octal, decimal, and hexadecimal, respectively. To demonstrate the common characteristics of number systems, let’s first turn to the familiar decimal system.

D

ECIMAL

N

UMBER

S

YSTEM

The decimal number system, which is the most common to us, was undoubtedly developed because humans have ten fingers and ten toes. Thus, the base of the decimal number system is 10. The symbols, or digits, used in this system are 0, 1, 2, 3, 4, 5, 6, 7, 8, and 9. As noted earlier, the total number of symbols (10) is the same as the base, with the largest-valued symbol being

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1 ntroductory

Concepts

Number Systems and Codes

C

HAPTER

2 one less than the base (9 is one less than 10). Because the decimal system is so common, we rarely stop to think about how to express a number greater than 9, the largest-valued symbol. It is, however, important to note that the technique for representing a value greater than the largest symbol is the same for any number system.

In the decimal system, a place value, or weight, is assigned to each position that a number greater than 9 would hold, starting from right to left. The first position (see Figure 2-1), starting from the right-most position, is position 0, the second is position 1, and so on, up to the last position n. As shown in Figure

2-2, the weighted value of each position can be expressed as the base (10 in this case) raised to the power of n (the position). For the decimal system, then, the position weights from right to left are 1, 10, 100, 1000, etc. This method for computing the value of a number is known as the sum-of-the-

weights method.

Number

Position n. . . . . . 3 2 1 0

Value

V n

. . . V

3

V

2

V

1

V

0

Figure 2-1.

Place values.

Position ( n) 3 2 1 0

Value ( V) V

3

V

2

V

1

V

0

Weight Value = Base

Position

(Base = 10 for decimal)

10

0

= 1

10

1

= 10

10

2

= 100

10

3

= 1000

Figure 2-2.

Weighted values.

The value of a decimal number is computed by multiplying each digit by the weighted value of its position and then summing the results. Let’s take, for example, the number 9876. It can be expressed through the sum-of-theweights method as:

Position 3 2 1 0

Number 9 8 7 6

6 x 10

0

=

7 x 10

1

=

8 x 10

2

=

9 x 10

3

=

6

70

800

9000

9876

10

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Number Systems and Codes

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2

As you will see in other number systems, the decimal equivalent of any number can be computed by multiplying each digit by its base raised to the power of the digit’s position. This is shown below:

Position n 3 2 1 0

Number Z n

Z

3

Z

2

Z

1

Z

0

Base = b

Z

0

x b

0

= N

0

Z

1

x b

1

=

N

1

Z

2

x b

2

= N

2

Z

3

x b

3

= N

3

Z n

x b n

= N n

Therefore, the sum of N

0

through N

n

will be the decimal equivalent of the number in base b.

B

INARY

N

UMBER

S

YSTEM

The binary number system uses the number 2 as the base. Thus, the only allowable digits are 0 and 1; there are no 2s, 3s, etc. For devices such as programmable controllers and digital computers, the binary system is the most useful. It was adopted for convenience, since it is easier to design machines that distinguish between only two entities, or numbers (i.e., 0 and

1), rather than ten, as in decimal. Most physical elements have only two states: a light bulb is on or off, a valve is open or closed, a switch is on or off, and so on. In fact, you see this number system every time you use a computer—if you want to turn it on, you flip the switch to the 1 position; if you want to turn it off, you flip the switch to the 0 position (see Figure 2-3).

Digital circuits can distinguish between two voltage levels (e.g., +5 V and 0

V), which makes the binary system very useful for digital applications.

Figure 2-3.

The binary numbers, 1 and 0, on a computer’s power switch represent ON and

OFF, respectively.

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Number Systems and Codes

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2

As with the decimal system, expressing binary numbers greater than the largest-valued symbol (in this case 1) is accomplished by assigning a weighted value to each position from right to left. The weighted value

(decimal equivalent) of a binary number is computed the same way as it is for a decimal number—only instead of being 10 raised to the power of the position, it is 2 raised to the power of the position. For binary, then, the weighted values from right to left are 1, 2, 4, 8, 16, 32, 64, etc., representing positions 0, 1, 2, 3, 4, 5, 6, etc. Let’s calculate the decimal value that is equivalent to the value of the binary number 10110110:

Position

Number

7 6 5 4

1 0 1 1

3

0

2 1 0

1 1 0

2

0 x 2

0

=

1 x 2

1

=

1 x 2

2

=

0 x 2

3

=

1 x 2

4

=

1 x 2

5

=

0 x 2

6

=

1 x 2

7

=

16

32

0

128

182

10

4

0

0

2

Thus, the binary number 10110110 is equivalent to the number 182 in the decimal system. Each digit of a binary number is known as a bit; hence, this particular binary number, 10110110 (182 decimal), has 8 bits. A group of 4 bits is known as a nibble; a group of 8 bits is a byte; and a group of one or more bytes is a word. Figure 2-4 presents a binary number composed of 16 bits, with the least significant bit (LSB), the lowest valued bit in the word, and the

most significant bit (MSB), the largest valued bit in the word, identified.

Most

Significant Bit

(MSB) Bit

Least

Significant Bit

(LSB)

1 0 1 1 1 0 0 1 0 0 1 1 0 1 0 1

Byte Byte

Word

Figure 2-4.

One word, two bytes, sixteen bits.

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Counting in binary is a little more awkward than counting in decimal for the simple reason that we are not used to it. Because the binary number system uses only two digits, we can only count from 0 to 1—only one change in one digit location (OFF to ON) before a new digit position must be added.

Conversely, in the decimal system, we can count from 0 to 9, equaling ten digit transitions, before a new digit position is added.

In binary, just like in decimal, we add another digit position once we run out of transitions. So, when we count in binary, the digit following 0 and 1 is 10

(one-zero, not ten), just like when we count 0, 1, 2…9 in decimal, another digit position is added and the next digit is 10 (ten). Table 2-1 shows a count in binary from 0

10 to 15

10

.

D e c i m a l

6

7

8

9

4

5

2

3

0

1

1 0

1 1

1 2

1 3

1 4

1 5

Table 2-1.

Decimal and binary counting.

B i n a r y

1 0 0

1 0 1

1 1 0

1 1 1

1 0 0 0

1 0 0 1

1 0

1 1

0

1

1 0 1 0

1 0 1 1

1 1 0 0

1 1 0 1

1 1 1 0

1 1 1 1

O

CTAL

N

UMBER

S

YSTEM

Writing a number in binary requires substantially more digits than writing it in decimal. For example, 91

10

equals 1011011

2

. Too many binary digits can be cumbersome to read and write, especially for humans. Therefore, the

octal numbering system is often used to represent binary numbers using fewer digits. The octal number system uses the number 8 as its base, with its eight digits being 0, 1, 2, 3, 4, 5, 6, and 7. Table 2-2 shows both an octal and a binary count representation of the numbers 0 through 15 (decimal).

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D e c i m a l

1 2

1 3

1 4

1 5

1 0

1 1

8

9

6

7

4

5

2

3

0

1

B i n a r y

1 0 0 0

1 0 0 1

1 0 1 0

1 0 1 1

1 1 0 0

1 1 0 1

1 1 1 0

1 1 1 1

1 0 0

1 0 1

1 1 0

1 1 1

1 0

1 1

0

1

O c t a l

1 4

1 5

1 6

1 7

1 0

1 1

1 2

1 3

6

7

4

5

2

3

0

1

Table 2-2.

Decimal, binary, and octal counting.

Like all other number systems, each digit in an octal number has a weighted decimal value according to its position. For example, the octal number 1767 is equivalent to the decimal number 1015:

Position 3 2 1 0

Number 1 7 6 7

8

7 x 8

0

=

6 x 8

1

=

7 x 8

2

=

1 x 8

3

=

7

48

448

512

1015

10

As noted earlier, the octal numbering system is used as a convenient way of writing a binary number. The octal system has a base of 8 (2 3 ), making it possible to represent any binary number in octal by grouping binary bits in groups of three. In this manner, a very large binary number can be easily represented by an octal number with significantly fewer digits. For example:

1 1 1 0 0 0 1 1 1 1 1 0 1 0 1 1

Binary Number

1 1 1 0 0 0 1 1 1 1 1 0 1 0 1 1

3-Bit Groups

1 6 1 7 5 3

Octal Digits

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So, a 16-bit binary number can be represented directly by six digits in octal.

As you will see later, many programmable controllers use the octal number system for referencing input/output and memory addresses.

H

EXADECIMAL

N

UMBER

S

YSTEM

The hexadecimal (hex) number system uses 16 as its base. It consists of 16 digits—the numbers 0 through 9 and the letters A through F (which represent the numbers 10 through 15, respectively). The hexadecimal system is used for the same reason as the octal system, to express binary numbers using fewer digits. The hexadecimal numbering system uses one digit to represent four binary digits (or bits), instead of three as in the octal system. Table 2-3 shows a hexadecimal count example of the numbers 0 through 15 with their decimal and binary equivalents.

B i n a r y

1 0 0 1

1 0 1 0

1 0 1 1

1 1 0 0

1 1 0 1

1 1 1 0

1 1 1 1

1 0

1 1

0

1

1 0 0

1 0 1

1 1 0

1 1 1

1 0 0 0

D e c

9

1 0

1 1

1 2

1 3

1 4

1 5

7

8

5

6

2

3

0

1

4

i m a l H e x a d e c i m a l

9

A

B

C

D

E

F

7

8

5

6

2

3

0

1

4

Table 2-3.

Binary, decimal, and hexadecimal counting.

As with the other number systems, hexadecimal numbers can be represented by their decimal equivalents using the sum-of-the-weights method. The decimal values of the letter-represented hex digits A through F are used when computing the decimal equivalent (10 for A, 11 for B, and so on). The following example uses the sum-of-the-weights method to transform the hexadecimal number F1A6 into its decimal equivalent. The value of A in the example is 10 times 16

1

, while F is 15 times 16

3

. Thus, the hexadecimal number F1A6 is equivalent to the decimal number 61,862:

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Position 3 2 1 0

Number F 1 A 6

16

6 x 16

0

=

10 x 16

1

=

1 x 16

2

=

15 x 16

3

=

6

160

256

61440

61862

10

Like octal numbers, hexadecimal numbers can easily be converted to binary without any mathematical transformation. To convert a hexadecimal number to binary, simply write the 4-bit binary equivalent of the hex digit for each position. For example:

F 1 A 6

1 1 1 1 0 0 0 1 1 0 1 0 0 1 1 0

2-2 N

UMBER

C

ONVERSIONS

In the previous section, you saw how a number of any base can be converted to the familiar decimal system using the sum-of-the-weights method. In this section, we will show you how a decimal number can be converted to binary, octal, or any number system.

To convert a decimal number to its equivalent in any base, you must perform a series of divisions by the desired base. The conversion process starts by dividing the decimal number by the base. If there is a remainder, it is placed in the least significant digit (right-most) position of the new base number. If there is no remainder, a 0 is placed in least significant digit position. The result of the division is then brought down, and the process is repeated until the final result of the successive divisions is 0. This methodology may be a little cumbersome; however, it is the easiest conversion method to understand and employ.

As a generic example, let’s find the base 5 equivalent of the number Z (see

Figure 2-5). The first division (Z

÷

5) gives an N

1 result and a remainder R

1

.

The remainder R

1 becomes the first digit of the base 5 number (the least significant digit). To obtain the next base 5 digit, the N

1 result is again divided

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2 by 5, giving an N

2 result and an R

2

remainder that becomes the second base 5 digit. This process is repeated until the result of the division (N

n

÷

5) is 0, giving the last remainder R

n

, which becomes the most significant digit (leftmost digit) of the base 5 number.

Division

Z

÷

5 = N

1

N

1

÷

5 = N

2

N

2

÷

5 = N

3

N

3

÷

5 =

N

4

Remainder

R

1

R

2

R

3

R

4

Nn

÷

5 = 0

New base 5 number is ( Rn ... R

4

R

3

R

2

R

1

)

5

Rn

Figure 2-5.

Method for converting a decimal number into any base.

Now, let’s convert the decimal number 35

10

to its binary (base 2) equivalent using this method:

Division

35

÷

2 = 17

17

÷

2 = 8

8

÷

2 = 4

4

÷

2 = 2

2

÷

2 = 1

1

÷

2 = 0

Remainder

0

0

0

1

1

1

Therefore, the base 2 (binary) equivalent of the decimal number 35 is

100011.

As another exercise, let’s convert the number 1355

10

to its hexadecimal (base

16) equivalent:

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Division

1355

÷

16 = 84

84

÷

16 = 5

5

÷

16 = 0

Remainder

11

4

5

Thus, the hexadecimal equivalent of 1355

10

is 54B hex

(remember that the hexadecimal system uses the letter B to represent the number 11).

There is another method, which is a little faster, for computing the binary equivalent of a decimal number. This method employs division by eight, instead of by two, to convert the number first to octal and then to binary from octal (three bits at a time).

For instance, let’s take the number 145

10

:

Division

145

÷

8 = 18

18

÷

8 = 2

2

÷

8 = 0

Remainder

1

2

2

The octal equivalent of 145

10

is 221

8

, so from Table 2-2, we can find that 221

8 equals 010010001 binary:

2 2 1

8

0 1 0 0 1 0 0 0 1

2

2-3 O

NE

S AND

T

WO

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OMPLEMENT

The one’s and two’s complements of a binary number are operations used by programmable controllers, as well as computers, to perform internal mathematical calculations. To complement a binary number means to change it to a negative number. This allows the basic arithmetic operations of

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2 subtraction, multiplication, and division to be performed through successive addition. For example, to subtract the number 20 from the number 40, first complement 20 to obtain –20, and then perform an addition.

The intention of this section is to introduce the basic concepts of complementing, rather than to provide a thorough analysis of arithmetic operations. For more information on this subject, please use the references listed in the back of this book.

O

NE

S

C

OMPLEMENT

Let’s assume that we have a 5-bit binary number that we wish to represent as a negative number. The number is decimal 23, or binary:

10111

2

There are two ways to represent this number as a negative number. The first method is to simply place a minus sign in front of the number, as we do with decimal numbers:

–(10111)

2

This method is suitable for us, but it is impossible for programmable controllers and computers to interpret, since the only symbols they use are binary 1s and 0s. To represent negative numbers, then, some digital computing devices use what is known as the one’s complement method. First, the one’s complement method places an extra bit (sign bit) in the most significant

(left-most) position and lets this bit determine whether the number is positive or negative. The number is positive if the sign bit is 0 and negative if the sign bit is 1. Using the one’s complement method, +23 decimal is represented in binary as shown here with the sign bit (0) indicated in bold:

0 10111

2

The negative representation of binary 10111 is obtained by placing a 1 in the most significant bit position and inverting each bit in the number (changing

1s to 0s and 0s to 1s). So, the one’s complement of binary 10111 is:

1 01000

2

If a negative number is given in binary, its one’s complement is obtained in the same fashion.

–15

10

= 1 0000

2

+15

10

= 0 1111

2

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OMPLEMENT

The two’s complement is similar to the one’s complement in the sense that one extra digit is used to represent the sign. The two’s complement computation, however, is slightly different. In the one’s complement, all bits are inverted; but in the two’s complement, each bit, from right to left, is inverted only after the first 1 is detected. Let’s use the number +22 decimal as an example:

+22

10

= 0 10110

2

Its two’s complement would be:

–22

10

= 1 01010

2

Note that in the negative representation of the number 22, starting from the right, the first digit is a 0, so it is not inverted; the second digit is a 1, so all digits after this one are inverted.

If a negative number is given in two’s complement, its complement (a positive number) is found in the same fashion:

–14

10

= 1 10010

2

+14

10

= 0 01110

2

Again, all bits from right to left are inverted after the first 1 is detected. Other examples of the two’s complement are shown here:

+17

10

= 0 10001

2

–17

10

= 1 01111

2

+7

10

= 0 00111

2

–7

10

= 1 11001

2

+1

10

= 0 00001

2

–1

10

= 1 11111

2

The two’s complement of 0 does not really exist, since no first 1 is ever encountered in the number. The two’s complement of 0, then, is 0.

The two’s complement is the most common arithmetic method used in computers, as well as programmable controllers.

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2-4 B

INARY

C

ODES

An important requirement of programmable controllers is communication with various external devices that either supply information to the controller or receive information from the controller. This input/output function involves the transmission, manipulation, and storage of binary data that, at some point, must be interpreted by humans. Although machines can easily handle this binary data, we require that the data be converted to a more interpretable form.

One way of satisfying this requirement is to assign a unique combination of

1s and 0s to each number, letter, or symbol that must be represented. This technique is called binary coding. In general, there are two categories of codes—those that represent numbers only and those that represent letters, symbols, and decimal numbers.

Several codes for representing numbers, symbols, and letters are standard throughout the industry. Among the most common are the following:

• ASCII

• BCD

• Gray

ASCII

Alphanumeric codes (which use a combination of letters, symbols, and decimal numbers) are used when information processing equipment, such as printers and cathode ray tubes (CRTs), must process the alphabet along with numbers and special symbols. These alphanumeric characters—26 letters

(uppercase), 10 numerals (0-9), plus mathematical and punctuation symbols—can be represented using a 6-bit code (i.e., 2 6 = 64 possible characters).

The most common code for alphanumeric representation is ASCII (the

American Standard Code for Information Interchange).

An ASCII (pronounced as-kee) code can be 6, 7, or 8 bits. Although a 6-bit code (64 possible characters) can accommodate the basic alphabet, numbers, and special symbols, standard ASCII character sets use a 7-bit code (2 7 = 128 possible characters), which provides room for lower case and control characters, in addition to the characters already mentioned. This 7-bit code provides all possible combinations of characters used when communicating with peripherals and interfaces.

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An 8-bit ASCII code is used when parity check (see Chapter 4) is added to a standard 7-bit code for error-checking purposes (note that all eight bits can still fit in one byte). Figure 2-6a shows the binary ASCII code representation of the letter Z (132

8

). This letter is generally sent and received in serial form between the PLC and other equipment.

Figure 2-6b illustrates a typical ASCII transmission, again using the character Z as an example. Note that extra bits have been added to the beginning and end of the character to signify the start and stop of the ASCII transmission. Appendix B shows a standard ASCII table, while Chapter 8 further explains serial communication.

Parity Bit Even P = 0

Odd P = 1

P 1 0 1 1 0 1 0

1 3 2

(a)

Z = 132 in 7-bit ASCII code

Bit Number

1

0 1 0 1 1 0 1 0

2 8 9 3 4 5 6

(b) 01011010

2

=

Z

7 10

Figure 2-6. (a)

ASCII representation of the character

Z and

(b)

the ASCII transmission of the character Z.

BCD

The binary coded decimal (BCD) system was introduced as a convenient way for humans to (1) handle numbers that must be input to digital machines and (2) interpret numbers that are output from machines. The best solution to this problem was to convert a code readily handled by man (decimal) to a code readily handled by processing equipment (binary). The result was BCD.

The decimal system uses the numbers 0 through 9 as its digits, whereas BCD represents each of these numbers as a 4-bit binary number. Table 2-4 illustrates the relationship between the BCD code and the binary and decimal number systems.

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D e c i m a l

5

6

3

4

7

8

9

0

1

2

B i n a r y

0

1

1 0

1 1

1 0 0

1 0 1

1 1 0

1 1 1

1 0 0 0

1 0 0 1

Table 2-4.

Decimal, binary, and BCD counting.

B C D

0 0 0 0

0 0 0 1

0 0 1 0

0 0 1 1

0 1 0 0

0 1 0 1

0 1 1 0

0 1 1 1

1 0 0 0

1 0 0 1

The BCD representation of a decimal number is obtained by replacing each decimal digit with its BCD equivalent. The BCD representation of decimal

7493 is shown here as an example:

BCD

Decimal

0111

7

0100

4

1001

9

0011

3

Typical PLC applications of BCD codes include data entry (time, volume, weight, etc.) via thumbwheel switches (TWS), data display via sevensegment displays, input from absolute encoders, and analog input/output instructions. Figure 2-7 shows a thumbwheel switch and a seven-segment indicator field device.

(a)

(b)

Figure 2-7.

(a)

A seven-segment indicator field device and

(b)

a thumbwheel switch.

Nowadays, the circuitry necessary to convert from decimal to BCD and from

BCD to seven-segment is already built into thumbwheel switches and sevensegment LED devices (see Figures 2-8a and 2-8b). This BCD data is converted internally by the PLC into the binary equivalent of the input data.

Input and output of BCD data requires four lines of an input/output interface for each decimal digit.

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One-digit

7-segment display

One-digit

TWS

5

Four wires provided per one-digit

BCD number

BCD input to

PLC

BCD output from

PLC

Four wires provided per one-digit

BCD number

Decimal converted to BCD inside TWS

(a)

(a)

BCD converted to 7-segment inside display

(b)

(b)

Figure 2-8. (a)

Thumbwheel switch converts decimal numbers into BCD inputs for the PLC.

(b)

The seven-segment display converts the BCD outputs from the PLC into a decimal number.

G

RAY

The Gray code is one of a series of cyclic codes known as reflected codes and is suited primarily for position transducers. It is basically a binary code that has been modified in such a way that only one bit changes as the counting number increases. In standard binary, as many as four digits can change when counting with as few as four binary digits. This drastic change is seen in the transition from binary 7 to 8. Such a change allows a great chance for error, which is unsuitable for positioning applications. Thus, most encoders use the Gray code to determine angular position. Table 2-5 shows this code with its binary and decimal equivalents for comparison.

G r a y C o d e

1 1 0 0

1 1 0 1

1 1 1 1

1 1 1 0

1 0 1 0

1 0 1 1

1 0 0 1

0 0 0 0

0 0 0 1

0 0 1 1

0 0 1 0

0 1 1 0

0 1 1 1

0 1 0 1

0 1 0 0

1 0 0 0

B

1

i n a r

1 0 0

1 0 1

1 1 0

1 1 1

1 0 0 0

1 0 0 1

1 0 1 0

1 0 1 1

1 0

1 1

0

1

1 1 0 0

1 1 0 1

1 1 1 0

1 1 1

y D e c i m a l

1 0

1 1

8

9

1 2

1 3

1 4

6

7

4

5

2

3

0

1

1 5

Table 2-5.

Gray code, binary, and decimal counting.

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An example of a Gray code application is an optical absolute encoder. In this encoder, the rotor disk consists of opaque and transparent segments arranged in a Gray code pattern and illuminated by a light source that shines through the transparent sections of the rotating disk. The transmitted light is received at the other end in Gray code form and is available for input to the PLC in either Gray code or BCD code, if converted. Figure 2-9 illustrates a typical absolute encoder and its output.

Phototransistors

Gray Code

Gray

Code

Output

BCD

Output

Drive Shaft

Converter

LED

Rotary Disc

Optic System

Figure 2-9.

An absolute encoder with BCD and Gray outputs.

2-5 R

EGISTER

W

ORD

F

ORMATS

As previously mentioned, a programmable controller performs all of its internal operations in binary format using 1s and 0s. In addition, the status of

I/O field devices is also read and written, in binary form, to and from the

PLC’s CPU. Generally, these operations are performed using a group of 16 bits that represent numbers and codes. Recall that the grouping of bits with which a particular machine operates is called a word. A PLC word is also called a register or location. Figure 2-10 illustrates a 16-bit register composed of a two-byte word.

Most

Significant Bit

Least

Significant Bit

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Most Significant Byte Least Significant Byte

Figure 2-10.

A 16-bit register/word.

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Although the data stored in a register is represented by binary 1s and 0s, the format in which this binary data is stored may differ from one programmable controller to another. Generally, data is represented in either straight

(noncoded) binary or binary coded decimal (BCD) format. Let’s examine these two formats.

B

INARY

F

ORMAT

Data stored in binary format can be directly converted to its decimal equivalent without any special restrictions. In this format, a 16-bit register can represent a maximum value of 65535

10

. Figure 2-11 shows the value

65535

10

in binary format (all bits are 1). The binary format represents the status of a device as either 0 or 1, which is interpreted by the programmable controller as ON or OFF. All of these statuses are stored in registers or words.

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

Figure 2-11.

A 16-bit register containing the binary equivalent of 65535

10

.

If the most significant bit of the register in Figure 2-12 is used as a sign bit, then the maximum decimal value that the 16-bit register can store is +32767

10 or –32767

10

.

Sign Bit

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

+32767

10

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1

-32767

10

Figure 2-12.

Two 16-bit registers with sign bits (MSB).

The decimal equivalents of these binary representations can be calculated using the sum-of-the-weights method. The negative representation of

32767

10

, as shown in Figure 2-12, was derived using the two’s complement method. As an exercise, practice computing these numbers (refer to Section

2-3 for help).

BCD F

ORMAT

The BCD format uses four bits to represent a single decimal digit. The only decimal numbers that these four bits can represent are 0 through 9. Some

PLCs operate and store data in several of their software instructions, such as arithmetic and data manipulations, using the BCD format.

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In BCD format, a 16-bit register can hold up to a 4-digit decimal value, with the decimal values that can be represented ranging from 0000–9999. Figure

2-13 shows a register containing the binary representation of BCD 9999.

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1

9 9 9 9

Figure 2-13.

Register containing BCD 9999.

In a PLC, the BCD values stored in a register or word can be the result of

BCD data input from a thumbwheel switch. A 4-digit thumbwheel switch will use a 16-bit register to store the BCD output data obtained during the read section of the scan (see Figure 2-14).

5 3 2 6

BCD Output

To PLC

0101 0011 0010 0111

Figure 2-14.

A 4-digit TWS using a 16-bit register to store BCD values.

E

XAMPLE

2-1

Illustrate how a PLC’s 16-bit register containing the BCD number

7815 would connect to a 4-digit, seven-segment display. Indicate the most significant digit and the least significant digit of the sevensegment display.

S

OLUTION

Figure 2-15 illustrates the connection between a 16-bit register and a

4-digit, seven-segment display. The BCD output from the PLC register or word is sent to the seven-segment indicator through an output interface during the write, or update, section of the scan.

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2

4 Bits 4 Bits 4 Bits 4 Bits

0111 1000 0001 0101

Data Sent

From PLC

Most

Significant

Digit

Least

Significant

Digit

Figure 2-15.

A 16-bit PLC register holding the BCD number 7815.

K

EY

T

ERMS alphanumeric code

ASCII base binary coded decimal (BCD) bit byte decimal number system

Gray code hexadecimal number system least significant bit (LSB) least significant digit most significant bit (MSB) most significant digit nibble octal number system one’s complement register sum-of-the-weights method two’s complement weighted value word

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OGIC

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Science when well digested is nothing but good sense and reason.

—Leszinski Stanislas

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IGHLIGHTS

To understand programmable controllers and their applications, you must first understand the logic concepts behind them. In this chapter, we will discuss three basic logic functions—AND, OR, and NOT—and show you how, with just these three functions, you can make control decisions ranging from very simple to very complex. We will also introduce you to the fundamentals of Boolean algebra and its associated operators. Finally, we will explain the relationship between Boolean algebra and logic contact symbology, so that you will be ready to learn about PLC processors and their programming devices.

3-1 T

HE

B

INARY

C

ONCEPT

The binary concept is not a new idea; in fact, it is a very old one. It simply refers to the idea that many things exist only in two predetermined states. For instance, a light can be on or off, a switch open or closed, or a motor running or stopped. In digital systems, these two-state conditions can be thought of as signals that are present or not present, activated or not activated, high or low, on or off, etc. This two-state concept can be the basis for making decisions; and since it is very adaptable to the binary number system, it is a fundamental building block for programmable controllers and digital computers.

Here, and throughout this book, binary 1 represents the presence of a signal

(or the occurrence of some event), while binary 0 represents the absence of the signal (or the nonoccurrence of the event). In digital systems, these two states are actually represented by two distinct voltage levels, +V and 0V, as shown in Table 3-1. One voltage is more positive (or at a higher reference) than the other. Often, binary 1 (or logic 1) is referred to as TRUE, ON, or

HIGH, while binary 0 (or logic 0) is referred to as FALSE, OFF, or LOW.

1 ( + V )

O p e r a t i n g

R i n g i n g

O n

B l o w i n g

R u n n i n g

E n g a g e d

C l o s e d

0 ( 0 V )

N o t

N o t o p e r a t i n g r i n g i n g

O f f

S li e n t

S t o p p e d

D i s e n g a g e d

O p e n

E x a m p l e

L i m i t s w i t c h

B e ll

L i g h t

H o r n b u l b

M o t o r

C l u t c h

V a l v e

Table 3-1.

Binary concept using positive logic.

Note that in Table 3-1, the more positive voltage (represented as logic 1) and the less positive voltage (represented as logic 0) were arbitrarily chosen. The use of binary logic to represent the more positive voltage level, meaning the occurrence of some event, as 1 is referred to as positive logic.

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Negative logic, as illustrated in Table 3-2, uses 0 to represent the more positive voltage level, or the occurrence of the event. Consequently, 1 represents the nonoccurrence of the event, or the less positive voltage level.

Although positive logic is the more conventional of the two, negative logic is sometimes more convenient in an application.

1 ( + V )

N o t o p e r a t i n g

N o t

O f f r i n g i n g

S li e n t

S t o p p e d

D i s e n g a g e d

O p e n

0 ( 0

O p e

V )

r a t i n g

R i n g i n g

O n

B l o w i n g

R u n n i n g

E n g a g e d

C l o s e d

Table 3-2.

Binary concept using negative logic.

E x a m p l e

L i m i t s w i t c h

B e ll

L i g h t b u l b

H o r n

M o t o r

C l u t c h

V a l v e

3-2 L

OGIC

F

UNCTIONS

The binary concept shows how physical quantities (binary variables) that can exist in one of two states can be represented as 1 or 0. Now, you will see how statements that combine two or more of these binary variables can result in either a TRUE or FALSE condition, represented by 1 and 0, respectively.

Programmable controllers make decisions based on the results of these kinds of logical statements.

Operations performed by digital equipment, such as programmable controllers, are based on three fundamental logic functions—AND, OR, and NOT.

These functions combine binary variables to form statements. Each function has a rule that determines the statement outcome (TRUE or FALSE) and a symbol that represents it. For the purpose of this discussion, the result of a statement is called an output (Y), and the conditions of the statement are called inputs (A and B). Both the inputs and outputs represent two-state variables, such as those discussed earlier in this section.

T

HE

AND F

UNCTION

Figure 3-1 shows a symbol called an AND gate, which is used to graphically represent the AND function. The AND output is TRUE (1) only if all inputs are TRUE (1).

Inputs

Output

Figure 3-1.

Symbol for the AND function.

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An AND function can have an unlimited number of inputs, but it can have only one output. Figure 3-2 shows a two-input AND gate and its resulting output Y, based on all possible input combinations. The letters A and B represent inputs to the controller. This mapping of outputs according to predefined inputs is called a truth table. Example 3-1 shows an application of the AND function.

A

B

Y

A

1

1

0

0

A N D r u t h T a b l e

I n p u t s O u t p u t

B

0

1

0

1

Y

0

1

0

0

Figure 3-2.

Two-input AND gate and its truth table.

E

XAMPLE

3-1

Show the logic gate, truth table, and circuit representations for an alarm horn that will sound if its two inputs, push buttons PB1 and PB2, are 1 (ON or depressed) at the same time.

S

OLUTION

PB1

PB2

Alarm Horn

P B 1

N o t p u s h e d

N o t p u s h e d

( 0 )

( 0 )

P u s h e d

P u s h e d

( 1 )

( 1 )

Logic Representation

P B 2

N o t

P u s h e d

N o t p p u u s s h h e

( 1 ) e d d

( 0 )

( 0 )

P u s h e d ( 1 )

A l a r m H o r n

S

S li li e n t e n t

( 0 )

( 0 )

S li e n t ( 0 )

S o u n d i n g ( 1 )

Line Voltage

L1

Line Voltage (Common)

L2

PB1

PB2

Electrical Ladder Circuit

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PB1 PB2

+

V

Electrical Circuit

T

HE

OR F

UNCTION

Figure 3-3 shows the OR gate symbol used to graphically represent the OR function. The OR output is TRUE (1) if one or more inputs are TRUE (1).

Inputs

Output

Figure 3-3.

Symbol for the OR function.

As with the AND function, an OR gate function can have an unlimited number of inputs but only one output. Figure 3-4 shows an OR function truth table and the resulting output Y, based on all possible input combinations.

Example 3-2 shows an application of the OR function.

A

B

Y

A

1

1

0

0

O R T r u t h T a b l e

I n p u t s O u t p u t

B

0

1

0

1

Y

1

1

0

1

Figure 3-4.

Two-input OR gate and its truth table.

E

XAMPLE

3-2

Show the logic gate, truth table, and circuit representations for an alarm horn that will sound if either of its inputs, push button PB1 or

PB2, is 1 (ON or depressed).

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PB1

PB2

Alarm Horn

Logic Representation

P B 1

N o t

N o t p p u u s s

P u s h e d

P u s h e d h h e e

( 1 )

( 1 ) d d

( 0 )

( 0 )

P B 2

N o t p u s h e d ( 0 )

P u s h e d ( 1 )

N o t p u s h e d ( 0 )

P u s h e d ( 1 )

PB1

A l a r m H o r n

S li e n t

S o u n d i

( 0 ) n g

S o u n d i n g

S o u n d i n g

(

( 1 )

1

( 1 )

)

PB2

V

Alarm

Horn

Line Voltage

L1

Line Voltage (Common)

L2

PB2

PB1

Electrical Ladder Circuit

T

HE

NOT F

UNCTION

Figure 3-5 illustrates the NOT symbol, which is used to graphically represent the NOT function. The NOT output is TRUE (1) if the input is FALSE (0).

Conversely, if the output is FALSE (0), the input is TRUE (1). The result of the NOT operation is always the inverse of the input; therefore, it is sometimes called an inverter.

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The NOT function, unlike the AND and OR functions, can have only one input. It is seldom used alone, but rather in conjunction with an AND or an OR gate. Figure 3-6 shows the NOT operation and its truth table. Note that an A with a bar on top represents NOT A.

Input Output

Figure 3-5.

Symbol for the NOT function.

NOT

A

NOT Truth Table

I n p u t O u t p u t

A

0

1

A

1

0

Figure 3-6.

NOT gate and its truth table.

At first glance, it is not as easy to visualize the application of the NOT function as it is the AND and OR functions. However, a closer examination of the

NOT function shows it to be simple and quite useful. At this point, it is helpful to recall three points that we have discussed:

1. Assigning a 1 or 0 to a condition is arbitrary.

2. A 1 is normally associated with TRUE, HIGH, ON, etc.

3. A 0 is normally associated with FALSE, LOW, OFF, etc.

Examining statements 2 and 3 shows that logic 1 is normally expected to activate some device (e.g., if Y = 1, then motor runs), and logic 0 is normally expected to deactivate some device (e.g., if Y = 0, then motor stops). If these conventions were reversed, such that logic 0 was expected to activate some device (e.g., if Y = 0, then motor runs) and logic 1 was expected to deactivate some device (e.g., Y = 1, then motor stops), the NOT function would then have a useful application.

1. A NOT is used when a 0 (LOW condition) must activate some device.

2. A NOT is used when a 1 (HIGH condition) must deactivate some device.

The following two examples show applications of the NOT function.

Although the NOT function is normally used in conjunction with the AND and OR functions, the first example shows the NOT function used alone.

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E

XAMPLE

3-3

Show the logic gate, truth table, and circuit representation for a solenoid valve (V1) that will be open (ON) if selector switch S1 is ON and if level switch L1 is NOT ON (liquid has not reached level).

S

OLUTION

V1

S1

Level

Switch

L1

S1

L1

V1

Logic Representation

L1

S1

1

1

0

0

L1 (L1)

0

1

0

1

1

0

1

0

Truth Table

V1

1

0

0

0

L2

L1

CR1

CR1-1

S1

V1

Electrical Ladder Circuit

Note:

In this example, the level switch L1 is normally open, but it closes when the liquid level reaches L1. The ladder circuit requires an auxiliary control relay (CR1) to implement the not normally open L1 signal. When L1 closes (ON), CR1 is energized, thus opening the normally closed CR1-1 contacts and deactivating V1. S1 is ON when the system operation is enabled.

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E

XAMPLE

3-4

Show the logic gate, truth table, and circuit representation for an alarm horn that will sound if push button PB1 is 1 (ON or depressed) and PB2 is NOT 0 (not depressed).

S

OLUTION

PB1

PB2

Alarm Horn

Logic Representation

P B 1

N o t p u s h e d

N o t p u s h e d

( 0 )

( 0 )

P u s h e d

P u s h e d

( 1 )

( 1 )

P B 2

N o t

P u s h e d

N o t p p u u s s h h e

( 1 ) e d d

( 0 )

( 0 )

P u s h e d ( 1 )

A l a r m H o r n

S

S li li e n t e n t

( 0 )

( 0 )

S o u n d i n g

S li e n t ( 0 )

( 1 )

PB1

PB2

+

V

Electrical Circuit

Line Voltage

L1

PB1

PB2

Line Voltage (Common)

L2

Electrical Ladder Circuit

Note:

In this example, the physical representation of a field device element that signifies the NOT function is represented as a normally closed, or not normally open, switch (PB2). In the logical representation section of this example, the push button switch is represented as NOT open by the symbol.

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The two previous examples showed the NOT symbol placed at inputs to a gate. A NOT symbol placed at the output of an AND gate will negate, or invert, the normal output result. A negated AND gate is called a NAND gate.

Figure 3-7 shows its logic symbol and truth table.

A

B

Y

A

0

0

1

1

N A N D T r u

I n p u t s

T a b l e

O u t p u t

B

0

1

0

1

Y

1

1

1

0

Figure 3-7.

Two-input NAND gate and its truth table.

The same principle applies if a NOT symbol is placed at the output of an OR gate. The normal output is negated, and the function is referred to as a NOR gate. Figure 3-8 shows its symbol and truth table.

A

B

Y

A

0

0

1

1

I n p u t s

B

0

1

0

1

O u t p u t

Y

1

0

0

0

Figure 3-8.

Two-input NOR gate and its truth table.

3-3 P

RINCIPLES OF

B

OOLEAN

A

LGEBRA AND

L

OGIC

An in-depth discussion of Boolean algebra is not required for the purposes of this book and is beyond the book’s scope. However, an understanding of the

Boolean techniques for writing shorthand expressions for complex logical statements can be useful when creating a control program of Boolean statements or conventional ladder diagrams.

In 1849, an Englishman named George Boole developed Boolean algebra.

The purpose of this algebra was to aid in the logic of reasoning, an ancient form of philosophy. It provided a simple way of writing complicated combinations of “logical statements,” defined as statements that can be either true or false.

When digital logic was developed in the 1960s, Boolean algebra proved to be a simple way to analyze and express digital logic statements, since all digital systems use a TRUE/FALSE, or two-valued, logic concept. Because of this

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3 relationship between digital logic and Boolean logic, you will occasionally hear logic gates referred to as Boolean gates, several interconnected gates called a Boolean network, or even a PLC language called a Boolean language.

Figure 3-9 summarizes the basic Boolean operators as they relate to the basic digital logic functions AND, OR, and NOT. These operators use capital letters to represent the wire label of an input signal, a multiplication sign (•) to represent the AND operation, and an addition sign (+) to represent the OR operation. A bar over a letter represents the NOT operation.

A

B

2

Logical Symbol

Ala

Y

Logical Statement

Y is 1 if A AND B are 1

Boolean Equation

Y = A • B

or

Y = AB

A

B

Y

Y is 1 if A OR B is 1 Y = A + B

A

Y

Y is 1 if A is 0

Y is 0 if A is 1

Y = A

Figure 3-9.

Boolean algebra as related to the AND, OR, and NOT functions.

In Figure 3-9, the AND gate has two input signals (A and B) and one output signal (Y). The output can be expressed by the logical statement:

Y is 1 if A AND B are 1.

The corresponding Boolean expression is:

Y = A B which is read Y equals A ANDed with B. The Boolean symbol for AND could be removed and the expression written as Y = AB. Similarly, if Y is the result of ORing A and B, the Boolean expression is:

Y = A + B which is read Y equals A ORed with B. In the NOT operation, where Y is the inverse of A, the Boolean expression is:

Y

=

A

which is read Y equals NOT A. Table 3-3 illustrates the basic Boolean operations of ANDing, ORing, and inversion. The table also illustrates how these functions can be combined to obtain any desired logic combination.

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1. Basic Gates. Basic logic gates implement simple logic functions. Each logic function is expressed in terms of a truth table and its Boolean expression.

A

B

AB

A

B

AB

A

B

A+B

A

B

A+B

A A

A B AB

0 0 0

0 1 0

1 0 0

1 1 1

AND

A B AB

0 0 1

0 1 1

1 0 1

1 1 0

NAND

A B A

+

B

0 0 0

0 1 1

1 0 1

1 1 1

OR

A B A

+

B

0 0 1

0 1 0

1 0 0

1 1 0

NOR

A A

0 1

1 0

NOT

2. Combined Gates. Any combination of control functions can be expressed in

Boolean terms using three simple operators: (•), (+), and (–).

A

AB

Y = AB + C

B

C

A

AB

Y = AB + C

B

C

A

A + B

Y = (A+B)(C)

B

C

A

A + B

Y = (A+B)(C)

B

C

3. Boolean Algebra Rules. Control logic functions can vary from simple to very complex combinations of input variables. However simple or complex the functions may be, they satisfy the following rules. These rules are a result of a simple combination of basic truth tables and may be used to simplify logic circuits.

Commutative Laws

A B B A

AB

=

BA

Associative Laws

A ( B C ) ( A B ) C

( ) ( )

De Morgan’s Laws

( A B ) AB

( AB ) A B

A

=

A , ,

=

A AB A B

AB

+ + = +

Distributive Laws

( )

=

AB

+

AC

A BC

=

( )(

+

Law of Absorption

(

+

)

= + =

A

)

Table 3-3.

Logic operations using Boolean algebra.

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4. Order of Operation and Grouping Signs. The order in which Boolean operations (AND, OR, NOT) are performed is important. This order will affect the resulting logic value of the expression. Consider the three input signals A, B, and C.

Combining them in the expression Y = A + B • C can result in misoperation of the output device Y, depending on the order in which the operations are performed.

Performing the OR operation prior to the AND operation is written ( A + B) • C, and performing the AND operation prior to the OR is written A + (B • C). The result of these two expressions is not the same.

The order of priority in Boolean expression is NOT (inversion) first, AND second, and OR last, unless otherwise indicated by grouping signs, such as parentheses, brackets, braces, or the vinculum. According to these rules, the previous expression A + B • C, without any grouping signs, will always be evaluated only as A + (B

• C). With the parentheses, it is obvious that B is ANDed with C prior to ORing the result with A. Knowing the order of evaluation, then, makes it possible to write the expression simply as A + BC, without fear of misoperation. As a matter of convention, the AND operator is usually omitted in Boolean expressions.

When working with Boolean logic expressions, misuse of grouping signs is a common occurrence. However, if the signs occur in pairs, they generally do not cause problems if they have been properly placed according to the desired logic. Enclosing two variables that are to be ANDed within parentheses is not necessary since the AND operator would normally be performed first. If two input signals are to be

ORed prior to ANDing, they must be placed within parentheses.

To ensure proper order of evaluation of an expression, use parentheses as grouping signs. If additional signs are required brackets [ ], and then braces { } are used.

An illustration of the use of grouping signs is shown below:

Y1 = Y2 + Y5 [X1(X2 + X3)] + {Y3[Y4(X5 + X6)]}

5. Application of De Morgan’s Laws. De Morgan’s Laws are frequently used to simplify inverted logic expressions or to simply convert an expression into a usable form.

According to De Morgan’s Laws:

A

B

Y=AB

AB

=

A

+

B

A A

B B

Y=A + B

A

B and

A

+

B

=

AB

A

Y=A + B

B

A

B

Y= A B

Table 3-3 continued.

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3-4 PLC C

IRCUITS AND

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OGIC

C

ONTACT

S

YMBOLOGY

Hardwired logic refers to logic control functions (timing, sequencing, and control) that are determined by the way devices are interconnected. In contrast to PLCs, in which logic functions are programmable and easily changed, hardwired logic is fixed and can be changed only by altering the way devices are physically connected or interwired. A prime function of a PLC is to replace existing hardwired control logic and to implement control functions for new systems. Figure 3-10a shows a typical hardwired relay logic circuit, and Figure 3-10b shows its PLC ladder diagram implementation. The important point about Figure 3-10 is not to understand the process of changing from one circuit to another, but to see the similarities in the representations.

The ladder circuit connections of the hardwired relay circuit are implemented in the PLC via software instructions, thus all of the wiring can be thought of as being inside the CPU (softwired as opposed to hardwired).

L1

PB1

STOP

PB2

STOP

PB3

START

M1

All

OL's1

L2

PB4

START

M1

S1

SWITCH

CR1

SOL1

PL1

PB5

EMERGENCY

STOP

PB6

STOP

PB7

START

M2

OL2

PB8

STOP

M2

PB9

START

M3

All

OL's3

M3

PB10

STOP

PB11

START

S2

SWITCH

M4

SEL3

M4

PL2

M5

M6

M7

M8

All

OL's4

OL5

OL's6

OL's7

All OL's8

Figure 3-10a.

Hardwired relay logic circuit.

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The logic implemented in PLCs is based on the three basic logic functions

(AND, OR, and NOT) that we discussed in the previous sections. These functions are used either alone or in combination to form instructions that will determine if a device is to be switched on or off. How these instructions are implemented to convey commands to the PLC is called the language. The most widely used languages for implementing on/off control and sequencing are ladder diagrams and Boolean mnemonics, among others. Chapter 9 discusses these languages at length.

The most conventional of the control languages is ladder diagram. Ladder diagrams are also called contact symbology, since their instructions are relay-equivalent contact symbols (i.e., normally open and normally closed contacts and coils).

L1 L2 L1 L2

PB1

0 1 2 30 M1

All

OL's1

0 30

PB2

3

1

PB3

30

2

PB4

4 31

SOL1

3 31

S1

4 32

PL1

4 32

PB5

5 6 7 33 M2

OL2

5 33

33

PB6

PB7

6

5 10 11 34 M3

All

OL's3

7

34

34

PB8

PB9

10

12 13 35 M1

All

OL's4

11 35

35

PB10

PB11

12

35 36

PL2

13

36

S2

14 15 37 M5

OL5

14 37

SEL3

37 40 M6

OL's6

15 40

37 41 M7

OL's7

41

37 42 M8

OL's8

42

Figure 3-10b.

PLC ladder diagram implementation of Figure 3-10a.

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Contact symbology is a very simple way of expressing control logic in terms of symbols that are used on relay control schematics. If the controller language is ladder diagram, the translation from existing relay logic to programmed logic is a one-step translation to contact symbology. If the language is Boolean mnemonics, conversion to contact symbology is not required, yet is still useful and quite often done to provide an easily understood piece of documentation. Table 3-6a, shown later, provides examples of simple translations from hardwired logic to programmed logic. Chapter 11 thoroughly explains these translations.

The complete ladder circuit, in Figure 3-10, shown earlier, can be thought of as being formed by individual circuits, each circuit having one output. Each of these circuits is known as a rung (or network); therefore, a rung is the contact symbology required to control an output in the PLC. Some controllers allow a rung to have multiple outputs, but one output per rung is the convention. Figure 3-11a illustrates the top rung of the hardwired circuit from

Figure 3-10, while Figure 3-11b shows the top rung of the equivalent PLC circuit. Note that the PLC diagram includes all of the field input and output devices connected to the interfaces that are used in the rung. A complete PLC ladder diagram program, then, consists of several rungs. Each rung controls an output interface that is connected to an output device, a piece of equipment that receives information from the PLC. Each rung is a combination of input conditions (symbols) connected from left to right between two vertical lines, with the symbol that represents the output at the far right.

L1

PB1

STOP

PB2

STOP

PB3

START

M1

All

OL's1

L2

PB4

START

M1

L1

PB1

0

L2

0 1 2 30

L1

30

M1

All

OL's1

L2

PB2

PB3

1

3

30

2

PB4

3

Figure 3-11. (a)

Top rung of the hardwired circuit from Figure 3-10 and

(b)

its equivalent PLC circuit.

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The symbols that represent the inputs are connected in series, parallel, or some combination to obtain the desired logic. These input symbols represent the

input devices that are connected to the PLC’s input interfaces. The input devices supply the PLC with field data. When completed, a ladder diagram control program consists of several rungs, with each rung controlling a specific output.

The programmed rung concept is a direct carryover from the hardwired relay ladder rung, in which input devices are connected in series and parallel to control various outputs. When activated, these input devices either allow current to flow through the circuit or cause a break in current flow, thereby switching the output devices ON or OFF. The input symbols on a ladder rung can represent signals generated by connected input devices, connected output devices, or outputs internal to the controller (see Table 3-4).

I n p u t D e v i c e s O u t p u t D e v i c e s

P u s h b u t t o n

S e l e c t o r s w i t c h

L i m i t s w i t c h

P r o x

T i m e i m r i t y s w i t c h c o n t a c t

P li o t

S o l e n o i d

H o r n il g h t v a l v e

C o n t r o l

T i m e r r e l a y

Table 3-4.

ON/OFF input and output devices.

A

DDRESSES

U

SED IN

PLC

S

Each symbol on a rung will have a reference number, which is the address in memory where the current status (1 or 0) for the referenced input is stored.

When a field signal is connected to an input or an output interface, its address will be related to the terminal where the signal wire is connected. The address for a given input/output can be used throughout the program as many times as required by the control logic. This PLC feature is an advantage when compared to relay-type hardware, where additional contacts often mean additional hardware. Sections 5-4 and 6-2 describe more about I/O interaction and its relationship with the PLC’s memory and enclosure placement.

Figure 3-12 illustrates a simple electrical ladder circuit and its equivalent

PLC implementation. Each “real” field device (e.g., push buttons PB1 and

PB2, limit switch LS1, and pilot light PL1) is connected to the PLC’s input and output modules (see Figure 3-13), which have a reference number—the address. Most controllers reference these devices using numeric addresses with octal (base 8) or decimal (base 10) numbering. Note that in the electrical ladder circuit, any complete electrical path (all contacts closed) from left to right will energize the output (pilot light PL1). To turn PL1 ON, then, one of the following two conditions must occur: (1) PB1 must be pressed and LS1 must be closed or (2) PB2 must be pressed and LS1 must be closed. Either of these two conditions will complete the electrical path and cause power to flow to the pilot light.

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L2

L1

PB1

PB2

LS1 PL1

Electrical Ladder Circuit

Field Input Devices Control Program Field Output Devices

L1 L2 L1

30 32 40

PL1

PB1

PB2

LS1

30

31

32

31

40 d i PLC

Figure 3-12.

Electrical ladder circuit and its equivalent PLC implementation.

L2

CPU

PB1

PB2

Inputs

34

35

36

37

30

31

32

33

44

45

46

47

40

41

42

43

Outputs

PL1

LS1

Figure 3-13.

Field devices from Figure 3-12 connected to I/O module.

The same logic that applies to an electrical ladder circuit applies to a PLC circuit. In the PLC control program, power must flow through either addresses 30 (PB1) and 32 (LS1) or through addresses 31 (PB2) and 32 (LS1) to turn ON output 40. Output 40, in turn, energizes the light PL1 that is

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3 connected to the interface with address 40. In order to provide power to addresses 30, 31, or 32, the devices connected to the input interfaces addressed 30, 31, and 32 must be turned ON. That is, the push buttons must be pressed or the limit switch must close.

C

ONTACT

S

YMBOLS

U

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S

Programmable controller contacts and electromechanical relay contacts operate in a very similar fashion. For example, let’s take relay A (see Figure

3-14a) which has two sets of contacts, one normally open contact (A-1) and one normally closed contact (A-2). If relay coil A is not energized (i.e., it is

OFF), contact A-1 will remain open and contact A-2 will remain closed (see

Figure 3-14b). Conversely, if coil A is energized, or turned ON, contact A-1 will close and contact A-2 will open (see Figure 3-14c). The blue lines highlighting the coil and contacts denote an ON, or closed, condition.

A Relay Coil A

A-1

Contact A-1 (NO)

A-2

Contact A-2 (NC)

(a)

Standard configuration for relay coil A with normally open contact A-1 and normally closed contact A-2.

A OFF A ON

A-1 A-1

Open Closed

A-2 A-2

Closed Open

(b)

Coil A de-energized.

(c)

Coil A energized.

Figure 3-14.

Relay and PLC contact symbols showing a relay coil and normally open and normally closed contacts.

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Remember that when a set of contacts closes, it provides power flow, or continuity, in the circuit where it is used. Each set of available coils and its respective contacts in the PLC have a unique reference address by which they are identified. For instance, coil 10 will have normally open and normally closed contacts with the same address (10) as the coil (see Figure 3-15). Note that a PLC can have as many normally open and normally closed contacts as desired; whereas in an electromechanical relay, only a fixed number of contacts are available.

10

10

10

10

10

Figure 3-15.

Multiple contacts from a PLC output coil.

A programmable controller also allows the multiple use of an input device reference. Figure 3-16 illustrates an example in which limit switch LS1 is connected to reference input module connection 20. Note that the PLC control program can have as many normally open and normally closed reference 20 contacts in as many rungs as needed.

L1

LS1 20

L2

20

20

20

Field Inputs Control Program

Figure 3-16.

Input 20 has multiple contacts in the PLC control program.

The symbols in Table 3-5 are used to translate relay control logic to contact symbolic logic. These symbols are also the basic instruction set for the ladder diagram, excluding timer/counter instructions. Chapter 9 further explains these and more advanced instructions.

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S y m b o l D e f i n i t i o n a n d S y m b o l I n t e r p r e t a t i o n

l

N o r m a l l y

o g i c .

A n i n

o p e n

p u t

c

c a n

o n

b

t a

e

c t .

a c o

R e p n n e r e s e n c t e d s t s w i a n t c h y i n p u t t c l o s u r e o t o r h s e c e n o n t s o r , r o l a c o o u n t t p a c u t .

t f r o m a

W h e n c o n n e i n t e r p c t r e t e d e d o

, u t p u t h e t , o r e f r a e r e c o n n c e t d a i c t n f r o m p u t o r a n o i n u t t e r p u t n a i s l e x a c l o s m i e n e d a n d f o r a a ll o w n c

O N u r r e c o n t n d i t o f l t i o n .

o w

I f i t s s t a t u s t h r o u g h t h e i s 1 , t h e c o n t a c o n t a c t .

I f t h e s c t t a w t u i s ll o f o p t h e e n , p r e f e r e n c e d r o h i b i t i n g c u i n p u t r r e n t

/ o u t f r o p m u t i s 0 , f l o w i n g t h e c o n t h r o u g h t a t h c t e w i l l r e m c o n t a c t .

a i n

N o r m a l l y c l o s e d c o n t a c t .

R e p r e s e n t s a n y i n p u t t o t h e c o n t r o l o c o g i c .

n t a c

A t n f r i n p u o m t a c a n b c o n n e e c t a e c o n n d o u e c t t p u e t , d o r s w i a t c h c o n t c a l o s c t u r f r o e o r m s a n e i n s o n t e r , r n a a l l o e x w u i ll t a p m u i t n

.

e

W d r e m a i n h e n i n t e r p r e t e d , t h e f o r a c l o s n e

O F F d , c t h u s o n d a ll i t i o n .

o w i n g

I r e f e r e n c e d f i t s s t a t u s i i n p u s 0 , t t / o u h e t p u t i s c o n t a c t c u r r e n t t o f l o w t h r o u g h c o n t a c t .

c o n t a c t

I f w i ll t h e o p s t e n , a t u s p r o o h i f t h e b i t i n g r e f e r e c u r r n c e d e n t f r o i m n p u f l o t / o u t p u t w i n g t h i s 1 r o u g

, h t h e t h e t h e c o n t a c t .

O u t p u t .

R e p r e s e n t s a n y o u t p u t t h a t i s d r i v e n b y s o m e c o m b i n a t i o n o f i n p u t l o g i c .

i d e v i c e o r c o n d i t i o n s a n i s i n t e r n a

T R U E ( a l s e n e r g i z e d ( t u r n e d o u t p u t .

I ll c o

O N ) .

n t a c t s f

A n o u a n y t p l u e f t c l o s e d ) , t t c a n t o r i h e b r e e g h t a p a f e r e c o t h n n e o n c e d f o i u c t e d n t p p u u t t

N O T

c o m b i

o u t p u t .

n a t i o n

R o f i e p n p r e s e n t s u t l o g i c .

a n y

A n d e v i c c o n d i e t i o o r n s a n i s o u t p u t i s i n t e r n a l

T R U E o

( a ll d e e n e r g i z e d u

( t p u c t o u r n t .

n t a c e

I f d o o a t s u u t

O t c

F p n y u p u l o s

F l

) t e t

.

t c f t h a

t a n t o e d ) , t i s b e r i h e d r i a g h t v e n c p o a t h b n n o y f i s o n r e f e r e n c e d m e c t e d p e u t

Table 3-5.

Symbols used to translate relay control logic to contact symbolic logic.

The following seven points describe guidelines for translating from hardwired logic to programmed logic using PLC contact symbols:

Normally open contact. When evaluated by the program, this symbol is examined for a 1 to close the contact; therefore, the signal referenced by the symbol must be ON, CLOSED, activated, etc.

Normally closed contact. When evaluated by the program, this symbol is examined for a 0 to keep the contact closed; thus, the signal referenced by the symbol must be OFF, OPEN, deactivated, etc.

Output. An output on a given rung will be energized if any left-toright path has all contacts closed, with the exception of power flow going in reverse before continuing to the right. An output can control either a connected device (if the reference address is also a termina-

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3 tion point) or an internal output used exclusively within the program. An internal output does not control a field device. Rather, it provides interlocking functions within the PLC.

Input. This contact symbol can represent input signals sent from connected inputs, contacts from internal outputs, or contacts from connected outputs.

Contact addresses. Each program symbol is referenced by an address. If the symbol references a connected input/output device, then the address is determined by the point where the device is connected.

Repeated use of contacts. A given input, output, or internal output can be used throughout the program as many times as required.

Logic format. Contacts can be programmed in series or in parallel, depending on the output control logic required. The number of series contacts or parallel branches allowed in a rung depends on the PLC.

Table 3-6a show how simple hardwired series and parallel circuits can be translated into programmed logic. A series circuit is equivalent to the

Boolean AND operation; therefore, all inputs must be ON to activate the output. A parallel circuit is equivalent to the Boolean OR operation; therefore, any one of the inputs must be ON to activate the output. The STR and OUT Boolean statements stand for START (of a new rung) and

OUTPUT (of a rung), respectively. Table 3-6b further explains Table 3-6a.

K

EY

T

ERMS

AND

Boolean operators contact symbology gate input device internal output language

NAND negative logic

NOR normally closed normally open

NOT

OR output device parallel circuit positive logic rung series circuit truth table

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OMPONENTS AND

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Devices

The Memory System and I/O Interaction

The Discrete Input/Output System

The Analog Input/Output System

Special Function I/O and Serial Communication

Interfacing

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—Grand Duke Friedrich von Baden

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IGHLIGHTS

The processor and the power supply are important parts of the central processing unit. In this chapter, we will take a look at these CPU components, concentrating on their roles and requirements in PLC applications. In addition, we will discuss the importance of CPU subsystem communications, error detection and correction, and power supply loading. Finally, we will present some of the most common programming devices for entering and editing the control program. The next chapter will discuss the other major component of the CPU—the memory system—and will explore the relationship between input/output field devices, memory, and the PLC.

4-1 I

NTRODUCTION

As mentioned in the first chapter, the central processing unit, or CPU, is the most important element of a PLC. The CPU forms what can be considered to be the “brain” of the system. The three components of the CPU are:

• the processor

• the memory system

• the power supply

Figure 4-1 illustrates a simplified block diagram of a CPU. CPU architecture may differ from one manufacturer to another, but in general, most CPUs follow this typical three-component organization. Although this diagram shows the power supply inside the CPU block enclosure, the power supply may be a separate unit that is mounted next to the block enclosure containing the processor and memory. Figure 4-2 shows a CPU with a built-in power supply. The programming device, not regarded as part of the CPU per se, completes the total central architecture as the medium of communication between the programmer and the CPU.

Processor Memory

I

N

P

U

T

S

Power

Supply

CPU

Figure 4-1.

CPU block diagram.

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Figure 4-2.

Two PLC CPUs with built-in power supplies (left with fixed I/O blocks and right with configurable I/O).

The term CPU is often used interchangeably with the word processor; however, the CPU encompasses all of the necessary elements that form the intelligence of the system—the processor plus the memory system and power supply. Integral relationships exist between the components of the CPU, resulting in constant interaction among them. Figure 4-3 illustrates the functional interaction between a PLC’s basic components. In general, the

Processor

LS

M

Memory

PB

SOL

PL1

LS

Power Supply

External Source

Figure 4-3.

Functional interaction of a PLC system.

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4 processor executes the control program stored in the memory system in the form of ladder diagrams, while the system power supply provides all of the necessary voltage levels to ensure proper operation of the processor and memory components.

4-2 P

ROCESSORS

Very small microprocessors (or micros)—integrated circuits with tremendous computing and control capability—provide the intelligence of today’s programmable controllers. They perform mathematical operations, data handling, and diagnostic routines that were not possible with relays or their predecessor, the hardwired logic processor. Figure 4-4 illustrates a processor module that contains a microprocessor, its supporting circuitry, and a memory system.

Figure 4-4.

Allen Bradley’s PLC processors—models 5/12, 5/15, and 5/25.

The principal function of the processor is to command and govern the activities of the entire system. It performs this function by interpreting and executing a collection of system programs known as the executive. The executive, a group of supervisory programs, is permanently stored in the processor and is considered a part of the controller itself. By executing the executive, the processor can perform all of its control, processing, communication, and other housekeeping functions.

The executive performs the communication between the PLC system and the user via the programming device. It also supports other peripheral communication, such as monitoring field devices; reading diagnostic data from the power supply, I/O modules, and memory; and communicating with an operator interface.

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The CPU of a PLC system may contain more than one processor (or micro) to execute the system’s duties and/or communications, because extra processors increase the speed of these operations. This approach of using several microprocessors to divide control and communication tasks is known as

multiprocessing. Figure 4-5 illustrates a multiprocessor configuration.

Power Supply

Main CPU

Processor

Basic Computer

Processor Module

PID Processor

Module

Figure 4-5.

A multiprocessor configuration.

Another multiprocessor arrangement takes the microprocessor intelligence away from the CPU, moving it to an intelligent module. This technique uses intelligent I/O interfaces, which contain a microprocessor, built-in memory, and a mini-executive that performs independent control tasks. Typical intelligent modules are proportional-integral-derivative (PID) control modules, which perform closed-loop control independent of the CPU, and some stepper and servo motor control interfaces. Figure 4-6 shows some intelligent

I/O modules.

(a) (b)

Figure 4-6. (a)

A single-axis positioning module and

(b)

a temperature control interface.

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The microprocessors used in PLCs are categorized according to their word size, or the number of bits that they use simultaneously to perform operations.

Standard word lengths are 8, 16, and 32 bits. This word length affects the speed at which the processor performs most operations. For example, a 32bit microprocessor can manipulate data faster than a 16-bit micro, since it manipulates twice as much data in one operation. Word length correlates with the capability and degree of sophistication of the controller (i.e., the larger the word length, the more sophisticated the controller).

4-3 P

ROCESSOR

S

CAN

The basic function of a programmable controller is to read all of the field input devices and then execute the control program, which according to the logic programmed, will turn the field output devices ON or OFF. In reality, this last process of turning the output devices ON or OFF occurs in two steps. First, as the processor executes the internal programmed logic, it will turn each of its programmed internal output coils ON or OFF. The energizing or deenergizing of these internal outputs will not, however, turn the output devices

ON or OFF. Next, when the processor has finished evaluating all of the control logic program that turns the internal coils ON or OFF, it will perform an update to the output interface modules, thereby turning the field devices connected to each interface terminal ON or OFF. This process of reading the inputs, executing the program, and updating the outputs is known as the scan.

Figure 4-7 shows a graphic representation of the scan. The scanning process is repeated over and over in the same fashion, making the operation sequential from top to bottom. Sometimes, for the sake of simplicity, PLC manufacturers

Update

Outputs

Read

Inputs

Read input status

Solve the control program and turn internal coils ON/OFF

Update outputs

EOS

Program

Execution

Figure 4-7.

PLC total scan representation.

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4 call the solving of the control program the program scan and the reading of inputs and updating of outputs the I/O update scan. Nevertheless, the total system scan includes both. The internal processor signal, which indicates that the program scan has ended, is called the end-of-scan (EOS) signal.

The time it takes to implement a scan is called the scan time. The scan time is the total time the PLC takes to complete the program and I/O update scans.

The program scan time generally depends on two factors: (1) the amount of memory taken by the control program and (2) the type of instructions used in the program (which affects the time needed to execute the instructions). The time required to make a single scan can vary from a few tenths of a millisecond to 50 milliseconds.

PLC manufacturers specify the scan time based only on the amount of application memory used (e.g., 1 msec/1K of programmed memory). However, other factors also affect the scan time. The use of remote I/O subsystems can increase the scan time, since the PLC must transmit and receive the I/O update from remote systems. Monitoring control programs also adds time to the scan, because the microprocessor must send data about the status of the coils and contacts to a monitoring device (e.g., a PC).

The scan is normally a continuous, sequential process of reading the status of the inputs, evaluating the control logic, and updating the outputs. A processor is able to read an input as long as the input signal is not faster than the scan time (i.e., the input signal does not change state—ON to OFF to ON or vice versa—twice during the processor’s scan time). For instance, if a controller has a total scan time of 10 msec (see Figure 4-8) and must monitor an input

Read

1 msec

PLC Scan

10 msec

Program Execution

8 msec 1 msec

Update

End of Scan

EOS

Logic 1

Signal

Logic 0

0 1 2 3 4 5 6 7 8 9 10

Seconds

Figure 4-8.

Illustration of a signal that will not be detected by a PLC during a normal scan.

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4 signal that changes states twice during an 8 msec period (less than the scan), the programmable controller will not be able to “see” the signal, resulting in a possible machine or process malfunction. This scan characteristic must always be considered when reading discrete input signals and ASCII characters (see the ASCII section in Chapter 8). A programmable controller’s scan specification indicates how fast it can react to inputs and still correctly solve the control logic. Chapter 9 provides more information about scan evaluation.

E

XAMPLE

4-1

What occurs during the scanning operation of a programmable controller if the signal(s) from an input field device behave as shown in Figures 4-9a and 4-9b?

Previous

Scan

Read

Inputs

10 msec

Program Execution

Update

Outputs

(a)

Logic 1

Logic 0

EOS Signal EOS Signal

Logic 1

(b)

Logic 0

Figure 4-9. (a)

Single-pulse and

(b)

double-pulse signals.

S

OLUTION

In Figure 4-9a, the PLC will recognize the signal, even though it is shorter than the scan, because it was ON during the read section of the scan. In Figure 4-9b, the PLC will recognize the first signal, but it will not be able to detect the second pulse because this second ON-

OFF-ON transition occurred in the middle of the scan. Thus, the PLC can not read it.

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Note that although the signal in Figure 4-9a is shorter than the scan, the PLC recognizes it. However, the user should take precautions against signals that behave like this, because if the same signal occurs in the middle of the scan, the PLC will not detect it.

Also note that the behavior of the signal in Figure 4-9b will cause a misreading of the pulse. For instance, if the pulses are being counted, a counting malfunction will occur. These problems, however, can be corrected, as you will see later.

The common scan method of monitoring the inputs at the end of each scan may be inadequate for reading certain extremely fast inputs. Some PLCs provide software instructions that allow the interruption of the continuous program scan to receive an input or to update an output immediately. Figure

4-10 illustrates how immediate instructions operate during a normal program scan. These immediate instructions are very useful when the PLC must react instantaneously to a critical input or output.

Update

Outputs

Read

Input

Update

Immediate

Output and Back

Back to

Program

Execution

Read

Immediate

Input

Program

Execution

Figure 4-10.

PLC scan with immediate I/O update.

Another method for reading extremely fast inputs involves using a pulse

stretcher, or fast-response module (see Figure 4-11). This module stretches the signal so that it will last for at least one complete scan. With this type of interface, the user must ensure that the signal does not occur more than once per two scans; otherwise, some pulses will be lost. A pulse stretcher is ideal for applications with very fast input signals (e.g., 50 microseconds), perhaps from an instrumentation field device, that do not change state more than once per two scans. If a large number of pulses must be read in a shorter time than the scan time, a high-speed pulse counter input module can be used to read all the pulses and then send the information to the CPU.

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One Scan

Logic 1

Program Execution

50

µ sec

Signal

Logic 0

Logic 1

Logic 0

E

XAMPLE

4-2

Referencing Figure 4-12, illustrate how, in one scan,

(a)

an immediate instruction will respond to an interrupt input and (b) the same input instruction can update an immediate output field device, like a solenoid.

10 msec

Program Execution

Read

Update

End of Scan

EOS

Logic 1

Input

Signal “N”

Logic 0

0 1 2 3 4 5 6 7 8 9 10

Figure 4-12.

Example scan and signal.

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(a)

As shown in Figure 4-13, the immediate instruction will interrupt the control program to read the input signal. It will then evaluate the signal and return to the control program, where it will resume program execution and update outputs.

Interrupt

Occurs

1

Scan

Read Inputs

Execute Program

Read Immediate Input

“N”

“N”

Return 2

3

Input Evaluated

4

Continue Program

Update Outputs

Figure 4-13.

Immediate response to an interrupt input.

(b)

Figure 4-14 depicts the immediate update of an output. As in part

(a), the immediate instruction interrupts the control program to read and evaluate the input signal. However, the output is updated before normal program execution resumes.

Interrupt

Occurs

1

Scan

Read Inputs

Execute Program

Read Immediate Input

“N”

Return

2

3

Input/Logic Evaluated

4

Output Updated

5

Continue Program

Update Outputs

Figure 4-14.

Immediate update of an output field device.

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D

IAGNOSTICS

The PLC’s processor constantly communicates with local and remote subsystems (see Chapter 6), or racks as they may also be called. I/O interfaces connect these subsystems to field devices located either close to the main CPU or at remote locations. Subsystem communication involves data transfer exchange at the end of each program scan, when the processor sends the latest status of outputs to the I/O subsystem and receives the current status of inputs and outputs. An I/O subsystem adapter module, located in the CPU, and a remote I/O processor module, located in the subsystem chassis or rack, perform the actual communication between the processor and the subsystem.

Figure 4-15 illustrates a typical PLC subsystem configuration.

CPU

I/O Subsystem

Adapter

Module

Remote I/O

Processor

5,000 feet

I/O I/O

Remote

I/O

Local I/O

Processor

I/O

Local

10,000 feet

5,000 feet

I/O I/O

Figure 4-15.

Typical PLC subsystem configuration.

The distance between the CPU and a subsystem can vary, depending on the controller, and usually ranges between 1,000 and 15,000 feet. The communication medium generally used is either twisted-pair, twinaxial, coaxial, or fiber-optic cable, depending on the PLC and the distance.

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The controller transmits data to subsystems at very high speeds, but the actual speed varies depending on the controller. The data format also varies, but it is normally a serial binary format composed of a fixed number of data bits

(I/O status), start and stop bits, and error detection codes.

Error-checking techniques are also incorporated in the continuous communication between the processor and its subsystems. These techniques confirm the validity of the data transmitted and received. The level of sophistication of error checking varies from one manufacturer to another, as does the type of errors reported and the resulting protective or corrective action.

E

RROR

C

HECKING

The processor uses error-checking techniques to monitor the functional status of both the memory and the communication links between subsystems and peripherals, as well as its own operation. Common error-checking techniques include parity and checksum.

Parity.

Parity is perhaps the most common error detection technique. It is used primarily in communication link applications to detect mistakes in long, error-prone data transmission lines. The communication between the CPU and subsystems is a prime example of the useful application of parity error checking. Parity check is often called vertical redundancy check (VRC).

Parity uses the number of 1s in a binary word to check the validity of data transmission. There are two types of parity checks: even parity, which checks for an even number of 1s, and odd parity, which checks for an odd number of

1s. When data is transmitted through a PLC, it is sent in binary format, using

1s and 0s. The number of 1s can be either odd or even, depending on the character or data being transmitted (see Figure 4-16a). In parity data transmission, an extra bit is added to the binary word, generally in the most significant or least significant bit position (see Figure 4-16b). This extra bit, called the

parity bit (P), is used to make each byte or word have an odd or even number of 1s, depending on the type of parity being used.

(a)

1 011 0110 1000 1010

1011 0110 1000 1000

Even 1s

Odd 1s

(b)

Parity

(P = 0 or 1)

→ P 1011 0110 1000 1010

P 1011 0110 1000 1000

Even 1s

Odd 1s

Figure 4-16. (a)

A 16-bit data transmission of 1s and 0s and

(b)

the same transmission with a parity bit (P) in the most significant bit position.

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Let’s suppose that a processor transmits the 7-bit ASCII character C

(1000011) to a peripheral device and odd parity is required. The total number of 1s is three, or odd. If the parity bit (P) is the most significant bit, the transmitted data will be P1000011. To achieve odd parity, P is set to 0 to obtain an odd number of 1s. The receiving end detects an error if the data does not contain an odd number of 1s. If even parity had been the error-checking method, P would have been set to 1 to obtain an even number of 1s.

Parity error checking is a single-error detection method. If one bit of data in a word changes, an error will be detected due to the change in the bit pattern.

However, if two bits change value, the number of 1s will be changed back, and an error will not be detected even though there is a mistransmission.

In PLCs, when data is transmitted to a subsystem, the controller defines the type of parity (odd or even) that will be used. However, if the data transmission is from the programmable controller to a peripheral, the parity method must be prespecified and must be the same for both devices.

Some processors do not use parity when transmitting information, although their peripherals may require it. In this case, parity generation can be accomplished through application software. The parity bit can be set for odd or even parity with a short routine using functional blocks or a high-level language. If a nonparity-oriented processor receives data that contains parity, a software routine can also be used to mask out, or strip, the parity bit.

Checksum.

The extra bit of data added to each word when using parity error detection is often too wasteful to be desirable. In data storage, for example, error detection is desirable, but storing one extra bit for every eight bits means a 12.5% loss of data storage capacity. For this reason, a data block errorchecking method known as checksum is used.

Checksum error detection spots errors in blocks of many words, instead of in individual words as parity does. Checksum analyzes all of the words in a data block and then adds to the end of the block one word that reflects a characteristic of the block. Figure 4-17 shows this last word, known as the

block check character (BCC). This type of error checking is appropriate for memory checks and is usually done at power-up.

There are several methods of checksum computation, with the three most common being:

cyclic redundancy check

• longitudinal redundancy check

• cyclic exclusive-OR checksum

Cyclic Redundancy Check.

Cyclic redundancy check (CRC) is a technique that performs an addition of all the words in the data block and then stores the resulting sum in the last location, the block check character (BCC). This

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Word 1

Word 2

Word 3

Last Word

Checksum

Figure 4-17.

Block check character at the end of the data block.

summation process can rapidly reach an overflow condition, so one variation of CRC allows the sum to overflow, storing only the remainder bits in the BCC word. Typically, the resulting word is complemented and written in the BCC location. During the error check, all words in the block are added together, with the addition of the final BCC word turning the result to 0. A zero sum indicates a valid block. Another type of CRC generates the BCC using the remainder of dividing the sum by a preset binary number.

Longitudinal Redundancy Check.

Longitudinal redundancy check (LRC) is an error-checking technique based on the accumulation of the result of performing an exclusive-OR (XOR) on each of the words in the data block.

The exclusive-OR operation is similar to the standard OR logic operation (see

Chapter 3) except that, with two inputs, only one can be ON (1) for the output to be 1. If both logic inputs are 1, then the output will be 0. The exclusive-OR operation is represented by the

symbol. Figure 4-18 illustrates the truth table for the exclusive-OR operation. Thus, the LRC operation is simply the logical exclusive-OR of the first word with the second word, the result with the third word, and so on. The final exclusive-OR operation is stored at the end of the block as the BCC.

Exclusive-OR Truth Table

I n p u t s O u t p u t

A

0

0

1

1

B

0

1

0

1

Y

0

1

1

0

Figure 4-18.

Truth table for the exclusive-

OR operation.

Cyclic Exclusive-OR Checksum.

Cyclic exclusive-OR checksum (CX-

ORC) is similar to LRC with some slight variations. The operation starts with a checksum word containing 0s, which is XORed with the first word of the block. This is followed by a left rotation of the bits in the checksum word. The next word in the data block is XORed with the checksum word and then

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4 rotated left (see Figure 4-19). This procedure is repeated until the last word of the block has been logically operated on. The checksum word is then appended to the block to become the BCC.

A software routine in the executive program performs most checksum errordetecting methods. Typically, the processor performs the checksum computation on memory at power-up and also during the transmission of data. Some controllers perform the checksum on memory during the execution of the control program. This continuous on-line error checking lessens the possibility of the processor using invalid data.

Bit

Data

7 6 5 4 3 2 1 0

1 0 1 1 0 1 0 1

Data Before

Rotation

0 1 1 0 1 0 1

1

Data During

Rotation

Bit 7 Rotates to Bit 0 Position

0 1 1 0 1 0 1 1

Data After

Rotation

Figure 4-19.

Cyclic exclusive-OR checksum operation.

E

XAMPLE

4-3

Implement a checksum utilizing

(a)

LRC and

(b)

CX-ORC techniques for the four, 6-bit words shown. Place the BCC at the end of the data block.

word 1 word 2 word 3 word 4

S

OLUTION

1 1 0 0 1 1

1 0 1 1 0 1

1 0 1 1 1 0

1 0 0 1 1 1

(a)

Longitudinal redundancy check: word 1

⊕ word 2 result

⊕ word 3 result

⊕ word 4 result

1 1 0 0 1 1

1 0 1 1 0 1

0 1 1 1 1 0

1 0 1 1 1 0

1 1 0 0 0 0

1 0 0 1 1 1

0 1 0 1 1 1

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LRC data block: word 1 word 2 word 3 word 4

BCC

1 1 0 0 1 1

1 0 1 1 0 1

1 0 1 1 1 0

1 0 0 1 1 1

0 1 0 1 1 1

(b)

Cyclic exclusive-OR check:

Start with checksum word 000000.

CS start

⊕ word 1 result left rotate

⊕ word 2 result left rotate

⊕ word 3 result left rotate

⊕ word 4 result left rotate

0 0 0 0 0 0

1 1 0 0 1 1

1 1 0 0 1 1

1 0 0 1 1 1

1 0 1 1 0 1

0 0 1 0 1 0

0 1 0 1 0 0

1 0 1 1 1 0

1 1 1 0 1 0

1 1 0 1 0 1

1 0 0 1 1 1

0 1 0 0 1 0

1 0 0 1 0 0 (final checksum)

CX-ORC data block: word 1 word 2 word 3 word 4

BCC

1 1 0 0 1 1

1 0 1 1 0 1

1 0 1 1 1 0

1 0 0 1 1 1

1 0 0 1 0 0

Error Detection and Correction.

More sophisticated programmable controllers may have an error detection and correction scheme that provides greater reliability than conventional error detection. The key to this type of error correction is the multiple representation of the same value.

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The most common error-detecting and error-correcting code is the Hamming

code. This code relies on parity bits interspersed with data bits in a data word.

By combining the parity and data bits according to a strict set of parity equations, a small byte is generated that contains a value that identifies the erroneous bit. An error can be detected and corrected if any bit is changed by any value. The hardware used to generate and check Hamming codes is quite complex and essentially implements a set of error-correcting equations.

Error-correcting codes offer the advantage of being able to detect two or more bit errors; however, they can only correct one-bit errors. They also present a disadvantage because they are bit wasteful. Nevertheless, this scheme will continue to be used with data communication in hierarchical systems that are unmanned, sophisticated, and automatic.

CPU D

IAGNOSTICS

The processor is responsible for detecting communication failures, as well as other failures, that may occur during system operation. It must alert the operator or system in case of a malfunction. To do this, the processor performs

diagnostics, or error checks, during its operation and sends status information to indicators that are normally located on the front of the CPU.

Typical diagnostics include memory OK, processor OK, battery OK, and

power supply OK. Some controllers possess a set of fault relay contacts that can be used in an alarm circuit to signal a failure. The processor controls the fault relay and activates it when one or more specific fault conditions occur.

The relay contacts that are usually provided with a controller operate in a

watchdog timer fashion; that is, the processor sends a pulse at the end of each scan indicating a correct system operation. If a failure occurs, the processor does not send a pulse, the timer times out, and the fault relay activates.

In some controllers, CPU diagnostics are available to the user during the execution of the control program. These diagnostics use internal outputs that are controlled by the processor but can be used by the user program (e.g., loss of scan, backup battery low, etc.).

4-5 T

HE

S

YSTEM

P

OWER

S

UPPLY

The system power supply plays a major role in the total system operation. In fact, it can be considered the “first-line manager” of system reliability and integrity. Its responsibility is not only to provide internal DC voltages to the system components (i.e., processor, memory, and input/output interfaces), but also to monitor and regulate the supplied voltages and warn the CPU if something is wrong. The power supply, then, has the function of supplying well-regulated power and protection for other system components.

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NPUT

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OLTAGE

Usually, PLC power supplies require input from an AC power source; however, some PLCs will accept a DC power source. Those that will accept a DC source are quite appealing for applications such as offshore drilling operations, where DC sources are commonly used. Most PLCs, however, require a 120 VAC or 220 VAC power source, while a few controllers will accept 24 VDC.

Since industrial facilities normally experience fluctuations in line voltage and frequency, a PLC power supply must be able to tolerate a 10 to 15% variation in line voltage conditions. For example, when connected to a 120

VAC source, a power supply with a line voltage tolerance of

±

10% will continue to function properly as long as the voltage remains between 108 and

132 VAC. A 220 VAC power supply with

±

10% line tolerance will function properly as long as the voltage remains between 198 and 242 VAC. When the line voltage exceeds the upper or lower tolerance limits for a specified duration (usually one to three AC cycles), most power supplies will issue a shutdown command to the processor. Line voltage variations in some plants can eventually become disruptive and may result in frequent loss of production. Normally, in such a case, a constant voltage transformer is installed to stabilize line conditions.

Constant Voltage Transformers.

Good power supplies tolerate normal fluctuations in line conditions, but even the best-designed power supply cannot compensate for the especially unstable line voltage conditions found in some industrial environments. Conditions that cause line voltage to drop below proper levels vary depending on application and plant location. Some possible conditions are:

• start-up/shutdown of nearby heavy equipment, such as large motors, pumps, welders, compressors, and air-conditioning units

• natural line losses that vary with distance from utility substations

• intraplant line losses caused by poorly made connections

• brownout situations in which line voltage is intentionally reduced by the utility company

A constant voltage transformer compensates for voltage changes at its input (the primary) to maintain a steady voltage to its output (the secondary).

When operated at less than the rated load, the transformer can be expected to maintain approximately

±

1% output voltage regulation with an input voltage variation of as much as 15%. The percentage of regulation changes as a function of the operated load (PLC power supply and input devices)—the higher the load, the more fluctuation. Therefore, a constant voltage trans-

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4 former must be properly rated to provide ample power to the load. The rating of the constant voltage transformer, in units of volt-amperes (VA), should be selected based on the worst-case power requirements of the load. The recommended rating for a constant voltage transformer can be obtained from the PLC manufacturer. Figure 4-20 illustrates a simplified connection of a constant voltage transformer and a programmable controller.

To AC Source

Constant Voltage

Transformer

Primary

Secondary

CPU

Processor Memory

Power

Supply

AC Input

Module

AC Output

Module

Figure 4-20.

A constant voltage transformer connected to a PLC system (CPU and modules).

The Sola CVS standard sinusoidal transformer, or an equivalent constant voltage transformer, is suitable for programmable controller applications.

This type of transformer uses line filters to remove high-harmonic content and provide a clean sinusoidal output. Constant voltage transformers that do not filter high harmonics are not recommended for programmable controller applications. Figure 4-21 illustrates the relationship between the output voltage and input voltage for a typical Sola CVS transformer operated at different loads.

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130

120

110

100

90

80

70

60

50

25% Full Load

50% Full Load

100% Full Load

0 10 20 30 40 50 60 70 80 90 100 110 120 130

Input Voltage (% of nominal)

Figure 4-21.

Relationship of input versus output voltages for a Sola unit.

Isolation Transformers.

Often, a programmable controller will be installed in an area where the AC line is stable; however, surrounding equipment may generate considerable amounts of electromagnetic interference (EMI). Such an installation can result in intermittent misoperation of the controller, especially if the controller is not electrically isolated (on a separate AC power source) from the equipment generating the EMI. Placing the controller on a separate isolation transformer from the potential EMI generators will increase system reliability. The isolation transformer need not be a constant voltage transformer; but it should be located between the controller and the

AC power source.

L

OADING

C

ONSIDERATIONS

The system power supply provides the DC power required by the logic circuits of the CPU and the I/O circuits. The power supply has a maximum amount of current that it can provide at a given voltage level (e.g., 10 amps at 5 volts), depending on the type of power supply. The amount of current that a given power supply can provide is not always sufficient to satisfy the requirements of a mix of I/O modules. In such a case, undercurrent conditions can cause unpredictable operation of the I/O system.

In most circumstances, an undercurrent situation is unusual, since most power supplies are designed to accommodate a mix of the most commonly used I/O modules. However, an undercurrent condition sometimes arises in applications where an excessive number of special purpose I/O modules are used

(e.g., power contact outputs and analog inputs/outputs). These special purpose modules usually have higher current requirements than most commonly used digital I/O modules.

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Power supply overloading can be an especially annoying condition, since the problem is not always easily detected. An overload condition is often a function of a combination of outputs that are ON at a given time, which means that overload conditions can appear intermittently. When power supply loading limits have been exceeded and overload occurs, the normal remedy is to either add an auxiliary power supply or to obtain a supply with a larger current capability. To be aware of system loading requirements ahead of time, users can obtain vendor specifications for I/O module current requirements.

This information should include per point (single input or output) requirements and current requirements for both ON and OFF states. If the total current requirement for a particular I/O configuration is greater than the total current supplied by the power supply, then a second power supply will be required. An early consideration of line conditions and power requirements will help to avoid problems during installation and start-up.

Power Supply Loading Example.

Undoubtedly, the best solution to a problem is anticipation of the problem. When selecting power supplies, current loading requirements, which can indicate potential loading problems, are often overlooked. For this reason, let’s go over a load estimation example.

Consider an application where a PLC will control 50 discrete inputs and 25 discrete outputs. Each discrete input module can connect up to 16 field devices, while each output module can connect up to 8 field devices. In addition to this discrete configuration, the application requires a special servo motor interface module and five power contact outputs. The system also uses three analog inputs and three analog outputs.

Figure 4-22 illustrates the configuration of this PLC application. The first plug-in module is the power supply, then the processor module, and then the

I/O modules.

Slot 00 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

Application Note

Power supply requires one slot (slot 00).

Processor requires one slot (slot 0).

Twelve I/O slots are used, four are spare.

Auxiliary power supplies, if required, must be placed in slot 8.

Figure 4-22.

Configuration of an example PLC.

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The first step in estimating the load is to determine how many modules are required and then compute the total current requirement of these modules.

Table 4-1 lists the module types, current requirements for all inputs and outputs ON at the same time, and the available power supplies for our programmable controller example.

M o d u l e

T y p e

D i s c r e t e i n

D i s c r e t e o u t

C o n t a c t

A n a l o g i n

A n a l o g o u t

S e r v o m o t o r

I / O D e v i c e s

C o n n e c t e d

C o n n e c t i o n s p e r M o d u l e

# o f M o d u l e s

R e q u i r e d

M o d u l e

@ O n

C u r r e n t

S t a t e

T o t a l C u r r e n t

R e q u i r e d

5

2

0

5

5

3

3

1

1 6

8

4

4

4

1

4

4

1

1

1

1

2

2 2 0 m A

5 7 5 m A

6 0 0

1 2

4

5 0

0 0

0 0 m m A m A m A

T O T A L

A 1

1 2

4

0

8 8 0

5 7 5

6

4

6

0

0 0

0 0

0 0

5

0

5 m m A m A m m m m

A

A

A

A

A

P r o c e s s o r ’ s c u r r e n t :

1 .

2 a m p s

P o w e r s u p p l i e s a v a i l a b l e :

A u x i l i a r y p

( p l a c e m e n t

o

i n

w e r

s l o t

s u

8 )

p p l y :

T y p e A

T y p e B

T y p e C

T y p e A A

T y p e B B

3

5 a m p s a m p s

6 a m p s

3

5 a m p s a m p s

Table 4-1.

Listing of modules and their current requirements.

The total power supply current required by this input/output system is 4655 mA, or 4.655 amps. Adding this current to the 1.2 amps required by the processor results in a total of 5.855 amps, the minimum current the power supply must provide to ensure the proper operation of the system. This total current indicates a worst-case condition, since it assumes that all I/Os are operating in the ON condition (which requires more current than the OFF condition).

For this example, there are several power supply options. These options include using a 6 amp power supply or using a combination of a smaller supply with an auxiliary source. If no expansion is expected, the 6 amp power source will suffice. Conversely, if there is a slight possibility for more I/O requirements, then an auxiliary supply will most likely be needed. The addition of an auxiliary supply can be done either at setup or when required; however, for the controller configuration in Figure 4-22, the auxiliary source must be placed in the eighth slot, resulting in I/O address changes if the auxiliary supply is added after setup. Therefore, the reference addresses in the program will have to be reprogrammed to reflect this change. Also, remember that the larger the power supply, the higher the price in most cases. You must keep all these factors in mind when configuring a PLC system and assigning

I/O addresses to field devices.

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4-6 P

ROGRAMMING

D

EVICES

Although the way to enter the control program into the PLC has changed since the first PLCs came onto the market, PLC manufacturers have always maintained an easy human interface for program entry. This means that users do not have to spend much time learning how to enter a program, but rather they can spend their time programming and solving the control problem.

Most PLCs are programmed using very similar instructions. The only difference may be the mechanics associated with entering the program into the PLC, which may vary from manufacturer to manufacturer. This involves both the type of instruction used by each particular PLC and the methodology for entering the instruction using a programming device. The two basic types of programming devices are:

• miniprogrammers

• personal computers

M

INIPROGRAMMERS

Miniprogrammers, also known as handheld or manual programmers, are an inexpensive and portable way to program small PLCs (up to 128 I/O).

Physically, these devices resemble handheld calculators, but they have a larger display and a somewhat different keyboard. The type of display is usually LED (light-emitting diode) or dot matrix LCD (liquid crystal display), and the keyboard consists of numeric keys, programming instruction keys, and special function keys. Instead of handheld units, some controllers have built-in miniprogrammers. In some instances, these built-in programmers are detachable from the PLC. Even though they are used mainly for editing and inputting control programs, miniprogrammers can also be useful tools for starting up, changing, and monitoring the control logic. Figure 4-23 shows a typical miniprogrammer along with a small PLC, in which miniprogrammers are generally used.

Most miniprogrammers are designed so that they are compatible with two or more controllers in a product family. The miniprogrammer is most often used with the smallest member of the PLC family or, in some cases, with the next larger member, which is normally programmed using a personal computer with special PLC programming software (discussed in the next section). With this programming option, small changes or monitoring required by the larger controller can be accomplished without carrying a personal computer to the

PLC location.

Miniprogrammers can be intelligent or nonintelligent. Nonintelligent handheld programmers can be used to enter and edit the PLC program with limited on-line monitoring and editing capabilities. These capabilities are

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Figure 4-23.

A typical miniprogrammer and a small PLC.

limited by memory and display size. Intelligent miniprogrammers are microprocessor-based and provide the user with many of the features offered by personal computers during off-line programming (disconnected from the

PLC). These intelligent devices can perform system diagnostic routines

(memory, communication, display, etc.) and even serve as an operator interface device that can display English messages about the controlled machine or process.

Some miniprogrammers offer removable memory cards or modules, which store a complete program that can be reloaded at any time into any member of the PLC family (see Figure 4-24). This type of storage is useful in applications where the control program of one machine needs to be duplicated and easily transferred to other machines (e.g., OEM applications).

Figure 4-24.

A removable memory card for a miniprogrammer.

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P

ERSONAL

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OMPUTERS

Common usage of the personal computer (PC) in our daily lives has led to the practical elimination of dedicated PLC programming devices. Due to the personal computer’s general-purpose architecture and standard operating system, most PLC manufacturers and other independent suppliers provide the necessary PC software to implement ladder program entry, editing, documentation, and real-time monitoring of the PLC’s control program. The large screens of PCs can show one or more ladder rungs of the control program during programming or monitoring operation (see Figure 4-25).

Figure 4-25.

A PLC ladder diagram displayed on a personal computer.

Personal computers are the programming devices of choice not so much because of their PLC programming capabilities, but because PCs are usually already present at the location where the user is performing the programming.

The different types of desktop, laptop, and portable PCs give the programmer flexibility—they can be used as programming devices, but they can also be used in applications other than PLC programming. For instance, a personal computer can be used to program a PLC, but it may also be connected to the

PLC’s local area network (see Figure 4-26) to gather and store, on a hard disk, process information that could be vital for future product enhancements. A

PC can also communicate with a programmable controller through the RS-

232C serial port, thus serving either as the data handler and supervisor of the

PLC control or as the bridge between the PLC network and a larger computer system (see Figure 4-27).

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PLC system

Processors, the Power Supply, and Programming Devices

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PLC system

-programming

-editing

-monitoring

-data gathering personal computer

-complex calculations

-report generation printer

Figure 4-26.

A PC connected to a PLC’s local area network.

Mainframe computer system

PC as bridge

PLC network

PLC PLC PLC

Figure 4-27.

A PC acting as a bridge between a PLC network and a mainframe computer system.

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In addition to programming and data collection activities, PC software that provides ladder programming capability often includes PLC documentation options. This documentation capability allows the programmer to define the purpose and function of each I/O address that is used in a PLC program. Also, general software programs, such as spreadsheets and databases, can communicate process data from the PLC to a PC via a software bridge or translator program. These software options make the PC almost invaluable when using it as a man/machine interface, providing a window to the inner workings of the PLC-controlled machine or process and generating reports that can be directly translated into management forms.

K

EY

T

ERMS block check character (BCC) checksum constant voltage transformer cyclic exclusive-OR checksum (CX-ORC) cyclic redundancy check (CRC) diagnostics exclusive-OR (XOR)

Hamming code

I/O update scan isolation transformer longitudinal redundancy check (LRC) microprocessor miniprogrammer multiprocessing parity parity bit program scan scan time vertical redundancy check (VRC)

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IVE

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HE

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EMORY

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YSTEM AND

I/O I

NTERACTION

The two offices of memory are collection and distribution.

—Samuel Johnson

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5

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H

IGHLIGHTS

Now that you’ve learned about the first three major components of the programmable controller, it’s time to learn about the last—the memory system. Understanding the PLC’s memory system will help you understand why it operates as it does, as well as how it interacts with I/O interfaces.

In this chapter, we will discuss the different types of memory, including memory structure and capabilities. Then, we will explore the relationship between memory organization and I/O interaction. Finally, we will explain how to configure the PLC memory for I/O addressing.

5-1 M

EMORY

O

VERVIEW

The most important characteristic of a programmable controller is the user’s ability to change the control program quickly and easily. The PLC’s architecture makes this programmability feature possible. The memory system is the area in the PLC’s CPU where all of the sequences of instructions, or

programs, are stored and executed by the processor to provide the desired control of field devices. The memory sections that contain the control programs can be changed, or reprogrammed, to adapt to manufacturing line procedure changes or new system start-up requirements.

M

EMORY

S

ECTIONS

The total memory system in a PLC is actually composed of two different memories (see Figure 5-1):

• the executive memory

• the application memory

Executive

Memory

Area

Application

Memory

Area

Figure 5-1.

Simplified block diagram of the total PLC memory system.

The executive memory is a collection of permanently stored programs that are considered part of the PLC itself. These supervisory programs direct all system activities, such as execution of the control program and communication with peripheral devices. The executive section is the part of the PLC’s

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5 memory where the system’s available instruction software is stored (i.e., relay instructions, block transfer functions, math instructions, etc.). This area of memory is not accessible to the user.

The application memory provides a storage area for the user-programmed instructions that form the application program. The application memory area is composed of several areas, each having a specific function and usage.

Section 5-4 covers the executive and application memory areas in detail.

5-2 M

EMORY

T

YPES

The storage and retrieval requirements for the executive and application memory sections are not the same; therefore, they are not always stored in the same type of memory. For example, the executive requires a memory that permanently stores its contents and cannot be erased or altered either by loss of electrical power or by the user. This type of memory is often unsuitable for the application program.

Memory can be separated into two categories: volatile and nonvolatile.

Volatile memory loses its programmed contents if all operating power is lost or removed, whether it is normal power or some form of backup power.

Volatile memory is easily altered and quite suitable for most applications when supported by battery backup and possibly a disk copy of the program.

Nonvolatile memory retains its programmed contents, even during a complete loss of operating power, without requiring a backup source. Nonvolatile memory generally is unalterable, yet there are special nonvolatile memory types that are alterable. Today’s PLCs include those that use nonvolatile memory, those that use volatile memory with battery backup, as well as those that offer both.

There are two major concerns regarding the type of memory where the application program is stored. Since this memory is responsible for retaining the control program that will run each day, volatility should be the prime concern. Without the application program, production may be delayed or forfeited, and the outcome is usually unpleasant. A second concern should be the ease with which the program stored in memory can be altered. Ease in altering the application memory is important, since this memory is ultimately involved in any interaction between the user and the controller. This interaction begins with program entry and continues with program changes made during program generation and system start-up, along with on-line changes, such as changing timer or counter preset values.

The following discussion describes six types of memory and how their characteristics affect the manner in which programmed instructions are retained or altered within a programmable controller.

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R

EAD

-O

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EMORY

Read-only memory (ROM) is designed to permanently store a fixed program that is not alterable under ordinary circumstances. It gets its name from the fact that its contents can be examined, or read, but not altered once information has been stored. This contrasts with memory types that can be read from and written to (discussed in the next section). By nature, ROMs are generally immune to alteration due to electrical noise or loss of power.

Executive programs are often stored in ROM.

Programmable controllers rarely use read-only memory for their application memory. However, in applications that require fixed data, read-only memory offers advantages when speed, cost, and reliability are factors. Generally, the manufacturer creates ROM-based PLC programs at the factory. Once the manufacturer programs the original set of instructions, the user can never alter it. This typical approach to the programming of ROM-based controllers assumes that the program has already been debugged and will never be changed. This debugging is accomplished using a random-access memory– based PLC or possibly a computer. The final program is then entered into

ROM. ROM application memory is typically found only in very small, dedicated PLCs.

R

ANDOM

-A

CCESS

M

EMORY

Random-access memory (RAM), often referred to as read/write memory

(R/W), is designed so that information can be written into or read from the memory storage area. Random-access memory does not retain its contents if power is lost; therefore, it is a volatile type of memory. Random-access memory normally uses a battery backup to sustain its contents in the event of a power outage.

For the most part, today’s programmable controllers use RAM with battery support for application memory. Random-access memory provides an excellent means for easily creating and altering a program, as well as allowing data entry. In comparison to other memory types, RAM is a relatively fast memory. The only noticeable disadvantage of battery-supported RAM is that the battery may eventually fail, although the processor constantly monitors the status of the battery. Battery-supported RAM has proven to be sufficient for most programmable controller applications. If a battery backup is not feasible, a controller with a nonvolatile memory option (e.g., EPROM) can be used in combination with the RAM. This type of memory arrangement provides the advantages of both volatile and nonvolatile memory. Figure

5-2 shows a RAM chip.

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Figure 5-2.

A 4K words by 8 bits RAM memory chip.

P

ROGRAMMABLE

R

EAD

-O

NLY

M

EMORY

Programmable read-only memory (PROM) is a special type of ROM because it can be programmed. Very few of today’s programmable controllers use PROM for application memory. When it is used, this type of memory is most likely a permanent storage backup for some type of RAM. Although a PROM is programmable and, like any other ROM, has the advantage of nonvolatility, it has the disadvantage of requiring special programming equipment. Also, once programmed, it cannot be easily erased or altered; any program change requires a new set of PROM chips. A PROM memory is suitable for storing a program that has been thoroughly checked while residing in RAM and will not require further changes or on-line data entry.

E

RASABLE

P

ROGRAMMABLE

R

EAD

-O

NLY

M

EMORY

Erasable programmable read-only memory (EPROM) is a specially designed PROM that can be reprogrammed after being entirely erased by an ultraviolet (UV) light source. Complete erasure of the contents of the chip requires that the window of the chip (see Figure 5-3) be exposed to a UV light source for approximately twenty minutes. EPROM can be considered a semipermanent storage device, because it permanently stores a program until it is ready to be altered.

EPROM provides an excellent storage medium for application programs that require nonvolatility, but that do not require program changes or on-line data entry. Many OEMs use controllers with EPROM-type memories to provide permanent storage of the machine program after it has been debugged and is fully operational. OEMs use EPROM because most of their machines will not require changes or data entry by the user.

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Figure 5-3.

A 4K by 8 bits EPROM memory chip.

An application memory composed of EPROM alone is unsuitable if on-line changes or data entry are required. However, many controllers offer EPROM application memory as an optional backup to battery-supported RAM.

EPROM, with its permanent storage capability, combined with RAM, which is easily altered, makes a suitable memory system for many applications.

E

LECTRICALLY

A

LTERABLE

R

EAD

-O

NLY

M

EMORY

Electrically alterable read-only memory (EAROM) is similar to EPROM, but instead of requiring an ultraviolet light source to erase it, an erasing voltage on the proper pin of an EAROM chip can wipe the chip clean. Very few controllers use EAROM as application memory, but like EPROM, it provides a nonvolatile means of program storage and can be used as a backup to RAM-type memories.

E

LECTRICALLY

E

RASABLE

P

ROGRAMMABLE

R

EAD

-O

NLY

M

EMORY

Electrically erasable programmable read-only memory (EEPROM) is an integrated circuit memory storage device that was developed in the mid-

1970s. Like ROMs and EPROMs, it is a nonvolatile memory, yet it offers the same programming flexibility as RAM does.

Several of today’s small and medium-sized controllers use EEPROM as the only memory within the system. It provides permanent storage for the program and can be easily changed with the use of a programming device

(e.g., a PC) or a manual programming unit. These two features help to eliminate downtime and delays associated with programming changes. They also lessen the disadvantages of electrically erasable programmable readonly memory.

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One of the disadvantages of EEPROM is that a byte of memory can be written to only after it has been erased, thus creating a delay. This delay period is noticeable when on-line program changes are being made. Another disadvantage of EEPROM is a limitation on the number of times that a single byte of memory can undergo the erase/write operation (approximately 10,000).

These disadvantages are negligible, however, when compared to the remarkable advantages that EEPROM offers.

5-3 M

EMORY

S

TRUCTURE AND

C

APACITY

B

ASIC

S

TRUCTURAL

U

NITS

PLC memories can be thought of as large, two-dimensional arrays of singleunit storage cells, each storing a single piece of information in the form of 1 or 0 (i.e., the binary numbering format). Since each cell can store only one binary digit and bit is the acronym for “binary digit,” each cell is called a bit.

A bit, then, is the smallest structural unit of memory. Although each bit stores information as either a 1 or a 0, the memory cells do not actually contain the numbers 1 and 0 per se. Rather, the cells use voltage charges to represent 1 and

0—the presence of a voltage charge represents a 1, the absence of a charge represents a 0. A bit is considered to be ON if the stored information is 1

(voltage present) and OFF if the stored information is 0 (voltage absent). The

ON/OFF information stored in a single bit is referred to as the bit status.

Sometimes, a processor must handle more than a single bit of data at a time.

For example, it is more efficient for a processor to work with a group of bits when transferring data to and from memory. Also, storing numbers and codes requires a grouping of bits. A group of bits handled simultaneously is called a byte. More accurately, a byte is the smallest group of bits that can be handled by the processor at one time. Although byte size is normally eight bits, this size can vary depending on the specific controller.

The third and final structural information unit used within a PLC is a word.

In general, a word is the unit that the processor uses when data is to be operated on or instructions are to be performed. Like a byte, a word is also a fixed group of bits that varies according to the controller; however, words are usually one byte or more in length. For example, a 16-bit word consists of two bytes.

Typical word lengths used in PLCs are 8, 16, and 32 bits. Figure 5-4 illustrates the structural units of a typical programmable controller memory.

Byte

Bit

Word

Figure 5-4.

Units of PLC memory: bits, bytes, and words.

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EMORY

C

APACITY AND

U

TILIZATION

Memory capacity is a vital concern when considering a PLC application.

Specifying the right amount of memory can save the costs of hardware and time associated with adding additional memory capacity later. Knowing memory capacity requirements ahead of time also helps avoid the purchase of a controller that does not have adequate capacity or that is not expandable.

Memory capacity is nonexpandable in small controllers (less than 64 I/O capacity) and expandable in larger PLCs. Small PLCs have a fixed amount of memory because the available memory is usually more than enough to provide program storage for small applications. Larger controllers allow memory expandability, since the scope of their applications and the number of their I/O devices have less definition.

Application memory size is specified in terms of K units, where each K unit represents 1024 word locations. A 1K memory, then, contains 1024 storage locations, a 2K memory contains 2048 locations, a 4K memory contains

4096 locations, and so on. Figure 5-5 illustrates two memory arrays of 4K each; however, they have different configurations—the first configuration uses one-byte words (8 bits) and the other uses two-byte words (16 bits).

Byte Byte Byte

Word

0000

0001

0002

Word

0000

0001

0002

4096 4096

(a) (b)

Figure 5-5.

Block illustration of

(a)

a 4K by 8 bits storage location and

(b)

a 4K by

16 bits storage location.

The memory capacity of a programmable controller in units of K is only an indication of the total number of storage locations available. Knowing this maximum number alone is not enough to determine memory requirements.

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Additional information concerning how program instructions are stored will help to make a better decision. The term memory utilization refers to the amount of data that can be stored in one location or, more specifically, to the number of memory locations required to store each type of instruction. The manufacturer can supply this data if the product literature does not provide it.

To illustrate memory capacity, let’s refer to Figure 5-5. Suppose that each normally open and normally closed contact instruction requires 16 bits of storage area. With these memory requirements, the effective storage area of the memory system in Figure 5-5a is half that of Figure 5-5b. This means that, to store the same size control program, the system in Figure 5-5a would require 8K memory capacity instead of 4K, as in Figure 5-5b.

After becoming familiar with how memory is utilized in a particular controller, users can begin to determine the maximum memory requirements for an application. Although several rules of thumb have been used over the years, no one simple rule has emerged as being the most accurate. However, with a knowledge of the number of outputs, an idea of the number of program contacts needed to drive the logic of each output, and information concerning memory utilization, memory requirement approximation can be reduced to simple multiplication.

E

XAMPLE

5-1

Determine the memory requirements for an application with the following specifications:

• 70 outputs, with each output driven by logic composed of 10 contact elements

• 11 timers and 3 counters, each having 8 and 5 elements, respectively

• 20 instructions that include addition, subtraction, and comparison, each driven by 5 contact elements

Table 5-1 provides information about the application’s memory utilization requirements.

I n s t r u c t i o n

E x a m i n e O N o r O F F ( c o n t a c t s )

O u t p u t c o li

A d d / s u b t r a c t / c o m p a r e

T i m e r / c o u n t e r

W o r d s o f M e m o r y

1

1

1

3

Table 5-1.

Memory utilization requirements.

R e q u i r e d

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S

OLUTION

Using the given information, a preliminary estimation of memory is:

(a)

Control logic = 10 contact elements/output rung

Number of output rungs = 70

(b)

Control logic = 8 contact elements/timer

Number of timers = 11

(c)

Control logic = 5 contact elements/counter

Number of counters = 3

(d)

Control logic = 5 contact elements/math and compare

Number of math and compare = 20

Based on the memory utilization information from Table 5-1, the total number of words is:

(a)

Total contact elements

Total outputs

Total words

(b)

Total contact elements

Total timers

Total words

(c)

Total contact elements

Total counters

Total words

(d)

Total contact elements

Total math and compare

Total words

(70 x 10)

(70 x 1)

(11 x 8)

(11 x 3)

(3 x 5)

(3 x 3)

(20 x 5)

(20 x 1)

700

70

770

88

33

121

15

9

24

100

20

120

Thus, the total words of memory required for the storage of the instructions, outputs, timers, and counters is 1035 words (770 + 121

+ 24 + 120), or just over 1K of memory.

The calculation performed in the previous example is actually an approximation because other factors, such as future expansion, must be considered before the final decision is made. After determining the minimum memory requirements for an application, it is wise to add an additional 25 to 50% more memory. This increase allows for changes, modifications, and future expansion. Keep in mind that the sophistication of the control program also affects memory requirements. If the application requires data manipulation and data storage, it will require additional memory. Normally, the enhanced instructions that perform mathematical and data manipulation operations

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5 will also have greater memory requirements. Depending on the PLC’s manufacturer, the application memory may also include the data table and I/O table (discussed in the next section). If this is the case, then the amount of

“real” user application memory available will be less than that specified.

Exact memory usage can be determined by consulting the manufacturer’s memory utilization specifications.

5-4 M

EMORY

O

RGANIZATION AND

I/O I

NTERACTION

The memory system, as mentioned before, is composed of two major sections—the system memory and the application memory—which in turn are composed of other areas. Figure 5-6 illustrates this memory organization, known as a memory map. Although the two main sections, system memory and application memory, are shown next to each other, they are not necessarily adjacent, either physically or by address. The memory map shows not only what is stored in memory, but also where data is stored, according to specific locations called memory addresses. An understanding of the memory map is very useful when creating a PLC control program and defining the data table.

Executive

Scratch Pad

Data Table

User Program

System

Memory

Application

Memory

Figure 5-6.

A simplified memory map.

Although two different programmable controllers rarely have identical memory maps, a generalized discussion of memory organization is still valid because all programmable controllers have similar storage requirements. In general, all PLCs must have memory allocated for four basic memory areas, which are as follows:

Executive Area

.

The executive is a permanently stored collection of programs that are considered part of the system itself. These supervisory programs direct system activities, such as execution of the control program, communication with peripheral devices, and other system housekeeping activities.

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Scratch Pad Area. This is a temporary storage area used by the CPU to store a relatively small amount of data for interim calculations and control. The CPU stores data that is needed quickly in this memory area to avoid the longer access time involved with retrieving data from the main memory.

Data Table Area. This area stores all data associated with the control program, such as timer/counter preset values and other stored constants and variables used by the control program or CPU. The data table also retains the status information of both the system inputs

(once they have been read) and the system outputs (once they have been set by the control program).

User Program Area. This area provides storage for programmed instructions entered by the user. The user program area also stores the control program.

The executive and scratch pad areas are hidden from the user and can be considered a single area of memory that, for our purpose, is called system

memory. On the other hand, the data table and user program areas are accessible and are required by the user for control applications. They are called application memory.

The total memory specified for a controller may include system memory and application memory. For example, a controller with a maximum of 64K may have executive routines that use 32K and a system work area (scratch pad) of

1

/

4

K. This arrangement leaves a total of 31

3

/

4

K for application memory (data table and user memory). Although it is not always the case, the maximum memory specified for a given programmable controller normally includes only the total amount of application memory available. Other controllers may specify only the amount of user memory available for the control program, assuming a fixed data table area defined by the manufacturer. Now, let’s take a closer look at the application memory and explore how it interacts with the user and the program.

A

PPLICATION

M

EMORY

The application memory stores programmed instructions and any data the processor will use to perform its control functions. Figure 5-7 shows a mapping of the typical elements in this area. Each programmable controller has a maximum amount of application memory, which varies depending on the size of the controller. The controller stores all data in the data table section of the application memory, while it stores programmed instructions in the user program section.

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Input Table

Output Table

Internal Bits

Register/Words

Control

Program

Instructions

Data

Table

Area

User

Program

Area

Figure 5-7.

Application memory map.

Data Table Section.

The data table section of a PLC’s application memory is composed of several areas (see Figure 5-7). They are:

the input table

the output table

the storage area

These areas contain information in binary form representing input/output status (ON or OFF), numbers, and codes. Remember that the memory structure contains cell areas, or bits, where this binary information is stored.

Following is an explanation of each of the three data table areas.

Input Table.

The input table is an array of bits that stores the status of digital inputs connected to the PLC’s input interface. The maximum number of input table bits is equal to the maximum number of field inputs that can be connected to the PLC. For example, a controller with a maximum of 64 field inputs requires an input table of 64 bits. Thus, each connected input has an analogous bit in the input table, corresponding to the terminal to which the input is connected. The address of the input device is the bit and word location of its corresponding location in the input table. For example, the limit switch connected to the input interface in Figure 5-8 has an address of 13007

8

as its corresponding bit in the input table. This address comes from the word location 130

8

and the bit number 07

8

, both of which are related to the module’s rack position and the terminal connected to the field device (see Section 6-2).

If the limit switch is OFF, the corresponding bit (13007

8

) is 0 (see Figure 5-

8a); if the limit switch is ON (see Figure 5-8b), the corresponding bit is 1.

During PLC operation, the processor will read the status of each input in the input module and place a value (1 or 0) in the corresponding address in the input table. The input table is constantly changing to reflect the changes of the input module and its connected field devices. These input table changes take place during the reading part of the I/O update.

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Limit

Switch

OFF

Input

Address

13007

8

4

5

2

3

6

L1

0

1

7

COM

Word

Address

17 16 15 14 13 12 11 10 07 06 05 04 03 02 01 00

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

130

8

(a) Limit switch is open; bit 07 is 0.

Limit

Switch

Input

Address

13007

8

ON

3

4

1

2

5

L1

0

6

7

COM

Word

Address

17 16 15 14 13 12 11 10 07 06 05 04 03 02 01 00

0 0 0 0 0 0 0 0

1

0 0 0 0 0 0 0

130

8

(b) Limit switch is closed; bit 07 is 1.

Figure 5-8.

Limit switch connected to a bit in the input table.

Output Table.

The output table is an array of bits that controls the status of digital output devices that are connected to the PLC’s output interface. The maximum number of bits available in the output table equals the maximum number of output field devices that can interface with the PLC. For example, a PLC with a maximum of 128 outputs requires an output table of 128 bits.

Like the input table, each connected output has an analogous bit in the output table corresponding to the exact terminal to which the output is connected.

The processor controls the bits in the output table as it interprets the control program logic during the program scan, turning the output modules ON and

OFF accordingly during the output update scan. If a bit in the table is turned

ON (1), then the connected output is switched ON (see Figure 5-9a); if a bit is cleared, or turned OFF (0), the output is switched OFF (see Figure 5-9b).

Remember that the turning ON and OFF of field devices via the output module occurs during the update of outputs after the end of the scan.

Storage Area.

The purpose of the storage area section of the data table is to store changeable data, whether it is one bit or a word (16 bits). The storage area consists of two parts: an internal bit storage area and a register/word

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17 16 15 14 13 12 11 10 07 06 05 04 03 02 01 00

0 0 0 0 0 0 0 0 0 0

1

0 0 0 0 0

051

8

(a) Bit 05 is 1; output is ON.

1

2

L1

0

3

Output

4

5

6

7

COM

Output

Address

05105

8

Word Address

17 16 15 14 13 12 11 10 07 06 05 04 03 02 01 00

0 0 0 0 0 0 0 0 0 0

0

0 0 0 0 0

051

8

(b) Bit 05 is 0; output is OFF.

4

5

2

3

6

L1

0

1

7

COM

Output

Output

Address

05105

8

Word Address

Figure 5-9.

Field output connected to a bit in the output table.

storage area (see Figure 5-10). The internal bit storage area contains storage bits that are referred to as either internal outputs, internal coils, internal

(control) relays, or internals. These internals provide an output, for interlocking purposes, of ladder sequences in the control program. Internal outputs do not directly control output devices because they are stored in addresses that do not map the output table and, therefore, any output devices.

When the processor evaluates the control program and an internal bit is energized (1), its referenced contact (the contact with this bit address) will change state—if it is normally open, it will close; if it is normally closed, it will open. Internal contacts are used in conjunction with either other internals or “real” input contacts to form interlocking sequences that drive an output device or another internal output.

The register/word storage area is used to store groups of bits (bytes and words). This information is stored in binary format and represents quantities or codes. If decimal quantities are stored, the binary pattern of the register represents an equivalent decimal number (see Chapter 2). If a code is stored, the binary pattern represents a BCD number or an ASCII code character (one character per byte).

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Internal 20003

17 16 15 14 13 12 11 10 07 06 05 04 03 02 01 00

200

Internal Bit

Storage Area

Byte

Byte

Byte

Byte

277

300

301

Word/Register

Storage Area

Word

377

Word/Register 377

(two bytes)

Figure 5-10.

Storage area section of the data table.

Values placed in the register/word storage area represent input data from a variety of devices, such as thumbwheel switches, analog inputs, and other types of variables. In addition to input values, these registers can contain output values that are destined to go to output interface modules connected to field devices, such as analog meters, seven-segment LED indicators (BCD), control valves, and drive speed controllers. Storage registers are also used to hold fixed constants, such as preset timer/counter values, and changing values, such as arithmetic results and accumulated timer/counter values.

Depending on their use, the registers in the register/word storage area may also be referred to as input registers, output registers, or holding registers.

Table 5-2 shows typical constants and variables stored in these registers.

C o n s t a n t s

T i m e r p r e s e t v a l u e s

C o u n t e r p r e s e t v a l u e s

L o o p c o n t r o l s e t p o i n t s

C o m p a r e s e t p o i n t s

D e c i m a l t a b l e s ( r e c i p e s )

A S C I I c h a r a c t e r s

A S C I I m e s s a g e s

N u m e r i c a l t a b l e s

T i m e r

C o u n t e r

V a r i

R e s u l t v a l u e s

b l e s

a c c u m u l a t e d v a l u e s a c c u m u l a t e d v a l u e s f r o m m a t h o p e r a t i o n s

A n a l o g i n p u t v a l u e s

A n a l o g o u t p u t v a l u e s

B C D i n p u t s

B C D o u t p u t s

a

Table 5-2.

Constants and variables stored in register/word storage area registers.

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E

XAMPLE

5-2

Referencing Figure 5-11, what happens to internal 2301 (word 23, bit

01) when the limit switch connected to input terminal 10 closes?

LS 10 2301

PL

10

20

2301 20

07 06 05 04 03 02 01 00

Word

23

Internal 2301

Figure 5-11.

Open limit switch connected to an internal output.

S

OLUTION

When LS closes (see Figure 5-12), contact 10 will close, turning internal output 2301 ON (a 1 in bit 01 of word 23). This will close contact

2301

2301 ( ) and turn real output 20 ON, causing the light PL to turn ON at the end of the scan.

LS

10

10 2301

2301 20

20

PL

07 06 05 04 03 02 01 00

Word

1

23

Internal 2301 ON

Figure 5-12.

Closed limit switch connected to an internal output.

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E

XAMPLE

5-3

For the memory map shown in Figure 5-13, illustrate how to represent the following numbers in the storage area:

(a)

the BCD number 9876,

(b)

the ASCII character

A (octal 101) in one byte (use lower byte), and

(c)

the analog value 2257 (1000 1101 0001 binary). Represent these values starting at register 400.

Input Table

Output Table

Storage Bit Table

Register/Word Table

Word

000

077

100

177

200

377

400

777

Figure 5-13.

Memory map.

S

OLUTION

Figure 5-14 shows the register data corresponding to the BCD number

9876, the ASCII character A, and the analog value 2257.

Input Table

Output Table

BCD number

9876

ASCII character

A

(101

8

) stored in one byte

(lower byte)

Storage Bit

Table

1001 1000 0111 0110

0100 0001

0000 1000 1101 0001

Word

000

077

100

177

200

377

400

401

402

Binary equivalent of

2257 value from an analog reading

777

Figure 5-14.

Solution for Example 5-3.

User Program Section.

The user program section of the application memory is reserved for the storage of the control logic. All of the PLC instructions that control the machine or process are stored in this area. The processor’s executive software language, which represents each of the PLC instructions, stores its instructions in the user program memory.

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When a PLC executes its program, the processor interprets the information in the user program memory and controls the referenced bits in the data table that correspond to real or internal I/O. The processor’s execution of the executive program accomplishes this interpretation of the user program.

The maximum amount of user program memory available is normally a function of the controller’s size (i.e., I/O capacity). In medium and large controllers, the user program area is made flexible by altering the size of the data table so that it meets the minimum data storage requirements. In small controllers, however, the user program area is normally fixed. The amount of user program memory required is directly proportional to the number of instructions used in the control program. Estimation of user memory requirements is accomplished using the method described earlier in Section 5-3.

5-5 C

ONFIGURING THE

PLC M

EMORY

—I/O A

DDRESSING

Understanding memory organization, especially the interaction of the data table’s I/O mapping and storage areas, helps in the comprehension of a PLC’s functional operation. Although the memory map is often taken for granted by

PLC users, a thorough understanding of it provides a better perception of how the control software program should be organized and developed.

D

ATA

T

ABLE

O

RGANIZATION

The data table’s organization, or configuration as it is sometimes called, is very important. The configuration defines not only the discrete device addresses, but also the registers that will be used for numerical and analog control, as well as basic PLC timing and counting operations. The intention of the following discussion of data table organization is not to go into detail about configuration, but to review what you have learned about the memory map, making sure that you understand how memory and I/O interact.

First, let’s consider an example of an application memory map for a PLC.

The controller has the following memory, I/O, and numbering system specifications:

• total application memory of 4K words with 16 bits

• capability of connecting 256 I/O devices (128 inputs and 128 outputs)

• 128 available internal outputs

• capability of up to 256 storage registers, selectable in groups of 8word locations, with 8 being the minimum number of registers possible (32 groups of 8 registers each)

• octal (base 8) numbering system with 2-byte (16-bit) word length

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To illustrate this memory map may seem unnecessary, but at this point, we do not know the starting address of the control program. This does not matter as far as the program is concerned; however, it does matter when determining the register address references to be used, since these register addresses are referred to in the control program (i.e., timer preset and accumulated values).

With this in mind, let’s set the I/O table boundaries. Assuming the inputs are first in the I/O mapping, the input table will start at address 0000

8

and end at address 0007

8

(see Figure 5-15). The outputs will start at address 0010

8

and end at address 0017

8

. Since each memory word has 16 bits, the 128 inputs require 8 input table words, and likewise for the outputs. The starting address for the internal output storage area is at memory location address 0020

8

and continues through address 0027

8

(8 words of 16 bits each totaling 128 internal output bits). Address 0030

8

indicates the beginning of the register/word storage area. This area must have a minimum of 8 registers, with a possibility of up to 256 registers added in 8-register increments. The first 8 required

8 words

8 words

8 words

256 words

(max)

3816 words

Word

Address

Octal

0000

8

17 16 15 14 13 12 11 10 7 6 5 4 3 2 1 0

Input Table

128 bits

0007

8

0010

8

Output Table

128 bits

0017

8

0020

8

Internals

128 bits

0027

8

0030

8

Registers

0427

8

0430

8

7777

8

Figure 5-15.

I/O table and user memory boundaries.

User Program

Memory

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5 registers, then, will end at address 0037

8

(see Figure 5-16). Any other 8register increments will start at 0040

8

, with the last possible address being

0427

8

, providing a total of 256 registers.

If all available storage registers are utilized, then the starting memory address for the control program will be 0430

8

. This configuration will leave 3816

(decimal) locations to store the control software. Figure 5-15 showed this maximum configuration.

Registers

(min)

Word

Address

0030

0037

0040

0047

0050

0057

0060

256 Registers

0427

0430

Figure 5-16.

Breakdown, in groups of eight, of the register storage area at its maximum capacity.

Most controllers allow the user to change the range of register boundaries without any concern for starting memory addresses of the program. Nonetheless, the user should know beforehand the number of registers needed. This will be useful when assigning register addresses in the program.

I/O A

DDRESSING

Throughout this text, we have mentioned that the programmable controller’s operation simply consists of reading inputs, solving the ladder logic in the user program memory, and updating the outputs. As we get more into PLC programming and the application of I/O modules, we will review the relationship between the I/O address and the I/O table, as well as how I/O addressing is used in the program.

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The input/output structure of a programmable controller is designed with one thing in mind—simplicity. Input/output field devices are connected to a

PLC’s I/O modules, which are located in the rack (the physical enclosure that houses a PLC’s supplementary devices). The rack location of each I/O device is then mapped to the I/O table, where the I/O module placement defines the address of the devices connected to the module. Some PLCs use internal module switches to define the addresses used by the devices connected to the module. In the end, however, all of the input and output connections are mapped to the I/O table.

Assume that a simple relay circuit contains a limit switch driving a pilot light

(see Figure 5-17). This circuit is to be connected to a PLC input module and output module, as shown in Figure 5-18. For the purpose of our discussion, let’s assume that each module contains 8 possible input or output channels and that the PLC has a memory map similar to the one shown previously in

Figure 5-15. The limit switch is connected to the number 5 (octal) terminal of the input module, while the light is connected to the number 6 (octal) terminal of the output module.

L1 L2

LS

PL

Hardwired Logic

Figure 5-17.

A relay circuit with a limit switch driving a pilot light.

Let’s assume that, due to their placement inside the rack, the I/O modules’ map addresses are word 0000 for the input module and word 0010 for the output module. Therefore, the processor will reference the limit switch as input 000005, and it will reference the light as output 001006 (i.e., the input is mapped to word 0000 bit 05, and the output is mapped to word 0010 bit 06).

These addresses are mapped to the I/O table. Every time the processor reads the inputs, it will update the input table and turn ON those bits whose input devices are 1 (ON or closed). When the processor begins the execution of the ladder program, it will provide power (i.e., continuity) to the ladder element corresponding to the limit switch, because its reference address is 1 (see

Figure 5-18). At this time, it will set output 001006 ON, and the pilot light will turn ON after all instructions have been evaluated and the end of scan

(EOS)—where the output update to the module takes place—has been reached. This operation is repeated every scan, which can be as fast as every thousandth of a second (1 msec) or less.

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Input

Input

Address

000005

4

5

6

1

2

L1

0

3

7

C

17 16 15 14 13 12 11 10 07 06 05 04 03 02 01 00

0 0 0 0 0 0 0 0 0 0

1

Bit and

Terminal

Address

0 0 0 0 0

Word

Address

0000

0 = Open

1 = Closed

0 = OFF

1 = ON

3

4

1

2

5

6

7

L1

0

Output

17 16 15 14 13 12 11 10 07 06 05 04 03 02 01 00

0 0 0 0 0 0 0 0 0

1

0 0 0 0 0 0

0010

Word

Address

Output

Address

001006

Figure 5-18.

Input/output module connected to field devices.

Note that addresses 000005 and 001006 can be used as often as required in the control program. If we had programmed a contact at 001006 to drive internal output 002017 (see Figure 5-19), the controller would turn its internal output bit (002017) to 1 every time output 001006 turned ON. However, this output would not be directly connected to any output device. Note that internal storage bit 002017 is located in word 0020 bit 17.

Input

Address

000005

000005 001006

Output

Address

001006

001006 002017

Figure 5-19.

PLC ladder implementation of Figure 5-17 using an internal output bit.

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5-6 S

UMMARY OF

M

EMORY

, S

CANNING

,

AND

I/O

I

NTERACTION

So far, you have learned about scanning, memory system organization, and the interaction of input and output field devices in a programmable controller.

In this section, we will present an example that summarizes these PLC operations. In this example, we will assume that we have a simple PLC memory, organized as shown in Figure 5-20, and a simple circuit (see Figure

5-21), which is connected to a PLC via I/O interfaces.

Executive

System

Memory

Application

Memory

Scratch Pad

Input Table

Output Table

Internal Bit and Register Storage

04

05

06

07

10

00

01

02

03

11

12

13

14

User Memory

777

Figure 5-20.

An example of a PLC memory map.

The instructions used to represent the simple control program, shown in

Figure 5-22, are stored in the user memory section, where specific binary 1s

0010 and 0s represent the instructions (e.g., the instruction). During the PLC scan, the executive program reads the status of inputs and places this data into the input data table. Then, the programmable controller scans the user memory to interpret the instructions stored. As the logic is solved rung by rung according to the status of the I/O table, the results from the program evaluation are stored in the output table and the storage bit table (if the program uses internals). After the evaluation (program scan), the executive program updates the values stored in the output table and sends commands to the output modules to turn ON or OFF the field devices connected to their respective interfaces. Figure 5-23 on the page 26 shows the steps that will occur during the evaluation of the PLC circuit shown in Figure 5-22.

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Input

Module

Output

Module

L1

The Memory System and I/O Interaction

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5

L1

LS

L2 PL L2

LS connected to address 0010

PL connected to address 0407

Figure 5-21.

A simple circuit connected to a PLC via I/O interfaces.

LS 0010 0010 0407

0407 PL

Figure 5-22.

Instructions used to represent the control program.

5-7 M

EMORY

C

ONSIDERATIONS

The previous sections presented an analysis of programmable controller memory characteristics regarding memory type, storage capacity, organization, structure, and their relationship to I/O addressing. Particular emphasis was placed on the application memory, which stores the control program and data. Careful consideration must also be given to the type of memory, since certain applications require frequent changes, while others require permanent storage once the program is debugged. A RAM with battery support may be adequate in most cases, but in others, a RAM and an optional nonvolatile-type memory may be required.

It is important to remember that the total memory capacity for a particular controller may not be completely available for application programming. The specified memory capacity may include memory utilized by the executive routines or the scratch pad, as well as the user program area.

The application memory varies in size depending on the size of the controller.

The total area available for the control program also varies according to the size of the data table. In small controllers, the data table is usually fixed, which

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5 means that the user program area will be fixed. In larger controllers, however, the data table size is usually selectable, according to the data storage requirements of the application. This flexibility allows the program area to be adjusted to meet the application’s requirements.

When selecting a controller, the user should consider any limitations that may be placed on the use of the available application memory. One controller, for example, may have a maximum of 256 internal outputs with no restrictions on the number of timers, counters, and various types of internal outputs used.

Another controller, however, may have 256 available internal outputs that are restricted to 50 timers, 50 counters, and 156 of any combination of various types of internal outputs. A similar type of restriction may also be placed on data storage registers.

One way to ensure that memory requirements are satisfied is to first understand the application requirements for programming and data storage, as well as the flexibility required for program changes and on-line data entry.

Creating the program on paper first will help when evaluating these capacity requirements. With the use of a memory map, users can learn how much memory is available for the application and, then, how the application memory should be configured for their use. It is also good to know ahead of time if the application memory is expandable. This knowledge will allow the user to make sound decisions about memory type and requirements.

K

EY

T

ERMS application memory data table electrically alterable read-only memory (EAROM) electrically erasable programmable read-only memory (EEPROM) erasable programmable read-only memory (EPROM) executive memory input table memory memory map nonvolatile memory output table programmable read-only memory (PROM) random-access memory (RAM) read-only memory (ROM) scratch pad memory storage area user program memory volatile memory

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IX

T

HE

D

ISCRETE

I

NPUT

/O

UTPUT

S

YSTEM

All science is concerned with the relationship of cause and effect.

—Laurence J. Peter

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Input/Output System

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C

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H

IGHLIGHTS

Input/output (I/O) systems put the “control” in programmable controllers.

These systems allow PLCs to work with field devices to perform programmed applications. This chapter introduces the most common type of I/O system—the discrete interface—and explains its physical, electrical, and functional characteristics. You will learn how discrete I/O systems provide the connection between PLCs and the outside world. In the following two chapters, you will further explore the operation and installation of input/ output systems, learning about analog and special function I/O interfaces.

6-1 I

NTRODUCTION TO

D

ISCRETE

I/O S

YSTEMS

The discrete input/output (I/O) system provides the physical connection between the central processing unit and field devices that transmit and accept digital signals (see Figure 6-1). Digital signals are noncontinuous signals that have only two states—ON and OFF. Through various interface circuits and field devices (limit switches, transducers, etc.), the controller senses and measures physical quantities (e.g., proximity, position, motion, level, temperature, pressure, current, and voltage) associated with a machine or process.

Based on the status of the devices sensed or the process values measured, the

CPU issues commands that control the field devices. In short, input/output interfaces are the sensory and motor skills that exercise control over a machine or process.

I

U

T

N

P

S

Processor

Power

Supply

Memory

U

T

S

T

P

O

U

CPU

Figure 6-1.

Block diagram of a PLC’s CPU and I/O system.

The predecessors of today’s PLCs were limited to just discrete input/output interfaces, which allowed interfacing with only ON/OFF-type devices. This limitation gave the PLC only partial control over many processes, because many process applications required analog measurements and manipulation of numerical values to control analog and instrumentation devices. Today’s controllers, however, have a complete range of discrete and analog interfaces, which allow PLCs to be applied to almost any type of control. Figure 6-2 shows a typical discrete I/O system.

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Figure 6-2.

Typical discrete input/output system.

6-2 I/O R

ACK

E

NCLOSURES AND

T

ABLE

M

APPING

An I/O module is a plug-in–type assembly containing circuitry that communicates between a PLC and field devices. All I/O modules must be placed or inserted into a rack enclosure, usually referred to as a rack, within the PLC

(see Figure 6-3). The rack holds and organizes the programmable controller’s

I/O modules, with a module’s rack location defining the I/O address of its connected device. The I/O address is a unique number that identifies the input/ output device during control program setup and execution. Several PLC manufacturers allow the user to select or set the addresses (to be mapped to the I/O table) for each module by setting internal switches (see Figure 6-4).

Figure 6-3.

Example of an I/O rack enclosure.

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Figure 6-4.

Internal switches used to set I/O addresses.

A rack, in general, recognizes the type of module connected to it (input or output) and the class of interface (discrete, analog, numerical, etc.). This module recognition is decoded on the back plane (i.e., the printed circuit board containing the data bus, power bus, and mating connectors) of the rack.

The controller’s rack configuration is an important detail to keep in mind throughout system configuration. Remember that each of the connected I/O devices is referenced in the control program; therefore, a misunderstanding of the I/O location or addresses will create confusion during and after the programming stages.

Generally speaking, there are three categories of rack enclosures:

• master racks

• local racks

• remote racks

The term master rack (see Figure 6-5) refers to the rack enclosure containing the CPU or processor module. This rack may or may not have slots available for the insertion of I/O modules. The larger the programmable controller system, in terms of I/O, the less likely the master rack will have I/O housing capability.

A local rack (see Figure 6-6) is an enclosure, which is placed in the same area as the master rack, that contains I/O modules. If a master rack contains I/O modules, the master rack can also be considered a local rack. In general, a local rack (if not a master) contains a local I/O processor that sends data to and

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6

Power

Supply

CPU

Additional

Memory

(a)

Communication

Module

Power

Supply

32 Local I/O

CPU

Communication

Module

(b)

Figure 6-5.

Master racks

(a)

without I/O modules and

(b)

with I/O modules.

Master Rack Local Rack

10 feet

Power

Supply

CPU

Communication

Module

Additional

Memory

Local I/O

Processor

(Communications)

I/O Modules

Figure 6-6.

Local rack configuration.

from the CPU. This bidirectional information consists of diagnostic data, communication error checks, input status, and output updates. The I/O image table maps the local rack’s I/O addresses.

As the name implies, remote racks (see Figure 6-7) are enclosures, containing I/O modules, located far away from the CPU. Remote racks contain an I/O processor (referred to as a remote I/O processor) that communicates input and output information and diagnostic status just like a local rack. The I/O addresses in this rack are also mapped to the I/O table.

The rack concept emphasizes the physical location of the enclosure and the type of processor (local, remote, or main CPU) that will be used in each particular rack. Every one of the I/O modules in a rack, whether discrete, analog, or special, has an address by which it is referenced. Therefore, each terminal point connected to a module has a particular address. This connec-

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10,000

feet

The Discrete

Input/Output System

C

HAPTER

6

Power

Supply

CPU

Main

Location

Master Rack

Remote I/O Processor

Remote Rack #1 Remote Rack #2

Remote I/O Remote I/O

Figure 6-7.

Remote rack configuration.

tion point, which ties the real field devices to their I/O modules, identifies each I/O device by the module’s address and the terminal point where it is connected. This is the address that identifies the programmed input or output device in the control program.

I/O R

ACK AND

T

ABLE

M

APPING

E

XAMPLE

PLC manufacturers set specifications for placing I/O modules in rack enclosures. For example, some modules accommodate 2 to 16 field connections, while other modules require the user to follow certain I/O addressing regulations. It is not our intention in this section to review all of the different manufacturers’ rules, but rather to explain how the I/O typically maps each rack and to illustrate some possible restrictions through a generic example.

As our example, let’s use the PLC I/O placement specifications shown in

Table 6-1. As Figure 6-8 illustrates, several factors determine the address location of each module. The type of module, input or output, determines the first address location from left to right (0 for outputs, 1 for inputs). The rack number and slot location of the module determine the next two address numbers. The terminal connected to the I/O module (0 through 7) represents the last address digit.

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There can be up to 7 I/O racks; the first rack (0) is the master rack. Racks 1 through 7 may be local or remote. Each rack has eight slots available for I/O modules.

Address 0005

Address

1003

7 6 5 4 3 2 1 0

0 0 0

Output 0

0

1

7

0

7

0

• PLC discrete I/O modules are available in 4 or 8 points

(connections) per module

(modularity). Maximum I/O capability is 512 points.

• The I/O image table is 8 bits wide.

• The octal numbering system is used.

1

2

3

4

7

0

7

0

3777

7

0

7

0

Input 1

Storage

User’s

Area

• The type of module, input or output, is detected by the rack’s back plane circuitry. If the module is an input, a 1 is placed in front of its three-digit address. If the module is an output, a 0 is placed in front of its three-digit address.

Table 6-1.

Specifications for the I/O rack enclosure example.

Input or

Output

Rack

Slot

1

0

Terminal x 000

Rack 0

2

3

4

5

6

7

0 1 2 3 4 5 6 7

0

1

4

5

6

7

Slot

Terminal

Connection x 077

Terminal x 100

1

2

0 1 2 3 4

0

Rack 1

3

5 6 7

4

5

6

7

Slot

Terminal

Connection x 177

Figure 6-8.

Illustration of the example I/O rack enclosure (x = 1 for inputs, 0 for outputs).

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The maximum capacity of this system is 512 inputs or 512 outputs, or a total combination of 512 inputs and outputs that do not overlap addresses. The 512 possible inputs come from the following word addresses:

512 input addresses

(64 words

×

8 bits/word)

1000

8

to

1777

8

(word 100, bit 0)

(word 177, bit 7)

While the 512 possible outputs come from word addresses:

512 output addresses

(64 words

×

8 bits/word)

0000

8

to

0777

8

(word 000, bit 0)

(word 077, bit 7)

Again, note that the capacity is a total of 512 inputs and outputs together, not

512 each. If one input module takes a slot in the input table, the mirror image slot in the output table is taken by those inputs. The same applies for output modules.

For instance (see Figure 6-9), if a 4-point output module (see Figure 6-9b) is placed in rack 0, slot 0 (terminal addresses 0–3), the output table word 000

8

, bits 0–3, represented by the shaded area in Figure 6-9c, will be mapped for outputs. Consequently, the input table image corresponding to the slot location 100

8

, bits 0–3 (represented by the word taken) will not have a mapped reference input, since it has already been taken by outputs. If an 8-point input module is used in rack 0, slot 2 (see Figure 6-9a), indicating word location

102

8

(input = 1), the whole eight bits of that location in the input table (location

102

8

bits 0–7) would be taken by the mapping; the corresponding address in the output table (word location 002

8

, bits 0–7 in Figure 6-9c) would not be able to be mapped. The bits from the output table that do not have a mapping due to the use of input modules could be used as internal outputs, since they cannot be physically connected output field devices (e.g., bits 4–7 of word 000).

For example, in Figure 6-9c, output addresses 0004 through 0007

(corresponding to word 000, bits 4–7 in the I/O table) cannot be physically connected to an output module because their map locations are taken by an input module (at word 100, bits 4–7). Therefore, these reference addresses can only be used as internal coil outputs. The use of these output bits as internal outputs is shown in Figure 6-10, where output 0004 (now used as an internal coil) will be turned ON if its logic is TRUE and contacts from this output can be used in other output rungs.

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Slot

6

7

4

5

0

1

2

3

0

Rack 0

1 2 3 4 5 6 7

(a)

The Discrete

Input/Output System

C

HAPTER

6

Module

Module

(b)

Note:

The shaded areas indicate a slot taken by an input or output module.

Word

Slot

Rack

1 Input

0 Output

7 6 5 4 3 2 1 0

Taken

Taken

Empty

Taken

000

001

002

003

004

Taken

Taken

Taken

Taken

Empty

077

100

101

102

103

104

Outputs

Inputs

Terminal

Address

2

3

0

1

2

3

0

1

2

3

0

1

6

7

4

5

177

(c)

Figure 6-9.

Diagrams of

(a)

an I/O table,

(b)

two 4-point I/O modules in one slot, and

(c)

an

I/O table mapping.

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0004

The Discrete

Input/Output System

C

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0004

Figure 6-10.

Output 0004 used as an internal coil.

6-3 R

EMOTE

I/O S

YSTEMS

In large PLC systems (upwards of 512 I/O), input/output subsystems can be located away from the central processing unit. A remote I/O subsystem is a rack-type enclosure, separate from the CPU, where I/O modules can be installed. A remote rack includes a power supply that drives the logic circuitry of the interfaces and a remote I/O adapter or processor module that allows communication with the main processor (CPU). The communication between I/O adapter modules and the CPU occurs in serial binary form at speeds of up to several megabaud (millions of bits transmitted per second). This serial information packet contains 1s and 0s, representing both the status of the I/O and diagnostic information about the remote rack.

The capacity of a single subsystem (rack) is normally 32, 64, 128, or 256

I/O points. A large system with a maximum capacity of 1024 I/O points may have subsystem sizes of either 64 or 128 points—eight racks with 128 I/O, sixteen racks with 64 I/O, or some combination of both sizes equal to 1024

I/O. In the past, only discrete interface modules could be placed in the racks of most remote subsystems. Today, however, remote I/O subsystems also accommodate analog and special function interfaces.

Individual remote subsystems are normally connected to the CPU via one or two twisted-pair conductors or a single coaxial cable, using either a daisy

chain, star, or multidrop configuration (see Figure 6-11). The distance a remote rack can be placed away from the CPU varies among products, but it can be as far as two miles. Another approach for connecting remote racks to the CPU is a fiber-optic data link, which allows greater distances and has higher noise resistance.

Remote I/O offers tremendous materials and labor cost savings on large systems where the field devices are clustered at various, distant locations.

With the CPU in a main control room or some other central area, only the communication link must be wired between the remote rack and the processor, replacing hundreds of field wires. Another advantage of remote I/O is that

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Serial

Interface

Module

CPU

Remote

Rack

Remote

Rack

Remote Serial

Interface

Remote

Rack

CPU

Serial

Interface

Module

Remote

Rack

Remote

Rack

Remote Serial

Interface

CPU

Serial

Interface

Module

Remote

Rack

Remote

Rack

Remote

Rack

Remote Serial

Interface

Remote

Rack

Figure 6-11.

Remote I/O configurations:

(a)

daisy chain,

(b)

star, and

(c)

multidrop.

6-4 PLC I

NSTRUCTIONS FOR

D

ISCRETE

I

NPUTS

The most common class of input interfaces is digital (or discrete). Discrete

input interfaces connect digital field input devices (those that send noncontinuous, fixed-variable signals) to input modules and, consequently, to the programmable controller. The discrete, noncontinuous characteristic of digital input interfaces limits them to sensing signals that have only two states

(i.e., ON/OFF, OPEN/CLOSED, TRUE/FALSE, etc.). To an input interface circuit, discrete input devices are essentially switches that are either open or closed, signifying either 1 (ON) or 0 (OFF). Table 6-2 shows several examples of discrete input field devices.

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F i e l d I n p u t D e v i c e s

C i r c u i t

L e v e l b r e a k e s w i t c h e s r s

L i m i t

M o t o r s w i t c h e s t a r t e r s c o n t a c t s

P h o t o e l e c t r i c e y e s

P r o x i m i t y s w i t c h e s

P u s h b u t t o n s

R e l a y c o n t a c t s

S e l e c t o r s w i t c h e s

T h u m b w h e e l s w i t c h e s ( T W S )

Table 6-2.

Discrete input devices.

Many instructions are designed to manipulate discrete inputs. These instructions handle either single bits, which control one field input connection, or

multibits, which control many input connections. Regardless of whether the instruction controls one discrete input or multiple inputs, the information provided by the field device is the same—either ON or OFF.

During our discussion of input modules, keep in mind the relationship between interface signals (ON/OFF), rack and module locations (where the input device is inserted), and I/O table mapping and addressing (used in the control program). Remember that each PLC manufacturer determines the addressing and mapping scheme used with its systems. Manufacturers may use a 1 for an input and a 0 for an output, or they may simply assign an I/O address for the input or output module inserted in a particular slot of a rack.

Figure 6-12 illustrates a simplified 8-bit image table where limit switch LS1 is connected to a discrete input module in rack 0, which can connect 8 field inputs (0–7). Note that LS1 is known as input 014, which stands for rack 0, slot 1, connection 4.

When an input signal is energized (ON), the input interface senses the field device’s supplied voltage and converts it to a logic-level signal (either

1 or 0), which indicates the status of that device. A logic 1 in the input table indicates an ON or CLOSED condition, and a logic 0 indicates an OFF or

OPEN condition. PLC symbolic instructions, which include the normally open ( ) and normally closed ( ) instructions, transfer this field status information into the input table.

For multibit modules that receive multiple inputs, such as thumbwheel switches used in register (BCD) interfaces, block transfer or get data instructions place input values into the data table (see Figure 6-13). Chapter 9 explains single-bit and multibit instructions in more detail.

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Rack 0

0 1 2 3 4 5 6 7

NC

0

1

2

3

4

5

6

7

L2

L2 L1

LS1

Address 014

7 6 5 4 3 2 1 0 Word

00

01

L1

LS1

Status transferred to table via single bit instruction

014 014 or

L2

Open = Logic 0

014

L1

LS1

L2

Closed = Logic 1

014

Figure 6-12.

An 8-bit input image table.

Multibit

Input

Device

(16 Bits)

Multibit

Input

Module

(16 Bits)

Block transfer or get data instruction

1716151413121110 7 6 5 4 3 2 1 0

Stores 16 bits of information in a register

Figure 6-13.

Block transfer and get data instructions transferring multibit input values into the data table.

E

XAMPLE

6-1

For the rack configuration shown in Figure 6-14, determine the address for each field device wired to each input connection in the 8bit discrete input module. Assume that the first four slots of this 64 I/O micro-PLC are filled with outputs and that the second four slots are filled with inputs. Also, assume that the addresses follow a rack-slotconnection scheme and start at I/O address 000. Note that the number system is octal.

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L1

LS1

PB1

LS2

Rack 0

Outputs Inputs

0 1 2 3 4 5 6 7

L1 L1 L1 L1 o o o o

3

4

5

NC

0

1

2

6

7

L2

L2

Figure 6-14.

Rack configuration for Example 6-1.

S

OLUTION

The discrete input module (where the input devices are connected) will have addresses 070 through 077, because it is located in rack 0, slot number 7. Therefore, each of the field input devices will have addresses as shown in Figure 6-15; LS1 will be known as input 070,

PB1 as input 071, and LS2 as input 072. The control program will reference the field devices by these addresses. If LS1 is rewired to another connection in another discrete input, its address reference will change. Consequently, the address must be changed in the control program because there can only be one address per discrete field input device connection.

7 6 5 4 3 2 1 0

Word

07

LS1 (070)

PB1 (071)

LS2 (072)

Figure 6-15.

Field device addresses for the rack configuration in Example 6-1.

6-5 T

YPES OF

D

ISCRETE

I

NPUTS

As mentioned earlier, discrete input interfaces sense noncontinuous signals from field devices—that is, signals that have only two states. Discrete input interfaces receive the voltage and current required for this operation from the back plane of the rack enclosure where they are inserted (see Chapter 4 for loading considerations). The signal that these discrete interfaces receive from

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6 input field devices can be of different types and/or magnitudes (e.g., 120

VAC, 12 VDC). For this reason, discrete input interface circuits are available in different AC and DC voltage ratings. Table 6-3 lists the standard ratings for discrete inputs.

I n p u t R a t i n g s

2

4

4

8 v v o l o l t s t s

1 2 0 v o l t s

2 3 0 v o l t s

A C / D C

A C / D C

A C / D C

A C / D C

T T L l e v e l

N o n v o l t a g e

I s o l a t e d

5 – 5 0 v o l t i n p u t s D C ( s i n k / s o u r c e )

Table 6-3.

Standard ratings for discrete input interfaces.

To properly apply input interfaces, you should have an understanding of how they operate and an awareness of certain operating specifications. Section

6-9 discusses these specifications, while Chapter 20 describes start-up and maintenance procedures for I/O systems. Now, let’s look at the different types of discrete input interfaces, along with their operation and connections.

AC/DC I

NPUTS

Figure 6-16 shows a block diagram of a typical AC/DC input interface circuit. Input circuits vary widely among PLC manufacturers, but in general,

AC/DC interfaces operate similarly to the circuit in the diagram. An AC/DC input circuit has two primary parts:

• the power section

• the logic section

These sections are normally, but not always, coupled through a circuit that electrically separates them, providing isolation.

Power Isolation Logic

Input

Signal

Bridge

Rectifier

Power LED

Noise and

Debounce

Filter

Threshold

Level

Detection

Isolator

Logic

Figure 6-16.

Block diagram of an AC/DC input circuit.

Logic LED

To

Processor

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The power section of an AC/DC input interface converts the incoming AC voltage from an input-sensing device, such as those described in Table 6-2, to a DC, logic-level signal that the processor can use during the read input section of its scan. During this process, the bridge rectifier circuit of the interface’s power section converts the incoming AC signal to a DC-level signal. It then passes the signal through a filter circuit, which protects the signal against bouncing and electrical noise on the input power line. This filter causes a signal delay of typically 9–25 msec. The power section’s threshold circuit detects whether the signal has reached the proper voltage level for the specified input rating. If the input signal exceeds and remains above the threshold voltage for a duration equal to the filter delay, the signal is recognized as a valid input.

Figure 6-17 shows a typical AC/DC input circuit. After the interface detects a valid signal, it passes the signal through an isolation circuit, which completes the electrically isolated transition from an AC signal to a DC, logic-level signal. The logic circuit then makes the DC signal available to the processor through the rack’s back plane data bus, a pathway along which data moves. The signal is electrically isolated so that there is no electrical connection between the field device (power) and the controller (logic). This electrical separation helps prevent large voltage spikes from damaging either the logic side of the interface or the PLC. An optical coupler or a pulse transformer provides the coupling between the power and logic sections.

R

1

Bridge Filter

R

2

Threshold

Detection

Z d

Isolator

Optical

Coupler

Input

Signal

R

1

C R 3 D

To Logic

Figure 6-17.

Typical AC/DC input circuit.

Most AC/DC input circuits have an LED (power) indicator to signal that the proper input voltage level is present (refer to Figure 6-16). In addition to the power indicator, the circuit may also have an LED to indicate the presence of a logic 1 signal in the logic section. If an input voltage is present and the logic circuit is functioning properly, the logic LED will be lit. When the circuit has both voltage and logic indicators and the input signal is ON, both LEDs must be lit to indicate that the power and logic sections of the module are operating correctly. Figure 6-18 shows AC/DC device connection diagrams.

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L1

C

1

2

3

4

L2

The Discrete

Input/Output System

C

HAPTER

6

+

User DC

Power

Supply

1

2

3

4

C

Figure 6-18.

Device connections for

(a)

an AC input module and

(b)

a DC input module with common wire connection “C” used to complete the path from hot.

DC I

NPUTS

(S

INK

/S

OURCE

)

A DC input module interfaces with field input devices that provide a DC output voltage. The difference between a DC input interface and an AC/DC input interface is that the DC input does not contain a bridge circuit, since it does not convert an AC signal to a DC signal. The input voltage range of a DC input module varies between 5 and 30 VDC. The module recognizes an input signal as being ON if the input voltage level is at 40% (or another manufacturer-specified percentage) of the supplied reference voltage. The module detects an OFF condition when the input voltage falls under 20% (or another manufacturer-specified percentage) of the reference DC voltage.

A DC input module can interface with field devices in both sinking and

sourcing operations, a capability that AC/DC input modules do not have.

Sinking and sourcing operations refer to the electrical configuration of the circuits in the module and field input devices. If a device provides current when it is ON, it is said to be sourcing current. Conversely, if a device

receives current when it is ON, it is said to be sinking current. There are both sinking and sourcing field devices, as well as sinking and sourcing input modules. The most common, however, are sourcing field input devices and sinking input modules. Rocker switches inside a DC input module may be used to select sink or source capability. Figure 6-19 depicts sinking and sourcing operations and current direction.

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(b)

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C

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6

+V

DC

Reference

i

Field

Input

Device

Source

Output Signal

i

Input

i

Switch

A

100K

1.2K

To Circuit

1.2K

i

Ground

Switch

B

Sink

Input

Module

+V

DC

Reference

i

Switch

A

Sink

i

Field

Input

Device

Output Signal

i

Input

Switch

B

1.2K

100K

To Circuit

1.2K

Source

Input

Module

Figure 6-19.

Current for

(a)

a sinking input module/sourcing input device and

(b)

a sourcing input module/sinking input device.

During interfacing, the user must keep in mind the minimum and maximum specified currents that the input devices and module are capable of sinking or sourcing. Also, if the module allows selection of a sink or source operation via selector switches, the user must assign them properly. A potential interface problem could arise, for instance, if an 8-input module was set for a sink operation and all input devices except one were operating in a source configuration. The source input devices would be ON, but the module would not properly detect the ON signal, even though a voltmeter would detect a voltage across the module’s terminals. Figure 6-20 illustrates three field device connections to a DC input module with both sinking and sourcing input device capabilities.

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+V

DC

Power

Supply

i

3-Wire

Sinking

Input

Device

Sourcing

Input

Device

i

Sinking

Input

Device

i i

Ground

Figure 6-20.

Field device connections for a sink/source DC input module.

The majority of DC proximity sensors used as PLC inputs provide a sinking sensor output, thereby requiring a sinking input module. However, if an application requires only one sinking output and the controller already has several sourcing inputs connected to a sourcing input module, the user may use the inexpensive circuit shown in Figure 6-21 to interface the sinking output with the sourcing input module. The sourcing current provided by this input is approximately 50 mA. Note that if the supply voltage (V

S

) is increased, the current I out will be greater than 50 mA.

DC Proximity

Sensor

Sensor's

Sinking

Output

V s

= +12VDC

R

1

R

2

100K

22K

PNP

Transistor

(e.g., 2N2907)

To Sourcing

Input Module

OUT

Converting Circuit

Figure 6-21.

Conversion circuit interfacing a sinking output with a sourcing input module.

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3

4

5

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7

8

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I

SOLATED

AC/DC I

NPUTS

Isolated input interfaces operate like standard AC/DC modules except that each input has a separate return, or common, line. Depending on the manufacturer, standard AC/DC input interfaces may have one return line per 4, 8, or 16 points. Although a single return line, provided in standard multipoint input modules, may be ideal for 95% of AC/DC input applications, it may not be suitable for applications requiring individual or isolated common lines. An example of this type of application is a set of input devices that are connected to different phase circuits coming from different power distribution centers. Figure 6-22 illustrates a sample device connection for an AC/

DC input isolation interface capable of connecting five input devices.

L1

A

AC

L1

B

L1

C

L2

A

AC

L2

B

L2

C

1

1C

2

2C

3

3C

4C

4

5

5C

+

User DC

Power

Supply

Figure 6-22.

Device connection for an AC/DC isolated input interface.

Isolated input interfaces provide fewer points per module than their standard counterparts. This decreased modularity exists because isolated inputs require extra terminal connections to connect each of the return lines.

If isolation modules are not available for an application requiring singular return lines, standard interfaces may be used. However, the standard inter-

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6 faces will lose inputs, because to keep isolation among inputs, they can have only one input line per return line. For example, a 16-point standard module with one common line per four points can accommodate four distinct isolated field input devices (each from a different source). However, as a result, it will lose 12 points. Figure 6-23 illustrates an 8-point module with different commons for every four inputs, thus allowing two possible isolated inputs.

L1

A

AC

L1

B

L2

A

AC

L2

B

C

1

2

3

4

5

6

7

8

C

Figure 6-23.

An 8-point standard input module used as an isolated module.

TTL I

NPUTS

Transistor-transistor logic (TTL) input interfaces allow controllers to accept signals from TTL-compatible devices, such as solid-state controls and sensing instruments. TTL inputs also interface with some 5 VDC–level control devices and several types of photoelectric sensors. The configuration of a TTL interface is similar to an AC/DC interface, but the input delay time caused by filtering is much shorter. Most TTL input modules receive their power from within the rack enclosure; however, some interfaces require an external 5-VDC power supply (rack or panel mounted).

Transistor-transistor logic modules may also be used in applications that use

BCD thumbwheel switches (TWS) operating at TTL levels. These interfaces provide up to eight inputs per module and may have as many as sixteen inputs (high-density input modules). A TTL input module can also interface

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6 with thumbwheel switches if these input devices are TTL compatible. Figure

6-24 illustrates a typical TTL input module connection diagram with an external power supply.

User

DC Supply

+ –

1K*

**

+

1K*

**

* Typical value

**Ground cable shield at one end only

**Ground cable shield at one end only

(Chassis mounting bolt)

Figure 6-24.

TTL input connection diagram.

7

8

5

6

C

+V

1

2

3

4

R

EGISTER

/BCD I

NPUTS

Multibit register/BCD input modules enhance input interfacing methods with the programmable controller through the use of standard thumbwheel switches. This register, or BCD, configuration allows groups of bits to be input as a unit to accommodate devices requiring that bits be in parallel form.

Register/BCD interfaces are used to input control program parameters to specific register or word locations in memory (see Figure 6-25). Typical input parameters include timer and counter presets and set-point values. The operation of register input modules is almost identical to that of TTL and DC input modules; however, unlike TTL input modules, register/BCD interfaces accept voltages ranging from 5 VDC (TTL) to 24 VDC. They are also grouped in modules containing 16 or 32 inputs, corresponding to one or two I/O registers (mapped in the I/O table), respectively. Data manipulation instructions, such as get or block transfer in, are used to access the data from the register input interface. Figure 6-26 illustrates a typical device connection for a register input.

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TWS

2 8 6 7

Data

16

M

O

D

U

L

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Block transfer or get data instruction

Memory

Word/Register

Storage

Figure 6-25.

BCD interface inputting parameters into register/word locations

in memory.

Thumbwheel

Switches

1s Units

10s Units

100s Units

1000s Units

5

8

6

7

Least Significant Bit

1

0

0

1

1

1

1

0

0

0

0

1

1

0

1

0

Bit

Address

00

01

02

03

10

11

12

13

04

05

06

07

14

15

16

17

+V

COM

Each input controls one bit location in an input register

Most Significant Bit

Figure 6-26.

Register or BCD input module connection diagram.

Some manufacturers provide multiplexing capabilities that allow more than one input line to be connected to each terminal in a register module (see Figure

6-27). This kind of multiplexed register input requires thumbwheel switches that have an enable line (see Figure 6-28). When this line is selected, the TWS provides a BCD output at its terminals; when it is not selected, the TWS does not provide an output. If the TWS set provides four digits with one enable line

(see Figure 6-29), then the enable line will make all of the outputs available

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TWS4

5 8 6 7

16

TWS3

4 8 6 7

16

TWS2

3 8 6 7

Memory

Register

Storage

TWS1

TWS2

TWS3

TWS4

Digits

4th 3rd 2nd 1st

16

TWS1

2 8 6 7

16

16

Multiplex

M

O

D

U

L

E

B

C

D

Block transfer or get data instruction

Figure 6-27.

Multiplexing input module connection diagram.

5

Enable

Not Selected

5

Enable

Selected

No

Output

0 1 0 1

Output

Available

Figure 6-28.

Single-digit TWS with enable line.

5 8 6 7

Enable

0 1 0 1 1 0 0 0 0 1 1 0 0 1 1 1

Output available when enable is selected

Figure 6-29.

A 4-digit TWS with one common enable line.

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6 when it is selected. This multiplexing technique minimizes the number of input modules required to read several sets of four-digit TWS. For instance, a 16-bit input module capable of multiplexing 6 input devices (6

×

16 = 96 total inputs) could receive information from six 4-digit thumbwheel switches. The user would not need to decode each of the six sets of 16 input groups, since the multiplexed module enables each group of 16 inputs to be read one scan at a time. However, the user may have to specify the register or word addresses where the 16-bit data will be stored through an instruction that specifies the storage location, along with the length or number of registers to be stored. Figure 6-30 illustrates a block diagram connection for a module capable of multiplexing four 4-digit TWS (four 16-bit input lines).

T W S 4 T W S 3 T W S 2 T W S 1

4 9 1 7 3 8 1 0 2 5 7 8 3 5 8 3

4 3 2 1 4 3 2 1 4 3 2 1 4 3 2 1

4 4 4 4

4

Ones (1s)

4

Tens (10s)

4

Hundreds (100s)

4

Thousands (1000s)

06

07

10

11

12

13

14

00

01

02

03

04

05

15

16

17

EN 1

EN 2

EN 3

EN 4

Figure 6-30.

Block diagram of a multiplexed input module connected to four 4-digit TWS.

E

XAMPLE

6-2

Referencing Figure 6-30, determine the values of the registers (in

BCD) after an input transfer is made (in this case via a block transfer input of data). The input has a starting destination register of 4000 and a length of 4 registers (i.e., from registers 4000 to 4003). Assume that

TWS set 1 is read first, TWS set 2 is read second, etc.

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S

OLUTION

The contents of register 4000 in BCD will be the BCD code equivalent of the first set of thumbwheel switches connected to the PLC register input module, and likewise for registers 4001, 4002, and 4003. Figure

6-31 shows the register contents. Note that the contents of each register does not represent the decimal equivalent of the binary pattern stored in that location, but rather the BCD equivalent. To change this number to decimal, you must convert the BCD pattern to its decimal equivalent using other instructions. For instance, the decimal equivalent of the binary (BCD) pattern stored in register 4000 is 13,699, not 3,583, as the TWS (BCD number) indicates.

Word or

Register

Contents in BCD

4000

4001

4002

4003

0 0 1 1 0 1 0 1 1 0 0 0 0 0 1 1

0 0 1 0 0 1 0 1 0 1 1 1 1 0 0 0

0 0 1 1 1 0 0 0 0 0 0 1 0 0 0 0

0 1 0 0 1 0 0 1 0 0 0 1 0 1 1 1

3583

2578

3810

4917

Value of 1st Set

Value of 2nd Set

Value of 3rd Set

Value of 4th Set

Storage Table

Figure 6-31.

Register contents for Example 6-2.

6-6 PLC I

NSTRUCTIONS

F

OR

D

ISCRETE

O

UTPUTS

Like discrete input interfaces, discrete output interfaces are the most commonly used type of PLC output modules. These outputs connect the programmable controller with discrete output field devices. Many single-bit and multibit instructions are designed to manipulate discrete outputs.

During this discussion of output modules, keep in mind the relationship between output interface signals (ON/OFF), rack and module locations

(where the output modules are inserted), and I/O table maps and addresses

(used in the control program). Figure 6-32 illustrates a simplified 8-bit output image table. The coil of the motor starter (M1) is connected to a discrete output module (slot 7) in rack 0, which can connect 8 field inputs (0–7). Note that the starter will be known as output 077, which stands for rack 0, slot 7, terminal connection 7.

Output interface circuitry switches the supplied voltage from the PLC ON or

OFF according to the status of the corresponding bit in the output image table.

This status (1 or 0) is set during the execution of the control program and is sent to the output module at the end of scan (output update). If the signal from the processor is 1, the output module will switch the supplied voltage

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(e.g., 120 VAC) to the output field device, turning the output ON. If the signal received from the processor is 0, the module will deactivate the field device by switching to 0 volts, thus turning it OFF. Typically, an output coil ( ) instruction, like the one shown in Figure 6-32, activates the output interface when the reference address is logic 1 (ON).

Rack 0

0 1 2 3 4 5 6 7

L1 L2

L1

0

1

2

3

4

5

6

7

L2

077

M1

L2

7 6 5 4 3 2 1 0

Word

07

077

Output

Coil

Status transferred from table via a single-bit instruction

Logic 0 = M1 OFF

L1

Logic 1 = M1 ON

077

L2

M1

Figure 6-32.

An 8-bit output image table with the module’s L2 connection completing the path from L1 to L2.

Multibit outputs, such as BCD register outputs, use functional block instructions (e.g., block transfer out) to output a word or register to the module (see

Figure 6-33). These instructions, in conjunction with input instructions, are heavily utilized during the programming and control of discrete I/O signals.

Chapter 9 provides more information about the use and operation of functional block instructions.

1716151413121110 7 6 5 4 3 2 1 0

Block transfer out instruction

Stores 16 bits of register information to a

16-bit output module

Multibit

Output

Module

(16 Bits)

Multibit

Output

Device

(16 Bits)

Figure 6-33.

Functional block instruction transferring the output register contents to the module.

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6

E

XAMPLE

6-3

For the rack configuration shown in Figure 6-34, determine the addresses for each of the output field devices wired to the output connections in the 8-bit discrete input module. Assume that the first four slots of this 64 I/O micro-PLC are filled with outputs and that the second four are filled with inputs. The addressing scheme follows a rack-slot-connection

convention (like Example 6-1), which starts at I/O address 000. Note that the number system is octal.

Rack 0

Outputs Inputs

0 1 2 3 4 5 6 7

L1

5

6

3

4

7

L2

1

2

L1

0

PL1 L2

M1

SOL1

Figure 6-34.

Rack configuration for Example 6-3.

S

OLUTION

The field devices in this discrete output module will have addresses

010 through 017 because the module is located in rack 0, slot number

1 and the 8 field devices are connected to bits 0 through 7. Therefore, each of the field output devices will have the addresses shown in

Figure 6-35—PL1 will be known as output 010, M1 as 011, and SOL1 as 012. Every time a bit address becomes 1, the field device with the corresponding address will be turned ON.

7 6 5 4 3 2 1 0

Word

01

PL1 (010)

M1 (011)

SOL1 (012)

Figure 6-35.

Field device addresses for the outputs in Example 6-3.

If M1 is rewired to another connection in another discrete output, the address that turns it ON and OFF will change. Consequently, the control program must be changed, since there can be only one reference address per discrete field output device connection.

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6-7 D

ISCRETE

O

UTPUTS

Discrete output modules receive their necessary voltage and current from their enclosure’s back plane (see Chapter 4 for loading considerations). The field devices with which discrete output modules interface may differ in their voltage requirements; therefore, several types and magnitudes of voltage are provided to control them (e.g., 120 VAC, 12 VDC). Table 6-4 illustrates some typical output field devices, while Table 6-5 lists the standard output ratings found in discrete output applications.

O u t p u t D e v i c e s

A l a r m s

C o n t r o l

F a n s

H o r n s r e l a y s

L i g h t s

M o t o r s t a r t e r s

S o l e n o i d s

V a l v e s

Table 6-4.

Output field devices.

O u t p u t R a t i n g s

1 2 –

1 2 0

4 v

8 o l v t o l s t s A C / D C

A C / D C

2 3 0 v o l t s

C o n t a c t

A C / D C

( r e l a y )

I s o l a t e d o u t p u t

T T L

5 – 5 0 l e v e l v o l t s D C ( s i n k / s o u r c e )

Table 6-5.

Standard output ratings.

AC O

UTPUTS

AC output circuits, like input circuits, vary widely among PLC manufacturers, but the block diagram shown in Figure 6-36 depicts their general configuration. This block configuration shows the main sections of an AC output module, along with how it operates. The circuit consists primarily of the logic and power sections, coupled by an isolation circuit. An output interface can be thought of as a simple switch (see Figure 6-37) through which power can be provided to control an output device.

Logic Isolation

From

Processor

Logic

Logic

LED

Isolator

Switch

Power

LED

Power

Filter

Figure 6-36.

AC output circuit block diagram.

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Output

Module

L1

“Switch” controlled by processor

L2

Load

Output

Field

Device

Logic 1– ON (“Switch” Closed)

Logic 0– OFF (“Switch” Open)

Figure 6-37.

“Switch” function of an output interface.

During normal operation, the processor sends an output’s status, according to the logic program, to the module’s logic circuit. If the output is to be energized (reflecting the presence of a 1 in the output table), the logic section of the module will latch, or maintain, a 1. This sends an ON signal through the isolation circuit, which in turn, switches the voltage to the field device through the power section of the module. This condition will remain ON as long as the output table’s corresponding image bit remains a 1. When the signal turns OFF, the 1 that was latched in the logic section unlatches, and the OFF signal passed through the isolation circuit provides no voltage to the power section, thus de-energizing the output device. Figure 6-38 illustrates a typical AC output circuit.

Line

T

R s

R s

Metal

Varistor

Load

Figure 6-38.

Typical AC output circuit.

The switching circuit in the power section of an AC output module uses either a triac or a silicon controlled rectifier (SCR) to switch power. The AC switch is normally protected by an RC snubber and/or a metal oxide varistor (MOV), which limits the peak voltage to some value below the maximum rating.

Snubber and MOV circuits also prevent electrical noise from affecting the circuit operation. Furthermore, an AC output circuit may contain a fuse that prevents excessive current from damaging the switch. If the circuit does not contain a fuse, the user should install one that complies with the manufacturer’s specifications.

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As with input circuits, AC output interfaces may have LEDs to indicate operating logic signals and power circuit voltages. If the output circuit contains a fuse, it may also have a fuse status indicator. Figure 6-39 illustrates an AC output connection diagram. Note that power from the field

(L1) supplies the voltage that the module uses to turn ON the output devices.

Chapter 20 discusses other considerations for connecting AC outputs.

3

4

C

1

2

L1

MS

Figure 6-39.

AC output module connection diagram.

DC O

UTPUTS

(S

INK

/S

OURCE

)

DC output interfaces control discrete DC loads by switching them ON and

OFF. The functional operation of a DC output is similar to that of an AC output; however, the DC output’s power circuit employs a power transistor to switch the load. Like triacs, transistors are also susceptible to excessive applied voltages and large surge currents, which can cause overdissipation and short-circuit conditions. To prevent these conditions, a power transistor is usually protected by a freewheeling diode placed across the load (field output device). DC outputs may also incorporate a fuse to protect the transistor during moderate overloads. These fuses are capable of opening, or breaking continuity, quickly before excessive heat due to overcurrents occurs.

As in DC inputs, DC output modules may have either sinking or sourcing configurations. If a module has a sinking configuration, current flows from

the load into the module’s terminal, switching the negative (return or common) voltage to the load. The positive current flows from the load to the common via the module’s power transistor.

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In a sourcing module configuration, current flows from the module into the load, switching the positive voltage to the load. Figure 6-40 illustrates a typical sourcing DC output circuit, and Figure 6-41 shows device connections for both sourcing and sinking configurations. Note that in sinking output devices, current flows into the device’s terminal from the module (the module provides, or sources, the current). Conversely, the current in sourcing output devices flows out of the device’s terminal into the module (the module receives, or sinks, the current).

+VDC

D

Output

From

Logic

C

MOV

Return

Figure 6-40.

Typical sourcing DC output circuit.

+V

1

2

3

4

5

8

C

6

7

i i

Sourcing

Output

Device

Sinking

Output

Device

i

3-Wire

Sinking

Output

Device

(–)

(+)

DC

Power

Supply

i

= current flow direction

Figure 6-41.

Field device connections for a sinking/sourcing DC output module.

+V

I

SOLATED

AC

AND

DC O

UTPUTS

Isolated AC and DC outputs operate in the same manner as standard AC and DC output interfaces. The only difference is that each output has its own return line circuit (common), which is isolated from the other outputs. This configuration allows the interface to control output devices powered by different sources, which may also be at different ground (common) levels.

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A standard, nonisolated output module has one return connection for all of its outputs; however, some modules provide one return line per four outputs if the interface has eight or more outputs. Isolated interfaces provide less modularity (i.e., fewer points per module) than their standard counterparts, because extra terminal connections are necessary for the independent return lines. Figure 6-42 illustrates connections to an isolated AC output interface.

L1

A

AC

L1

B

L1

C

L2

A

AC

L2

B

L2

C

L1

3

4

1

2

L2

L3

L4

MS

Figure 6-42.

Connection diagram for an isolated AC output interface.

TTL O

UTPUTS

TTL output interfaces allow a PLC to drive output devices that are TTL compatible, such as seven-segment LED displays, integrated circuits, and 5-

VDC devices. Most of these modules require an external 5-VDC power supply with specific current requirements, but some provide the 5-VDC source voltage internally from the back plane of the rack. TTL modules usually have eight available output terminals; however, high-density TTL modules may be connected to as many as sixteen devices at a time. Typical output devices that use high-density TTL modules are 5-volt seven-segment indicators. Figure 6-43 illustrates typical output connections to a TTL output module. A TTL output interface requires an external power supply.

R

EGISTER

/BCD O

UTPUTS

Multibit register/BCD output interfaces provide parallel communication between the processor and an output device, such as a seven-segment LED display or a BCD alphanumeric display. Register output interfaces may also drive small DC loads with low current requirements (0.5 amps). Register

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User

DC Supply

+ –

+V

1

2

3

4

5

6

7

8

C

**

**

1K*

*Typical

(Chassis mounting bolt)

Figure 6-43.

Connection diagram for a TTL output module.

+ output interfaces provide voltages ranging from 5 VDC (TTL level) to 30

VDC and have 16 or 32 output lines (one or two I/O registers). Figure 6-44 illustrates a typical device interface connection for a register output module.

Each output controls one bit location in the output register

Bit

Address

00

01

02

03

10

11

12

13

04

05

06

07

14

15

16

17

+V

COM

1

0

1

0

0

0

0

1

0

1

1

0

1

1

1

0

Least Significant Bit

Seven-Segment

LED Display

1s Units

10s Units

100s Units

1000s Units

Most Significant Bit

Figure 6-44.

Register/BCD output interface connected to seven-segment indicators.

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In a register output module, the information sent to the module originates in the register storage data table (see Figure 6-45). A 16-bit word or register is sent from this table to the module address specified by the data transfer or

I/O register instruction (e.g., block transfer out). Once the data arrives at the module, it is latched and made available at the output circuits.

Block transfer out instruction

Memory

M

O

D

U

L

E

B

C

D

Data

Word/Register

Storage

Figure 6-45.

Output data table sending a 16-bit word to a register output module.

Register output modules may also have multiplexing capabilities (see Figure

6-46). As is the case with multiplexed inputs, multiplexed output devices

(e.g., BCD display digits) require enable line capability to select the BCD display group that will receive the parallel, 16-bit data from the module (see

Figure 6-47). A single-digit seven-segment display will be able to receive data if the enable is selected. Conversely, if the enable is not selected, the

Memory

Register

1000

1001

1002

1003

Digits

4th 3rd 2nd 1st

BCD#1

BCD#2

BCD#3

BCD#4

M

O

D

U

L

E

B

C

D

Multiplex

16

BCD#1

16

BCD#2

16

BCD#3

16

Figure 6-46.

Multiplexed output module.

BCD#4

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Enable

Not Selected

Enable

Selected

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No input received from module

0 1 0 1

Input received from module

Figure 6-47.

Single-digit seven-segment BCD display with enable line.

display will be blank or will contain the last data that was latched, because it may latch the data until the enable reselected and new data is available. If the BCD display contains four digits and one enable line (see Figure 6-48), the operation will be the same, except that the enable will control all four displays. With this option, one interface can control several groups of 16 or

32 outputs, depending on the modularity. For example, if a multiplexed output can handle four sets of 16-bit outputs, then it can drive up to four sets of 4-digit seven-segment indicators. Register data from the output table is sent to the module once a scan, updating each multiplexed set of output devices.

Enable

Selected

Input can be received from processor when enable is selected

0 1 0 1 1 0 0 0 0 1 1 0 0 1 1 1

Figure 6-48.

A 4-digit seven-segment BCD display with one common enable line.

The use of multiplexed outputs does not require special programming, since there are output instructions that specify the multiplexing operation. The only requirement is that the output devices (e.g., LED displays) must possess enable circuits allowing the module to connect the enable lines to each set of loads controlled by each set of 16 bits. Figure 6-49 shows a block diagram of a multiplexed output module with four sets of seven-segment LED indicators.

If output modules with enable lines are multiplexed, only passive-type output devices (i.e., seven-segment indicators, displays, etc.), as opposed to controltype elements (i.e., low-current solenoids), can be controlled. The reason for this is that while multiplexed outputs are very useful, their output data does not remain static for one channel, or set, of 16 bits or 32 bits; it changes for each circuit that is being multiplexed. The only way to use multiplexed

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4 3 2 1 4 3 2 1 4 3 2 1 4 3 2 1

EN 1

EN 2

EN 3

EN 4

04

05

06

07

10

00

01

02

03

11

12

13

14

15

16

17

4 4 4 4

4

Ones (1s)

4

Tens (10s)

4

Hundreds (100s)

4

Thousands (1000s)

Figure 6-49.

A multiplexed output module with four sets of LED displays.

modules and still have correctly operating output devices is to incorporate additional latching/enabling circuits into the output devices’ hardware (see

Figure 6-50). Such a situation may be encountered in the transmission of parallel data to instrumentation or computing devices that have enable and latching lines for incoming data.

Enables

Multiplexed

Module

Data

Latching

Circuitry

Figure 6-50.

Latching/enabling circuit.

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6

E

XAMPLE

6-4

Assume that the contents of the registers in the storage table shown in Figure 6-51 are transferred to a BCD multiplexed module and, subsequently, to a BCD display.

(a)

What will be the value displayed on the seven-segment indicators during the third scan as shown in the timing diagram in Figure 6-52?

(b)

Also indicate, using Figure 6-49 as a reference, the lines (e.g., enable bits 0–17) that will be active during the third-scan transfer.

Word of

Register

Contents in BCD

4000

4001

4002

4003

0 0 1 1 0 1 0 1 1 0 0 0 0 0 1 1

0 0 1 0 0 1 0 1 0 1 1 1 1 0 0 0

0 0 1 1 1 0 0 0 0 0 0 1 0 0 0 0

0 1 0 0 1 0 0 1 0 0 0 1 0 1 1 1

3583

2578

3810

4917

Figure 6-51.

Storage table for Example 6-4.

Module

1st Scan 2nd Scan 3rd Scan 4th Scan

EN1

EN2

EN3

EN4

Figure 6-52.

Timing diagram of enable signals from a BCD multiplexed module.

S

OLUTION

(a)

During the third scan (see Figure 6-53), the enable line EN3 will be ON, allowing the BCD data 3810 to go to BCD set #3. The value of register 4002 will be sent to the module through the wires connected to it. Since only BCD set #3 is enabled, it will accept all of the signals.

(b)

The active lines, including the enable, are shown in blue. Note that in the other BCD sets, the BCD values from each set’s respective register are shown in gray. These values may remain on the display because they have been latched from previous scans. They are not shown in blue because they are not active.

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BCD#1 BCD#2 BCD#3 BCD#4

4 3 2 1 4 3 2 1 4 3 2 1 4 3 2 1

EN 1

EN 2

EN 3

EN 4

12

13

14

15

16

17

00

01

02

03

04

05

06

07

10

11

4 4 4 4

1

0

0

0

0

0

0

1

0

0

0

0

4

Ones (1s)

4

Tens (10s)

4

Hundreds (100s)

0

0

1

1 4

Thousands (1000s)

Figure 6-53.

Multiplexed output module for Example 6-4.

C

ONTACT

O

UTPUTS

Contact output interfaces allow output devices to be switched by normally open or normally closed relay contacts. Contact interfaces provide electrical isolation between the power output signal and the logic signal through separation between contacts and between the coil and contacts. These outputs also include filtering, suppression, and fuses.

The basic operation of contact output modules is the same as that of standard

AC or DC output modules. When the processor sends status data (1 or 0) to the module during the output update, the state of the contacts changes. If the processor sends a 1 to the module, normally open contacts close and normally closed contacts open. If the processor sends a 0, no change occurs to the normal state of the contacts.

Contact outputs can be used to switch either AC or DC loads, but they are normally used in applications such as multiplexing analog signals, switching small currents at low voltages, and interfacing with DC drives to control

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6 different voltage levels. High-power contact outputs are also available for applications that require the switching of high currents. Figure 6-54 shows a contact output circuit. The device connection for this output module is similar to an AC output module. In this circuit, one side (1A) goes to L1, while the other (1B) goes to the load.

1A

R

Relay

Logic MOV

1B

Figure 6-54.

Contact output circuit.

Figure 6-55 illustrates an interfacing example where four analog voltage references are connected to a contact output module. These references represent preset speed values, which if connected to a speed drive controller, can be used to switch different motor velocities (e.g., two forward, two reverse). Note that each contact in this interface must be mutually exclusive— that is, only one contact can be closed at a time. Interlocking logic in the control program is necessary to prevent two or more output coils from being energized at the same time.

Analog Voltage

Reference 1

Analog Voltage

Reference 2

Analog Voltage

Reference 3

Analog Voltage

Reference 4

1A

1B

2A

2B

3A

3B

4A

4B

Reference 1

Reference 2

Reference 3

Reference 4

To speed drive controller

Inside

Module

Figure 6-55.

Example of a contact interface connection.

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6-8 D

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B

YPASS

/C

ONTROL

S

TATIONS

Bypass/control stations are manual backup devices that are used in PLC systems to allow flexibility during start-up and output failure. By incorporating a selector switch that allows a field output device to be switched ON regardless of the state of its output module, these devices can override a PLC’s output signal. Bypass devices can also be configured to place field outputs under PLC output control or to change them to an OFF condition.

Figure 6-56 shows a diagram of a typical bypass device. Bypass units provide

8 to 16 isolated points, each protected by a circuit breaker or fuse, for use with any PLC’s discrete output modules. Bypass devices are placed between the

PLC’s output interface and the digitally controlled element (see Figure 6-57).

Indicators, which are incorporated into the control system, show the ON/ OFF state of the field device. Bypass units provide a way to control field devices without the PLC. These devices are very useful during maintenance situations, system start-up, and emergency disconnect of particular field devices.

L1

From

PLC

ON

OFF

PLC

RC Snubber

Circuit

3-Position

Switch

RC Snubber

Circuit

Fuse

Ouput

ON/OFF

LED

SOL

L2

Figure 6-56.

Typical bypass device.

L1 L2

L1

PLC

Bypass Unit

ON

OFF

Auto

SOL

Output

Module

Switch Position

ON

OFF

Auto

ON—Output is forced ON

OFF—Output is disabled

Auto—Output according to

PLC module status

Figure 6-57.

Bypass unit placed between the PLC and a field device.

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6-9 I

NTERPRETING

I/O S

PECIFICATIONS

Perhaps with the exception of standard I/O current and voltage ratings, specifications for I/O circuits are all too often treated as a meaningless listing of numbers. Nevertheless, manufacturers’ specifications provide valuable information about the correct and safe application of interfaces.

These specifications place certain limitations on the module and also on the field equipment that it can operate. Failure to adhere to specifications can result in a misapplication of the hardware, leading to faulty operation or equipment damage. Table 6-6 provides an overview of the electrical, mechanical, and environmental specifications that should be evaluated for each

PLC application. Following is a more detailed explanation of each specification. These specifications should also be evaluated for the interfaces covered in the next two chapters (analog and special function).

E

LECTRICAL

Input Voltage Rating.

This AC or DC value defines the magnitude and type of signal that will be accepted by the circuit. The circuit will usually accept a deviation from this nominal value of

±

10–15%. This specification may also be called the input voltage range. For a 120 VAC–rated input circuit with a range of

±

10%, the minimum and maximum acceptable input voltages for continuous operation will be 108 VAC and 132 VAC, respectively.

Input Current Rating.

This value defines the minimum input current at the rated voltage that the input device must be capable of driving to operate the input circuit. This specification may also appear indirectly as the minimum

power requirement.

Input Threshold Voltage.

This value specifies the voltage at which the input signal is recognized as being absolutely ON. This specification is also called the ON threshold voltage. Some manufacturers also specify an OFF voltage, defining the voltage level at which the input circuit is absolutely OFF.

Input Delay.

The input delay defines the duration for which the input signal must exceed the ON threshold before being recognized as a valid input. This specification is given as a minimum or maximum value. This delay is a result of filtering circuitry provided to protect against contact bounce and voltage transients. The input delay is typically 9–25 msec for standard AC/DC inputs and 1–3 msec for TTL or electronic inputs.

Output Voltage Rating.

This AC or DC value defines the magnitude and type of voltage source that the I/O module can control. Deviation from this nominal value is typically

±

10–15%. For some output interfaces, the output voltage is also the maximum continuous voltage. The output voltage

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E

L E C T R I C A L

t

I n p u t

y p e o

V o l t a g e

f s i g n a l a

R a t i n g .

c i r c u i t

A n w i ll

A C o r a c c e p t .

D C v a l u e t h a t s p e c i f i e s t h e m a g n i t u d e a n d

I n p u t

d e v i c e

C u

m

r

u

r e

s t

n t

b e

R a t i n g .

c a p a b l e

T h e o f m i n i m d r i v i n g .

u m c u r r e n t a t t h e r a t e d v o l t a g e a n i n p u t

I n p u t T h r e s h o l d V o l t a g e .

T h e v o l t a g e a t a s b e i n g O N .

w h i c h a n i n p u t s i g n a l i s r e c o g n i z e d

I n p u

r e c o

t

g n i

D e

z e

l a

d

y .

a s

T h e a v a d il d u i r a t i n o n p u t .

f o r w h i c h a n i n p u t s i g n a l m u s t b e O N t o b e

O u

a n d

t p u t

t y p e

V o

o f

l t a g

v o l t

e

a

R a t i n g .

g e t h a t

A n a n I

A

/ O

C m o o r D d u l e

C v a c a n l u e c o t n t h a t r o l .

s p e c i f i e s t h e m a g n i t u d e

O u t p u t

c a n s a f

C

e l y

u r

c

r e

a r r

n t

y

R a t i n

u n d e r l

g .

o a

T h d .

e m a x i m u m c u r r e n t t h a t a s i n g l e o u t p u t c i r c u i t

O u t p u t P o w e r R a t i n g .

T h e m a x i m u m w i t h a ll c i r c u i t s e n e r g i z e d .

p o w e r a n o u t p u t m o d u l e c a n d i s s i p a t e

C u r r e n t

t h e s y s t e

R

m

e q

p

u i r e m e

o w e r s

n t s .

u p p l y .

T h e c u r r e n t d e m a n d t h a t a n I / O m o d u l e p l a c e s o n

S u r g e

o u t p u t c

C u r r e

i r c u i t

n t

c a n

( M a

e x c

x

e

) .

e

T h e d i t s m a x i m u m m a x i m u m c u r r e n t

O N s t a t e a n d c u r d u r e n t r a t r a i o n t i n g .

f o r w h i c h a n

O F F S t a t e

t h r o u g h t h e

L e a k a g e

t r i a c / t r a n s i

C

s t

u r

o r

r e

d

n

u

t

r i

.

n

T h e g i t s m a x i m u m

O F F s t a t e .

l e a k a g e c u r r e n t t h a t f l o w s

O u t p u t

a f t e r i t r

O N D e l a y .

e c e i v e s a n

T h e

O N r e s p o n s e c o m m a n d .

t i m e f o r a n o u t p u t t o t u r n f r o m O F F t o O N

O u t p u t O F F D e l a y .

a f t e r i t r e c e i v e s a n

T h e

O F F r e s p o n s e c o m m a n d .

t i m e f o r a n o u t p u t t o t u r n f r o m O N t o O F F

E l e

b e t

c t r i c

w e e n

a l

t h e

I s o l a t i o n .

I / O c i r c u i t

A

m a n d a x t h e i m u m c o n t r o v a l ll e r u e l o g i n i c .

v o l t s d e f i n i n g t h e i s o l a t i o n

O u t p u t

t h e d i g i

V

t a

o l t a g e / C u r

l t o a n a l o g

r e n t

c o n v

R

e

a n g

r t e r .

e s .

T h e v a l u e o f t h e v o l t a g e / c u r r e n t s w i n g o f

I n p u t

t h e a n

V o l

a l o g

t a g e / C u r r e n t

t o d i g i t a l c o

R a

n v e

n g e

r t e r .

s .

T h e v a l u e o f t h e v o l t a g e / c u r r e n t s w i n g o f

D i g i t a l

c u r r e n t

R e

o r v

s o l u

o l t a

t

g

i o

e

n .

A s i g n a l m e a s u r e a p p r o x i o m a f t h o w e s c t h e l o s a c t e l y u a l t h e a n a c l o o g n v v e r t e d a l u e .

a n a l o g I / O

O u t p u t

t h e i n t e

F u

r f a c

s e

e .

R a t i n g .

T h e t y p e a n d r a t i n g o f f u s e s t h a t s h o u l d b e u s e d i n

M

E C H A N I C A L

P o i n t s

s i n g l e

P e r M

m o d u l e .

o d u l e .

T h e n u m b e r o f i n p u t o r o u t p u t c i r c u i t s t h a t a r e o n a

W i r e S i z e .

t e r m i n a t i o n

T h p o i e n t n u m b e r s w i ll o f c o n d u c t o r s a c c e p t .

a n d t h e l a r g e s t g a u g e w i r e t h e I / O

E

N V I R O N M E N T A L

A m b i e n t

t h e I / O s

T

y s

e m

t e m

p e

f o

r a t u r e

r i d e a l

R a t i n g .

T h e o p e r a t i n g c o m n d a x i m u i t i o n s .

m a i r t e m p e r a t u r e s u r r o u n d i n g

H u m i d i t y .

T h e m a x i m u m a i r h u m i d i t y s u r r o u n d i n g t h e I / O s y s t e m .

Table 6-6.

Summary of I/O specifications.

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6 specification may also be stated as the output voltage range, in which case both the minimum and maximum operating voltages are given. An output circuit rated at 48 VDC, for example, can have an absolute working range of 42 to 56 VDC.

Output Current Rating.

This specification is also known as the ON-state

continuous current rating, a value that defines the maximum current that a single output circuit can safely carry under load. The output current rating is a function of the electrical and heat dissipation characteristics of the component. This rating is generally specified at an ambient temperature (typically

0–60

°

C). As the ambient temperature increases, the output current decreases.

Exceeding the output current rating or oversizing the manufacturer’s fuse rating can result in a permanent short-circuit failure or other damage.

Output Power Rating.

This maximum value defines the total power that an output module can dissipate with all circuits energized. The output power rating for a single energized output is the product of the output voltage rating and the output current rating expressed in volt-amperes or watts (e.g., 120 V

×

2 A = 240 VA). This value for a given I/O module may or may not be the same if all outputs on the module are energized simultaneously. The rating for an individual output when all other outputs are energized should be verified with the manufacturer.

Current Requirements.

The current requirement specification defines the current demand that a particular I/O module’s logic circuitry places on the system power supply. To determine whether the power supply is adequate, add the current requirements of all the installed modules that the power supply supports, and compare the total with the maximum current the power supply can provide. The current requirement specification will provide a typical rating and a maximum rating (all I/O activated). An insufficient power supply current can result in an undercurrent condition, causing intermittent operation of field input and output interfaces.

Surge Current (Max).

The surge current, also called the inrush current, defines the maximum current and duration (e.g., 20 amps for 0.1 sec) for which an output circuit can exceed its maximum ON-state continuous current rating. Heavy surge currents are usually a result of either transients on the output load or power supply line or the switching of inductive loads.

Freewheeling diodes, Zener diodes, or RC networks across the load terminals normally provide output circuits with internal protection. If not, protection should be provided externally.

OFF-State Leakage Current.

Typically, this is a maximum value that measures the small leakage current that flows through the triac/transistor during its OFF state. This value normally ranges from a few microamperes to a few milliamperes and presents little problem. It can present problems when switching very low currents or can give false indications when using a sensitive instrument, such as a volt-ohm meter, to check contact continuity.

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Output-ON Delay.

This specification defines the response time for the output to go from OFF to ON once the logic circuitry has received the command to turn ON. The ON response time of the output circuit affects the total time required to activate an output device. The worst-case time required to turn an output device ON after the control logic goes TRUE is the total of the two program scan times plus the I/O update, output-ON delay, and device-ON response times.

Output-OFF Delay.

The output-OFF delay specification defines the response time for the output to go from ON to OFF once the logic circuitry has received the command to turn OFF. The OFF response time of the output circuit affects the total time required to deactivate an output device. The worst-case time required to turn an output device OFF after the control logic goes FALSE is the total of the two program scan times plus the I/O update, output-OFF delay, and device-OFF response times.

Electrical Isolation.

This maximum value in volts defines the isolation between the I/O circuit and the controller logic circuitry. Although this isolation protects the logic side of the module from excessive input/output voltages or currents, the power circuitry of the module can still be damaged.

Output Voltage/Current Ranges.

This specification is a nominal expression of the voltage/current swing of the D/A converter in analog outputs. This output will always be a proportional current or voltage within the output range.

A given analog output module may have several hardware- or softwareselectable, unipolar or bipolar ranges (e.g., 0 to 10 V, –10 to +10 V, 4 to 20 mA).

Input Voltage/Current Ranges.

This specification defines the voltage/ current swing of the A/D converter in analog inputs. This specification will always be a proportional current or voltage within the input range. A given analog input module may have several hardware- or software-selectable, unipolar or bipolar ranges (e.g., 0 to 10 V, –10 to +10 V, 4 to 20 mA).

Digital Resolution.

This specification defines how closely the converted analog input/output current or voltage signal approximates the actual analog value within a specified voltage or current range. Resolution is a function of the number of bits used by the A/D or D/A converter. An 8-bit converter has a resolution of 1 part in 2

8 or 1 part in 256. If the range is 0 to 10 V, then the resolution is 10 divided by 256, or 40 mV/bit.

Output Fuse Rating.

Fuses are often supplied as a part of the output circuit, but only to protect the semiconductor output device (triac or transistor). The manufacturer carefully selects the fuse that is employed or recommended for the interface based on the fusing current rating of the output switching device.

Fuse rating incorporates a fuse opening time along with a current overload rating, which allows opening within a time frame that will avoid damage to the triac or transistor. The recommended specifications should be followed when replacing fuses or when adding fuses to the interface.

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M

ECHANICAL

Points Per Module.

This specification defines the number of input/output circuits that are on a single module (encasement). Typically, a module will have 1, 2, 4, 8, or 16 points per module. The number of points per module has two implications that may be of importance to the user. First, the less dense

(fewer the number of points) a module is, the greater the space requirements are; second, the higher the density, the lower the likelihood that the I/O count requirements can be closely matched with the hardware. For example, if a module contains 16 points and the user requires 17 points, two modules must be purchased. Thus, the user must purchase 15 extra inputs or outputs.

Wire Size. This specification defines the number of conductors and the largest gauge wire that the I/O termination points will accept (e.g., two #14

AWG). The manufacturer does not always provide wire size specifications, but the user should still verify it.

E

NVIRONMENTAL

Ambient Temperature Rating.

This value is the maximum temperature of the air surrounding the input/output system for best operating conditions.

This specification considers the heat dissipation characteristics of the circuit components, which are considerably higher than the ambient temperature rating itself. The ambient temperature rating is much less than the heat dissipation factors so that the surrounding air does not contribute to the heat already generated by internal power dissipation. The ambient temperature rating should never be exceeded.

Humidity Rating.

The humidity rating for PLCs is typically 0–95% noncondensing. Special consideration should be given to ensure that the humidity is properly controlled in the area where the input/output system is installed. Humidity is a major atmospheric contaminant that can cause circuit failure if moisture is allowed to condense on printed circuit boards.

Proper observance of the specifications provided on the manufacturer’s data sheets will help to ensure correct, safe operation of control equipment.

Chapter 20 discusses other considerations for properly installing and maintaining input/output systems.

6-10 S

UMMARY OF

D

ISCRETE

I/O

For the most part, all PLC system applications require the types of discrete

I/O interfaces covered in this chapter. In addition to discrete interfaces, some

PLC applications require analog and special I/O modules (covered in the next two chapters) to implement the required control.

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All I/O interfaces accept input status data for the input table and accept processed data from the output table. This information is placed in or written from the I/O table (in word locations) according to the location or address of the modules. This address depends on the module’s placement in the I/O rack enclosure; therefore, the placement of I/O interfaces is an important detail to keep in mind.

The software instructions that are generally used with discrete-type interfaces are basic relay instructions (ladder type), although multibit modules use functional block instructions as well as some advanced ladder functions.

Chapter 9 explains these software instructions. Figure 6-58 shows several programmable controller input and output modules and enclosures.

Figure 6-58.

PLC families sharing the use of I/O modules and enclosures.

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EY

T

ERMS

AC/DC I/O interface bypass/control station contact output interface

DC I/O interface digital signal discrete input interface discrete output interface

I/O address

I/O module isolated I/O interface local rack master rack multiplexing rack enclosure register/BCD I/O interface remote I/O subsystem remote rack sinking configuration sourcing configuration

TTL I/O interface

The Discrete

Input/Output System

C

HAPTER

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EVEN

T

HE

A

NALOG

I

NPUT

/O

UTPUT

S

YSTEM

One line alone has no meaning; a second one is needed to give it expression.

—Eugène Delacroix

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H

IGHLIGHTS

Although discrete I/O systems are invaluable tools for PLC controls, they cannot meet all the demands of new technological and application advances.

Because they can interpret continuous signals, analog I/O interfaces are used in applications, such as batching and temperature control, where the simple two-state capabilities of discrete I/O systems are insufficient. This chapter explains the function and application of analog I/O interfaces, including a discussion of analog connections and instructions. In the next chapter, you will learn about another type of I/O system—special function interfaces— which are used to accomplish specific control tasks.

7-1 O

VERVIEW OF

A

NALOG

I

NPUT

S

IGNALS

Analog input modules, like the ones shown in Figure 7-1, are used in applications where the field device’s signal is continuous (see Figure 7-2).

Unlike discrete signals, which possess only two states (ON and OFF), analog

signals have an infinite number of states. Temperature, for example, is an analog signal because it continuously changes by infinitesimal amounts.

Consequently, a change from 70

°

F to 71

°

F is not just one change of 1

°

F, but rather an infinite number of smaller changes of a fraction of a degree.

Measured

Signal

Figure 7-1.

Analog input modules.

Continuous

Signal

Time

Figure 7-2.

Representation of a continuous analog signal.

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PLCs, like other digital computers, are discrete systems that only understand

1s and 0s. Therefore, they cannot interpret analog signals in their continuous form. Analog input interfaces translate continuous analog signals into discrete values that can be interpreted by PLC processors. These discrete values are subsequently used in the control program. Table 7-1 lists some devices that are typically interfaced with analog input modules.

A n a l o g I n p u t s

F l o w t r a n s d u c e r s

H u m i d i t y t r a n s d u c e r s

L o a d c e ll t r a n s d u c e r s

P o t e n t i o m e t e r s

P r e s s u r e t r a n s d u c e r s

V i b r a t i o n t r a n s d u c e r s

T e m p e r a t u r e t r a n s d u c e r s

Table 7-1.

Devices used with analog input interfaces.

7-2 I

NSTRUCTIONS

F

OR

A

NALOG

I

NPUT

M

ODULES

Analog input modules digitize analog input signals, thereby bringing analog information into the PLC (see Figure 7-3). The modules store this multibit information in register locations inside the PLC. The analog instructions used with analog input modules are similar to, if not the same as, the instructions used with multibit discrete inputs. The only difference between them is that analog multibit instructions are the result of a digital transformation of the analog signal, while discrete multibit instructions are the result of many multibit devices (or separate signals) connected to the same number of discrete input connections.

Analog

Input

Module

PLC

Continuous

Signal

Module transforms input by digitizing signal

Figure 7-3.

Digitization of an analog signal.

Binary value stored in registers

Figure 7-4 illustrates the sequence of events that occurs while reading an analog input signal. The module transforms the analog signal, through an analog-to-digital converter (A/D), into 12 bits of digital information that will be stored in register 1000 after the instruction is executed. After the PLC reads this information, the control program can reference the register address for comparisons, arithmetic calculations, etc. The analog value stored in the register will be in either BCD or binary format.

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1

Transducer

2

A/D

Analog Input Module

3

12 Bits

1110 9 8 7 6 5 4 3 2 1 0

To

PLC

4

The transducer detects the process signal (e.g., temperature).

Word/

Register

Storage Area

17 16 15 14 13 12 11 10 7 6 5 4 3 2 1 0

The transducer transforms the process signal into an

1000 electrical signal that the

5

analog input can recognize.

The analog input transforms the signal into a 12-bit value proportional to the electrical input to the module.

4

A block transfer in instruction, or another analog input instruction, transfers the

12-bit value to the PLC.

The PLC stores the 12-bit digital value in a memory location for future use.

Figure 7-4.

Steps in converting an analog signal to binary format.

E

XAMPLE

7-1

What will the contents of register 1000 be after the multibit instruction shown in Figure 7-5 is executed? Note that the digitized value corresponding to the analog transformation shown in the figure is represented by 12 bits in binary format.

Process

150

˚

C

T

R

A

+5.7

VDC

U

C

E

R

N

S

D

Analog Input Module

A/D

12 Bits

1110 9

1 0 1

8

0

7 6 5 4 3 2 1 0

1 1 0 0 1 1 1 1

Word/

Register

Storage Area

17 16 15 14 13 12 11 10 7 6 5 4 3 2 1 0

1000

Figure 7-5.

Multibit instruction.

Block transfer in instruction

S

OLUTION

After the instruction is executed, the contents of register 1000 will be:

0000 1010 1100 1111

This number corresponds to the digitized value generated by the module. Since the value is represented in 12 bits, the preceding bits are filled with 0s. Note that the value stored in register 1000 is in binary.

Its decimal equivalent, for computational purposes, is 2767.

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7-3 A

NALOG

I

NPUT

D

ATA

R

EPRESENTATION

Field devices that provide an analog output as their signal (analog sensors or transducers) are usually connected to transmitters, which in turn, send the analog signal to the module. A transducer converts a field device’s variable

(i.e., pressure, temperature, etc.) into a very low-level electrical signal

(current or voltage) that can be amplified by a transmitter and then input into the analog interface (see Figure 7-6).

Process

Physical

Signal

Sensor

Transducer

Transmitter

0 to 10 Volts

DC Signal

Signal Common

10

Volts DC

0

Time

Analog

Input

Module

Figure 7-6.

Conversion of an analog signal by a transmitter and transducer.

1

3C

4

4C

1C

2

2C

3

Due to the many types of transducers available, analog input modules have several standard electrical input ratings. Table 7-2 lists the standard current and voltage ratings for analog interfaces. Note that analog interfaces can be either unipolar (positive voltage only—i.e., 0 to +5 VDC) or bipolar (negative and positive voltages—i.e., –5 to +5 VDC).

Input Interfaces

4–20 mA

0 to +1 volts DC

0 to +5 volts DC

0 to +10 volts DC

1 to +5 volts DC

±

5 volts DC

±

10 volts DC

Table 7-2.

Typical analog input interface ratings.

As mentioned earlier, an analog input module transforms an analog input signal via a sensor/transmitter unit into a discrete value that is readily understandable by man and machine (see Figure 7-7). This transformed value is the digital equivalent of the variable analog signal (e.g., pressure in psi)

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7 measured by the field device. The field sensing device sends a very low-level current or voltage analog input to the transmitter. The transmitter (sometimes incorporated in the same unit as the sensor) sends this information to the input module as an amplified current or voltage proportional to the signal being measured. Next, the analog input interface digitizes the current or voltage by converting it into an equivalent binary number. The interface then sends the digitized signal to the controller. Thus, the binary value that the PLC receives is the digital equivalent of the incoming analog signal.

Analog input variable signal

Process

Physical

Signal

Sensor

(Transducer)

Transmitter

Discrete value to

PLC in binary or BCD (counts)

Analog

Input

To

Processor

Senses physical signal

Low-level voltage of current

Amplified voltage or current compatible with analog input interface

Digitized value

(counts)

Figure 7-7.

Transformation of an analog signal into a binary or BCD value.

An analog-to-digital converter (A/D or ADC) performs the signal conversion in an analog input module. The converter divides, or digitizes, the input signal into many digital counts, which represent the magnitude of the current or voltage. This division of the input signal is called resolution. The resolution of the module indicates how many parts the module’s A/D will divide the input signal into; it is given as a function of how many bits the A/D uses during conversion. For example, if an A/D breaks down an input signal using 12 bits or 4096 parts (i.e., 2

12

= 4096) as shown in Figure 7-8, it has a

12-bit resolution (i.e., a 12-bit binary number with a value ranging from 0000 to 4095 decimal will represent the signal). In this case, the manufacturer could then use the remaining bits (bits 14–17) as status monitoring bits, representing module conditions such as active, OK, channel operating, etc.

An A/D converter transfers its digital-equivalent values to the processor, which in turn, makes them available for use in register or word locations. The format of these values varies according to the format used by the PLC; however, the most common formats are binary and BCD. In BCD format, the module or processor must perform an extra linearity computation to provide a valid BCD number.

Some PLCs also offer direct scale conversion of the input signal to equivalent engineering units (0 to 9999). Table 7-3 illustrates the conversion of psi values into engineering units and their decimal equivalents. The module

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Analog Input

Signal

(voltage or current from transmitter/ transducer)

A/D

12

Bits

Analog-to-

Digital

Converter

A/D

Bit 0

Bit 1

Bit 2

Bit 3

Bit 4

Bit 5

Bit 6

Bit 7

Bit 8

Bit 9

Bit 10

Bit 11

The Analog

Input/Output System

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PLC Register

17 16 15 14 13 12 11 10 7 6 5 4 3 2 1 0

Figure 7-8.

An analog-to-digital converter with 12-bit resolution.

Pressure psi

Analog Voltage

Input

Digital Representation

0000-9999

Digital Representation

Decimal Scale

0-4095

0

50

100

150

200

250

300

350

400

450

500

7V

8V

9V

10V

0V

1V

2V

3V

4V

5V

6V

0

410

819

1229

1638

2047

2457

2866

3276

3685

4095

Table 7-3.

Psi values translated into decimal equivalents and engineering units.

interprets the incoming 0 to 500 psi signal variable as a voltage ranging from

0 to 10 VDC. It then converts this voltage into an equivalent decimal value.

A decimal value of 0 corresponds to 0 psi, while a decimal value of 4095 corresponds to 500 psi. The following examples illustrate how an A/D computes equivalent analog counts for an analog field signal.

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E

XAMPLE

7-2

An input module, which is connected to a temperature transducer, has an A/D with a 12-bit resolution (see Figure 7-9). When the temperature transducer receives a valid signal from the process (100 to 600

°

C), it provides, via a transmitter, a +1 to +5 VDC signal compatible with the analog input module.

Process

Temp

˚

C

Sensor and transmitter in one unit

Sensor

(Transducer)

Transmitter

Analog

Input

To PLC

Temp Range

100

˚

C

600

˚

C

Voltage

1 VDC

5 VDC

Counts

0

4095

Figure 7-9.

An A/D and an analog input module connected to a temperaturesensing device.

(a)

Find the equivalent voltage change for each count change (the voltage change per degree Celsius change) and the equivalent number of counts per degree Celsius, assuming that the input module transforms the data into a linear 0 to 4095 counts, and (b) find the same values for a module with a 10-bit resolution.

S

OLUTION

(a)

The relationship between temperature, voltage signal, and module counts is:

T e m p e r a t u r e

1 0 0

°

C

6 0 0

°

C

V o l t a g e S i g n a l

1 V D C

5 V D C

I n p u t C o u n t s

0

4 0 9 5

The changes (

) in temperature, voltage, and input counts are 500

°

C,

4 VDC, and 4095 counts. Therefore, the voltage change for a 1

°

C temperature change is:

500

°

C

= ∆

4 VDC

1

°

C

=

4 VDC

500

=

8. 0 mVDC

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The change in voltage for each input count is:

4095 counts

= ∆

4 VDC

1 count

=

4 VDC

=

0 9768 mVDC

4095

Therefore, the corresponding number of counts per degree Celsius is:

500

1

4095 counts

4095 counts

=

500 counts

(b)

A 10-bit resolution A/D will digitize the unipolar input signal into

1024 counts (i.e., 2

10

= 1024 counts, ranging from 0000 to 1023). The relationship between temperature, voltage signal, and counts is:

T e m p e r a t u r e

1 0 0

°

C

5 0 0

°

C

V o l t a g e S i g n a l

1 V D C

4 V D C

I n p u t C o u n t s

0

1 0 2 4

The changes in temperature, voltage, and counts are 500

°

C, 4 VDC, and 1023 counts. The voltage change per degree will be the same as in part (a) and is:

500 C

1 C

4 VDC

4 VDC

=

500 mVDC

The change in voltage per input count is:

1023 counts

= ∆

4 VDC

1 count

=

4 VDC

=

3 91 mVDC

1023

Thus, the corresponding number of counts per degree Celsius is:

500 C

1 C

1023 counts

1023 counts

=

500 counts

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E

XAMPLE

7-3

A temperature transducer/transmitter (see Figure 7-10) provides a 0–

10 VDC voltage signal that is proportional to the temperature variable being measured. The temperature measurement ranges between 0 and 1000

°

C. The analog input module accepts a 0–10 VDC unipolar signal range and converts it to a range of 0–4095 counts. The process application where this signal is being used detects low and high alarms at 100

°

C and 500

°

C, respectively.

1000

°

C

0

°

C time

Transducer

0

°

C to 1000

°

C

0–10 Volts DC

Signal Return

Input

Common

A/D

4095 counts

0 counts

Analog Input

Module

Figure 7-10.

Temperature transducer/transmitter connected to an input module.

Find

(a)

the relationship (i.e., equation of the line) between the input variable signal (temperature) and the counts being measured by the

PLC module and

(b)

the equivalent number of counts for each of the alarm temperatures specified.

S

OLUTION

(a)

Figure 7-11 shows the relationship between counts and the input signal in volts and degrees Celsius. Line Y describes the numerical relationship between the input signal and the number of counts

(assuming a linear relationship).

Y

˚C line Y

˚C

= mx counts

+ b

10 VDC 1000

High 500

Low 100

Alarm

Detection

Range ˚C

X

0 VDC 0

0 4095

Alarm Count

Detection Range

Figure 7-11.

Relationship between counts and input signal.

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To find the relationship between temperature and counts, find the numerical representation of the equation for line

Y. This equation takes the form Y = mX + b (see Appendix E), where m is the slope of the line and is described by: m

=

Y

2

Y

1

X

2

X

1

=

°

C

2

− °

C

1 count 2

− count 1

=

1000

0

4095

0

=

1000

4095 and Y

2

, Y

1

, X

2

, and X

1

are known points. The value b is the value of Y, or

°

C, when X, or counts, equals 0. This value can be computed as: b

=

Y

°

C

− mX counts where

Y and X are values at known points (i.e., at 0

°

C and 0 counts).

When X is at 0 counts, Y is at 0

°

C; therefore: b

= −



1000

4095



0

=

0

Substituting the derived values for m and b into the equation Y = mX

+ b produces the equation of line Y:

Y

= mX

+ b

Y

°

C

=

1000

4095

X counts

+

0

=

1000

4095

X counts

Using 4095 counts and 1000

°

C as the X and Y values when computing b would have derived the same equation (try it as an exercise).

(b)

Based on the equation of line Y, the number of counts for each alarm range is:

Y

°

C

X counts

=

1000

4095

X counts

=

4095 ( Y

°

C

)

1000

So, for the

Y

°

C

values of 100

°

C and 500

°

C, the

X values are:

X

X

=

4095 100 )

1000

=

=

4095 500 )

1000

= counts counts

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Thus, the count value for 100

°

C is 409.5 counts and for 500

°

C is 2047.5

counts. Since count values must be whole numbers, rounding these values off yields 410 and 2048 counts, respectively. Therefore, at a count of 410, the low-level temperature alarm would be enabled; and at a count of 2048, the high-level temperature alarm would be enabled.

Another method for solving this problem is to determine the number of counts that are equivalent to 1

°

C. A change of 1000

°

C per 4095 counts can be expressed as:

∆ counts

∆ degrees

= max counts

− min counts max degrees

− min degrees

=

4095

0

1000

0

=

4. 095

Therefore, each degree is equivalent to 4.095 counts. The count value for 500

°

C would be (500)(4.095) = 2047.5 and for 100

°

C would be

(100)(4.095) = 409.5. Rounding off these values yields 2048 and 410 counts, respectively—the same values we computed before. If the counts had not started at 0, an offset count addition would have been necessary for computing the number of counts per degree.

7-4 A

NALOG

I

NPUT

D

ATA

H

ANDLING

The previous section showed how an analog input module transforms an analog field signal into a discrete signal. Once the module digitizes the signal into binary counts, the processor can read the value and use the information.

During the input reading section of the scan, the processor reads the value from the module and transfers the information to a location specified by the user. This location is usually a word or register storage area or an input register. The processor enters the count value into memory using instructions that differ from those used by standard discrete input modules, yet are similar to those used by multibit discrete input interfaces (see Figure 7-12).

Most analog modules provide more than one channel, or input, per interface.

Therefore, they can connect to several input signals, as long as the signals are compatible with the module. The analog instructions used in PLCs take advantage of this multiple channel capability, inputting several values at a time into registers or words. Examples of these instructions are analog in, block transfer in, block in, and location in instructions (see Chapter 9). Some programmable controller manufacturers use other instructions, such as arithmetic instructions, to obtain count values from the analog module’s address.

When a processor executes the instruction to read an analog input, it obtains the module’s data during the next I/O scan and places the data in the destination register specified in the instruction. If multiple channels are to be

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7 read, the processor reads and stores one channel every scan. This does not cause a delay in signal processing, since the scan is very fast and the signals are rather slow in nature.

A processor can determine whether or not the module inserted in the enclosure is analog. If the module is analog, the processor will read the available data in groups of 16 bits, with 12 bits (depending on the resolution) displaying the analog value in binary or BCD. Some controllers may provide diagnostic information about the module and its channels by reading an extra word or register after all channels are input.

The physical location of a module within the rack or enclosure (see Chapter

5 for I/O enclosures) defines its address location. Figure 7-13 illustrates an example of an address for an analog module location. A typical instruction will reference a module’s address location by specifying the module’s rack and slot numbers, the number of channels or analog inputs used, and the starting register destination address. If a module uses eight channels and the destination storage register starts at address 200

8

, the last storage register will be at address 207

8

(see Figure 7-14). The module may also send a status register; in which case, the bits in this register will indicate the status of each channel. The processor assigns the register range automatically according to the number of channels; however, the programmer must remember not to overlap the usage of already assigned registers.

00 01 02 03 04 05 06 07 Slot

Rack 0

Input

Instruction Enable

Rack 0

Slot 03

Number of

Channels 8

Destination

Register 200

Figure 7-13.

An addressed analog module.

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Status of

Channel

Register Bits

7 6 5 4 3 2 1 0

15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00

1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0

Module’s

Status

Register

(2 Bits per

Channel)

Code

00

01

10

11

Channel Fault

Overflow

Channel OK

Signal Lost

Register Channel 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00

200 0

1 0 1 0 1 0 1 0 1 0 1 0

201

202

203

204

1

2

3

4

0 1 0 1 0 1 0 1 0 1 0 1

1 0 1 0 1 0 1 0 1 0 1 0

0 1 0 1 0 1 0 1 0 1 0 1

1 0 1 0 1 0 1 0 1 0 1 0

Analog

Counts

205

206

207

5

6

7

0 1 0 1 0 1 0 1 0 1 0 1

1 0 1 0 1 0 1 0 1 0 1 0

0 1 0 1 0 1 0 1 0 1 0 1

12-Bit Value in Binary

Figure 7-14.

Bits within a register indicating the status of each channel.

7-5 A

NALOG

I

NPUT

C

ONNECTIONS

Analog input modules usually provide a high input impedance (in the megaohm range) for voltage-type input signals. This allows the module to interface with high source-resistance outputs from input-sensing devices

(e.g., transmitters or transducers). Current-type input modules provide low input impedance (between 250 and 500 ohms), which is necessary to properly interface with their compatible field sensing devices.

Analog input interfaces can receive either single-ended or differential inputs. The commons in single-ended inputs are electrically tied together, whereas differential inputs have individual return or common lines for each channel. Single-ended modules offer more points per module than their differential counterparts. Depending on the manufacturer, a module may be set to either single-ended or differential mode during software setup using rocker switches. Figure 7-15 illustrates typical analog connections for singleended and differential inputs.

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Signal

Transmitter

+

Analog

Signal

Transmitter

+

The Analog

Input/Output System

C

HAPTER

7

1

2

3

4

7

8

5

6

C

Analog

Signal

Transmitter

+

Analog

Signal

Transmitter

+

1

1C

2

2C

3

3C

4

4C

Figure 7-15.

Connection diagrams for

(a)

single-ended and

(b)

differential analog input modules.

Each channel in an analog interface provides signal filtering and isolation circuits to protect the module from field noise. In addition to the noise precautions resident in the module, the user should consider protection from other electrical noise during the installation of the module (see Chapter 20).

Shielded conductor cables should be used to connect both the input module and the transducer. These cables lower line impedance imbalances and maintain a good common mode rejection ratio of noise levels, such as power line frequencies.

Analog input interfaces seldom require external power supply sources because they receive their required power from the back plane of the rack or enclosure. These interfaces, however, draw more current than their discrete counterparts; therefore, loading considerations should be kept in mind during

PLC system configuration and power supply selection.

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7-6 O

VERVIEW OF

A

NALOG

O

UTPUT

S

IGNALS

Analog output interfaces are used in applications requiring the control of field devices that respond to continuous voltage or current levels. An example of this type of field device is a volume adjust valve (see Figure 7-16). This type of valve, which is used in hydraulic-based punch presses, requires a 0–10

VDC signal to vary the volume of oil being pumped to the press cylinders, thereby changing the speed of the ram or platen. Table 7-4 lists some other common analog output devices.

3

3C

4

4C

1

1C

2

2C

Voltage or Current

Output Signal

Signal Common

Pressure psi

+

Transducer

(Voltage Pressure)

Analog

Pressure

Signal

100 to 800 psi from oil resevoir

To hydraulic platen or ram press cylinder system

Volume

Adjust

Valve

Pump

Figure 7-16.

Representation of a volume adjust valve.

A n a l Analog Outputs

A n a l o g v a l v e s

A c t u a t o r s

C h a r t r e c o r d e r s

E l e c t r i c m o t o r d r i v e s

A n a l o g m e t e r s

P r e s s u r e t r a n s d u c e r s

Table 7-4.

Typical analog output field devices.

7-7 I

NSTRUCTIONS

F

OR

A

NALOG

O

UTPUT

M

ODULES

Multibit output instructions, which are similar to those used with multibit

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The module then transforms this value, whether BCD or binary, from digital to analog and passes it to the field control device. Figure 7-18 illustrates a multibit instruction transferring 12 bits of data from register 2000 to an analog output module that is connected to a control valve. These 12 bits of information, which are transferred to the field device for control, may be the result of other computations in the PLC program. Chapter 9 explains PLC instructions in more detail.

PLC

Register/Word

Memory Location

Analog

Output

Module

Transforms data from PLC to analog signal

Continuous Signal

(voltage or current) for analog control actuator

Figure 7-17.

Conversion of register data to an analog signal.

Block transfer out instruction

Analog Output Module

1110 9 8 7 6 5 4 3 2 1 0 12

D/A

Output

Transducer/Actuator

(e.g., control valve)

Storage Area

17 16 15 14 13 12 11 10 7 6 5 4 3 2 1 0

Word/

Register

1000

Figure 7-18.

Steps in converting a binary value into an analog signal.

to analog and passes it to the field control device. Figure 7-18 illustrates a

XAMPLE

7-4

multibit instruction transferring 12 bits of data from register 2000 to an analog closed, while it converts a value of 1111 1111 1111 (4095 decimal) to an analog value that makes the valve be fully open. What will the state of the valve be according to the contents of register 2000?

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Storage Area

17 16 15 14 13 12 11 10 7 6 5 4 3 2 1 0

0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1

0000 (0 decimal) to an analog value that makes the control valve be completely closed, while it converts a value of 1111 1111 1111 (4095

Block transfer in instruction will the state of the valve be according to the contents of register 2000?

0 0 0 0 0 0 1 1 1 1 1 1

12

D/A

S

OLUTION

Control

Valve

The value stored in register 2000 is 0000 0011 1111, equivalent to

Decimal Binary decimal 63. The valve is open approximately 1/64th (or 1.56%) of its

0 0000 0000 0000 Valve Closed fully open position. Note that the position of the valve is determined by binary number with half 1s and half 0s does not mean that the valve is

Figure 7-19.

Block transfer of register contents to an analog output module.

half open. If the value in the register had been in BCD, the module would have converted that number to determine the valve position.

OLUTION

The value stored in register 2000 is 0000 0011 1111, which is equivalent to decimal 63. Thus, the valve is open approximately

1/65th, or 1.53%, of its fully open position (63

÷

4095 = 1.53%). Note that the position of the valve is determined by the decimal equivalent of the binary value, not the number of 1s and 0s—a binary number with half 1s and half 0s does not indicate that the valve is half open. If the value in the register had been in BCD, the output module would have converted the value to decimal to determine the valve position.

7-8 A

NALOG

O

UTPUT

D

ATA

R

EPRESENTATION

Like analog inputs, analog output interfaces are usually connected to controlling devices through transducers (see Figure 7-20). These transducers amplify, reduce, or change the discrete voltage signal into an analog signal, which in turn, controls the output device. Since there are many types of controlling devices, transducers are available in several standard voltage and current ratings. Table 7-5 lists some of the standard ratings used in programmable controllers with analog output capabilities.

Binary data to module from processor

Analog

Output

Module

Transforms digital value to voltage or current

Transducer

Takes voltage or current and affects or controls the process

Process

Example:

Voltage to pressure

Effect:

Increase or decrease psi in process

Figure 7-20.

Analog output device connected to a transducer.

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Output Interfaces

4–20 mA

10–50 mA

0 to +5 volts DC

0 to +10 volts DC

±

2.5 volts DC

±

5 volts DC

±

10 volts DC

Table 7-5.

Analog ouput ratings.

An analog output interface operates much like an analog input module, except that the data direction is reversed. As mentioned earlier, a PLC processor can only interpret digital binary numbers, so it assumes that all other devices operate in the same manner. An analog output module’s responsibility, then, is to change the PLC’s data from a binary value to an analog real-world signal that can be understood by field devices.

The data transformation that occurs in an output interface is exactly opposite of the transformation in an analog input interface (see Figure 7-21). A digital-

to-analog converter (D/A or DAC) transforms the numerical data (BCD or binary) sent from the processor into an analog signal. This analog output value is proportional to the digital numerical value received by the module. Thus, the D/A converter creates a continuous analog signal with a magnitude proportional to the minimum and maximum capable analog voltages or currents of the field device (e.g., 0 to 10 VDC).

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

D/A

Bit 11

Bit 10

Bit 9

Bit 8

Bit 7

Bit 6

12

Bits

DC Voltage

D/A or

Current

Output

Digital-to

-Analog

Converter

Not Used

17 16 15 14 13 12 11 10 7 6 5 4 3 2 1 0

16-Bit PLC Register

Figure 7-21.

Digital-to-analog conversion of numerical data in a PLC register.

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The resolution of a digital-to-analog converter is defined by the number of bits that it uses for the analog conversion. For example, a D/A with a 12-bit resolution creates an analog signal ranging from 0 to 4095 counts (4096 total values), which is proportional to a 12-bit digital signal (2

12

= 4096). Therefore, the analog value 2047 in a 12-bit resolution is equal to half of the full range.

For an analog field device with a range of 0 VDC (closed) to 10 VDC (fully open), a 2047 analog value would be equal to a 5 VDC signal. Table 7-6 shows the current, voltage, and psi output values from a D/A with a 12-bit resolution.

Decimal

0

2047

4095

PLC Register

Binary

Output

0–10 VDC 4–20 mA

Pressure

(psi)

0000 0000 0000 0000

0000 0111 1111 1111

0000 1111 1111 1111

0 VDC

5 VDC

10 VDC

4 mA

12 mA

20 mA

0 psi

1000 psi

2000 psi

Table 7-6.

Output values for a 12-bit analog output module.

An analog output module ensures that the value provided by the processor is proportional to the signal or variable that is being controlled by the field device. For instance, if an output device provides pressure control ranging from 100 to 800 psi, the values from the processor, in counts, will be proportional to this range. Output modules can have both unipolar and bipolar configurations, which provide control voltages with either all positive values or negative and positive values, respectively.

E

XAMPLE

7-5

A transducer connects an analog output module with a flow control valve capable of opening from 0 to 100% of total flow. The percentage of opening is proportional to a –10 to +10 VDC signal at the transducer’s input. Tabulate the relationship between percentage opening, output voltage, and counts for the output module in increments of 10% (i.e., 10%, 20%, etc.). The bipolar output module has a

12-bit D/A (binary) with an additional sign bit that provides polarity to the output swing.

S

OLUTION

Since the analog output module has a sign bit, it receives counts ranging from –4095 to +4095, which are proportional to the –10 to +10

VDC signal required by the transducer. Figure 7-22 graphically illustrates the relationship between the module’s counts, the output voltage, and the percentage opening.

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100% +10 VDC

–4095 +4095

Control Voltage

-10 VDC to

+10 VDC

Flow

0%

–10 VDC

Figure 7-22.

Relationship between counts, voltage, and percentage.

To formulate the desired table, first determine the equivalent values for each variable. Since the solution should be expressed in increments as a function of percentage, the percentage changes are calculated as follows:

Percentage

Voltage (

10 to

+

10)

Counts (

4095 to

+

4095)

100 20 8190

1% change as function of voltage

=

20 VDC

=

0.2 VDC

100

1% change as function of counts

=

8190

100

=

81.90 counts

Note that these computations are magnitude changes. To implement the table, the offset values for the voltage and counts must be added, taking into consideration the bipolar effect of the module and the negative-to-positive changes in counts. Therefore, to obtain the voltage and count equivalents per percentage change, add the offset voltage and count values when the percentage is at 0%. Thus:

Percentage as function of voltage

=

(0.2

×

P )

10 VDC

Percentage as function of counts

=

(81.9

×

P )

4095 counts where P is the percentage to be used in the table. Therefore, to calculate the required table, multiply each voltage and count relationship by the desired percentage of opening (see Table 7-7).

The PLC’s software program calculates output counts according to a predetermined algorithm. Sometimes, the output computations are expressed in engineering units that indicate a 0000 to 9999 (binary value or BCD) change in output value. These values must be ultimately converted to counts—in this case, –4095 to +4095 counts.

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P e r c e n t a g e O p e n i n g

7 0

8 0

9 0

1 0 0

3 0

4 0

5 0

6 0

0 %

1 0

2 0

O u t p u t V

– 1 0 V D C

– 8

– 6

– 4

– 2

0

+ 2

+ 4

+ 6

+ 8

+ 1 0

o l t a g e

Table 7-7.

Equivalent counts, voltages, and percentages.

C o u n t s

– 4 0 9 5

– 3 2 7 6

– 2 4 5 7

– 1 6 3 8

– 8 1 9

0

+ 8 1 9

+ 1 6 3 8

+ 2 4 5 7

+ 3 2 7 6

+ 4 0 9 5

7-9 A

NALOG

O

UTPUT

D

ATA

H

ANDLING

In the previous section, we explained how a module transfers a signal to the transducer, which sends it to the controlling output device. Now, we will discuss how the processor handles this data, along with some common methods of linearizing output data to reflect engineering units.

The storage or I/O table section of a PLC’s data table area holds the data to be sent to an analog output module (see Figure 7-23). This data comes from program computations that, when sent to the module, will control an analog output device. During the execution of the output update, the processor sends the register/word contents to the analog module specified by the address in the instruction. The module transforms the register/word’s binary or BCD value into an analog output voltage or current. Since the program calculates the register/word value, the user should take precautions during programming to avoid computing or sending nonvalid ranges to the module. For example, if a word location containing a binary value of +5173 is sent to a 12-bit resolution module without checking for range validity, the module will be unable to interpret the data, thus emitting an incorrect analog output signal

(5173 in binary uses more than 12 bits).

Like their input counterparts, analog output modules can handle more than one channel at a time, so one module can control several devices. The instructions that are used with these output interfaces provide the capability of transferring several words or register locations to the module. These instructions are called block transfer out, analog out, block out, or location out instructions (see Chapter 9). It is possible, however, to find PLCs that use arithmetic or other instructions to send data to the analog module address, using the destination register of the instruction.

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Some PLC manufacturers offer software instructions that scale data within the module or during the execution of the analog output instruction. Scaling takes a value and sends it to the module as a linearized count value. For example, let’s say an output module receives a BCD value of 5000, relating to an engineering unit (e.g., gallons per minute) halfway between 0000 and

9999 BCD. The software scaling instruction will change this value into the linearized, 12-bit, binary value 0111 1111 1111, or 2047 counts, which represents the halfway mark of the 0 to 4095 range.

Data transfers to analog modules with multiple output channels are updated one channel per scan. As with analog inputs, this update method does not create a noticeable delay, since the devices that respond to analog signals are slow in nature. The physical location of the module within the enclosure defines its address location (see Chapter 6 for I/O enclosures).

Figure 7-24 illustrates an example of an analog output module in an enclosure, along with its corresponding address location. A typical output instruction references a module by its slot and rack locations and the number of channels available or in use. A register called the source register stores the data to be transferred. The instruction specifies the starting source register address, and the starting source register transmits the specified number of channels. For example, if the starting register is 300

8

and the number of channels is four, the processor will send the data contained in registers 300

8

through 303

8

(see

Figure 7-25).

00 01 02 03 04 05 06 07 Slot

Rack 0

Output

Instruction Enable

Rack 0

Slot 03

Number of

Channels 4

Source

Register 300

Figure 7-24.

An addressed analog output module.

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Via block transfer out instruction

Analog

Output

Module

(12 Bit,

4 Channel)

Reg 300

To Analog Device #1

Reg 301

Reg 302

To Analog Device #2

To Analog Device #3

Reg 303

To Analog Device #4

0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1

Word/

Register

300

0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0

0 0 0 0 0 0 1 1 0 0 1 1 0 0 1 1

301

302

0 0 0 0 1 1 0 0 1 1 0 0 1 1 0 0

303

Figure 7-25.

Transfer of data from a source register.

Remember that the analog output signal from the module depends on the register or word value it receives from the processor. In some situations, the value computed for a control action is based on a 0000 to 9999 range

(engineering units). This value must be converted (if the output instruction does not provide scaling) to the output module count range (i.e., 0 to 4095 counts or –2048 to +2048 counts) before it can be transferred to the module.

Example 7-6 addresses this type of conversion.

E

XAMPLE

7-6

A programmable controller uses a bipolar –10 to +10 VDC signal to control the flow of material being pumped into a reactor vessel. The flow control valve has a range of opening from 0 to 100% to allow the chemical ingredient to flow into the reactor tank. The processor computes the required flow (the percentage of valve opening) through a predefined algorithm. Analog flow meters send feedback information to the processor about other chemicals being mixed. A register stores the computed value for percentage opening, ranging from 0000 to 9999 BCD (0 to 99.99%).

(a)

Find the equation of the line defining the relationship between the analog output signal (in counts) and the analog output transformation from –4095 to +4095 counts. The module has a 12-bit resolution and includes a sign bit as a function of voltage output and percentage opening.

(b)

Illustrate the relationship of outputs in counts to the computed percentage opening as stored in the PLC register (0000 to 9999). Also, find the equation that describes the relationship between the required counts and the available calculated value stored in the register.

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OLUTION

(a) Figure 7-26 shows line

Y, which represents the number of counts as a function of voltage and percentage opening. The line has the form Y = mX + b, where m is the slope of the line and b is the value of

Y when X is 0.

0%

–10 VDC

Counts

+4095

Y

Control Voltage

–10 VDC to +10 VDC

100%

Voltage

+10 VDC

0 to 100% opening

Reactor

Vessel

–4095

Figure 7-26.

Representation of percentage opening and analog output counts.

The X-axis represents either the output voltage or the percentage opening, depending upon which equation is derived. The Y-axis represents the number of counts output by the module for each

X value (% or VDC). The following equation expresses the number of counts as a function of voltage:

Y

= mX

+ b m

Y

X

=

4095

(

4095 )

10 VDC

(

10 VDC)

=

8190 counts

20 VDC

Y

=

8190

X

+ b

20

To calculate b, replace Y with its value when X is 0 counts. When X is

0, Y is also 0; thus:

Therefore: b

=

Y

8190

20

X b

=

0

8190

20 b

=

0

(0)

Y

=

8190

X

+

0

20

Y

=

8190

X

20

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This equation gives the value of Y in counts for any voltage X. The equation of line Y as a function of percentage can be computed in a similar manner:

Y

= mX

+ b m

Y

X

=

8190

Y

=

100

8190 counts

100%

X

+ b

To compute b, replace the count value Y when X is equal to 0%; this value is –4095 (refer to Figure 7-26). Therefore: b

=

Y

8190

100

X b

= −

4095

8190

100 b

= −

4095

(0)

Y

=

8190

X

4095

100

This equation for Y gives the number of output counts for any percentage value

X.

(b) Figure 7-27 shows the relationship between the output in counts and the value stored in the register, expressed as 0000 to 9999. This graph is very similar to the previous one; however, the output equation is expressed as a function of the register value used.

Output Counts

+4095

9999

Register Value

–4095

Figure 7-27.

Output counts versus register values (0000–9999).

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The equation for line

Y showing the relationship between output counts and register value is:

Y

= mX

+ b m

=

∆ counts

∆ register value

Y

=

8190

9999

X

+ b

=

8190

9999

The value of Y when X equals 0 is –4095, so:

Therefore: b

=

Y

8190

9999

X b

= −

4095

8190

9999 b

= −

4095

(0)

Y

=

8190

9999

X

4095

The value of Y will be the output count for any value X (percentage) ranging from 0000 to 9999. If this type of equation is implemented in the PLC using standard decimal arithmetic instructions and a 0000 to

9999 register value encoded in BCD, the PLC’s software must convert the values from BCD to decimal.

7-10 A

NALOG

O

UTPUT

C

ONNECTIONS

Analog output interfaces are available in configurations ranging from 2 to 8 outputs per module, but on average, most modules have 4 to 8 analog output channels. These channels can be configured as either single-ended or differential outputs. Differential is the most common configuration when individually isolated outputs are required.

Each analog output is electrically isolated from other channels and from the

PLC itself. This isolation protects the system from damage due to overvoltage at the module’s outputs. These interfaces may require external, panelmounted power supplies; however, most analog modules receive their power from the PLC’s power supply system. Current requirements for analog modules are higher than for discrete outputs and must be considered during the computation of current loading (see Chapter 4 for loading considerations).

Figure 7-28 illustrates typical connections for both single-ended and differential analog output modules.

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8

5

6

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1

2

3

4

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+

Analog

Transducer

+

Analog

Transducer

Analog

Output

Device

Analog

Output

Device

1

1C

2

2C

3

3C

4

4C

+

Analog

Transducer

+

Analog

Transducer

Analog

Output

Device

Analog

Output

Device

Figure 7-28.

Connection diagrams for

(a)

single-ended and

(b)

differential analog output modules.

7-11 A

NALOG

O

UTPUT

B

YPASS

/C

ONTROL

S

TATIONS

A PLC system may require the addition of a bypass/control station (see Figure

7-29). Bypass/control stations, which are placed between the PLC’s analog interface and the controlled element, ensure continued production or control in a variety of abnormal process situations. A bypass/control station is very useful during start-up, override of analog outputs, and backup of analog outputs in case of failures.

During start-up, the operator can use a bypass/control station to manually position the final control elements through manipulation of initial control parameters, such as valve position, speed control, hydraulic servos, and

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From PLC

Analog

Output

+ V

OUT

Bypass/Control Station

Common

Auto

Manual

Other

Circuitry

Control

Output

Common

Analog

Output

Device

(Transducer)

+ V

DC

Supply

Manual Reference

Process

Figure 7-29.

Block diagram of bypass/control backup unit.

pneumatic converters. This can be done without the PLC or prior to its checkout. When the final elements are working properly, the user can then perform a final check of the PLC and switch the bypass/control station to automatic mode for direct PLC control of the process.

K

EY

T

ERMS analog input interface analog output interface analog signal analog-to-digital converter channel differential input/output digital-to-analog converter resolution scaling single-ended input/output transducer transmitter

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HAPTER

E

IGHT

S

PECIAL

F

UNCTION

I/O

AND

S

ERIAL

C

OMMUNICATION

I

NTERFACING

No rule is so general, which admits not some exception.

—Robert Burton

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HAPTER

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C

HAPTER

H

IGHLIGHTS

In previous chapters, we discussed analog and digital I/O interfaces.

Although these types of interfaces allow control implementation in most types of applications, some processes require special types of signals. In this chapter, we will introduce special function I/O interfaces, which uniquely process analog and digital signals. We will also take a look at intelligent positioning, data-processing, and communication modules that expand the capabilities of PLCs. We will conclude with a discussion of peripheral interfacing and communication standards. When you finish this chapter, you will have learned about all the major components of programmable controllers—from processors to intelligent interfaces—and you will be ready to explore PLC programming.

8-1 I

NTRODUCTION TO

S

PECIAL

I/O M

ODULES

Special function I/O interfaces provide the link between programmable controllers and devices that require special types of signals. These special signals, which differ from standard analog and digital signals, are not very common, occurring in only 5–10% of PLC applications. However, without special interfaces, processors would not be able to interpret these signals and implement control programs.

Special I/O interfaces can be divided into two categories:

• direct action interfaces

• intelligent interfaces

Direct action I/O interfaces are modules that connect directly to input and output field devices. These modules preprocess input and output signals and provide this preprocessed information directly to the PLC’s processor (see

Figure 8-1). All of the discrete and analog I/O modules discussed in Chapters

6 and 7, along with many special I/O interfaces, fall into this category. Special direct action I/O interfaces include modules that preprocess low-level and fast-input signals, which standard I/O modules can not read.

Special function intelligent I/O interfaces incorporate on-board microprocessors to add intelligence to the interface. These intelligent modules can perform complete processing tasks independent of the PLC’s processor and program scan. They can also have digital, as well as analog, control inputs and outputs. Figure 8-2 illustrates an application of intelligent I/O interfaces. The method of allocating various control tasks to intelligent I/O interfaces is known as distributed I/O processing.

Special input/output modules are available along the whole spectrum of programmable controller sizes, from small controllers to very large PLCs.

In general, special I/O modules are compatible throughout a family of PLCs.

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Direct

Action

Input

Module

Input data to PLC

Memory

Output data to module

Direct

Action

Output

Module

Sensors

Process

Actuators

Data Path Connections

Figure 8-1.

Direct action I/O interface application.

Memory

Status to PLC

Parameters to intelligent I/O

Input data to intelligent I/O

Intelligent

I/O Module

Module controls actuator according to its input data from process

Sensors

Process

Control

Actuator

Actuators

Data Path Connections

Figure 8-2.

Intelligent I/O interface application.

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In the next sections, we will discuss the most commonly found special I/O interfaces:

• special discrete

• special analog

• positioning

• communication/computer/network

• fuzzy logic

8-2 S

PECIAL

D

ISCRETE

I

NTERFACES

F

AST

-I

NPUT

/P

ULSE

S

TRETCHER

M

ODULES

Fast-input interfaces detect input pulses of very short duration. Certain devices generate signals that are much faster than the PLC scan time and thus cannot be detected through regular I/O modules. Fast-response input interfaces operate as pulse stretchers, enabling the input signal to remain valid for one scan. If a PLC has immediate input instruction capabilities, it can respond to these fast inputs, which initiate an interrupt routine in the control program.

The input voltage range of a fast-input interface is normally between 10 and

24 VDC for a valid ON (1) signal, with the leading or trailing edge of the input triggering the signal (see Figure 8-3). When the interface is triggered, it stretches the input signal and makes it available to the processor. It also provides filtering and isolation; however, filtering causes a very short input delay, since the normal input devices connected to this type of interface do not have contact bounce. Typical fast-input devices, including proximity switches, photoelectric cells, and instrumentation equipment, provide pulse signals with durations of 50 to 100 microseconds.

One Scan

Time

Input Pulse Signal

Stretched Signal

(Leading Edge)

Stretched Signal

(Trailing Edge)

Figure 8-3.

Pulse stretching in a fast-input module.

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Connections to fast-input modules are the same as for standard DC input modules. Depending on the module, the field device must meet the sourcing or sinking requirements of the interface for proper operation. Usually, field devices must source a required amount of current to the fast-input module at the rated DC voltage.

W

IRE

I

NPUT

F

AULT

M

ODULES

Wire input fault modules are special input interfaces designed to detect short-circuit or open-circuit connections between the module and input devices. Wire input fault modules operate like standard DC input modules in that they detect a signal and pass it to the processor for storage in the input table. These modules, however, are specially designed to detect any malfunction associated with the connections. Figure 8-4 illustrates a simplified block diagram of Allen-Bradley’s wire input fault module. Typical applications of this module include critical input connections that must be monitored for correct wiring and field device operation.

DC Input

Wire

Status

Electrical

Isolation

Input

Filter

Latch

Circuit

Reset

Common*

Contact

Status

Electrical

Isolation

Input

Filter

*All commons are tied together inside module

Figure 8-4.

Wire input fault module diagram.

Logic

Circuit

Wire input fault interfaces detect a short-circuit or open-circuit wire by sensing a change in the current. When the input is OFF (0), the interface sends a 6 mA current through a shunt resistor (placed across the input device) for each input; when the input is ON (1), the interface sends a 20 mA current. An opened or shorted input will disrupt this monitoring current, causing the module to detect a wire fault. The module signals this fault by flashing the corresponding status LED. The control program can also detect the fault and initiate the appropriate preprogrammed action.

Figure 8-5 illustrates a typical connection diagram for a wire input fault interface. Note that shunt resistors must be connected to the interface even though an input device is not wired to the module. The rating of the shunt resistor depends on the DC power supply voltage level used. This supply may

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8 range from 15 to 30 VDC. Although it is unlikely to occur, the total wire resistance of the connecting wire must not exceed the specified ohm rating for the DC supply voltage level. This wire resistance value is computed by multiplying the per foot ohm value by the total length of the wire connection.

For example, a size 14 wire that has a resistance of 0.002525 ohms per foot should have a total wire resistance of less than 25 ohms when connected to a

15 VDC power supply. This implies that the wire should not exceed 9,900 feet in length (25

÷

0.002525 = 9,900).

DC Power

Supply

+

R1*

R2*

R3*

R4*

R5*

R6*

R7*

4

5

6

–V

0

1

2

3

*Shunt resistors with 1/2 watt rating. Value depends on power supply voltage.

Figure 8-5.

Wire input fault module connection diagram.

F

AST

-R

ESPONSE

I

NTERFACES

Fast-response interfaces are extensions of fast-input modules. These interfaces detect fast inputs and respond with an output. The speed at which this occurs can be as short as 1 msec from the sensing of the input to the output response. The output response time is independent of the PLC processor and the scan time.

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Fast-response modules have advantages that include the ability to respond to very fast input events, which require an almost immediate output response.

For example, the detection of a feeder jam in a high-speed assembling or transporting line may require the module to send a fast disengage signal to the product feed, thus reducing the amount of product jammed or lost.

During operation, a fast-response module receives an enable signal from the processor (through the control program), which readies it for “catching” the fast input. Once the active module receives the signal, it sends an output and remains ON until the processor (via the ladder program) disables it, thereby resetting the output. Figure 8-6 illustrates a block diagram of this interface’s operation, along with its logic and timing. Figure 8-7 illustrates how a fastresponse interface functions. Furthermore, Figure 8-8 shows Allen-Bradley’s

LS

Enable signal from program

Fast

Input

Channel

Fast-

Response

Module

Fast

Output

Channel

Latch input feedback to program

(a) Block diagram

SOL

SOL

Enable

LS

Latch

(b) Logic representation

Enable

LS

Output

(c) Timing diagram

Figure 8-6. (a)

Block diagram,

(b)

logic representation, and

(c)

timing diagram of a fast-response interface.

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8 version of a fast-response module, called a High-Speed Logic Controller

Module (1771-DR), which offers 8 inputs and 4 outputs that switch ON less than 1 msec after the detection of the fast input.

L1

LS1

SOL1

L2

SOL1 will turn ON as soon as

LS1 closes. This operation occurs independently of the processor scan.

Figure 8-7.

Fast-response interface.

Figure 8-8.

Allen-Bradley’s fast-response module (1771-DR).

8-3 S

PECIAL

A

NALOG

, T

EMPERATURE

,

AND

PID

I

NTERFACES

W

EIGHT

I

NPUT

M

ODULES

Weight input modules are special types of analog interfaces designed to read data from load cells, which are standard on storage tanks, reactor vessels, and other devices used in blending and batching operations. Figure

8-9 illustrates the configuration of a weight input application, while Figure

8-10 shows Allen-Bradley’s weight input interface called the Weigh Scale

Module (1771-WS). These weight modules support the industry standard of

2 or 3 millivolts per volt (mV/V) load cells.

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Weight

Module

Load

Cell

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C

HAPTER

8

Reactor

Tank

Load

Cell

Junction

Box

To PLC

Weight Data

From Load Cells

From

PLC

Calibration and Excitation

Signal for Load Cells

Figure 8-9.

Weight input application configuration.

Figure 8-10.

Allen-Bradley’s Weigh Scale Module (1771-WS).

A weight input module provides the excitation voltage for load cells, as well as the necessary software for calibrating load cell circuits. A weight module sends an excitation voltage to a load cell and reads the signal created by the weight force exerted on the cell (see Chapter 13). The module’s A/D converter then processes this information and passes it to the processor as a weight value. This eliminates the need for the PLC to convert the load cell’s analog signal. Additionally, a weight module incorporates a calibration feature that avoids problems with calibration of the load cell system.

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T

HERMOCOUPLE

I

NPUT

M

ODULES

In addition to standard analog voltage/current input interfaces that can receive signals directly from transmitters, special analog input interfaces can also accept signals directly from sensing field devices. Thermocouple input

modules, which accept millivolt signals from thermocouple transducers, are an example of this type of special preprocessing interface.

Different types of thermocouple input modules are available, depending on the thermocouple used. These modules can interface with several types of thermocouples by selecting jumpers or rocker switches in the module. For example, an input module may be capable of interfacing with thermocouples of (ISA standard) type E, J, and K. Chapter 13 lists some of the ranges, types, and applications for the most commonly used thermocouples.

The operation of a thermocouple module is very similar to that of a standard analog input interface. The module amplifies, digitizes, and converts the input signal (in millivolts) into a digital signal. Depending on the manufacturer, the converted number will represent, in binary or BCD, the degrees Celsius or

Fahrenheit being measured by the selected thermocouple.

Thermocouple modules do not provide a range of counts proportional to the measured temperature because thermocouples exhibit nonlinearities along their range. These nonlinearities usually occur between 0

°

C and the thermocouple’s upper temperature limit. To determine the digital value of the incoming signal, the thermocouple input module’s on-board microprocessor calculates the temperature (in

°

C or

°

F) that corresponds to the voltage reading. The microprocessor does this by referencing a thermocouple table

(millivolts versus

°

C or

°

F) and performing a linear interpolation (see thermocouples in Chapter 13).

Thermocouple interfaces usually provide cold junction compensation for thermocouple (device) readings. This compensation allows the thermocouple to operate as though there were an ice-point reference (0

°

C), since all of the thermocouple’s tables depicting the generation of electromotive force (emf) are referenced at this point.

In addition to cold junction compensation, thermocouple modules provide

lead resistance compensation for a determined resistance value. Lead resistance deals with the loss of signal due to resistance in the wires.

Thermocouple manufacturers can provide resistance values for given wire size lengths at known temperatures. Depending on the PLC manufacturer, thermocouple interfaces may provide different lead resistance compensations. One manufacturer may provide 200 ohms of compensation, while

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8 another may provide 100 ohms. If the lead resistance is greater than the available compensation, a calculation in the control program can add degrees

Celsius to compensate for the resistance.

When possible, it is a good practice to use the same type of material for the lead wire as is used in the thermocouple. Smaller gauge wire provides a slightly faster response, but heavier gauge wire tends to last longer and resist contamination and deterioration at high temperatures. Figure 8-11 shows a typical thermocouple interface connection. Chapter 13 presents more information about thermal transducers.

Same type of lead wire (shielded) as used in thermocouple

TC

+

TC 1

+

TC 2

+

Average Thermocouple (TC)

Measurement

1

2

3

4

7

8

5

6

TC 1 +

TC 1 –

TC 2 +

TC 2 –

TC 3 +

TC 3 –

TC 4 +

TC 4 –

Figure 8-11.

Thermocouple interface connection diagram.

The following example illustrates a case where a thermocouple performs compensation. Some typical uses of compensation are applications where very long lead wires are employed or where several thermocouples are connected in parallel.

E

XAMPLE

8-1

A type J thermocouple is connected to a thermocouple module located in an I/O rack located 500 feet away. This thermocouple is connected to a heat trace circuit, which measures temperature ranges throughout the length of a process pipe. The thermocouple has 18 AWG lead wires that have a resistance of 0.222 ohms for each foot of double wire (positive and negative wire conductors) at 25

°

C.

The thermocouple module has a lead resistance compensation of 50 ohms, and the manufacturer has a 0.05

°

C per ohm compensation error factor. Find the total lead resistance and the necessary compensation in degrees Celsius to be added to the value measured.

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S

OLUTION

The total lead resistance is computed as:

Lead resistance

=

( )(

=

=

( .

)(

111 ohms

)

The compensation requirement will be the difference between the total resistance and the module’s compensation multiplied by the compensation error factor:

=

(

°

C ohms )( .

°

C/ohm )

Thus, a compensation of 3.05

°

C must be added to the thermocouple reading.

RTD I

NPUT

M

ODULE

Resistance temperature detector (RTD) interfaces receive temperature information from RTD devices. RTDs are temperature sensors that have a wire-wound element whose resistance changes with temperature in a known and repeatable manner. An RTD in its most common form consists of a small coil of platinum, nickel, or copper protected by a sheath of stainless steel.

These devices are frequently used for temperature sensing because of their accuracy, repeatability, and long-term stability.

The operation of RTD modules is similar to that of other analog input interfaces. These modules send a small (mA) current through the RTD and read the resistance to the current flow. In this manner, the module can measure changes in temperature, since the RTD changes resistance with changes in temperature.

An RTD module converts changes in resistance into temperature values, available to the processor in either

°

C or

°

F. Some interfaces are able to provide the processor with the resistance value in ohms in addition to temperature measurements. Depending on the manufacturer, the module may also be able to sense more than one type of RTD. Table 8-1 lists some of the most common RTD devices and their resistance ratings.

RTD devices are available in 2-, 3-, and 4-wire connections. Devices with a

2-wire scheme do not compensate for lead resistance; however, 3- and 4-wire

RTDs do allow for lead resistance compensation. The most commonly used

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R T D

T y p e

P l a t i n u m

N i c k e l

C o p p e r

R

R e a t i s i s t a n g ( o h m s )

1 0 0

1 2 0

1 0

n c e T e m p e r a t u r e

R a n g e

– 2 0 0 t o 8 5 0

°

C

– 8 0 t o 3 0 0

°

C

– 2 0 0 t o 2 6 0

°

C

3 2

1

3 2

8

1 2

8 t o 1 5 6 2

°

F t o 5 7 2

°

F t o 5 0 0

°

F

Table 8-1.

Common RTD types and their specifications.

RTD device is the 3-wire RTD. This type of device is used in applications requiring long lead wires, where wire resistance is significant in comparison to the ohms/

°

C sensitivity of the RTD element. It is a good practice to try to match the resistance of the lead wires by using quality cabling and heavy gauge wires (16–18 gauge). Figure 8-12 illustrates typical connections for an

RTD module with 2-, 3-, and 4-wire RTDs. Chapter 13 explains more about resistance temperature detectors.

2-Wire

RTD

3-Wire

RTD

4-Wire

RTD

2A

2B

2C

3A

1A

1B

1C

3B

3C

4A

4B

4C

Figure 8-12.

RTD connection diagram.

PID M

ODULES

Proportional-integral-derivative (PID) interfaces are used in process applications that require continuous closed-loop control employing the PID algorithm. These modules provide proportional, integral, and derivative

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8 control actions according to sensed parameters, such as pressure and temperature, which are the input variables to the system. PID control is often referred to as three-mode, closed-loop feedback control. Figures 8-13 and 8-14 illustrate PID control in block diagram form and process form, respectively.

PLC

Processor

Block

Transfer of

Information

PID

Module

(PID Control)

Output

Input

(e.g., set point, limits, alarms, etc.)

Output

Field Device

Actuator

(e.g., valve)

Sensor

Input

Field Device

Figure 8-13.

Block diagram of PID control.

Process

Temperature

Sensor

Set

Point

SP

PID

Module

(PID Control)

Analog Output

Steam

Analog

Input

TC

Temperature

Transmitter

Tank must be at a set point temperature

Figure 8-14.

Illustration of a PID control process.

The basic function of closed-loop process control is to maintain certain process characteristics at desired set points. Process characteristics often deviate from their desired set point references as a result of load material changes, disturbances, and interactions with other processes (see Figure 8-

15). During control, the actual process characteristics (liquid level, flow rate, temperature, etc.) are measured as the process variable (PV) and compared with the target set point (SP). If the process variable (actual value) deviates from the set point (desired value) an error (E) occurs (E = SPPV). Once the module detects an error, the control loop modifies the control variable (CV) output to force the error to zero.

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PID Module

Target set point from PLC

(e.g., temp.

target ˚ C)

SP

+

Error ( E)

PV

E = SP – PV

PID

Control

Control

Variable

CV = V out

Output

From

Module

Output

Device

Control

Actuator

(e.g., steam valve)

Disturbances

Process

Process

Variable

Input

To Module

Sensor

(e.g., temp.)

Input

Device

Figure 8-15.

Closed-loop process control.

The following equation defines one of the control algorithms implemented by a PID module:

V

out

=

K E

P

+

K

I

Edt

+

K

D dE dt

where:

K

P

= the proportional gain

K

I

=

K

P

T

I

, which is integral gain

K

D

=

K T

P D

,

(

T

I

which is derivative gain

= reset time

(

T

D

=

) rate time )

E

=

SP

PV

, which is error

V

out

= the control variable output

The PID module receives the process variable in analog form and computes the error difference between the actual value and the set point value. It then uses this error difference in the algorithm computation to initiate a threestep, simultaneous, corrective action through a control variable output. First, the module formulates a proportional control action based on an output control variable that is proportional to the instantaneous error value

(K

P

E). Then, it initiates an integral control action (reset action) to provide additional compensation to the output control variable. This causes a change in the process variable in proportion to the value of the error over a period of time (K

I

or K

P

/T

I

). Finally, the module initiates a derivative control action

(rate action) adding even more compensation to the control output (K

D

=

K

P

T

D

).

This action causes a change in the output control variable proportional to the rate of change of error. These three steps provide the desired control action in proportional (P), proportional-integral (PI), and proportional-integralderivative (PID) control fashion, respectively.

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A PID module receives primarily control parameter and set point information from the main processor. The module can also receive other parameters, such as maximum error and maximum/minimum control variable outputs for high and low alarms, if these signals are provided. During operation, the

PID interface maintains status communication with the main CPU, exchanging module and process information. Figure 8-16 illustrates a block diagram of the PID algorithm and a typical PID module connection arrangement.

Feedforward Input

Process

Variable

A/D

Hardware

Analog

Input

PC Processor or

Adapter

SP

Digital

Filter

PV

+

E = SP – PV

P

I

V

PID

Lead

Lag

BIAS

Controlled

Variable

V

D/A

Hardware

Analog

Output

D

1771–PID

Module

(a)

Optional user-supplied auto/manual station

Manual Request

Man/Auto Tracking

Block Transfer

±

15 VDC

100 mA

Manual Request

Tieback Input

Analog Input ( PV)

+5 VDC

1.2 A

Optional Supply

(b)

Figure 8-16. (a)

Block diagram of the PID algorithm and

(b)

a connection diagram for

Allen-Bradley’s 1771-PID module.

P

R

O

C

E

S

S

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Depending on the module used, PID interfaces can also receive data about the update time and the error deadband. The update time is the rate or period in which the output variable is updated. The error deadband is the quantity that is compared to the error signal (see Figure 8-17); if the error deadband is less than or equal to the signal error, no update takes place. Moreover, some modules also provide square root calculations of the process variable. To provide this calculation, the module performs a square root extraction of the process variable to obtain a linearized scaled output, which is then used by the

PID loop. The control of flow by a PID is an example of an application using a square root extractor. Chapter 15, which describes process controller responses, explains more about PID.

PV

PV

SP

Update

Error > +

DB

+ DB

Deadband ( DB)

– DB

Error < – DB

Update

Time

Figure 8-17.

Error deadband.

8-4 P

OSITIONING

I

NTERFACES

Positioning interfaces are intelligent modules that provide position-related feedback and control output information in machine axis control applications. This section covers the basic aspects of positioning motion control as it relates to PLC applications.

The motion control capabilities of positioning modules allow some programmable controllers to perform functions, using servo mechanisms (e.g., pointto-point control and axis positioning), that once required computer numerical control (CNC) machines.

P

OSITIONING

I

NTERFACE

I

NSTRUCTIONS

Positioning interfaces use PLC instructions that transfer blocks of data at a time (see Figure 8-18). This data includes initialization parameters, distances and limits, and velocities. Instructions, such as block transfer in/out and move data in/out, are typically used to implement this transfer of information.

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Servo or Stepper

Motor Drive/Translator

CPU

Block

Transfer

Data

Special Function I/O and

Serial Communication Interfacing

C

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8

Positioning

Interface

Servo or Stepper

Motor Drive/Translator

Servo or

Stepper Motor

Servo or

Stepper Motor

Figure 8-18.

Positioning interface configuration.

E

NCODER

/C

OUNTER

I

NTERFACES

Encoder/counter modules interface encoders and high-speed counter devices with programmable controllers. This type of module operates independently of the processor and I/O scan. An encoder/counter module is an integral part of a programmable controller system when it is used in applications requiring position information. Such applications include closed-loop positioning of machine tool axes, hoists, and conveyors, as well as cycle monitoring of high-speed machines, such as can-making equipment, stackers, and forming equipment.

There are two types of encoder/counter interfaces: absolute and incremental.

Absolute encoders provide an angular measurement of the shaft. They provide this angular position (expressed in BCD, binary, or Gray code) in parallel to the encoder interface module. Incremental encoders measure shaft

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8 rotation over distance by outputting a fixed number of pulses per shaft rotation. The module provides two pulse signals that have a 90

°

phase difference (quadrature); it then determines the direction of rotation by sensing which of the two pulse channels is the leading waveform. Incremental encoders provide a marker, or index, channel that sends a pulse for every shaft revolution. This marker, which is an input to the module, can be used in conjunction with the module’s limit switch channel input to establish a home position along the encoder’s measurements. When the encoder interface is used in a counter configuration, however, only one input channel can be connected to a device that provides a pulse count.

During operation, an encoder/counter module (in incremental encoder mode) receives two pulse channel inputs that are counted and compared with a userspecified preset value. The interface may have one or two output lines available, which are energized once the incoming pulses are equal to, greater than, or less than the preset values. The input channels and output lines available are generally rated for TTL or for 12–48 VDC. The maximum input pulse frequency that an encoder/counter interface can properly count ranges between 50 and 60 kHz.

The communication between an encoder/counter interface and the processor is bidirectional. The module accepts the preset value and other control data from the processor and transmits values and status data to the PLC memory.

The interface also lets the PLC know when the marker and limit switch are both energized, indicating a home position. On the other hand, the processor’s control program, which tells the module to operate the outputs according to the count value received, enables the output controls. The control program also enables and resets the counter operation.

Typically, the length between the module and the encoder should not exceed

50 feet, and shielded cables should be used. Since encoder/counter modules have both inputs and outputs, they have isolation between the input and output circuits, as well as between the control logic and both I/O circuits. The use of separate power supplies, which must be provided by the user, enhances this isolation. Figure 8-19 shows the typical connections for an incremental encoder configuration.

S

TEPPER

M

OTOR

I

NTERFACES

Stepper motor interfaces, as their name implies, are used in applications requiring control of stepper motors. Stepper motors are permanent-type magnet motors that translate incoming pulses, through a stepper translator, into mechanical motion. Stepper is a generic term that describes this type of brushless motor capable of making fixed angular motions in response to a step input.

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Encoder

12–48

VDC

Power

Supply

+

Limit

Switch

A

B

Marker

Channel A

Common

Channel B

Common

Marker

Common

1

2

3

12

+V

–V

4

5

6

7

Pulses = Preset

+

8

Pulses > Preset

+

9

10

11

TTL

Output

Device

TTL

Output

Device

+ –

5 VDC

Power

Supply

Encoder/Counter

Module

Figure 8-19.

Encoder/counter interface connection diagram.

The motion of a stepper can be accelerated, decelerated, or maintained constantly by controlling the pulse rate output from a stepper module. The ability to respond to an input voltage (in the form of DC pulses) makes stepper motors well suited for incremental motor programmable control systems.

Under controlled conditions, a stepper motor’s motion follows the number of input pulses. This ability to respond to a fixed input enables the system to operate in an open-loop mode, leading to cost savings in the total system.

However, in high-response applications, closed-loop operation is generally required (using encoder feedback). Figure 8-20 illustrates a simplified block diagram of a stepper motor system.

Stepper

Position

Controller

Stepper

Translator

Stepper

Motor

Load

Axis 1

Optional position loop feedback

Figure 8-20.

Block diagram of a stepper motor system.

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A stepper interface generates a pulse train that is compatible with the stepper translator, indicating distance, rate, and direction commands to the motor.

The motion induced can be rotational or linear, such as the forward or backward movement of a linear slide using leadscrews. Figure 8-21 shows a typical linear slide using a stepper motor that makes one revolution per 200 steps (resolution), thus yielding a 1.8

°

step angle (360/200 or 1/200th of a revolution). The stepper system shown in the figure provides a linear movement of 0.00125 inches per step because of the 4 threads per inch leadscrew. Example 8-2 illustrates how to calculate linear movement and step angle values.

Processor Data

Transfer

Stepper Module

Encoder Module

FWD

Pulses

REV

Pulses

Translator

Stepper

Motor

0–10,000 pulses/sec

200 steps/revolution

00.0000 inches

Movement

Leadscrew

4 threads/inch

Absolute

Encoder

X-Axis Scale

99.9999 inches

0.00125" = 1 step

Speed

Rate

0 100

Position

Figure 8-21.

A linear slide using a stepper motor.

E

XAMPLE

8-2

Referencing Figure 8-21, suppose that the 200-step motor is operating at half-stepping conditions (400 steps per revolution) and that the leadscrew has 5 threads per inch. What are the step angle and linear displacement per step used in the system?

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S

OLUTION

To compute the step angle, divide the number of degrees in one revolution (360

°

) by the number of steps required to turn the motor.

Therefore, the step angle is:

Step angle

=

360

400

=

.

°

° with a resolution of 1/400th of a revolution. Linear displacement is the number of inches moved in one step. To calculate this, multiply the number of threads it takes to move one inch by the number of steps in a revolution, since each thread requires one revolution (rotational-tolinear displacement). In this case, the leadscrew requires 5 revolutions to move one inch, and each revolution requires 400 steps.

1 " travel

=

=

( 5 rev )( 400 steps/rev )

2000 steps

Therefore:

1 step

=

1

2000

=

0 0005 inches

The number of outburst pulses sent to the stepper, which translates into linear or rotational units of travel, defines position displacement. Therefore, the number of pulses sent to the motor from the module determines the motor’s final position. The actual location also depends on the resolution of the stepper and the application, which defines the number of threads per inch of travel in the leadscrew.

The stepper’s movement includes both the acceleration and deceleration of the motor. The acceleration part of the move is the time required to achieve the continuous speed rate of the motor (in pulses/sec). The continuous rate is the final pulse/sec rate sent to the motor (frequency). This frequency may vary from 1 to 20 kHz (pulses/sec). Conversely, the deceleration part is the time required for the speed rate to decrease to zero (pulses/sec). Acceleration and deceleration, also known as ramps, are specified as a function of time (seconds).

Stepper motor interfaces operate in two modes: single-step profile mode and

continuous profile mode. In single-step mode, a PLC processor sends individual move sequences to the interface. These sequences include the acceleration and deceleration rates of the move, along with the final or continuous speed rate (see Figure 8-22). Once this move sequence is terminated, the processor may start another one by transferring the next move’s profile information and commands. The processor can store several single-step mode profiles and send them to the module through the PLC program control.

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End of move 2

End of move 3

End of move 1

Continuous

Rate

Continuous

Rate

Accl.

Decel.

Continuous

Rate

Accl.

Decel.

Accl.

Decel.

Start

Move

Move 1 Final

Position

Start

Move

Move 2 Final

Position

Start

Move

Position

Figure 8-22.

Single-step profile mode.

Move 3 Final

Position

In continuous mode, the motion profile is cycled through various accelerations, decelerations, and continuous speed rates to form a blended motion profile (see Figure 8-23). Rather than requiring additional commands for motion speed changes, an interface in continuous mode receives the whole move profile in a single block of instructions. The interface then performs the step motor control duty until the motion is completed and the processor sends the next profile. As in the single-step mode, the processor can store several continuous mode profiles in its memory and send them to the interface during the program execution.

Acceleration 2

Acceleration 1

Continuous

Rate

Deceleration 3

Deceleration 4

Continuous

Rate

Continuous

Rate

Start

Position

Move 1 Move 2

Final

Position 1

Position

Final

Position 2

Figure 8-23.

Continuous profile mode.

Move 3

Final

Position 3

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8

Each stepper interface used to control a stepper motor controls an axis, since the motion generated causes a movement about either the X-, Y-, or Z-axis

(see Figure 8-24). Depending on the PLC manufacturer, more than one axis may be controlled using several stepper module interfaces. When multipleaxis motions are required, the axes can be controlled either independently or synchronously (see Figures 8-25a and 8-25b, respectively). When controlled independently, each axis is independent of the other, executing its own single-step or continuous profile mode. The beginning and end of each axis motion may be different. When controlled synchronously, the beginning and end of the motion commands for each axis occur at the same time. A profile of one of the axes may start later or end before the other axes (see Figure 8-

25b), but the move that follows will not occur until all axes have started and ended their motions.

Processor and

Power Supply

Stepper

Module #1

Stepper

Module #2

Stepper

Module #3

Z

Y

X

PLC

Translator

X-Axis

Translator

Translator

Y-Axis

Z-Axis

Figure 8-24.

PLC system using stepper modules to control three axes.

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8

The use of a position/velocity feedback scheme (see Figure 8-26) can greatly improve the operation of a stepper motor control system, because this scheme provides closed-loop positioning control. The most common feedback field device used in a stepper control system is the encoder. In a position/velocity feedback scheme, the encoder is interfaced with an encoder input module to form a closed-loop stepper control system.

Encoder

Module

Stepper

Module

Turntable

Position

Feedback

Stepper

Motor Driver or Translator

Absolute

Encoder

Stepper

Motor

Figure 8-26.

Stepper motor with a position/velocity feedback scheme.

Knowledge of the load being driven is useful when applying a stepper interface in a stepper motor application. Loads with high inertia require large amounts of power for acceleration or deceleration; therefore, proper inertia matching is desired. As a rule of thumb, the load inertia should not exceed ten times the rotor inertia. The friction of the system should be examined to prevent the system from being underdamped (not enough friction) or from losing position accuracy (too much friction).

Coupling mechanisms connect a stepper motor to its load. These mechanisms include metal bands, pulleys and cables, direct drives, and leadscrews, which are used mostly for linear actuation. Figure 8-27 illustrates a diagram of a

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8 typical stepper motor interface connection with jog forward and jog reverse capabilities. During jog forward, the operator pushes the jog forward push button, which turns the motor ON for as long as the button is pushed. This allows for the load to be moved forward slightly, perhaps to place it in a specific position. The jog reverse push button performs the same task but in the opposite direction.

+

DC Power

Supply

+V

–V

FWD

REV

STOP

JOG FWD

JOG REV

Pulses

+

Stepper Motor

Translator

Load

Figure 8-27.

Stepper motor interface with jog forward and jog reverse capabilities.

S

ERVO

M

OTOR

I

NTERFACES

Servo motor interfaces are used in applications requiring control of servo motors via servo drive controllers. A servo motor is a specially designed motor that contains a permanent magnet. The speed of a servo motor can be easily varied by changing the input voltage to the motor. A servo module provides the drive controller with a

±

10 VDC signal, which defines the forward and reverse speeds of the servo motor. These modules are generally used when axis motion control, either linear or rotational, is required. A common linear motion example is a leadscrew assembly, which translates rotational movements from a servo motor into linear displacement (see

Figure 8-28).

Applications that once employed clutch-gear systems or other mechanical arrangements to perform motion control now use servo interfaces. The advantages of servo control are shorter positioning time, higher accuracy, better reliability, and improved repeatability in the coordination of axis motion. Typical applications of servo positioning include grinders, metalforming machines, transfer lines, material-handling machines, and the precise control of servo driver valves in continuous process applications.

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Tach

Servo

Motor

Limit

Switch

Lead

Screw

Slide

Grinder Part

Clamp

Encoder

Servo

Drive

Rate

Position

Servo

Motor

Interface

PLC

Figure 8-28.

Servo motor interface application.

Servo positioning controls operate in a closed-loop system, requiring feedback information in the form of velocity or position. Servo control interfaces may receive velocity feedback in the form of a tachometer input, or positioning feedback in the form of an encoder input, or both. The feedback signal provides the module with information about the actual speed of the motor and the position of the axis. This information is then compared with the desired velocity and the desired position of the axis. If the module detects a difference between the desired and actual values, it will correct its output until the error between the feedback data and the set point velocity and position values is zero.

Figure 8-29 shows a servo control configuration block diagram. PLCs that have positioning control capabilities require two modules—one to implement the servo control task and one to receive feedback and close the loop.

Some manufacturers, however, offer complete servo control for one axis in a single module.

Servo control, like stepper motor control, can occur in either single-step or continuous positioning mode (see Figure 8-30). Depending on the manufacturer, multiaxis control can also be synchronized in either single-step or continuous mode.

The PLC processor sends all of the move and position information, including acceleration, deceleration, and the final and feed velocities, to the servo module. In axis positioning applications, including those performed by servo

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Processor Data

Transfer

Servo Motor

Interface

Speed

Command

±

10 VDC

Servo

Drive

Velocity

Feedback

Position

Feedback

Motor

Voltage

Tachometer

Motor

Encoder

Figure 8-29.

Servo control block diagram.

Rate

Constant

Rate

Constant

Rate

Accl.

Decel.

Move 1

Accl.

Move 2

Return Move 3

(a) Single-step mode

Decel.

Position

Rate

Constant

Rate

Constant

Rate

Accl.

Decel.

Move 1

Accl.

Move 2

Return Move 3

(b) Continuous mode

Decel.

Position

Figure 8-30.

Servo control in

(a)

single-step and

(b)

continuous modes.

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8 systems, the term feed velocity indicates a period of constant velocity. When the module is operating, the processor monitors its status without interfering with the module’s complex, rapid calculations. The processor updates the module with a new move for an axis when the previous move has been completed and the module is ready for a new profile. The acceleration and deceleration parameters are given as speed in inches per minute per second

(ipm/sec) at a specific resolution. Figure 8-31 illustrates a typical field connection diagram for a servo motor interface.

DC

Power

Supply

– +

Encoder

+V

–V

Channel A

Common

Channel B

Common

Marker

Common

Servo

Motor

Output

±

10 VDC

Servo

Drive

– +

Motor

JOG FWD

JOG REV

Stop

Limit Switch

Loss of feedback detection

(VDC)

Tach

Figure 8-31.

Servo motor interface connection diagram.

When servo interfaces are used for positioning control, the feedback resolution provided by the system is a key issue. For example, if an interface uses a leadscrew (a rotational-to-linear motion translator) for axis displacement and an encoder to provide a feedback signal to the servo module, the user must know the leadscrew pitch, the number of encoder pulses per revolution, and the multiplier value in the encoder section of the interface. Some interfaces allow the user to select a multiplier, thus providing better feedback resolution without changing the encoder. The example at the end of this section will show you how some of these parameters are used.

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The feedback resolution of a servo positioning (linear) interface can be defined as:

Pitch of motion translator

Feedback resolution =

(Encoder pulses per revolution)(Feedback multiplier)

Each servo interface has a predefined resolution, which varies from 0.001 to

0.0001 inches. A trade-off exists between axis velocity and feedback resolution, since axis speed is directly proportional to feedback resolution. Typical axis positioning speeds range from 500 to 1000 inches per minute (ipm) and encoder feedback input frequencies range up to 250 kHz. Remember that resolution, or accuracy, diminishes as the speed increases (e.g., a resolution of 0.0001 inches at 450 ipm will be 0.001 inches at 900 ipm).

E

XAMPLE

8-3

A PLC system uses a servo interface to perform a one-axis positioning of a metal part. This part will be machined at a defined profile, which will be stored in the processor’s memory. A leadscrew, which allows travel of 1/8th inch (0.125) per revolution, moves the part along an X-axis. A quadrature incremental encoder, which has a 200 kHz pulse frequency that provides 250 pulses per revolution, supplies position feedback information. The encoder is connected to an encoder feedback terminal in the servo interface that provides a software programmable multiplier of

×

1,

×

2, and

×

4 increments per pulse (

×

= times).

(a) Find the feedback resolution and the number of pulses that will be received if the part travels 12.5 inches.

(b) Also, describe a way to double the feedback resolution without changing the encoder.

S

OLUTION

(a)

Feedback resolution is a function of the leadscrew pitch and the product of the number of pulses per revolution generated by the encoder and the feedback multiplier. The leadscrew’s pitch is 1/8th inch, which means that the part will travel 0.125 inches for every rotation (see Figure 8-32).

The feedback resolution is therefore:

0 125 inch/rev

250 pulses/rev 1

=

inches/pulse

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Thus, a metal part moving 12.5 inches will generate a position feedback of: inches inches/pulse

= pulses

Slide

Encoder

Feedback

Servo

Motor

Axis Motion

1 2

Pitch is

1/8 inch in this example

8 threads per inch

(8 pitch) in this example

3 4 5 6

7 8

Figure 8-32.

Leadscrew (linear) displacement system.

(b)

Using a multiplier of

×

2 would improve the 0.0005-inch resolution

(movement per encoder pulse) to 0.00025 inches (0.0005

÷

2 =

0.00025). This

×

2 multiplier option allows both of the quadrature pulses

(A and B) to be counted, yielding twice as many pulses in one rotation.

8-5 ASCII, C

OMPUTER

,

AND

N

ETWORK

I

NTERFACES

Some special I/O modules aid in the communication of information to the real world. These intelligent modules accept data from and transmit data to field devices, including computers and other PLCs. This data is transmitted in one of the following forms:

• ASCII characters

• a computer language, such as BASIC or C

• a proprietary media, as in the case of a network

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Local and remote I/O processors fall into the proprietary category of communication interfaces, since they communicate information through a network to the PLC’s subsystems. However, they were discussed in the remote I/O section of Chapter 6, since these modules also fall under the discrete I/O category.

ASCII

ASCII input/output interfaces send and receive alphanumeric data between peripheral equipment and the controller. Typical peripheral devices include printers, video monitors, and displays. These special I/O interfaces are available with either basic communications circuitry only or with complete communication interface circuitry, including an on-board RAM buffer and a dedicated microprocessor (intelligent ASCII interface). The information exchange in either type of interface generally takes place via an RS-232C,

RS-422, RS-485, or a 20 mA current loop standard communications link (see

Section 8-7 for peripheral interfacing). An ASCII interface receives power from the back plane of the rack enclosure to which it is connected. Figure 8-

33 shows an RS-232 ASCII interface.

(a) (b)

Figure 8-33.

RS-232 ASCII interfaces from

(a)

Mitsubishi and

(b)

Allen-Bradley.

If an ASCII interface does not use a microprocessor, the main PLC processor handles all of the communications interfacing. This significantly slows down the communication process and the program scan, since the processor must handle each character or string of characters that is transmitted to or received from the module on a character-by-character (interrupt) basis. That

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8 is, the module interrupts the main CPU every time it receives a character from the peripheral, and the CPU accesses the module every time it needs to send a message to the peripheral. This communication speed is generally very slow, so for a character to be read, the scan time must be faster than the time required to accept one character. For example, if the scan time is 20 msec and the baud rate (i.e., the number of binary bits transmitted per second) is 300 (30 characters per second—1 ASCII character = 10 bits), a character will be received every 33.3 msec (1 second

÷

30 characters = 1 character every 33.3

msec). Conversely, if the baud rate is 1200 (120 characters per second), more than one character will be transmitted from the peripheral per scan (one character every 8.33 msec). In this case, several characters will be lost since the PLC processor scans only once every 20 msec. This type of nonintelligent module, which does not have a microprocessor, is used in applications that require the communication of just a few characters, which are output at a relatively slow speed.

In an intelligent, or smart, ASCII interface, transmission between the peripheral and the module still occurs on an interrupt basis but at a faster transmission speed. An on-board microprocessor dedicated to performing

I/O communication makes this possible. The on-board microprocessor contains its own RAM memory, which can store blocks of data that are to be transmitted. When the module receives the input data from the peripheral, the module transfers it in blocks to the PLC memory through a data transfer instruction at the I/O bus speed. With this type of interface, all of the initial communication parameters, such as number of stop bits, parity (even or odd) or nonparity, and baud rate, can be selected using either hardware (i.e., rocker switches or jumpers) or control software. This method significantly speeds up the communication process and increases data throughput. Applications requiring lengthy reports or fast information exchange with alphanumeric devices generally use this type of smart module.

E

XAMPLE

8-4

A PLC system, which has a scan time of approximately 15 msec, uses a standard nonintelligent ASCII module. This ASCII interface reads and writes information to and from a remote alphanumeric keyboard/ display user interface. What is the maximum baud rate (bits per second) that can be used for proper transmission?

S

OLUTION

A scan time of 15 msec implies that, for proper transmission, only one character can be received every 15 msec. Each ASCII character has

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10 bits (7 for the code plus start, stop, and parity bits) that are used during each character transmission.

The inverse of the scan time provides the minimum time required by the processor to read an incoming character of 10 bits. Therefore, the time for one character (10 bits) is:

1 scan

=

1

= characters/scan

The baud rate is:

( .

)( )

=

.

Thus, the maximum baud rate would be 666.7 (or 667), which transmits

66 characters per second. However, since this is not a standard baud rate, the user would have to use a more standard one, perhaps a 600 baud rate.

C

OMPUTER

M

ODULES

—BASIC

BASIC modules, also referred to as data-processing modules, are intelligent

I/O interfaces capable of performing computational tasks without burdening the PLC processor’s computing time. In contrast to other intelligent I/O interfaces, such as servo controls, a BASIC module does not actually command or control specific field devices. Rather, it complements the performance of the PLC system.

In reality, a data-processing module is a personal computer packaged in an industrial I/O module, which inputs and runs user-written BASIC programs independently of the PLC’s processor. The BASIC language instructions used in this type of interface are the same as those used in a regular personal computer; however, PLC manufacturers incorporate additional instructions in BASIC modules that allow them to access the PLC’s memory (i.e., I/O data table). These added instructions are very useful when the module requires process information to perform BASIC-run calculations.

Some data-processing modules are able to run languages other than BASIC, such as PASCAL, C, or other high-level languages. These modules also contain added instructions that allow direct internal communication (data transfers) between the module, the PLC processor, and the memory. This communication generally occurs through move instructions, which transfer blocks of data to and from the module. Some typical move instructions are move block read and move block write. The user can directly initiate BASIC communication in three ways—through the module’s programming port

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(using the terminal), upon recognition of a user-defined data decoding signal transferred from the PLC, or after the power-up initialization of the

PLC system.

The programming port of a BASIC interface is generally compatible with the RS-232C, RS-422, and RS-485 communication standards (see Section 8-

7), which are intended to support ASCII terminals or the manufacturer’s PLC programming terminal. BASIC interfaces also have at least one serial peripheral port to provide interfacing with printers, asynchronous modems, and other serial peripherals. Under BASIC program control, the serial port is used to generate reports for operator interfaces or for local area networks of other personal computers that gather process data for storage purposes.

Other applications of computer modules are the implementation of artificial intelligence (AI) computations and number-crunching calculations. In AI applications, the computer interface accesses information from the PLC and processes it according to AI algorithms. Chapter 16 explains artificial intelligence. In number-crunching calculations, BASIC modules perform computations that would require awkward PLC programming.

With their vast data-handling capabilities, only the user’s innovation limits the uses and applications of computer modules. The utilization of these interfaces in a PLC system is convincing proof of the successful integration of the personal computer’s computing power with the PLC’s powerful I/O handling and control capability.

N

ETWORK

I

NTERFACE

M

ODULES

Network interface modules (see Figure 8-34) allow a number of PLCs and other intelligent devices to communicate and pass PLC data over a highspeed local area communication network (see Chapter 18). Any device may interface with the network, because the network is not restricted to only products designed by the network’s manufacturer.

Nowadays, many third-party suppliers manufacture products that are compatible with different PLC network environments. Among the most popular networks are:

• device-level bus networks (e.g., CANbus, Seriplex, etc.), which are used by discrete devices

• process field networks (e.g., Fieldbus and Profibus), which are used by analog devices

• Ethernet/IEEE 802.3 networks, used by PLC CPUs and computers

• proprietary networks, which are widely used by large PLC manufacturers

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(a)

(b)

Figure 8-34. (a)

Mitsubishi’s MELSECNET/B interface and

(b)

Allen-Bradley’s CANbus network interface.

A network interface module implements all of the necessary communication connections and protocols to ensure that a message is accurately passed along the network. In general, when a processor or other network device sends a message, its network interface transmits the message over the network at the network’s baud rate speed. The receiving network interface accepts the transmission, passes the information to the CPU, and if necessary, sends a command to the intended field device. As you will see in Chapter 18, the speed and protocol for the communication link varies depending on the network.

Depending on the network type and configuration, a network module can be connected, at a distance of up to 10,000 feet, with 100 to 1000 devices

(nodes). The communication media—twinaxial, coaxial, or twisted-pair— varies depending on the type of network. The different types of networks also utilize specific network interfaces. For example, a device-level CANbus network uses a CANbus-type interface. Chapter 19 provides more information on I/O bus networks. Figure 8-35 illustrates a typical configuration of a PLC network using the different types of network interface modules.

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Terminator

Local Area Network

(LAN)

(a)

Terminator

Network

Interface

Ethernet

Interface

Network

Interface

CANbus

Interface

Fieldbus

Interface

LAN

CANbus

Network

Smart Discrete I/O Devices

Fieldbus

Network

Smart Process Field Devices

(b)

Figure 8-35. (a)

A standard PLC local area network and

(b)

a PLC local area network with CANbus (device bus) and Fieldbus (process bus) subnetworks.

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8-6 F

UZZY

L

OGIC

I

NTERFACES

Fuzzy logic interfaces, which are offered by a few PLC manufacturers, provide a way of implementing fuzzy logic algorithms in PLCs. Fuzzy logic algorithms analyze input data to provide control of a process. As shown in

Figure 8-36, fuzzy logic modules do not function as actual input and output interfaces per se. Rather, they work with other input and output interfaces, providing an intelligent link between the two.

Input

Interfaces

Output

Interfaces

Decision making based on fuzzy logic

Fuzzy

Module

Fuzzy implementation in module

Sensed

Information

Control

Actuators

Process

Figure 8-36.

Fuzzy logic interface application.

Fuzzy logic modules are an integral part of the advanced capabilities of today’s programmable controllers. They help to bridge the gap between the discrete and analog decision-making functions of a PLC. In essence, fuzzy logic modules allow PLCs to “reason,” letting them interpret data in an analog-type form instead of just as ON or OFF. For example, a typical PLC connected to a temperature-sensing device can only sense whether a temperature is acceptable or unacceptable (see Figure 8-37a). That is, the temperatures between 60

°

F and 80

°

F are acceptable (logic 1); all other temperatures are unacceptable (logic 0). A PLC with fuzzy logic capabilities, however, can discern between the ranges of acceptable and unacceptable temperatures, judging a temperature to be either more acceptable or less acceptable (see Figure 8-37b). Thus, a fuzzy logic module can determine that

62

°

F is an acceptable temperature, but that it is not as acceptable as 70

°

F.

The “reasoning” capabilities of fuzzy modules allow them to provide finetuned control of analog processes, as well as nonlinear and time-variant processes, like tension and position control. These types of hard-to-control

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8 systems usually provide gross input deviations or insufficient input resolution, which often require human intuition and judgment. Fuzzy logic modules can provide this type of human-like judgment.

(a)

1

Unacceptable

0

60˚F

Acceptable

80˚F

Unacceptable

(b)

1

62˚F (less acceptable)

0

Unacceptable

60˚F

70 ˚F (most acceptable)

Acceptable

Graphic Function

80˚F

Unacceptable

Figure 8-37.

Temperature sensing in

(a)

a normal PLC and

(b)

a PLC with fuzzy logic capabilities.

F

UZZY

L

OGIC

A

LGORITHMS

Fuzzy logic modules work with other modules to input and output process information according to fuzzy control algorithms. These algorithms are based on user-programmed rules, which are formed by IF conditions and

THEN actions. A fuzzy module analyzes its inputs according to the IF conditions and then outputs control data according to the corresponding

THEN action. For example, the temperature-sensing fuzzy logic algorithm shown in Figure 8-38 might have a rule stating that IF the input temperature is 75

°

F, THEN its level of acceptability is 0.5, so turn the output’s controlling element (e.g., a servo valve) a little clockwise (perhaps 10 degrees to the right). The fuzzy algorithm determines how much the “little” amount is when the output is generated.

70˚F

1

0.5

0

Unacceptable

60˚F

Acceptable

75˚F

80˚F

Unacceptable

IF the temperature equals 75˚F

THEN turn the output’s controlling element a little clockwise

Figure 8-38.

Example of a fuzzy logic algorithm.

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Fuzzy logic control is even more practical when multiple rules exist. For example, a fuzzy I/O module may receive data from a field device measuring the input process temperature, as well as from a field device measuring the outside environmental temperature. In this case, the module could combine two rules to determine a more precise acceptability level, resulting in a more precise output action. For example, IF the input temperature is 75

°

F and IF the outside environmental temperature is 70

°

F, THEN the acceptability level is 0.63, so turn the control element a little less (perhaps 8 degrees) clockwise.

To provide reasoned control of a field device, a fuzzy logic module analyzes its rules according to its graphic function and then assigns each rule a grade to form what are known as membership functions. Membership functions classify input data and group the data into sets of values called fuzzy sets. A rule’s grade indicates how well it fits into the membership function. The number of membership functions depends on the complexity of the control task and the number of inputs to the module.

Each membership function has labels associated with it. For instance, the membership function shown in Figure 8-39 has three labels: cool, nice, and hot. Thus, the rule “IF the temperature equals 65

°

F” has a grade of 0.5 cool and 0.5 nice, indicating that it is not totally nice but that it is not totally cool either. The same applies to the temperature 75

°

F, except that it is half nice and half hot. These grades are part of the control algorithm’s fuzzy set, which is used to determine the control output. As we will explain in Chapter 17, a fuzzy set composed of several membership function may use up to seven labels to implement its rules.

Not Nice

1

Grade

0.5

Cool Nice Hot

0

50˚F 60˚F

65˚F

70˚F

Temperature ˚F

(Input)

80˚F 90˚F

A reading of 65˚F will have a grade of 0.5 nice temperature (50%) and 0.5 cool temperature (50%).

Figure 8-39.

Membership functions used to create a grade.

Fuzzy logic interfaces allow the user to program the criteria for membership functions and fuzzy sets inside the module according to the control task requirements. A fuzzy module can be programmed through its serial port RS-

232C serial port via a personal computer with specialized, manufacturerprovided fuzzy logic programming software.

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F

UZZY

L

OGIC AND

I/O I

NTERACTION

Figure 8-40 shows Omron Electronics’s Fuzzy Logic Unit (FLU), a fuzzy logic interface that can read process data from up to 8 input devices and write data to up to 4 output devices. This interface can perform up to 128 rules, each with a maximum of eight IF conditions and two THEN actions. The FLU, which works independently of the processor, can implement all of its fuzzy logic computations in 6 msec or less, thus providing fast implementation of fuzzy logic control.

Figure 8-40.

Omron Electronics’s Fuzzy Logic Unit (FLU) in a C200H PLC system.

As shown in Table 8-2, Omron’s Fuzzy Logic Unit uses 10 words or registers of the programmable controller’s data table to store its control parameters.

The rack position of the FLU module determines the registers’ addresses.

Assuming that the placement of the module takes addresses 110 through 119, the module will use the addresses as follows:

• The first four bits (0–3) of the first word (word 110) contain, in BCD, the number of inputs that will be used with the FLU module. Bit 15 of this word turns on the fuzzy processing.

• The second word (word 111) specifies where the input data to be analyzed is stored in the PLC’s memory. It indicates the starting register address, with the length of the data block being the BCD number from word 110.

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I n p u t s : b i t s

( 8 m

0 – 3 a x ) o

( e f

.

w o g .

, r d

I =

1 1 0

8 ) s p e c i f y t h e n u m b e r o f i n p u t s t o b e r e a d

W o r d 1 1 1 :

( s e t a r t

.

g .

, i n g a d a d d r d r e s e s s s

= w h e r e

1 2 0 ) i n p u t d a t a i s l o c a t e d ( l e n g t h o f I )

O u t p u t s : b i t s w r i t t

0 – 3 e n ( 4 o f m w a x o

) r d

( e

1 1

.

g .

,

2 s p

O = e c i f y

4 ) t h e n u m b e r o f o u t p u t s t o b e

W o r d 1 1 3 :

( s e t a r t i

.

g .

, n g a d a d d r d r e s e s s s

= w h e r e

1 3 0 ) o u t p u t d a t a i s l o c a t e d ( l e n g t h o f O )

W o r d 1 1 4 : u s e d f o r f l a g s a n d s e t t i n g s

W o r d s 1 1 5 – 1 1 9 : a v a li a b l e a s w o r k i n g w o r d a d d r e s s e s

Table 8-2.

Omron’s FLU space requirements.

• Like the first word, the first four bits (0–3) of the third word (word

112) contain the number of outputs in BCD.

• The fourth word (word 113) contains the starting address for the storage of the output data, which is the result of the fuzzy logic computations. The length of the data block is the BCD number from word 112.

Because fuzzy logic modules work through other I/O interfaces, their input/ output data must be transferred from/to the word address locations of the I/O modules working with them. Figure 8-41 illustrates the memory addresses

(words) used by the Omron FLU in the previous example, along with the register locations of the corresponding I/O devices’ input and output data.

8 Inputs

Input data to fuzzy unit

120

121

122

123

124

125

126

Fuzzy Unit bit 15 = 0 fuzzy processing OFF bit 15 = 1 fuzzy processing ON

15141312 1110 9 8 7 6 5 4 3 2 1 0

110 starting input address

O

starting output address fuzzy logic flags and setting

111

112

113

114

115

116

4 Outputs

Output data from fuzzy unit

130

131

132

133

Contents of words

130–133 will contain output results from fuzzy computing if word

112 contains 4 in BCD

127 117

Contents of words

120–127 will be used as inputs for fuzzy computing if word 110 contains 8 in BCD

118

119

Figure 8-41.

Memory addresses used by example FLU.

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Block transfer instructions can be used to transfer data between the I/O modules and the fuzzy module (see Figure 8-42). Chapter 17 explains more about fuzzy logic control.

Input 1

Input 2

Input 3

8 Analog Input Module

Single-Ended

5

6

7

8

C

3

4

1

2

4 Analog Output Module

Differential

1

1C

2

2C

3

3C

4

4C

Analog

Input

Module

Chan 1

2

3

4

5

6

7

8

Block

Transfer

8 words max

Analog input information of 8 channels is stored

Fuzzy

Input

Data

Fuzzy

Configuration

Data

Fuzzy

Output

Data

Block

Transfer

Analog

Output

Module

3

4

Chan 1

2

4 words max

Analog output information of 4 channels is stored

Figure 8-42.

Data transfer between I/O modules and fuzzy module.

8-7 P

ERIPHERAL

I

NTERFACING

Regardless of the type of peripheral used, the user must properly connect the peripheral device to the PLC or intelligent module to achieve correct communication. Typical peripherals communicate in serial form at speeds ranging from 110 to 19,200 bits per second (baud), with parity and nonparity, asynchronicity, and various communication interface standards.

C

OMMUNICATION

S

TANDARDS

Communication standards fall into two categories: proclaimed and de facto.

Proclaimed standards are officially established standards set by various

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8 electronics organizations, such as the Institute of Electrical and Electronics

Engineers (IEEE) and the Electronic Industries Association (EIA). These institutions define public specifications through which manufacturers can establish communication schemes that allow compatibility among different manufacturers’ products. Proclaimed standards, such as the IEEE 488 instrument bus, the EIA RS-232C, the EIA RS-422, and the EIA RS-485, are examples of well-defined proclaimed standards.

De facto standards are interface methods that have gained popularity through widespread use. Although these popular standards have been adopted throughout the industry, they have no official definition. Because they are not properly defined, some de facto standards cause interface problems; however, other standards, such as the 20 mA current loop, are good, well-defined de facto standards.

S

ERIAL

C

OMMUNICATION

Serial communication, as the name implies, occurs in serial form through simple, twisted-pair cables. Serial data transmission is used for most peripheral communication devices, since these devices are slow in nature and require long cable connections. Serial communication allows peripheral equipment, such as terminals, modems, operator interface panels, and line printers, to receive ASCII information.

Two of the most popular standards for serial communication are the RS-

232C and the 20 mA current loop. Other PLC standards are the RS-422 and

RS-485, which improve performance and give greater flexibility in data communication interfaces.

The data communication links used with peripheral equipment can be unidirectional or bidirectional. If a peripheral is strictly either an input or an output device, then data transmission occurs in only one direction. In this case, a unidirectional serial signal line is all that is required to complete the link. Devices that serve as both input and output devices (e.g., video terminals) require bidirectional links. There are two ways to achieve this bidirectional communication. First, a single data line can be used as a shared communication line. The data can be sent in either direction, but only in one direction at a time. This operation is known as half duplex. If simultaneous bidirectional communication is required, two lines can connect the PLC to the peripheral. One line would be assigned permanently as an input, while the other would be a permanent output. This mode is known as full duplex. Figure

8-43 illustrates the unidirectional, half-duplex, and full-duplex communication methods.

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( a )

PLC

Output

Driver

One-direction data transfer

Input

Receiver

Line

Printer

( b )

PLC

Output

Driver

Input

Receiver

Two-direction data transfer

Input

Receiver

Output

Driver

Terminal

Equipment

( c )

PLC

Output

Driver

Input

Receiver

Simultaneous two-direction data transfers

Input

Receiver

Output

Driver

Terminal

Equipment

Figure 8-43.

(a)

Unidirectional,

(b)

half-duplex, and

(c)

full-duplex data communication formats.

EIA RS-232C.

The EIA RS-232C is a proclaimed standard that defines the interfacing between data equipment and communication equipment that employs serial binary data interchange. This standard defines both the electrical signals and the mechanical details of the interface. A complete RS-

232C interface consists of 25 data lines, which encompass all of the possible signals for simple and complex communication interfaces. Although several of these lines are specialized and a few are undefined, most peripherals require only three to five lines to operate properly. Table 8-3 describes the 25 data lines as specified by the EIA.

Figure 8-44a illustrates an RS-232C data communication system using a telephone modem, while Figure 8-44b shows the RS-232C wiring connections from a computer to a smart EIA PLC interface module. Figure 8-44c illustrates a typical RS-232C interface to a printer. Note that the communication between a computer and a PLC has few lines swapped if no modem or other data communication equipment is used. This configuration is

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8

1 6

1 7

1 8

1 9

2 0

1 1

1 2

1 3

1 4

1 5

2 1

2 2

2 3

2 4

2 5

P i n N u m b e r

3

4

5

1

2

8

9

1 0

6

7

D e s c r i p t i o n

P r o t e c t i v e g r o u n d

T r a n s m i t t e d d a t a

R e c e i v e d

R e q u e s t d a t a t o s e n d

C l e a r t o s e n d

D a t a s

S i g n a l e g t r r e a d y o u n d ( c o m m o n r e t u r n )

R e c e i v e d

( R e s e r v e d

( R e s e r v e d il n e s i g n a l f f o o r r d d a a t t a a d e t e c t o r s e t s e t t t e e s s t t i i n n g ) g )

U n a s s i g n e d

S

S e e c c o o n n d d a a r r y y r e c e c l e a r i v e d il n e s i g n a l t o s e n d d e t e c t o r

S e c o

T r a n s n d a r m i s s y i o t r a n s m i t t e d n s i g n a l e l e d a t a m e n t t i m i n g ( D C E )

S e c o n d a

R e c e i v e r r y s i g n a l

U n a s s i g n e d r e c e i v e e l e d m d a t a e n t t i m i n g ( D C E )

S e c o n d a r y

D a t a t e r m i n r e q u e s t a l r e a d y t o s e n d

S i g n a l

R i n g i q n d u a il t y i c a t o r d e t e c t o r

D a t a

T r a n s s i g n a l m i t r a t e s i g n a l s e l e c t o r e l e m e n t

( D T E t i m i n g

/ D C E )

( D T E )

U n a s s i g n e d

Table 8-3.

EIA RS-232C data line descriptions.

called a null modem cable. The connection between a PLC and an RS-232C peripheral (printer, etc.) usually requires four wires; however, the user should refer to the connection specifications for both devices for specific details.

The RS-232C standard calls for certain electrical characteristics. Some of these specifications are as follow:

• The signal voltages at the interface point should be a minimum of

+5 V and a maximum of +15 V for logic 0; for logic 1, the minimum is –15 V and the maximum is –5 V.

• The maximum recommended cable distance is 50 feet, or 15 meters; however, longer distances are permissible provided that the resulting load capacitance, measured at the interface point and including the signal terminator, does not exceed 2500 picofarads.

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Telephone lines

Programmable

Controller

Signal ground

Transmit data

Request to send

Receive data

Modem Modem

Signal ground

Transmit data

Request to send

Receive data

Computer

(a)

PLC’s

Smart

EIA

Interface

6

22

20

3

4

1

2

5

8

Transmit data

Receive data

Request to send

Clear to send

Carrier detect

Data set ready

Ring indicator

Data terminal ready

Ground

Transmit data

Receive data

Request to send

Clear to send

Carrier detect

Data set ready

Ring indicator

Data terminal ready

Signal ground

6

22

20

3

4

5

8

1

Computer

2

(b)

PLC’s

EIA

Interface

2

3

–V

+V

Transmit

Receive

Transmit

Receive

8

20

6

7

1

2

Printer

RS-232

Connector

3

5

+V –V Com

User

DC Supply

(c)

Figure 8-44.

RS-232C communication connections for

(a)

a PLC to a modem,

(b)

a PLC to a computer, and

(c)

a PLC to a printer.

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• The drivers used must be able to withstand open or short circuits between pins in the interface.

• The load impedance at the terminator side must be between 3000 and

7000 ohms, with no more than 2500 picofarads capacitance.

• Voltages under –3 V (logic 1) are called mark potentials (signal conditions); voltages above +3 V (logic 0) are called space voltages.

The area between –3 V and +3 V is not defined.

Figure 8-45 illustrates a typical RS-232C serial ASCII pulse train. The transmission begins with a START bit (0) and ends with either one or two

STOP bits (1). The transmission also includes parity, which can be even or odd (see Chapter 4 for parity).

EIA DATA

1 (–V) Mark

0 (+V) Space

Start

LSB

0 1 1 0 0 1 0

MSB PAR Stop Stop

Next

Start

Character S =123

8

1 0 1 1

110 Baud

2 Stop Bits

1 (–V) Mark

0 (+V) Space

0 1 1 0 0 1 0 1 0 1

Next

Start

All Other

Baud Rates

1 Stop Bit

Figure 8-45.

RS-232C serial ASCII pulse train.

EIA RS-422.

The RS-422 standard overcomes some of the RS-232C shortcomings, including an upper data rate of 20K baud, a maximum cable distance of 50 feet, and an insufficient capacity to control additional loop-test functions for fault isolation. Like the RS-232C, the RS-422 standard still deals with the traditional serial/binary switch signals of two voltage levels across the interface. The RS-449 standard, which meets new operational requirements, defines the physical and mechanical specifications for the RS-

422 electrical interface standard.

The RS-232C is an unbalanced link communication method, meaning that it specifies a primary station that is always in control (master/slave relationship). This primary station is responsible for setting logical states and operational modes of each secondary station, thereby controlling the entire data communication process. The RS-422, however, is a balanced link in which either station can configure itself and initiate transmission when both stations have identical data transfer and link control capabilities. The RS-422 specifies electrically balanced receivers and generators that tolerate and produce less noise. These provide superior performance up to 10 megabaud

(10,000 K baud).

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A balanced circuit in an RS-422 configuration employs differential signaling over a pair of wires for each circuit, while an unbalanced configuration signal

(RS-232C) uses one wire for each circuit and a common return circuit. Figure

8-46 illustrates configurations for both RS-422 and RS-232C circuits.

A

G

B

Generator

Circuit Ground

A'

R

RT

T

B'

Signal Wires

A

Signal Wires

(a)

EIA RS-422 circuit

B

A'

RT

T

B'

R

G

Load

Circuit Ground

A

Signal Wires

A'

G

R

Signal Ground

A'

Signal Wires

A

R

G

(b)

EIA RS-232C circuit

Figure 8-46.

Circuit configurations for

(a)

RS-422 and

(b)

RS-232C connections (G = generator; R = receiver; R

T

= optional cable termination; A, B, A', B' = interface points).

The RS-422 standard may be required when interconnecting cables are too long for effective unbalanced operation and noise in excess of 1 V can be measured across the signal conductors. The driver circuits for an RS-422 configuration are capable of furnishing the DC signal necessary to drive up to 10 parallel, connected RS-422 receivers. However, this capability involves considerations such as stub line lengths, data rate, grounding, fail-safe networks, etc. The standard does not specify cable characteristics, but to ensure proper operation, paired cables with metallic conductors should be employed and, if necessary, shielded.

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The maximum allowable cable distance for the RS-422 standard is a function of the data transmission rate. Figure 8-47 illustrates the relationship between distance and data rate. The graph describes empirical measures using a 24

AWG copper conductor and a twisted-pair cable with a shunt capacitance of 52.5 pF/meter (16 pF/foot) terminated in a 100 ohm resistive load. The balanced electrical characteristics of RS-422 perform even better with an optimal cable termination of approximately 120 ohms in the receiver load.

1200

1000

RS-422

RS-422 Without Cable

RS-422 With Cable

100

60

Terminations

Termination

15

10

RS-232C

1K 2.4K 4.8K 10K 20K 56K 100K 1M

Data Rate (bits/sec.)

2M 10M

Figure 8-47.

Cable distance versus data rate relationship for the RS-422 and RS-

232C communications standards.

In reality, the curves in Figure 8-47 are conservative for RS-422 balanced operation. A cable can perform effectively, at lower data rates, at a distance of several miles with good engineering practice. However, if longer distances are required, the user should perform an analysis of the absolute loop resistance and the capacitance of the cable. In general, longer distances are possible when using 19 AWG cable, but the type and length of cable used must be capable of maintaining the necessary signal quality for the particular application.

The RS-449 mechanical standard, which supports the RS-422 electrical standard, offers several extra circuits (signals) that provide greater flexibility to the interface and accommodate new common return circuits. These additional functions and wires were beyond the capacity of an RS-232C 25pin connector; therefore, the EIA selected a 37-pin connector for the RS-422 standard, because it satisfies interface channel requirements. If secondary channel operation is to be used as a low-speed TTY or acknowledgments channel, a separate 9-pin connector is also needed.

EIA RS-485.

The RS-485 standard, like the RS-422, has dual transmitting and receiving lines (differential signals). This type of interface is best suited for industrial applications, because it provides better electrical isolation from the PLC or host than the RS-422 standard. It is also capable of being used in

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8 a network (e.g., multiple transmitters and receivers operated on a common media, such as twisted-pair cable). Distances of up to 4000 feet (1200 meters) can be attained with this standard.

20 mA Current Loop.

The 20 mA current loop de facto standard consists of four basic wires: transmit plus, transmit minus, receive plus, and receive minus. Figure 8-48 illustrates the four lines used to form the 20 mA current loop. This de facto standard is also referred to as a TTY serial interface.

PLC

+

R

Receive

Amplifier

R

L

L

Transmit

Transmit

Data

20 mA

Terminal

20 mA

20 mA

Receive +

20 mA

Data

Receive –

R

L

L

+

Receive

Amplifier or Sensor

R

Figure 8-48.

20 mA current loop operation diagram.

In the 20 mA current loop standard, the opening and closing of current loops signifies 0s and 1s, respectively. When the current loop standard was first used in teletypewriters, rotating switch contacts in the sending teletypewriter connected and broke the loop; the corresponding 20 mA signal drove a print magnet in the receiving teletypewriter. Today, most 20 mA current loops electronically operate the opening switch and printer magnet arrangement.

To generate a current, the voltage in a 20 mA current loop is applied to a current limiting resistor at the data-sending end. This voltage is dropped across both the current limiting resistor (R

TX

) and across the load resistor (R

L

).

The R values and the positive voltage applied to them must generate a flow current of 20 mA. Typically, a high voltage and high resistance (R

TX

) are chosen, even though a low voltage and low resistance can be used. Current loop communications provide an advantage over other methods, since the wire resistance has no effect on the constant current loop. Voltage does not drop across the wire in current loop communications as it does in an RS-232C

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8 voltage-oriented interface, thus allowing the current loop interface to drive signals longer distances. To avoid this voltage drop, a current loop uses a constant source to generate the 20 mA current.

Converting a 20 mA current loop to an RS-232C interface can be done simply by employing an RS-232C-level receiver. The receiver drives a switching transistor on the transmission end, and an optical isolator and load resistor drive the RS-232C driver on the receiving end.

I

NTERFACE

U

SES AND

A

PPLICATIONS

Communications standards are used extensively in applications with a host

PLC or with a computer in a network where one or more interfaces are used.

Sometimes a PLC with an RS-232C or RS-422 communication interface must communicate with an RS-485 device. In this case, an RS-232C–to–

RS-485 converter (or an RS-422–to–RS-485 converter) can provide this communication (see Figure 8-49). These converters provide electrical isolation, in addition to longer distance. Figure 8-50a illustrates one of B&R

Industrial Automation’s interface converters, which can be used for communicating between two PLCs (see Figure 8-50b) over a long distance

(maximum of 500 m, or 16,500 ft). Each PLC starts its interfacing via RS-

232 (or RS-422) and transfers to RS-485 to achieve the required distance.

(a)

RS-232C

Interface

232

TX

RS-232–to–RS-485

Converter

232 485

TX

RS-485

Device

RX

485

232

RX

232 485 RX TX 485

(b)

RS-422

Interface

422

TX

RS-422–to–RS-485

Converter

422 485

TX

RS-485

Device

RX

485

422

RX

422 485

RX TX

485

Figure 8-49. (a)

RS-232C–to–RS-485 and

(b)

RS-422–to–RS-485 converters.

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1

4

5

9

6

7

8

RS-232C or RS-422

Interface

(a)

Special Function I/O and

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8

Installation/Grounding

(DIN rail mount)

1–DIN rail (grounded)

2–RS-232 cable

3–Cable holder

4–Cable shield

5–Grounding clamp

6–Voltage supply cable

7–Cable holder

8–RS-485 cable

(e.g., twisted pair)

9–Grounding the

negative supply

RS-232C or RS-422

Interface

RS-232C or RS-422 to RS-485

(16,500 ft)

5000 m

Max

RS-485 to

RS-232C or RS-422

(b)

Figure 8-50. (a)

B&R Industrial Automation’s interface converter and

(b)

an example of the convertor communicating between two PLCs.

Figure 8-51 shows the relationship between transmission distance and data rate for the RS-485 interface converter. This diagram is based on a cable with an impedance of 110

, a capacitance of 41 picofarads/m, and a cable ohmic resistance of 0.094

/m. The converter is capable of driving a signal at rates of 115.2K baud at a distance of 1500 m (5000 ft). It is also capable of operating at a distance of 5000 m (16,500 ft) at a rate of 9.6K baud.

Figure 8-52 shows another application of serial communication. In this example, an isolated link coupler (1747-AIC) interface connects several

Allen-Bradley SLC-500 PLC processors to a DH-485 network (RS-485– based). This link coupler provides a connection for each of the SLC-500

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120

115.2

110

100

90

80

70

60

50

40

38.4

30

20

19.2

10

9.6

0

Distance (m)

Figure 8-51.

Baud rates for transmission distances in a RS-485 converter.

CPUs in the DH-485 network. The DH-485 network also interfaces with a personal computer through an RS-232–to–DH-485 communication interface. The maximum length of the main trunk of the DH-485 network is 4000 feet at a rate of 19.2K baud. This type of subnetwork is very useful for remote programming and data acquisition links of up to 32 devices.

RS-232/DH-485

Interface Connector

DH-485 network

SLC 500 SLC 500 SLC 500

1747-AIC

Isolated Link Coupler

Figure 8-52.

PLC processors connected to an isolated link coupler interface.

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K

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T

ERMS

ASCII I/O interfaces

BASIC module cold junction compensation direct action I/O interface distributed I/O processing encoder/counter module fast-input interface fast-response interface fuzzy logic interface intelligent I/O interface lead resistance compensation network interface module proportional-integral-derivative (PID) interface resistance temperature detector (RTD) interface serial communication servo motor interface stepper motor interface thermocouple input module weight input module wire input fault module

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PLC

P

ROGRAMMING

Programming Languages

The IEC 1131 Standard and Programming Language

System Programming and Implementation

PLC System Documentation

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ANGUAGES

Language is only the instrument of science, and words are but the signs of ideas.

—Samuel Johnson

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IGHLIGHTS

The programming languages used in programmable controllers have been evolving since the inception of the PLC in the late 1960s. In this chapter, we will introduce the three types of languages used in PLCs today—ladder,

Boolean, and Grafcet. During our discussion of these languages, we will explain some of the versatile, powerful instructions associated with them.

These instructions expand programming possibilities in areas such as data manipulation, network communication, data transfer, and program/flow controls, just to name a very few. After you gain a knowledge of these languages and instructions, you will be ready to explore the IEC 1131-3 standard for PLC programming languages, which includes ladder diagrams and the implementation of Boolean programming in an IEC 1131 environment. This programming language standard holds powerful capabilities for the future of PLC programming.

9-1 I

NTRODUCTION TO

P

ROGRAMMING

L

ANGUAGES

As PLCs have developed and expanded, programming languages have developed with them. Programming languages allow the user to enter a control program into a PLC using an established syntax. Today’s advanced languages have new, more versatile instructions, which initiate control program actions. These new instructions provide more computing power for single operations performed by the instruction itself. For instance, PLCs can now transfer blocks of data from one memory location to another while, at the same time, performing a logic or arithmetic operation on another block.

As a result of these new, expanded instructions, control programs can now handle data more easily.

In addition to new programming instructions, the development of powerful

I/O modules has also changed existing instructions. These changes include the ability to send data to and obtain data from modules by addressing the modules’ locations. For example, PLCs can now read and write data to and from analog modules. All of these advances, in conjunction with projected industry needs, have created a demand for more powerful instructions that allow easier, more compact, function-oriented PLC programs.

9-2 T

YPES OF

PLC L

ANGUAGES

The three types of programming languages used in PLCs are:

• ladder

• Boolean

• Grafcet

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The ladder and Boolean languages essentially implement operations in the same way, but they differ in the way their instructions are represented and how they are entered into the PLC. The Grafcet language implements control instructions in a different manner, based on steps and actions in a graphicoriented program.

L

ADDER

L

ANGUAGE

The programmable controller was developed for ease of programming using existing relay ladder symbols and expressions to represent the program logic needed to control the machine or process. The resulting programming language, which used these original basic relay ladder symbols, was given the name ladder language. Figure 9-1 illustrates a relay ladder logic circuit and the PLC ladder language representation of the same circuit.

L1 L2

PB* LS

PL

FS

Hardwired Ladder Circuit

PB* LS PL

FS

PLC Ladder Circuit

*Note: The PLC will know the elements PB, LS, FS, and PL by their addresses once the address assignment has been performed.

Figure 9-1.

Hardwired logic circuit and its PLC ladder language implementation.

The evolution of the original ladder language has turned ladder programming into a more powerful instruction set. New functions have been added to the basic relay, timing, and counting operations. The term function is used to describe instructions that, as the name implies, perform a function on data— that is, handle and transfer data within the programmable controller. These instructions are still based on the simple principles of basic relay logic, although they allow complex operations to be implemented and performed.

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New additions to the basic ladder logic also include function blocks, which use a set of instructions to operate on a block of data. The use of function blocks increases the power of the basic ladder language, forming what is known as enhanced ladder language. Figure 9-2 shows enhanced functions driven by basic relay ladder instructions. As shown in the figure, a block or a functional instruction between two contact symbols represents an enhanced functional block.

A B

Function Block

MOVE

Register-to-Table

Enable

Output

A B

Reset

A B

Functional Instruction

MOVE register to table

Figure 9-2.

Enhanced functional block format.

The format representation of an enhanced ladder function depends on the programmable controller manufacturer; however, regardless of their format, all similar enhanced and basic ladder functions operate the same way.

Throughout this chapter, we will refer to enhanced ladder instructions as block format instructions.

As indicated earlier, the ladder languages available in PLCs can be divided into two groups:

• basic ladder language

• enhanced ladder language

Each of these groups consists of many PLC instructions that form the language. The classification of which instructions fall into which categories differs among manufacturers and users, since a definite classification does not exist. However, a de facto standard has been created throughout the years that sorts the instructions into either the basic or enhanced ladder language.

Table 9-1 shows a typical classification of basic and enhanced instructions.

Sometimes, basic ladder instructions are referred to as low-level language, while enhanced ladder functions are referred to as high-level language. The

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B a s i c

R e l a y c o n t a c t

R e l a y o u t p u t

T i m e r

C o u n t e r

L a t c h

J u m p t o / g o t o

M a s t e r c o n t r o l r e l a y

E n d

A d d i t i o n

S u b t r a c t i o n

M u l t i p il c a t i o n

D i v i s i o n

C o m p a r e ( = , > , < )

G o t o s u b r o u t i n e

E n h a n c e d

D o u b l e p r e c i s i o n a r i t h m e t i c

S q u a r e

S o r t r o o t

M o v e r e g i s t e r

M o v e r e g i s t e r t o t a b l e

F i r s t i n – f i r s t o u t

S h i f t r e g i s t e r

R o t a t e r e g i s t e r

D i a g n o s t i c b l o c k

B l o c k t r a n s f e r ( i n / o u t )

S e q u e n c e r

P I D

N e t w o r k

L o g i c m a t r i x

Table 9-1.

PLC instruction set classifications.

line that defines the grouping of PLC ladder instructions, however, is usually drawn between functional instruction categories. These instruction categories include:

• ladder relay

• timing

• counting

• program/flow control

• arithmetic

• data manipulation

• data transfer

• special function (sequencers)

• network communication

Although these categories are straightforward, the classification of them is subjective. For example, some people believe that basic ladder instructions include ladder relay, timing, counting, program/flow control, arithmetic, and some data manipulation. Others believe that only ladder relay, timing, and counting categories should be considered basic ladder instructions.

Regardless of classification, the effects of instruction categories are simple— the more instruction categories a PLC has, the more powerful its control capability becomes. Usually, small PLCs have only basic instructions with, perhaps, some enhanced instructions. Larger PLCs usually have more

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9 advanced instruction sets. However, recent advances in software development and I/O hardware have increased the computational power of small

PLCs through advanced instructions. This new trend has made small PLCs very desirable in single, as well as distributed control, applications.

B

OOLEAN

Some PLC manufacturers use Boolean language, also called Boolean

mnemonics, to program a controller. The Boolean language uses Boolean algebra syntax (see Chapter 3) to enter and explain the control logic. That is, it uses the AND, OR, and NOT logic functions to implement the control circuits in the control program. Figure 9-3 shows a basic Boolean program.

L1

LS1

Hardwired Circuit

SOL1

L2

LS2

PB1

L1

LS1

10

L2

LS2

11

PB1

12

Boolean Program

LD 10

OR 12

AND 11

OUT 40

L1

40 SOL1

L2

Displayed as ladder diagram

10 11 40

12

Figure 9-3.

Hardwired logic circuit and its Boolean representation.

The Boolean language is primarily just a way of entering the control program into a PLC, rather than an actual instruction-oriented language.

When displayed on the programming monitor, the Boolean language is usually viewed as a ladder circuit instead of as the Boolean commands that define the instruction. We will discuss Boolean programming, along with its instruction set, at the end of this chapter.

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G

RAFCET

Grafcet (Graphe Fonctionnel de Commande Étape Transition) is a symbolic, graphic language, which originated in France, that represents the control program as steps or stages in the machine or process. In fact, the English translation of Grafcet means “step transition function charts.” As we will discuss in Chapter 10, Grafcet is the foundation for the IEC 1131 standard’s sequential function charts (SFCs), which allow several PLC languages to be used in one control program.

Figure 9-4 illustrates a simple circuit represented in Grafcet. Note that

Grafcet charts provide a flowchart-like representation of the events that take place in each stage of the control program. These charts use three components—steps, transitions, and actions—to represent events. The IEC 1131 standard’s SFCs also use these components; however, the instructions inside the actions can be programmed using one or more possible languages, including ladder diagrams.

L1

PB1

Hardwired Circuit

CR2

CR1

L2

CR1

CR1

LS2

LS1 M1

CR2

Grafcet

Step

1

1

Transition

If PB1

Action

2 M1 IF LS1

2 LS2

Figure 9-4.

Hardwired logic circuit and its Grafcet representation.

Few programmable controllers may be directly programmed using Grafcet.

However, several Grafcet software manufacturers provide off-line Grafcet programming using a personal computer. Once programmed in the PC, the

Grafcet instructions can be transferred to a PLC via a translator or driver that translates the Grafcet program into a ladder diagram or Boolean language program. Using this method, a Grafcet software manufacturer can provide different PLCs that use the same “language.” Figure 9-5 illustrates a typical translation that occurs when using Grafcet. Chapter 10 provides more detail about the versatility of this type of structural programming.

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9

IF LS1

AND

LS2

PE3

LS4

Software

Translator

LS1 LS2 CR1

PE1 CR1 SOL1

PE2

PE3 LS4 TMR1 M2

M2

PB2

Grafcet PLC Ladder Language

Figure 9-5.

Grafcet translation.

9-3 L

ADDER

D

IAGRAM

F

ORMAT

The ladder diagram language is a symbolic instruction set that is used to create PLC programs. The ladder instruction symbols can be formatted to obtain the desired control logic, which is then entered into memory. Since this type of instruction set consists of contact symbols, it is also referred to as

contact symbology.

A thorough understanding of ladder diagram programming, including functional blocks, is extremely beneficial, even when using a PLC with IEC

1131 programming language capabilities. Because ladder diagrams are easy to use and implement, they provide a powerful programming tool when used in the IEC 1131 environment.

The main functions of a ladder diagram program are to control outputs and perform functional operations based on input conditions. Ladder diagrams use rungs to accomplish this control. Figure 9-6 shows the basic structure of a ladder rung. In general, a rung consists of a set of input conditions

(represented by contact instructions) and an output instruction at the end of the rung (represented by a coil symbol). The contact instructions for a rung may be referred to as input conditions, rung conditions, or the control logic.

L1

Input

Conditions

Output

Instructions

L2

A continuous path is required for logic continuity

Figure 9-6.

Ladder rung structure.

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9

A ladder rung is TRUE (i.e., energizing an output or functional instruction block) when it has logic continuity. Logic continuity exists when power flows through the rung from left to right. The execution of logic events that enable the output provide this continuity. In a ladder rung, the left-most side

(left power line) simulates the L1 line of a relay ladder diagram, while the right-most side (right power line) simulates the L2 line of the electromechanical representation. Continuity occurs when a path between these two lines contains contact elements in a closed condition, allowing power to flow from left to right. These contact elements either close or remain closed according to the status of their reference inputs. Figure 9-7 illustrates several continuous paths that provide continuity and energize the output of the rung. Power continuity is normally represented on a PLC’s monitoring device (e.g., a PC) by bold or emphasized lines, as shown in Figure 9-8a. Figure 9-8b illustrates power continuity through only one energized contact element; note that the output is not ON. We will explain how these contact symbols are interpreted to be ON or OFF in the next section.

Power (continuity)

Power

Power

Power

Figure 9-7.

Illustration of several different continuity paths in a ladder rung.

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10 12 40

11

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9

10 12 40

11

(a) (b)

Figure 9-8.

Monitoring device showing

(a)

power continuity through the rung—inputs 11 and

12 are ON, turning output 40 ON—and

(b)

power continuity through only input

12, thus output 40 is not ON.

When a ladder diagram contains a functional block, contact instructions are used to represent the input conditions that drive (or enable) the block’s logic.

A functional block can have one or more enable inputs that control its operation. In addition, it can have one or more output coils, which signify the status of the function being performed. For example, the block shown in

Figure 9-9a has an enable block line, which when energized (i.e., continuity exists), will activate the block to perform the instruction. Thus, this instruction says: IF the enable is ON because the desired logic has continuity, THEN execute the block instruction. Depending on the instruction, other enable lines

(see Figure 9-9b) may drive the block using reset or other control functions.

Input Conditions Functional Blocks and Outputs

Output

Enable

(a)

Reset

Time Enable

(b)

Enable

Time

Reset

Time = Preset

Figure 9-9.

Functional block instructions with

(a)

one enable line and one output and

(b)

one enable line, a start timing command, and two outputs.

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To make a block active at all times without any driving logic, the user can omit all contact logic and place a continuity line in the block during programming

(see Figure 9-10).

L1 L2

Power Flow

Functional

Block

Intruction

Enable

Line

Output

Left

Power

Line

Figure 9-10.

A functional block instruction that is always enabled.

Right

Power

Line

The ladder rung matrix determines the maximum number of ladder contact elements that can be used to program a rung (see Figure 9-11). The size of this matrix differs among both PLC manufacturers and the programming devices used (CRT screens versus miniprogrammers). For functional block operations, a ladder matrix may have less available ladder contact elements because the functional block instruction display takes up room in

Input Conditions Output

Figure 9-11.

Ladder rung matrix.

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9 the matrix (see Figure 9-12a). In PLCs with enhanced ladder format functional instructions instead of block-type instructions, the ladder matrix may use one or more contact symbol spaces to represent the instruction in the programming device (see Figure 9-12b).

Input Conditions

Block Instruction

Enable

Output

Reset

(a)

Input Conditions

Enhanced

Functional Instruction

Move R10 to R20

Output

(b)

Figure 9-12.

Ladder matrix with

(a)

functional block instructions and

(b)

enhanced ladder format functional instructions.

A ladder matrix represents all the possible locations where a contact symbol instruction can be placed. The programming device usually displays all of these possible locations on the screen, allowing the user to place contact symbols in the desired locations. However, according to the maker of the

PLC, certain rules apply to contact placement. One rule, which is present in almost all PLCs, prevents reverse (i.e., right-to-left) power flow in a ladder rung (see Figure 9-13). PLC logic does not allow reverse power to avoid

sneak paths. Sneak paths occur when power flows in a reverse direction through an undesired field device, thus completing a continuity path. If a

PLC’s logic requires reverse power flow, the user must reprogram the rung with forward power flow to all contact elements. The next example illustrates the solution to the reverse power flow rung in Figure 9-13.

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A B C

D E

Y

F

Figure 9-13.

Reverse power flow at contact D.

E

XAMPLE

9-1

Solve the logic rung shown in Figure 9-13 so that no reverse power flow condition exists. The reverse condition is not part of the required logic for the output to be energized.

A

B

C

D

E

S

OLUTION

The forward power flow of the logic determines output Y. Let’s implement it using logic concepts. The output Y is defined, using forward paths only, as:

4 4 8 4 4 8 678

Y

=

(

A B C

) (

A D E

) (

F E

) which can be minimized, using Boolean algebra’s distributed rule, to

(see Chapter 3):

Y A ( B C D E )

+

( F E )

Figure 9-14 shows the implementation of this logic gate, while Figure

9-15 gives the ladder-equivalent solution.

B • C

D • E

(B • C + D • E)

A • (B • C + D • E)

Y

F

E

F • E

Figure 9-14.

Logic solution for Example 9-1.

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9

A B C

D E

F E

Y

Figure 9-15.

Ladder diagram implementation for Example 9-1.

E

XAMPLE

9-2

Solve the ladder logic shown in Figure 9-13 so that no reverse power flow exists. Assume that the reverse path logic through contact D and then forward through contacts B and C is required in the PLC logic solution to energize the output.

S

OLUTION

Following the same procedure as in Example 9-1, we can obtain the desired logic for output

Y using Boolean logic expressions. Therefore, output Y, including the reverse power flow logic, is represented by:

4 4 8 4 4 8 678 6 7 44

Y

=

( A B C ) ( A D E ) ( F E ) ( F D B C )

A ( B C D E )

+

(

+ • •

)

The term F • D • B • C implements the reverse power flow sequence that output Y requires. Figure 9-16 shows the ladder diagram of this solution.

A B C Y

A

D E

F E

D B C

Figure 9-16.

Ladder diagram implementation for Example 9-2.

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9

9-4 L

ADDER

R

ELAY

I

NSTRUCTIONS

Ladder relay instructions are the most basic instructions in the ladder diagram instruction set. These instructions represent the ON/OFF status of connected inputs and outputs. Ladder relay instructions use two types of symbols: contacts and coils. Contacts represent the input conditions that must be evaluated in a given rung to determine the control of the output. Coils represent a rung’s outputs. Table 9-2 lists common ladder relay instructions.

In a program, each contact and coil has a referenced address number, which identifies what is being evaluated and what is being controlled. The address number references the I/O table location of the connected input/output or the internal or storage bit output. A contact, regardless of whether it represents an input/output connection or an internal output, can be used throughout the control program whenever the condition it represents must be evaluated.

The format of the rung contacts in a PLC program depends on the desired control logic. Contacts may be placed in whatever series, parallel, or series/ parallel configuration is required to control a given output. When logic continuity exists in at least one left-to-right contact path, the rung condition is TRUE; that is, the rung controls the given output. The rung condition is

FALSE if no path has continuity.

( P u r p o s e : T o p r

L

o v

a d d e

i d e

r

h a

R e l a y

r d w i r e

I n s t r u c t i o n s

d r e l a y c a p a b i il t i e s i n a P L C )

S y m b o l I n s t r u c t i o n

E x a m i n e O N / N o r m a l l y

O p e n

F u n c t i o n

T e s t s f o r r e f e r e n c e a n O N a d d r e s s c o n d i t i o n i n a

E x a m i n e O F F / N o r m a

C l o s e d ll y

O

N

L

O a u t t c p

T h u t

O u

O

C t p u t o p u li t u t

C

C o o li li

L

T e s t s f o r r e f e r e n c e a n O F F a d d r e s s c o n d i t i o n i n a

T u r n s w h e n l r e a l o g i c o r i n t e r n a l i s 1 o u t p u t s O N

T

O u r

F F n s w r e a l h e n o r l o g i c i n t e r n a l i s 1 o u t p u t s

K e e p s a n e n e r g i z e d o u t p u t O N o n c e i t i s

U n l a t c h O u t p u t C o li U R e s e t s a l a t c h e d o u t p u t

O n e S h o t O u t p u t

T r a n s i t i o n a l C o n t a c t

OS

E n e r g i z e s a n o u t p u t f o r o n e s c a n o r l e s s t

C l o s e s r i g g e r c f o r o n t a o c t n e m s c a n a k e s a w h e n p o s i t s i t i v e t r a n s i t i o n

Table 9-2.

Ladder relay instructions.

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The relay-type instructions covered in this section are the most basic programmable controller instructions. They provide the same capabilities as hardwired relay logic, but with greater flexibility. These instructions provide the ability to examine the ON/OFF status of specific bit addresses in memory and control the state of internal and external outputs.

E

XAMINE

-ON/N

ORMALLY

O

PEN

An examine-ON instruction, referred to as a normally open (NO) contact instruction, tests for an ON condition in a reference address. This reference address can be an input table bit corresponding to an input device, an output bit in the internal bit storage section of the data table, or an output table bit corresponding to an output device (see Chapter 5 for I/O addressing).

During the execution of an examine-ON instruction in the control program, the processor examines the reference address of the instruction for an ON condition. If the reference address is logic 0 (OFF), the processor will not change the state of the normally open contact; thus, it does not provide continuity to the rung (see Figure 9-17a). However, if the reference address is logic 1 (ON), the processor will close the normally open condition to provide power flow in the rung (see Figure 9-17b).

L1 L2

LS

0210 0210

(a)

(b)

L1

LS

0210

10

0

0 OFF

(no continuity)

L2

02

0210

10

1

1 ON

(continuity)

02

Figure 9-17.

(a)

An examine-ON instruction with a logic 0 reference address and

(b)

an examine-ON instruction with a logic 1 reference address.

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E

XAMINE

-OFF/N

ORMALLY

C

LOSED

An examine-OFF instruction, also called a normally closed (NC) contact instruction, tests for an OFF condition in the reference address. Like an examine-ON instruction, the address can reference the input table, the output table, or the internal bit storage section of the output table.

During the execution of an examine-OFF instruction, the processor examines the reference address for an OFF condition. If the reference address has a logic

0 status (OFF), the instruction will continue to provide power (continuity) through the normally closed contacts (see Figure 9-18a). If the reference address has a logic 1 status (ON), the instruction will open the normally closed contact, thus breaking continuity to the rung (see Figure 9-18b). An examine-

OFF instruction can be associated with a logic NOT function, so that if the reference address is NOT ON, logic continuity will be provided.

L1 L2

LS

0210 0210

(a)

(b)

L1

LS

0210

L2

10

0

0 OFF

(continuity)

02

0210

10

1 02

1 ON

(no continuity)

Figure 9-18.

(a)

An examine-OFF instruction with a logic 0 reference address and

(b)

an examine-OFF instruction with a logic 1 reference address.

O

UTPUT

C

OIL

An output coil instruction controls either a real output (connected to the PLC via output interfaces) or an internal output (control relay). This instruction uses an output coil address bit in the internal storage area as its reference address. The —( )— symbol may also represent an output coil instruction.

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During the execution of an output coil instruction, the processor evaluates all the input conditions in the ladder rung. If no continuity exists, the processor places a 0 in the output coil address bit, indicating an OFF condition to the output coil instruction (see Figure 9-19a). However, if the processor detects continuity in any path, the processor places a logic 1 in the output coil address bit referenced by the instruction (see Figure 9-19b). This logic 1 status indicates an ON condition to the output coil instruction. Therefore, if the output coil address references an output bit in the output table, the processor will turn ON the corresponding output. This will turn ON the field device connected to the terminal referenced by the output coil address. Remember that the processor turns ON the device only after it has completely solved

(scanned) the ladder program and updated the output at the end of the scan.

0310

L1

0310 PL

L2

(a)

0310

10

0

0 OFF

(Output OFF)

L1

03

0310 PL

L2

(b)

10

1 03

1 ON

(Output ON)

Figure 9-19. (a)

An output coil instruction with a logic 0 reference address and

(b)

an output coil instruction with a logic 1 reference address.

When an output coil is used as an internal output, its coil address maps an internal bit storage address, rather than an output table bit that maps a real field device. In this case, when the output coil is turned ON, the corresponding bit in the internal bit storage area becomes logic 1. These internal outputs are used when a program requires interlocking sequences or when a real output is not necessary.

Normally open and normally closed reference contacts for an output coil open and close according to the status of the output coil. Figure 9-20 illustrates an example of a simple ladder diagram with normally open and

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9 normally closed contacts driving an output rung. For output 20 to turn ON, two things must happen: (1) PB1 must be pushed to turn ON reference input

10 and (2) limit switch LS1 must not be activated to keep reference input 11

OFF. In this case, the processor examines input 10 for an ON condition and input 11 for an OFF condition; if both logic conditions are met, it energizes output 20. With output 20 ON, the normally open contact 20 will close, turning internal output 100 ON. Also, the normally closed contact 20 will open because the test for an OFF condition at output 20 is not true (reference

20 is ON); therefore, it will turn internal output 101 OFF. At the EOS, the pilot light (PL1) will be lit because the processor will send a 1 to the output module, which will latch the logic 1 signal until continuity in the rung (output 20) is disrupted. Note that outputs 100 and 101 do not control real output devices because they reference internal bits that are not mapped to the I/O table.

L1 L2 L1 L2

PL1

PB1

10 11 20

10 20

20 100

LS1

11

20 101

Figure 9-20.

Normally open and normally closed contacts driving real and internal output coils.

NOT O

UTPUT

C

OIL

A NOT output coil instruction (recall the NOT logic function) is essentially the opposite of an output coil instruction. If continuity is not present in the rung, the instruction turns the referenced output bit ON. If continuity is present, it turns the output OFF. Also, when a NOT output coil is ON, its reference contacts change state (normally open contacts close, normally closed ones open). If a NOT output coil is OFF, then the opposite occurs— the normally open reference contacts stay open and the normally closed ones remain closed. The

—( / )— symbol represents the NOT output coil in some programmable controllers.

A NOT output coil instruction can be tricky to implement. Therefore, it is often easier to obtain a NOT output coil ladder rung by applying Boolean logic rules to the logic expression of the output rung. An example of this rung configuration follows.

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9

E

XAMPLE

9-3

(a)

Implement the equivalent ladder rung logic shown in Figure 9-21 using a NOT output coil instruction, and

(b)

implement the NOT

Y logic without using a NOT coil.

A B Y

C

Figure 9-21.

Ladder rung for Example 9-3.

S

OLUTION

(a)

The ladder logic expression representing output Y is:

Y

=

( A

+

C )

B

Using De Morgan’s Law (see Chapter 3), the NOT Y function can be expressed as:

Y

=

( A

+

C )

B

=

( A

+

C )

+

B

=

( A

C )

+

B

Figure 9-22 shows the implementation of this logic using a NOT output coil. Output

Y will be ON if A and B are ON or if C and B are ON (note that A, B, and C are examine-OFF instructions). Remember that the

NOT output is ON if continuity does not exist and OFF if continuity is present. The circuit shown in Figure 9-22 is logically identical to the one in Figure 9-21.

A C Y

B

Figure 9-22.

Implementation of Figure 9-21 using a NOT coil.

(b)

The easiest way to implement a logic NOT function in the rung in

Figure 9-21 would be to use the same rung, except that the output Y

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9 would be a NOT coil. If we cannot use a NOT coil, then we can implement the NOT by adding another rung as shown in Figure 9-23. Here, output

Z is essentially the implementation of the NOT output Y coil.

A B Y

Y = (A +C) • B

C

Y Z

Z = Y

Figure 9-23.

Implementation of the NOT Y logic without a NOT coil.

L

ATCH

O

UTPUT

C

OIL

L

A latch coil instruction causes an output to remain energized even if the status of the contacts that caused the output to energize changes. If any rung path has logic continuity, this instruction turns the output ON and keeps it

ON, even if logic continuity or system power is lost. The latched output will remain ON until it is unlatched by an unlatch output instruction. An unlatch instruction is the only automatic (programmed) way to reset a latched output.

Although most PLCs allow latching of internal and external outputs, some controllers will latch internal outputs only. A latch output coil instruction may also be referred to as a set coil instruction, which can be unlatched by a reset

coil instruction.

U

NLATCH

O

UTPUT

C

OIL

U

An unlatch coil instruction resets a latched output with the same reference address. When any rung path has logic continuity, this instruction turns OFF the latched reference address coil, or rather unlatches it to an OFF condition.

Figure 9-24 illustrates the use of latch and unlatch coils.

10 100

L

11 100

U

Figure 9-24.

Latch and unlatch coil instructions.

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Latch and unlatch instructions may occur in block form as shown in Figure

9-25. The only difference between the ladder and block forms is that, in block form, latching and unlatching are performed in the same instruction. If the unlatch input is ON (continuity), the output coil will remain OFF. Note that the latch and unlatch outputs in Figure 9-24 can have ladder logic rungs in between them, while the ones shown in Figure 9-25 cannot. A latch/unlatch block may also be called a set/reset block.

L/U Block

Latch Out

Output

Unlatch

Figure 9-25.

Latch/unlatch functional block instruction.

O

NE

-S

HOT

O

UTPUT

OS

A one-shot output instruction operates in a manner similar to an output coil instruction—if the ladder rung has continuity, the one-shot output will be energized (ON). However, the length of time that a one-shot output is ON is one scan or less, depending on where it is located in the program.

One-shot outputs are used to reset conditions in one scan. Note that when using a one-shot output to reset other output rungs or functional blocks, the logic to be reset must be programmed after the one-shot rung is programmed.

Figure 9-26 illustrates a one-shot output and its timing diagram.

A

Scan 1 2 3 4 5 6 7 8 9

A Y

OS

Y

OS

One

Scan

Leading

Edge

Y

OS

One

Scan

(b) (a)

Figure 9-26.

(a)

A one-shot output instruction and

(b)

its timing diagram.

Trailing

Edge

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Depending on the controller used, a one-shot output may trigger a leadingedge or a trailing-edge signal. A leading-edge trigger turns the one-shot output ON for one scan after the OFF-to-ON transition of the input. A trailing-edge trigger turns the output ON for one scan after the ON-to-OFF transition of the input.

T

RANSITIONAL

C

ONTACT

A transitional contact instruction provides a one-shot pulse when its referenced trigger signal makes either an OFF-to-ON (leading-edge) transition or an ON-to-OFF (trailing-edge) transition. In a leading-edge transitional instruction, the contact will close for exactly one program scan whenever the trigger signal goes from OFF to ON. The contact will allow logic continuity for that one scan and then open again, even though the triggering signal may stay ON. The triggering signal must turn OFF and ON again for the transitional contact to reclose. Conversely, in a trailing-edge transitional instruction, an OFF-to-ON transition of the trigger signal turns the contact

ON for one scan. The contact address (trigger) may be an external input/ output or an internal output.

Programmable controllers that do not provide one-shot output instructions generally provide transitional contact instructions. Like a one-shot output, a transitional contact is used to reset conditions in one scan, for example, to reset a latched coil (i.e., unlatch it). Figure 9-27 shows circuit applications for both leading-edge and trailing-edge transitional contacts, along with their respective timing diagram.

Input A

A

A Y

Leading Edge

Y

A Z

A

Trailing Edge

Z

One

Scan

Figure 9-27.

Leading- and trailing-edge transitional contact instructions and their timing diagrams.

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9-5 L

ADDER

R

ELAY

P

ROGRAMMING

L

ADDER

S

CAN

E

VALUATION

Scan evaluation is an important concept, since it defines the order in which the processor executes a ladder diagram. The processor starts solving a ladder program after it has read the status of all inputs and stored this information in the input table. The solution starts at the top of the ladder program, beginning with the first rung and proceeding one rung at a time. As the processor solves the control program, it examines the reference address of each programmed instruction, so that it can assess logic continuity for the rung being solved.

Even if the output conditions in the rung being solved affect previous rungs, the processor will not return to the previous rung to resolve it.

To make this clearer, let’s examine the diagram in Figure 9-28, which illustrates four simple rungs. The normally open contact 10, which we will assume corresponds to a push button, activates the first rung. If contact 10 turns ON, it will turn output 100 ON. In the next rungs, contact 100 will turn output 101 ON, contact 101 will turn output 102 ON, and contact 102 will turn output 103 ON. Even though they are connected to different rungs, all of these outputs turn ON in the same scan, because the processor updates the real output devices connected to the modules when it finishes the program scan. In this case, if outputs 100, 101, 102, and 103 were connected to pilot lights, they would all turn ON at the same time.

Scan 1 2 3 4 5 6 7

10 100

10

100 101

100

101 102

101

102 103

102

103

Figure 9-28.

Ladder rung where all outputs turn ON in the same scan.

Figure 9-29 illustrates the same ladder logic as in Figure 9-28 but with the placement of rungs reversed. Assuming that input 10 is pushed in the first scan, the processor must make four scans before it energizes output 103. The logic the processor uses in the first scan is as follows: (1) When input 10 is pushed, the processor examines reference 102 and finds it OFF (logic 0);

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9 therefore, output 103 stays OFF. (2) In the second rung, contact 101 is OFF; therefore, output 102 remains OFF. (3) In the third rung, contact 100 is OFF, so output 101 remains OFF. (4) In the fourth rung, contact 10 is ON because the push button is pushed, so output 100 turns ON. In the next scan (second), if the push button remains ON, output 101 will turn ON because, at the end of the first scan, the reference address 100 was set to logic 1. This logic will continue until the fourth scan, when all four outputs will be ON. The outputs will turn OFF in the same way once the push button is released.

Scan 1 2 3 4 5 6 7

10

102 103

103

101 102

102

100 101

101

10 100

100

Figure 9-29.

Ladder rung where the outputs turn ON in different scans.

The physical operation of a circuit like the one in Figure 9-29 is almost impossible to observe while a PLC is running the control program because a

PLC completes its scan in milliseconds. All the pilot lights would seem to come ON at the same time, even if they actually came on in different scans.

The only way to observe the ladder outputs would be to use single-scan PLC operation. With single-scan operation, the processor reads the inputs, executes the logic, updates the outputs, and stops until another single scan is executed. Single-scan operation is generally used during the testing of a control program.

The important thing to remember about a ladder program is that for an output to have an effect on another rung in the same scan, it must be programmed before that rung. If it is not, order of execution problems can arise, especially when using transitional contacts and one-shot outputs to reset and unlatch other rungs. Figure 9-30 illustrates this type of programming order problem, where the output unlatch instruction will never occur. Once contact 10 closes, latching output 100, only the closing of contact 11 will unlatch the output.

When contact 12 closes, it triggers the one-shot output 11 (or the transitional contact 12) for one scan. However, at the end of the scan, the one-shot output turns OFF, so it is not able to unlatch coil 100 in the next scan.

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9

10

11

12

100

L

100

U

11

OS

10

11

12

100

L

100

U

11

(a) (b)

Figure 9-30. (a)

The one-shot output and

(b)

the transitional contact will never unlatch coil 100.

P

ROGRAMMING

N

ORMALLY

C

LOSED

I

NPUTS

So far in our discussion, we have tried to avoid presenting input device connections that are in the normally closed condition. The reason for this is simple—we did not want to confuse you. Understanding how to program a normally closed input device is a difficult concept to comprehend at first.

Once you learn it, try explaining it to someone else and watch their reaction.

To explain how to program normally closed inputs, let’s look at the following example. Suppose we want to implement logic identical to the simple hardwired circuit shown in Figure 9-31. Implementing the same logic means that the pilot light PL1 in the PLC should behave in the same manner as the one in the hardwired circuit—if PB1 is not pushed, PL1 will be ON; if

PB1 is pushed, PL1 will be OFF. Figures 9-32 and 9-33 show two possible methods for programming PB1 and implementing the logic. At first glance, you may think that the solution in Figure 9-32 is the answer, but that is not true; Figure 9-33 is the correct implementation.

L1 L2

PL1

PB1

L1

PB1

10

L2

Figure 9-31.

Hardwired logic.

L1

10 100

100

PL1

L2

Figure 9-32.

Logic implementation with PB1 programmed as a normally closed contact.

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L1

PB1

10

L2

10 100

L1

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9

PL1

L2

100

Figure 9-33.

Logic implementation with PB1 programmed as a normally open contact.

In Figure 9-32, the reference address of PB1 (input 10) is programmed as a normally closed contact (examine OFF) that drives output coil 100, which is connected to pilot light PL1. When the PLC starts, it reads the status of the input device connected to input 10 and stores this data in the input table. If

PB1 is not pushed (see Figure 9-34a), the processor reads input 10 as logic 1

(power flowing to the module). During the execution of the ladder logic, the

PLC will evaluate the examine-OFF instruction, and since the reference

(input 10) is ON, it will open the normally closed contact, disrupting continuity. Thus, output 100 will be OFF, and PL1 will not turn ON.

Conversely, if PB1 is pushed (see Figure 9-34b), the input module at location

10 will be logic 0 (power not flowing to the module). The processor’s examination for an OFF condition at reference 10 will then be TRUE; therefore, the instruction will provide continuity to the rung and turn output

100 and PL1 ON.

L1 L2 L1

100 PL1

L2

PB1

10

10 100

(a)

ON

(b)

L1

PB1

Pushed

10

L2

10 100

L1

100 PL1

L2

OFF

Figure 9-34.

Power flow through the circuit shown in Figure 9-32 with

(a)

PB1 not pushed and

(b)

PB1 pushed.

In Figure 9-33, the normally closed input condition has been programmed as an examine-ON instruction. During operation (see Figure 9-35a), if PB1 is not pushed, the input module 10 will read an ON status. When the processor evaluates the ladder rung, its examination for an ON condition at reference 10 will be TRUE. Therefore, contact 10 will close to provide power to the rung, turning output 100 and PL1 ON. On the other hand, if PB1 is pushed (see

Figure 9-35b), the input will have an OFF status and the processor will store a logic 0 in the input table. During the evaluation of the rung, the processor will find its examination for an ON condition at reference 10 to be FALSE

(input 10 is OFF), and continuity will not occur because the contacts will remain open. Thus, output 100 and PL1 will be OFF.

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(a)

L1

PB1

10

L2

ON

(b)

L1

PB1

Pushed

10

OFF

L2

10

10

100

100

L1

100

L1

100

PL1

L2

PL1

L2

Figure 9-35.

Power flow through the circuit shown in Figure 9-33 with

(a)

PB1 not pushed and

(b)

PB1 pushed.

The programming solution for a normally closed input connection, as shown in Figure 9-33, exemplifies the following: for a normally closed wired input device to behave as a normally closed device when connected, it must be programmed as an examine-ON, or normally open, contact instruction.

Discrete inputs to a PLC can be made to act as normally open or normally closed contacts, regardless of their original configuration. This ability to examine a single device for either an open or closed state is the key to the flexibility of PLCs—no matter how a device is wired (normally open or normally closed), the controller can be programmed to perform the desired action without changing the wiring. Remember that the programming state of an input depends not only on how it is wired, but also on the desired control action. The following example shows a case in which the PLC programming of one push button with two contacts differs depending on which contact is wired to the module.

E

XAMPLE

9-4

Show the PLC implementation of the hardwired logic shown in Figure

9-36 for the following scenarios using only one push button connection:

(a)

with the normally open contact connected to the input module and

(b)

with the normally closed contact connected to the input module. Describe the operation of each implementation as well.

Use input address 10 for the push button and addresses 30 and 31 for pilot lights PL1 and PL2, respectively. Indicate the lights in the ON condition (without PB1 being pushed) using a shaded PL indicator.

S

OLUTION

Examining the circuit in Figure 9-36 shows that, if PB1 is not pushed,

PL1 should be OFF. PL2 should be ON because the other contact of

PB1 (the normally closed one) provides power to PL2. We can wire any

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PB1

A

PL1

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L2

PL2

B

Hardwired Logic

Figure 9-36.

Hardwired logic for Example 9-4.

of PB1’s two connections (A or B) to the input module to satisfy the required logic. Remember that we can make any contact act as we desire in the PLC program (i.e., as a normally open or normally closed contact).

(a)

Figure 9-37 shows the solution for the normally open contact connection. An examine-ON instruction drives PL1, and an examine-

OFF instruction drives PL2. When PB1 contact A is not pushed, PL1 is

OFF and PL2 is ON. The first rung implements a push button wired as normally open to act as a normally open push button, while the second rung implements a push button wired as normally open to act as a normally closed push button.

L1 L2 L1 L2

PB1

A

10

10

A

30

30

PL1

B

Not wired to

PLC input

10

B

31

31

PL2

Figure 9-37.

Normally open implementation of Figure 9-36.

(b)

Figure 9-38 shows the circuit solution for the normally closed contact connection. In this solution, an examine-OFF instruction drives

PL1. During operation, PB1 contact B provides power to the module if it is not pushed; therefore, the reference address (10) is logic 1. The normally closed contact with address 10 will be open as long as PB1 is not depressed, keeping PL1 (output 30) OFF. In the second rung, an examine-ON instruction drives the output for PL2 (31), which is

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9 closed as long as PB1 is not pushed. The first rung implements a push button wired as normally closed to act as a normally open push button, while the second rung implements a push button wired as normally closed to act as a normally closed push button.

L1 L2 L1

PB1

A

L2

Not wired to PLC input

10

A

30

30

PL1

PL2

B

10

10

B

31

31

Figure 9-38.

Normally closed implementation of Figure 9-36.

As illustrated in the previous example, a normally open input can be programmed in a PLC to behave like a normally closed device and vice versa. However, for fail-safe reasons, normally closed input devices should be wired to the input module as normally closed devices and then programmed as examine-ON instructions, so that they behave like normally closed devices. A wired normally open device must not be programmed to act as a normally closed device, especially if it is being used to interrupt continuity when a device is pushed or closed.

Figure 9-39a shows an example of a normally closed stop push button used to stop the power to a motor. During operation, when the start PB has been pressed and sealed by the internal motor contact (100), the motor turns ON

(see Figure 9-39b). The normally closed stop PB interrupts the power continuity to the motor output coil contact. The pressing of this stop push button is the only way the motor can be stopped (see Figure 9-39c). However, if the wire connection for the stop PB is accidentally cut, the motor circuit will disengage (see Figure 9-39d).

This same logic operation can also be achieved using a normally open stop

PB instead of a normally closed one and implementing it as a normally closed circuit in the PLC program (see Figure 9-40a). When the start button is pushed, the motor turns ON (see Figure 9-40b); if the stop PB is pressed, the motor turns OFF (see Figure 9-40c). However, there is no way to stop the motor from running if the normally open stop PB wire is cut (see Figure 9-

40d). The programmed examine-OFF instruction corresponding to the stop

PB will never disrupt continuity in this situation. The only way to stop the motor is to shut down power to the whole PLC system. This type of PLC system configuration is dangerous and should be avoided at all times.

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Start

Stop

10

11

10

100

11 100

100 Motor

M

(a)

The normally closed stop push button is programmed as normally open. Contact

100 is used as an interlock with the start push button after the start is pushed.

When the start push button is pressed, the motor turns ON.

Start 100

10

10 11 100

Motor

M

Stop

11 100

(b)

After the start push button is pressed and released, the motor remains ON.

Start

Stop

10

11

10

100

11 100

100 Motor

M

(c)

If the stop push button is pressed when the motor is ON, the motor will turn OFF.

Start

Stop

10

11

10

100

11 100

100 Motor

M

(d)

If the stop push button connection breaks when the motor is ON, the motor will turn OFF.

Figure 9-39.

Normally closed stop push button programmed as normally open.

Start

Stop

10

11

10

100

11 100

100 Motor

M

(a)

The normally open stop push button is programmed as normally closed. When the start push button is pressed, the motor turns ON.

Start

10 10 11 100

100 Motor

M

Stop

11 100

(b)

After the start push button is pressed and released, the motor remains ON.

Start

10 10 11 100

100 Motor

M

Stop

11 100

(c)

If the stop push button is pressed when the motor is ON, the motor will turn OFF.

Start

Stop

10

11

10

100

11 100

100 Motor

M

(d)

If the stop push button connection breaks when the motor is ON, pressing the stop push button will not turn the motor OFF. This is a dangerous situation.

Figure 9-40.

Normally open stop push button programmed as normally closed.

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9-6 T

IMERS AND

C

OUNTERS

PLC timers and counters are internal instructions that provide the same functions as hardware timers and counters. They activate or deactivate a device after a time interval has expired or a count has reached a preset value.

Timer and counter instructions are generally considered internal outputs.

Like relay-type instructions, timer and counter instructions are fundamental to the ladder diagram instruction set.

Timer instructions may have one or more time bases (TB) which they use to time an event. The time base is the resolution, or accuracy, of the timer. For instance, if a timer must time a 10 second event, the user must choose the number of times the time base must be counted to get to 10 seconds.

Therefore, if the timer has a time base of 1 second, then the timer must count ten times before it activates its output. This number of counts is referred to as

ticks. The most common time bases are 0.01 sec, 0.1 sec, and 1 sec. Table 9-

3 shows the number of ticks required for a 10 second count, based on different time bases.

R e q u i r

1 0

1 0

1 0

e d T

s e c s e c s e c

i m e N u m b e r o f T i c k s

1 0

1 0 0

1 0 0 0

N o t e : R e q u i r e d t i m e = ( # o f t i c k s ) ( T i m e b a s e )

Table 9-3.

Time bases.

T i m e B a s e ( s e c s )

1 .

0 0

0 .

1 0

0 .

0 1

Timers are used in applications to add a specific amount of delay to an output in the program. Applications of PLC timers are innumerable, since they have completely replaced hardware timers in automated control systems. As an example, timers may be used to introduce a 0.01 second delay in a control program. The program may require such a delay because the PLC turns ON its outputs very quickly as compared to the hardwired relay system it is replacing. This small delay will slow down the response of other components so that proper operation occurs.

Counter instructions are used to count events, such as parts passing on a conveyor, the number of times a solenoid is turned ON, etc. Counters, along with timers, must have two values, a preset value and an accumulated value.

These values are stored in register or word locations in the data table. The preset value is the target number of ticks or counting numbers that must be achieved before the timer or counter turns its output ON. The accumulated value is the current number of ticks (timer) or counts (counter) that have elapsed during the timer or counter operation. The preset value is stored in a

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9 preset register, while the accumulated value is kept in an accumulated register. Both of these registers are defined during the programming of the instruction. Either the basic ladder format or the block instruction format can be used to implement timers and counters.

E

XAMPLE

9-5

During a machine modernization project, it is found that part of a relay ladder circuit (see Figure 9-41), when translated into a PLC circuit, does not work correctly. This malfunction is due to the fact that in the hardwired circuit, relay CR5, which is driven by device LS4, had enough delay time to synchronize with the rest of the circuit so that the solenoid actuation was correct. Now that it has been implemented in the PLC, CR5 no longer has this delay. The delay needed is estimated at 3 AC cycles (60 Hz) and the time bases available in the PLC are 0.01,

0.1, and 1 sec. Which time base should be used to create the delay and how many ticks must the delay last?

10 TON 100

Preset Register:

Accumulated Register:

Reg 1000 = 50

Reg 1001 = xx

Time Base: 0.1 sec

100 10

Timer output 100 is energized

5 seconds after contact 10 closes.

Figure 9-41.

Example relay ladder circuit.

S

OLUTION

The estimated delay of 3 AC cycles translates into 60 Hz (i.e., 60 cycles/sec). So:

1

1 cycle =

60

=

16 .

66 msec

3

3 cycles =

60

=

50 .

00 msec

Thus, the required delay is 50 msec. Therefore, the only time base small enough to use is 0.01 sec. Using this time base, the timer must count 5 ticks to create the delay.

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9-7 T

IMER

I

NSTRUCTIONS

PLCs provide several types of timer instructions. However, PLC manufacturers may provide different definitions for each type of timer function offered. Table 9-4 presents a list of typical timer instructions.

( P u r p o s e : T o p r o v i d

T i m e r

e h a r d

I n s t r u c t i o n s

w a r e t i m e r c a p a b i il t i e s i n a P L C )

I n s t r u c t i o n S y m b o l

TON

F u n c t i o n

O N D e l a y

T i m e r

E n e r g i z e E n e r g i z e s p e r i o d w h e a n n o u t p u l o g i c 1 t a f t e r e x i a s e t t i m e s t s

TON

O N D e l a y

T i m e r

D e e n e r g i z e t

D e e n i m e p e r g i e r i o z d e s a n w h e n o u t p u t l o g i c 1 a f t e r e x i s a t s s e t

TOF

O F F D e l a y

T i m e r

E n e r g i z e E n e r g p e r i o d i z e s a n w h e n o u p l o g i c u t

0 a f t e r a e x i s t s s e t t i m e

TOF

O F F D e l a y

T i m e r

D e e n e r g i z e t

D e e n i m e p e r g i e r i o z d e s a n w h e n o u t p u t l o g i c 0 a f t e r e x i s a t s s e t

RTO

R e t e n t i v e

T i m e r

O N D e l a y

E n e r g i z e s a n o u t p u t a f t e r a s e t t i m e p e r i o d r e t a i n s w h e n t h e a l o c c g i c 1 e x i s u m u l a t e d t s a n d v a l u e t h e n

RTR

R e t e n t i v e T i m e r R e s e t

R e s e t s r e t e n t i v t e h e a c c u m u l a t e d t i m e r v a l u e o f a

Table 9-4.

Timer instructions.

The function of the various timer instructions is essentially the same, differing only in the type of output provided. Figure 9-42 illustrates the two formats used for timers. A block format timer has one or two inputs, depending on the programmable controller. These inputs are called the control line and the

Control

TMR

Preset

Register

Output 1

Enable/Reset

Time Base

Accumulated

Register

Output 2

Control

TMR

Preset Reg

Accumulated Reg

Time Base

(a) (b)

Figure 9-42.

(a)

Block format and

(b)

ladder format timer instructions.

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enable/reset line. If the control line is TRUE (i.e., it has continuity) and the enable line is also TRUE, the block function will start timing. A ladder format timer generally has only one input, which is the control line. If the control line is ON, the timer will start timing.

Common to both timer formats is the use of a preset register to hold the preset value and an accumulated register to store the accumulated value.

Some PLCs allow the user to enter a constant value directly into the timer to set the preset value. This particular value, however, must be entered into a predefined register for that specific timer address.

A timer’s time base is selectable depending on the PLC used (e.g., 0.01 sec,

0.1 sec, 1.0 sec, etc.). When the accumulated tick count equals the preset count, the timer executes its timing function and sets the output condition, which depends on the type of timer used (e.g., ON-delay energize, etc.).

It is important to note that when PLC timers replace hardwired timers, they replace the time-delay contacts associated with the timers, but not the instantaneous contacts that may be available from a hardwired timer. Figure

9-43 illustrates an example showing both time-delay and instantaneous

L1 L2

PB1

PS1

TMR1

3 sec

TMR1-1

FS1

TS1

SOL1

CR1

SOL2

TMR1-2 CR1 LS1

CR1

CR2

TMR2

CR3

2 sec

SOL3

TMR2-1 PS2 CR3

Figure 9-43.

Hardwired circuit with time-delay and instantaneous contacts.

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9 hardwired timer contacts. Timer TMR1 in line 1 has an instantaneous contact in line 2 (TMR1-1), which is used to seal PB1, and a time-delay contact (TMR1-2) in line 5. For this type of ladder logic translation into a

PLC program, the user must “trap” the timer through interlocking, so that the instantaneous timer seal can be accomplished. Chapter 11 presents this type of programming example.

TON

ON-D

ELAY

E

NERGIZE

T

IMER

An ON-delay energize timer (TON) output instruction either provides timedelayed action or measures the duration for which some event occurs. Once the rung has continuity, the timer begins counting time-based intervals (ticks) and counts down until the accumulated time equals the preset time. When these two values are equal, the timer energizes the output and closes the timedout contact associated with the output (see Figure 9-44). The timed contact can be used throughout the program as either a normally open or normally closed contact. If logic continuity is lost before the timer times out, the timer resets the accumulated register to zero.

10 TON 100

Preset Register: Reg 1000 = 50

Accumulated Register: Reg 1001 = xx

Time Base: 0.1 sec

100 10

Timer output 100 is energized

5 seconds after contact 10 closes.

Figure 9-44.

ON-delay energize timer instruction.

TON

ON-D

ELAY

D

E

-E

NERGIZE

T

IMER

An

ON-delay de-energize timer (TON) instruction operates in a manner similar to an ON-delay energize timer instruction, except that the timer’s output is already ON. This instruction de-energizes the output once the rung has continuity and the time interval has elapsed (accumulated register value

= preset register value). PLC manufacturers provide either ON-delay energize or ON-delay de-energize timers, since it is easy to program one from the other. Figure 9-45 illustrates a timing diagram for both types of ON-delay timer instructions.

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9

(a)

1

Timer’s Control Input 0

1

ON-Delay Energize 0

(b)

1

ON-Delay De-energize 0

Delay

Figure 9-45.

Timing diagram for

(a)

an ON-delay energize timer and

(b)

an ON-delay de-energize timer.

TOF

OFF-D

ELAY

E

NERGIZE

T

IMER

An OFF-delay energize timer (TOF) output instruction provides timedelayed action. If the control line rung does not have continuity, the timer begins counting time-based intervals until the accumulated time value equals the programmed preset value. When these values are equal, the timer energizes the output and closes the timed-out contact associated with the output (see

Figure 9-46). The timed contact can be used throughout the program as either a normally open or normally closed contact. If logic continuity occurs before the timer times out, the accumulated value resets to zero.

10 TOF 100

Preset Register:

Accumulated Register:

Time Base:

Reg 1000 = 50

Reg 1001 = xx

0.1 sec

100 10

Timer output 100 is turned ON

5 seconds after contact 10 opens.

Figure 9-46.

OFF-delay energize timer instruction.

TOF

OFF-D

ELAY

D

E

-E

NERGIZE

T

IMER

An OFF-delay de-energize timer (TOF) instruction is similar to its OFF-delay energize counterpart; however, this timer’s output is ON and will be deenergized once the rung loses continuity and the time interval has elapsed

(accumulated register value = preset register value). Like ON-delay timers,

PLC manufacturers usually provide either OFF-delay energize or de-energize timers. Figure 9-47 shows timing diagrams for both types of OFF-delay timers.

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Programming

Languages

C

HAPTER

9

(a)

1

Timer’s Control Input 0

1

OFF-Delay Energize 0

(b)

1

OFF-Delay De-energize 0

Delay

Figure 9-47.

Timing diagram for

(a)

an OFF-delay energize timer and

(b)

an OFF-delay de-energize timer.

RTO

R

ETENTIVE

ON-D

ELAY

T

IMER

A retentive ON-delay timer (RTO) output instruction is used if the timer’s accumulated value must be retained even if logic continuity or system power is lost. If any rung path has logic continuity, the timer begins counting timebased intervals until the accumulated time equals the preset value. The accumulated register retains this accumulated value, even if power or logic continuity is lost before the timer has timed out. When the accumulated time equals the preset time, the timer energizes the output and turns ON (closes) the timed-out contact associated with the output. Again, these timer contacts can be used throughout the program as normally open or normally closed contacts. A retentive timer reset instruction resets a retentive timer’s accumulated value.

RTR

R

ETENTIVE

T

IMER

R

ESET

A retentive timer reset (RTR) output instruction is the only way to automatically reset the accumulated value of a retentive timer. If any rung path has logic continuity, then this instruction resets the accumulated value of its referenced retentive timer to zero. Note that the retentive timer reset address will be the same as the retentive timer output instruction it is resetting.

9-8 C

OUNTER

I

NSTRUCTIONS

There are two basic types of counters: those that can count up and those that can count down. Depending on the controller, the format of these counters may vary. Some PLCs use the ladder format (output coil), while others use functional block format. Figure 9-48 illustrates these two formats, while

Table 9-5 presents common counter instructions.

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Up

(a)

Down

Reset

Programming

Languages

C

HAPTER

9

CTR

Preset

Register

Output 1

Accumulated

Register

Output 2

Count = Preset

Count > Preset

(b)

CTU

Preset Reg

Accumulated Reg

Up Counter

CTD

Preset Reg

Accumulated Reg

Down Counter

CTR

Reset Counter

Figure 9-48. (a)

Block format and

(b)

ladder format counter instructions.

U

C p

D o o u

I n s t r u c t i o n

C w n n t o u

C e r o

( P u r p o s e : T o p r o v i d

C o u n t e r

e

I n

h a r d w a r e

s t r u c t i o

c o u n t e r

n s

c a p a b i il t i e s i n a P L C ) n t e u

R r n e t s e e t r

S y m

CTU

CTD

CTR

b o l F u n c t i o n

I n c v a l r e a u e s e s e v e r y t h e a t i m e c c a u m u l r e f e r a t e d e n c r e d e g i e v s t e r e n t o c c u r s

D e c v a l r u e e a s e s e v e r y t h e a t i m e c a c u m r e f u l a t e d e r e n c r e d e g e i s v e t e r n t o c c u r s

R e s e t s u p o r d t h e o w n a c c u m u l a t e d c o u n t e r v a l u e o f a n

Table 9-5.

Counter instructions.

CTU

U

P

C

OUNTER

An

up counter (CTU) output instruction adds a count, in increments of one, every time its referenced event occurs. In a control application, this counter turns a device ON or OFF after reaching a certain count (i.e., the preset value

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9 in the preset register). Also, this counter can keep track of the number of parts

(e.g., filled bottles, machined parts, etc.) that pass a certain point. An up counter increases its accumulated value (the count value in its accumulated register) each time the up-count event makes an OFF-to-ON transition. When the accumulated value reaches the preset value, the counter turns ON the output, finishes the count, and closes the contact associated with the referenced output. After the counter reaches the preset value, it either resets its accumulated register to zero or continues its count for each OFF-to-ON transition, depending on the controller. In the latter case, a reset instruction is used to clear the accumulated value.

CTD

D

OWN

C

OUNTER

A down counter (CTD) output instruction decreases the count value in its accumulated register by one every time a certain event occurs. In practical use, a down counter is used in conjunction with an up counter to form an up/

down counter, given that both counters have the same reference registers.

In an up/down counter, the down counter provides a way to correct data that is input by the up counter. For example, while an up counter counts the number of filled bottles that pass a certain point, a down counter with the same reference address can subtract one from the accumulated count value every time it senses an empty or improperly filled bottle. Depending on the programmable controller, the down counter will either stop counting down at zero or at a specified maximum negative value. In a block format instruction, a down count occurs every time the down input of the counter transitions from OFF to ON.

CTR

C

OUNTER

R

ESET

A counter reset (CTR) output instruction resets up counter and down counter accumulated values to zero. When programmed, a counter reset coil has the same reference address as the corresponding up/down counter coils. If the counter reset rung condition is TRUE, the reset instruction will clear the referenced address. The reset line in a block format counter instruction sets the accumulated count to zero (accumulated register = 0). Figure 9-49 illustrates a typical block-formatted counter rung with up, down, and reset counter instructions. The counter will count up when contact 10 closes, count down when contact 11 closes, and reset register 1003 to 0 when contact 12 closes. If the count is equal to 15 as a result of either an up or down count, output 100 will be ON. If the contents of register 1003 are greater than 15, output 101 will be ON. Output 102 will be ON if the accumulated count value is less than 15.

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10

11

12

100

Programming

Languages

C

HAPTER

9

Reset

101

CTR

Up

Down

PR: 1002 = 15

AR: 1003 = xx

Output 1

100

Count = Preset

Output 2

101

Count > Preset

102

Count < Preset

Figure 9-49.

Counter function block with up, down, and reset counter instructions.

E

XAMPLE

9-6

Figure 9-50 illustrates a block counter instruction being used to count parts as detected by a photoelectric eye (PE) input. The preset value of counts is 500. Modify this circuit so that it will automatically reset every time the counter reaches 500. Also, add the instructions necessary to implement an output coil that indicates that the count has reached 500.

L1

PE

10

L2

10

Up

CTR

=

100

L1

100

PL

(Count =

Preset)

L2

Reset

11

Down >

11

Reset <

PR = 500

AR = xxx

Figure 9-50.

Functional block counter instruction.

S

OLUTION

Figure 9-51 illustrates a circuit that will automatically reset the counter. When the preset and accumulated counts are equal, the counter output 100 turns ON, latching output 101 to indicate a reached count. This same counter output resets the counter. Remember that the PLC has already evaluated all inputs, so the counter is reset in the following scan. The previous input 11 is used to manually unlatch output 101.

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L1

PE

Reset

10

11

L2

10

100

100

11

Programming

Languages

C

HAPTER

9

CTR

Up =

Down >

Reset <

100

L1

101

PL

(Count =

Preset)

L2

101

L

101

U

Figure 9-51.

Automatically resetting counter.

E

XAMPLE

9-7

Referencing the solution to Example 9-6 (i.e., see Figure 9-51), implement the count detection circuit using interlocking standard outputs and contacts instead of latch/unlatch coils.

S

OLUTION

Figure 9-52 illustrates an interlocking circuit that latches, or traps, the counter’s output, indicating that the count value has been reached.

Note that the reset push button (input 11) is programmed normally closed from a normally open input device. If this input was of safety importance, then the circuit would have incorporated a normally closed push button (wired as normally closed) that was programmed as an examine-OFF instruction.

L1

PE

10

L2

10

CTR

100

L1

101

PL

(Count =

Preset)

L2

Reset

11

100

Up =

Down >

Reset <

100 11 101

101

Figure 9-52.

Solution to Example 9-7.

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9

9-9 P

ROGRAM

/F

LOW

C

ONTROL

I

NSTRUCTIONS

Program/flow control instructions direct the flow of operations, as well as the execution of instructions, within a ladder program. They perform these functions using branching and return instructions, which are executed when certain already programmed control logic conditions occur. Typically, program/flow control instructions form a “fence” within a program. This fence contains groups of other ladder instructions that are used to implement the desired function. Figure 9-53 illustrates a fence created using program/flow control instructions.

Main Control

Program

Flow Control

Instruction

Fenced

Instructions

Fenced

Program

If the rung is TRUE, the fenced program (routine) is executed.

If the rung is FALSE, the fenced program is bypassed.

End Flow

Control

Main Control

Program

Figure 9-53.

A fence created using a program/flow control instruction.

Some programmable controllers, depending on their capabilities and the scope of their application, use several types of program/flow control instructions. These instructions allow the controller to efficiently perform special user-programmed routines that are executed only when required. This reduces the scan time, thereby optimizing total system response.

Table 9-6 shows some of the most commonly used program/flow control instructions. These instructions are generally used in pairs. When paired, the first instruction starts the flow control change, sending the PLC to a special routine of instructions in another section of the control program. The other instruction returns the PLC to the program it was running when the flow control change occurred.

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Fenced

MCR

Zone

Programming

Languages

C

HAPTER

9

( P u r p o s e : T o d i r e c t t h

P

e

r o g r a m /

e v a l u a t i

F l o w

o n / e x

C o n t r o l

e c u t i o n

I n s t r u c t i o n s

o f i n s t r u c t i o n s i n a l a d d e r p r o g r a m )

M a s t e

I n s t r u c t i o n

r C o n t r o l R e l a y

S y m

MCR

b o l F u n c t i o n

A c t i v a t e s / d e a c t i v a t e s o f a g r o u p o f l a d d e r t h e r u n g s e x e c u t i o n

ZCL

Z o n e

S t a t e

C o n t r o l L a s t

E n d E N D

D e t e r m o f l a d d e i n e r s r u n w h e t h e r g s w i ll o r b e n o t a g r o e v a l u a t e d u p

I d e n t i f i e s

Z C L i n s t r t h u c e l a t i o n s t r u n g o f a n M C R o r

JMP

J

G u o m

T p o

T o

S u b r o u t i n e

GOSUB

J u m p s p r o g r a m t o i f a s p e c e r t a i n c i c f i e d o n d r u n g i t i o n s i n t h e e x i s t s

G p o r o e s g r a t o a m i f s p e c i f i e d c e r t a i n s u b r o u t c o n d i t i o n s i n e e x i i n s t t h e

L a b e l

LBL

I d o r e n

G t i f i e

O S s

U t h e

B t a r g e t r u n g i n s t r u c t i o n o f a J M P

RET

R e t u r n T e r m i n a t e s a l a d d e r s u b r o u t i n e

Table 9-6.

Program/flow control instructions.

MCR

M

ASTER

C

ONTROL

R

ELAY

A master control relay (MCR) output instruction activates or deactivates the execution of a group or zone of ladder rungs (see Figure 9-54). An MCR rung is used in conjunction with an END rung (discussed later) to fence a group of

Auto

Main Control

Program

MCR 1

If the AUTO input closes,

MCR 1 is energized and the rungs inside the zone are executed. If AUTO is

OFF, program execution resumes at the first rung after the END instruction.

END 1

Main Control

Program

Figure 9-54.

Example of an MCR instruction.

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9 rungs. The fence consists of an MCR rung with conditional inputs at the beginning of the zone and an END rung with no conditional inputs at the end of the zone. When the MCR rung condition is TRUE, it activates the referenced output, allowing all rung outputs within the zone to be controlled by their respective rung input conditions. When the MCR output is turned

OFF, it de-energizes all nonretentive (nonlatched) outputs within the zone.

ZCL

Z

ONE

C

ONTROL

L

AST

S

TATE

A zone control last state (ZCL) instruction is similar to an MCR instruction— it determines whether or not a group of ladder rungs will be evaluated. In this instruction, a ZCL output with conditional inputs occurs at the start of the fenced zone, while an END ZCL output with no conditional inputs occurs at the end of the zone. When the referenced ZCL output is activated, the outputs within the zone are controlled by their respective input conditions. When the

ZCL output is turned OFF, the outputs within the zone stay in their last state.

E

ND

An end (END) instruction signifies the last rung of a master control relay or zone control last state instruction. This instruction is usually unconditional

(i.e., programmed without any conditions to energize). An end instruction reference address may or may not reference a MCR or ZCL. If a reference is included, the END instruction will end that particular MCR or ZCL. If the instruction does not include a reference address, it will terminate the latest

MCR or ZCL instruction.

JMP

J

UMP

T

O

A jump to (JMP) instruction allows the control program sequence to be altered if certain conditions exist. If the rung condition is TRUE, the jump to coil reference address tells the processor to jump forward and execute the target rung. The jump to address label specifies the target rung to jump to.

Using this instruction, a PLC can alter the order of execution of the control program to execute a rung that needs immediate attention. Figure 9-55 illustrates a jump to instruction. This instruction may also be called a go to instruction. Note that care should be exercised when jumping over timers and counters. Jumping over timers and counters will cause the timing and counting instructions not to be executed.

GOSUB

G

O

T

O

S

UBROUTINE

Like a jump to instruction, a go to subroutine (GOSUB) output instruction also allows normal program execution to be altered if certain conditions exist.

In this instruction, if the rung condition is TRUE, the GOSUB coil reference

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9

10

Main Control

Program

11 JMP 100

This section is bypassed— logic not solved

Main Control

Program

100

LBL

12 13 300

Main Control

Program

If contacts 10 and 11 close, program execution jumps to the rung labeled

LBL 100 and continues.

Figure 9-55.

Example of a jump to instruction.

address tells the processor to jump to the ladder rung with a label (LBL) instruction having the same reference number. The processor then continues the program execution until it encounters a return coil. Each subroutine in the program must begin with a labeled rung and end with an unconditional return instruction. A go to subroutine instruction may also be called a jump to

subroutine (JSB) instruction.

A GOSUB instruction is very useful whenever a subroutine in the program is either referenced by several sections of the main control program or is referenced on a timely basis (i.e., look up analog interpretation table every 10 seconds). Subroutines are generally located at the end of the control program and are sometimes located in an area specified by the PLC maker (see Figure

9-56). If a PLC does not have a reserved subroutine area, the user can create one by programming a dummy rung with direct control to another dummy rung at the end of the programmed subroutines (see Figure 9-57). For proper programming documentation order, the subroutine area should be located at the end of the control program.

L

ABEL

LBL

A label (LBL) instruction identifies the ladder rung that is the target destination of a jump to or GOSUB instruction. The label instruction reference number must match that of the jump to or GOSUB instruction with which it is used. A label instruction does not contribute to logic continuity

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HAPTER

9

Main Control

Program

10

11

1

LBL

Main Control

Program

GOSUB 1

GOSUB 2

If contact 10 closes, subroutine #1 is executed. Once finished, the processor returns to the instruction that follows. If contact 11 closes, subroutine #2 is executed.

300

The EOS (end-of-scan) signal is triggered at the end of the control program before the subroutine area starts.

Subroutine #1

RET

2

LBL

400

Subroutine #2

RET

Figure 9-56.

PLC with assigned subroutines at the end of the program.

100

LBL

Main Control

Program

Subroutine #1

GOTO 100

The unconditional GOTO 100 instruction jumps control to LBL

100, which is the last instruction in the program. Each subroutine must have unique LBL and RET instructions.

Subroutine #2

200

EOS occurs after the dummy output (200) is executed.

Figure 9-57.

User-created subroutine area.

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9 and, for all practical purposes, is always logically TRUE. This instruction is always the first condition instruction in the referenced rung. A label instruction referenced by a unique address can only be defined once in a program.

RET

R

ETURN

A return (RET) instruction terminates a ladder subroutine and is programmed with no conditional inputs. When the control program encounters this instruction, it returns to the main program, going to the ladder rung immediately following the GOSUB instruction that initiated the subroutine.

Normal program execution continues from that point. Each subroutine must have a return instruction.

9-10 A

RITHMETIC

I

NSTRUCTIONS

Arithmetic instructions in a PLC include the basic four operations of addition, subtraction, multiplication, and division. In addition to these four math functions, large PLCs may also include square root operations. Table

9-7 lists these typical arithmetic instructions and their symbols.

( P u r p o s e : T o a ll o w P L C s t o

A r i t h m e t i c

p e r f o r m m

I n s t r u c t i o n s

a t h e m a t i c a l f u n c t i o n s w i t h r e g i s t e r d a t a )

I n s t r u c t i o n F u n c t i o n

A d d i t i o n — L a d d e r

S y m b o l

ADD

+ r

A d d e g s i s t t h e r s e v a l u e s s t o r e d i n t w o

A d d i t i o n — B l o c k A D D

A d d s t h e r e g i s t e r s v a l u e s s t o r e d i n t w o

S u b t r a c t i o n — L a d d e r

SUB

S u b t r a c t i o n — B l o c k S U B

S u b t r a c t s t w o r e g i s t e t h r s e v a l u e s s t o r e d i n

S u b t r a c t s t w o r e g i s t e t h r s e v a l u e s s t o r e d i n

M u l t i p il c a t i o n — L a d d e r

MUL

×

M u l t i p il c a t i o n — B l o c k M U L

M u t w o l t i p il e s t h e r e g i s t e r s v a l u e s s t o r e d i n

M u l t i p il e s t h e t w o r e g i s t e r s v a l u e s s t o r e d i n

D i v i s i o n — L a d d e r

DIV

÷

D

S i q v u i s a i r o e n —

R o

B o l t o c

— k

B l o c k

D

S

I

Q

V

R

F i n d s i n t w o t h e q u o t i e n t r e g i s t e r s o f t h e v a l u e s

F i n d s i n t w o t h e q u o t i e n t r e g i s t e r s o f t h e v a l u e s r

C a l c e g i s u l a t e r t e s t h e v a l u e s q u a r e r o o t o f a

Table 9-7.

Arithmetic instructions.

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9

Like other instructions, arithmetic instructions may be in either the basic ladder format or the functional block format; however, operation in either format is essentially the same. Figure 9-58 illustrates these formats. Most arithmetic instructions require three reference registers, which define the two operand registers and the destination register of the operation. Some instructions, such as multiplication and division, may use four registers. Most arithmetic operations in a PLC require only single-precision arithmetic, meaning that the values of the operands and the result can be held in one register each. If operations dealing with larger numbers are required, a PLC may offer double-precision arithmetic instructions. Double precision means that the system uses double the number of registers to hold the operands and result, because it must store larger numbers. For example, a double-precision addition instruction would use a total of six registers, two for each operand and two for the result.

(a)

ADD

+

(b)

Reg X + Reg Y = Reg Z

(c)

Control

ADD

Reg X

+

Reg Y

=

Reg Z

Output

Figure 9-58. (a)

Coil,

(b)

contact, and

(c)

block format arithmetic instructions.

As discussed earlier, a register can hold a maximum value of 65,535 in 16 bits (all 1s) if there is no sign bit. If the most significant bit is used as the sign bit, then a register may hold a maximum value of +32,767 and a minimum value of –37,767. If the result value of the operation is larger than the value a register can hold, an overflow condition will exist, and the instruction will turn ON an overflow bit or output. The numerical format used in math operations will vary depending on the PLC but is usually three, four, or five digits (BCD or binary). Note that in single-precision BCD, the maximum register value is 9999 (unsigned) or

±

999 (signed).

In the following discussion, we will present arithmetic instructions in both ladder and block formats to familiarize you with the differences between them. Note that the ladder format may require other ladder data transfer

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9 instructions to obtain the arithmetic operands. In functional block format, some manufacturers offer the ability to “cascade” block functions (see Figure

9-59). Cascading is very useful when dealing with multiple arithmetic operations, since one instruction will activate the next one when finished.

Other manufacturers allow arithmetic operations to be performed in block form (see Figure 9-60); that is, using blocks of several contiguous registers as the operands and storing the results in another block of registers.

10

ADD

Reg 1000

+

Reg 1001

=

Reg 1002

MUL

Reg 1002 x

Reg 2000

=

Reg 2001

DIV

Reg 2001

÷

K33

=

Reg 2002

100

Note: K33 in the division block indicates a constant of 33.

Figure 9-59.

“Cascading” allows several functional block arithmetic operations to be performed sequentially.

10

ADD

Length = 4

Reg 1000

+

Reg 1200

=

Reg 1400

100

A

Note: The contents of registers 1000, 1001, 1002, and 1003 will be added to registers 1200, 1201, 1202, and 1203. The results will be stored in registers 1400, 1401, 1402, and 1403.

Figure 9-60.

Arithmetic operations performed in block form.

DDITION

—L

ADDER

ADD

+

The addition (ADD) ladder instruction adds the values stored in two referenced memory locations. Different controllers access these values differently.

Some instruction sets use a get (GET) data transfer instruction to access the two operand register values (see Figure 9-61), while others simply reference the two registers using contact symbols (see Figure 9-58b). The processor stores the sum of the values in the register referenced by the ADD coil. If the addition operation is enabled only when certain rung conditions are TRUE, then the input conditions should be programmed before the addition rung.

One bit in the addition result register usually signals an overflow condition.

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A

GET

Reg X

GET

Reg Y

ADD

+

Reg Z

If A closes, the contents of register X and register Y are added and stored in register Z. If A does not close, no addition is performed. If contact A was omitted, the addition would be performed in every scan.

Figure 9-61.

Ladder format addition.

A

DDITION

—B

LOCK

An addition (ADD) functional block adds two values stored within the controller and places the sum in a specified register. The operand values can be fixed constants, values contained in I/O or holding registers, or variable numbers stored in any memory location. Figure 9-62 illustrates a typical addition functional block.

Enable or

DoweOutput

Control

ADD

Reg 1000

+

Reg 1001

=

Reg 2000

10

Storage Area

9

1

7

1

3

9

Reg

1000

1001

1 0 9

Contents in BCD

2 2000

ADD

Reg 1000

+

Reg 1001

=

Reg 2000

EN

OF

100

101

Enable

Overflow

10

To control other logic

Figure 9-62.

Addition functional block.

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A control line enables the operation of an addition block. When the rung conditions are TRUE, the processor performs the addition function. In the block shown in Figure 9-62, register 1000 and register 1001 can be preset values, storage registers, or I/O registers. Each time an OFF-to-ON transition enables the control line, the instruction adds the values in these two registers and places the result in register 2000. The done, or enable, output coil indicates that the operation has been completed. This output remains ON as long as the control line is TRUE. An overflow of the addition operation energizes the overflow output of the block. If the operation overflows, some

PLCs will clamp, or store, the results at the maximum value that the register can hold. Others will store the difference between the maximum count value and the actual overflow value.

Some controllers use double-precision addition when working in block format (see Figure 9-63). This operation is identical to simple ladder addition, but the PLC uses two registers each to hold the operands and two registers to store the result.

10

ADD

Reg 1000

+

Reg 1001

=

Reg 2000

Done

Overflow

+

=

R 1000

999

R 1100

999

R 2000

1999

R 1001

9999

R 1101

9999

R 2001

9998

9,999,999

9,999,999

19,999,998

Figure 9-63.

Double-precision addition block.

E

XAMPLE

9-8

In Figure 9-64, two ingredients are added to a reactor tank for mixing.

Analog input modules, which provide 12-bit information in BCD, send data about the two ingredients’ flows to the PLC. The values are stored in registers 1000 and 1001. Implement instructions to keep track of the total amount of the combined ingredients, so that this information can be displayed on a monitor for the operator.

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Ingredient 1

Flow A

Reg 1000

Programming

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9

Ingredient 2

Flow B

Reg 1001

Figure 9-64

. Flow of two ingredients into a reactor tank.

S

OLUTION

One register can hold the total of both ingredients after the addition of the two ingredients’ flows. Figure 9-65 shows the use of an ADD instruction to store the BCD result in register 2000. Note that this ADD instruction is always active.

ADD

Reg 1000

+

Reg 1001

=

Reg 2000

100

Reg 1000 = Ingredient A

Reg 1001 = Ingredient B

Reg 2000 = Sum of ingredients A and B

Figure 9-65.

Solution to Example 9-8.

S

UBTRACTION

—L

ADDER

SUB

The subtraction (SUB) ladder instruction subtracts the values stored in two registers. As in an addition instruction, if the rung is enabled, the subtraction operation occurs. A GET data transfer instruction usually accesses the two

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9 registers used by a SUB instruction. The subtraction result register will usually have an underflow bit to represent a negative result. Figure 9-66 shows a rung with a SUB instruction.

10

GET

Reg: 1000

GET

Reg: 1001

SUB

100

Reg: 2000

Storage Area

2 4 8 7 5

1 2 6 6

Reg

1000

1001

2 3 6 0 9

Contents in

Decimal (Binary)

2000

If contact 10 closes, the value in register 1001 is subtracted from the value in register 1000 (Reg 1000 – Reg 1001) and the result is stored in register 2000. If contact 10 does not close, no subtraction is performed.

Figure 9-66.

Ladder format subtraction instruction.

S

UBTRACTION

—B

LOCK

The subtraction (SUB) functional block, as in the ladder format subtraction instruction, finds the difference between two values and stores the result in a register. Figure 9-67 shows a typical subtraction functional block.

Control

SUB

Reg 1000

Reg 1001

=

Reg 2000

Output Done/

Enable

Figure 9-67.

Subtraction functional block.

The control input in a subtraction block operates the same way as in an addition block. When the rung condition is logic 1, the controller performs the block operation. Three registers hold the data during the operation. The values that these registers can hold vary in format and may or may not include a sign bit. For example, referring to Figure 9-67, register 1000 could contain 9009 decimal and register 1001 could hold –10,020. The result of this operation would be +19,029 [9009 – (–10,020)], which would be stored in register 2000.

Since the formats for subtraction vary, sometimes the result register may not

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9 include a sign bit. In this case, the controller will provide three outputs (see

Figure 9-68): a positive result output (register 1000 greater than register

1001), an equal result output (register 1000 equal to register 1001), and a negative result output (register 1000 less than register 1001). The block will energize the output that corresponds to the result value. A three-output subtraction block essentially performs a comparison function.

Control

SUB

Reg 1000

Reg 1001

=

Reg 2000

Output 1: Result Positive (+)

Output 2: Result Equal (=)

Output 3: Result Negative (–)

Figure 9-68.

Subtraction block with sign outputs.

Some controllers allow a constant to be added to another register, through the block function, by placing an indicator, such as the letter K, in front of the number (e.g., K1035 = constant 1035). Controllers that do not provide I/O transfer instructions may use subtraction blocks to transfer analog or multibit

I/O values to and from the I/O table. They do this by subtracting a constant of 0 from the input/output data and then storing the result in the target register.

Figure 9-69 illustrates an example of a SUB block instruction used to read an analog input and write an analog output. If contact 10 closes, the SUB operation is executed. Register 100 specifies the reference address of the input or output module (analog or multibit). During the reading of an input, a constant of 0 (register 1001) is subtracted from the input module’s input value

(register 100) and the result is stored in register 1000 for use by the control program. During the writing of an output, a constant of 0 (register 1001) is subtracted from the value in register 1000 and the result is sent to the output module (register 100).

10

Control

SUB

Reg 100

Reg 1001

=

Reg 1000

EN

OF

200

201

10

Control

SUB

Reg 1000

Reg 1001

=

Reg 100

EN

OF

200

201

Register 1001 contains a constant of 0.

Register 100 overlaps analog input.

(a)

Register 1001 contains a constant of 0.

Register 100 overlaps analog output.

(b)

Figure 9-69.

Subtraction block used to

(a)

read an analog input and

(b)

write an analog output.

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9

M

ULTIPLICATION

—L

ADDER

MUL

×

A multiplication (MUL) ladder instruction multiplies the values from two operand registers. It then uses two other registers to hold the result of the multiplication (see Figure 9-70). The reason why the result is held in two registers is that, normally, the product of two 4-digit numbers is an 8-digit number. Some controllers provide two adjacent registers in which to store the result.

10

GET

Reg: 1000

GET

Reg: 1001

MUL

100 x

Reg: 2000

2001

0

1

Storage Area

2

3

5

5

0

7

Reg

1000

1001

9

0

2

0

5

3

0

3

Contents in BCD

Result = 00339250

2000

2001

Figure 9-70.

Ladder format multiplication instruction.

One or two output coils reference the two result registers in a multiplication instruction, depending on the PLC. GET instructions access the operand registers. If a condition must be present to enable the operation, it should be programmed before the multiplication rung accesses the two operands. In

Figure 9-70, if contact 10 closes, the contents of registers 1000 and 1001 will be multiplied and stored in registers 2000 and 2001.

M

ULTIPLICATION

—B

LOCK

As with the multiplication ladder instruction, a multiplication (MUL) block function uses two registers to store the result and one register to hold each of the operands. Figure 9-71 illustrates a multiplication block, with a control line enabling its operation.

A PLC may use double-precision for a multiplication block, meaning that there will be twice the number of registers for the operands and result. This allows, for example, an 8-digit BCD number to be multiplied by another 8digit BCD number with the result (up to 16 digits BCD) stored in four result registers. Other controllers use scaling, in which the result of the multiplica-

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Control

MUL

Reg 1000 x

Reg 1001

=

Reg 2000

2001

Done or

Enable

Overflow

Figure 9-71.

Multiplication functional block.

tion is held temporarily in two registers and then multiplied by a scale value

(see Figure 9-72). For example, assume that a PLC has a 4-digit BCD format and that registers 1000 and 1001 contain the values 9001 and 8172, respectively, with a scaling value of –5 (or 10

–5

). If the controller uses scaling, it will hold the result (73,556,172) in two result registers temporarily (as 7355 and

6172), and then multiply it by the scaling value (10

–5

), resulting in 735.56172.

Thus, the result register will contain the value 736 (rounded off). Knowing that the result has been scaled, the user can compute the actual result, which is 736

×

10 5 (73,600,000).

Control

MUL

Reg 1000 x

Reg 1001

=

Reg 2000

2001

SCALE

Reg: 2200

EN

OF

Enable

Overflow

0

0

9

8

Storage Area

0

1

0

7

1

2

7

0

3

0

6

0

Reg

1000

1001

Mult

2000

2001

Temporary Storage Registers

6

7

1

3

7

5

2

5

Store

5

2200

Note: The scale value is positive in register 2200 but interpreted as 10

–5

by the processor.

Figure 9-72.

Multiplication function block with scaling.

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9

D

IVISION

—L

ADDER

DIV

÷

A division (DIV) instruction finds the quotient of two numbers. This quotient is held in two result registers and referenced by the output coil. The first result register generally holds the integer part of the quotient, while the second result register holds the decimal fraction part. Both operands used in a division operation may be obtained through GET instructions. Figure 9-73 shows a rung using a division instruction.

10

GET

Reg: 1000

GET

Reg: 1001

DIV

100

÷

Reg: 2000

2001

Integer

Fraction

Figure 9-73.

Ladder format division instruction.

D

IVISION

—B

LOCK

A division (DIV) functional block finds the quotient of two numbers, storing the result in one or more registers. Figure 9-74 illustrates this type of functional block. The division calculation begins after the control rung has continuity. Registe 1000 (the dividend) is divided by the contents of register

1001 (the divisor), and the result is stored in two contiguous destination

DIV

Control

(a)

(b)

Reg 1000

÷

Reg 1001

=

Reg 2000

2001

Reg: 1000 = 8527

Reg: 1001 = 325

Integer result in register 2000 = 26

Decimal fraction in register 2001 = 2369

Result = 26.2369

or

Integer result in register 2000

Remainder in register 2001

= 26

= 77

Result = 26 with a remainder of 77 (77/325)

Done or

Enable

Overflow

Remainder

Figure 9-74.

Division functional block with the second result register storing

(a)

the decimal fraction and

(b)

the remainder.

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9 registers. In this case, the destination registers are register 2000, which holds the integer part of the result, and register 2001, which holds the decimal fraction part. Depending on the controller, the second result register may hold the remainder instead of a decimal fraction. Some controllers also allow a scaling factor to be specified in a division block. This scaling factor permits fractional results, which would otherwise be lost, to be scaled and stored in a register.

Depending on the PLC used, a division block can have three possible outputs.

When energized, the top output generally represents a successful division, the middle output represents an overflow or error (divide by zero), and the lower output indicates whether or not the result has a remainder.

S

QUARE

R

OOT

—B

LOCK

A square root (SQR) block instruction generally has two or three registers— one that holds the value to be operated on and one or two other registers that hold the result of the square root operation. One of the result registers may hold the integer part of the result while the other holds the fractional part. The processor may also provide scaling. Once the control rung has continuity, the square root operation takes place. Of the possible block outputs, the first one represents a successful or valid operation, nd the second one indicates an overflow condition. Figure 9-75 illustrates a square root block instruction.

Control

SQR

Reg 1000

Reg 2000

2001

Enable

Overflow

Reg: 1000 = 120

Square root result = 10.9544

Reg: 2000 = 10 (integer)

Reg: 2001 = 9544 (decimal fraction)

Figure 9-75.

Square root functional block.

The square root instruction is useful in applications like the calculation of flow rate from a differential pressure (DP) orifice flow meter (see Figure 9-

76). In this application, the flow rate (Q) is equal to a constant (K) times the square root of the differential pressure (

P

A

= P

out

– P

in

). The analog input value from the DP flow meter must have its square root value extracted and then multiplied by the constant. The resulting value will give the volume per unit time (ft 3 /min) of the flow. Chapter 13 further discusses differential pressure transducers and their measurements.

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9

P

A

–10 to +10

Analog

Input

Programmable Controller

0–10 VDC

Analog

Output

0–10 VDC

Analog

Output

P

B

–10 to +10

Analog

Input

DP DP

Ingredient A

Q

A

= K

A

P

A

Ingredient B

Q

B

= K

B

P

B

Mixer

To 120 VAC Discrete

Output in PLC

Figure 9-76.

Square root instruction application in a DP flow meter.

9-11 D

ATA

M

ANIPULATION

I

NSTRUCTIONS

Data manipulation instructions are enhancements of the basic ladder diagram instruction set. Whereas relay-type instructions are limited to the control of internal and external outputs based on the status of specific bit addresses, data manipulation instructions allow multibit operations. Data manipulation instructions handle operations that take place within one, two, or more registers. Table 9-8 presents some data manipulation instructions.

D

ATA

C

OMPARISONS

Data comparison (CMP) instructions, as the name implies, compare the values stored in two registers. These instructions are useful when checking for a proper range of values in the control or data entry section of the application program. In some controllers, data compariso instructions are expressed in the basic ladder format, while in other controllers, they are block instructions. In both formats, they provide three basic data comparisons:

compare equal to, compare greater than, and compare less than. Based on the results of these comparisons, the processor can turn outputs ON or OFF and perform other operations.

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9

I

D a t

( P u r p o s e : T o

D a t a

p r o v i d e

M a n i p u l a t i o n

m u l t i b i t , m u l t i r

I n

e g

s t r u

i s t e r

c t i o n s

o p e r a t i o n s i n a P L C )

I n s t r u c t i o n S y m b o l F u n c t i o n

a C o m p a r i s o n C M P / L I M

C o m p a r e s t w o r e g i s t e t h r s e v a l u e s s t o r e d i n

L

D

S

P n o a e a c g r t r t i a a c

C e

M

C o m m o n e e t a n s t e n t t v r r a i s x e r n t s i o n

A N D / O R / N A N D

N O R / N O T / X O R

A B S / C O M P L

I N V / B I N B C D

I

S

N

E

C

T

R r t

P e w e o g i r f s o o t r r e m

C h a n g e s r s t o l o g i c m o r e t h e a n r e o v g i a l o u t h e r p e e s r s t e r s a t o t i o r e f o r m a t n s d i n o n a

L o a d s v a l u e a r e g i s t e r w i t h a f i x e d r

I n c r e a s e s e g i s t e r b y t h e o n e c o n t e n t s o f a

S

R h o t i f t a t e

S H

R

I

O

F

T

T t

M h o e v e s r i g h t t h e o r b i t s l e f t i n a r e g i s t e r t o

S o t h h i f e t r s m o v e s r e g t h e e n d i s t s o f e r h i f t h b i t s r i g h t t e d o e r e g i u s t b t e

/ l e f i r t t t o a n d t h e

E x a m i n e B i t X B O N / X B O F F

E x a m i n e s b i t i n a m t h e m e s o r y t l a t u s o c a o f t i o n a s i n g l e

Table 9-8.

Data manipulation instructions.

Comparison instructions that use the basic ladder format operate in a manner similar to arithmetic instructions (see Figure 9-77). If the rung has continuity, the instruction performs a comparison; if the comparison is TRUE, the instruction passes continuity to the output coil. Typical comparison instruc-

10 100

GET

Reg 600

CMP=

Reg 501

11 101

GET

Reg 601

CMP=

Reg 502

CMP>

Reg 502

If contact 10 closes, the contents of register 600 are compared to the contents of register 501; if they are equal, coil 100 is turned ON. If contact 11 closes, the contents of register 601 are compared to the contents of register 502; if they are greater than or equal to register 502, output 101 is turned ON.

Figure 9-77.

Ladder format comparisons.

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9 tions are greater than (>), less than (<), and equal to (=), along with combinations of these such as less than or equal to (

), greater than or equal

to (

), and not equal to (

). A GET instruction accesses the first register to be compared to the comparison (CMP) register. Note that all ladder conditions are programmed before the GET and CMP instructions.

The compare functional block, shown in Figure 9-78a, compares the contents of two registers, register 2000 and register 2001, for a specific comparison, in this case, equal to. The block instruction energizes output coil 100 when the comparison occurs, and it energizes output coil 101 if the comparison has been satisfied. As shown in Figure 9-78b, some PLCs may also have one comparison block, which has several outputs, that performs multiple compare functions at the same time. This type of comparison block compares the data in the registers and then turns ON the output corresponding to the outcome of the comparison (i.e., less than, greater than, equal to).

10

CMP=

100 10

CMP

100

Reg 2000

Done/

Enable

Reg 1000

CMP=

Reg 2001

101

Comparison

Satisfied

Reg 1001

101

CMP>

Note: Other comparision functional block instructions include

CMP>, CMP

, CMP<,

CMP

, and CMP

.

(a) (b)

102

CMP<

Figure 9-78. (a)

Single-comparison and

(b)

multicomparison functional blocks.

Some controllers offer another comparison option that uses another register to perform a limit (LIM) instruction. This instruction compares the values in three registers to determine if the value in the middle register is between the other two register values. For example, the limit functional block shown in

Figure 9-79 compares the contents of registers 1100, 1200, and 1300 to determine whether register 1200 is less than or equal to register 1100 and

10

LIM

Reg 1100

100

Done/Enable

Reg 1200

Reg 1300

101

Comparison

Satisfied

Ouput is ON if condition is satisfied

(Reg 1100

Reg 1200

Reg 1300)

Figure 9-79.

Comparison block using a limit instruction.

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9 whether register 1200 is greater than or equal to register 1300 (i.e., R1100

R1200

R1300). If the comparison is TRUE, the limit instruction energizes the comparison-satisfied output. The done/enable output is ON whenever the instruction is enabled.

Some controllers that do not have compare block capabilities can perform a comparison of two registers using a subtraction block (see Section 9-10). In this case, three output coils signal whether the result of the subtraction is positive (greater than), equal (equal to), or negative (less than).

E

XAMPLE

9-9

Figure 9-80 shows a section of the program from Example 9-8 in which an ADD instruction was used to keep track of the two ingredients being poured into a reactor tank. The first two ladder rungs open the valves for ingredients A and B, allowing them to be poured into the tank once the Start Adding Ingredients

command is ON (input 10). Implement an instruction block that ensures that the valves close when ingredient A reaches 500 gallons and ingredient B reaches 750 gallons.

Ingredient 1 Ingredient 2

Start Adding

Ingredients

10

Valve A

200

Flow A

Reg 1000

Flow B

Reg 1001

Start Adding

Ingredients

10

Valve B

201

ADD

Reg 1000

+

Reg 1001

=

Reg 2000

100

Figure 9-80.

Mixing application and its corresponding ladder program.

S

OLUTION

Figure 9-81 illustrates the use of two compare instructions that detect the target ingredient amounts. The outputs of these compare instructions are used to interlock and break continuity to each of the valve’s circuits. Note that the values of the ingredient flows (the contents of registers 1000 and 1001) are compared with two constants (K). Also, note that the comparison made is greater than or equal to (

) to avoid missing the compare (equal) because of a minuscule movement in the analog input reading.

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9

Start Adding

Ingredients

10

Start Adding

Ingredients

10

Stop A

102

Stop B

104

Valve A

200

Valve B

201

Start Adding

Ingredients

10

Reg 1000

+

Reg 1001

=

Reg 2000

CMP

Reg 1000

K500

Start Adding

Ingredients

10

CMP

Reg 1001

K750

100

101

102

103

104

Enable

CMP Satisfied

(Ingredient A)

Enable

CMP Satisfied

(Ingredient B)

Figure 9-81.

Solution to Example 9-9.

L

OGIC

M

ATRIX

A logic matrix functional block performs AND, OR, exclusive-OR, NAND,

NOR, and NOT logic operations on two or more registers (see Chapter 3 for logic functions). A logic function performed between two registers can be thought of as a matrix operation of length one, since each operand has one register. Figure 9-82 shows a typical logic matrix function block. A logic matrix operation between two registers may be used to mask out certain bits of the source or original register and then pass only the status of those bits used in the mask to the result register (see Figure 9-83).

An enabled control input triggers the performance of a logic matrix function block. The block specifies the type of logic function to be performed, while the user specifies the registers inside the block. These are generally holding or storage registers. Referring to Figure 9-82, registers 1000 and 1100 hold the operand values, while register 2000 holds the result of the operation. The length of the operation indicates the number of words or registers adjacent to each of the register operands, providing data in matrix form.

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10

Logic Function

(AND, OR, NOT)

Reg 1000

Reg 1100

Reg 2000

Length 01

100

Figure 9-82.

Logic matrix functional block.

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9

17 16 15 14 13 12 11 10 7 6 5 4 3 2 1 0

1 0 0 0 1 1 0 1 0 0 1 0 1 0 0 1 Register

AND

0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 Mask

(Reg 1000)

(Reg 1100)

0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 0 Result after (Reg 2000) logical AND

Only bits passed

(Others are masked out)

Figure 9-83.

Logic matrix function block used to mask out bits.

During its operation, a logic matrix function block has three possible outputs. It energizes the top output when the control line is enabled, it energizes the middle output once the operation is done, and it energizes the lower output if an error occurs. As an example, let’s examine the logic function block shown in Figure 9-84, which has a length of 8 and an AND logic function. When the control input enables the block, the logic function will AND the contents of registers 1000 through 1007 with the contents of registers 1100 through 1107, placing the result of the operation in registers

2000 through 2007. Each register typically holds 16 bits of data. So, in this case, the function block will AND the 128 bits in registers 1000–1007 with the 128 bits in registers 1100–1107 and store the result (128 bits) in another matrix (registers 2000 through 2007).

Some controllers have only two operand registers (e.g., R1000 and R1001).

When these controllers perform a logic operation, they store the result in one of the operand registers, erasing the operand data previously stored in that

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9 register. A data transfer of that register’s contents to another register(s) prior to executing the logic matrix block can prevent loss of operand data when using this type of block function.

10

AND

Reg 1000

Reg 1100

Reg 2000

Length 08

100

Reg 1000 Holds data to be masked

Reg 1100 Holds mask

Reg 2000 Holds results

Holding

Register

1000

1001

1002

1003

1004

1005

1006

1007

Logic

AND

Mask

Register

1100

1101

1102

1103

1104

1105

1106

1107

Result

Register

2000

2001

2002

2003

2004

2005

2006

2007

Figure 9-84.

Logic matrix function block example.

D

ATA

C

ONVERSIONS

Data conversion instructions change the contents of a given register from one format to another. Typical data conversion instructions include BCD-tobinary, binary-to-BCD, absolute, complement, and inversion.

A BCD-to-binary (BCD-BIN) data conversion instruction (see Figure 9-85) converts BCD input data from field devices, such as thumbwheel switches, into binary format. This conversion allows the input data to be used in math operations. Conversely, a binary-to-BCD (BIN-BCD) instruction converts data from the PLC into BCD format, so that field devices that operate in BCD

(e.g., seven-segment LED indicators) can use it (see Figure 9-86).

The operation of a data conversion block is basically the same regardless of whether it is performing a BCD-BIN or a BIN-BCD conversion. When the control input is enabled, the block converts the contents of the first register

(either BCD or BIN) into binary or BCD, depending on the conversion

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9 instruction. It then places the result of the conversion in the second register and energizes the block output when the instruction is finished. Some PLCs allow multiple registers to be converted at the same time by specifying a length in the instruction (see Figure 9-87).

5 8 7 6

BCD number is input into register

Reg 1000

0 1 0 1 1 0 0 0 0 1 1 1 0 1 1 0

(5876

BCD)

10

BCD BIN

Reg 1000

Reg 1200

100

Reg 1000 Holds BCD value

Reg 1200 Holds binary value after conversion

0 0 0 1 0 1 1 0 1 1 1 1 0 1 0 0

Reg 1200

(5876 binary)

Figure 9-85.

BCD-to-binary data conversion.

Reg 1000

(5876 binary)

0 0 0 1 0 1 1 0 1 1 1 1 0 1 0 0

10

BIN BCD

Reg 1000

Reg 1200

100

Reg 1000 Holds binary value

Reg 1200 Holds BCD value after conversion

Reg 1200

(5876

BCD)

0 1 0 1 1 0 0 0 0 1 1 1 0 1 1 0

BCD number is transferred to seven-segment LEDs via block transfer or other instruction

Figure 9-86.

Binary-to-BCD data conversion.

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Binary

Register

1000

1001

1002

1003

1004

1005

1006

1007

Length = 8

BCD

Register

1100

1101

1102

1103

1104

1105

1106

1107

8 registers are converted after execution

Figure 9-87.

Multiple-register binary-to-BCD conversion.

Absolute, complement, and invert operations usually occur within a single register. In other words, the operation stores the result in the register location that the operand occupied. Figure 9-88 shows a typical absolute/complement/invert block, which operates as follows:

• An absolute (ABS) functional block computes the absolute value

(always positive) of the operand register’s contents. Thus, if register

1000 contains the value –5876, the result of the block instruction will be +5876. This value will be stored in register 1000.

• A complement (COMPL) functional block changes the sign of the operand register’s contents. For example, if register 1000 contains the value +5876, the result of the complement instruction will be –5876.

Similarly, if register 1000 held the value –7654, the result of the complement would be +7654.

10

ABS

COMPL

INV

Absolute

• Makes number positive

• Before execution Reg 1000 = –5,876

• After execution Reg 1000 = +5,876

100

Reg 1000

Complement

• Changes sign of value stored in register

• Before execution Reg 1000 = +5,876 or

Reg 1000 = –7,654

• After execution Reg 1000 = –5,876 or

Reg 1000 = +7,654

Inversion

• Inverts every bit in a register

• Before execution Reg 1000 = 0000 1111 0000 1111

• After execution Reg 1000 = 1111 0000 1111 0000

Figure 9-88.

Absolute/complement/invert functional block.

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• An invert (INV) functional block inverts all of the bits in the operand register. If the binary number in register 1000 is 0000 1111 0000

1111, the number will be 1111 0000 1111 0000 after the instruction, and the block output will be ON when the instruction is finished.

S

ET

C

ONSTANT

P

ARAMETERS

Sometimes a constant value, which will be used later in the program for comparisons or set points must be stored in a register. For this reason, some

PLCs provide a set constant parameters (SET) block instruction, which allows a fixed value to be assigned to a register. When a set constant parameters block is enabled (see Figure 9-89), it sets the referenced register

(register 1000) equal to the value specified (in BCD, binary, etc.) and turns

ON the output when the operation is completed. This instruction is very useful when resetting storage or I/O registers to zero during their initialization.

10

SET

Reg 1000

=

3456

100

Done/Enable

After Execution Reg 1000 = 3,456

Figure 9-89.

Set constant parameters functional block.

I

NCREMENT

An increment (INCR) instruction (see Figure 9-90) increases the contents of a register by one. This instruction is useful, for example, when keeping track of events or the number of executions of a routine. An increment block may also be used with a counter that has a large preset count to keep track of how many times the maximum count has taken place.

10

INCR

Reg 1000

100

Done/

Enable

Before Execution Reg 1000 = 123

After Execution Reg 1000 = 124

Figure 9-90.

Increment functional block.

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S

HIFT AND

R

OTATE

A shift (SHIFT) instruction moves the bits in a register to the right or to the left. Figure 9-91 illustrates the execution of a right-shift instruction. A leftshift instruction is identical, except that the bit is moved in the opposite direction (shifting out the most significant bit). Shift blocks use bit-in and bit-

out variables to specify the location of the bit whose value will be shifted— a bit-in variable is the value to be added to a register, while a bit-out variable is the value to be deleted from a register. These bits can be real I/O locations that can be used to input or output data through the shift operation.

Shift-in Bit

1

MSB Register X LSB

0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

Shift (Right)

Before

MSB Register X LSB

1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0

Shift-out Bit

1

Shift (Right)

After

Figure 9-91.

Right-shift execution.

A rotate (ROT) instruction, like a shift instruction, shifts data to the right or left; but instead of losing the shift-out bit, this bit becomes the shift-in bit at the other end of the register (rotated bit). Figure 9-92 illustrates the operation of a right-rotate instruction.

MSB Register X LSB

1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0

Rotate (Right)

Before

Rotate bit-out

Rotate bit-in

MSB

0

Register X LSB

1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

Rotate (Right)

After

Figure 9-92.

Right-rotate execution.

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Figure 9-93 illustrates functional blocks for both the shift and rotate functions. The control input enables the blocks’ operation. Some block instructions have right and left lines to determine the shift or rotate direction; others may indicate shift-right (SHFR) or shift-left (SHFL) and rotate-right (ROTR) or rotate-left (ROTL) in the instruction. Also, a shift/rotate block may have several variables available inside it, depending on the PLC model. In general,

10

Control

11

Right

Shift

Reg 1000

100 10

Control

ROT

Reg 1000

11

Right

Length 16

100

Bit In 200

12

Left

Bit Out 300

Length 16

# of Bits 1

Bit in or out can be a real I/O address or a bit in a register

(a)

12

Left

# of Bits 1

(b)

Figure 9-93. (a)

Shift and

(b)

rotate functional blocks.

the first register stores the data to be shifted or rotated. If a length is specified, the first register is the starting location. For example (see Figure 9-94), if the length is 3 in a right-shift instruction, then the block operation will encompass

48 bit shifts (16 bits/register

×

3 registers = 48 bits), starting from register 1000 and ending at register 1002. The number of bits indicates the number of bit shifts or bit rotates that take place simultaneously when the control input goes from OFF to ON. Shift and rotate instructions are very useful in applications where a PLC must track the status of inputs along a path of travel (e.g., overhead conveyors in a parts-painting process).

0

Reg 1000

1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0

Reg 1001

1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0

Reg 1002

1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0

Shift Length =

# of Bits =

3 (48 bits)

1

Shift in Bit = 0

Figure 9-94.

Example of a right-shift instruction.

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E

XAMINE

B

IT

An examine bit (XB) functional block examines the status (ON or OFF) of a single point, or bit, in a memory location. This type of instruction is used when “flags” are set during a PLC program and then later tested and compared. A flag is a bit that is specially marked for later examination. In an

examine bit ON (XBON) instruction, the block examines the bit position specified in the register for an ON condition. It then energizes the output if the status of the bit is ON. Conversely, in an examine bit OFF (XBOFF) instruction, the instruction energizes the output if the specified bit is OFF.

Figure 9-95 illustrates an examine bit block.

10

XBON/XBOFF

Reg 1000

Bit 10

100

Examines bit 10 of register 1000 for an

ON (XBON) or an OFF (XBOFF) status.

Figure 9-95.

Examine bit functional block.

E

XAMPLE

9-10

A PLC application controls a batching process where the reading of a temperature input (Batch Temp) is critical to the process. The process’s temperature transducer is connected to a four-channel, 0–

10 VDC analog input module with a 12-bit resolution. The remaining four bits of each channel are used as status indicators for the module

(see Figure 9-96). Illustrate how to test for a fault in this analog input interface’s critical temperature measurement.

S

OLUTION

By testing bit 17 of register 1000 (which is the destination of the critical temperature reading channel) for an OFF condition, we can determine if the channel has failed. Figure 9-97 shows how an XBOFF instruction accomplishes this test. If bit 17 is OFF, a fault has occurred; if it is

ON, the channel is OK. The instruction that drives the logic of this

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Batch Temp

Cooler Temp

Boiler Temp

No Connection

Analog Input

1A

Channel 0: To Register 1000

1B

2A

Channel 1: To Register 1001

2B

3A

Channel 2: To Register 1002

3B

4A

Channel 3: Not Used

4B

Channel OK (ON)

Overflow (ON)

Underflow (ON)

Sign (ON = (–), OFF = (+))

17 16 15 14 13 12 11 10 7 6 5 4 3 2 1 0

Reg 1000

12-bit analog data in BCD format

Figure 9-96.

Analog input interface for a batching application.

instruction is a contact that is closed by the program when the reading of the analog signal takes place. For the instruction to be operational at all times, even when no reading is taking place, the instruction block enable line must be programmed directly to the left power rail without any contact instructions.

Analog

Module

Enabled 100

XBOFF

Reg 1000

Bit 17

Figure 9-97.

A fault has occurred if register 1000 bit 17 is 0 (OFF).

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9-12 D

ATA

T

RANSFER

I

NSTRUCTIONS

Data transfer instructions move, or transfer, numerical data within a PLC, either in single register units or in blocks (a group of registers). These instructions can move data to or from any location in the memory data table, with the exception of user-restricted areas. Typical uses of data transfer instructions are the movement of constant and/or preset values to counters and timers, the reading of analog inputs and multibit input modules, and the transferring of data to output modules.

As with other instructions, data transfer instructions may be in either ladder or functional block format, although block format is most common. The ladder format functions used to transfer data are the get (GET) and put (PUT) instructions (see Figure 9-98), which are generally used with PLCs that provide basic ladder format implementation of arithmetic and data comparison instructions. A GET data transfer instruction accesses data from a certain register, whereas a PUT instruction stores data in a specified register.

10

11

GET

Reg 1000

GET

Reg 1001

GET

Reg 2000

ADD

+

Reg 2000

PUT

Reg 3000

If contact 10 closes, the contents of registers 1000 and 1001 are added and stored in register 2000. If contact 11 closes, the contents of register 2000 are transferred (stored) into register

3000. The contents of register 2000 are not altered.

Figure 9-98.

GET and PUT instructions used in the ladder format.

The functional block group of data transfer instructions forms perhaps the most useful set of functions available in enhanced PLCs, after the basic relay instructions. The names of the data transfer instructions may differ depending on the controller, yet they implement the same transfer functions. Table 9-9 shows the different instructions available with data transfer operations.

M

OVE

A move (MOV) functional block instruction transfers information from one location to another, with the destination location being a single bit or register.

Figure 9-99 shows move bit (MOVB) and move register (MOVR) functional blocks. Some PLCs also offer move byte instructions.

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I n s t r u c t i o n

M o v e

M o v e B l o c k

( P u r p o s e :

D a t a

T o m

T r a n s f e r I n s t r u c t i o n s

o v e n u m e r i c a l d a t a w i t h i n a P L C )

S y m b o l

M O V / M O V B /

M O V R / M O V M

M O V B K

F u n c t i o n

T r a n s f e r s l o c a t i o n t o i n f o r m a t i o n a n o t h e r f r o m o n e

M o v e s d a t a f r o m a g r o u p o f r e g i s t e r l o c a t i o n s t o a n o t h e r l o c a t i o n

T a b l e M o v e

B l o c k

I n / O u t

T r a n s f e r —

A S C I I T r a n s f e r

F i r s t I n – F i r s t

T r a n s f e r

O u t

S o r t

R E G T A B L E /

T A B L E R E G

B K X F E R

A S C I I X F E R

F I F O

S O R T t

T r a n s a b l e t f e o r a s d a t a f r o m r e g i s t e r a b l o c k o r

S t o r e s a m e m o r y b l o c k o r r e g o f d a i s t e r l t a o c i n a t s i o p e c n s i f i e d

T r a n s m i t s p e r i p h e r a l

A S C I I d e v i c e d a t a a n d b e t w e e n a P L C a

C o n s t r u c t s s t o r i n g d a t a a t a b l e o r q u e u e f o r

S o r t s t h e d a t a i n a b l o c k o f r e g i s t e r s i n a s c e n d i n g / d e s c e n d i n g o r d e r

Table 9-9.

Data transfer instructions.

10

MOVB

Reg 1000

Reg 2000

100 10

MOVR

Reg 1000

Reg 2000

100

Status of bit 15 of register 1000 is moved to bit 07 of register 2000

(a)

Contents of register 1000 are moved to register 2000 (destination register can be an I/O register)

(b)

Figure 9-99. (a)

Move bit and

(b)

move register functional blocks.

Some PLCs perform a move function to special word table locations. In this case, the PLC automatically coverts the copied data to the proper numerical format for the destination location. For example, a register or word might contain a BCD value that, when transferred to another register or word, is stored as a binary value, thus executing a BCD-to-binary conversion within the move instruction.

Another type of move instruction, a move mask (MOVM) instruction, masks certain bits within the register. Figure 9-100 illustrates this type of move block. The move mask block transfers the data in register 1000 to register

1100, with the exception of the bits specified by a 0 in the mask register 2000.

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9

10

MOVM

Reg 1000

Mask

Reg 2000

100

Reg 1100

Move with mask

Reg: 1000 = 0110 1000 1001 0101

Reg: 2000 = 0000 0000 1111 0000 Mask

Reg: 1100 = 0000 0000 1001 0000 only bits passed

Figure 9-100.

Move mask functional block.

Yet another move instruction found in some controllers is the move status instruction. This block function transfers system or I/O module status data to a storage/result register. This information can then be masked, compared, or examined to determine the status of major or minor faults in the system or an

I/O module. With this information, the controller can take corrective action through the control program, if necessary.

M

OVE

B

LOCK

A move block (MOVBK) instruction copies a group of register or word locations from one place to another. The length of the block is generally userspecified. Figure 9-101 illustrates a move block instruction. When energized, the control input triggers the execution of this block. The block function then transfers data from locations 1000 through 1023 (length = 20) to locations

2000 through 2023, respectively. The data in registers 1000 through 1023 is left unchanged. In some PLCs, the user can specify how many locations can be transferred during one scan (rate per scan).

10

MOVBK

Reg 1000

Length 20

Reg 2000

100

Reg 1000

Reg 1001

Reg 2000

Reg 2001

Move

Reg 1023 Reg 2023

Figure 9-101.

Move block functional block.

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T

ABLE

M

OVE

A table move instruction transfers data from a block or table to a register or word in memory. There are two types of table move instructions: table-to-

register (TABLE-REG) and register-to-table (REG-TABLE). The main characteristic of a table move block is the manipulation of a pointer register, which specifies the particular table location in which the register or word value will be stored. Figure 9-102 shows a table move block.

10

Control

TABLE REG

Reg 2000

100

Enable

11 Increment

Pointer

Length 08

Pointer 1000

101

End of table

12

Reset

Pointer

Reg 3000

10

Control

REG TABLE

100

Reg 3000 Enable

11 Increment

Pointer

Pointer 1000

Reg 2000

101

End of table

12

Reset

Pointer

Length 08

Reg 2000

Table

Pointer register points to

4th location (Reg 2003) and transfers its contents to register 3000.

Reg 2003

Reg 2007

9876

3760

4

Pointer

Register

Reg 1000

Reg 3000

Destination

Register

Reg 2000

Reg 2002

Table

5876

Pointer register points to

3rd location (Reg 2002) and transfers its contents to register 3000.

3

Pointer

Register

Reg 1000

5876 Reg 3000

Source

Register

Reg 2007

Reg 2000

Table

Pointer register points to

5th location (Reg 2004) and transfers its contents to register 3000.

Reg 2004

9876

3760

Reg 2007

(a)

5

Pointer

Register

Reg 1000

3760 Reg 3000

Destination

Register

Reg 2000

Reg 2003

Table

5876

9850

Pointer register points to

4th location (Reg 2003) and transfers its contents to register 3000.

4

Pointer

Register

Reg 1000

9850 Reg 3000

Source

Register

Reg 2007

(b)

Figure 9-102. (a)

Table-to-register and

(b)

register-to-table functional block.

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The transition of the control input from OFF to ON enables a table move instruction, which then increments the contents of the pointer register every time the middle input, the increment (INCR) pointer, transitions from OFF to

ON. The bottom input of the table move block resets the pointer to zero

(initialize to top of table). If data must be stored to or retrieved from a specific table location, the pointer register can be loaded with the appropriate value, which points to the specified location. A set parameter or move register instruction loads this information prior to the table move.

Referencing Figure 9-102, the length specifies the number of word locations in the table to be moved (8 in this example), beginning at the starting location

(register 2000). After the table move block transfers the data from these eight locations, it energizes the top output. It energizes the middle output when the pointer register has reached the end of the table.

Applications of the table move instruction include the loading of new data into a table, the storage of input information (e.g., analog) from special modules, and the input of error information from a controlled process. It is also useful when changing preset parameters in timers and counters and when simultaneously driving a group of 16 outputs through I/O registers. A table move instruction is also used when looking up values in a table for comparison, linear interpolation, etc.

E

XAMPLE

9-11

A batching system operates during an eight-hour shift, where several batch sizes are processed at the rate of approximately one batch per hour. Implement instructions to store the batch information, including the batch size in gallons and the time of day when the batch was finished. Register 1000 holds the value of the total batch, while register

1500 holds the time of day (in hours and minutes) in BCD format

(HHMM).

S

OLUTION

Figure 9-103 illustrates a register-to-table instruction that will transfer the outputs of registers 1000 and 1500, using the same pointer register to store the information to two tables simultaneously. This ensures that the pointer points to a batch amount that corresponds to the time of the batch (see Figure 9-104). The Batch Done signal, perhaps coming from the opening of the discharge valve, triggers the register-to-table instruction. Once the storing of the register into the table has taken place, the instruction’s enable/done output increments the pointer.

The pointer is incremented in only one of the blocks to avoid a double

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9 increment. The increment occurs after both register-to-table instructions have been executed to ensure that the data is stored by the same pointer counter. Note that the Batch Done signal is a transitional contact, so the register-to-table instruction only transfers the register data once to its appropriate table location.

Batch Done

Control

REG TABLE

Reg 1000

Incr

Pointer 2000

Reg 3000

New Day

Reset

Length 08

400

401

Batch Done

Control

REG TABLE

Reg 1500

402

Incr

Pointer 2000

Reg 4000

New Day

Reset

Length 08

402

403

Figure 9-103.

Register-to-table instruction used for storing batch information.

7

8

5

6

3

4

1

2

Table

8-Hour Shift

Table 3000

323

401

378

303

350

400

320

318

R3000

R3001

R3002

R3003

R3004

R3005

R3006

R3007

Batch

(in gallons)

7

8

5

6

3

4

1

2

Table

Time of Day

Table 4000

0714

0823

0914

1017

1130

1224

1330

1422

Time

(in hr: min)

R4000

R4001

R4002

R4003

R4004

R4005

R4006

R4007

Figure 9-104.

Table 3000 stores batch sizes and table 4000 stores the time of day the batches were completed.

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B

LOCK

T

RANSFER

—I

N

/O

UT

Some PLCs provide block transfer (BXFER) instructions, which are primarily used with special I/O modules to transfer blocks of data. The two basic types of block transfers are block transfer in and block transfer out. Figure

9-105 shows a block transfer in/out instruction. The module address location of the transfer data may be explicitly marked as the rack and slot location of the interface. For example, the block transfer input in Figure 9-106 shows that the contents to be read from the intelligent module (rack 01, slot 03, 8 channels) will be stored in registers 1000 through 1007.

BKXFER

IN or OUT

Rack

Slot

Length

Register

Enable/Done

The rack and slot indicate the location of the input or output module. The rack and slot entries in the block may be combined into one address in some PLCs.

Figure 9-105.

Block transfer in/out functional block.

10

BKXFER IN

Rack 01

Slot 03

Length 08

Reg 1000

100

00 01 02 03 04 05 06 07 Slot

Rack 01

Contents Register

Channel 0

Channel 1

1000

1001

Channel 2

Channel 3

Channel 4

Channel 5

Channel 6

Channel 7

1002

1003

1004

1005

1006

1007

Figure 9-106.

Block transfer in instruction.

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The control input, when enabled, executes a block transfer instruction. During a block transfer in function, the instruction stores data about the I/O module in memory locations or registers starting at the specified register location. The block length specifies how many locations are needed to store the I/O module data. For example, the data from an analog input module with four input channels can be read all at once, if the length is specified as four. A block transfer out instruction operates in a similar manner, with the address of the output module determining the destination of the data transfer. The top output of the block transfer instruction, when energized, signals the completion of the transfer operation.

ASCII T

RANSFERS

An ASCII transfer (ASCII XFER) instruction transmits ASCII-formatted data between a PLC and a peripheral device. This functional block, which is under program control, operates in conjunction with an ASCII communications module. The communication of ASCII data usually occurs in two ways: reading data from a peripheral or writing data to a peripheral. This functional block is widely used in applications that require report generation. Figure

9-107 illustrates a typical read/write ASCII functional block.

10

ASCII

XFER (IN/OUT)

Reg 4000

Length 64

Rack 01

Slot 04

100

A total of 64 ASCII characters are sent (XFER OUT) or received (XFER IN). Each register location holds 2 characters (one character per byte).

Figure 9-107.

ASCII transfer in/out functional block.

The control input activates an ASCII transfer (in or out) instruction. When reading data, the instruction allows the special I/O module to perform a read function. The processor then reads the data from the module and stores it in special memory locations (from the first register to the last, as specified by the length). The I/O address in the block indicates the location of the module. When writing data, the processor transfers information from the location where it is stored to the address where the module is located.

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Some ASCII transfer instructions use a pointer register to access specific characters in the table (e.g., to decode a specific input character from the data table). Other ASCII instructions allow the user to specify how many bytes or characters are transmitted during a scan. The speed of transmission (baud rate) is a function of the scan time, which depends on the number of ASCII devices that are active at one time. An ASCII transfer instruction assumes that proper baud rates, start/stop bits, and parity have been established in the I/O module hardware.

FIFO S

TACK

T

RANSFERS

A first-in–first-out (FIFO) instruction constructs a table or queue where data is stored. The basic function of this operation is similar to a shift register instruction, in which one word (16 bits) is shifted within the stack each time the instruction is executed. The data is always shifted in the order in which it was received—the first word shifted in will be the first word shifted out. FIFO is, in essence, a first-come–first-served format. Figure 9-108 shows a typical

FIFO block instruction.

10

20

FIFO (IN/OUT)

Control

Reset

Reg IN 2000

Length 08

Reg Stack 2000

Reg OUT 3000

100

Enable

101

End of table

Contents

7777

9000

9001

9002

9003

9004

9005

9006

9007

Reg 2000

Reg 1000

1001

1002

1003

1004

1005

1006

Reg 1007

7777

9000

9001

9002

9003

9004

9005

9006

Contents

Reg 2000

Reg 1000

1001

1002

1003

1004

1005

1006

Reg 1007

Reg 3000

Before FIFO Shift

9007 Reg 3000

After FIFO Shift

Figure 9-108.

FIFO functional block.

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A FIFO operation consists of two parts: a FIFO input (FIFO IN) instruction and a FIFO output (FIFO OUT) instruction. The FIFO IN instruction loads the queue, while the FIFO OUT instruction unloads it. FIFO instructions are useful for storing, and later retrieving, large groups of temporary data as it is received. A typical application of a FIFO instruction is the storage and retrieval of data that is synchronized to the external movement of parts on a conveyor or transfer machine.

An OFF-to-ON transition of the control input logic initiates a FIFO block.

Some blocks may have a reset signal to reset the FIFO stack (clear stack). For a FIFO instruction, the register in holds the data that will be transferred to the queue. This data is placed in the FIFO stack when the control input is ON.

The data in the last position of the stack is output through the register out. The

FIFO length specifies the length of the stack.

The FIFO instruction is very useful when trying to keep the values obtained from a process in a “moving window.” For example, Figure 9-109 illustrates a temperature profile as a function of time. If the desired window is from t

0 to t

1

, the values can be kept in a FIFO stack. Thus, the stack will always contain the last t

0

t

1 values.

°

C

Temperature In

Temperature at time t

0

High Limit

Temperature values stored

Low Limit t

0

Time Window t

1

Time

Temperature Out

Figure 9-109.

Temperature profile.

Temperature at time t

1

S

ORT

The sort (SORT) block function sorts a block of registers, in ascending or descending order, according to their contents. Figure 9-110 shows a sort block in which the closing of contact 10 enables the instruction. This block sorts registers 1000 through 1017 in ascending order and then stores the results in registers 2000 through 2017. This type of function is very useful when

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9 computing the median of sample readings—an operation that requires the sample to be in numerical order. PLCs provide either ascending, descending, or both types of sorting.

10

SORT (ASC)

Source Reg 1000

Length 16

Reset Reg 2000

1000

Figure 9-110.

Ascending sort functional block.

9-13 S

PECIAL

F

UNCTION

I

NSTRUCTIONS

As the name implies, special function instructions perform operations that do not fall under any other PLC instruction categories. These functions are usually available in medium to large controllers. Table 9-10 lists the common special function instructions.

S e q u

( P u r p o s e :

S p

T o

e c i a l

a ll o w

F u n c t i o n

s p e c i a

I n

il z e d

s

o

t r u c

p e r a

t i o n s

t i o n s i n a P L C )

I n s t r u c t i o n S y m b o l

e n c e r S E Q

F u n c t i o n

O u t p u t s o r e v e n t d a t a d r i v e i n n a m t i m a n e d n e r r i v e n

D

P

D r i e a o r i g p v n o a o r t i t i s o v t i e c n a l I n t e g r a l -

D

P

I

I

A G

D

C o m w i t h p a r r e f e e s r e n a c t c e u a l i n p u t d a t a d a t a

P r o v o f a i d e s c l o s e d l o o p p r o c e s s c o n t r o l

Table 9-10.

Special function instructions.

S

EQUENCERS

A sequencer (SEQ) block is a powerful instruction that simulates a drum timer. A sequencer is analogous to a music box mechanism, in which each peg produces a tone as the cylinder rotates and strikes the resonators. In a sequencer, each peg (bit) can be interpreted as a logic 1 and no peg as a logic 0.

A sequencer table, which is similar to a spread-out music box cylinder, provides sequencer information. Figure 9-111 illustrates a cylinder and sequencer table comparison. The number of bits in a sequencer can vary from

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8 to 64 or more. The width of the table may also vary, as may the size of a cylinder. Through I/O registers, which map real output points, each step in a sequencer table can become an output representing one of the pegs.

Cylinder

Steps

2

3

4

5

1

Rotation

Bit locations in table

Drum

Table

Steps

1

2

3

4

5

1 1 1 1 0 0 1 1 0 0 1 0 1 0 1 1

0 0 1 1 0 0 0 0 1 0 1 0 1 0 0 0

1 1 0 0 1 1 1 1 0 1 0 1 0 1 1 1

0 1 0 1 0 1 1 0 0 0 1 0 1 0 1 0

1 0 1 1 0 0 0 1 1 1 0 0 1 0 0 1

1 = Energize

0 = De-energize

Figure 9-111.

Comparison of a music box cylinder and a sequencer table.

Figure 9-112 shows a typical sequencer functional block. An OFF-to-ON transition of the control input initiates this block, causing the contents of the sequencer table to be output in a sequential manner. The pointer register points to each step being output (i.e., the table register location). Every time the control input is energized, the pointer register is automatically incremented, thus pointing to the next table location. Depending on the PLC, either an event or time may drive the control input line; therefore, sequencers may be either event driven or time driven. A reset pointer input can reset the pointer register to zero (point to step 1), if needed. The sequence length and width specify how many steps and bits are in the table, respectively. Whenever the sequencer instruction is enabled, it energizes the block’s first output.

The second output indicates the end of the sequencer table.

Control

Reset

Pointer

10

20

SEQ

Table Reg 1000

Pointer 2000

Length 05

Width 16

Out Reg 3000

100

101

Enable

End of

SEQ Table

Figure 9-112.

Sequencer functional block.

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E

XAMPLE

9-12

A PLC application calls for the implementation of ten different steps that take place in a sequential manner. For the purpose of detecting a fault in a troubleshooting condition, the process step code, as shown in Figure 9-113, should be revealed in a seven-segment display to the operator. Implement an instruction block that will satisfy this application.

Step

8

9

6

7

10

3

4

5

1

2

Code

1023

4576

4588

5101

5130

5417

5418

7809

7810

7900

Figure 9-113.

Process step code.

S

OLUTION

Figure 9-114 shows a way to display the code number using a 16-bit register output connected to a four-digit, seven-segment display. A sequencer instruction transfers the codes from the sequencer table to the output register. The output register matches (i.e., is mapped to) the location of the 16-bit output interface (i.e., rack 0, slot 7, corresponding to word 07). Every time the Start of Process Step signal goes from

OFF to ON, the sequencer will output the process code to the indicator.

Start of

Process

Step

Begin

Process

Step 1

Control

Reset

SEQ

Table Reg 1000

Pointer 2000

Length 10

Width 16

Out Reg 07

400

401

Note: The contents of Reg 2000 (the pointer) are the table register location starting at

1000 (1st location).

Figure 9-114a.

Sequencer instruction block.

Storage

Area

1023

4576

4588

5101

5130

5417

5418

7809

7810

7900

Contents in

BCD

Reg

1000

1001

1002

1003

1004

1005

1006

1007

1008

1009

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Figure 9-114b.

Seven-segment display.

D

IAGNOSTICS

A diagnostics (DIAG) block instruction compares two memory blocks, one containing actual input conditions and the other containing a reference condition. The instruction compares these blocks bit by bit to determine if they are identical. If a miscomparison occurs, the instruction stores the bit number and the state of the bit in a holding register. Diagnostic instructions are useful for signaling machine malfunctions.

Figure 9-115 illustrates a diagnostic function block. An energized control input initiates the block function. The block then compares the contents of the first register locations (1000 through 1007) with the contents of the second

10

DIAG

Ref Reg 1000

Source Reg 2000

Length 08

Reset Reg 3000

100

101

Enable/Done

Miscompare

1 0 1 0 0 0 1 0 0 1 1 1 0 1 1

0 0 1 1 0 0 1 1 0 1 0 1 0 1 0

0 1 0 1 1 0 0 0 0 1 1 1 0 0 1

1 0 1 0 0 0 1 0 0 1 1 1 0 1 1

0 0 1 1 1 0 1 0 0 1 0 1 0 1 0

1 1 1 0 0 1 1 0 0 1 1 0 0 1 0

1 0 1 0 1 1 0 0 0 1 1 1 0 0 1

0 0 1 0 0 1 1 0 0 1 0 0 1 1 0

Reg

1000

1001

1002

1003

1004

1005

1006

1007

1 0 1 0 0 0 1 0 0 1 1 1 0 1 1

0 0 1 1 0 0 1 1 0 1 0 1 0 1 0

0 1 0 1 1 0 0 0 0 1 1 1 0 0 1

1 0 1 0 0 0 1 1 0 1 1 1 0 1 1

0 0 1 1 1 0 1 0 0 1 0 1 0 1 0

1 1 1 0 0 1 1 0 0 1 1 0 0 1 0

1 0 1 0 1 1 0 0 0 1 1 1 0 0 1

0 0 1 0 0 1 1 0 0 1 0 0 1 1 0

Reg

2000

2001

2002

2003

2004

2005

2006

2007

If a miscomparison occurs, output 101 will be ON.

Figure 9-115.

Diagnostics functional block.

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9 reference register locations (2000 through 2007). If it finds a difference, it stores this information in the result register (register 3000) without altering the contents of the other register locations. When the instruction is finished, it energizes the top output. The instruction energizes the second output if a miscomparison occurs.

The controlled machine generally determines the reference conditions for inputs and outputs. However, some controllers allow reference conditions to be “taught” to the PLC. These controllers gather reference teaching conditions using sequencer input, block transfer in, and other instructions, depending on the model used.

PID

PLCs that are capable of performing analog control using the PID algorithm use proportional-integral-derivative (PID) functional blocks. The user specifies certain parameters associated with the algorithm to control the process correctly. Figure 9-116 illustrates a typical PID block.

10

15

Control

Track

PID

IVR 110

OVR 120

PR 1000

IR 1001

DR 1002

SPR 2000

100

Register 110 maps analog input module

Register 120 maps analog output module

Figure 9-116.

PID functional block.

An energized control input enables a PID block’s automatic operation. The bottom input track, when energized, determines whether the PID variables are being tracked but not output. If the block is not enabled (i.e., in manual mode), the controller can still track the variables when the track line is enabled. The user specifies the input variable register (IVR) and the output variable register

(OVR), which are associated with the locations of the analog modules (input and output). The proportional register (PR), integral register (IR), and derivative register (DR) hold the gain values that must be specified for the three parts of the control process. The set point register (SPR) holds the target value for the process set point. Depending on the controller, the user can specify other block variables, such as dead times, high and low limits, and rate of update. The top output of the PID block indicates an active loop

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9 control, while the middle and bottom outputs indicate low- and high-limit alarms, respectively. Some PLC manufacturers provide a fill-in-the-blanks screen (see Figure 9-117) during the programming of a PID instruction, so that the user can input the different parameters.

PID LOOP#

(1-64)

TITLE:

(8 charac.)

PID LOGORITHM:

(Position or Velocity)

LOOP FLAG ADDRESS:

(WY, V, C, NONE)

PROCESS VARIABLE ADDRESS:

(WX, WY, V)

SQUARE ROOT OF PV?

(Yes or No)

PV RANGE: HIGH:

(Eng. Units)

LOW:

(Eng. Units)

SAMPLE RATE:

(0.1 to 6553.5 secs)

DERIVATIVE GAIN LIMITING

COEFFICIENT. . .

(Eng. Units)

SPECIAL CALCULATION ON:

(PV or SP)

LOCK SP?

(Yes /No)

LOCK AUTO/MANUAL?

(Yes /No)

LOCK CASCADE?

(Yes /No)

PV IS BIPOLAR?

(Yes /No)

20% OFFSET?

(Yes /No)

PERFORM DERIVATIVE

GAIN LIMITING. . .

(Yes /No)

SFPGM NUMBER

RAMP/SOAK FOR SP

(Yes or No, Yes forces Remote Setpoint to No)

REMOTE SETPOINT?

(Yes or No)

REMOTE SP ADDRESS:

CLAMP SETPOINT LIMITS: HIGH:

(Eng. Units or No entry)

(WX, WY, V, or K)

LOW:

(Eng. Units or No entry)

ERROR OPERATION:

(Squared, Deadband, None)

Figure 9-117.

Fill-in-the-blanks screen.

Some controllers provide PID capabilities without the PID block instruction.

In this case, the controller uses a special PID module that contains all of the input/output parameters. An output instruction, such as block transfer out or move data, transfers the set point and gain parameters to the module during initialization of the program. The control program can alter this module data if any parameter changes are required. Chapter 15, which explains process controllers and loop tuning, provides more information about PID control.

9-14 N

ETWORK

C

OMMUNICATION

I

NSTRUCTIONS

Local area networks (LANs) provide communication channels between independent computers (referred to as nodes) located in a small radius.

Because they connect different computers, LANs have created a need for instructions that communicate and exchange information between the PLCs in a network. Therefore, PLC manufacturers now offer network communi-

cation instructions, which transfer information like contact status, output coil status, and register status between PLCs. These network instructions are often specific to the manufacturer’s family of PLCs.

Table 9-11 describes typical instructions used in a PLC network environment. These instructions are very easy to implement; however, the programmer must enforce compliance with the PLC network’s rules. Also, the programmer should assign registers and organize the program to avoid confusion on the network.

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N

N

N

N

S e e e e e t t t t n

G e t

( P u r p o s e : T o

N e t w o r k

a ll o w c o

C o

m m

m m

u n i

u n i c a

c a t i o n

t i

t

o n

h r o

I n

u g

s

h

t r u

a l

c t i o n s

o c a l a r e a n e t w o r k )

I n s t r u c t i o n S y m b o l

w w w w d

N o o o o r r r r

N o k k k k o d

O

C

S

R d e e u o e e t n n c p t d e a i u v t c t e

S

N

E

G

N

E

N

E

E

T

T

NET

LBL

T

D

S

R

N

N

E

C

O

O

N

V

D

D

D

E

E

F u n c t i o n

f

P a s s e s r o m a P o n e b i t

L C t o a s t a t u s n e t w o i n r k f o r m a t i o n

C a p t u r e s a n e t w o r k s t a t u s o u t p u t i n f o r m a t i o n f r o m

S e n d s n e t w o r k r e g i s t e r i n f o r m a t i o n t o a

C a p t u r e s i n a a n e t w o r k v a li a b l e r e g i s t e r d a t a

S e n d s n o d e i n r e g i s t e r a n e t d a w o r k t a t o a s p e c i f i c

R e t r i e s p e c i f i c v e s n o d r e e i g i n s t a e r d a t a n e t w o r k f r o m a

Table 9-11.

Network communication instructions.

Once a PLC executes a network communication instruction and updates it at the EOS, the processor passes the information to the network hardware

(modules or internal boards) for processing and transmission. The format of the instruction may differ, depending on the controller—some controllers use data transfer instructions to access the network, while others use specific instructions. Therefore, the instructions presented here are guidelines to illustrate implementation.

The organization of a network depends on how it is configured. In some controllers, the network interface is built into the main CPU, while in others, it is in an interface module. Regardless of format, both network interfaces perform the same function—network communications. If a PLC’s network interface is installed in the I/O racks, the manufacturer may provide one of a number of ways to set up that particular PLC for the network. Some PLCs may configure the network during the configuration stage, when the network module slot location is specified. Other controllers may automatically recognize where the network interface is located. Yet in other PLCs, a network software instruction, similar to a block transfer in or block transfer out instruction, specifies the network module’s slot location.

The output coils and contacts in a network may be referred to as network

outputs and network contacts, while the registers in a network may be called

network registers. Network outputs are internal outputs that are often located in a special area of the data table, along with the network registers. These network elements may be part of an internal storage area with additional LAN capabilities. For example (see Figure 9-118), if a PLC has 512 possible

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9 internal outputs, 64 of them may be used as network outputs; likewise, if it has

128 storage registers, 32 of them may be used as network registers. These network-mapped addresses, if used, will be sent automatically if the network is active. Chapter 18 explains local area network operation and configuration more extensively.

0000

512

Real I/O

512

Internals

0037

17 16 15 14 13 12 11 10 7 6 5 4 3 2 1 0

0040

0043

64 compatible internal outputs with network addresses

4000 through 4317

128

Storage

Registers

0077

R0100

17 16 15 14 13 12 11 10 7 6 5 4 3 2 1 0

R0137

32 compatible storage registers with network addresses R0100 through R0137

R0277

Figure 9-118.

Mapping of network-compatible addresses with all numbers in octal.

Now, let’s explore the operational function of some network instructions. In this discussion, we will assume that the programmable controller specifies the slot location of the network interface during the total system configuration. If this was not the case, then the PLC would require a slot entry specification for each instruction.

N

ETWORK

O

UTPUT

A network output instruction, shown in Figure 9-119, is used in conjunction with a network contact to pass one-bit status information from a PLC to the network. If continuity exists in the logic path of the network output, the network output instruction will turn ON its corresponding reference address.

It will then send the information about the status of the reference address to the network interface for LAN transmission. Depending on the controller, the reference address must be a valid network coil. After transmission, the status of the output is available to all network stations or nodes (PLCs).

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PLC #1

At the EOS, the processor sends the status of all network coils used in PLC #1.

10 12 Net 100

Coil

Net 100 = 0

PLC #2

During the read section of the scan, the processor of PLC #2 reads the status of all network outputs and uses this data in its program.

Contacts

Net 100

Open

Net 100 300

20

10 12 Net 100

Coil

Net 100 = 1

Contacts

Net 100

Closed

Net 100

20

300

Figure 9-119.

Operation of a network output coil and a network contact instructions.

Note that contact 20 in PLC #2 is a local contact.

N

ETWORK

C

ONTACT

NET

LBL

A network contact instruction captures the status information from a network output. The reference address of the network contact must be the same as that of an active network output; otherwise, the contact (examine ON or examine

OFF) will never be evaluated. The reference must also be a valid reference address, which may differ among PLC manufacturers.

Figure 9-119 illustrated the operation of a network contact instruction used in conjunction with a network output instruction. In this instruction, the processor obtains information from the network as it reads the inputs, during which it reads the status buffer of the network module as though it were a small data table. If the referenced network output address is logic 1, the controller will perform an evaluation and open or close the referenced contacts to provide or remove continuity. This evaluation depends on how the network contact is programmed (normally open or normally closed).

N

ETWORK

S

END

A network send (NET SEND) instruction sends register information to a local area network. The activation of this functional block is the same as for other blocks—if the rung is TRUE, then the instruction is performed, sending

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9 the contents of the register to the network line. The instruction may provide two outputs to indicate that the operation has been performed and that no error was detected (output 1 and output 2, respectively).

Figure 9-120 illustrates a typical network send instruction block. If the specified length is more than one, the network may receive several transmitted registers; the registers to be transmitted will start at the first register and end at last register (first + length). A network send instruction generally operates in conjunction with a network receive instruction.

PLC #1 PLC #2

10

NET SEND

Reg 400

Length 04

100

101

20

NET RCV

Reg 400

Length 04

Dest

Reg 1000

200

201

(a)

The contents of network registers 400 through 403

(length = 4) are sent to the network at EOS.

(b)

The contents of network registers

400 through 403 are received by

PLC #2 and stored in registers

1000–1003.

Figure 9-120. (a)

Network send and

(b)

network receive instructions.

N

ETWORK

R

ECEIVE

A network receive (NET RCV) block function captures the available registers in the network’s lines and stores their information in the receiving

PLC’s data table (register area). The user must make sure that the register information requested (i.e., register address numbers) matches the addresses used by the NET SEND instructions. For instance, if a NET SEND instruction uses network registers 400 to 403 (length of 4), the PLC that will retrieve those network registers must reference the same network registers in its NET RCV instructions.

Figure 9-120 illustrated the use of a network receive instruction. Once a network instruction captures the register information, it stores the data in the destination register(s), as specified by the length of the block. Of the two outputs available, the first one represents the completion of the operation, while the second one indicates if an error has occurred.

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S

END

N

ODE

A send node (SEND NODE) instruction operates in a more direct way than a network send function. This instruction transmits register information to specific PLCs (nodes) connected to the network. Essentially, a send node function implements a copy to function, where several registers from the sending node are written to another node.

Figure 9-121 illustrates a send node instruction. Continuity in the instruction’s control line enables the block, which sends the contents of the starting register through the last register to the specified node. The block stores the information from the starting register through the last one in destination registers. The completion of the instruction turns ON the first output, while a network error condition energizes the second output.

PLC #1

Node 05

10

Send Node

Reg 400

100

Length 01

Enable/Done

To Node 10

101

Reg 1000

Error

PLC #2

Node 10

Reg 400 Reg 1000

The contents of network register

400 are sent (written) to register

1000 of the PLC with node address

10 (PLC #2).

Figure 9-121.

Send node functional block operation.

G

ET

N

ODE

A get node (GET NODE) instruction retrieves register information from another PLC node. This instruction essentially copies the register from the requested node to the requesting node.

Figure 9-122 illustrates the use of a get node function. When the block is enabled, it requests the contents of the specified registers in the target node and stores the data in the destination registers of the PLC executing the get

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9 node instruction. The first output is energized when the instruction is completed; the second output is energized if a communication error occurs during network transmission.

PLC #1 PLC #2

Node 05

Reg 400

401

(length = 2)

Reg 1000

1001

The contents of registers

400 and 401 in the sending node 05 are retrieved and stored by the receiving node (node 10) in registers

1000 and 1001.

10

Node 10

GET Node

Node 05

Reg 400

Length 02

100

Enable/Done

101

Dest

Reg 1000

Error

Figure 9-122.

Get node functional block operation.

9-15 B

OOLEAN

M

NEMONICS

As discussed in Section 9-2, Boolean mnemonics is a PLC language based primarily on the Boolean operators AND, OR, and NOT. A complete Boolean instruction set consists of the Boolean operators and other mnemonic instructions, which implement all of the functions of the basic ladder diagram instruction set. A mnemonic instruction is written in an abbreviated form, using three or four letters that imply the operation of the instruction. Table 9-

12 lists a typical set of Boolean instructions and their equivalent ladder diagram symbols. The Boolean language is used to enter logic into a PLC’s memory. However, a PLC may display the entered Boolean information as a ladder diagram on the programming terminal.

Enhanced Boolean output operators, which perform additional control functions, are a result of further enhancements to the Boolean instruction set.

Figure 9-123 shows a short Boolean program and its equivalent ladder diagram representation. Chapter 3 discusses the principles of Boolean algebra, which are applied in the Boolean language. The next chapter illustrates other forms of Boolean programming utilizing the IEC 1131-3 instruction list language.

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22

23

25

15

16

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21

10

12

13

11

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17

24

Programming

Languages

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Boolean

100

STR of LD

OR

AND NOT

OUT

10

12

11

100

T 200

PR: 10

TB: 1 Sec

MCR 210

STR of LD NOT

AND

TMR

ENT

13

14

200

10

401

101

STR of LD

MCR

STR of LD

AND

OUT

STR of LD

OR NOT

OUT

15

210

16

17

401

20

21

101

END 210

END 210

CTU 220

PR: 5

102

STR of LD

CTU

ENT

22

220

5

STR of LD

AND NOT

OR

OUT

23

24

25

102

Figure 9-123.

Boolean program and its ladder diagram representation.

K

EY

T

ERMS arithmetic instructions

Boolean language coil contact counter instructions data manipulation instructions data transfer instructions double-precision arithmetic enhanced ladder language

Grafcet ladder language ladder relay instructions ladder rung matrix

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program/flow control instructions timer instructions

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IEC 1131 S

TANDARD AND

P

ROGRAMMING

L

ANGUAGE

Thought is the blossom; language the opening bud; action the fruit behind it.

—Henry Ward Beecher

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H

IGHLIGHTS

As we have discussed in the previous chapters, programming a PLC can be a difficult task due to increased interlocking requirements in the control program as it becomes larger and more complicated. Additionally, each PLC manufacturer offers a different set of instructions within its PLC family.

Many of these instruction sets are not applicable to other PLCs, and there is no easy way to translate an already written PLC program to another brand of

PLC’s programming format.

In this chapter, we will introduce you to the IEC 1131 standard, which attempts to simplify and standardize PLC programming. We will explain the languages used with the IEC standard, as well as discuss how these languages are implemented in the control program using sequential function charts to ease interlocking. Moreover, we will explain how some manufacturers use the IEC standard to implement a PLC-like environment without a programmable controller.

10-1 I

NTRODUCTION TO THE

IEC 1131

The International Electrotechnical Commission (IEC) SC65B-WG7 committee developed the IEC 1131 standard in an effort to standardize programmable controllers. One of the committee’s objectives was to create a common set of PLC instructions that could be used in all PLCs. Although the IEC 1131 standard reached the status of international standard in August

1992, the effort to create a global PLC standard has been a very difficult task to accomplish due to the diversity of PLC manufacturers and the problem of program incompatibility among PLC brands. However, the inroads that have been made so far have had a tremendous impact on the way PLCs will be programmed in the future.

The IEC 1131 standard for programmable controllers consists of five parts:

• general information

• equipment and test requirements

• programming languages

• user guidelines

• messaging services (communications)

Although there are five parts in the IEC 1131 standard, the third part— programming languages—provides all of the information about instructions and programming standards. The other four sections describe the different guidelines to be used for the testing and communication of language instructions, as well as the methodology that must be employed by the programmable controller user.

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The IEC 1131 programming language standard is referred to as the IEC

1131-3 programming standard, since part 3 of the standard deals with programming languages—hence the dash three (-3). In this chapter, we will refer to the actual programming language as the IEC 1131-3 standard and to the overall standard as the IEC 1131.

L

ANGUAGES AND

I

NSTRUCTIONS

The IEC 1131-3 standard defines two graphical languages and two textbased languages for use in PLC programming. The graphical languages use symbols to program control instructions, while the text-based languages use character strings to program instructions.

Graphical languages

• ladder diagrams (LD)

• function block diagram (FBD)

Text-based languages

• instruction list (IL)

• structured text (ST)

Additionally, the IEC 1131-3 standard includes an object-oriented programming framework called sequential function charts (SFCs). SFC is sometimes categorized as an IEC 1131-3 language, but it is actually an organizational structure that coordinates the standard’s four true programming languages (i.e., LD, FBD, IL, and ST). The SFC structure is much like a flowchart-type of programming framework, utilizing different languages for different control tasks and also routing control program actions. The SFC structure has its roots in the early French standard of Grafcet (IEC 848).

The IEC 1131-3 standard is a graphic/object-oriented block programming method, which increases the programming and troubleshooting flexibility of its programmable controllers. It allows sections of a program to be individually grouped as tasks, which can then be easily interlocked with the rest of the program. Thus, a complete IEC 1131-3 program may be formed by many small task programs represented inside SFC graphic blocks. The combination of languages available in the IEC 1131-3 standard also enhances PLC programming and troubleshooting by providing not only a better programming language, but also a better method for implementing control solutions.

The IEC 1131-3 uses a wide variety of standard data functions and function blocks, which operate on a large number of data variable types. Table 10-1 shows some examples of these data types and functions, as well as some typical function blocks. Data variable type refers to the kind of data received by the controller (e.g., binary, real numbers, time data, etc.), while data

functions are the operations performed on the data (e.g., comparison, invert,

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10 addition, etc.). Function blocks are sets of data function instructions that work on blocks of data. Moreover, variable scope refers to the extent that a variable can be used in an application. For example, global variables can be used by any program in an application, while local variables can only be used by one particular program. Note that, in addition to the standard types of variables, functions, and blocks, the IEC 1131-3 allows for other types of vendor- and user-defined PLC programming elements. Thus, the IEC 1131-3 does not specify a set number of programming features, but rather establishes the groundwork for standard and additional functions.

V a r i a b l e s

D a t a v a r i a b l e t y p e s

D a t a f u n c t i o n s

F u n c t i o n b l o c k s

V a r i a b l e s c o p e

D e s c r i p t i o n

• B i t b a s e d s t r i n g s ( B o o l e a n o r b i t , b y t e , w o r d )

• I n t e g e r s ( s i g n e d a n d u n s i g n e d )

• R e a l

• T i m e ( t i m e , d a t e — e .

g .

, T i m e _ O f _ D a y )

• A S C I I c h a r a c t e r s t r i n g s

• V e n d o r a n d u s e r d e f i n e d ( s i n g l e a n d a r r a y s )

• B i t b a s e d ( B o o l e a n : A N D , O R , N O T , e t c .

)

• N u m

L O G , e r i c a l / a r i t

L N , S I N , h m e t i c

C O S ,

( A D D , S U B , M U L ,

T A N , e t c .

)

D I V , S Q R ,

• D a t a f u n c t i o n c o n v e r s i o n s

• S e l e c t f u n c t i o n s ( L I M I T , M A X , M I N , e t c .

)

• C o m p a r i s o n s ( > , < , = , > = , = < , < > )

• A S C I I s t r i n g f u n c t i o n s ( L E N g t h , L E F T , R I G H T ,

I N S E R T , R E P L A C E , D E L E T E , e t c .

)

• V e n d o r a n d u s e r d e f i n e d f u n c t i o n s

S e t / r e s e t — b i s t a b l e — l a t c h / u n l a t c h

E d g e t r i g g e r d e t e c t i o n (

(=, , )

)

• C o u n t e r s ( u p , d o w n , u p / d o w n )

• T i m e r s ( T O N , T O F )

• V e n d o r a n d u s e r d e f i n e d b l o c k s

• G l o b a l

• L o c a l

Table 10-1.

Data variable types, functions, and blocks.

The IEC 1131 standard’s data type and function flexibility allows programmable controller manufacturers to provide instructions they consider necessary, but that are not defined within the standard. Such instructions may include specific application instructions, such as a servo positioning instruction used with a particular vendor’s intelligent servo control module. While this instruction may fall within the programmability parameters of the standard, it may not be available in other PLCs that comply with the standard. Thus, the IEC 1131 standard lets vendors enhance their

IEC 1131-3 instruction sets by adding more powerful, customized instructions. It also allows users to create their own instructions, in block form, to perform a specific task.

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D

ECLARING

V

ARIABLES

During the implementation of a control system, the user must name, or

declare, the variables used. This variable declaration is nothing more than the mapping of I/O addresses, indicating which field devices are wired to which

I/O modules (see Chapter 5). Figure 10-1a shows a limit switch (LS1) implemented in a standard programmable controller environment. In this configuration, the device is declared (or named) in the control program as its address—10. In an IEC 1131-3 environment, however, a device can be described by any alphanumeric name. This name can include underscores

(_). Hence, the limit switch can be declared as a variable named

Limit_Switch_1, Clamp_Limit_Switch, or another appropriate name (see

Figure 10-1b). From the moment a variable is declared, it will be known by that name throughout the control program, regardless of the IEC 1131-3 programming language used. The name assigned to a variable is not case sensitive; that is, it can be declared in uppercase, lowercase, or a combination of the two. Therefore, the user may choose the appropriate name representations for the purposes of program appearance (e.g., the use of uppercase for a main variable name and lowercase for a secondary variable name).

L1

(a)

LS1

Rack 0

Slot 1

Address

L2

2

3

0

1

C

10

11

12

13

10

PLC

Address 10

(b)

Variable Definition

Type:

Name:

Address:

Boolean

Limit_Switch_1

010

VAR_NAME

Location

Rack Slot Terminal

Limit_Switch_1 0 1 0

LD Language

Limit_Switch_1

Input variable address

Limit_Switch_1 assigned to PLC address

ST Language

IF Limit_Switch_1 THEN Motor=True

Figure 10-1.

Limit switch addressed in

(a)

a standard PLC environment and

(b)

an IEC

1131-3 environment.

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When declaring a variable, the user must specify the variable type in addition to the variable name. This allows the PLC to know what type of data the device corresponding to the variable transmits. The IEC 1131-3 supports many different local and global data variable types (see Table 10-2); however, the three most common are:

• Boolean

• integer

• real

D

A i n s

C

a c l

l

r o

a

e g t

s

e

s

I

V a r i a b l e T y p e

B o o l e a n

D e s c r i p t i o n

T R U E ( 1 ) / F A L S E ( 0 ) n t e g e r – 1 2 8 o r + 3 7 6 4

E x a m p l e

L i m i t p u s h s w i t c h , b u t t o n m o t o r ,

T i m e r i n t e g e r v a l u e , c a l c

T W S u l a t i o n i n p u t ,

A n a l o g I / O , c o m p u t a t i o n g e n e r a l R e a l p o i n t )

( f l o a t i n g

A S C I I s t r i n g M e s s a g e s t r i n g s

S y s t e m I n t e r n a l

I

– 3

+ 1 .

4

3

.

5

5

7 3 o r

×

1 0 3

“ T e m p e r a t u r e ” : =

T e m p _ V a l u e _ V a r

C o n t r o l r e l a y s ( B o o l ) n t e g e r a n d v a r i a b l e s r e a l

D i s p l a y m o n i t o r

I n t e r n a l o u t p u t s i n f o r m a t i o n o r p r i n t e r

I n t e r n a l a r i t h m e t i c c o m p u t a t i o n s o n a r e l a y c o li s , t i m e r

I n p u t

O u t p u t t

V a r i o i n a b l p u t e s c o n n e c t e d i n t e r f a c e s

V a r i a b l e s t o o u t p u t c o n n e c t e i n t e r f a c e s d

D i s c r e t e

T W S i n

/ a n a p u t s , l o g i n p u t s , a n a l o g i n t e r f a c e s

D i s c r e t e / a n a l o g o u t p u t s , o u t p u t s a n a l o g t o L E D d i n t e r f a c e s i s p l a y s ,

Table 10-2.

Data variable types.

Boolean variables are single-bit variables, meaning that the data transmitted and received is in the form of 1s and 0s. Discrete I/O variables fall under this category; therefore, they must be specified as “Bool” (short for Boolean) variables in the control program. Many nondiscrete variables, such as analog input signals that are read through an analog input card, are integer

variables, because they transmit data in the form of whole numbers (e.g.,

2042, –127, etc.). Thus, they must be specified in the control program as integer variables. Internal variables that transmit fractional and floatingpoint data (i.e., a number multiplied by an exponential expression—2.7

×

10

2

) are real variables and, again, must be classified as such.

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E

XAMPLE

10-1

Implement the Boolean variable declaration (variable names and variable types) for the input devices shown in Figure 10-2a for use in a control program. Assume that the controller being used follows the rack-slot-terminal address configuration (e.g., rack 0, slot 0, terminal

3 is address 003). Figure 10-2b shows the wiring to the input module.

L1

PB1

Hardwired Circuit

SOL

LS2

LS1

L2

(a)

Description of Inputs

PB1: Used to manually start conveyor sequence

LS1: Detects parts in automatic start

LS2: Detects a no-jam condition

(b)

L1

PLC Input Module Wiring

PB1

Rack 0

Slot 0

LS1

LS2

2

3

0

1

C

L2

Figure 10-2. (a)

A traditional hardwired circuit and

(b)

its wiring diagram.

S

OLUTION

Figure 10-3 shows a sample variable declaration for this example.

All of the input devices are discrete; therefore, they are specified as Boolean variables. PB1 is named MAN_START_PB, LS1 is named

AUTO_PART_Detect, and LS2 is named NO_JAM_Detect.

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Note that these variable names, which can be chosen by the user, describe the operational functions of the input devices.

Address Location

Input Variable Name Variable Type Rack Slot Terminal

MAN_START_PB

AUTO_PART_Detect

NO_JAM_Detect

Bool

Bool

Bool

0

0

0

0

0

0

0

1

2

Figure 10-3.

Boolean variable declaration.

10-2 IEC 1131-3 P

ROGRAMMING

L

ANGUAGES

While the IEC 1131-3 programming standard provides great new potential for programmable controller users, it is actually based on the relay ladder logic that has been inherent in PLCs since their inception. The IEC 1131-3 is based on the ladder logic used in PLC ladder diagrams (including functional blocks) because of its simplicity of use, representation, and to some extent, programmability. The IEC 1131-3, however, reduces the need for complex interlocking circuits within PLC ladder diagram circuits. It enhances the languages previously used in programmable controllers and incorporates them with a powerful framework—sequential function charts—making interlocking, interpretation of the control program, and implementation of the control system much easier for both the programmer and the final user of the system. With this in mind, let’s briefly discuss the four languages that are used with the IEC 1131-3 standard—ladder diagrams, function block diagrams, instruction list, and structured text—along with sequential function charts. Note that, when programming in the IEC 1131-3, any of these languages may be used either alone or as a group, with or without sequential function charts. In Section 10-4, we will list all available IEC 1131-3 programming instructions.

L

ADDER

D

IAGRAMS

(LD)

Ladder diagram language (LD) uses a standardized set of ladder programming symbols to implement control functions. This type of programming language is essentially the one that has always been available in PLCs (see

Figure 10-4). Users familiar with current PLC ladder diagrams can use the same programming techniques and methods when using this language in an

IEC 1131-3 environment. However, as we will explain later, interlocking ladder diagram programming is much easier to implement in the IEC 1131-

3 format due to the use of sequential function charts.

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L1

Start

Stop

LS_Reach

LS_Top

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L2 L2 L1

03

04

C

01

02

Start Stop Done Drill_Motor

L1

Drill_Motor

LS_Reach LS_Top Done

01

02

03

04

C

Drill_Motor

Figure 10-4.

Ladder diagram representation of a PLC program.

F

UNCTION

B

LOCK

D

IAGRAM

(FBD)

Function block diagram (FBD) is a graphical language that allows the user to program elements (e.g., PLC function blocks) in such a way that they appear to be wired together like electrical circuits. Figure 10-5 illustrates this type of function block diagram configuration. Some IEC 1131-3 systems use logic symbols to represent the function blocks. Note that the output logic of the block in Figure 10-5 does not incorporate an output coil because the output is represented by the variable assigned to the output of the block. This

LS_Stop LS_OK

Time_Value

Output variable of timer (Dwell) becomes the input to the set/reset block

TMR

PR AR

Dwell

Q

Cont_Cycle

S

Reset_Sys

Set/Reset

R Q

Stop_Cycle

Dwell

POS_RT

AND

(&)

SET

OR

(

^

)

AT_TOP

Section of a control program using a timer, set/reset, AND, and OR function blocks

Figure 10-5.

Function block diagram language.

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10 variable can be used throughout the program in other instructions and as a control output through the address mapping performed during variable declaration. The user may still choose to use an output coil representation if desired; however, it will only be allowed in the last (right-most) block. The

FBD language uses both standard and vendor-specified function blocks. The block functions typically used with the IEC 1131 standard include, for the most part, the block functions discussed in Chapter 9.

In addition to standard and vendor-specified functions, the IEC 1131-3 allows users to “build” their own function blocks according to control program requirements. This is referred to as encapsulating a block function.

The advantage of creating user-defined blocks is that they can be built using other function blocks, instruction list, or structured text programming with or without ladder diagram instructions. This allows great flexibility in function block programming. Encapsulation also lets the user store a newly created block in a library and use it as many times as needed in the program, just like any other function block. Example 10-2 illustrates how ladder diagrams can be used to create a custom function block.

E

XAMPLE

10-2

Illustrate how the hardwired start/stop circuit shown in Figure 10-6 can be implemented using ladder diagrams in a custom-built function block to turn ON motor M1 and pilot light PL1.

L1 L2

Start

M1

Stop

M1

M

PL1

Figure 10-6.

Start/stop circuit.

S

OLUTION

Figure 10-7 illustrates the ladder diagram equivalent of the hardwired start/stop circuit. Note that there are two rungs for the two outputs and that both the input and output variables are specified with the same names that they had in the hardwired circuit.

To implement this simple ladder diagram as a function block, it must be programmed or stored in an encapsulated block (see Figure 10–

8a). The final function block will look like the diagram shown in Figure

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10-8b. Note that the inputs to the start/stop block will act according to the logic used to program the block. If the driving logic to the start input is ON, then the motor and light will turn ON. If the stop input is ON, then both the motor and light outputs will be OFF. The two input variables (the START and STOP commands), as well as the two output variables (the MOTOR and PILOT_LIGHT signals), are

Boolean variables.

PLC Program

Stop M1 Start

M1

M1

PL1

Figure 10-7.

Ladder diagram equivalent of the circuit in Figure 10-6.

START

(a)

STOP

Start

Motor

Stop Motor

Motor Pilot_Light

MOTOR

PILOT_LIGHT

START

Start/Stop Block

MOTOR

(b)

STOP PILOT_LIGHT

Figure 10-8. (a)

Encapsulated ladder diagram and

(b)

start/stop block function.

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The flexibility of custom block creation is enhanced by the fact that the user can build custom blocks using ladder diagrams or any of the other IEC

1131-3 languages (IL and ST). Also, custom blocks can be used in conjunction with other standard or vendor-specified function blocks. This allows the programmer to create very powerful function blocks that can be integrated into any ladder diagram or function block diagram. Figure 10-9 shows a custom block instruction that was created in a B&R Industrial Automation

PLC using their instruction list language.

Figure 10-9.

Custom function block from B & R Industrial Automation.

I

NSTRUCTION

L

IST

(IL)

Instruction list (IL) is a low-level language similar to the machine or assembly language used with microprocessors (see Figure 10-10). This type of language is useful for small applications, as well as applications that require speed optimization of the program or a specific routine in the program. As mentioned earlier, IL can be used to create custom function blocks. A typical application of IL might involve the initialization to zero

(i.e., reset) of the accumulated value registers for all the timers in a control program. As shown in Figure 10-11, a programmer could use IL to create a function block that would load the contents of all the timers’ accumulated registers (AR) with a value of zero.

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Instructions

LD

AND

ANDN

ST b1 b2 b3 b0

Comments

(*current result:=TRUE*)

(*current result:=b1 AND b2*)

(*current result:=b1 AND b2 AND NOT b3*)

(*b0:=current result*)

Note: The current result is held in a result register.

The last instruction stores the result register as the variable b0.

Figure 10-10.

Example of the machine/assembly language used in microprocessors.

Start: LD RESET_TIMER

JMPNC Prog_End

(*Load reset condition*)

(*If not TRUE, jump to end of program*)

ZERO:=Ø

LD ZERO

ST

ST

TIMER_AR_1

TIMER_AR_2

ST

ST

TIMER_AR_3

TIMER_AR_4

Prog_End: JMP Start

(*If TRUE, continue and reset all AR in timers*)

(*Timer_AR_1 is the address of the first

timer’s accumulated register*)

(*Go back to start*)

Reset_Timer

Address of TMR1 AR

TMR_RESET_FBD

Reset_Timer

Timer_AR_1

Address of TMR2 AR

Timer_AR_2

Address of TMR3 AR

Timer_AR_3

Address of TMR4 AR

Timer_AR_4

TMR1 AR is the address of the first timer’s accumulated register. In the

FBD, this address is known as Timer_AR_1 so that the IL program can interpret it. The result of the IL program will be that the values in the specified accumulated registers will be reset to 0. The variable

Reset_Timer will trigger the block and start the IL instruction. The IL routine will cycle back to start while the block is enabled by the

Reset_Timer variable being ON. There are also ways to “pulse” just once through the program so that the instruction is executed only one time, if enabled.

Figure 10-11.

Instruction list custom function block that resets timer values to zero.

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S

TRUCTURED

T

EXT

(ST)

Structured text (ST) is a high-level language that allows structured programming, meaning that many complex tasks can be broken down into smaller ones. ST resembles a BASIC- or PASCAL-type computer language

(see Figure 10-12), which uses subroutines to perform different parts of the control function and passes parameters and values between the different sections of the program. Like LD, FBD, and IL, the structured text language utilizes variable definitions to identify input and output field devices and any other internally created variables that are used in the program. ST also supports iterations, such as WHILE...DO and REPEAT...UNTIL, as well as other conditional executions, such as IF...THEN...ELSE. Moreover, structured text language supports Boolean operations (AND, OR, etc.) and a variety of specific data, such as time of day information.

IF Manual AND NOT Alarm THEN

Level:=Manual_Level;

ELSE_IF

ELSE

END_IF;

Mixer:=Start AND NOT Reset

Other_Mode THEN

Level:=Max_Level;

Level:=(Level_Indic

×

100)/Scale;

Figure 10-12.

Example of a BASIC-like computer program.

The structured text language is extremely useful for executing routines like report generation, where English-like instructions explain what is being done.

Remember that ST can be used to encapsulate, or create, a function block that will perform a certain task when triggered by the control logic (see Figure 10-

13). This function block routine can be used repeatedly throughout the control program.

Some PLC manufacturers enhance the standard features of ST by using it to integrate real-time force I/O and monitoring I/O (analog and digital) data in the same manner as a standard PLC would using ladder diagrams. For example, an ST instruction such as FORCE Variable_One would force

Variable_One to be ON regardless of any other conditions, as long as

Variable_One is Boolean. If the variable was analog, the instruction may be

FORCE Variable_One = 5000; in which case, the value of the analog variable would be set to 5000 during the forcing.

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10

Conditions to trigger report

Values passed from variables

Custom Report

Function Block

Report

Temp_Var

Press_Var

Variable_1

Variable_2

Finished

IF REPORT THEN

Message “Target Temperature:”:=Variable_1

END_IF

Message “Actual Temperature:”:=Variable_2

Figure 10-13.

Report generation function block created using structured text.

Structured text programming is particularly suited to applications involving data handling, computational sorting, and intensive mathematical applications utilizing floating-point values. ST is also the best language for implementing artificial intelligence (AI) computations, fuzzy logic, and decision making.

S

EQUENTIAL

F

UNCTION

C

HARTS

(SFC)

Sequential functional chart, or SFC, is a graphical “language” that provides a diagrammatic representation of control sequences in a program. Basically, sequential function chart is a flowchart-like framework that can organize the subprograms or subroutines (programmed in LD, FBD, IL, and/or ST) that form the control program. SFC is particularly useful for sequential control operations, where a program flows from one step to another once a condition has been satisfied (TRUE or FALSE).

The SFC programming framework contains three main elements that organize the control program:

• steps

• transitions

• actions

A step is a stage in the control process. For example, the mixing application shown in Figure 10-14 has three steps—the initial step, the mixing step, and the emptying step. When the control program receives an input, it will execute each of these steps starting with step 1. Each step may or may not have an

action associated with it. An action is a set of control instructions prompting

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10

1

1

Trans_1

STEP ( means initial step)

TRANSITION

ACTION

2

Mix_Batch (Ladder Diagram)

2 Trans_2

3 Empty_Batch (FBD)

3 Trans_3

Figure 10-14.

Sequential function chart of a mixing process.

the PLC to execute a certain control function during that step. An action may be programmed using any one of the four IEC 1131-3 languages. After the PLC executes a step/action, it must receive a transition before it will proceed to the next step. A transition can take the form of a variable input, a result of a previous action, or a conditional IF statement (e.g., IF

Temp_1

100). So, for the application shown in Figure 10-15, the PLC will execute action 2 only after step 1 receives a valid input and transition 1

1

1 LS_Reach

2

2 Action_2

IF Temp_1

100

3

Action_3

3 PB_Return

Figure 10-15.

Transitions in a sequential function chart.

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10 occurs (i.e., the limit switch LS_Reach triggers). After the PLC finishes action

2, it will wait for transition 2 (IF Temp_1

100) to occur and then move to step 3.

As mentioned earlier, the sequential function chart language has its origin in the French standard Grafcet, a flowchart-like programming language. The

Grafcet graphic language also uses steps, transitions, and actions, which operate in the same manner as in SFC. In Grafcet, when a step is active, the processor scans the I/O logic and program pertinent to the step’s action, as well as the logic for the transition immediately after it (i.e., the transition that deactivates the step and action).

Like Grafcet, SFC is similar to a flowchart in the way control is passed from one step to another (see Figure 10-16). Also, like in Grafcet, SFC can be programmed to directly relate to timing or event diagrams. Figure 10-17 shows a comparison of a timing diagram and its related Grafcet and SFC programs. As shown in the timing diagram (see Figure 10-17a), if the condition Part_Present_LS is satisfied (the limit switch closes), the

Advance_Solenoid output will turn ON. Once the Part_In_Position_LS variable is ON, the Clamp_Solenoid output will turn ON. Then, when the

At_Depth_LS condition becomes TRUE, the Drill_Motor output will turn

ON for 10 seconds. Note that the Clamp_Solenoid output is also activated during the Drill_Motor action. Once the time expires, the timing diagram indicates that the Clamp_Solenoid and Drill_Motor outputs will both turn

OFF and stay OFF, while the Return_Solenoid output turns ON. No further

Start

1

1 Trans_1

2

Action_2

2 Trans_2

3

Action_3

3 Trans_3

Trans_1

?

ON

Step 2 Action

OFF

Trans_2

?

ON

Step 3 Action

OFF

(a)

SFC

(b)

Flowchart

Figure 10-16.

Comparison of

(a)

an SFC diagram and

(b)

a flowchart.

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10 action will occur until the At_Top_LS command is satisfied, at which time, the process will stop and the Return_Solenoid output will reset for another sequence. Figures 10-17b and 10-17c illustrate the timing diagram as implemented in Grafcet and SFC, respectively. Both of these programming languages graphically represent the timing diagram implementation using

Outputs

Advance_Solenoid

Clamp_Solenoid

Drill_Motor

Return_Solenoid

Activation

At_Depth_LS

At_T op_LS

Transitions

1 Wait

2

Part_Present_LS

Advance_Solenoid

3

Part_ In_Position_LS

Clamp_Solenoid

4

At_Depth_LS

Clamp_Solenoid

Drill_Motor

TMR/Step_4/10 Sec

5 Return_Solenoid

At_Top_LS

1

2

Part_Present_LS

Advance_Solenoid:=True

3

Part_ In_Position_LS

Clamp_Solenoid:=True

4

At_Depth_LS

Clamp_Solenoid:=True

Drill_Motor:=True

TMR/Step_4/10 Sec

5 Return_Solenoid:=True

At_Top_LS

Figure 10-17.

Comparison of

(a)

a timing diagram with its associated

(b)

Grafcet and

(c)

SFC programs.

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10 steps, actions, and transitions. The actions represent the activation of the solenoid and drill motor, while the transitions represent the limit switch inputs and timer status.

The major difference between Grafcet and SFC is that Grafcet employs only written action statements, such as Open_Variable (e.g., Open_Valve) to implement its action blocks and turn devices ON and OFF. SFC, on the other hand, implements actions in a number of ways using LD, IL, ST, and

FBD or a combination of these languages, including custom function blocks.

For example, in action 2 of the Grafcet program in Figure 10-17b, the statement Advance_Solenoid indicates the turning ON of the field device associated with the output variable assigned to Advance_Solenoid. In other words, if an output variable is stated in a Grafcet action, it will become

TRUE or ON. In the SFC-equivalent program in Figure 10-17c, the step 2 instruction indicates that the Advance_Solenoid will be equal to TRUE

(ON). Thus, SFC does not actually contain a statement of the output variable, but rather an instruction that turns the device ON or OFF (TRUE or FALSE) during that action.

Sequential function charts can be thought of as building-block objects used to create the “total” control program, or the big picture, while the other languages are used to implement detailed programming within the SFC. In fact, SFCs can have what are known in Grafcet terms as macrosteps, which allow one master sequential function chart to have other sequential function charts as its actions (see Figure 10-18). These smaller, embedded sequential function charts, which have their own steps, transitions, and actions, are similar to subroutines in a program.

Main

SFC

Program

Macrostep SFC

Program

Macrostep

Figure 10-18.

Macrostep within an SFC program.

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10

One of the greatest advantages of sequential function charts is that they are easier to troubleshoot than standard ladder diagram programs. For example, in the sequential function chart shown earlier in Figure 10-17c, if the action

Clamp_Solenoid (solenoid ON) at step 3 does not make the transition to step

4, it is easy to recognize that a problem occurred at the transition after step 3, which corresponds to the activation of the At_Depth_LS transition. Thus, an

SFC pinpoints the step or transition where a fault occurs.

P

ROGRAMMING

L

ANGUAGE

N

OTATION

As we have noted, sequential function charts can provide the infrastructure for a control program, which is then built using one or more of the four IEC

1131-3 programming languages. In the next section, we will further explain how SFCs can be used implement a control program. However, let’s first review the similarities between programming notations in the ladder diagram (LD), function block diagram (FBD), structured text (ST), and instruction list (IL) languages.

Figure 10-19 shows a simple ladder diagram and its FBD, ST, and IL language equivalents. Note that the ST language (see Figure 10-19c) uses two operators,

AND

and &, to denote the AND function. The := symbol is used in an ST program to assign an output variable (e.g., Valve_3) to a logic expression. In instruction list (see Figure 10-19d), the first instruction

(instruction LD) loads the status of variable Limit_S_1 to the accumulator register, which IL calls the result register. The second instruction (instruction AND) ANDs the status of Limit_S_1 with the variable Start_Cycle and stores the outcome back in the result register. The third instruction (instruction ST) stores the contents of the result register as the output variable,

Valve_3. This process is similar to Boolean programming language.

As demonstrated, the instructions used to implement control sequences in each programming language are very similar in their construction, as well as their visual representation. Depending on the PLC application, an SFC may use one or more of these languages to program instructions inside its actions.

To differentiate between languages, some software manufacturers include starting and ending commands that define the language being used. Other manufacturers allow the mixing of languages without any differentiation between them. Figure 10-20 illustrates a group of instructions that have been labeled with a differentiation mnemonic. The term #Language=name signals the beginning of a language, and #ENDlanguagename signals the end of it.

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10

Bool_Var (Boolean variable) Inputs: Limit_S_1 for Limit Switch 1

Start_Cycle for Start Cycle PB

Bool_Var (Boolean variable) Outputs: Valve_3 for Solenoid Valve #3

Inputs

Limit_S_1 Start_Cycle

Output

Valve_3

Inputs

Limit_S_1

Start_Cycle

Function

Block

AND

&

Output

Valve_3

Output

Input

Logic Expression

Valve_3:=Limit_S_1

AND

Start_Cycle

or

Valve_3:=Limit_S_1

&

Start_Cycle

Inputs and Outputs Control Logic

Name Variable

LD Limit_S_1

AND

ST

Start_Cycle

Valve_3

Description

(*Load the status of Limit_S_1*)—variable to the result register

(*AND it with Start_Cycle*)—variable ANDed with result register

(*Result register is stored as the Boolean variable Valve_3*)

Figure 10-19.

Implementation of a simple program in

(a)

ladder diagram,

(b)

function block diagram,

(c)

structured text, and

(d)

instruction list.

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10

#Language=LD

#ENDlanguageLD

#Language=ST

If Motor Then Light_Out

Else DL_Motor_Off

#ENDlanguageST b

#Language=FBD a

& OR

LS

#ENDlanguageFBD

#Language=IL

LD LS1

AND LS2

STR Motor

#ENDlanguageIL

Figure 10-20.

Languages within an SFC differentiated by beginning and ending language labels.

E

XAMPLE

10-3

In PLC applications, many limit switches exhibit a “bouncing” behavior (see Figure 10-21), meaning that the switch opens and closes several times before finally turning ON or OFF. Develop an encapsulated custom function block (see Figure 10-22), which will provide 50 msec debouncing capabilities, that can be stored in a library and used to program all bouncing input limit switches. Note that debouncing must be performed for both the OFF-to-ON and the ONto-OFF transitions.

S

OLUTION

Figure 10-23 illustrates the timing diagram of the limit switch input. It shows that a 50 msec delay (shown in blue) should exist in the OFFto-ON and ON-to-OFF transitions to filter any bouncing signals. Timers can be used to implement both delays.

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10

Bouncing may cause a faulty reading

ON 1

OFF 0

OFF ON ON OFF

L1

Figure 10-21.

Bouncing behavior in a limit switch.

Input Wiring

LS

L2

PLC Program

LS_Before

Debounce FBD

DB OUT

Valid_LS

Figure 10-22.

Rough diagram of an encapsulated debouncing function block.

LS_Before

1

0

Valid_LS

1

0

50 msec

50 msec

DT: Delay Time

Delays to prevent false triggering of signal

Figure 10-23.

Timing diagram for a bouncing input signal.

Figure 10-24 illustrates the implementation of a debouncing circuit using ladder diagrams and an ON-delay energize timer. Figure 10-25 shows the corresponding timing diagram. Note that the output of the latch/unlatch output (102) is the actual input, in this case the limit

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10

LS

Debounce FBD

LS_Before

OUT

102

(Latch/Unlatch)

Valid_LS

Delay_Time

Constant

Preset

Reg

4100

ACC

Reg

4000,

4001

LS_Before

LS_Before

100

101

TON 100

AR 4000

PR 4100

TON 101

AR 4001

PR 4100

Valid_LS

L102

L

Valid_LS

U102

U

Inputs

LS_Before: The input to the block from the limit switch before debouncing.

Preset Reg 4100: The register that holds the delay constant defined by the user’s input named Delay_Time, in this case 50 msec.

Outputs

OUT 102: The FBD output of the limit switch after the debounce delay.

ACC Reg: Registers 4000 and 4001, which hold the value of the timer’s accumulated registers.

Figure 10-24.

Debouncing function block programmed using ladder diagram.

1

LS_Before

0

1

Set

0

1

LS_Before

0

1

Reset

0

1

Valid_LS

0

DT

50 msec

DT

50 msec

DT

DT 50 msec

Figure 10-25.

Timing diagram for the ladder circuit in Figure 10-24.

switch signal after passing through the debouncing circuit. Figure 10-

26 illustrates the same type of debouncing filter implementation using

FBD. Note that the output of the set/reset (S/R), or bistable, block will

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10 also be the debounced limit switch input (Valid_LS). The variable

T_Delay will be an integer that is a preset time value of 50 msec. The input signals LS_Before (limit switch before debouncing) and

Valid_LS (limit switch after debouncing) are both Bool (TRUE/FALSE) variables. Once created, the function block diagram can be encapsulated as a custom block as shown in Figure 10-27a. It can then be used with any input that requires a 50 msec debounce filter (see Figure 10-

27b). The encapsulated block can satisfy any debounce requirement as long as the T_Delay variable is specified accordingly.

LS

LS_Before

TON_1

IN OUT

PR AR

S/R

S OUT

Valid_LS

R

50 msec constant

T_Delay

TON_2

IN OUT

PR AR

Figure 10-26.

Debouncing circuit programmed using FBD.

Debouce FBD

LS_Before

LS_Before OUT

Valid_LS

Three limit switches—

LS1, LS2, and LS3— defined as: LS1_Before,

LS2_Before, and LS3_Before.

LS1_Before

Debounce

Block

Valid_LS1

IN OUT

50 msec constant

T_Delay

(a)

50 msec constant

LS2_Before

T_Delay

IN OUT

Valid_LS2

T_Delay

LS3_Before

IN OUT

Valid_LS3

T_Delay

(b)

Figure 10-27. (a)

FBD as an encapsulated custom block and

(b)

a custom block used to debounce three limit switch signals.

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10

SFC F

ORMAT

Sequential function charts represent the order of events in a sequential process. An SFC divides a process into many steps, which are represented by various graphic components (see Figure 10-28). All of these components are used to form one or more charts that comprise the complete control program.

Initial Step Macrostep

IN

Beginning Macrostep Step

Transition

Jump to a Step

OUT

Ending Macrostep

Figure 10-28.

Graphic symbols used in SFCs.

Figure 10-29, for example, illustrates a small control program composed of three SFCs, each with its own independent initial step. By having independent steps, the control program starts scanning all of these charts when it first begins program execution, providing a parallel beginning. Chart 3

CHART 1 CHART 2

Y12

CHART 3

1

1

2

2

3

3

4

4

10

11

10

11

12

15

16

15

16

17

12 17

X10

Figure 10-29.

Three SFCs representing a control process.

30

31

IN

30

31

32

OUT

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10 also has a macrostep, which can be considered to be a subroutine or subprogram chart, but its initial step (IN step 30) is not independent. Chart 2 has a different link representation than charts 1 and 3 between its last step

(12) and its first step (10), meaning that instead of using an arrow to link these steps, it uses jump instructions. The jump to instruction, programmed after the last step, uses an X followed by the step number to specify which step to go to—in this case, step 10. The jump from instruction, which is programmed before the initial step, uses a Y and the transition number (i.e.,

Y12) to indicate where the jump is from. This Xstep number and Ytransition

number notation is used throughout SFCs to distinguish between step and transition variables. Some 1131-3 systems use the letters S and T to denote steps and transitions, respectively, instead of the letters X and Y.

Sequential function charts are classified by levels, depending on how much detail they show. The SFC representations in Figure 10-29 are level 0 charts, because they do not specify any of the actions in their steps and do not define their transitions. Level 1 and level 2 charts (see Figure 10-30) show the actions associated with their steps. A level 1 chart represents its actions with names, comments, or descriptions of the control action executed in each step. It may also describe what occurs in each transition, or it may show the transition conditions in ST, along with the variables that will trigger them. A level 2 chart actually shows the instructions (in LD, FBD, ST, or IL) that implement the control action. In addition, it may specify an action description name like the ones used in level 1 charts; however, this name is shown in parentheses to avoid confusion with the instruction programming.

(a)

Level 1

12 Start_Batch

12 Batch_Complete

(b)

Level 2

12 (Start_Batch)

Level:=Switch_Level

If Level Then Motor:=True

Batch_Time:=t#8M

Tstart (Batch_Time)

Structured

Text

12 (Batch_Complete)

Batch_Time

Timeout

Figure 10-30.

(a)

Level 1 and

(b)

level 2 sequential function charts.

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10

Each step and transition in an SFC has an ON status or condition if it is active and an OFF status if it is inactive. A dot, or token, indicates the ON/

OFF status of a step or transition. As illustrated in Figure 10-31, the dot in the step 11 block indicates that the step is active, meaning that the status of X11 is ON. Some manufacturers refer to the ON/OFF status of a step or transition as its Boolean activity or Boolean attribute because of the TRUE/FALSE nature of the signal activity.

10

Condition X10

10 Condition Y10

11

Condition X11

11 Condition Y11

Figure 10-31.

The dot in step 11 indicates that it is ON.

Figure 10-32a illustrates a step being activated by a transition, while Figure

10-32b shows a step being deactivated by a transition. As shown in the timing diagram in Figure 10-32a, Y9 and X10 are both FALSE during time a1 because the Y9 transition has not occurred and, therefore, has not passed the token to step 10 (i.e., activated it). Once a condition or variable triggers transition Y9 (turns it ON), step 10 becomes active and the step condition

X10 becomes TRUE. In Figure 10-32b, the timing diagram shows that step

12 is active (X12 is ON) during time b1 and becomes deactivated the moment transition Y12 turns ON at time b2.

a2

(a)

(b)

9

10 a1—Step not active

12

12 b1—Step is active

9

10 a2—Step is active after transition

12

12 b2—Step is not active after transition

Time:

1

Y9

0

1

X10

0

Time:

X12

1

0

1

Y12

0 a1 b1 b2

Figure 10-32. (a)

An inactive step activated by a transition and

(b)

an active step deactivated by a transition.

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10

E

XAMPLE

10-4

Figure 10-33 shows an SFC in three different stages: (a) step 3 active, (b) step 4 active after being triggered by transition IN_1, and (c) step 4 turned OFF by the triggering of transition IN_2.

Using a timing diagram, graphically illustrate the status of the steps (Xs) and the transitions (Ys) in each of these three phases.

3

3 3

3 IN_1 3 IN_1 3 IN_1

4

4

4

4

IN_2

4

IN_2

4

IN_2

(a)

Step 3 ON

(b)

Step 4 ON

(c)

Step 4 OFF

Figure 10-33.

Control being passed through an SFC.

S

OLUTION

Figure 10-34 shows the timing diagrams for each of the three stages in Figure 10-33. When step 3 is active (with token), X3 is ON and its action will be executed. Once the transition IN_1 occurs (Y3 goes from

OFF to ON), the token passes to step 4 for execution of its action; thus,

X4 becomes ON. Step 4 will remain active (ON) until transition IN_2

(Y4) becomes TRUE, at which time, the control token will pass to the next step. Note that a transition does not need to remain ON once the token is passed to the next step down the chart. For example, the transition Y3 signal turned OFF immediately after passing the token to step 4; the dotted line in the timing diagram indicates this.

a b c

3

3 3

3

4

4

IN_1

IN_2

3

4

4

IN_1

IN_2

3

4

4

IN_1

IN_2

1

X3

0

Y3

1

0

X4

1

0

Y4

1

0

Figure 10-34.

Timing diagram for the chart in Figure 10-33.

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10

T

RANSITIONS

As described in the previous example, the triggering condition of a transition can be a momentary pulse that quickly goes from OFF to ON to OFF. Figure

10-35 shows two pulse transitions, Y9 and Y10, which activate and deactivate step 10. These transitions can be programmed so that either the leading edge or the trailing edge of the pulse triggers the move to the next step. In Figure

10-36, transition 9 is programmed as a leading-edge transition using an AND condition. In this configuration, the turning ON of signal A will initiate the transition to step 10 as long as signal B is already ON. Transition 10 is also programmed using an AND condition; however, it is a trailing-edge transition. This means that, as long as signal D is active, the turning OFF of signal

C will turn OFF step 10. This type of transition is similar to leading- and trailing-edge transitionals in ladder diagrams.

Before Active

Step

9

10

10

Active

Step

9

10

10

After Active

Step

9

10

10

1

Y9

0

1

X10

0

1

Y10

0

Figure 10-35.

Example of momentary transition pulses.

9

10

10

A

AND

B 9

C

AND

D 10

10

A

AND

B

C

AND

D

9

10

10

A

AND

B

C

AND

D

A

B

Y9

X10

C

D

Y10

1

0

1

0

1

0

1

0

1

0

1

0

1

0

Figure 10-36.

Leading- and trailing-edge transition pulses.

One Scan

A timing element can be included in a transition to determine how long a step will be active. For instance, step 11 in Figure 10-37a will be active and its action executed for a period of 100 seconds because transition Y11 includes a timer set for 100 seconds. A timing transition instruction can also

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HAPTER

10 be combined with Boolean logic combinations (AND, OR, NOT) and

IF...THEN instructions. For example, in Figure 10-37b, the control program in the action in step 11 will lower a part down in a punch press and wait for at least 10 seconds. However, it will also wait for the Down_Pos input to be TRUE before deactivating the step 11 action and moving control to the next step.

10

11

Mix_Batch

11 TMR/X11/100 sec

1

Y10

0

1

X11

0

1

Y11

0

100 sec

10

11

11

Lower_Part

TMR/X11/10 sec

AND

Down_Pos

1

Y10

0

1

X11

0

1

Y11 10 sec

0

1

Down_Pos

0

Figure 10-37. (a)

A timed transition and

(b)

a timed transition combined with a

Boolean logic function.

10-3 S

EQUENTIAL

F

UNCTION

C

HART

P

ROGRAMMING

The signal that triggers a transition may be the result of an external variable or a step’s output. For example, in Figure 10-38, step 10’s action instructions

(in this case, an LD, ST, and FBD control sequence) control the status of the transition Time_Up, which will move control execution to the next step.

When step 10 becomes active, the Mix_Start action begins, and the processor scans all the I/O in the action and executes the program as described by the action’s instructions. If Mix_Rdy is TRUE (in the LD part of the action), then the motor will be turned on for 30 seconds as specified by the timer.

Once the 30 seconds have elapsed, the timer’s Boolean output variable

Time_Up, which is defined as an internal Bool variable, will be TRUE, initiating the transition to the next step.

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10

Level_OK Flow_OK Set_OK

Level_2_OK Mix_Rdy

10

Mix_Start

Time_Up

11

IF Mix_Rdy THEN Motor:=TRUE

Motor

TMR

IN OUT

30 Sec

PT ET

Time_Up

Figure 10-38.

Action output as a trigger for a transition.

Transitions can also be logically combined with other instructions, most commonly with the structured text language. For instance, in Figure 10-39, the transition from step 12 to 13 will occur if the command Set_OK inside the action of step 12 (labeled as Action_1) is TRUE and the signal Level_Switch is TRUE. Set_OK is an internal output, while Level_Switch is a direct input signal connected to a PLC input module.

LD Program

12

ACTION_1

13

Set_OK AND Level_Switch

ACTION_2

Set_OK

Figure 10-39.

Combination of an internal output and an external variable as a transition.

P

ROGRAMMING

N

ORMALLY

C

LOSED

T

RANSITIONS

As explained in the previous chapter, a normally closed input device should be programmed as normally open in a PLC for it to operate as a normally closed device. The reason for this is safety. When programmed as normally open, the device will lose continuity and turn OFF if its connection to the input module is cut. This provides fail-safe operation. This same criteria

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10 applies for a normally closed device in a PLC using IEC 1131-3 programming—all normally closed devices should be programmed as normally open, regardless of the language used.

Normally closed devices must also be programmed carefully when used as triggering variables in an SFC transition. If the normally closed device is not actuated (e.g., a normally closed limit switch is closed), the transition from one step to the next one will be in one scan. Let’s take a closer look. Figure

10-40a illustrates a part of a simple chart in which the normally closed limit switch LS_1 is used to trigger the transition from step 10 to step 11. Note that the timing diagram, which represents the Boolean activity, indicates that

LS_1 is ON when not activated. Thus, the transition from step 10 to 11 will occur as soon as step 10 is active (one scan). To trigger the transition from step 10 to step 11 upon the activation of LS_1 (normally closed LS_1 opening), the transition must be programmed as NOT LS_1. This way, if

LS_1 opens, the NOT LS_1 instruction will trigger the transition. Note that in Figure 10-40b, the limit switch opened momentarily to trigger the transition to step 11. It is a good idea to study timing diagrams when programming a normally closed device to observe the required behavior of the transition.

(a)

9

10

10 LS_1

11

Trans_9

1

Y9

0

1

X10

0

1

Y10

0

1

X11

0

One Scan

(b)

9

10

10 NOT LS_1

11

Trans_9

1

Y9

0

1

X10

0

1

Y10

0

1

X11

0

Figure 10-40.

The transition from step 10 to step 11 will

(a)

occur in one scan unless

(b)

transition 10 is programmed as NOT LS_1.

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10

Figure 10-41 illustrates a simple start/stop hardwired motor circuit and its timing diagram. When the momentary normally open start push button is pressed and the normally closed stop push button is not pressed, the motor will be ON and its motor contacts M1-1 will seal the start push button, meaning that the motor will remain ON until the stop PB is pressed. When the stop PB is pressed, the circuit will lose continuity and the motor will turn OFF.

Logically speaking, as shown in the timing diagram in Figure 10-41, the motor will be ON if both the start PB (wired as normally open) and the stop

PB (wired as normally closed) are ON (1), in other words, start is ON

(Start=1) and stop is NOT OFF (Stop=1). Therefore, the logic expression that will turn M1 ON is M1=Start

AND

Stop.

L1

Stop PB

Start PB

M1-1

M1

L2

1

Stop

0

1

Start

0

1

M1-1

0

1

Motor

0

Figure 10-41.

A hardwired start/stop motor circuit and its timing diagram.

This logic expression indicates that M1 will be ON if the start PB is pushed and the stop PB is not pushed (normally closed). However, the logic expression does not provide latching capabilities, meaning that if the start PB is pushed once and released, the motor M1 will not stay ON. As we will explain shortly, in the SFC implementation of this M1 logic expression, the latching or interlocking of the M1 logic expression is not required.

Figure 10-42 illustrates the SFC implementation of the hardwired circuit in

Figure 10-41, along with its timing diagram. In the SFC, the logic expression that triggers transition 1 (Start_

AND

_Stop) is the same logic expression that turns motor M1 ON in the hardwired circuit, but without interlock. The program does not require interlocking between the push buttons because it does not need to remember that the start PB was pressed to keep the motor

ON. Once the momentary start PB is pressed, step 1 (no action) transitions to step 2, where the action turns ON the motor and keeps it in that state. The program will turn the motor OFF as soon as transition Y2 is triggered, meaning that the NOT_Stop condition occurred. As soon as the stop push button is pressed (see the timing diagram in Figure 10-42), transition Y2 will be satisfied and the control token will be transferred from step X2 (motor ON) to step X1, turning off the action in X2 and, consequently, motor M1.

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10

1

2

1

2

Start_

AND

_Stop

Motor:=True

NOT_Stop

1

Start

0

Stop

1

0

Y1

1

0

X2

1

0

1

Motor

0

1

Y2

0

Figure 10-42.

SFC implementation of the hardwired circuit in Figure 10-41.

E

XAMPLE

10-5

Figure 10-43 illustrates a block diagram of PLC input devices used to control the ON/OFF state of two motors, Motor_1 and Motor_2.

Assume that the pair of start/stop push buttons used with Motor_1 has a normally open start and a normally closed stop, while the start/ stop push buttons used with Motor_2 are both normally open (for illustration purposes). Using SFCs, implement two independent programs in the PLC system that will control the start/stop sequence of the two motors.

PLC

Motor_1

Motor 1

Start 1

Stop 1

N.O.

N.C.

p u

I n t

O u t p u t

Motor_2

Motor 2

Start 2

N.O.

Stop 2

N.O.

p u

I n t

O u t p u t

Figure 10-43.

Block diagram of a program controlling two motors.

S

OLUTION

Figure 10-44 shows the SFC charts for the two push button stations, while Figure 10-45 shows the corresponding timing diagrams. Note that the logic for the transitions that turn the motors ON is different. For

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10

Motor_1, the logic takes into consideration that the normally closed stop push button is wired as normally closed. For Motor_2, the logic shows that the stop push button is a normally open push button wired as open to an input module.

Motor 1

Start 1

Stop 1

N.O.

N.C.

p u t

I n

Motor 2

Start 2

Stop 2

N.O.

N.O.

I u t n p

1

PLC

Chart 1

1 Start_1

AND

Stop_1

2

2 Motor_1:=True

Not_Stop_1

3

4

3

4

Chart 2

Start_2

AND NOT

Stop_2

Motor_2:=True

Stop_2 p u t

O u t

O u t p u t

Figure 10-44.

SFC charts for Motor_1 and Motor_2.

Motor_1

Motor_2

(a)

1

Start_1

0

1

Stop_1

0

1

X2

0

1

M_1

0

X2=Start_1

AND

Stop_1

(b)

1

Start_2

0

1

Stop_2

0

1

X4

0

1

M_2

0

X4=Start_2

AND NOT

Stop_2

Figure 10-45.

Timing diagrams for

(a)

Motor_1 and

(b)

Motor_2.

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10

As illustrated in Example 10-5, the programming of an input field device depends on how it is wired to the input interface. A timing diagram can provide tremendous help in determining the appropriate logic for a required transition. Note that the same type of fail-safe circuit that is required in ladder diagrams must also be incorporated when programming SFCs. A fail-safe start/stop circuit can be implemented using ladder diagrams in an action, as illustrated in Figure 10-46.

9

10

(Motor M_1)

Stop_1 Start_1 Motor_1

10

M1-1

Figure 10-46.

Fail-safe circuit implemented in an SFC using ladder diagrams.

D

IVERGENCES AND

C

ONVERGENCES

So far, we have only discussed sequential function charts that have one link between their steps and transitions. However, SFCs can have multiple links between these program elements (see Figure 10-47). These multiple links can be one of two types:

• divergences

• convergences

10 10

10

11

One link between each step

Multiple links between steps

10

11

20

21

11

12

11 21

13

12 13

(a)

(b)

Figure 10-47.

An SFC with

(a)

one link between the steps and transitions and

(b)

multiple links between steps and transitions.

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10

A divergence is when an SFC element has many links going out of it, while a convergence is when an element has many links coming into it. Both divergences and convergences can have either OR or AND configurations, which relate to the Boolean logic operators of the same name.

OR Divergences and Convergences.

Figure 10-48 shows an OR diver-

gence, or single divergence, which connects one step to many transitions. An

OR divergence allows an active step to pass its token to one of several steps via connecting transitions; thus, it “diverts” one step to several transitions.

Although an OR divergence connects a step with several transitions, the step can only activate one of these transitions at a time. In other words, like an exclusive-OR (XOR) function, the transitions must be mutually exclusive, triggering only one transition. Depending on the IEC 1131-3 system, an OR divergence must have either mutually exclusive triggering signals (i.e., when one transition is ON, the others are OFF) or programmed logic that creates a mutually exclusive situation (i.e., only one divergence path can be triggered at a time). Some systems avoid multiple divergence paths by selecting either the left-most or right-most divergence if several triggering conditions occur at once. This prioritizes divergence path selection.

Figure 10-48.

OR divergence.

Figure 10-49 shows an SFC with an OR divergence after step 1. Once step 1 is activated, either step 10 or 20 can be activated if either transition 1 or 2 is triggered. These two transitions have mutually exclusive triggering condi-

1

1 2

OR Divergence

(one step to several transitions)

10 20

10 20

11 30

11 30

OR Convergence

(several transitions to one step)

12

12

Figure 10-49.

Example of an OR divergence and an OR convergence.

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10 tions, so that the token advances in only one branch of the divergence.

Therefore, if transition 1 is triggered, step 10 becomes active; if transition 2 is triggered, step 20 becomes active.

An OR convergence, also called a single convergence, is used to link several transitions to the same step (see Figure 10-50). An OR convergence is the opposite of an OR divergence; it “converges” several transitions to one step.

Referring to Figure 10-49, this SFC illustrates an OR convergence in addition to an OR divergence. The OR convergence indicates that either of two links, one containing transition 11 and the other containing transition 30, can pass the control token to step 12. Because of the mutually exclusive requirement of the transition triggers, OR convergences and divergences are well suited for programming alarm circuit SFCs like the one shown in

Figure 10-51. In this program, if the circuit is working properly after initialization, the program will begin the control sequence (transition 1 to step

20); whereas if an error occurs, the program will initiate an alarm action

(transition 2 to step 30), which will sound an alarm until the alarm acknowledgment is triggered (transition 30). From step 1, the program can pass the token through only one path (either transition 1 or 2), but not both, because of the logical mutual exclusivity of the OR programming.

Figure 10-50.

OR convergence.

1

1

20

Run

AND

Not_Error

Start_Motor_M1

20 M1_Started

21

21 Start_Run

Time_Up

22

22

Stop_Motor_M1

M1_Stopped

Initialize

2 Error

30

30 Alarm

Acknowledge

Figure 10-51.

An alarm circuit with an OR divergence and an OR convergence.

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AND Divergences and Convergences.

An AND divergence, also called a

double divergence, provides a link from one transition to many steps in parallel form (see Figure 10-52). Unlike an OR divergence, an AND divergence can pass the token through several branches at once. For example, if transition 1 in Figure 10-53 is triggered, the program will pass control to both step 40 and step 50 at the same time. The parallel lines that represent an AND convergence indicate that it passes control to all the steps below it in parallel.

Figure 10-52.

AND divergence.

1

1

40

40

41

50

50

AND Divergence

(one transition to several steps)

51

AND Convergence

(several steps to one transition)

2

10

10

Figure 10-53.

Example of an AND divergence and an AND convergence.

An AND convergence, also referred to as a double convergence, links multiple steps to a single transition (see Figure 10-54). It is most commonly used to group SFC branches that were separated by an AND divergence.

Referring to Figure 10-53, once steps 41 and 51 both have the token (i.e., their actions are ON), the SFC program will wait for transition 2 to trigger and then pass the control token to step 10. This is an AND convergence function

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Figure 10-54.

AND convergence.

because both steps 41 AND 51 will be deactivated by the transition. If more than two links converge at the transition, then all the steps immediately preceding the convergence must be active before the transition can occur.

When it does occur, all the steps will converge to the step following the transition. For example, if only step 51 is active and transition 2 occurs, the

SFC will not pass control to step 10. When both steps 41 and 51 are active and transition 2 is TRUE, then control will pass to step 10.

AND divergences and convergences are ideal for running control programs in a synchronized, parallel manner. For example, Figure 10-55 illustrates a sequential function chart depicting two processes that occur in parallel (at the same time). When transition 1 becomes active, it diverts activity to two program sections, each controlling one of the processes. Each program section, Process1 and Process2, must be completed (steps 21 and 31 active) before transition 2 can occur, transferring control back to step 1. Note that in an SFC transition like transition 2, which has the trigger variable True, the transition is always triggered. When used in an application, this type of AND convergence transition simply waits for both processes to finish before transferring control to the next step.

1

1 Run

Initialize

20

20 Process1

End_of_Process1

21 Wait_for_Process2

30

30 Process2

End_of_Process2

31 Wait_for_Process1

2 True

Figure 10-55.

An SFC using AND convergences and divergences to run two processes in parallel.

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10

S

UBPROGRAMS

As illustrated in Figure 10-56, a process may have several main program charts executing different main control tasks within the PLC system.

Depending on the IEC 1131-3 software system, these main programs may utilize one or more subprograms (smaller, independent programs) to implement specialized control sequences (see Figure 10-57). For example,

ISaGRAF, a software system manufacturer who produces an IEC 1131– compatible program that runs in a “soft PLC” environment, provides the user

Main

Program

Chart 1

Main

Program

Chart 2

Main

Program

Chart 3

Main

Program

Chart 4

IN

OUT

Figure 10-56.

Process with several SFC programs.

Main Program Subprogram

Execution of parent (main) program is suspended until subprogram ends.

Figure 10-57.

Execution of a subprogram within a main program—main program is suspended until subprogram ends.

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10 with the ability to have a main program with one or more subprograms organized in a “father-child” relationship (see Figure 10-58). A father program can “call” (i.e., jump to) any of the child programs in a process, but a child program can only have one father program.

Main

Program

(Father)

Subprogram 1

(Child)

Entry

Subprogram 2

(Child)

Entry

Action that calls subprogram 1

Action that calls subprogram 2

Return Return

Action that calls subprogram 1 and subprogram 2

Father (main program) can call any child (subprogram)

Figure 10-58.

Subprograms organized in a “father-child” relationship.

Subprograms are similar in operation to macrosteps, except that macrosteps can actually be considered an SFC type of subroutine. They are also similar to custom function blocks in the sense that they can be used over and over where needed to implement a control function. Subprograms can be written in any of the IEC 1131-3 languages and can be called directly from an SFC action using any of the four languages. In contrast, a macrostep routine can only be called from the macrostep action that contains it. Custom-built function blocks, on the other hand, can be called from any main program’s action once they are in the SFC program library. These function blocks, however, cannot pass completed information to the main program like a subprogram can.

Subprograms differ from custom blocks and macrosteps because they can pass and receive variables and values in a manner similar to a computer program. For example, the statement (in ST):

Actual_Weight:=SP_Weighing (Max_Wt, Tare_Wt) states that the variable Actual_Weight will be equal to the value computed by the subprogram SP_Weighing (SP denotes subprogram), which receives the data values of the variables Max_Wt and Tare_Wt from the main program.

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When a program calls a subprogram, it asks for a value to be delivered when execution returns from the subprogram (see Figure 10-59). This value may be

Boolean, real, or integer. In the previous Actual_Weight example, the main program obtains or computes the variable values Max_Wt and Tare_Wt, which are passed to the subprogram. The subprogram SP_Weighing uses these two values to compute a value that is passed to the variable Actual_Weight. This variable value can then be used in the main program. Because subprograms run miniprograms within the larger control program, they can dramatically affect the scan cycle time.

Main

Program

1

Program computes Max_Wt and Tare_Wt

Actual_Weight:=SP_Weighing (Max_Wt and Tare_Wt)

2

Subprogram is called

Subprogram

SP_Weighing

Instructions

4

Variable Actual_Weight is returned to the main program.

Return

3

Value of Actual_Weight is computed and becomes the variable Actual_Weight.

Figure 10-59.

Interpretation of a subprogram call from a main program.

The syntax for calling subprograms may differ slightly from one software system to another. Nevertheless, all subprograms execute a small routine and then return a desired computed value to the main program. Figure 10-60 illustrates how an SFC program calls a subprogram from an instruction in one of its actions. In this example, step 11’s action (Action_11) has several

10

ST

Program

Instructions

Subprogram

SP_Check_Start

11

(Action_11)

Init_Value:=SP_Check_Start

Return

12

End of ST

Program Instructions

Figure 10-60.

A subprogram called by an action’s instruction.

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ST instructions with the instruction Init_Value:=SP_Check_Start initiating a subprogram named SP_Check_Start. This subprogram calculates the value of the variable Init_Value and sends this data back to the main program, so that the main program can use the variable value in the control process.

Figure 10-61 illustrates several subprogram example calls using other languages. The SUBPROG_1 subprogram will be called and executed once it is found directly in the program (IL and ST) or once the conditions are satisfied

(LD and FBD). Remember that the subprogram can be written in any of the languages, regardless of the calling language. The PLC’s manufacturer can provide IEC 1131-3 software system specifications for properly passing and receiving subprogram parameters.

IL Language ST Language

10

SUBPROG_1 New_Value:=SUBPROG_1

11

(Action_11)

12

LD Language FBD Language

A B SUBPROG_1

A

B

&

OR

Sample

SUBPROG_1

Figure 10-61.

Subprogram calls in IL, ST, LD, and FBD languages. SUBPROG_1 is defined as a subprogram during the program structure definition.

An SFC transition can also call a subprogram, as shown in Figure 10-62. In this example, transitions 1 and 2 call for the subprograms ErrEval and

EvalCond, which are mutually exclusive. These subprograms determine whether the process should be executed or whether an alarm condition should be set. The two subprogram calls follow the syntax:

Subprogram_Name();

This syntax specifies the subprogram name and the return condition (), which is a Boolean result that triggers the transition. The value returned by the subprogram yields the following conditions:

Return value = 0

FALSE condition

Return value <> 0

TRUE condition

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10

1

(Initialize)

1 ErrEval( );

20 (Alarm)

20 Acknowledge

Subprograms

2 EvalCond( );

20 (Process)

30 Process_End

Figure 10-62.

Subprogram call from a transition.

An action can also call a subprogram directly using an instruction syntax that is similar to a transition. For example, the following instruction:

Action:

Result_Variable:=Sub_Program();

End_Action; may be used to call a subprogram that will give a Boolean TRUE/FALSE value to the Result_Variable, which can be used to trigger a transition. Figure

10-63 illustrates a sample subprogram call from an SFC action. In this example, when the action in step 1 is activated, it initiates a subprogram that determines the value of the variable Init. The value of this variable (expressed in Boolean) is then passed back to the main program, where it is used to either trigger the start of a macrostep process program or sound an alarm. The variable labels Error and OK must have been declared as Boolean variables during programming (e.g., Error:=False, OK:=True) for the proper transition to occur. The (P) in the action name in step 1 indicates a pulse-type action

(momentary), which we will discuss in the next section.

1

20

Init = Error

(Alarm)

Acknowledge

Action (P):

Init:=SP_Initialize( );

End_Action;

30

Init = OK

(Process)

True

Figure 10-63.

Subprogram call from an SFC action.

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10-4 T

YPES OF

S

TEP

A

CTIONS

An action in a sequential function chart is executed when its corresponding step is active. When the step becomes active, the software control instructions contained in the action will be executed and scanned until the token is transitioned to the next step in the chart. A step action can take several forms, depending on the desired operation and result. These types of actions are:

• Boolean actions

• pulse actions

• normal actions

• SFC actions

B

OOLEAN

A

CTIONS

A Boolean action assigns a Boolean value (i.e., TRUE/FALSE) to a variable during the step’s action. A Boolean variable may be a real output or an internal output. The instruction simply reflects the state (ON/OFF) of the corresponding variable with respect to the state of its action. Let’s take, for example, the action shown in Figure 10-64. Once step 20 is active (X20 is

ON), the variable Bool_Var_1 will be turned ON as long as the step is active. The variable /Bool_Var_2—i.e., NOT Bool_Var_2 (/ = NOT)—is the

NOT value of the active step X20 and, accordingly, of the variable

Bool_Var_2. The variables Bool_Var_3 and Bool_Var_4, followed by (S) and (R) respectively, indicate set and reset instructions to the variable. The set

(S) parameter becomes active when the step becomes active, setting the variable to TRUE. The set variable stays active until it is reset in the same step

19

20

20 (Boolean_Action)

Bool_Var_1;

/Bool_Var_2;

Bool_Var_3(S);

Bool_Var_4(R);

Y19

1

0

1

X20

0

Bool_Var_1

1

0

Bool_Var_2

1

0

Bool_Var_3

1

0

1

Bool_Var_4

0

1

Y20

0

Figure 10-64.

Example of a Boolean action.

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10 or in another step; however, it keeps the variable as TRUE, even when the step is deactivated. Conversely, the reset (R) parameter resets the variable to

FALSE when the step activity is TRUE. The reset action remains FALSE until the variable is set. Figure 10-65 shows a similar example with different variables. Note that the Solenoid_2(R) instruction resets the variable Solenoid_2, which was set to ON in a previous action.

19

20

20 (Boolean_Action)

Motor_1;

/Motor_2;

Solenoid_1(S);

Solenoid_2(R);

1

Y19

0

1

X20

0

Motor_1

1

0

Motor_2

1

0

Solenoid_1

1

0

1

Solenoid_2

0

1

Y20

0

Figure 10-65.

Example of a Boolean action controlling a motor and a solenoid.

E

XAMPLE

10-6

Using SFC Boolean actions, implement a chart that will turn ON and

OFF two pilot lights according to the timing diagram shown in Figure

10-66. In the timing diagram, PLight_1 is ON for one second while

PLight_2 is OFF, then PLight_1 is OFF for one second while PLight_2 is ON. Assume that a normally open push button labeled as Start initiates the pilot light sequence and that a normally open push button labeled as Reset resets the whole operation, turning both pilot lights

OFF. Include a light enable (Light_EN) pilot light indicator that is ON at the start of the operation and OFF when the operation is reset.

Start

Reset

PLight_1

ON

OFF

PLight_2

ON

OFF

1 sec 1 sec

Figure 10-66.

Timing diagrams for two pilot lights.

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S

OLUTION

Figure 10-67 illustrates the desired timing diagram of the two inputs

(Start and Reset) and the three pilot lights (PLight_1, PLight_2, and

Light_EN). Figure 10-68 depicts the SFC implementation of this timing diagram, where the initial step sets both PLight_1 and PLight_2 to an OFF (FALSE) state. Once the Start push button is pushed, the token passes to step 2, which has no action, and continues to the

1

Start

0

1

Reset

0

1

Light_EN

0

1

PLight_1

0

1

PLight_2

0

1 sec 1 sec

Figure 10-67.

Timing diagram for the SFC implementation in Example 10-6.

1

1

Start

(Initialize)

PLight_1:=False

PLight_2:=False

2

2

3

Reset

(Reset)

Light_En(R);

3 True

4 Not_Reset

10

(ON1_OFF2)

PLight_1;

/PLight_2;

Light_EN(S);

10 TMR/X10/1 sec

11

(OFF1_ON2)

/PLight_1;

PLight_2;

11 TMR/X11/1 sec

Figure 10-68.

SFC implementation of the two pilot lights in Figure 10-66.

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10

OR divergence. At the OR divergence, control goes to step 10

(ON1_OFF2) if the Reset push button is not pressed (Not_Reset), thereby turning ON PLight_1, keeping PLight_2 OFF (opposite state of the step activity), and turning ON Light_EN using a set parameter. The timer transition Y10 is triggered one second after step X10 is activated, passing control to step X11, which reverses the state of the pilot lights using Boolean actions. Like the Y10 transition, the Y11 transition also allows one second of activation before it turns OFF the step and passes the token to step 2, where the sequence is repeated.

Conversely, if the Reset push button is pressed (Reset), the program activates step 3, which resets the light enable output and transitions the sequence to step 1, where the program will wait until the Start push button is pressed. Note that this SFC program requires the operator to depress the Reset push button input at transition 2 for at least two seconds in order to reset the lights to OFF. The reason for this is that the program may be at the opposite OR divergence (transition 4), which will last for two seconds before the reset signal can be scanned at transition 2.

The implementation of the previous example could have been done many different ways using Boolean actions. For instance, instead of using the

/PLight_2 and /PLight_1 instructions in steps 10 and 11, the program could have specified only the ON conditions of PLight_1 and PLight_2 in steps

10 and 11, respectively, letting the transition trigger turn OFF the variables.

A stand-alone action could also have been programmed to detect the reset function and send the program back to step 1 in the main chart. Figure 10-69

Chart 1

1 (Initialize)

PLight_1:=False

PLight_2:=False

If Reset Then F/Chart_1;X1

1 Start

Stand–Alone Action

2

2

(ON1_OFF2)

PLight_1;

TMR/X2/1 sec

3

3

(OFF1_ON2)

PLight_2;

TMR/X3/1 sec

Figure 10-69.

Implementation of the process in Example 10-6 using a stand-alone action.

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10 shows this stand-alone configuration, along with an alternative set of

Boolean actions for this program. Although a stand-alone action is not linked to the program, it will direct a transition move to a specified step if its logical conditions are satisfied. A stand-alone action basically acts as an interrupt jump to instruction, specifying the chart program and the step to go to. Note that a stand-alone action is active at all times, ready to force the program to the specified step. If the Reset push button in Figure 10-69 is pressed, the stand-alone action will force the program to go to step 1 of the

Chart_1 program, regardless of where it is in the execution of the Chart_1 program. Also, in this configuration, the Reset push button may be pushed momentarily, so it does not require a two-second push like it did before.

P

ULSE

A

CTIONS

Pulse actions allow the execution of one or more instructions in a step’s action only once after the activation of the step. That is, once the step is activated, a pulse action will occur only once before the step is deactivated.

Depending on the IEC 1131 software system, the instructions in the action may be in one or more of the available languages. The typical syntax of an

SFC pulse action looks like the block in Figure 10-70.

10

11

10

11

(Pulse_Action_Ex)

Action (P):

Instructions

End_Action;

Figure 10-70.

Syntax of a pulse action.

The notation (P) indicates a pulse action. A pulse action may be represented in a timing diagram as shown in Figure 10-71, where its execution is shown at the start of the step activity. Figure 10-72 illustrates a typical SFC with a

Step Activity

1

0

Pulse Action

Execution

1

0

Single execution (pulse) at the beginning of the step

Figure 10-71.

Execution of a pulse action.

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10 pulse action implementing a count-up (add by one) instruction using ST instructions. Pulse actions are well suited for applications that require onetime execution of an action, for instance, the initialization of variables in a process. Pulse action instructions are similar in operation to the one-shot functions discussed in Chapter 9.

1

1

CMD

(Initialize)

Action (P):

Count:=0

End_Action;

2

2

NOT_CMD

(Counting)

Action (P):

Count:=Count+1;

End_Action;

3

3 CMD

Note: Step 3 is included as a dummy step to wait for the CMD (command signal to count) to go from

OFF to ON to count again.

Figure 10-72.

A count-up instruction implemented as a pulse action.

N

ORMAL

A

CTIONS

Normal actions, also called nonstored actions, incorporate IEC 1131-3 language instructions that are executed continuously during the activity of a step. In other words, the instructions within a normal action will be executed and scanned over and over until the step is deactivated (see Figure 10-73). The basic syntax for a normal instruction is shown in Figure 10-74, where (N) indicates normal. Normal actions may also omit the (N) parameter in the instruction syntax.

Step Activity

1

0

Normal Action

Execution

1

0

Multiple execution of the normal/nonstored action during the active step

Figure 10-73.

Execution of a normal action.

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10

10

10

11

11

(Normal_Action_Ex)

Action (N):

Instructions

End_Action;

Figure 10-74.

Syntax for a normal action.

Figure 10-75 shows an example of a counting program using a normal action in step 2. Note that step 1 uses a pulse action to set the value of the variable

R_Count to zero. As the next example illustrates, the normal action in step

2 (programmed using ST language) performs a counting procedure on the rising edge of the signal Cmd (command) and stores the total count value as variable R_Count. This counting procedure is executed for as long as step 2 is active.

1

1

(Initialize)

Action (P):

R_Count:=0;

End_Action;

Start_Counting

2

2 (Count_Step)

Action (N):

If Cmd_Cnt AND NOT (Last_Cmd) Then

R_Count:=R_Count+1;

End_If;

Last_Cmd:=Cmd_Cnt;

End_Action;

Stop_Counting

Figure 10-75.

Example of a counting program using a normal action.

E

XAMPLE

10-7

Referring to Figure 10-75, explain the operation of step 2. Also, draw a timing diagram of the signals indicating when the counter variable

R_Count begins and ends during each count.

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10

S

OLUTION

Figure 10-76 illustrates the timing diagram of step 2. The variable

R_Count increases its value by one every time the signal Cmd_Cnt goes from OFF to ON. The IF condition in step 2 of Figure 10-75 ensures that the signal is tested to make sure that it has gone OFF after the OFF-to-ON transition. The Last_Cmd:=Cmd_Cnt instruction traps the last value of Cmd_Cnt, so that the count does not get executed again without Cmd_Cnt going OFF first. When the action is deactivated by the Stop_Counting transition variable, the status of

Cmd_Cnt and Last_Cmd are reset to OFF (not stored). Note that the

R_Count value is reset to zero at step 1. However, the value of R_Count will be stored as a normal integer value in the program until it is changed, as in this example, in step 1.

1

Start_ Counting

0

X2

1

0

Stop_Counting

1

0

1

Cmd_Cnt

0

1

Last_Cmd

0

1

R_Count

0

Beginning of 1st Count

Beginning of 2nd Count

Figure 10-76.

Timing diagram of step 2 in Figure 10-75.

SFC A

CTIONS

An SFC action is a child-type SFC sequence program that can be activated

(started) or deactivated (killed) when the step is active. Remember that a child program belongs to a father, or main, program. SFC actions may have normal, set, or reset parameters that influence the operation of the

SFC action (see Table 10-3). Figure 10-77 illustrates a batching process SFC that uses SFC actions. The main SFC program has two child programs,

Batch_Mix and Batch_Pump, which are activated by the main (father) program. The main SFC program uses normal, set, and reset operands.

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10

C h li d

S y

_ P r o g

n t a x

_ N a m e ( N )

C h li d _ P r o g _ N a m e ( S ) ;

C h li d _ P r o g _ N a m e ( R ) ;

;

D e s c r i p t i o n

N o s t a r r t m a e d l : A n w h e n

S F C t h e s a c t e p t i o b e n c w i t h o m e s n o n s t o r e d , d e a c t i v a t e d .

c h i l d

T h e a c t i o n

( N ) p a i s k i l r a m e l a n e t e d r

( N ) a c t i v e .

p a r a m e t e r

T h e n o r m a l , i s o r i w h s e n t h e o p t i o n a l s t e p i n i s t h e s y n t a x o f t h i s a c t i o n .

S e t : w h e n

A t n h

S e

F s

C t e a c p t i o n w i t h b e c o m e s a n ( S ) a c t i v e .

p a r a m e t e r

T h i s s e t i s

( S ) s t a r t e d a c t i o n r e m a i n s a c t i v a t e d w h e n t h e s t e p i s d e a c t i v a t e d .

R e s e t : w h e n t

A n h e s

S F C t e p a c b e c t i o n o m e w i s t h a c a n t i v e

(

.

R

T

) h p a r a m i s r e s e e t t e r

( R ) i s k i ll e d a c t i o n i s u s e d t o t u r n o f f a s e t S F C a c t i o n .

Table 10-3.

Syntax for SFC action parameters.

Main Chart

1

1 Start

Child Charts

Batch_Mix Batch_Pump

10 Batch_Mix (N); 20 Batch_Pump (S);

20 Level_Full

30 Batch_Pump (R);

2 Continue

Figure 10-77.

Batching process implemented using SFC actions.

Once Start is triggered, the SFC activates both of the child programs. The

Batch_Mix program has a normal (nonstored) parameter, while the

Batch_Pump program has set and reset parameters. The Batch_Pump program becomes active as soon as step 20 is activated. It remains active until the signal Level_Full is turned ON, activating step 30 and resetting, or killing, the Batch_Pump program.

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10

SFC actions may be started or killed using any of the programming languages, depending on the IEC 1131-3 software system manufacturer. The syntax differs slightly from one system to another and may take the form shown in Table 10-4. The start and kill instructions have the same effects as the set (S) and reset (R) parameters, respectively. Figure 10-78 illustrates an

SFC action using structured text. The starting and killing of the child program can be either nonstored or pulse actions, but in this example, the

S

K I

T

L

A

L

R

(

T

C h

( C h

S T A T U S ( C h

S

li

y

d

n

li d _ P r o g

_

t a

li d _ P r o

x

g _ N a m e ) ;

_ N a m e ) ;

P r o g _ N a m e ) ;

D e s c r i p t i o n

S t a r t s , o r a c t i v a t e s , t h e S F C p r o g r a m

C h b e li d _ P r a c t i v e o g u

_ N a n t li i t m e .

i s

T h k i ll e d e c i n h a li d n o t p r o h e r g r a m s t e p .

w i ll

K i l l s , s t a r t e d o r b y d e a c a S T t i v a

A R T t e s , a n S F i n s t r u c t i o n .

C p r o g r a m

S e t h e n d s t s a

( T R U E ) t a u o m e s s a g e s r i o f n a a c t i c h v e t o li d

( F t p h r e o

A L g o r p e a

S E ) .

r a m : t o r e i t h i n d i e r c a t i n g a c t i v e

Table 10-4.

Alternative syntax for SFC action parameters.

Main Chart

1

1 Start

Child Chart

Batch_Pump

2

2

(First_Action_Start)

Action (P):

Start (Batch_Pump);

End_Action;

10

Level_Full

(First_Action_Status)

Action (N):

If Status (Batch_Pump)=0

Then

Message:=“Batch Stopped”;

Else

Message:=“Batch Running”;

End_If;

End_Action;

3

(First_Action_Kill)

Action (P):

Kill (Batch_Pump);

End_Action;

3 Continue

Figure 10-78.

An SFC action programmed using ST and alternative SFC action syntax.

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10 start and kill of the Batch_Pump program are both pulse actions. The status action (step 10) is a nonstored action used to send a message, perhaps to a display, to inform the operator of whether the batch is running or not running.

10-5 IEC 1131-3 S

OFTWARE

S

YSTEMS

In addition to the implementation of the IEC 1131-3 in PLCs, many manufacturers of software systems provide the IEC 1131-3 standard in different hardware platforms and operating systems, such as Windows and

Unix. These software systems emulate the operation of a programmable controller (i.e., they are software PLCs or “soft PLCs”) in the hardware platform being used (e.g., a PC). They support either a third-party I/O system or one or more of a PLC manufacturer’s I/O through the use of built-in drivers that communicate with an I/O rack (see Figure 10-79).

PC

(“Soft PLC”)

I/O Devices

IEC 1131-3

Software System

Figure 10-79.

A software PLC interfaced with I/O devices.

The Paradym-31 software system from Wizdom Controls, Inc. provides an

IEC 1131-3 graphical programming environment in a Windows-based software platform. This system allows the user to employ LD, FBD, or a custombuilt function block language to program the actions in the SFC application.

The user must program custom function blocks in C code. In fact, the

Paradym-31 system compiles the entire IEC 1131 program in an ANSI C code and then downloads it to a hardware platform or to a third-party controller and its system.

Another software system, which offers a full implementation of all five IEC

1131-3 languages, is ISaGRAF from TranSys, Inc. and CJ International. This system provides a thorough set of instructions for all languages and several

SFC-type actions. ISaGRAF also allows the user to test or simulate a PLC program in a personal computer, making it easier to debug an entire application or parts of it without actual hardware and I/O connections.

ISaGRAF can run in a variety of operating systems, including OS-9, VRTX,

VXWorks, ControlWare, DOS, and Windows NT. This software package can also transfer a control program to a programmable controller using a PortPack tool driver. Table 10-5 lists the ISaGRAF set of instructions for each of the

IEC 1131-3 languages.

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PLC L

ANGUAGES

S

IMILAR TO THE

IEC 1131-3

PLC manufacturers may adapt their programmable controller languages to embrace some of the qualities of the IEC 1131-3 standard. These qualities usually reflect the ease of programming found when using sequential function charts to encapsulate parts of a ladder program into an action. This added software versatility enhances a programmable controller system tremendously by speeding up program development, minimizing interlocking sequences, and reducing system troubleshooting time.

For instance, PLC Direct, a PLC manufacturer, offers programmable controllers with both standard ladder programming language instructions

(RLL—relay ladder logic) and RLL Plus, which is their software language that incorporates some of the features of sequential function charts. In fact, the RLL Plus language closely follows the activation of a horizontal flowchart. As an example, let’s examine a machine press application. The sequence chart in Figure 10-80 shows the sequential steps for implementing the pressing and stamping routine, which can be programmed using either standard ladder diagrams (see Figure 10-81a) or RLL Plus (see Figure 10-

81b). The highlighted sections of the program in Figure 10-81a indicate the interlocking requirements for the operation shown in the flowchart.

While both the ladder diagram and the RLL Plus programs implement the same control and use the same inputs and outputs, the RLL Plus program is much easier to understand and troubleshoot. For example, if the press system stops at SG S0003 (stage step 0003) and the coil output does not jump to

SG S0004 (stage step 0004), then the fault must have occurred in either the

Press Down output (Y1) or the Lower Limit input (X4). By investigating just this area of the PLC program, rather than the whole ladder diagram, the troubleshooting technician can find the fault more quickly.

The RLL Plus programming language, like sequential function charts, executes each stage’s ladder diagram actions when that stage is active. When the control program starts, the initial stage (ISG) is activated. Jump instructions, driven by the ladder diagram contacts that form the transition logic, pass the token from stage to stage. The last rung in the active stage performs the transition logic. The RLL Plus software also supports divergences and convergences, along with the use of timers and counters in the implementation of transitions. Subroutine implementations are also available through the use of call instructions in the stage programming. Figure 10-82 presents the stage (SFC step) instructions typically used with the RLL Plus programming language.

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10

Part

Detection

Sensor

Press Arm

Part

Conveyor

Clamp

Machine Press

Movement

Operation

(0) The machine is inactive

(1) The operator presses the Start PB to start the machine.

(2) The machine checks for a part. If the part is present, the process continues. If it is not, the conveyor moves until a part is present.

(3) A clamp locks the part in place.

(4) The press stamps the part.

(5) The clamp is unlocked and the finished piece is moved out of the press.

(6) The process stops if the machine is in one-cycle mode or continues if it is in automatic mode.

Step 0 Step 1 Step 2 Step 3 Step 4 Step 5

Step 6

Start PB

Inputs

Part Present

Part Locked

Part Unlocked

Lower Limit

Upper Limit

Conveyor Indexed

One-Cycle Switch

X4

X5

X6

X7

X0

X1

X2

X3

Outputs

Clamp

Press

Conveyor

Y0

Y1

Y2

Note: For this PLC an X denotes an input and a Y denotes an output.

Figure 10-80.

Pressing and stamping routine.

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Executes all rungs left to right, top to bottom

Run 1 Cycle Stop*

Run

Out

C0

C0

Start

C3 X11

X0

Run

C0

Part

Unlocked

C3

Release

Clamp

X3

Clamp

Y0

Press

Y1

Press

Complete

Lower

Limit

X4

Index

Conveyor

X6

Press

Complete

Out

C1

C1

Part

Locked

X2

Press

X7

*wired N.C.

Part

Present

C2

Lower

Limit

Press

Complete

X4 C1

K1

MLS

Clamp

Out

Y0

Press

Out

Y1

Y1

Press

Complete

Upper

Limit

Release

Clamp

Out

C2

C1 X5

K0

Out

Press

Complete

Part

Unlocked

Index

Conveyor

Conveyor

Out

Y2

C1

Run

X3 X6

C0

1 Cycle

Index

Conveyor

X5

(a)

(a)

1 Cycle

Out

C3

Only executes logic in stages that are active

ISG

S0000

Wait for start

Start

S1

JMP

X0

SG

S0001

Check for a part

Part Present

S2

JMP

X1

Part Present

S5

JMP

X1

SG

S0002

Lock the clamp

Clamp

SET

Y0

Part Locked

S3

JMP

X2

SG

S0003

Press the part

Press

Down

Y1

Lower Limit

S4

JMP

X4

SG

S0004

Unlock the clamp

Top Limit

Clamp

RST

Y0

X5

Part Unlocked

S5

JMP

X3

SG

S0005

Index the conveyor

Move

Conveyor

Y2

Conveyor Moved

S6

JMP

X6

SG

S0006

One cycle or automatic?

One Cycle

S0

JMP

X7

Automatic

S1

JMP

X7

(b)

(b)

Figure 10-81.

Pressing/stamping routine programmed in

(a)

ladder diagrams and

(b)

RLL

Plus. SG denotes a stage step and ISG denotes an initial stage step.

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Initial Stage (ISG

)

The initial stage instruction is used to signal the starting point of the user application program. The ISG instruction will be active on power up and

PROGRAM to RUN transitions.

( aaa = Stage memory location)

Stage (SG)

Stage instructions are used to create structured programs. They are program segments that can be activated or deactivated with control logic.

( aaa = Stage memory location)

Jump (JMP)

The JMP coil deactivates the active stage and activates a specified stage when there is power flow to the coil.

( aaa = Stage memory location)

Not Jump (NJMP)

The NJMP coil deactivates the active stage and activates a specified stage when there is no power flow to the coil.

( aaa = Stage memory location)

Converge Stages (CV)

Converge stages is a group of stages that, when all stages are active, will activate another stage specified by the associated converge jump(s) (CVJMP).

One scan after the CVJMP is executed, the converge stages will be deactivated.

( aaa = Stage memory location)

Converge Jump (CVJMP)

The CVJMP coil deactivates the active CV stages and activates a specified stage when there is power flow to the coil.

( aaa = Stage memory location)

ISG

S aaa

SG

S aaa

S aaa

JMP

S aaa

NJMP

CV

S aaa

S aaa

CVJMP

Block Call/Block/Block End (BCALL w/BLK and BEND)

The BCALL coil activates a block of stages when there is power flow to the coil.

BLK is the label that marks the beginning of a block of stages. BEND is the label used to mark the end of a block of stages.

( aaa

= C memory location)

C aaa

BCALL

BLK

C aaa

BEND

Figure 10-82.

RLL Plus stage instructions.

Referring to Figure 10-81b, note that the program uses set and reset output instructions (SG2 and SG4, respectively) to turn ON and OFF the clamp

(output Y0). Just like in an SFC, this is required because standard outputs in a stage are turned OFF once the control token has been passed to another stage. In this case, set and reset parameters were used because the clamp output solenoid needed to be ON from stage 2 through stage 4. Figure 10-

83a shows the equivalent sequential function chart diagram of the program shown in Figure 10-81b. Figure 10-83b illustrates the flowchart of the process, which closely resembles the operation of the SFC program.

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Begin

0

Initial Stage IS00

Wait_for_Start

Start

Start

PB

?

Y

SG 01

Check for Part

N

1

Stage S01

Check_for_Part

NOT Part_Present

2

Part_Present

Stage 02

Lock_the_Clamp

N

Part

Present

?

Y

SG 02

Lock the Clamp

3

Part_Locked

Stage 03

Press_the_Part

Part

Locked

?

Y

SG 03

Press the Part

N

Lower_Limit

4

Stage 04

Unlock_the_Clamp

Lower

Limit

?

N

Y

SG 04

Unlock the Clamp

Part_Unlocked

5

Stage S05

Index_the_Conveyor

Part

Unlocked

?

N

Y

SG 05

Index (move) Conveyor

6

Conveyor_Moved

Stage S06

Check_Mode

One_Cycle_or_Auto

Conveyor

Moved?

Y

SG 06

Check Mode

N

One_Cycle NOT One_Cycle

One

Cycle or

Auto

Auto

(b) (a)

Figure 10-83. (a)

An SFC program for the press/stamp control program and

(b)

its corresponding flowchart.

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10

E

XAMPLE

10-8

Referencing Figures 10-81b and 10-83a, implement an additional stage that monitors a normally closed stop push button and resets the completed pressing operation. This stage should be monitored at all times and, upon activation (i.e., after resetting all outputs), should return to the initial stage.

S

OLUTION

The monitoring stage of the Stop PB must be activated as soon as the

Start PB is pressed, which is when the program starts executing control. Figure 10-84 illustrates the Stop PB monitoring implementation. Note that stage S500 is ON (set) as soon as Start is pressed in the initial stage. As the PLC scans the control program during execution,

Only executes logic in stages that are active

ISG

S0000

Wait for start

Start

X0

S500

SET

S1

JMP

SG

S0001

Check for a part

Part Present

S2

JMP

X1

Part Present

S5

JMP

X1

SG

S0002

Lock the clamp

Part Locked

Clamp

Set

Y0

S3

JMP

X2

When Start is pressed, stage

500 is set and program execution continues in stages.

SG

S0500

Monitor for stop

Stop Y0–Y2

RST

X10

S0–S6

RST

S0

JMP

If the N.C. stop PB is pressed, outputs Y0–Y2 and stages

S0–S6 are reset. Program control goes to initial stage.

Figure 10-84.

Implementation of a stop-monitoring block.

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10 it also scans the Stop signal, which if pressed, resets all outputs (Y0 to Y2) and stages (S0 to S6) and then jumps to the initial stage (S0).

Figure 10-85 shows the equivalent SFC level 1 implementation chart.

Note that in the SFC, stage (step) 499 has been included so that a parallel AND divergence can be implemented and the Stop PB can be scanned (the actions in steps 4 and 5 do not execute any instructions).

As the NOT Stop transition occurs (NOT Stop because of the normally closed wiring), the token passes to stage 500 for a one scan reset of all outputs, then, the token goes back to the initial stage.

499

Stage 499

Wait/Monitor

Stop_Signal

NOT Stop

500

Stage 500

Reset_Outputs

Always_True

0

Start

Initial Stage IS00

Wait_For_Part

1

Stage 501

Check_for_Part

NOT Part_Present

2

Part_Present

Stage 502

Lock_the_Clamp

3

Part_Locked

Stage 503

Press_the_Part

4

Lower_Limit

Stage 504

Unlock_the_Clamp

Part_Unlocked

5

Stage 05

Index_the_Conveyor

6

Conveyor_Moved

Stage 06

Check_Mode

One_Cycle_or_Auto

One_Cycle NOT One_Cycle

Figure 10-85.

SFC level 1 implementation of Figure 10-84.

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10-6 S

UMMARY

The IEC 1131-3 standard provides PLC users with tremendous advantages in both the programming and troubleshooting of a control system. Although not all PLC manufacturers offer an IEC 1131-3 language for their products, the trend is leaning toward the use of an SFC-type of structured programming, including one or more of the programming languages, in most PLCs.

PLCs and software systems that support all or part of the IEC 1131 standard have better documented programs than other systems because of the structure required to implement the control program. Other IEC 1131-3 characteristics, such as the necessity to declare variables to the I/O system, provide immediate benefits to anyone who is troubleshooting the system. The same holds true for anyone else who must modify the program after installation.

Even though the IEC 1131-3 programming method reduces program design time, users must employ a few guidelines to obtain maximum benefits from the method. Table 10-6 lists some rules that will help to obtain the maximum benefits of IEC 1131-3 programming and troubleshooting. For PLC users and programmers, one of the most important advantages associated with the

IEC 1131-3 is the option to choose the language for the programming and implementation of the control system.

P

ROGRAMMING

G

UIDELINES

• Be consistent in the definition of the control outputs and routines that will take place in actions.

• Define variables with proper, easy-to-reference names, especially the I/O variables.

• Be consistent in the programming of transitions. For instance, program transition conditions from inside the actions or from external inputs to avoid double usage of transition variables within steps.

• Interlocking should be done, when possible, in the transitions. Do not perform interlocking in one action for another action, since one action may be ON while the other one is OFF.

• Document the actions and transitions properly so that troubleshooting personnel understands how the machine or process is being controlled.

T

ROUBLESHOOTING

G

UIDELINES

• When there is a malfunction, locate the step that is active at that time.

• Find out the status of the transition elements that form the logic after the step where the operation halted. If it is an external input variable, check for hardware connections and interfacing; if it is an internal variable (coil, contact), check the step logic to see if the triggering signal is occurring.

• The active step and its following transition are generally the location in the program where a fault may occur and where the program stops.

Table 10-6.

Rules for IEC 1131-3 programming and troubleshooting.

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One of the greatest obstacles to achieving a programming standard common to all PLCs is that PLC manufacturers cautiously protect their proprietary ways of using ladder and function block instructions in order to maintain competitive advantages. This, however, does not mean that PLC manufacturers will not evolve their languages into IEC 1131-3–type languages that are transportable within their own family of PLCs. In the future,

IEC 1131-3 “translators” (see Figure 10-86), which will be able to transport an IEC 1131-3 program from one PLC to another via PC software, may solve the transportability problem between different PLC brands. Regardless of potential and present obstacles, the IEC 1131 standard will surely set the pace for all PLC manufacturers wanting to continue their quest for improvement in control programming, troubleshooting, and system training.

Brand

PLC 1

Brand

PLC 2

Translator

Software

IEC 1131-3

A

IEC 1131-3

B

Figure 10-86.

IEC 1131-3 translator.

K

EY

T

ERMS action

Boolean action

Boolean variable convergence divergence function block diagram (FBD)

IEC 1131 standard

IEC 1131-3 programming standard instruction list (IL) integer variable ladder diagram language (LD) macrostep normal action pulse action real variable

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sequential function charts (SFC)

SFC action stand-alone action step structured text (ST) subprogram transition

The IEC 1131 Standard and

Programming Language

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10

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C

HAPTER

E

LEVEN

S

YSTEM

P

ROGRAMMING

AND

I

MPLEMENTATION

He that invents a machine augments the power of man and the well-being of mankind.

—Henry Ward Beecher

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11

C

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H

IGHLIGHTS

The implementation of a control program requires complex organizational and analytical skills, which change depending on the application. Because they are so varied, we cannot explain how to solve every specific control task.

Nevertheless, we can provide you with techniques and guidelines for completing this problem-solving process. In this chapter, we will introduce a strategy for implementing a control program, which includes program organization, system configuration, and I/O programming. These strategies also apply to PLCs with the IEC 1131-3 programming standard. Additionally, we will present both simple and complex PLC programming examples. After you finish this chapter, you will be ready to learn how to document the PLC system—the last step in implementing the control program.

11-1 C

ONTROL

T

ASK

D

EFINITION

A user should begin the problem-solving process by defining the control

task, that is, determining what needs to be done. This information provides the foundation for the control program. To help minimize errors, the control task should be defined by those who are familiar with the operation of the machine or process. Proper definition of the task is directly related to the success of the control program.

Control task definition occurs at many levels. All of the departments involved must work together to determine what inputs are required, so that everyone understands the purpose and scope of the project. For example, if a project involves the automation of a manufacturing plant in which materials will be retrieved from the warehouse and sent to the automatic packaging area, personnel from both the warehouse and packaging areas must collaborate with the engineering group during the system definition.

Management should also be involved if the project requires data reporting.

If the control task is currently done manually or through relay logic, the user should review the steps of the manual procedure to determine what improvements, if any, can be made. Although relay logic can be directly implemented in a PLC, the procedure should be redesigned, when possible, to meet current project needs and to capitalize on the capabilities of programmable controllers.

11-2 C

ONTROL

S

TRATEGY

After the control task has been defined, the planning of its solution can begin.

This procedure commonly involves determining a control strategy, the sequence of steps that must occur within the program to produce the desired output control. This part of the program development is known as the development of an algorithm. The term algorithm may be new or strange to some readers, but it need not be. Each of us follows algorithms to accomplish

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11 certain tasks in our daily lives. The procedure that a person follows to go from home to either school or work is an algorithm—the person exits the house, gets into the car, starts the engine, and so on. In the last of a finite number of steps, he or she reaches the destination.

The PLC strategy implementation for a control task closely follows the development of an algorithm. The user must implement the control from a given set of basic instructions and produce the solution in a finite number of steps. If developing an algorithm to solve the problem becomes difficult, he or she may need to return to the control task definition to redefine the problem. For example, we cannot explain how to get from where we are to

Bullfrog County, Nevada unless we know both where we are and where

Bullfrog County is. As part of the problem definition, we need to know if a particular method of transportation is required. If there is a time constraint, we need to know that too. We cannot develop a control strategy until we have all of this problem definition information.

The fundamental rule for defining the program strategy is think first,

program later. Consider alternative approaches to solving the problem and allow time to polish the solution algorithm before trying to program the control function. Adopting this philosophy will shorten programming time, reduce debugging time, accelerate start-up, and focus attention where it is needed—on design when designing and on programming when programming.

Strategy formulation challenges the system designer, regardless of whether it is a new application or the modernization of an existing process. In either case, the designer must review the sequence of events and optimize control through the addition or deletion of steps. This requires a knowledge of the

PLC-controlled field devices, as well as input and output considerations.

11-3 I

MPLEMENTATION

G

UIDELINES

A programmable controller is a powerful machine, but it can only do what it is told to do. It receives all of its directions from the control program, the set of instructions or solution algorithms created by the programmer. Therefore, the success of a PLC control program depends on how organized the user is.

There are many ways to approach a problem; but if the application is approached in a systematic manner, the probability of mistakes is less.

The techniques used to implement the control program vary according to the programmer. Nevertheless, the programmer should follow certain guidelines. Table 11-1 lists programming guidelines for new applications and modernizations. New applications are new systems, while modernizations are upgraded existing control systems that have functioned previously without a PLC (i.e., through electromechanical control or individual, analog, loop controllers).

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N e w A p p l i c a t i o n s M o d e r n i z a t i o n s

• U n d e r s t a n d t h e s y s t e m .

t h e d e s i r e d f u n c t i o n o f

• R e v i e w a n d o p t p i m o s s i z e i b t l e h e c o n t r o l m e t h o d s p r o c e s s o p e r a t i o n .

• F l o w c h a r t t h e p r o c e s s o p e r a t i o n .

• l

I m p o g i l c e m e n t t h e d i a g r a m s s y m b o l o g y .

f l o w c h a r t o r r e l a y b y l o g i c u s i n g

A s s i g n i n t e r n a l r e a l I / a d d r e

O s s a d d r e e s t o s s i n e s p u t a n d s a n d o u t p u t s .

• i

T r a n n t o s l a t

P L C e t h e l o g i c c o d i n g .

i m p l e m e n t a t i o n

• U n d e r s m a c h i n t e a n d t h e a c t u a l f u n c t i o n .

p r o c e s s o r

• R e v i e w a n d o p t i m a c h i n e m i z e w h e l o n g i p c o s o f o p e s i b l e .

r a t i o n

• A s s i g n r e a l I / O a n d i n t e r n a l a d d r e s s e s t o i n p u t s a n d o u t p u t s .

• T r a n s l a t e r e l a y

P L C c o d i n g .

l a d d e r d i a g r a m i n t o

Table 11-1.

Programming guidelines.

As mentioned previously, understanding the process or machine operation is the first step in a systematic approach to solving the control problem. For new applications, the strategy should follow the problem definition. Reviewing strategies for new applications, as well as revising the actual method of control for a modernization project, will help detect errors that were introduced during the planning stages.

The programming stage reveals the difference between new and modernization projects. In a modernization project, the user already understands the operation of the machine or process, along with the control task. An existing relay ladder diagram, like the one shown in Figure 11-1, usually defines the sequence of events in the control program. This ladder diagram can be almost directly translated into PLC ladder diagrams.

New applications usually begin with specifications given to the person who will design and install the control system. The designer translates these specifications into a written description that explains the possible control strategies. The written explanation should be simple to avoid confusion. The designer then uses this explanation to develop the control program.

11-4 P

ROGRAM

O

RGANIZATION AND

I

MPLEMENTATION

Organization is a key word when programming and implementing a control solution. The larger the project, the more organization is needed, especially when a group of people is involved.

In addition to organization, a successful control solution also depends on the ability to implement it. The programmer must understand the PLC control task and controlled devices, choose the correct equipment for the job

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L1

PB14

LS7

System Programming and Implementation

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11

L2

CR1

PL3

PS7 CR1

SOL

SOL3 UP

CR2

LS8 PS7 LS9 CR2

SOL4 FWD

Start

Reset CR2

SOL5 DWN

LS8

CR1

CR3

CR3

PL4

Figure 11-1.

Electromechanical relay circuit diagram.

(hardware and software), and understand the PLC system. Once these preliminary details are understood, the programmer can begin sketching the control program solution. The work performed during this time forms an important part of the system or project documentation. Documenting a system once it is installed and working is difficult, especially if you do not remember how you got it to work in the first place. Therefore, documenting the system throughout its development will pay off in the end.

C

REATING

F

LOWCHARTS AND

O

UTPUT

S

EQUENCES

Flowcharting is a technique often used when planning a program after a written description has been developed. A flowchart is a pictorial representation that records, analyzes, and communicates information, as well as describes the operational process in a sequential manner. Figure 11-2 illustrates a simple flowchart. Each step in the chart performs an operation, whether it is an input/output, decision, or data process.

In a flowchart, broad concepts and minor details, along with their relationship to each other, are readily apparent. Sequences and relationships that are hard to extract from general descriptions also become obvious when expressed

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11 through a flowchart. Even the flowchart symbols themselves have specific meanings, which aid in the interpretation of the solution algorithm. Figure 11-

3 illustrates the most common flowchart symbols and their meanings.

The main flowchart itself should not be long and complex; instead, it should point out the major functions to be performed (e.g., compute engineering units from analog input counts). Several smaller flowcharts can be used to further describe the functions specified in the main flowchart.

Once the flowchart is completed, the user can employ either logic gates or contact symbology to implement the logic sequences. Logic gates implement a logical output sequence given specific real and/or internal input conditions,

START

Set Preset

Values

Is PB

Pressed?

NO

Read Analog

Input

Store In

Temp. Reg.

Is Temp.

> 100˚C

No

Turn Heater

Coil ON

Yes

Go To

Subroutine

END

Figure 11-2.

Simple flowchart.

Process

A group of one or more

instructions that per-

form a processing function

Input/Output

Any function involving

an input /output device

Decision

A point in the program

where a branch to alter-

nate paths is possible

Preparation

A group of one or more

instructions that sets

the stage for subsequent

processing

Predefined Process

A group of operations

not detailed in the

flowchart (often a

library subroutine)

Terminal

Beginning, end, or point

of interruption in a

program

Connector

Entry from, or exit to,

another part of the

flowchart

Flowline

Direction of processing

or data flow

Annotation

Descriptive comments

or explanatory notes

provided for clarification

Figure 11-3.

Flowchart symbols.

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11 while PLC contact symbology directly implements the logic necessary to program an output rung. Figure 11-4 illustrates both of these programming methods. Users should employ whichever method they feel most comfortable with or, perhaps, a combination of both (see Figure 11-5). Logic gate diagrams, however, may be more appropriate in controllers that use Boolean instruction sets.

Inputs and outputs marked with an X on a logic gate diagram, as in Figure 11-

4b, represent real I/O in the system. If no mark is present, an I/O point is an internal. The labels used for actual input signals can be either the actual device names (e.g., LS1, PB10, AUTO, etc.) or symbolic letters and numbers that are associated with each of the field elements. During this stage, the user should prepare a short description of the logic sequence.

(a)

Counter 2

330 gallons of B

Reset B

(Reset SOL2)

B Finished

(Start of pump back B)

M

B Finished

Counter 2

330 gallons of B

(b)

B Finished

(Start of pump back B) Reset B

(Reset SOL2)

Figure 11-4. (a)

PLC contact symbology and

(b)

logic gate representation of a logic sequence.

Meter

SOL1

Count A Gallon

Up

C1

500 Gal. of A

PV = 500 Gal.

Clear C1

A Finished

Reset

Figure 11-5.

A combination of logic gates and contact symbology.

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11

C

ONFIGURING THE

PLC S

YSTEM

PLC configuration should be considered during flowcharting and logic sequencing. The PLC’s configuration defines which I/O modules will be used with which types of I/O signals, as well as where the modules will be located in the local or remote rack enclosures. The modules’ locations determine the I/O addresses that will be used in the control program.

During system configuration, the user should consider the following: possible future expansions; special I/O modules, such as fast-response or wire fault inputs; and the placement of interfaces within a rack (all AC I/O together, all DC and low-level analog I/O together, etc.). Consideration of these details, along with system configuration documentation, will result in a better system design.

R

EAL AND

I

NTERNAL

I/O A

SSIGNMENT

The assignment of inputs and outputs is one of the most important procedures that occurs during the programming organization and implementation stages. The I/O assignment table documents and organizes what has been done thus far. It indicates which PLC inputs are connected to which input devices and which PLC outputs drive which output devices. The assignment of internals, including timers, counters, and MCRs, also takes place here.

These assignments are the actual contact and coil representations that are used in the ladder diagram program. In applications where electromechanical relay diagrams are available (e.g., modernization of a machine or process), identification of real I/O can be done by circling the devices and then assigning them I/O addresses (see Example 11-1).

Table 11-2 shows an I/O address assignment table for real inputs and outputs, while Table 11-3 shows an I/O address assignment table for internals. These assignments can be extracted from the logic gate diagrams or ladder symbols

I / O A d d r e s s

M

T o y d

I n p

p

O u t p

O u t p

u e

u t u u

l e

t t

R a c k

0

0

0

0

0

0

0

0

0

0

G r o

1

1

0

0

0

0

0

0

0

0

u p T e r m

0

1

2

3

6

7

4

5

0

1

i n a l D e s c r o n

L S 1 — P o s i t i o n

L S 2 — D e t e c t

S e l S w i t c h — S e l e c t

P B 1 — S t a r t

1

S O L 1

P L 1

P L 2

M o t o r M 1

S O L 2

P L 3

i p t i

Table 11-2.

I/O address assignment table for real inputs and outputs.

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11

D e v i c e

C R 7

T D R 1 0

C R 1 0

C R 1 4

I n t e r n a l

1 0 1 0

T 2 0 0

1 0 1 1

1 0 1 2

1 0 1 3

D e s c r i p t i

Table 11-3.

I/O address assignment table for internal outputs.

o n

C R 7 r e p l

O N d e l a y a c e m e n t t i m e r 1 2

C

C

S

R

R e t

1

1 u

0

4 p r e p l a c e m e n t r e p l a c e m e n t i n t e r l o c k s e c that were used to describe the logic sequences. They can also come from the circled elements on an electromechanical diagram. The numbers used for the I/O addresses depend on the PLC model used. These addresses can be represented in octal, decimal, or hexadecimal. The description section of the table specifies the field devices that correspond to each address.

The table of address assignments should closely follow the input/output connection diagram (see Figure 11-6). Although industry standards for I/O representations vary among users, inputs and outputs are typically represented by squares and diamonds, respectively. The I/O connection diagram forms part of the documentation package.

L1

Inputs

LS1

LS2

000

001

L2

Program

Coding

L1

Outputs

SOL1

L2

004

005

PL1

R

Figure 11-6.

Partial connection diagram for the I/O address assignment in Table 11-2.

During the I/O assignment, the user should group associated inputs and outputs. This grouping will allow the monitoring and manipulation of a group of I/O simultaneously. For instance, if 16 motors will be started sequentially, they should be grouped together, so that monitoring the I/O registers associated with the 16 grouped I/O points will reveal the motors’ starting sequence. Due to the modularity of an I/O system, all the inputs and all the outputs should be assigned at the same time. This practice will prevent the assignment of an input address to an output module and vice versa.

E

XAMPLE

11-1

For the circuit shown in Figure 11-7,

(a)

identify the real inputs and outputs by circling each,

(b)

assign the I/O addresses,

(c)

assign the internal addresses (if required), and

(d)

draw the I/O connection diagram.

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L1

Start

PB1

Stop

PB2

System Programming and Implementation

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11

L2

CR1

CR1

CR1

Temp

TS3

Level

FS4

CR2

CR2 CR3

PL1

Ready

SOL1

Open

PL2

Level

FS5

CR2

SOL2

Open

CR3

PL3

CR1

Temp

TS3

H3

Heating or

H

Figure 11-7.

Electromechanical relay circuit.

Assume that the PLC used has a modularity of 8 points per module.

Each rack has 8 module slots, and the master rack is number 0. Inputs and outputs can have any address as long as the correct module is used. The PLC determines whether an input or output module is connected in a slot. The number system is octal, and internals start at address 1000

8

.

S

OLUTION

(a)

Figure 11-8 shows the circled real input and output connections.

Note that temperature switch TS3 is circled twice even though it is only one device. In the address assignment, only one of them is referenced, and only one of them is wired to an input module.

(b)

Table 11-4 illustrates the assignment of inputs and outputs. It assigns all inputs and all outputs, leaving spare I/O locations for future use.

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M o d u l e

T y p e

I n p u t

S

O p u t a p r e u t

L1

Start

PB1

Stop

PB2

CR1

System Programming and Implementation

C

HAPTER

11

L2

CR1

CR1

Temp

TS3

Level

FS4

CR2

CR2 CR3

PL1

Ready

SOL1

Open

PL2

Level

FS5

CR2

SOL2

Open

CR2

PL3

CR1

Temp

TS3

H3

Heating or

H

Figure 11-8.

Identification of real I/O (circled).

I / O A d d r e s s

R a c k

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

G r o

0

0

0

0

0

0

0

0

1

1

2

2

2

2

2

2

2

2

u p T e r m i n a

Table 11-4.

I/O address assignment.

l

6

7

4

5

0

1

2

3

0

7

2

3

4

0

1

5

6

7

D e s c r i p t i o n

S t a r t

S t o p

P B 1

P B 2

T e m p

L e v e l

T S 3

F S 4

F S 5 L e v e l

N o t u s e d

P L 1

S O L 1

P L 2

R e a d y

O p e n

S O L 2 O p e n

P L 3

H 3 H e a t i n g

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11

(c)

Table 11-5 presents the output assignments, including a description of each internal. Note that control relay CR2 is not assigned as an internal since it is the same as the output rung corresponding to

PL1. When the control program is implemented, every contact associated with CR2 will be replaced by contacts with address 020 (the address of PL1).

D e v i c e

C R 1

C R 2

C R 3

I n

1

t e

0

r

0 0

n a l D e s c r i p t i o n

C o n t r o l

S

S a a m m e e a s a s r e l a y

P L 1

C R 1

R

S O L 2 e

O a p d y e n

Table 11-5.

Internal output assignment.

(d)

Figure 11-9 illustrates the I/O connection diagram for the circuit in

Figure 11-7. This diagram is based on the I/O assignment from part (b).

Note that only one of the temperature switches, the normally open TS3 switch, is a connected input. The logic programming of each switch should be based on a normally open condition (see Chapter 9 for more about input connections).

L1

Start

PB1

Inputs

Input

000

Stop

PB2

001

L2

Temp

TS3

002

Level FS4

Level FS5

003

004

005

Program

Coding

Outputs

L1 L2

Output

PL1 Ready

020

SOL1 Open

021

PL2

022

SOL2 Open

023

PL3

024

H3 Heating

025

006

007

026

027

Figure 11-9.

I/O connection diagram.

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11

R

EGISTER

A

DDRESS

A

SSIGNMENT

The assignment of addresses to the registers used in the control program is another important aspect of PLC organization. The easiest way to assign registers is to list all of the available PLC registers. Then, as they are used, describe each register’s contents, description, and function in a register assignment table. Table 11-6 shows a register assignment table for the first 15 registers in a PLC system, ranging from address 2000

8

to address 2016

8

.

R e g i s t e r

2 0 1 0

2 0 1 1

2 0 1 2

2 0 1 3

2 0 1 4

2 0 1 5

2 0 1 6

2 0 0 0

2 0 0 1

2 0 0 2

2 0 0 3

2 0 0 4

2 0 0 5

2 0 0 6

2 0 0 7

C o n t e n t s

A n a l o g

A n a l o g

S p a r e

S p a r e

T W S

T W S i i n n p i n p u t i n p u t u t p u t

C o n s t a n t 2 3 5 0

A c c u m u l a t e d

S p a r e

S p a r e

C

C

C

C

C o o o o o n n n n n s s s s s t a t a t a t a t a n n n n n t t t t t

1 0 0 0

1 0 1 0

1 0 2 3

1 0 8 9

1 1 0 0

D e s c r i p t i o n

T e m p e r a t u r e

T e m p e r a t u r e i n p u t i n p u t t e m p t e m p

3

4

S

S e e t t p o i n t p o i n t

( S P 1 ) v o l u m e i n p u t

( V 1 ) f r o m f r o m

T W S

T W S p a n e l p a n e l

1

2

T i m

A c c e r u m c o n u l a t s t a e d n t o f v a l u e

2 3 .

5 f o r s c e c o u n

( 0 .

0 1 t e r s e c

R 2 0 1 0

T B )

B e g i

L

L o o o o k k n n i

u

u p p n g v a l u e v a o f l u l e o o k u

# 2

# 3 p

L

L o o o o k k

u

u p p v v a a l l u u e e

# 4

# 5 t a b l e

( i n s i d e )

( o u t s i d e )

( v a l u e # 1 )

Table 11-6.

Register assignment table.

E

LEMENTS TO

L

EAVE

H

ARDWIRED

During the assignment of inputs and outputs, the user should decide which devices will not be wired to the controller. These elements will remain part of the electromechanical control logic. These elements usually include devices that are not frequently switched off after start, such as compressors and hydraulic pumps. Components like emergency stops and master start push buttons should also remain hardwired, principally for safety purposes.

This way, if the controller is faulty and an emergency occurs, the user can shut down the system without PLC intervention.

Figure 11-10 provides an example of system components that are typically left hardwired. Note that the normally open PLC Fault Contact 1 (or watchdog timer contact) is wired in series with other emergency conditions.

This contact stays closed when the controller is operating correctly, but opens when a fault occurs. The system designer can also use this contact if an emergency occurs to disable the PLC system’s operation.

PLC fault contacts are safety contacts that are available to the user when implementing or enhancing a safety circuit. When a PLC is operating correctly, the normally open fault contact closes and the normally closed one

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11 opens when the PLC is first turned on. As shown in Figure 11-10, these contacts are connected in series with the hardwired circuit, so that if the PLC fails during standard operation, the normally open contacts will open. This will shut down the hardwired circuit at the point where the PLC becomes the controlling element. This circuit also uses a safety control relay (SCR) to control power to the rest of the control components. The normally closed fault contacts are used to indicate an alarm condition.

Disconnect

Swich

Fuses

Coolant

Pump Motor

M3

OLs

1M

Hydraulic

Pump Motor

M2

OLs

2M

Spindle

Motor

M1

OLs

3M

L1

F1

Stop

Start PLC Fault

Contact 1

M2

OLs

M3

OLs

M2 M3

SCR

PL1

PLC Fault

Contact 2

PLC Fail Alarm

L2

PLC

SCR

To I/O System

Figure 11-10.

Hardwired components in a PLC system.

In the diagram shown in Figure 11-10, an emergency situation (including a

PLC malfunction) will remove power (L1) to the I/O modules. The turning

OFF of the safety control relay (SCR) will open the SCR contact, stopping the flow of power to the system. Furthermore, the normally closed PLC fault contact (PLC Fault Contact 2) in the hardwired section will alert personnel of a system failure due to a PLC malfunction. The designer should implement this type of alarm in the main PLC rack, as well as in each remote I/O rack

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11 location, since remote systems also have fault contacts incorporated into the remote controllers. This allows subsystem failures to be signaled promptly, so that the problem can be fixed without endangering personnel.

S

PECIAL

I

NPUT

D

EVICE

P

ROGRAMMING

Some PLC circuits and input connections require special programming. One example, which we discussed in Chapter 9, is the programming of normally closed input devices. Remember that the programming of a device is closely related to how that device should behave in the control program.

Normally Closed Devices.

An input device that is wired as a normally open input can be programmed to act as either a normally open or a normally closed device. The same rule applies for normally closed inputs. Generally, if a device is wired as a normally closed input and it must act as a normally closed input, its reference address is programmed as normally open. As the following example illustrates, however, a normally closed device in a hardwired circuit is programmed as normally closed when it is replaced in the

PLC control program. Since it is not referenced as an input, the program does not evaluate the device as a real input.

E

XAMPLE

11-2

For the circuit in Figure 11-11, draw the PLC ladder program and create an I/O address assignment table. For inputs, use addresses 10

8 through 47

8

. Start outputs at address 50

8

and internals at address 100

8

.

L1 L2

LS14 PS1 CR10

CR10

CR10

LS15

SOL7

Figure 11-11.

Electromechanical relay circuit.

S

OLUTION

Figure 11-12 shows the equivalent PLC ladder diagram for the circuit in Figure 11-11. Table 11-7 shows the I/O address assignment table for this example. The normally closed contact (CR10) is programmed as normally closed because internal coil 100 references it and requires it to operate as a normally closed contact.

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11

L1

LS14

L2

LS14

10

PS1

11

CR10

100

L1

10

PS1*

CR10

100

11

LS15

CR10

100

SOL7

50

12

50

LS15

12

*Wired NC

Programmed NO

Figure 11-12.

PLC ladder diagram of the circuit in Figure 11-11.

SOL7

L2

I / O A d d r e s s

1 0

1 1

1 2

5 0

1 0 0

D e v i c e

L S 1 4

P S 1

L S 1 5

S O L 7

C R 1 0

Table 11-7.

I/O address assignment table.

T y p e

I n p u t

I n p u t

I n p u t

O u t p u t

I n t e r n a l

Master Control Relays.

Another circuit the programmer should be aware of is a master control relay (MCR). In electromechanical circuit diagrams, an MCR coil controls several rungs in a circuit by switching ON or OFF the power to those rungs. In a hardwired circuit, there is no definite end to an

MCR except when the circuit is followed all the way through. For example, in Figure 11-13, the MCR output in line 1 controls the power to the hardwired

1

L1

PS1

CR1

2

3

Power to other circuits not controlled by MCR

4

MCR

50

51

LS1

Hardwired

Circuits

MCR

PL1

LS100

Hardwired

Circuits

TS20 CR100

L2

MCR controls power to circuits below until the end of the hardwired circuit

Last hardwired circuit

Figure 11-13.

Electromechanical relay circuit with a master control relay.

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11 elements from line 3, where the MCR contact is located, to the last element in line 51. If the master control relay is ON, power will flow to these rungs

(lines 4 through 51). If the master control relay is OFF, power will not flow and these devices will not implement the control action. This configuration is equivalent to a hardwired subprogram or subroutine—if the MCR is ON, the rungs are executed; if it is OFF, the rungs are not executed. At line 2 in the circuit, power branches to other circuits that are not affected by the MCR’s action. These circuits are the regular hardwired program.

During the translation from a hardwired ladder circuit to PLC symbology, the programmer must place an END MCR instruction after the last rung the

MCR should control. Figure 11-14 illustrates the placement of the MCR instruction for the circuit in Figure 11-13. To provide proper fencing for the program’s MCR control section, internal output coil 1000, labeled CR1 (line

1 of PLC program), was inserted so that PL1 would not be inside the fenced

MCR area. This is the way the hardwired circuit operates. The END1

L1

PS1

010

L2

PS1

10

LS1

11

CR1

Int 1000

L1 L2

LS1

011

2000

CR1

1000

PL1

040

MCR1

040

PL1

Translated

Logic

LS100

102

Translated

Logic

Fenced by

MCR1

TS20

103

Int

2000

LS100

102

TS20

103

END1

Rest of program from line 2 in hardwired circuit

Figure 11-14.

PLC ladder diagram with MCR fence.

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11 instruction ends the MCR fence. The instructions corresponding to the hardwired circuits that branch from line 2 in the electromechanical diagram of Figure 11-13 are located after the END1 instruction. Figure 11-15 illustrates a partial ladder rung of a more elaborate circuit with this type of MCR condition. The corresponding PLC program should have an END MCR after the rung containing the PL3 output.

Set Up/Run

Run

3

4

1

2

5

6

7

8

9

MCR

CR1

CR2

Enable

Up

LS2

Up

LS1

CR4

M1

OLs

CR1

CR1

CR2

MCR

PL2

CR1

CR3

CR3 TDR1

SOL1

Master

Control

Relay

Master ON

Up

Sol Up

SOL2

CR3 TDR1 CR3

Sol Dn

10

11

14

15

16

12

13

17

18

19

Feed

LS4

CR4

CR3

CR4

CR1

CR5

LS5

CR2

LS3

CR4

CR4

PL3

PL4

SOL3

SOL4

TDR1

5 seconds

Dn ON

Set Up

Set Up ON

Feed Sol

Fast Sol

Figure 11-15.

Electromechanical relay circuit with an MCR.

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11

E

XAMPLE

11-3

Highlight the sections of the circuit in Figure 11-15 that will be under the control of a PLC MCR. What additional measures must be taken to include or bypass other hardwired circuits within the MCR fence?

S

OLUTION

Figure 11-16 highlights the circuits that must be fenced under the

MCR instruction. Note that solenoid SOL1 and part of its driving logic are not included in the MCR fencing because SOL1, CR3, and TDR1 can also be turned ON by logic prior to the MCR fence (see Figure 11-

17). For the MCR fence to be properly programmed, the PLC program

1

2

3

4

5

6

7

8

9

15

16

13

14

17

18

19

10

11

12

Set Up/Run

Run

MCR

CR1

CR2

Enable

Up

Up

LS1

M1

OLs

CR1

CR1

CR2

MCR

PL2

CR1 CR3

CR4

LS2

CR3 TDR1

CR3 TDR1

SOL1

CR3

SOL2

PL3

LS3

CR4

PL4

Feed

LS4

CR4

CR4

SOL3

SOL4

CR3

CR4

CR5

CR1 LS5

CR2

TDR1

5 seconds

Figure 11-16.

MCR-controlled program elements.

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Master

Control

Relay

Master ON

Up

Sol Up

Sol Dn

Dn ON

Set Up

Set Up ON

Feed Sol

Fast Sol

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11 must include two internal control relays that take SOL1 out of the fence.

Figure 11-18 illustrates the fenced circuit with the additional internals

(CR1000 and CR1001). Note that the instructions in this diagram have the same names as in the hardwired circuit. The solenoid SOL1 will be outside of the MCR fence because it can be turned ON by either the outside logic (highlighted section in Figure 11-17) or the logic inside the MCR fence (highlighted section in Figure 11-18).

7

8

9

10

11

Set Up/Run Up

MCR

LS2

CR3

CR1

CR3

CR4

CR3 add CR1000

SOL1

TDR1

TDR1 CR3

SOL2 add CR1001

PL3

LS3

Up

Sol Up

Sol Dn

Dn ON

Figure 11-17.

SOL1 activated by logic outside of the MCR fence.

Set Up/Run

Up

Up

Up CR4 CR1000

MCR1

Logic

Driving MCR

LS2 LS1

CR3

LS3

TDR1 CR3

CR1001

SOL2

SOL2 PL3

END1

CR1000 CR3

CR1001

TDR1

Figure 11-18.

MCR fence.

SOL1

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MCR

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Bidirectional Power Flow.

The circuit in Figure 11-19 illustrates another condition that can cause programming problems: the possibility of bidirectional power flow through the normally closed CR4 contact in line 8. To solve the bidirectional flow problem, the programmer must know whether or not CR4 influences the two output rungs to which it is connected. These rungs are the CR3 control relay output and the solenoid SOL1 output (rungs 7 and

9, respectively). Figure 11-19 illustrates the two paths that can occur in the hardwired circuit. PLCs only allow forward paths; therefore, if a reverse path is necessary for this circuit’s logic, the CR4 contact must be included in the logic driving the CR3 output (see Figure 11-19b). Chapter 9 provides more details about reverse and bidirectional power flow.

10

11

7

8

9

MCR

CR1

CR3

CR4

LS2

CR3 TDR1

LS3

(a) Forward path

CR3 TDR1

SOL1

SOL2

CR3

PL3

Up

Sol Up

Sol Dn

Dn ON

CR1

CR3

7

8

9

MCR

LS2

CR4

CR3 TDR1

SOL1

Up

Sol Up

SOL2

CR3 TDR1 CR3

Sol Dn

10

11

PL3

LS3

(b) Reverse path

Figure 11-19. (a)

Forward and

(b)

reverse power flow in a hardwired circuit.

Dn ON

Instantaneous Timer Contacts.

The electromechanical circuit shown in

Figure 11-15 specifies an instantaneous timer contact (the normally open

TDR1 contact in line 10). This type of contact, however, is usually unavailable in PLCs. To implement an instantaneous timer contact (i.e., a contact

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11 that closes or opens once the timer is enabled), the programmer must use an internal output to trap the timer, then use the internal’s contact as an instantaneous contact to drive the timer’s logic.

In the electromechanical circuit in Figure 11-20a, if PB1 and LS1 both close, the timer will start timing and the instantaneous contact (TMR1-1) will close, thus sealing PB1. If PB1 is released (OFF), the timer will continue to time because the circuit is sealed. Figure 11-20b illustrates the technique for trapping a timer. In this PLC program, an internal output traps the instantaneous contact from the circuit’s electromechanical timer. Thus, the contacts from this internal drive the timer. If a trap does not exist, the timer will start timing when PB1 and LS1 both close, but will stop timing as soon as PB1 is released.

L1

PB1

LS1 TMR1

L2

PB1 LS1 Internal

TMR1-1

TMR1-2

Instantaneous

Timer Contact

SOL7

Internal

Internal

TMR1

Trap

Circuit

TMR1

SOL1

(a) (b)

Figure 11-20. (a)

An instantaneous timer contact in a hardwired circuit and

(b)

a trapped timer in a PLC circuit.

Complicated Logic Rungs.

When a logic rung is very confusing, the best programming procedure is to isolate it from the other rungs. Then, reconstruct all of the possible logic paths from right to left, starting at the output and ending at the beginning of the rung. If a section of a rung, like the one discussed in Example 11-3, directly connects or interacts with another rung, it may be easier to create an internal output at the point where the two rungs cross. Then, use the internal output to drive the rest of the logic. For the circuit shown in Figure 11-15, this cross point is in line 9 at the normally closed contact CR4 between normally open LS1 and normally closed CR3.

P

ROGRAM

C

ODING

/T

RANSLATION

Program coding is the process of translating a logic or relay diagram into

PLC ladder program form. This ladder program, which is stored in the application memory, is the actual logic that will implement the control of the machine or process. Ease of program coding is directly related to how orderly

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11 the previous stages (control task definition, I/O assignment, etc.) have been done. Figure 11-21 shows a sample program code generated from logic gates and electromechanical relay diagrams (internal coil 1000 replaces the control relay). Note that the coding is a PLC representation of the logic, whether it is a new application or a modernization. The next sections examine this coding process closer and present several programming examples.

Start PB

SEL

Internal

Start PB

SEL

CR1

CR1

Internal

PS

Motor

CR1

PS

LS Motor

M

LS

(a) (b)

I/O Assignment

L1

Start PB

L2

100

SEL

101

Program Coding

PB

100

CR1

1000

SEL

101

CR1

1000

LS

CR1

1000

LS

102

M

110

102

PS

PS

103

103

(c)

L1

I/O Assignment

110

M

Figure 11-21.

Translation from

(a)

logic gates and

(b)

an electromechanical relay diagram into

(c)

PLC program coding.

L2

11-5 D

ISCRETE

I/O C

ONTROL

P

ROGRAMMING

In this section, we will present several programming examples that illustrate the modernization of relay systems. We will also present examples relating to new PLC control implementations. These examples will deal primarily with discrete controls. The next section will explain more about analog I/O interaction and programming.

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11

C

ONTROL

P

ROGRAMMING AND

PLC D

ESCRIPTIONS

Modernization applications involve the transfer of a machine or process’s control from conventional relay logic to a programmable controller. Conventional hardwired relay panels, which house the control logic, usually present maintenance problems, such as contact chatter, contact welding, and other electromechanical problems. Switching to a PLC can improve the performance of the machine, as well as optimize its control. The machine’s

“new” programmable controller program is actually based on the instructions and control requirements of the original hardwired system.

Throughout this section, we will use the example of a midsized PLC capable of handling up to 512 I/O points (000 to 777 octal) to explain how to implement and configure a PLC program. The I/O structure of the controller has 4 I/O points per module. The PLC has eight racks (0 through 7), each one with eight slots, or groups, where modules can be inserted. Figure 11-22 illustrates this configuration.

I/O Module

0 1 2 3 4 5 6

Group or Slot

7

CPU

Rack 0

I/O Point

Figure 11-22.

Example PLC configuration.

The PLC can accept four-channel analog input modules, which can be placed in any slot location. When analog I/O modules are used, discrete I/O cannot be used in the same slot. The PLC can also accept multiplexed register I/O.

These multiplexed modules require two slot positions and provide the enable

(select) lines for the I/O devices. The software instructions available in this

PLC are similar to those presented in Chapter 9.

Addresses 000 through 777 octal represent input and output device connections mapped to the I/O table. The first digit of the address represents the rack number, the second digit represents the slot, and the third digit specifies the terminal connection in the slot. The PLC detects whether the slot holds an input or an output.

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11

Point addresses 1000

8

to 2777

8

may be used for internal outputs, and register storage starts at register 3000

8

and ends at register 4777

8

. Two types of timer and counter formats can be used—ladder format and block format—but all timers require an internal output to specify the ON-delay output. Ladder format timers place a “T” in front of the internal output address, while block format timers specify the internal output address in the block’s output coil.

Throughout the examples presented in this section and the next, we will use addresses 000

8

through 027

8

for discrete inputs and addresses 030

8

through

047

8

for discrete outputs. Analog I/O will be placed in the last slot of the master rack (0) whenever possible. During the development of these examples, you will discover that sometimes the assignment of internals and registers is performed parallel to the programming stages.

S

IMPLE

R

ELAY

R

EPLACEMENT

This relay replacement example involves the PLC implementation of the electromechanical circuit shown in Figure 11-23. The hardware timer TMR1 requires instantaneous contacts in the first rung, which are used to latch the

L1

PB1

PS1

TMR1

3 sec

L2

CR1

FS1

TS1

SOL1

CR1

SOL2

TMR1 CR1 LS1

CR1

CR2

TMR2

CR3

2 sec

SOL3

TMR2 PS2 CR3

Figure 11-23.

Electromechanical relay circuit.

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11 rung. If the instantaneous TMR1 contacts are implemented using a PLC timedelay contact, then PB1 must be pushed for the timer’s required time preset to latch the rung. This instantaneous contact will be implemented by trapping the timer with an internal output.

Tables 11-8 and 11-9 show the I/O address and internal output assignments for the electromechanical circuit’s real I/O. Table 11-10 presents the register assignment table. Note that internals do not replace control relays CR1 and

CR2 since the output addresses 030 and 031 corresponding to solenoids SOL1 and SOL2 are available. Therefore, addresses 030 and 031 can replace the

CR1 and CR2 contacts, respectively, everywhere they occur in the program.

The normally open contact LS1 connects limit switch LS1 to the PLC input interface; and the normally open LS1 reference, programmed with an examine-OFF instruction, implements the normally closed LS1 in the program.

Figure 11-24 illustrates the PLC program coding solution.

M o d u l e

T y p e

I n p u t

I n p u t

O u t p u t

I / O A d d r e s s

0

0

0

0

0

0

0

0

R a c k

0

0

0

0

G r o

0

0

0

0

u p T e r m

0

1

2

3

i n a l

P

P

F

T

B

S

S

S

1

1

1

1

D

0

0

0

0

6

7

4

5

L S 1

P S 2

3

3

3

3

0

1

2

3

Table 11-8.

I/O address assignment.

S O L 1

S O L 2

S O L 3

e s c r i p t i o n

D e v i c e

T M R 1

C R 1

C R 2

T M R 1

T M R 2

C R 3

R e g i s t e r

4 0 0 0

4 0