Datasheet - STMicroelectronics
RHF484
Rad-hard precision quad operational amplifier
Datasheet - production data
Applications
Ceramic Flat-14W
Space probes and satellites
Harsh environments
Description
The RHF484 is a rail-to-rail, precision, bipolar,
quad, operational amplifier featuring a low input
offset voltage and a wide supply voltage.
Designed to increase tolerance to radiation, the
RHF484 is housed in a hermetic 14-pin flat
package, making it an ideal product for space
applications and harsh environments.
Table 1: Device summary
Parameter
SMD
(1)
Quality level
EPPL
April 2016
(2)
Temp. range
Bandwidth: 8 MHz gain bandwidth product
Rail-to-rail input/output
Low input offset voltage: 60 µV typ
Supply current: 2.2 mA typ per amplifier
Operating from 4 to 14 V
Input bias current: 6 nA typ
ELDRS free up to 100 krad
2
SEL immune at LET = 120 MEV.cm /mg
at 125 °C
SET characterized
High radiation immunity: 300 krad TID
at high-dose rate
—
5962F08222
Engineering model
QML-V flight
Flat-14W
0.7 g
—
Yes
-55 °C to 125 °C
Notes:
(1)
(2)
SMD: standard microcircuit drawing
EPPL = ESA preferred part list
Contact your ST sales office for information
on the specific conditions for products in die
form and QML-Q versions.
DocID17351 Rev 3
This is information on a product in full production.
RHF484K-01V
Package
Mass
The upper metallic lid is not electrically connected to
any pins, nor to the IC die inside the package
Features
RHF484K1
1/19
www.st.com
Contents
RHF484
Contents
1
Absolute maximum ratings and operating conditions ................. 3
2
Electrical characteristics ................................................................ 4
3
Electrical characteristic curves ...................................................... 8
4
Radiations ...................................................................................... 12
4.1
Introduction ..................................................................................... 12
4.2
Total ionizing dose (TID) ................................................................. 12
4.3
Heavy ions ...................................................................................... 12
5
Achieving good stability at low gain ............................................ 13
6
Package information ..................................................................... 14
6.1
Wide ceramic Flat-14W package information .................................. 15
7
Ordering information..................................................................... 16
8
Other information .......................................................................... 17
9
2/19
8.1
Date code ........................................................................................ 17
8.2
Documentation ................................................................................ 17
Revision history ............................................................................ 18
DocID17351 Rev 3
RHF484
1
Absolute maximum ratings and operating
conditions
Absolute maximum ratings and operating conditions
Table 2: Absolute maximum ratings
Symbol
Parameter
Value
VCC
Supply voltage
(voltage difference between -VCC and VCC pins)
18
Vid
Differential input voltage
Vin
Input voltage
Iin
Input current
Tstg
Tj
Rthja
(1)
Unit
V
±1.2
(2) (3)
-VCC - 0.3 V to VCC + 0.3 V
45
Storage temperature
mA
-65 to 150
Maximum junction temperature
Thermal resistance junction to ambient area
Rthjc
Thermal resistance junction to case
ESD
HBM: human body model
TLead
Lead temperature (soldering, 10 s)
°C
150
(4)
(4)
(5)
TBD
°C/W
TBD
2
kV
260
°C
Notes:
(1)
(2)
(3)
(4)
The differential voltage is the voltage difference between the pins +IN and -IN of a channel.
All voltage values except the differential voltage are with respect to the network ground terminal.
The voltage on either input must never exceed VCC + 0.3 V nor 16 V.
Short circuits can cause excessive heating and destructive dissipation. Values are typical.
(5)
Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a
1.5 kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations
while the other pins are floating.
Table 3: Operating conditions
Symbol
(VCC) - (-VCC)
Parameter
Value
4 to 14
Supply voltage
Vicm
Common-mode input voltage
Toper
Operating free-air temperature range
Unit
(1)
-VCC to VCC
-55 to 125
V
°C
Notes:
(1)
2
SEL-free up to 120 MeV.cm /mg
DocID17351 Rev 3
3/19
Electrical characteristics
2
RHF484
Electrical characteristics
Table 4: VCC = 7 V, -VCC = -7 V, Vicm = 0 V, Tamb = 25 °C, loads (RL, CL) connected to GND
(unless otherwise specified)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
DC performance
Vicm = 7 V
Vio
Offset voltage
Vicm = 0 V
Vicm = -7 V
DVio
Input offset voltage drift
-55 °C
700
25 °C
500
125 °C
700
-55 °C
500
25 °C
60
125 °C
500
-55 °C
700
25 °C
500
125 °C
700
No load
1
-55 °C
Iib
Input bias current
No load
Input offset current temperature
drift
25 °C
6
Input offset current
No load
No load, Vout = 0 V
Cin
25 °C
2
SVR
Common mode rejection ratio
Supply voltage rejection ratio
15
nA
35
25°C
pF
2
No load
2.9
25 °C
2.2
125 °C
CMR
pA/°C
8
Input capacitance between IN
(or -IN) and GND
Supply current per amplifier
nA
35
-55 °C
ICC
60
100
125 °C
Differential input capacitance
between IN and -IN
µV/°C
100
-55 °C
Iio
µV
100
125 °C
DIib
300
No load,
-Vcc < Vicm < Vcc
No load, from Vcc =
2 V and -Vcc = -2 V
to Vcc = 7 V and
-Vcc = -7 V
2.9
mA
2.9
-55 °C
72
25 °C
72
125 °C
72
-55 °C
80
25 °C
90
125 °C
80
-55 °C
3.5
25 °C
6
125 °C
3.5
105
dB
120
AC performance
GBP
4/19
Gain bandwidth product
Vout = 200 mVpp,
f = 100 kHz,
RL = 1 kΩ,
CL = 100 pF
DocID17351 Rev 3
8
MHz
RHF484
Electrical characteristics
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Fu
Unity gain frequency
RL = 1 kΩ,
CL = 100 pF
25 °C
5
ϕm
Phase margin
RL = 1 kΩ,
CL = 100 pF, G = 5
25 °C
50
Degrees
Large signal voltage gain
RL = 10 kΩ,
Vout = -6.5 V to 6 V
85
dB
3.5
V/μs
AVD
SR
Slew rate
RL = 1 kΩ, Vout =
-4.8 V to 4.8 V, Vout
= 4.8 V to -4.8 V
-55 °C
60
25 °C
74
125 °C
60
-55 °C
1.7
25 °C
2
125 °C
1.7
en
Equivalent input noise voltage
No load, f = 1 kHz
25 °C
7
nV/√Hz
in
Equivalent input noise current
No load, f = 1 kHz
25 °C
0.8
pA/√Hz
Total harmonic distortion + noise
Vout = 13 Vpp,
RL = 1 kΩ,
CL = 100 pF,
G = -5.1
25 °C
0.01
%
THD+en
Output characteristics
Vcc = 14 V,
-Vcc = 0 V,
RL = 1 kΩ
VOH
High level output voltage
Vcc = 14 V,
-Vcc = 0 V,
RL = 10 kΩ
Vcc = 14 V,
-Vcc = 0 V,
RL = 1 kΩ
VOL
Low level output voltage
Vcc = 14 V,
-Vcc = 0 V,
RL = 10 kΩ
Output sink current
Iout
Vout = Vcc, no load,
Vid = -1 V
(1)
Output source current
Vout = -Vcc, no load,
Vid = 1 V
-55 °C
13.5
25 °C
13.6
125 °C
13.5
-55 °C
13.6
25 °C
13.8
125 °C
13.6
13.8
13.9
-55 °C
0.3
25 °C
0.12
0.2
125 °C
0.3
-55 °C
0.2
25 °C
0.04
125 °C
V
0.08
0.2
-55 °C
15
25 °C
20
125 °C
15
-55 °C
10
25 °C
15
125 °C
10
35
mA
30
Notes:
(1)
These tests are performed during a very short period of time. Excessive heating can damage the device. In the application, the
junction temperature must never exceed 150 °C.
DocID17351 Rev 3
5/19
Electrical characteristics
RHF484
Table 5: VCC = 2 V, -VCC = -2 V, Vicm = 0 V, Tamb = 25 °C, loads (RL, CL) connected to GND
(unless otherwise specified)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
DC performance
Vicm = 2 V
-55 °C
700
25 °C
500
125 °C
700
-55 °C
Vio
Offset voltage
Vicm = 0 V
Vicm = -2 V
DVio
Input offset voltage drift
500
25 °C
60
125 °C
500
-55 °C
700
25 °C
500
125 °C
700
No load
1
-55 °C
Iib
Input bias current
No load
DIib
25 °C
11
Input offset current
No load
No load, Vout = 0 V
Cin
25 °C
2
Common mode rejection ratio
15
nA
35
8
pF
2
No load
2.6
25 °C
2
125 °C
CMR
pA/°C
25°C
Input capacitance between IN
(or -IN) and GND
Supply current per amplifier
nA
35
-55 °C
ICC
60
100
125 °C
Differential input capacitance
between IN and -IN
µV/°C
100
-55 °C
Iio
µV
100
125 °C
Input offset current temperature
drift
300
No load,
-Vcc < Vicm < Vcc
2.6
mA
2.6
-55 °C
72
25 °C
72
125 °C
72
-55 °C
3.5
25 °C
6
125 °C
3.5
95
dB
AC performance
GBP
Gain bandwidth product
Vout = 200 mVpp,
f = 100 kHz,
RL = 1 kΩ,
CL = 100 pF
8
MHz
Fu
Unity gain frequency
RL = 1 kΩ,
CL = 100 pF
25 °C
5
ϕm
Phase margin
RL = 1 kΩ,
CL = 100 pF, G = 5
25 °C
50
AVD
Large signal voltage gain
RL = 10 kΩ, Vout =
-1.5 V to 0.5 V
6/19
DocID17351 Rev 3
-55 °C
60
25 °C
70
80
Degrees
dB
RHF484
Electrical characteristics
Symbol
AVD
SR
Parameter
Test conditions
Large signal voltage gain
RL = 10 kΩ, Vout =
-1.5 V to 0.5 V
Slew rate
RL = 1 kΩ, Vout =
-1.28 V to 1.28 V,
Vout = 1.28 V to
-1.28 V
Min.
125 °C
60
-55 °C
1.7
25 °C
2
125 °C
1.7
Typ.
Max.
Unit
dB
3.1
V/μs
en
Equivalent input noise voltage
No load, f = 1 kHz
25 °C
7.5
nV/√Hz
in
Equivalent input noise current
No load, f = 1 kHz
25 °C
0.8
pA/√Hz
Total harmonic distortion + noise
Vout = 3 Vpp,
RL = 1 kΩ,
CL = 100 pF,
G = -5.1
25 °C
0.01
%
THD+en
Output characteristics
Vcc = 4 V,
-Vcc = 0 V,
RL = 1 kΩ
VOH
High level output voltage
Vcc = 4 V,
-Vcc = 0 V,
RL = 10 kΩ
Vcc = 4 V,
-Vcc = 0 V,
RL = 1 kΩ
VOL
Low level output voltage
Vcc = 4 V,
-Vcc = 0 V,
RL = 10 kΩ
Output sink current
Iout
Vout = Vcc, no load,
Vid = -1 V
(1)
Output source current
Vout = -Vcc, no load,
Vid = 1 V
-55 °C
3.75
25 °C
3.8
125 °C
3.75
-55 °C
3.75
25 °C
3.85
125 °C
3.75
3.9
3.95
-55 °C
0.2
25 °C
0.05
0.1
125 °C
0.2
-55 °C
0.1
25 °C
0.03
125 °C
V
0.07
0.1
-55 °C
15
25 °C
20
125 °C
15
-55 °C
10
25 °C
15
125 °C
10
35
mA
30
Notes:
(1)
These tests are performed during a very short period of time. Excessive heating can damage the device. In the application, the
junction temperature must never exceed 150 °C.
DocID17351 Rev 3
7/19
Electrical characteristic curves
3
RHF484
Electrical characteristic curves
Figure 1: Input offset voltage distribution
Figure 2: Input bias current vs. supply voltage
30
40
25
Population%
20
Input bias current (nA)
Vio distribution
T=25°C
Vcc=14V, Vicm=7V
15
10
T=125°C
20
T=25°C
0
-20
T=-55°C
5
Vicm=Vcc/2
Follower configuration
-40
0
-300
-200
-100
0
100
200
300
4
5
6
Input offset voltage (µV)
Figure 3: Input bias current vs Vicm at VCC = 4 V
13
14
0.5
Input bias current (µA)
Input bias current (µA)
12
1.0
0.5
T= +125°C
0.0
-0.5
T= -55°C
-1.0
-1.5
-2.0
-2.0
T= +25°C
-1.5
-Vcc = -2V
+Vcc = +2V
-1.0 -0.5 0.0 0.5 1.0
Input Common Mode Voltage (V)
T= +125°C
0.0
-0.5
-1.0
T= +25°C
-1.5
1.5
2.0
Figure 5: Supply current vs. Vicm in follower
configuration at VCC = 4 V
4.5
3.5
4.0
2.5
T=25°C
2.0
1.5
T=125°C
T=-55°C
1.0
0.5
0.0
-2
Follower configuration
-Vcc=-2V
+Vcc=+2V
-1
0
1
Input Common Mode Voltage (V)
2
5
6
Figure 6: Supply current vs. Vicm in follower
configuration at VCC = 14 V
4.0
3.0
-Vcc = -7V
+Vcc = 7V
T= -55°C
-2.0
-7 -6 -5 -4 -3 -2 -1 0 1 2 3 4
Input Common Mode Voltage (V)
Supply current per channel (mA)
Supply current per channel (mA)
8
9 10 11
Supply voltage (V)
Figure 4: Input bias current vs Vicm at VCC = 14 V
1.0
8/19
7
3.5
Follower configuration
-Vcc=-7V
+Vcc=+7V
3.0
2.5
T=25°C
2.0
1.5
T=-55°C
T=125°C
1.0
0.5
0.0
-7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7
Input Common Mode Voltage (V)
DocID17351 Rev 3
7
RHF484
Electrical characteristic curves
Figure 7: Supply current vs. supply voltage at
Vicm = VCC/2
Figure 8: Output current vs. supply voltage at
Vicm = VCC/2
2.5
2.0
T=-55°C
T=125°C
1.5
Output Current (mA)
Supply current per channel (mA)
T=25°C
1.0
0.5
Vicm=Vcc/2
0.0
0
2
4
6
8
10
Supply voltage (V)
12
14
Figure 10: Output current vs. output voltage at
VCC = 14 V
50
50
40
40
30
30
20
Output Current (mA)
Output Current (mA)
Figure 9: Output current vs. output voltage at
VCC = 4 V
50
45
40
35
30
25
20
Sink
15 T=125°C
T=25°C
T=-55°C
Vid = -1V
10
5
0
Vicm=Vcc/2
-5
-10
T=125°C
Source
-15
Vid = 1V
-20
-25
-30
-35
-40
-45
T=25°C
T=-55°C
-50
4.0
6.0
8.0
10.0
12.0
14.0
Supply voltage (V)
Sink
10
T=-55°C
T=25°C
T=125°C
0
+Vcc=2V
-Vcc=-2V
-10
-20
-30
20
Sink
T=-55°C
10
T=125°C
-Vcc=-7V
+Vcc=+7V
0
-10
T=25°C
T=125°C
T=25°C
-20
-30
-40
-50
-2.0
T=-55°C
-1.5
-1.0
Source
-40
T=25°C
-0.5 0.0 0.5 1.0
Output Voltage (V)
1.5
T=-55°C
Source
-50
-7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7
Output Voltage (V)
2.0
Figure 11: Differential input voltage vs. output voltage at
VCC = 4 V
Figure 12: Differential input voltage vs. output voltage at
VCC = 14 V
1
0.5
Differential input voltage (mV)
Differential input voltage (mV)
T=125°C
0.0
T=125°C
T=25°C
-Vcc=-2V
+Vcc=+2V
-0.5
T=-55°C
-1.0
-1.5
-1.0
-0.5
0.0
0.5
Output voltage (V)
1.0
1.5
0
-1
T=25°C
-2
-3
-4
DocID17351 Rev 3
-Vcc=-7V
+Vcc=+7V
T=-55°C
-6 -5 -4 -3 -2 -1 0 1 2
Output voltage (V)
3
4
5
6
9/19
Electrical characteristic curves
RHF484
40
30
20
Vcc=14V, Vicm=7V, Tamb=25°C
Gain (dB)
10
-10
-40
-50
104
10000
20
Phase
10
0
-10
-20
-30
-40
-50 4
10
Vcc=4V, Vicm=3.5V, G= -100
Rl=1kOhms, Cl=100pF, Vrl=Vcc/2
Tamb=25°C
105
106
Frequency (Hz)
107
Gain
30
20
Phase
10
0
-10
-20
-30
-40
-50
104
Vcc=14V, Vicm=7V, G= -100
Rl=1kOhms, Cl=100pF, Vrl=Vcc/2
Tamb=25°C
105
106
Frequency (Hz)
107
180
150
120
90
60
30
0
-30
-60
-90
-120
-150
-180
107
Gain
30
20
Phase
10
0
-10
-20
-30
-40
-50 4
10
Vcc=14V, Vicm=0.5V, G= -100
Rl=1kOhms, Cl=100pF, Vrl=Vcc/2
Tamb=25°C
105
106
Frequency (Hz)
107
180
150
120
90
60
30
0
-30
-60
-90
-120
-150
-180
Figure 18: Voltage gain and phase vs. frequency at
VCC = 14 V, Vicm = 13.5 V
50
40
Gain
30
20
Phase (°)
40
106
Frequency (Hz)
40
Figure 17: Voltage gain and phase vs. frequency at
VCC = 14 V, Vicm = 7 V
50
105
50
Gain (dB)
Gain
30
180
150
120
90
60
30
0
-30
-60
-90
-120
-150
-180
Phase(°)
40
Vcc=4V, Vicm=2V, G= -100
Rl=1kOhms, Cl=100pF, Vrl=Vcc/2
Tamb=25°C
180
150
120
90
60
30
0
-30
-60
-90
-120
-150
-180
Figure 16: Voltage gain and phase vs. frequency at
VCC = 4 V, Vicm = 0.5 V
Gain (dB)
1000
Frequency (Hz)
50
Gain (dB)
0
-30
Vcc=4V, Vicm=2V, Tamb=25°C
Figure 15: Voltage gain and phase vs. frequency at
VCC = 4 V, Vicm = 3.5 V
Gain (dB)
Phase
10
-20
100
10/19
Gain
Phase (°)
Input equivalent noise density (nV/VHz)
50
Phase(°)
Figure 14: Voltage gain and phase vs. frequency at
VCC = 4 V, Vicm = 2 V
Phase
10
0
-10
-20
-30
-40
-50
104
DocID17351 Rev 3
Vcc=14V, Vicm=13.5V, G= -100
Rl=1kOhms, Cl=100pF, Vrl=Vcc/2
Tamb=25°C
105
106
Frequency (Hz)
107
180
150
120
90
60
30
0
-30
-60
-90
-120
-150
-180
Phase (°)
Figure 13: Noise vs. frequency at VCC = 4 V and
VCC = 14 V
RHF484
Electrical characteristic curves
Figure 19: Voltage gain and phase vs. frequency at
VCC = 14 V, Vicm = 0.5 V
Gain
30
Phase
10
0
-10
-20
Vcc=14V, Vicm=0.5V, G= -100
Rl=1kOhms, Cl=100pF, Vrl=Vcc/2
Tamb=25°C
-30
-40
-50
104
105
106
Frequency (Hz)
107
5
4
3
2
1
0
-1
-4
-5
0.0
4
8
3
6
Output Voltage (V))
10
1
0
-1
Vcc=4V, Vin=2Vpp,
G= -5.1
-2
2.0
Time (µs)
3.0
4.0
4
2
Vcc=14V, Vin=4Vpp,
G= -5.1
0
-2
-4
-6
-3
-8
-4
1.0
2.0
Time (µs)
3.0
-10
0.0
4.0
1.0
2.0
3.0
4.0
Time (µs)
5.0
6.0
7.0
Figure 23: Negative slew rate at VCC = 14 V
10
8
6
Output Voltage (V))
-5
0.0
1.0
Figure 22: Positive slew rate at VCC = 14 V
5
2
Vcc=4V, Vin=2Vpp,
G= -5.1
-2
-3
Figure 21: Negative slew rate at VCC = 4 V
Output Voltage (V))
Gain (dB)
20
180
150
120
90
60
30
0
-30
-60
-90
-120
-150
-180
Output Voltage (V))
40
Phase (°)
50
Figure 20: Positive slew rate at VCC = 4 V
4
Vcc=14V, Vin=4Vpp,
G= -5.1
2
0
-2
-4
-6
-8
-10
0.0
1.0
2.0
3.0
4.0
Time (µs)
5.0
DocID17351 Rev 3
6.0
7.0
11/19
Radiations
RHF484
4
Radiations
4.1
Introduction
Table 6 summarizes the radiation performance of the RHF484.
Table 6: Radiations
Type
Features
TID
300
Low-dose rate
300
ELDRS
300
SEL immunity (at 125 °C) up to:
110
MeV.cm²/mg
LETth = 1
MeV.cm²/mg
σ = 3.10E-03
cm²/device
LETth = 1
MeV.cm²/mg
σ = 3.20E-03
cm²/device
LETth = 1
MeV.cm²/mg
σ = 2.80E-03
cm²/device
SET characterized
Non-inverting
Subtracting
4.2
Unit
High-dose rate
Inverting
Heavy ions
Value
krad
Total ionizing dose (TID)
The products guaranteed in radiation within the RHA QML-V system fully comply with the
MILSTD-883 test method 1019 specification.
The RHF484 is RHA QML-V qualified, and is tested and characterized in full compliance
with the MIL-STD-883 specification. It using a mixed bipolar and CMOS technology and is
tested both below 10 mrad/s (low dose rate) and between 50 and 300 rad/s (high dose
rate).
The ELDRS characterization is performed in qualification only on both biased and
unbiased parts, on a sample of ten units from two different wafer lots.
Each wafer lot is tested at high-dose rate only, in the worst bias case condition, based
on the results obtained during the initial qualification.
4.3
Heavy ions
The heavy ion trials are performed on qualification lots only. No additional test is
performed.
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Achieving good stability at low gain
5
Achieving good stability at low gain
At low frequencies, the RHF484 can be used in a low gain configuration as shown in
Figure 24. At lower frequencies, the stability is not affected by the value of the gain, which
can be set close to 1 V/V (0 dB), and is reduced to its simplest expression G1 = 1+Rfb/Rg.
Therefore, an R-C cell is added in the gain network so that the gain is increased (up to 5) at
higher frequencies (where the stability of the amplifier could be affected). At higher
frequencies, the gain becomes G2 = 1+Rfb/(Rg//R).
Figure 25: Closed-loop gain
Figure 24: Low gain configuration
A VD
Gain
(dB)
VCC
Frequencies
where the
op-amp can
be used
+
Vin
Vout
1
RC
G2=1+Rfb/(Rg//R)
-
RL
1 kΩ
CL = 100 pF
+20 dB/dec
-20 dB/dec
VDD
G1=1+Rfb//Rg
Rfb = 2 kΩ
C
R
Gain bandwidth
product
Rg
0 dB
G1
(G1R+Rfb)C
Log frequency
Bandwidth
of the
op-amp at G2
Rg becomes a complex impedance. The closed-loop gain features a variation in frequency
and can be expressed as Equation 1.
Equation 1
G1R + Rfb
1 + jCω x ----------------------------G1
Gain = G1 ------------------------------------------------------------1 + jCR ω
Where a pole appears at 1/2ᴨRC and a zero at G1/2ᴨ(G1R+Rfb)C. The frequency can be
plotted as shown in Figure 25.
Table 7: External components versus low-frequency gain
G1 (v/V)
R (Ω)
C (nF)
1.1
Rg (Ω)
Rfb (Ω)
20 k
2
2k
510
2k
1
3
1k
4
750
2.4 k
820
3.3 k
5
Not connected
Not connected
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Package information
6
RHF484
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
®
®
ECOPACK packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
®
ECOPACK is an ST trademark.
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6.1
Package information
Wide ceramic Flat-14W package information
Figure 26: Wide ceramic Flat-14W package outline
b
e
c
L
E3
14
8
E
E2
1
7
E3
L
Q
S1
D
A
The upper metallic lid is not electrically connected to any pins, nor to the IC die
inside the package. Connecting unused pins or metal lid to ground or VCC will not
affect the electrical characteristics.
Table 8: Wide ceramic Flat-14W mechanical data
Dimensions
Ref.
Millimeters
Inches
Min.
Typ.
Max.
Min.
Typ.
Max.
A
1.93
2.11
2.29
0.076
0.083
0.090
b
0.38
0.43
0.48
0.015
0.017
0.019
c
0.10
0.13
0.18
0.004
0.005
0.007
D
9.71
9.91
10.11
0.382
0.390
0.398
E
7.27
7.42
7.57
0.286
0.292
0.298
E2
E3
5.4
0.213
0.76
e
0.030
1.27
0.050
L
6.3
6.6
0.248
0.260
Q
0.20
0.28
0.008
0.011
S1
0.13
0.005
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Ordering information
7
RHF484
Ordering information
Table 9: Ordering information
Order code
SMD pin
EPPL (1)
Quality
level
RHF484K1
-
-
Engineering
model
RHF484K-01V
5962F0822201VXC
Yes
Package
Lead
finish
Flat-14W
Gold
QML-V flight
Marking (2)
Packing
RHF484K1
Strip
pack
5962F0822201VXC
Notes:
(1)
EPPL = ESA preferred part list
(2)
Specific marking only. Complete marking includes the following:
- SMD pin (as indicated in above table)
- ST logo
- Date code (date the package was sealed) in YYWWA (year, week, and lot index of week)
- QML logo (Q or V)
- Country of origin (FR = France).
Contact your ST sales office for information regarding the specific conditions for products in die
form and QML-Q versions.
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Other information
8
Other information
8.1
Date code
The date code is structured as shown below:
EM xyywwz
QML-V yywwz
where:
x (EM only) = 3 and the assembly location is Rennes, France
yy = last two digits of the year
ww = week digits
z = lot index in the week
8.2
Documentation
Table 10: Documentation provided for each type of product
Quality level
Documentation
Engineering model
—
Certificate of conformance
QCI (groups A, B, C, D, and E)
(1)
Screening electrical data
QML-V flight
Precap report
PIND test
(2)
SEM inspection report
(3)
X-ray report
Notes:
(1)
(2)
(3)
QCI = quality conformance inspection
PIND = particle impact noise detection
SEM = scanning electron microscope
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Revision history
9
RHF484
Revision history
Table 11: Document revision history
Date
Revision
26-Apr-2011
1
06-Feb-2015
2
Changes
Initial release
Replaced package silhouette and added marker to show
position of pin 1 on the silhouette, pinout, and package
drawing.
Updated Features
Updated Table 1: Device summary
Table 2: Absolute maximum ratings: transferred radiation
information to Section 3.
Added Section 3: Radiations
Section 5.1: Wide ceramic Flat14W package information:
added "W" to package information.
Updated Section 6: Ordering information
Added Section 7: Other information
06-Apr-2016
18/19
3
Updated document layout
Table 1: "Device summary": updated footnote 1,
SMD = standard microcircuit drawing.
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2016 STMicroelectronics – All rights reserved
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