Very low noise microphone preamplifier with 2.0 V bias output and

Very low noise microphone preamplifier with 2.0 V bias output and

TS472

Very low noise microphone preamplifier with

2.0 V bias output and active low standby mode

Features

Low noise: 10 nV/

√Hz typ. equivalent input noise at F = 1 kHz

Fully-differential input/output

2.2 to 5.5 V single supply operation

Low power consumption at 20 dB: 1.8 mA

Fast start up time at 0 dB: 5 ms typ.

Low distortion: 0.1% typ.

40 kHz bandwidth regardless of the gain

Active low standby mode function (1

μA max)

Low noise 2.0 V microphone bias output

Available in flip-chip lead-free package and in

QFN24 4 x 4 mm package

ESD protection (2 kV)

Applications

Video and photo cameras with sound input

Sound acquisition and voice recognition

Video conference systems

Notebook computers and PDAs

Description

The TS472 is a differential-input microphone preamplifier optimized for high-performance PDA and notebook audio systems.

This device features an adjustable gain from 0 to

40 dB with excellent power-supply and commonmode rejection ratios. In addition, the TS472 has a very low noise microphone bias generator of

2 V.

It also includes a complete shutdown function, with active low standby mode.

August 2009

Flip-chip - 12 bumps

Pin connections (top view)

QFN24

Doc ID 11015 Rev 6

BYP

NC

GND

IN-

NC

NC

3

4

5

6

1

2

Pin connections (top view)

NC NC GND STBY VCC NC

24 23 22 21 20 19

18 NC

17

16

OUT+

OUT-

15

14

13

C2

C1

NC

7 8 9 10 11 12

NC IN+ GS BIAS NC NC

1/25

www.st.com

25

6

7

3

4

1

2

Contents

Contents

5

TS472

Typical application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

4.1

Differential configuration principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

4.2

Higher cut-off frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

4.3

Lower cut-off frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

4.4

Low-noise microphone bias source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

4.5

Gain settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

4.6

Wake-up time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

4.7

Standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

4.8

Layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

4.9

Single-ended input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

4.10

Demonstration board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

5.1

Flip-chip package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

5.2

QFN24 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

2/25 Doc ID 11015 Rev 6

TS472

1

Typical application schematic

Typical application schematic

Figure 1

shows a typical application schematic for the TS472.

Figure 1.

Application schematic (flip-chip)

Optional

C1

VCC

C3

1uF

Rpos

Cin+

+

Electret Mic

Rneg

Cin-

U1

IN+

IN-

Cs

1uF

Vcc

BIAS

2.0V

C2

TS472_FC

OUT+

OUT-

G

GAIN

SELECT

Bias

BYPASS

Cb

1uF

Cout+

Cout-

Rout+

Rout-

Positive Output

Negative Output

Standby Control

Table 1.

Description of external components

Components Functional description

C in+

, C in-

C out+

, C out-

R out+

, R out-

R pos

, R neg

C s

C b

C

1

, C

2

C

3

Input coupling capacitors that block the DC voltage at the amplifier input terminal.

Output coupling capacitors that block the DC voltage coming from the amplifier output terminal (pins C2 and D2) and determine the lower cut-off frequency (see

Section 4.3: Lower cut-off frequency

).

Output load resistors used to charge the output coupling capacitors C out

.

These output resistors can be represented by an input impedance of a following stage.

Polarizing resistors for biasing of a microphone.

Supply bypass capacitor that provides power supply filtering.

Bypass pin capacitor that provides half-supply filtering.

Low pass filter capacitors allowing to cut the high frequency.

Bias output filtering capacitor.

Doc ID 11015 Rev 6 3/25

Typical application schematic

Table 2.

Pin name

Pin descriptions

Flip-chip designator

QFN designator

IN+

IN-

BIAS

GND

STBY

BYP

GS

OUT-

OUT+

C1

C2

Vcc

NC

C3

D1

B2

D2

A1

B1

A2

C1

C2

A3

B3

D3

---

Pin description

21

2

9

16

8

5

10

4, 22

Positive differential input

Negative differential input

2 V bias output

Ground

Standby

Bypass

Gain select

Negative differential output

17

14

15

Positive differential output

Low-pass filter capacitor

Low-pass filter capacitor

20 Power supply

3, 6, 7, 11,

12, 13, 18,

19, 23, 24

Not connected, floating pins

TS472

4/25 Doc ID 11015 Rev 6

TS472

2 Absolute maximum ratings

Table 3.

Symbol

V

CC

V i

T oper

T stg

T j

R thja

ESD

ESD

Absolute maximum ratings

Parameter

Supply voltage

(1)

Input voltage

Operating free air temperature range

Storage temperature

Maximum junction temperature

Thermal resistance junction to ambient:

Flip-chip

QFN24

Human body model

Machine model

Lead temperature (soldering, 10sec)

1.

All voltage values are measured with respect to the ground pin.

Table 4.

Symbol

Operating conditions

Parameter

V

CC

A

V

STBY

T op

R thja

Supply voltage

Typical differential gain

(GS connected to 4.7 k

Ω or bias)

Standby voltage input:

Device ON

Device OFF

Operational free air temperature range

Thermal resistance junction to ambient:

Flip-chip

QFN24

Absolute maximum ratings

Value

6

-0.3 to V

CC

+0.3

-40 to + 85

-65 to +150

150

180

110

2

200

250

°C/W kV

V

°C

Unit

V

V

°C

°C

°C

Value

2.2 to 5.5

20

Unit

V dB

1.5

≤ V

STBY

GND

≤ V

≤ V

CC

STBY

≤ 0.4

-40 to +85

150

60

V

°C

°C/W

Doc ID 11015 Rev 6 5/25

Electrical characteristics TS472

Table 5.

Symbol

e n

THD+N

V in

B

W

G

Z in

R

LOAD

C

LOAD

I

CC

I

STBY

PSRR

Electrical characteristics at V

CC

(unless otherwise specified)

= 3 V with GND = 0 V, T amb

= 25° C

Parameter Min.

Typ.

Max.

Unit

Equivalent input noise voltage density

R

EQ

= 100

Ω at 1 kHz

Total harmonic distortion + noise

20 Hz

≤F ≤ 20 kHz, gain = 20 dB, V in

= 50 mV

RMS

Input voltage, gain = 20 dB

Bandwidth at -3 dB

Bandwidth at -1 dB pin A3, B3 floating

Overall output voltage gain (Rgs variable):

Minimum gain, Rgs infinite

Maximum gain, Rgs = 0

Input impedance referred to GND

Resistive load

Capacitive load

Supply current, gain = 20 dB

Standby current

Power supply rejection ratio, gain = 20 dB,

F = 217 Hz, V ripple

= 200 mVpp, inputs grounded

Differential output

Single-ended outputs,

-3

39.5

80

10

10

0.1

10

40

20

-1.5

41

100

1.8

-70

-46

70

0

42.5

120

100

2.4

1

Hz

% mV

RMS kHz dB k

Ω k

Ω pF mA

μA dB

Table 6.

Bias output: V

CC

= 3 V, GND = 0 V, T amb

= 25° C

(unless otherwise specified)

Parameter Min.

Typ.

Max.

Symbol

V out

R out

I out

PSRR

No load condition

Output resistance

Output bias current

Power supply rejection ratio, F = 217 Hz,

V ripple

= 200 mVpp

1.9

80

70

2

100

2

80

2.1

120

Unit

V

W mA dB

6/25 Doc ID 11015 Rev 6

TS472 Electrical characteristics

Table 7.

Gain

(dB)

0

20

40

Differential RMS noise voltage

Input referred noise voltage

(

μV

RMS

)

Unweighted filter

Output noise voltage

(

μV

RMS

)

A-weighted filter Unweighted filter A-weighted filter

15

3.4

1.4

10

2.3

0.9

15

34

141

10

23

91

Table 8.

Bias output RMS noise voltage

C

3

(1)

(

μF)

Unweighted filter

(

μV

RMS

)

1 5

10 2.2

A-weighted filter

(

μV

RMS

)

4.4

1.2

1.

Bias output filtering capacitor.

Table 9.

SNR (signal to noise ratio), THD+N < 0.5%

Gain

(dB)

Unweighted filter 20 Hz - 20 kHz

(dB)

0

V

CC

= 2.2 V

75

A-weighted filter

(dB)

V

CC

= 3 V V

CC

= 5.5 V V

CC

= 2.2 V V

CC

= 3 V V

CC

= 5.5 V

76 76 79 80 80

20

40

82

70

83

72

83

74

89

80

90

82

90

84

Doc ID 11015 Rev 6 7/25

Electrical characteristics TS472

Figure 2.

Current consumption vs. power supply voltage

3.0

2.5

2.0

1.5

1.0

0.5

0.0

0

Tamb=85°C

Tamb=25°C

Tamb=-40°C

1 2 3 4

Power Supply Voltage (V)

No Loads

GS floating

5 6

Figure 3.

Current consumption vs. power supply voltage

3.0

2.5

2.0

1.5

1.0

0.5

0.0

0

Tamb=85°C

Tamb=25°C

Tamb=-40°C

1 2 3 4

Power Supply Voltage (V)

No Loads

GS grounded

5 6

Figure 4.

Current consumption vs. standby voltage

Figure 5.

Current consumption vs. standby voltage

2.5

2.5

2.0

1.5

1.0

0.5

0.0

0 1

Vcc=3V

Vcc=5V

2 3

Standby Voltage (V)

No Loads

GS floating

Tamb = 25°C

4 5

2.0

1.5

1.0

0.5

0.0

0 1

Vcc=3V Vcc=5V

2 3

Standby Voltage (V)

No Loads

GS grounded

Tamb = 25°C

4 5

Figure 6.

Standby threshold voltage vs. power supply voltage

1.0

0.8

0.6

0.4

0.2

0.0

2.2

3 4

Power Supply Voltage (V)

No Loads

Tamb = 25°C

5 5.5

Figure 7.

Frequency response

10

0

30

Cb=1

μ

F, T

AMB

=25

°

C, Gain=20dB, Rout=100k

Ω

20

-10

-20

10 100 no C1,C2

C1,C2=100pF

Cin,Cout=100nF

C1,C2=220pF

Cin,Cout=10nF

1000

Frequency (Hz)

10000 100000

8/25 Doc ID 11015 Rev 6

TS472 Electrical characteristics

Figure 8.

Bias output voltage vs. bias output current

Figure 9.

Bias output voltage vs. power supply voltage

2.2

Vcc=2.5-6V

2.2

Tamb=25°C

Ibias=0mA

2.0

Tamb=85°C

2.0

Ibias=2mA

1.8

1.8

Ibias=4mA

1.6

Tamb=-40°C

1.6

1.4

0

Tamb=25°C

1 2

Bias Output Current (mA)

3 4

1.4

2.2

3 4

Power Supply Voltage (V)

5 5.5

Figure 10.

Bias PSRR vs. frequency

0

-20

Vripple=200mVpp

Vcc=3V

Cb=1

μ

F

Tamb =25

°

C

-40

Bias floating or 1k

Ω

to GND

-60

Figure 11.

Bias PSRR vs. frequency

0

-20

Vripple=200mVpp

Vcc=5V

Cb=1

μ

F

Tamb=25

°

C

-40

-60

Bias = 1k

Ω

to GND

-80

-100

50 100 1000

Frequency (Hz)

10000 20k

-80

-100

50 100

Bias floating

1000

Frequency (Hz)

10000 20k

Figure 12.

Differential output PSRR vs. frequency

0

-10

-20

-30

Vripple=200mVpp

Inputs grounded

Vcc=3V

Cb=1

μ

F

Cin=100nF

Tamb=25

°

C

-40

GS=bias

-50

-60

-70

-80

50 100

GS grounded

1000

Frequency (Hz)

GS floating

10000 20k

Figure 13.

Differential output PSRR vs. frequency

0

-10

-20

-30

Vripple=200mVpp

Inputs grounded

Vcc=5V

Cb=1

μ

F

Cin=100nF

Tamb=25

°

C

-40

GS grounded

-50

-60

-70

-80

50 100

GS=bias

1000

GS floating

Frequency (Hz)

10000 20k

Doc ID 11015 Rev 6 9/25

Electrical characteristics TS472

Figure 14.

Differential output PSRR vs. frequency

0

-20

V

RIPPLE

=200mV

PP

, Inputs grounded

V

CC

=3V, Minimum Gain, Cin=1

μ

F, T

AMB

=25

°

C

-40

-60

-80

No Cb

Cb=100nF

Cb=1

μ

F

-100

50 100 1k

Frequency (Hz)

10k 20k

Figure 15.

Differential output PSRR vs. frequency

0

-20

V

RIPPLE

=200mV

PP

, Inputs grounded

V

CC

=3V, Gain=20dB, Cin=1

μ

F, T

AMB

=25

°

C

-40

-60

-80

No Cb

Cb=1

μ

F

-100

50 100

Cb=100nF

1k

Frequency (Hz)

10k 20k

Figure 16.

Single-ended output PSRR vs. frequency

0

-10

-20

-30

Vripple=200mVpp

Inputs grounded

Cb=1

μ

F

Cin=100nF

Tamb=25

°

C

-40

-50

-60

-70

-80

50 100

Vcc=2.2V

Vcc=3V

1000

Frequency (Hz)

Vcc=5V

10000 20k

Figure 17.

Equivalent input noise voltage density

1000

100

10

1

10 100 1k

Frequency (Hz)

10k

Cin=100nF

R

EQ

=100

Ω

T

AMB

=25

°

C

100k

Figure 18.

Δgain vs. power supply voltage

1.0

0.8

F=1kHz

Vin=5mV

Tamb=25°C

0.6

0.4

0.2

0.0

-0.2

-0.4

2.2

Maximum Gain

3 4

Power Supply Voltage (V)

Minimum Gain

Gain=20dB

5 5.5

Figure 19.

Δgain vs. ambient temperature

0.50

0.25

F=1kHz

V

IN

=5mV

0.00

-0.25

-0.50

-0.75

-1.00

-40 -20

Maximum Gain

Gain=20dB

Minimum Gain

0 20 40

Ambient Temperature (°C)

60 80

10/25 Doc ID 11015 Rev 6

TS472 Electrical characteristics

Figure 20.

Maximum input voltage vs. gain,

THD+N<1%

Figure 21.

Maximum input voltage vs. power supply voltage, THD+N<1%

150

100

50

0

0 10

V

CC

=5.5V

T

AMB

=25°C

F=1kHz

THD+N<1%

V

CC

=3V

V

CC

=2.2V

20

Gain (dB)

30 40

140

120

T

AMB

=25°C, F=1kHz, THD+N<1%

100

80

60

40

Gain=40dB

Gain=30dB

20

0

2.2

3 4

Power Supply Voltage (V)

Gain=0dB

Gain=20dB

5 5.5

Figure 22.

THD+N vs. input voltage

10

GS floating

GS=bias

1

Figure 23.

THD+N vs. input voltage

10

GS floating

1

GS=bias

0.1

GS grounded

0.01

1E-3

Tamb=25°C, Vcc=3V, F=100Hz,

Cb=1

μ

F, RL=10k

Ω

, BW=100Hz-120kHz

0.01

Input Voltage (V)

0.1

Figure 24.

THD+N vs. input voltage

10

GS floating

GS=bias

1

0.3

0.1

GS grounded

0.01

1E-3

Tamb=25°C, Vcc=5V, F=100Hz,

Cb=1

μ

F, RL=10k

Ω

, BW=100Hz-120kHz

0.01

Input Voltage (V)

0.1

Figure 25.

THD+N vs. input voltage

10

GS floating

GS=bias

1

0.3

0.1

GS grounded

0.01

1E-3

Tamb=25°C, Vcc=3V, F=1kHz,

Cb=1

μ

F, RL=10k

Ω

, BW=100Hz-120kHz

0.01

Input Voltage (V)

0.1

0.3

0.1

GS grounded

0.01

1E-3

Tamb=25°C, Vcc=5V, F=1kHz,

Cb=1

μ

F, RL=10k

Ω

, BW=100Hz-120kHz

0.01

Input Voltage (V)

0.1

0.3

Doc ID 11015 Rev 6 11/25

Electrical characteristics

Figure 26.

THD+N vs. input voltage

10

1

GS floating

GS=bias

Figure 27.

THD+N vs. input voltage

10

1

GS floating

GS grounded

GS=bias

0.1

0.1

GS grounded

0.01

1E-3

Tamb=25°C, Vcc=3V, F=20kHz,

Cb=1

μ

F, RL=10k

Ω

, BW=100Hz-120kHz

0.01

Input Voltage (V)

0.1

Figure 28.

THD+N vs. frequency

10

1

Tamb=25°C

Vcc=3V

RL=10k

Ω

Cb=1

μ

F

BW=100Hz-120kHz

GS=bias, Vin=100mV

GS grounded, Vin=20mV

0.3

0.01

1E-3

Tamb=25°C, Vcc=5V, F=20kHz,

Cb=1

μ

F, RL=10k

Ω

, BW=100Hz-120kHz

0.01

Input Voltage (V)

0.1

Figure 29.

THD+N vs. frequency

10

Tamb=25

°

C

Vcc=5V

RL=10k

Ω

Cb=1

μ

F

BW=100Hz-120kHz

GS=bias, Vin=100mV

1

GS grounded, Vin=20mV

TS472

0.3

0.1

50 100

GS floating, Vin=100mV

1000

Frequency (Hz)

10000 20k

Figure 30.

Transient response

0.1

50 100

GS floating, Vin=100mV

1000

Frequency (Hz)

10000 20k

Figure 31.

Common mode rejection ratio

(CMRR) vs frequency

0

-20

Δ

Vicm=200mVpp, V

CC

=3V

C

IN

=1

μ

F, T

AMB

=25°C

-40

Maximum Gain

Gain=20dB

Minimum Gain

-60

-80

-100

20 100 1k

Frequency (Hz)

10k 20k

12/25 Doc ID 11015 Rev 6

TS472 Application information

4.2

The TS472 is a fully-differential input/output microphone preamplifier. The TS472 also includes a common-mode feedback loop that controls the output bias value to average it at

V

CC

/2. This allows the device to always have a maximum output voltage swing, and by consequence, maximize the input dynamic voltage range.

The advantages of a fully-differential amplifier are:

Very high PSRR (power supply rejection ratio).

High common mode noise rejection.

In theory, the filtering of the internal bias by an external bypass capacitor is not necessary. However, to reach maximum performance in all tolerance situations, it is better to keep this option.

Higher cut-off frequency

The higher cut-off frequency F

CH of the microphone preamplifier depends on the external capacitors C

1

, C

2

.

TS472 has an internal first order low-pass filter (R = 40 k

Ω, C = 100 pF) to limit the highest cut-off frequency on 40 kHz (with a 3 dB attenuation). By connecting C

1

, C

2

you can decrease F

CH

by applying the following formula.

F

CH

= ----------------------------------------------------------------------------------------------

2

π 40 × 10

3

⋅ (

C

+

100

× 10

– 12

)

Figure 32

represents the higher cut-off frequency in Hz versus the value of the output capacitors C

1

, C

2

in nF.

Figure 32.

Higher cut-off frequency vs. output capacitors

40

10

1

200 400 600

C1, C2 (pF)

800 1000

For example, F

CH

is almost 20 kHz with C

1,2

= 100 pF.

Doc ID 11015 Rev 6 13/25

Application information

4.3

TS472

Lower cut-off frequency

The lower cut-off frequency F

CL

of the microphone preamplifier depends on the input capacitors C in

and output capacitors C out

. These input and output capacitors are mandatory in an application because of DC voltage blocking.

The input capacitors C in

in series with the input impedance of the TS472 (100 k

Ω) are equivalent to a first order high-pass filter. Assuming that F

CL

is the lowest frequency to be amplified (with a 3 dB attenuation), the minimum value of C in

is:

C in

=

2

CL

100

× 10

3

The capacitors C out

in series with the output resistors R out

(or an input impedance of the next stage) are also equivalent to a first order high-pass filter. Assuming that F

CL

is the lowest frequency to be amplified (with a 3 dB attenuation), the minimum value of C out

is:

C out

=

2

CL

R out

Figure 33.

Lower cut-off frequency vs. input capacitors

1000

ZinMAX

Typical Zin

Figure 34.

Lower cut-off frequency vs. output capacitors

1000

Rout=10k

Ω

100 100

ZinMIN

Rout=100k

Ω

Note:

10

1 10

Cin (nF)

100

10

1 10

Cout (nF)

100 1000

Figure 33

and

Figure 34

give directly the lower cut-off frequency (with 3 dB attenuation)

versus the value of the input or output capacitors.

If F

CL

is kept the same for calculation purposes, take into account that the 1st order highpass filter on the input and the 1st order high-pass filter on the output create a 2nd order high-pass filter in the audio signal path with an attenuation of 6 dB on F

CL

and a roll-off of

40 dB/decade.

4.4 Low-noise microphone bias source

The TS472 provides a very low noise voltage and power supply rejection BIAS source designed for biasing an electret condenser microphone cartridge. The BIAS output is typically set at 2.0 V

DC

(no load conditions), and can typically source 2 mA with respect to drop-out, determined by the internal 100

Ω resistance (for detailed load regulation curves

see

Figure 8

).

14/25 Doc ID 11015 Rev 6

TS472 Application information

The gain in the application depends mainly on:

● the sensitivity of the microphone, the distance to the microphone, the audio level of the sound, the desired output level.

The sensitivity of the microphone is generally expressed in dB/Pa, referenced to 1 V/Pa. For example, the microphone used in testing had an output voltage of 6.3 mV for a sound pressure of 1 Pa (where Pa is the pressure unit, Pascal). Expressed in dB, the sensitivity is:

20Log(0.0063) = -44 dB/Pa

To facilitate the first approach,

Table 10

gives voltages and gains used with a low-cost omni-

directional electret condenser microphone of -44 dB/Pa.

Table 10.

Typical TS472 gain vs. distance to the microphone (sensitivity -44 dB/Pa)

Distance to microphone Microphone output voltage TS472 gain

1 cm

20 cm

30 mV

RMS

3 mV

RMS

20

100

The gain of the TS472 microphone preamplifier can be set as follows.

1.

From -1.5 dB to 41 dB by connecting an external grounded resistor R

GS

to the GS pin.

This enables the gain to be adapted more precisely to each application.

Table 11.

Selected gain vs. gain select resistor

Gain (dB)

0 10 20

R

GS

(

Ω)

470k 27k 4k7

30

1k

40

68

Figure 35. Gain in dB vs. gain select resistor Figure 36. Gain in V/V vs. gain select resistor

50

40

30

20

10

0

-10

10 100

Tamb=25

°

C

1k

R

GS

(

Ω

)

10k 100k 1M

100

10

1

10 100

Tamb=25

°

C

1k

R

GS

(

Ω

)

10k 100k 1M

2. To 20 dB by applying V

GS

> 1V

DC

on the gain select (GS) pin. This setting can help to reduce a number of external components in an application, because 2.0 V

DC

is provided by the TS472 itself on the BIAS pin.

Doc ID 11015 Rev 6 15/25

Application information

Figure 37

gives other values of the gain vs. voltage applied on the GS pin.

Figure 37.

Gain vs. gain select voltage

Note:

TS472

40

20

0

-20

-40

-60

-80

0 0.2

0.4

0.6

V

GS

(V)

0.8

Tamb=25

°

C

4 5

In the case of a single-ended output configuration (either positive or negative output is used for the following signal processing) the overall gain is half. One must also take into account that all advantages of the differential configuration principles are lost (see the difference in

PSRR in

Table 5

).

16/25

When the standby mode is released to switch the device to ON, a signal appears on the output a few microseconds later, and the bypass capacitor C b

is charged within a few milliseconds. As C b

is directly linked to the bias of the amplifier, the bias will not work properly until the C b

voltage is correct.

In a typical application, when a biased microphone is connected to the differential input via the input capacitors (C in

), (and the output signal is in line with the specification), the wake-up time will depend upon the values of the input capacitors C in

and the gain. When the gain is lower than 0 dB, the wake-up time is determined only by the bypass capacitor C b

, as

described above. For a gain superior to 0 dB, refer to

Figure 38

.

Figure 38.

Wake-up time in a typical application vs. input capacitors

20

10

60

50

Tamb = 25°C

Vcc=3V

Cb=1

μ

F

40

Gain=20dB

Maximum Gain

30

0

20 40 60

Input capacitors C

IN

(nF)

80 100

Doc ID 11015 Rev 6

TS472 Application information

When the standby command is set, it takes a few microseconds to set the output stages

(differential outputs and 2.0 V bias output) to high impedance and the internal circuitry to shutdown mode

.

4.9

The TS472 has sensitive pins to connect C1, C2 and Rgs. To obtain high power supply rejection and low noise performance, it is mandatory that the layout track to these components be as short as possible.

Decoupling capacitors on V

CC

and bypass pin are needed to eliminate power supply drops.

In addition, the capacitor location for the dedicated pin should be as close to the device as possible.

Single-ended input configuration

It is possible to use the TS472 in a single-ended input configuration. The schematic in

Figure 39

provides an example of this type of configuration.

Figure 39.

Typical single-ended input application

Optional

C1

VCC

C3

1uF

Rpos

Cin+

+

Electret Mic

Cin-

U1

A1

B1

IN+

IN-

Cs

1uF

Vcc

A2 BIAS

2.0V

C2

TS472

OUT+

OUT-

C2

D2

G

GAIN

SELECT

B2

Bias

BYPASS

D1

Cout+

Cout-

Rout+

Rout-

Positive Output

Negative Output

Cb

1uF

Standby Control

Doc ID 11015 Rev 6 17/25

Application information

A demonstration board for the TS472 is available. For more information about this demonstration board, refer to application note AN

2240

on www.st.com.

Figure 40.

PCB top layer Figure 41.

PCB bottom layer

TS472

Figure 42.

Component location

18/25 Doc ID 11015 Rev 6

TS472 Package information

5.1

In order to meet environmental requirements, ST offers these devices in different grades of

ECOPACK

®

packages, depending on their level of environmental compliance. ECOPACK

® specifications, grade definitions and product status are available at:

www.st.com

.

ECOPACK

®

is an ST trademark.

Flip-chip package information

Figure 43.

TS472 footprint recommendation

500

μm

500

μm

100

μm max.

150

μm min.

Figure 44.

Pinout (top view)

Pad in Cu 18

μm with Flash NiAu (2-6μm, 0.2μm max.)

Balls are underneath

Doc ID 11015 Rev 6 19/25

Package information

Figure 45.

Marking (top view)

ST logo

Part number: 472

E Lead free bumps

Three digits datecode: YWW

The dot indicates pin A1

Figure 46.

Flip-chip - 12 bumps

TS472

Die size: 2.1 mm x 1.6 mm ± 30 µm

Die height (including bumps): 600 µm

Bumps diameter: 315 µm ±50 µm

Bump diameter before reflow: 300 µm

±10 µm

Bump height: 250 µm ±40 µm

Die height: 350 µm ±20 µm

Pitch: 500 µm ±50 µm

Coplanarity: 50 µm max

Figure 47.

Tape & reel specification (top view)

20/25 Doc ID 11015 Rev 6

TS472

5.2 QFN24 package information

Figure 48.

QFN24 package mechanical drawing

A

A1

A2

Nd

D

D1

0.50 DIA.

Ne

1

2

3

Package information

E1 E

0

SEATING

PLANE

Q

R b

D2

P

1

2

3

E2

L e

Doc ID 11015 Rev 6 21/25

Package information

b

Q

D2

E2

Ø

Nd

Ne

L

D

D1

E

E1

P

R e

N

A

A1

A2

Table 12.

QFN24 package mechanical data

Dimensions

Ref.

Millimeters

Min.

0.80

Typ.

Max.

1.00

0.05

0.80

Min.

0.031

0.24

0.13

0.30

0.18

1.95

1.95

0.65

4.00

3.75

4.00

3.75

0.42

0.17

0.50

24.00

6.00

6.00

0.40

0.20

2.10

2.10

0.60

0.23

0.50

0.30

0.45

2.25

2.25

12°

0.009

0.005

0.012

0.007

0.077

0.077

TS472

Inches

Typ.

Max.

0.040

0.002

0.031

0.026

0.158

0.148

0.158

0.148

0.017

0.007

0.020

0.945

0.236

0.236

0.016

0.008

0.083

0.083

0.024

0.009

0.020

0.012

0.018

0.089

0.089

22/25 Doc ID 11015 Rev 6

TS472 Ordering information

Table 13.

Order codes

Order code

Temperature range

TS472EIJT

TS472IQT

-40°C, +85°C

-40°C, +85°C

Package

Flip-chip

QFN24 4x4mm

Packing

Tape & reel

Tape & reel

Marking

472

K472

Doc ID 11015 Rev 6 23/25

Revision history TS472

Table 14.

Document revision history

Date Revision

01-Jul-05

01-Oct-05

01-Dec-05

12-Sep-2006

02-Mar-2009

25-Aug-2009

1

2

3

4

5

6

Changes

Initial release corresponding to product preview version.

First release of fully mature product datasheet.

Added single-ended input operation in

Section 4: Application information

.

Added QFN package information. Updated curves, added new ones

in

Section 3: Electrical characteristics

.

Corrected error on C1 and C2 caps.

Added

Table 2: Pin descriptions

.

Updated QFN24 package information in

Section 5.2

.

Corrected QFN package pinout on cover page.

24/25 Doc ID 11015 Rev 6

TS472

Please Read Carefully:

Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice.

All ST products are sold pursuant to ST’s terms and conditions of sale.

Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein.

No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.

UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED

WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED

WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS

OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.

UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT

RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING

APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY,

DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE

GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK.

Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST.

ST and the ST logo are trademarks or registered trademarks of ST in various countries.

Information in this document supersedes and replaces all information previously supplied.

The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.

© 2009 STMicroelectronics - All rights reserved

STMicroelectronics group of companies

Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -

Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America

www.st.com

Doc ID 11015 Rev 6 25/25

Was this manual useful for you? yes no
Thank you for your participation!

* Your assessment is very important for improving the work of artificial intelligence, which forms the content of this project