User manual | EMI FILTER AND LINE TERMINATION FOR USB UPSTREAM PORTS

USBUF01P6
®
IPAD™
EMI FILTER AND LINE TERMINATION
FOR USB UPSTREAM PORTS
APPLICATIONS
EMI Filter and line termination for USB upstream
ports on:
- USB Hubs
- PC peripherals
FEATURES
Monolithic device with recommended line termination for USB upstream ports
Integrated Rt series termination and Ct bypassing capacitors.
Integrated ESD protection
Small package size
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SOT-666
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DESCRIPTION
The USB specification requires upstream ports
to be terminated with pull-up resistors from the
D+ and D- lines to Vbus. On the
implementation of USB systems, the radiated
and conducted EMI should be kept within the
required levels as stated by the FCC
regulations. In addition to the requirements of
termination and EMC compatibility, the
computing devices are required to be tested for
ESD susceptibility.
The USBUF01P6 provides the recommended line
termination while implementing a low pass filter to
limit EMI levels and providing ESD protection
which exceeds IEC61000-4-2 level 4 standard.
The device is packaged in a SOT-666 which is the
smallest available lead frame package (45%
smaller than the standard SOT323).
BENEFITS
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FUNCTIONAL DIAGRAM
3.3 V
Rt
D1
Rp
D4
Ct
Grd
3.3 V
Rt
D2
D3
Ct
EMI / RFI noise suppression
Required line termination for USB upstream
ports
ESD protection exceeding IEC61000-4-2 level 4
High flexibility in the design of high density
boards
Tailored to meet USB 2.0 standard (low speed
and high speed data transmission)
TM: IPAD and TRANSIL are a trademarks of STMicroelectronics.
September 2003 - Ed: 1A
1/7
USBUF01P6
COMPLIES WITH THE FOLLOWING ESD
STANDARDS:
IEC61000-4-2, level 4
±15 kV (air discharge)
±8 kV (contact discharge)
MIL STD 883E, Method 3015-7
Class 3 C = 100 pF R = 1500 Ω
3 positive strikes and 3 negative strikes (F = 1 Hz)
ABSOLUTE RATINGS (Tamb = 25°C)
Symbol
VPP
Tj
Parameter
Value
Unit
ESD discharge IEC 61000-4-2, air discharge
ESD discharge IEC 61000-4-2, contact discharge
ESD discharge - MIL STD 883E - Method 3015-7
±16
±9
±25
kV
kV
kV
Maximum junction temperature
150
°C
- 55 to +150
°C
260
°C
- 40 to + 85
°C
Tstg
Storage temperature range
TL
Lead solder temperature (10 second duration)
Top
Operating temperature range
ELECTRICAL CHARACTERISTICS (Tamb = 25 °C)
Symbol
Parameter
IF
VBR
Breakdown voltage
IRM
Leakage current @ VRM
VRM
Stand-off voltage
VCL
Clamping voltage
Rd
Dynamic impedance
IPP
Peak pulse current
αT
Voltage temperature coefficient
VF
Forward voltage drop
Symbol
2/7
I
VF
VCL VBR VRM
Test conditions
V
IRM
Slope = 1/Rd
Min.
IPP
Typ.
Max.
Unit
10
V
500
nA
VBR
IR = 1 mA
IRM
VRM = 3.3V per line
Rt
Tolerance ± 10%
33
Ω
Rp
Tolerance ± 10%
1.5
kΩ
Ct
Tolerance ± 20%
47
pF
6
USBUF01P6
TECHNICAL INFORMATION
Fig. A1: USB Standard requirements
3.3V
1.5k
Rt
Full-speed or
Low-speed USB
Transceiver
D+
Ct
Twisted pair shielded
Rt
Zo = 90ohms
5m max
DCt
Host or
Hub port
15k
Rt
D+
15k
Ct
Full-speed USB
Transceiver
Ct
Hub 0 or
Full-speed function
Ct
Low-speed USB
Transceiver
Ct
Hub 0 or
Low-speed function
Rt
D-
FULL SPEED CONNECTION
3.3V
1.5k
D+
Rt
Full-speed or
Low-speed USB
Transceiver
Ct
Untwisted unshielded
Rt
3m max
DHost or
Hub port
Ct
15k
Rt
D+
Rt
D-
15k
LOW SPEED CONNECTION
APPLICATION EXAMPLE
Fig. A2: Implementation of ST' solutions for USB ports
USBUF01W6
USBDF01W5
D2
Rt
D+
D+ in
Ct Rd
D+ out
D+
Gnd
Ct
Rt
3.3 V
Rt
Gnd
D- in
Rt
D+
D+
Ct
Ct Rd
D1
CABLE
Gnd
D-
Upstream port
Peripheral transceiver
Host/Hub USB por transceivert
Downstream port
D-
D-
Rp
D- out
D3
3.3V
D4
D-
FULL SPEED CONNECTION
USBUF01W6
USBDF01W5
D2
Rt
D+
D+ in
Ct Rd
D+ out
D+
Gnd
D+
Ct
Ct
Rt
3.3 V
Rt
Gnd
Ct Rd
D- in
Rt
D-
D1
CABLE
Gnd
D-
Upstream port
D+
Peripheral transceiver
Host/Hub USB por transceivert
Downstream port
D-
D- out
Rp
D3
3.3V
D4
D-
LOW SPEED CONNECTION
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USBUF01P6
EMI FILTERING
Current FCC regulations requires that class B computing devices meet specified maximum levels for both
radiated and conducted EMI.
- Radiated EMI covers the frequency range from 30MHz to 1GHz.
- Conducted EMI covers the 450kHz to 30MHz range.
For the types of devices utilizing the USB, the most difficult test to pass is usually the radiated EMI test. For
this reason the USBUF01P6 device is aiming to minimize radiated EMI.
The differential signal (D+ and D-) of the USB does not contribute significantly to radiated or conducted
EMI because the magnetic field of both conductors cancels each other.
The inside of the PC environment is very noisy and designers must minimize noise coupling from the
different sources. D+ and D- must not be routed near high speed lines (clocks spikes).
Induced common mode noise can be minimized by running pairs of USB signals parallel to each other and
running grounded guard trace on each side of the signal pair from the USB controller to the USBUF device.
If possible, locate the USBUF device physically near the USB connectors. Distance between the USB controller and the USB connector must be minimized.
The 47pF (Ct) capacitors are used to bypass high frequency energy to ground and for edge control, and
are placed between the driver chip and the series termination resistors (Rt). Both Ct and Rt should be
placed as close to the driver chip as is practicable.
The USBUF01P6 ensures a filtering protection against ElectroMagnetic and RadioFrequency Interferences
thanks to its low-pass filter structure. This filter is characterized by the following parameters :
- cut-off frequency
- Insertion loss
- high frequency rejection.
Fig. A3: USBUF01P6 typical attenuation curve.
Fig. A4: Measurement configuration
0.00
dB
--2.50
--5.00
--7.50
50Ω
TEST BOARD
UUx
--10.00
--12.50
Vg
--15.00
50Ω
--17.50
--20.00
--22.50
--25.00
1.0M
3.0M
10.0M
30.0M
100.0M
300.0M
1.0G
3.0G
f/Hz
ESD PROTECTION
In addition to the requirements of termination and EMC compatibility, computing devices are required to be
tested for ESD susceptibility. This test is described in the IEC 61000-4-2 and is already in place in Europe.
This test requires that a device tolerates ESD events and remains operational without user intervention.
The USBUF01P6 is particularly optimized to perform ESD protection. ESD protection is based on the use
of device which clamps at:
Vcl = VBR + Rd .IPP
This protection function is splitted in 2 stages. As shown in figure A5, the ESD strikes are clamped by the
first stage S1 and then its remaining overvoltage is applied to the second stage through the resistor Rt.
Such a configuration makes the output voltage very low at the output.
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USBUF01P6
Fig. A5: USBUF01P6 ESD clamping behavior
Rg
S1
Rd
VPP
Rt
Rd
Vinput
Rload
Voutput
VBR
USBUF01P6
ESD Surge
S2
VBR
Device
to be
protected
Fig. A6: Measurement board
ESD
SURGE
Vin
U
15kV
Air
Discharge
TEST BOARD
Vout
To have a good approximation of the remaining voltages at both Vin and Vout stages, we give the typical
dynamical resistance value Rd. By taking into account these following hypothesis : Rt>Rd, Rg>Rd and
Rload>Rd, it gives these formulas:
Rg .VBR + Rd .Vg
Vinput =
Rg
Rt.VBR + Rd .Vinput
Voutput =
Rt
The results of the calculation done for Vg=8kV, Rg=330Ω (IEC61000-4-2 standard), V BR=7V (typ.)
and Rd = 2Ω (typ.) give:
Vinput = 55.48 V
Voutput = 10.36 V
This confirms the very low remaining voltage across the device to be protected. It is also important to note
that in this approximation the parasitic inductance effect was not taken into account. This could be few
tenths of volts during few ns at the Vinput side. This parasitic effect is not present at the Voutput side due
the low current involved after the resistance Rt.
The measurements done hereafter show very clearly (Fig. A7) the high efficiency of the ESD protection :
- no influence of the parasitic inductances on Voutput stage
- Voutput clamping voltage very close to VBR (breakdown voltage) in the positive way
and -VF (forward voltage) in the negative way
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USBUF01P6
Fig. A7: Remaining voltage at both stages S1 (Vinput) and S2 (Voutput) during ESD surge.
a. Positive surge
b.Negative surge
Please note that the USBUF01P6 is not only acting for positive ESD surges but also for negative ones. For
these kinds of disturbances it clamps close to ground voltage as shown in Fig. A7b.
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USBUF01P6
PACKAGE MECHANICAL DATA.
SOT-666
REF.
DIMENSIONS
Millimeters
bp
e1
Inches
Min.
Max.
Min.
Max.
A
0.50
0.60
0.020
0.024
bp
0.17
0.27
0.007
0.011
c
0.08
0.18
0.003
0.007
D
1.50
1.70
0.060
0.067
E
1.10
1.30
0.043
0.051
e
D
E
A
Lp
U
0.040
e1
0.50
0.020
1.50
1.70
0.059
0.067
MECHANICAL SPECIFICATIONS
RECOMMENDED FOOTPRINT (mm)
Lead plating
Tin-lead
Lead plating thickness
5µm min
25µm max
Lead material
Sn / Pb
(70% to 90%Sn)
Lead coplanarity
10µm max
Body material
Molded epoxy
Flammability
UL94V-0
0.43
2.75
1.16
0.5
0.3
USBUF01P6
1.00
He
He
MARKING
Ordering code
e
Marking
Package
Weight
Base qty
Delivery mode
U
SOT-666
2.9 mg
3000
Tape & reel
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of
use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by
implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to
change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners.
© 2003 STMicroelectronics - All rights reserved.
STMicroelectronics GROUP OF COMPANIES
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