Module 4: Writing Basic Software Applications

Module 4: Writing Basic Software Applications
For Academic Use Only
Systemy wbudowane laboratorium
Uniwersytet Zielonogórski
Wydział Elektrotechniki, Informatyki i Telekomunikacji
Instytut Informatyki i Elektroniki
Zakład InŜynierii Komputerowej
Module 4: Writing Basic Software
Applications
Targeting MicroBlaze™ on Spartan™-3E Starter Kit
This material exempt per Department of Commerce license exception TSU
Module 4: Writing Basic Software Applications
Introduction
This lab guides you through the process of writing a basic software application. The software
will write to the LEDs on the Spartan-3E starter kit. You will add an XPS BRAM controller and
modify the linker script to place the text section in the BRAM. Finally, you will verify that the
design operates as expected in hardware.
Objectives
After completing this lab, you will be able to:
• Add an internal Block RAM memory controller
• Write a basic application to access an IP peripheral
• Develop a linker script
• Partition the executable sections onto both the LMB and PLB memory spaces
• Generate a bit file
• Download the bit file and verify on the Spartan-3E starter kit
Procedure
Extend the processor system created in lab3 by adding a memory controller (see Figure 4-1) and
the writing a basic software application to access the LEDs on the Spartan-3E starter kit. The
steps are listed below:
1. Add an internal BRAM
2. Update a basic software application
3. Analyze assembled object files
4. Verify the deisgn in hardware
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BRAM
LMB
BRAM
CNTLR
LMB
BRAM
CNTLR
MicroBlaze
LEDs
MDM
UART
GPIO
XPS
BRAM
CNTLR
PSB
GPIO
DIP
GPIO
LCD
MPMC
CNTLR
BRAM
DDR
MYIP
PLB
Figure 4-1. Design Updated from Previous Lab
For each procedure within a primary step, there are general instructions (indicated by the
symbol). These general instructions only provide a broad outline for performing the procedure.
Below these general instructions, you will find accompanying step-by-step directions and
illustrated figures that provide more detail for performing the procedure. If you feel confident
about completing a procedure, you can skip the step-by-step directions and move on to the next
general instruction.
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Add an Internal BRAM
Step 1
Add a BRAM controller and BRAM to the design.
If you wish to continue using the design that you created in Lab 3, create a lab4 folder in the
d:\xup\embedded\labs directory and copy the contents from lab3 to lab4, otherwise copy the
content of lab3 folder from the completed folder
Open XPS by selecting Start → Programs → Xilinx ISE Design Suite 10.1i → EDK →
Xilinx Platform Studio
Select Open a recent project, and browse to lab4 folder to open the project
From the IP catalog, add the following IP to the embedded hardware design
•
XPS BRAM Controller 1.00.a
•
Block RAM (BRAM) block 1.00.a
Change the instance names and connect the BRAM controller to the PLB and connect the
BRAM to the BRAM controller (see Figure 4-2).
Figure 4-2. Add internal XPS memory controller
Select a size of 8K for the XPS BRAM controller and click Generate Addresses
Figure 4-3. Specify Size and Address of Internal BRAM Memory Controller
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Update a Basic Software Application
Step 2
Run LibGen to generate xparameters.h file which defines various symbolic
parameters. Modify a software program to display the DIP switch settings on the
LEDs.
Run libgen by seelcting Software → Generate Libraries and BSPs to generate
xparameters.h file
LibGen writes the xparameters.h file, which provides critical information for driver
function calls.
In the Applications tab, remove lab3.c and add lab4.c to the TestApp_Memory project
You will extend the functionality in lab4.c by adding code to display switch settings on the
LEDs.
Open the GPIO API documentation by right-clicking on LEDs_8Bit peripheral in the System
Assembly View and selecting Driver: gpio_v2_12_a View API Documentation
View the various C and Header files associated with the GPIO by selecting File List at the top
of the page.
Click the header file xgpio.h and review the list of available function calls for the GPIO
The following steps must be performed in the software application to enable writing to the
GPIO: 1) Initialize the GPIO, 2) Set data direction, and 3) Write the data
Find the descriptions for the following functions by clicking links:
XGpio_Initialize (XGpio *InstancePtr, u16 DeviceId)
InstancePtr is a pointer to an Xgpio instance. The memory the pointer references must
be pre-allocated by the caller. Further calls to manipulate the component through the
XGpio API must be made with this pointer.
DeviceId is the unique ID of the device controlled by this XGpio component. Passing in
a device ID associates the generic XGpio instance to a specific device, as chosen by the
caller or application developer.
XGpio_SetDataDirection (XGpio * InstancePtr, unsigned
Channel, u32 DirectionMask)
InstancePtr is a pointer to the XGpio instance to be worked on.
Channel indicates the channel of the GPIO (1 or 2) to operate on
DirectionMask is a bit mask specifying which discretes are input and which are output.
Bits set to 0 are output and bits set to 1 are input.
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XGpio_DiscreteWrite (XGpio *InstancePtr, unsigned channel,
u32 data)
InstancePtr is a pointer to the XGpio instance to be worked on.
Channel indicates the channel of the GPIO (1 or 2) to operate on
Data is the data written to the discrete registers.
Open the header file xparameters.h by double-clicking on Generated Header:
microblaze_0/include/xparameters.h under the microblaze_0 instance for the
TestApp_Memory project in the Applications tab.
Figure 4-4. Double-Click the Generated Header File
In the xparameters.h file, find the following #define used to identify the LEDs_8Bit
peripheral:
#define XPAR_LEDS_8BIT_DEVICE_ID
Note: The number might be different
Note: The LEDS_8BIT matches the instance name assigned in the MHS file for this
peripheral.
This #define can be used in the XGpio_Intialize function call.
Modify your C code to echo the dip switch settings on the LEDS (Figure 4-5) and save the
application.
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Figure 4-5. Partially Completed C File
Click the compile button
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to compile the program.
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Analyze Assembled Object Files
Step 3
Analyze the assembled object files and how using the objdump utility links them.
Start the Cygwin shell, execute the object dump on the executable and analyze the
output.
Launch the Cygwin shell by going to Project → Launch EDK shell.
Change the directory to .TestApp_Memory by using the cd command.
You can determine your directory path by using the pwd command.
Type mb-objdump –h executable.elf at the prompt in the Xygwin shell window to list various
sections of the program, along with the starting address and size of each section
You should see results similar to that below:
Size of
each
section
Loadable
Memory Address
(start address for
each section)
Virtual
Memory
Address
Note the start address of
the text section resides
in the lmb_bram space
Figure 4-6. Object Dump Results - .text in XPS BRAM space
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Change the location of the text section so that it resides in the PLB memory.
Recompile the code, re-execute the objdump command, and analyze the output.
Right-click on Project:TestApp_Memory in the Applications tab and select Generate
Linker Script.
Figure 4-7. Generate Linker Script
Select xps_bram_if_cntlr_0 as the memory space for the instructions (.text section)
Figure 4-8. Select XPS BRAM Space for the .text Section
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Make sure that the Output Linker Script path is set to the TestApp_Memory directory and
click OK
Recompile the program and execute the mb-objdump command in the Xygwin shell
Note the start address of
the text section resides
in the xps_bram space
Figure 4-9. Object Dump Results - .text in XPS BRAM space
Verify in Hardware
Step 5
Connect and power the board. Generate the bitstream and download to hardware.
Connect and power the board
Open a hyperterminal session with the following settings
•
•
•
•
•
Baud rate: 115200
Data bits: 8
Parity: none
Stop bits: 1
Flow control: none
Generate and download bitstream.
Flip the DIP switches and verify that the LEDs will light according to the switch settings.
Verify that you see the results of the DIP switch and Push button settings in hyperterminal
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Figure 4-10. DIP Switch and Push Button settings displayed in hyperterminal
Note: Setting the DIP switches and push buttons will change the results displayed
Change xil_printf function call to printf. Re-compile the code and observe that
the XPS BRAM space is not sufficient. Generate linker script to target the .text
section to external memory (DDR_SDRAM).
In the text editor, change the xil_printf function call to printf
Compile the code and observe the output in the console window
Observe in the console window that the .text section is too big and sections overlap
Select Software → Generate Linker Script
Target .text section to DDR_SDRAM memory and click OK
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Figure 4-11. Retargeting .text section to External Memory
A warning message will appear indicating that the linker script already exist. Click OK to
overwrite.
Set XMD option with default values. Initialize BRAM with bootloop application.
As the .text section is targeted to external memory, it must be loaded using XMD
Select Debug → XMD Debug Options … and click OK to accept the default settings
In the Application tab, right-click on TestApp_Memory and deselect Mark to Initialize
BRAMs so that this application should not be put in the BRAM
Figure 4-12: Deselect TestApp_Memory to be Initialized in BRAM
Similalry, right-click on Default:microblaze_0_bootloop and make the BRAM to be
initialized
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Select Debug → Launch XMD … to start the XMD debugger which will make connection
with the microblaze processor in FPGA
In the XMD window, type dow TestApp_Memory/executable.elf
This will download the application in the external memory.
In the XMD window, type con to execute the program
Observe the HyperTerminal window as the program executes. Play with dip switches and
observe the LEDs
In the XMD window, type stop to stop the program execution, and then type exit to close the
XMD window
Close the project and XPS
Conclusion
Use Xilinx Platform Studio to define, develop, and integrate the software components of the
embedded system. You can define a device driver interface for each of the peripherals and the
processor. XPS creates an MSS file that represents the software side of the processor system.
You can then develop and compile peripheral-specific functional software and generate the
executable file from the compiled object codes and libraries. If needed, you can also use a linker
script to target various segments in various memories. You can edit the linker script to control
placement of various code segments into target memory. When the application is too big to fit in
the internal BRAM, you can download the application in external memory using XMD, and then
execute the program.
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