MHL Clock - Keysight

MHL Clock - Keysight
Enable New Generation of Display
Interface
啟動新一代高清晰顯示介面
Instructor: 余宥浚
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Agenda
1. HDMI 2.0 introducing
2. MHL3.2 introducing
3. DisplayPort v1.3 updating
4. eDP v1.4 Electrical performance and validation solution
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 2
High Definition Multimedia Interface
(HDMI)
Media
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
HDMI Organizational Structure
•
HDMI LLC is responsible up to HDMI 1.4b
•
Ruled by “7C” (7 founding companies)
•
No open industry participation in the definition of the Spec
•
CTS (Compliance Test Spec) includes vendor-specific test procedures
•
HDMI Forum is responsible
for HDMI 2.0 and later
•
Open industry consortium with 80+ members
•
Keysight is a member of the Technical Working Group and Test Subgroup
•
CTS describes generic test procedures – vendor independent
•
MOI’s (method of implementation) is created by each T&M vendor
•
Keysight was recently elected into Board of Directors
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 4
HDMI 2.0
Objectives of 2.0
 Increase the TMDS data rate to 6 Gbps
 Add protocol testing for 4:2:0 4k2k 50/60 Hz (2.97 Gbps)
 Add some protocol layer enhancements (3D, etc)
 Add a Direct Attach mode
 Add a Status Control and Data Channel (SCDC)
 Scrambling for EMI/RFI reduction
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 5
The HDMI 1.4 Interface
Transmitter
TP2
TP1
Sink (Display)
TMDS (AV Link)
Data TX
Data RX
Channel (cable)
xN
PLL
xN
PLL
Ck Frequency = Data Rate/N
HDMI1.4:
Ck
+5
SDA
SCL
DDC GND
Reserved
HPD
Data Rates: 250M to 3.4 Gbs
N=10
E-DDC (i2c)
Ethernet/Audio Return Channel
CEC
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
EDID
HDCP
HEC/AR
C
+V
CEC
Controlle
r
Page 6
The HDMI2.0 Interface
New Feature
HDMI 2.0 Interface Changes
Transmitter
TP2
TP1
Sink (Display)
TMDS (AV Link)
Data TX
Data RX
Channel (cable)
xN
PLL
xN
PLL
Ck Frequency = Data Rate/N
HDMI2.0:
Ck
+5
SDA
SCL
DDC GND
Reserved
HPD
Data Rates: 3.4 Gbs to 6Gbs
N=40
E-DDC (i2c)
Ethernet/Audio Return Channel
CEC
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
EDID
HDCP SCDC
HEC/AR
C
+V
CEC
Controlle
r
Page 7
Software Worst Case Cable Emulator for Tx Tests
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 8
Software Worst Case Cable Emulator for Tx Clock Jitter
Clk +
+
DUT
5.94 Gbps Tx
Ch1: Clock + (single-ended)
Ch3: Clock - (single-ended)
ch1
Clk +
ch3
CRU
s4p 112ps
Analyze
EQ Jitter
TPA-P
+3.3V
Pull up
Termination
for non
measured
channel
N5380A/B
1169A
probe
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Keysight Scope
13 GHz or higher
Test both cases of 112 ps
delay in positive and negative
sides
Page 9
Software Worst Case Cable Emulator for Tx Data Eye
Ch1: Clock differential or Single-ended
Ch2: D1 + (single-ended)
Ch4: D1- (single ended)
DUT
5.94 Gbps Tx
clk
ch1
D1+
+
s4p
+
TPA-P
+3.3V
Pull up
Termination
for non
measured
channel
D1-
112ps
EQ
Draw
eye
ch4
N5380A/B
1169A
probe
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
CRU
ch2
Keysight Scope
13 GHz or higher
Test both cases of 112 ps
delay in positive and negative
sides
Page 10
Equalization in HDMI
Equalization is stipulated to follow the relation below for freq response.
Phase of equalizer must be manifest to yield causal filter with this response
0
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 11
Tests Identified in HDMI
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 12
Test Fixture
Wilder fixtures have been re-designed for only a small difference in
performance- they may go up to 11 GHz now.
Bitifeye fixtures have been shown to exceed 13GHz in performance. They are
quotable and orderable.
Wilder TPA HDMIA Plug Fixture
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Bitifeye 0101-0200-0 Plug Fixture
Page 13
New FlexEDID(VTF-501 FlexEDID)
 Enables arbitrary EDID images to be
used.
•
SW can now download arbitrary EDID file
to control test device. Single Format files
will drive transmitter devices to correct bit
rate for test.
 Fully Integrated to HDMI Compliance
Test Software.
•
When active, single format files for
specific resolution/format for test will be
downloaded and the hot plug event will
be activated.
 Enables Test Plan
•
Created by Vprime for
Agilent.
Software keeps track of all that needs to
be tested for the formats selected so you
don’t have to!
 Comes with a VCC output that can be
controlled independently.
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 14
HDMI 2.0 test solution overview from Keysight
Source Test
N5399C HDMI Electrical
Compliance Test Software
SW
HW
Cable Assembly
Test*),
Source and Sink
Impedance Tests
DUT
Sink Test
(AWG)
N5990A Automatic SW
for HDMI compliance
N5990A Automatic SW
for HDMI compliance
E5071C Option TDR
ENA Network Analyzer
DSO90000A
Infiniium
real time
scope
13 GHz
E4887A
ParBERT
TMDS Signal
Generator
M8190A/M8195A
AWG
HDMI 2.0
TPA
HDMI 1.4*)
or 2.0 TPA
HDMI 2.0 TPA
Tx
HDMI 2.0 TPA
Rx
Rx
Source
Cable
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Sink
Protocol Test
U4998A SW for
HDMI compliance
U4998A (N5998A)
HDMI 1.4
protocol analyzer/
generator
Protocol Test on
U4998A is
supported up to
HDMI 1.4b
new
Cable Emulator
Signal
Conditioning
Fixture
Sink Test
(ParBERT)
For HDMI 2.0 third
party protocol
testers are planned
to be supported in
the ValiFrame SW
Tx
Rx
Source
Sink
Page 15
Transfer Function Generation
The implementation in the HDMI compliance software allows virtually limitless possibilities in
transfer function generation for our users to go far beyond mere compliance test
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 16
Test Device: Control and Capability
For your device:
-HDMI1.4b & HDMI2.0?
-What are the Formats it can do?
-HDCP On/Off?
-How are you going to control it?
Flex
EDID
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 17
Physical Layer Cable Assembly Testing
Points to Know:

HDMI2.0 doesn’t require new cable testing; still follows HDMI1.4b spec

Standard Cable measurements for characterization and compliance testing: skew, impedance,
attenuation, and crosstalk.

“Stressed” Eye Diagram Analysis of Interconnects: allowing direct measurement of eye
characteristics at the end of the link.

Optional switch and test automation software available from Solutions Partner BitifEye
Time Domain
Intra-Pair
Skew
(T31, T42)
Inter-Pair
Skew
(Tdd21)
Frequency Domain
Eye Diagram Analysis
Attenuation
(Sdd21)
Phase
(Sdd21)
Impedance
(Tdd11)
Impedance
(Tdd22)
Complete characterization of interconnects
(Time domain, frequency domain, and Eye diagram)
• Jitter insertion
• Emphasis
• Equalization
FEXT
(Sdd21)
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 18
Physical Layer Source/Sink Impedance Testing
Points to Know:
 Impedance measurements of Source and Sink required in HDMI2.0
New
 Source impedance measurements during transmission of actual data pattern (Hot
TDR measurements) is required
 DC voltage bias can be applied through internal bias-tees
 Hot TDR with ENA-TDR, fast, accurate and no worry about ESD
DC Power
Supply
HDMI data pattern
Tx
Measurement signal
t
t
t
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 19
HDMI 2.0 Sink Test Setup
ParBERT *and* AWG are supported
Same N5990A Test automation
controls both setups
AWG M8190A/M8195A
ParBERT
E4887A
+
Bias-Ts
Much lower cost
Fewer accessories
Less re-configuration
+
+
+
TTCs
+
Bias-Ts
+
Delay lines
HW CE
Plus real-time oscilloscope for calibration (in both cases)
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 20
Mobile High Definition Link (MHL)
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
MHL1.0 and MHL 2.0: ‘Serial HDMI’
Red
Green
Blue
Clock
Differential Pairs
<3.4Gbs
HDMI AV Lanes
2.225Gbs
Differential Pair
+
MHL AV Lane
The clock is added in as a common mode signal to
the differential signal that transmits the color data.
The receiver then has both differential and common
mode detection circuits.
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 22
MHL1.0 and MHL 2.0: MHL 1.x Architecture
From Synopsis website
-Pixel Clock: 75MHz (720p60, 1080p30)
- Serialized at: 225MHz
- Data Transfer Clock: 75MHz
- Data Transfer Rate: 2.25Gbps
Standard High Definition
resolutions handled
- 24 bits per color transfer
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 23
MHL1.0 and MHL 2.0: MHL 2.x Packed Pixel Mode
From Synopsis website
-Pixel Clock: 150MHz (1080p60)
- Serialized at: 300MHz
- Data Transfer Clock: 75MHz
- Data Transfer Rate: 3.00 Gbps
Now 1080p/60 handled
40 bits transmitted in
a pixel clock cycle
- 16 bits per color transfer
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 24
MHL 1.0 and 2.0: uUSB Connector
uUSB connector is the de facto connector because of its
presence in the mobile market.
5 Pins
D- and D+ is the differential data lane
ID: USB mode detect
USB assignments
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Gnd
C-bus
DD+
Vbus
MHL1&2 pin
assignments
Page 25
MHL 3.0 objectives
 Transmit at 6Gbs to handle 4kx2k 30Hz
 Implement Peripheral support (touch screen keyboard
mouse) data traffic capability between portable and tv.
 Increase Charging capability to 10W (to handle higher
power devices-i.e. tablet)
 HDCP 2.2 supported
 Enhanced 7.1 surround sound
 Support of multiple displays
 Backward Compatible with MHL1 and MHL2
6Gbs capability and added requirement of HID Data traffic requires the MHL AV link
structure to be re-designed.
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 26
MHL 3.0 Signal Changes
Pin
1
2
3
4
5
MHL1&2
VBus
MHLMHL+
CBus
Ground
MHL3.0
VBus
MHLMHL+
eCBus-S
Ground
Changes
The MHL-/MHL+ is ONLY
Differential in MHL3.
extended cbus has:
-original cbus functionality
-forwarded MHL clock
-handles forward and
reverse data
There is NO common mode clock in MHL3.0
CBus line now requires more validation rigor.
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 27
MHL to Display: a simplified view
Display
MHL TMDS
(differential pair)
AV Decode
HID
Sync
eCBus-S
(single ended)
MHL
Clock
eCBus/clock Logic
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
eCBus Data
CBus
conversion
EDID
Page 28
eCBus-S
Functions:
-MHL 1.x/2.x Discovery/Control (original Cbus).
-MHL3.0 recognition (Display capability).
-MHL clock forwarding for AV link decode.
-Forward and Reverse Data transmission.
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 29
MHL Clock on eCBus-S
 MHL Clock is fixed at 75MHz
 To support the fixed rates of MHL AV links this means the divide ratio
changes…
AV Link Rate
Divide Ratio
1.5Gbs
3.0Gbs
6.0 Gbs
20
40
80
 Clock Rising Edges are detected at the Sink
Display
VCBus_H
eCBus
VCBus_L
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
+Edge
Detect
Clock
PLL
MHL
Clock
Page 30
eCBUS data on eCBus-S
 Data is transmitted on Falling Edges
Forward Data is easy to understand…
Display
eCBus
‘0’ transmitted
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
-Edge
Detect
FWD
Data
+Edge
Detect
Clock
PLL
MHL
Clock
‘1’ transmitted
Page 31
eCBUS data on eCBus-S
Display
HID
 Data is transmitted on Falling Edges
Reverse (Backward) Data
BWD
Data
MHL TX
eCBus
-Edge
Detect
FWD
Data
+Edge
Detect
Clock
PLL
MHL
Clock
Conceptual diagram
x1
‘1’ transmitted
BWD Data
Diff amp
‘0’ transmitted
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 32
eCBUS
Television
Portable Device
TMDS+
AV
Content
TMDS-
VBUS
GND
TMDS
Clock/
Discovery
Falling
Edge Mod
FWD
Data
BWD
Data Rcvd
eCBus
x1
Diff amp
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
M
H
L
I
n
t
e
r
f
a
c
e
TMDS+
TMDS-
AV Data
Detection
Panel
HID
BWD
Data TX
-Edge
Detect
FWD
Data
+Edge
Detect
Clock
PLL
MHL
Clock
Discovery Logic
Page 33
MHL3.0 Testing
Protocol and Physical Layer testing for Sink and Source
Since all MHL3.0 devices must support MHL 1.0 and MHL 2.0, they
must pass the current MHL 1& MHL 2 compliance test regimens.
Requires full TMDS (MHL Data) pair measurements.
Requires full eCBus validation (forward and reverse scenarios)
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 34
Electrical Layer testing
MHL 3 electrical layer tests require that all Legacy MHL electrical
layer tests are conducted first
• Test setups for MHL 1 and 2 are required
• Keysight / BitifEye offer a modular and scalable solution portfolio, the
MHL 3 setups are add-ons to the MHL 1 and 2 setups
Keysight / BitifEye support the following instrument configurations:
• DSO for source Tx testing – already available
• ParBERT E4887A-007 for sink/dongle Rx+Tx testing –
available in Dec. ´14
• AWG M8190A for source Rx testing – ß -S/W available
• AWG M8190A for sink/dongle Rx+Tx testing – available in 2015
• Note that ParBERT cannot be used for MHL 3 source Rx testing
(see next slide)
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 35
N6460B MHL Source Testing
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 36
Upgrade information: New Fixtures and Equipment
•MHL 3.0 Fixtures
• new fixtures with high-speed eCBUS connectors
• some of the old fixtures might be re-used for cal
• availability and price TBD (Wilder)
•RELT Board (Relay-Echo-Cancellation-Level-Translation Board)
• required for all sink/source/dongle tests
• provided by Simplay Labs
•Test MCU
• additional piece of hardware to control RELT
• provided by Simplay Labs
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 37
Display port v1.3 updating
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
DisplayPort 1.3 Summary
 The VESA DisplayPort Standard, Version 1.3, was
released on Sept 15, 2014
 Replaces DisplayPort Version 1.2b for new designs
 Backward compatible, offers new optional features
 Compliance tests expected 1st Half of 2015
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 39
Summary of Main New feature for DP 1.3
 50% increase in video data transfer rate
 supports higher resolutions
 deeper colors
 higher display refresh rates
 Further optimized for use on shared interfaces
including DP Alt Mode on USB Type-C or Dockport
 “Living Room Friendly” features added to enhance
applicability for consumer displays including digital
televisions
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 40
DP 1.3 Link Rate Increase
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 41
Optimization for Shared Interface Use
 Numerous specification enhancements to simplify the use of DisplayPort as an
ingredient in the following interface examples:
• The USB Type-C connector, using the Display Alt Moe
• VESA DockPort Standard
• VESA Mobility DisplayPort Standard (MyDP)
• VESA Embedded DisplayPort Standard (eDP)
• ThunderBolt
• Future wireless interfaces
 Enhancement to DP1.3:
• Improved link training to accommodate more varied and complex video
transport topologies, along with the higher link rate of HBR3
• The addition of link-trainable repeaters to increase performance and
reliability across complex topplogies (such as docking station + Hub + active
cable
• Unified device register set to simplify implementation and allow
devices to support various interface types
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 42
New “Living Room Friendly” Feature
Support of HDCP 2.2
 New content protection protocol that will be required for
viewing premium video content at UHD resolution
Support of DisplayPort-to-HDMI 2.0 protocol conversion
 Enables the support of DisplayPort-to-HDMI 2.0 protocol
adapters for use with DisplayPort video source devices,
include devices that use the USB Type-C connector
supporting DisplayPort Alt Mode
DisplayPort-to-HDMI 2.0 protocol converters will only require
the HBR2 link rate and will support 4Kp60Hz in 4:4:4 pixel
encoding format and CEC communication
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 43
New “Living Room Friendly” Feature
(continuted)
Support of native 4:2:0 pixel format
 This pixel format is often used for digital televisions to reduce
video data rate requirements. The HBR3 link rate, combined
with 4:2:0, can support a display resolution up to 8K x 4K
(7680 x 4320), also known as QUHD
 Will also simplify DP-to-HDMI 2.0 protocol converter
implementation when supporting HDMI digital TVs that
require 4:2:0 format
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 44
eDP1.4 Electrical Performance and
Validation Software (N6469A )
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
eDP and eDP1.4 Overview
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 46
eDP and eDP1.4 Overview








Embedded interface targeted at portable devices.
Prevalent now in laptops and tablets (v1.3).
Previous instantiation eDP1.3 duplicated standard DisplayPort
attributes (bit rate, level, pre-emphasis)
eDP1.4 reduces power and increases flexibility:
7 bit rates identified, but can be arbitrary.
6 levels identified but can be arbitrary in groups of 1, 2, 3 or 4.
4 PreEmphasis settings identified, however, PE amount is
arbitrary.
Four connection types identified; all using IPEX connectors 20,
30, 40 and 50 pin interfaces.
No compliance program is in effect, nor probably ever will be.
Validators have huge hole in capability.
Ecosystem has different types of vendors (flexible cable, panel,
GPU)
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 47
eDP and eDP1.4 Testing Overview
Testing Problems in eDP implementations:
- eDP 1.4 supports Arbitrary settings/capabilities
- Connection models are varied (but at least IPEX
connector is chosen)
- No Compliance mandate-internal interface NOT
Box-to-Box interface
- Vendor/Supplier potential conflict in performance
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 48
eDP1.4 Application: Ecosystem Enabler
This is a new type of application…
- not a compliance application: where
• the conditions, methods and limits of test are established and
documented by a standard, and
• all implementers agree and obey these requirements.
- but, an ecosystem enabler that:
• easily handles wide range of conditions to meet the many
different integrators’ needs,
• allows different test methods,
• enables arbitrary test limits, and
• facilitates the exchange of this test information between users’
sites, their vendors and their customers.
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 49
Value
This is the first application to allow a user to define a test
plan (device attributes, test methods, and test limits).
This is the first application that will enables entities in the
supply chain to run identical test plans by merely exchanging
a ‘test template’.
It will be the official first eDP test application, and the first that
addresses the particular needs of eDP1.4.
The application extends the natural, self-guiding GUI
structure started in DP, more thoroughly developed for HDMI,
and now comes to fullest manifestation in eDP1.4
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 50
Product Definition
Product Model number is N6469A.
Name of the product is ‘eDP1.4 Electrical Performance and Validation
Software’ .
Targets eDP1.4, but addresses eDP1.3 and is potentially usable for
other interfaces.
Provides a GUI for user to input:
Bit Rates to test, swing levels and pre-emphasis levels to test, and ssc.
Test line limits for all tests including mask files for the different bit rates.
Leverages well-accepted and successful DisplayPort tests and GUI
structures.
Creates a ‘template’ that can be exchanged with another party to test
identically.
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 51
What the eDP sw application looks like
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 52
Fixture
Manufactured by Wilder Technologies
eDP-TPA40L-PC (kit # 640-0608-000)
40pin model
30 and 50 pin models available.
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 53
Questions
台灣是德科技股份有限公司
以是為本 以德致遠 專注量測75載
Page 54
Critical Point of DP Certification
Allion Labs, Inc.
Eric Wen
Agenda
•
•
•
•
•
•
•
•
Critical Point of DP Certification
DisplayPort Standard v1.3 Update
DP1.3 Link Rate Increase
HBR3 Capability Example
DP Alt Mode on USB Type-C
Example of DP Alt mode configurations
How to get DisplayPort Certified Logo?
Allion Engineering Services
2
Critical Point of DP Certification
• Electrical Test for Sink and Source device takes at least 50% of
entire test time.
• CDF (capability declaration form) accuracy will lower delays.
• Graphic and IC vendor are your best friends for device
capabilities.
• Allion’s past experiences can also
help you determine device
capabilities.
• Ask questions before project starts
can also help save valuable time.
3
DisplayPort 1.3 Update
• VESA DisplayPort Standard,Version1.3, was released on
Sept. 15, 2014
• Will replace DisplayPort Version 1.2a for new designs
• Backward compatible, plus new optional features
• Compliance tests expected 1st Half of 2015
4
DP1.3 Link Rate Increase
8.1 Gbps/lane
x 0.8 for 8b/10b encoding overhead
x 4 maximum lanes
= 25.92 Gbps total usable data rate
5
5
HBR3 Capability Example
• Multi-Stream Transport (MST) feature with HBR3, the following
configurations can be achieved:
- Two 4K UHD (3840 x 2160) displays
- Up to Four 2560 x 1600 displays
- Up to Seven 1080p or 1920 x 1200 displays
- One 4K UHD display with up to Two 2560 x 1600 displays
6
6
DP Alt Mode on USB Type-C
• VESA DisplayPort Alt Mode Standard,
Version 1, was released on Sept. 22, 2014
– Enables the use of USB Type-C interface for
DisplayPort
– Thin profile suitable for both ultra portable
device or larger device
– Reversible plug for easy access
– USB 3.1 Gen2 (10Gbps)
– USB Power delivery, up to 100 watts
– Supports DP Alternate Mode
– High speed data, display, and system power
all in one
7
7
Example of DP Alt mode configurations
• Source with USB Type-C to Sink with USB Type-C
Connected by USB Type-C to USB Type-C cable
• Source with DisplayPort to Sink with USB Type-C
Connected by DP to USB Type-C cable
• Source with USB Type-C to Sink with DisplayPort
Connected by USB Type-C to DP cable
• USB Type-C Adaptor (HDMI/DVI/VGA)
8
8
How to get DisplayPort Certified Logo?
Certification Process:
Use Logo on product
Contact Allion
to apply for testing
Adopter
has license
agreement
on file with
VESA
Material Preparation:
- Application Form (CDF)
- Send in devices
- Operation Instruction or
driver if necessary
Adopter
send
license
to VESA
Re- test
Debug
Fail
Testing
VESA update
website
Report reviewed
by VESA
No
PASS
No
Adopter to list
product on web?
Adopter send
product info to
VESA
Yes
Adopter has
VESA License?
Yes
9
9
What Allion can offer
Besides DP Certification?
10
Service Overview
With over 20 years of product testing experience, Allion offers technology suppliers
complete professional engineering services for every stage of product development.
Preparation Stage
Validation Stage
EVT
Prototype
•
Test Items Definition
& Creation
•
Check List Creation
•
Test Schedule
Arrangement &
Management
DVT
After-Service Stage
PVT
MP
•
Product Validation
•
•
•
•
Digital Ecosystem Interoperability
Testing
RF Validation & Signal Integrity
Product Service
Maintenance
Customer Feedback
Issue Tracking
•
Cable & Connector Testing
•
Environmental Reliability Testing
•
Standard Certification &
Compliance
•
Software Validation Solutions
•
•
User Experience Optimization
Superior Consulting Solutions
11
Factsheet
As a leading authority in IT product validation and standards compliance,
Allion provides world-class test services and consulting engineering solutions.
12
Global Facilities
Our global facilities provide localized support to technology suppliers and distributors.
10+
20+
50+
100+
300+
300+
Testing Laboratory
1482
13
Allion is the premier resource for all of your 3rd party testing needs.
Our services bring products to market more quickly, reliably, and cost
effectively to protect your brand quality and that of your suppliers.
service@allion.com
Thank you!
2015 © ALLION LABS, INC. ALL RIGHTS RESERVED. NO TEXT, LOGO OR GRAPHIC FROM THIS DOCUMENT MAY BE COPIED OR RETRANSMITTED
UNLESS EXPRESSLY PERMITTED BY ALLION LABS, INC. AND THEIR RESPECTIVE OWNERS.
14
Granite River Labs
USB Power Delivery、General Scope Protocol
Decode and Waveform Bridge Solution
Alan Chuang 莊益林
0917586767
achuang@graniteriverlabs.com
GRL Convenient Locations
Partner Lab
Boeblingen, Germany
GRL US R&D
Beaverton, OR
GRL Japan Lab
Yokohama
GRL Taiwan Labs
Hsinchu &Taipei
GRL WW HQ & Lab
Santa Clara, CA
GRL India Lab
Bangalore
GRL Asia Pacific HQ
Singapore
GRL Malaysia Lab
Penang
2
Connectivity Standards Covered
Data Bus & Storage
ATC
High Definition Video
20G
16GFC
ATC
Express
PCIe Gen3/4
SAS Gen3/4
ATC
10G
Type C
ATC
ATC
MHL 3
ATC
ATC
eDP/DP 1.3
3G/HD-SDI
HDMI 1.4/2.0
V-By-One HS
Future
SDR
DDR
QDR
FDR
External
Ethernet
1.25G
3.125G
10.31
PHY I/F
SGMII.
XAUI,
SFP+
QSFP+
SONET
STM-16
STM-64
ODU-2
CEI 6G/11G
Enterprise Datacom & Telecom
ATC
Type C/PD
ATC
UFS
ATC
CFast, XQD
Future
D-PHY/M-PHY
Mobile
ATC
UHS-2
DDR3/eMMC
Memory Bus & Card
3
4
GRL Company Confidential
5
6
Proposed USB-PD Power
Consumer Test Setup
USB-PD Spec. Chapter 7
 Instrumentation
Setup
PC or Scope with
GRL-USB-PD-SW
Automation SW
Scope
C1 C2 C3 C4
VU IU CC
Differential
Probe
LAN/
USB
LAN/
USB
USB
Vbus_US
PD
DUT
USB-PD
Controller
Vbus_US
GND
CC1/
CC2
CC1/
CC2
GND
Vbus_DS
Vbus_DS
Type-C
Cable
+-
PS
7
7
8
Electrical Compliance &
Decode Using GRL-USB-PD
9
GRL-USB-PD Software
Applications
 USB Power Delivery Rev1.0
 Chapter 5 Electrical Tests
 Chapter 6 Protocol Tests
 Chapter 7 Power Supply Tests
 USB Type-C Cable Specification
 Chapter 4 – Type-C Functional Testing
 DisplayPort Alt Mode on USB Type-C
 Chapter 5 – Discovery and USB-PD
1010
Keysight Scope Protocol Decode
HDMI 2.0/1.4 Protocol Decode and Compliance Test
•
•
•
•
•
•
Supports HDMI CTS 2.0 and CTS 1.4b
One-box solution for both HDMI
physical- and protocol-layer testing
leveraging real-time oscilloscopes.
Detailed HDMI protocol decodes.
Multi-view decode capability:
Bus viewer
Frame viewer
Event viewer
Data packet viewer
Protocol viewer
First HDMI 2.0 Protocol Decode
Solution, Supports scrambling
Decodes RGB, YCbCr pixel encoding
Supports 24, 30, 36and 48 bits
per pixels
11
Keysight Scope Protocol Decode
DP / eDP 1.2 Protocol Decode
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Conformance to DisplayPort 1.2 Specification
Multi-Stream Transport (MST) support
Supports DisplayPort 1, 2 and 4 lane designs
Seamlessly links physical layer signals to DPmicro packets to DPstream to video frame
Links the DP image to pixel details and corresponding micro packets and physical layer signals
Displays the DisplayPort Stream/ frame visually as it is in the specification
Provides a link between the transmitted stream to the physical layer signal
Displays the active video, secondary data and audio packets in a readable tabular format
Embedded hooks to DisplayPort 1.2 Source PHY and Link Compliance Testing …Upcoming
De-Scrambles DisplayPort physical layer signal
Decodes RGB, YCbCr pixel encoding formats
Supports 18, 24, 30, 36 and 48 bits per pixel
Decodes live and stored waveforms
Detailed micro packet description
Automated PDF report generation
GRL DisplayPort 1.2 Multi-lane
Protocol Decode Software (GRL-DP-DEC)
Embedded DisplayPort (eDP) support
12
Keysight Scope Protocol Decode
SD UHS-II Protocol Decode
▪
▪
▪
▪
▪
▪
▪
▪
▪
Supports UHS-II version 1.0 Specification
Decodes all the UHS-II packets transactions for easy debug.
Provides ability to correlate the UHS-II transactions to physical layer Signals
Supports Full Duplex and Half Duplex Modes and pictorially represent the flow control
Detailed packet Description provides every information of the packet
Export the data to CSV, TXT or PDF file for further analysis
Decodes the live and offline waveforms
Supports Data Scrambling
Oscilloscope auto setup
13
Test Software Solution
 Keysight VNA/TDR Test Automation Solutions
1. SD UHS-II
2. Thunderbolt
3. SAS 12G
4. HDMI 2.0
5. MHL 3.0
6. MIPI M-PHY
 Keysight Scope Protocol Decode Solutions
1. HDMI 2.0/1.4 Protocol Decode and Compliance Test
2. DisplayPort 1.2 Protocol Decode
3. DisplayPort 1.2 AUX Decode
4. SD UHS-II Protocol Decode
5. EMMC5.0
14
Waveform Bridge
Display Port Compliance Test ADS Simulation Bench
Includes….
-Test Fixture Model
-Worst DP cable Model
-Worst DUT channel Model
-IO Models
TX IO Model
Source Channel
Model
DP Connector
Model
DP Connector
Model
RX Termination
Model
DP Cable
Model
15
Waveform Bridge
Real Waveform Data from PHY
Test Chip DUT (not DP system)
Simulate Far-End Eye Pattern on
ADS
16
Waveform Bridge
Feed ADS simulated waveform into
Infiniium on the scope
Run DP compliance test on the
scope by using Simulated
waveform
Set Up DP compliance test on the scope
17
Compliance Test Simulation Flow
IO Model in Compliance Channel
Simulation
Tool
Simulated
Waveform
Compliance
Software
Compliance
Report
6/7/2014
report.html
Summary of Results
Margin Thresholds
Warning < 2 %
Critical
< 0 %
Compliance
Channel Model
Library
Customer IO
Model










PCB Channel
Connector
Cable
Test Fixture
PCB Layout
PCI Express
DisplayPort
USB
DDR
MIPI
VNA
&
PLTS
&
3D Field
Solver
Pass # Failed # Trials Test Name
Actual Value Margin Spec Range
0
1
TX SSC Modulation Deviation Down-­spreading (Max) 27.99ppm
3.0 % -­2.30000kppm <= VALUE <= 100.00ppm
0
1
TX SSC Modulation Deviation Down-­spreading (Min) -­2.044kppm 10.7 % -­2.300kppm <= VALUE <= 100ppm
0
1
TX SSC Modulation Frequency
31.254kHz
41.8 % 30.000kHz <= VALUE <= 33.000kHz
0
1
TX SSC Modulation Deviation Center-­spreading (Max) 2.00602kppm 6.4 % -­2.30000kppm <= VALUE <= 2.30000kppm
0
1
TX SSC Modulation Deviation Center-­spreading (Min) -­2.03187kppm 5.8 % -­2.30000kppm <= VALUE <= 2.30000kppm
0
1
TX SSC Modulation Balance Center-­spreading
-­25.86ppm
45.5 % -­288.00ppm <= VALUE <= 288.00ppm
0
1
TX Rise Time
56.53ps
35.9 % VALUE >= 41.60ps
0
1
TX Fall Time
56.53ps
35.9 % VALUE >= 41.60ps
0
1
TX Physical Link Rate Long Term Stability Max
76.03ppm
12.0 % -­100.00ppm <= VALUE <= 100.00ppm
0
1
TX Physical Link Rate Long Term Stability Mean
-­8.02ppm
46.0 % -­100.00ppm <= VALUE <= 100.00ppm
0
1
TX Physical Link Rate Long Term Stability Min
-­97.96ppm
1.0 % -­100.00ppm <= VALUE <= 100.00ppm
0
1
TX Common Mode RMS Voltage Limit
16.1mV
46.3 % VALUE <= 30.0mV
0
1
TX Common Mode Spectrum
-­9.71dBmV
971.0 % VALUE <= 0.00dBmV
0
1
TX Peak-­to-­Peak Voltage
958mV
30.9 % 850mV <= VALUE <= 1.200V
0
1
TX VMA (Informative)
685mV
14.2 % VALUE >= 600mV
0
1
TX EQ (Informative)
1.399ratio
42.9 % 1.259ratio <= VALUE <= 1.585ratio
0
1
TX Random Jitter (RJ)
90mUI
40.0 % VALUE <= 150mUI
0
1
TX Total Jitter (TJ)
110mUI
56.0 % VALUE <= 250mUI
0
1
TX Waveform Distortion Penalty (WDP) for 6Gbps
11.75dB
9.6 % VALUE <= 13.00dB
USB3.0 信号ライン解析事例
EYEパタン解析による考察 (5Gbps、PRBS7)
(Agilent ADSおよび電磁界解析エンジン使⽤
⽤
)
改善前
Report Detail
Agilent
TX SSC Modulation Deviation Down-­spreading (Max) Reference: SAS-­2.1 Standard
Test Summary: Pass Test Description: To verify that the SSC modulation deviation of the DUT’s transmitted signaling is within the conformance limits.
(Note this test only applies to DUT’s that support transmission of SSC.)
Test Limits:[-­2.30000kppm to 100.00ppm]TX_SSC_MOD_DEV_MAX27.99ppm
Result Details:
Result Details
改善後
TX SSC Modulation Deviation Down-­spreading (Min) Reference: SAS-­2.1 Standard
Test Summary: Pass Test Description: To verify that the SSC modulation deviation of the DUT’s transmitted signaling is within the conformance limits.
(Note this test only applies to DUT’s that support transmission of SSC.)
Test Limits:[-­2.300kppm to 100ppm]TX_SSC_MOD_DEV_MIN-­2.044kppm
Result Details:
Result Details
TX SSC Modulation Frequency Reference: SAS-­2.1 Standard
Test Summary: Pass Test Description: To verify that the TX voltage modulation amplitude (VMA) and also transmitter equalization (EQ). (This spec is
Informative)
Test Limits:[30.000kHz to 33.000kHz]TX_SSC_MOD_FREQ31.254kHz
Result Details:
Result Details
Trial 1
Trial 1: TX_SSC_MOD_FREQ
6/7/2014
report.html
file:///Users/JCT/Documents/Granite%20River%20Labs/SAS/Sample%20Report/Agilent.SAS6G.Sample_Report/report.html
どちらの波形もEmphasisはOFFの状態です。
2/10
TX Fall Time Reference: SAS-­2.1 Standard
Test Summary: Pass Test Description: To verify that the fall time of the DUT's transmitted SAS signaling is within the conformance limits.
Test Limits:>= 41.60psTX Fall Time56.53ps
Result Details:
Result Details
Trial 1
Trial 1: TX Fall Time
ADS
GRL
17
TX Physical Link Rate Long Term Stability Max Reference: SAS-­2.1 Standard
Test Summary: Pass Test Description: To verify that the long term stability of the DUT transmitter's physical link rate is within the conformance limit
(Note: This test must be peformed while the DUT's TX SSC type is set to No Spreading.)
Test Limits:[-­100.00ppm to 100.00ppm]TX_PL_Rate_LTS_Max76.03ppm
Result Details:
Result Details
Trial 1
Trial 1: TX_PL_Rate_LTS_Max
file:///Users/JCT/Documents/Granite%20River%20Labs/SAS/Sample%20Report/Agilent.SAS6G.Sample_Report/report.html
GRL Compliance Simulation Automation & GUI Software
User
18
Total Approach to Testing
Variability
Compliance Testing
•Lower bar
•May not match reality
•Static snapshot
Manufacturing
Testing
•Manufacturing variation
•Production defects
•QA test tools
Life Testing
•Time variation
•MTBF
Interop Testing
•Define target space
•Virtual & real test bed
Electrical Stress
•PVT variation
•Jitter impact
•Electrical Margin
Protocol Stress
•Error handling
•Random faults
•Protocol margin
Application Stress
•Software interaction
•O/S interaction
•Cross interfaces
19
Thanks
Granite River Labs
Sales and business inquiries
info@graniteriverlabs.com
Main Phone: +886 (2) 2657-2199
+886 (3) 552-6658
20
HDMI 2.0 and MHL 3.2 Test
Environment Guideline
Simplay Labs Taiwan
iST宜特科技
Eric 余天華 / 首席技術顧問
www.hdmiatc-taiwan.com
Testing challenge
Maximum 8~10K
times plugs
Module performance
decaying
iST proprietary and confidentiality
Frequent Environment
Calibration
Better Environment
arrangement
2
Major features in HDMI 1.4b
 Electrical Phy test:
Maximum clock rate 340 MHz
Maximum Total throughput 10.2Gbit/s (3.4G/channel)
 Protocol test:
Character synchronize test.
All video packet test.
 Pixel coding:
RGB 4:4:4, YCbCr 4:4:4 (8-16 bits per component); YCbCr 4:2:2 (12 bits per
component)
 Video timing:
Deep color timing.
3D Video timing (Top-bottom, side by side, frame sequential 1920P at
120Hz ).
4K2K timing support 4096x2160/30Hz.
 Audio coding:
High-bitrate audio (HBR) sampling up to 768 kHz
Maximum Audio channel 8 channel
One bit Audio.
 HDCP version :
Support HDCP 1.x
iST proprietary and confidentiality
3
Major features in HDMI 2.0
 Electrical Phy test:
Maximum clock rate 600 MHz
Maximum Total throughput 18Gbit/s. (6G /channel)
 Protocol test:
Source Sink TMDS Protocol Scrambling test.
Sink Character Error Detection Tests (CED)
 Pixel coding:
Support 4:2:0 Chroma subsampling.
4:2:0 deep color.
 Video timing:
2160p 24-bit Color Depth, Deep Color, 3D
Non-2160p 24-bit Color Depth, Non-2160p 24-bit Color Depth
Maximum resolution at 24 bit/px, 4096x2160/60Hz
 Audio coding:
HBR (high bit rate) Audio sampling up to 1536KHz
Maximum Audio channel 32 channel
 HDCP version:
Support HDCP 2.2 and 1.x
 SCDC A8/A9 support test:
CED (character error detect) support behavior test.
SCDC (Status and control data channel) behavior test.
iST proprietary and confidentiality
4
Keysight HDMI 2.0 test equipment
in Simplay Lab
Agilent ParBERT 81250 is a modular parallel
electrical and optical bit error ratio (BER) test
platform, which works up to 13.5 Gb/s,
already provide the test capability for next
generation.
• DSAX92004A Agilent Infiniium 20 GHz
• Agilent Technologies N5399C HDMI electrical
performance validation and compliance
software
iST proprietary and confidentiality
5
Keysight other test equipment
in Simplay Labs
HDMI 1.4b Protocol analyzer
U4998A
E4887A-101 low speed cable emulator.
E4887A-102 75MHz cable emulator.
E4887A-103 Eq type cable emulator.
E4887A-105 270MHz cable emulator.
E4887A-106 742.5MHz cable emulator 2810mm. HDMI 2.0
iST proprietary and confidentiality
6
Related HDMI 2.0 testing SW
Parbert automation: ValiFrame
5399 V2.23
Scope SW: 5990C
Scope InfiniiSim SW EQ
iST proprietary and confidentiality
7
HDMI 2.0 Keysight MOI/test items
Test ID
items
HF1-1_Agilent_MOI_v1.0a
6G – VL and Vswing
HF1-2_Agilent_MOI_v1.0a
6G – TRISE, TFALL
HF1-3_Agilent_MOI_v1.0a
6G – Inter-Pair Skew
HF1-4_Agilent_MOI_v1.0a
6G – Intra-Pair Skew
HF1-5_Agilent_MOI_v1.0a
6G – Differential Voltage
HF1-6_Agilent_MOI_v1.0a
6G – Clock Duty Cycle and Clock Rate
HF1-7_Agilent_MOI_v1.0a
6G – Clock Jitter
HF1-8_Agilent_MOI_v1.0a
6G – Data Eye Diagram
HF1-9_Agilent_MOI_v1.0a
6G – Differential Impedance
HF2-1_Agilent_MOI_V1.0a
6G – Min/Max Differential Swing Tolerance
HF2-2_Aglient_MOI_V1.0a
6G – Intra-Pair Skew
HF2-3_Agilent_MOI_V1.0a
6G – Jitter Tolerance
HF2-4_Agilent_MOI_v1.0a
6G – Differential Impedance
iST proprietary and confidentiality
8
HDMI 2.0 Keysight MOI equipment
items
Major equipment
6G – VL and Vswing
Agilent DSO90000A or DSO-X or DSO-Q series Infiniium Oscilloscopes
6G – TRISE, TFALL
Agilent DSO90000A or DSO-X or DSO-Q series Infiniium Oscilloscopes
6G – Inter-Pair Skew
Agilent DSO90000A or DSO-X or DSO-Q series Infiniium Oscilloscopes
6G – Intra-Pair Skew
Agilent DSO90000A or DSO-X or DSO-Q series Infiniium Oscilloscopes
6G – Differential Voltage
Agilent DSO90000A or DSO-X or DSO-Q series Infiniium Oscilloscopes
6G – Clock Duty Cycle and Clock Rate
Agilent DSO90000A or DSO-X or DSO-Q series Infiniium Oscilloscopes
6G – Clock Jitter
Agilent DSO90000A or DSO-X or DSO-Q series Infiniium Oscilloscopes
6G – Data Eye Diagram
Agilent DSO90000A or DSO-X or DSO-Q series Infiniium Oscilloscopes
6G – Differential Impedance
Agilent DSO90000A or DSO-X or DSO-Q series Infiniium Oscilloscopes
6G – Min/Max Differential Swing Tolerance Agilent M8190A or E4887A based Test Equipment
6G – Intra-Pair Skew
Agilent M8190A or E4887A based Test Equipment
6G – Jitter Tolerance
Agilent M8190A or E4887A based Test Equipment
6G – Differential Impedance
E5071C ENA Series Network Analyzer
iST proprietary and confidentiality
9
HDMI 2.0 TP and testing SW
items
6G – VL and Vswing
6G – TRISE, TFALL
6G – Inter-Pair Skew
6G – Intra-Pair Skew
6G – Differential Voltage
6G – Clock Duty Cycle and
Clock Rate
6G – Clock Jitter
6G – Data Eye Diagram
6G – Differential Impedance
test point
TP1
TP1
TP1
TP1
TP1
Cable emmulator
NA
NA
NA
NA
NA
SCDC controller
NA
NA
NA
NA
NA
TP1
NA
NA
TP2_EQ
TP2_EQ
TP1
NA
NA
NA
NA
NA
NA
6G – Min/Max Differential Swing
TP2
Tolerance
BitifEye BIT-1014-1000-0 BitifEye BIT-1016-0000-0
HDMI 2.0 Cable emulator HDMI SCDC Controller Kit
6G – Intra-Pair Skew
TP2
BitifEye BIT-1014-1000-0 BitifEye BIT-1016-0000-0
HDMI 2.0 Cable emulator HDMI SCDC Controller Kit
6G – Jitter Tolerance
TP2
6G – Differential Impedance
TP2
iST proprietary and confidentiality
BitifEye BIT-1014-1000-0 BitifEye BIT-1016-0000-0
HDMI 2.0 Cable emulator HDMI SCDC Controller Kit
NA
NA
10
HDMI test environment setup
iST proprietary and confidentiality
11
Keysight MHL 3.2 test equipment
ParBert
MHL 3.2 Sink Electrical test
High speed scope
MHL 3.2 Source Electrical test
AWG M8190
3.7.2.32 Differential input swing tolerance eCBUS-D
BWD
3.7.2.33 Input DC voltage of eCCBUS-S BWD data
3.7.2.36 Jitter tolarance of eCBUS-S BWD Data
iST proprietary and confidentiality
12
Simplay MHL3.2 test equipment
• UTS 800 – 8 Slot Platform System
• SL-850 - UTS 800 MHL-CBUS Test Module
• SL-860/861 -UTS 800 MHL2.2 Rx/Tx
System Analyzer Test Module
• SL-863 -UTS 800 MHL3.2 Rx/Tx System
Analyzer Test Module
• SL-402 RELT relay board
• SL-403 CBUS Source/Sink
Board
iST proprietary and confidentiality
13
New Fixtures for MHL3.2
100-1113-000 SMA to Type A
100-1114-000 SMA to MHL
Artek MHL3.0 cable emulator
iST proprietary and confidentiality
14
MHL 3.2 test environment setup
example 4.7.2.24
iST proprietary and confidentiality
15
Coupon
iST proprietary and confidentiality
16
Q&A
www.hdmiatc-taiwan.com
Was this manual useful for you? yes no
Thank you for your participation!

* Your assessment is very important for improving the work of artificial intelligence, which forms the content of this project

Download PDF

advertising