SL100x Universal Demodulator IC
Description
Interfaces
SL100x is a fully Software defined Universal Baseband
Demodulator IC specializes in supporting worldwide terrestrial,
cable, radio and TV broadcasting standards. The IC is also well
suited for custom waveform demodulation.
Applications
HDTV, STB, TV Tuner module
Internal and external A/V receiver modules for Tablets
Tactical radio communication systems; Satellite receivers
Secure and Proprietary baseband waveform demodulation
Surveillance, remote monitoring & emergency warning systems
Internal and external A/V receiver modules for Tablets
IC Information
INPUT: Flexible interface to IF/LIF tuners
OUTPUT: Parallel Digital Transport Stream output interface
AGC outputs for RF and IF stages
CVBS and SIF analog outputs for analog A/V decoder
2
I C interface for programming and code download
JTAG & UART for diagnostics and debug
Standards
Single Carrier
QPSK,16/32/64/128/256 QAM
Multi Carrier(OFDM) QPSK,16/32/64/128/256 QAM
TV / Cable / Radio
Standards
Package: LFBGA 176-pin; 12x12 mm ; 0.80mm ball pitch
Power supply: 3.3V, 2.5V and 1.2V
ATSC, DVB-T, ISDB-T, DTMB
Clear QAM, DVB-C, ISDB-C
NTSC, PAL, SECAM, FM, DRM, DAB
Features
Indigenous “Software Defined Radio” (SDR) architecture
Integrated de-interleaving support for better Doppler
Supports selection of standards through Software
Excellent multi-path performance with adjustable tap
configuration
Capable of handling large carrier offsets
Meets Tier 1 OEM performance requirements
Fast channel acquisition and recovery algorithms with
Flexible tuner support – interfaces to LIF (silicon) and IF
blind, decision-directed and trained algorithm
MOPLL tuners
Dynamically programmable matched filters to compensate
Integrated ADCs, PLL’s and DAC’s
for carrier frequency offsets
Separate RF and IF AGC outputs with adaptive tuner-gain
Co-channel rejection filters
and loop-delay parameters
Digital adjacent channel rejection filters
Fast channel re-lock through restoration of channel
FEC statistics measurements and signal meters
parameters
Control processor to reduce host software burden
Forward Error Correction (FEC) support for all standards:
Field proven, low footprint and low power device
Viterbi, Reed-Solomon, LDPC, Trellis and Turbo decoder
SL100x
SDRAM
I2C
JTAG
RF
Tuner
IF input
DAC
Clocking
Memory
Sub-system
Control CPU
DSP
DSP
DSP
Signal
Resampling
Demodulation
Channel
Decoding
(FEC)
DAC
Digital
TS out
Media
Processor
CVBS
/SIF
Out
AGC
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