SKiiP 4 - Semikron

Technical Explanation
®
SKiiP 4
Revision:
8
Issue date:
2016-11-29
Prepared by:
Bernhard Eichler
Approved by:
AW SLAPF
Keyword: Keywords
Please note:
Unless otherwise specified, all values in this technical explanation are typical values. Typical values are
the average values expected in large quantities and are provided for information purposes only. These
values can and do vary in different applications. All operating parameters should be validated by user’s
technical experts for each application.
This document is valid for the following SKiiP®4 part numbers:
20601123
SKiiP 1814 GB12E4-3DUL
20602023
SKiiP 1814 GB12E4-3DUL
20601224
SKiiP 1814 GB17E4-3DUL
20602024
SKiiP 1814 GB17E4-3DUL
20601125
SKiiP 2414 GB12E4-4DUL
20602025
SKiiP 2414 GB12E4-4DUL
20601226
SKiiP 2414 GB17E4-4DUL
20602026
SKiiP 2414 GB17E4-4DUL
20601127
SKiiP 3614 GB12E4-6DUL
20602027
SKiiP 3614 GB12E4-6DUL
20601228
SKiiP 3614 GB17E4-6DUL
20602028
SKiiP 3614 GB17E4-6DUL
20601133
SKiiP 1814 GB12E4-3DUW
20602033
SKiiP 1814 GB12E4-3DUW
20601234
SKiiP 1814 GB17E4-3DUW
20602034
SKiiP 1814 GB17E4-3DUW
20601135
SKiiP 2414 GB12E4-4DUW
20602035
SKiiP 2414 GB12E4-4DUW
20601236
SKiiP 2414 GB17E4-4DUW
20602036
SKiiP 2414 GB17E4-4DUW
20601137
SKiiP 3614 GB12E4-6DUW
20602037
SKiiP 3614 GB12E4-6DUW
20601238
SKiiP 3614 GB17E4-6DUW
20602038
SKiiP 3614 GB17E4-6DUW
20601139
SKiiP 1814 GB12E4-3DUL
20602039
SKiiP 1814 GB12E4-3DUL
20601240
SKiiP 1814 GB17E4-3DUL
20602040
SKiiP 1814 GB17E4-3DUL
20601141
SKiiP 2414 GB12E4-4DUL
20602041
SKiiP 2414 GB12E4-4DUL
20601242
SKiiP 2414 GB17E4-4DUL
20602042
SKiiP 2414 GB17E4-4DUL
20601143
SKiiP 3614 GB12E4-6DUL
20602043
SKiiP 3614 GB12E4-6DUL
20601244
SKiiP 3614 GB17E4-6DUL
20602044
SKiiP 3614 GB17E4-6DUL
20601159
SKiiP 3614 GB12E4-6DULR
20602059
SKiiP 3614 GB12E4-6DULR
20601174
SKiiP 1814 GB12E4-3DUSL
20602074
SKiiP 1814 GB12E4-3DUSL
20601175
SKiiP 2414 GB12E4-4DUSL
20602075
SKiiP 2414 GB12E4-4DUSL
20601176
SKiiP 3614 GB12E4-6DUSL
20602076
SKiiP 3614 GB12E4-6DUSL
20601277
SKiiP 3614 GB17E4-6DULR
20602077
SKiiP 3614 GB17E4-6DULR
It is valid as well for customized SKiiP®4 with part numbers 20601xxx and 20602xxx (SKiiPxx-Dxxxx) with
restrictions according to the customer specification. The document remains effective until replaced by
subsequent revision of this document.
© by SEMIKRON / 2016-11-29 / Technical Explanation / SKiiP®4
PROMGT.1023/ Rev.4/ Template Technical Explanation
Page 1/65
Table of Contents
1. Related documents .....................................................................................................................4
2. Introduction ...............................................................................................................................5
2.1 Heat sink .............................................................................................................................6
2.2 Power section .......................................................................................................................6
2.3 Gate Driver ..........................................................................................................................7
3. Topologies and selection guide .....................................................................................................8
3.1 Type Designation Code ..........................................................................................................8
3.2 Overview of the available types and current ratings ...................................................................9
4. Standards and qualification tests ................................................................................................ 10
4.1 Tests for qualification and re-qualification............................................................................... 10
4.2 Electromagnetic compatibility (EMC) ...................................................................................... 10
4.3 Isolation coordination .......................................................................................................... 11
4.4 Installation altitude ............................................................................................................. 11
5. Gate Driver Board..................................................................................................................... 15
5.1 Overview............................................................................................................................ 15
5.2 Gate driver interface “SKiFace” ............................................................................................. 16
5.2.1 Overview ..................................................................................................................... 16
5.2.2 Pin description .............................................................................................................. 17
5.2.3 External Power Supply ................................................................................................... 20
5.2.4 Switching Signal Inputs ................................................................................................. 21
5.2.5 Analogue Output Signals ................................................................................................ 22
5.2.6 HALT Logic Signal ......................................................................................................... 24
5.2.7 CMN_GPIO1 signal ........................................................................................................ 26
5.2.8 CAN-Interface ............................................................................................................... 27
5.2.9 Ground connection ........................................................................................................ 28
5.2.10 Shield and protective earth/chassis connection ................................................................. 28
5.2.11 Reserved or not used signals .......................................................................................... 29
5.3 Gate driver board ................................................................................................................ 30
5.3.1 Overview ..................................................................................................................... 30
5.3.2 Digital signal transmission .............................................................................................. 30
5.3.3 Power-On-Reset ............................................................................................................ 30
5.3.4 Interlock Dead Time Generation ...................................................................................... 31
5.3.5 Short pulse suppression ................................................................................................. 31
5.3.6 IntelliOff ...................................................................................................................... 32
5.3.7 Failure Management ...................................................................................................... 34
5.3.8 Analogue signals / sensor functionality ............................................................................ 37
6. Power terminals ....................................................................................................................... 43
7. Application hints ....................................................................................................................... 46
7.1 Verification of design ........................................................................................................... 46
7.2 Safe Operating Area for SKiiP®4 ............................................................................................ 46
7.3 Maximum blocking voltage and snubber capacitors .................................................................. 47
7.4 Definition of Thermal Resistance ........................................................................................... 47
7.5 Isolation voltage test (IVT) ................................................................................................... 49
7.6 Current sharing between paralleled half bridge modules ........................................................... 50
7.7 FRT (Fault Ride Through) - Function ...................................................................................... 50
7.8 Solar function ..................................................................................................................... 53
7.9 Recommended temperature rating ........................................................................................ 54
7.10 Paralleling of SKiiP®4 ........................................................................................................... 56
7.11 Prevention of condensation ................................................................................................... 59
8. Logistics .................................................................................................................................. 59
8.1 Label ................................................................................................................................. 59
8.1.1 System Label ................................................................................................................ 59
8.1.2 Half bridge Laser Label .................................................................................................. 60
8.1.3 Warranty Label ............................................................................................................. 60
© by SEMIKRON / 2016-11-29 / Technical Explanation / SKiiP®4
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8.1.4
Data Matrix Code .......................................................................................................... 60
9. Abbreviations ........................................................................................................................... 63
10. Symbols .................................................................................................................................. 64
© by SEMIKRON / 2016-11-29 / Technical Explanation / SKiiP®4
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1.
Related documents
•
Data sheets SKiiP®4
•
Diagnostic Interface SKiiP®4 – CANopen User Manual
•
Diagnostic Interface SKiiP®4 – CANopen Object Dictionary
•
Technical Explanation SKiiP®4 Parallel Board
•
Technical Explanation SKiiP®4 F-Option
•
Technical Explanation SKiFace Adapter Board
All these documents can be found on the SEMIKRON internet page (www.semikron.com) or requested at
SEMIKRON
© by SEMIKRON / 2016-11-29 / Technical Explanation / SKiiP®4
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2.
Introduction
The 4th generation SKiiP, by name SKiiP®4, is an intelligent power module (IPM) with highest power density
and reliability. SEMIKRON´s SKiiP stands for “SEMIKRON intelligent integrated Power” what means that
three perfectly matched components are integrated to one IPM:
• heat sink
• power section
• gate driver
Figure 2. 1: SKiiP®4 – 4 fold
The power section consists of 3, 4 or 6 in parallel connected half bridge modules whereas a half bridge is
defined as shown in Figure 2.2. Explosion picture of half bridge module is shown in the Figure 2.3.The IGBT
and the diode connected between DC+ and AC are named TOP IGBT / TOP diode. Consequently, the IGBT
and the diode between AC and DC- are named BOT IGBT / BOT diode.
Figure 2.2: Half bridge definition
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In this document following synonyms will be used for a power section with
•
3 half bridge modules in parallel = 3-fold
•
4 half bridge modules in parallel = 4-fold
•
6 half bridge modules in parallel = 6-fold
Figure 2.3: Half bridge “explosion picture”
2.1
Heat sink
SEMIKRON offers high efficient water cooled heat sinks and air cooled aluminum heat sinks. Technical
details are given in the corresponding datasheet. Customer specified heat sinks can be assembled on
request as well. However there are several limitations, which should be strictly complied with to enable
SEMIKRON to handle the customer specific heat sinks. Please refer to the PI 12-034 for additional
information.
2.2
Power section
SKiiP®4 power section stays with its pressure contact technology without copper base plate. This means the
Al2O3 DBC (direct bonded copper) substrate is pressed directly onto the heat sink without the use of a
base plate. The pressure is induced by a pressure part on top, which is screwed to the heat sink. This
pressure is transferred to the three main terminals (+DC, -DC and AC). These main terminals constitute a
low-inductance sandwich construction and transfer the pressure to the above-mentioned DBC substrate.
The pressure is applied across several contact points beside every single chip. As a result, a very low
thermal and ohmic resistance RCC’+EE’ is achieved (refer to Figure 2.4).
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Figure 2.4: Main terminals construction principle
-DC
+DC
AC
The chips themselves are sintered, not soldered. The sintering is based on pulverised silver which forms a
material connection when pressure and temperature are applied. This sintering process connects the chip
and DCB surface extremely stable up to the melting point of silver at 962°C.
Contact springs are used for all of the auxiliary contacts (gate, auxiliary emitter and temperature sensor).
These spring contacts allow the solder-free connection of the driver board.
2.3
Gate Driver
The task of the driver unit is both, transferring incoming signals into powerful output signals to control the
IGBT and to ensure signal isolation between high and low voltage sides of the driver board. Additionally,
fault conditions need to be monitored to protect the power section in case of a failure. For an effective
failure analysis a serial diagnostic I/O based on the CAN open protocol was implemented.
© by SEMIKRON / 2016-11-29 / Technical Explanation / SKiiP®4
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3.
3.1
Topologies and selection guide
Type Designation Code
© by SEMIKRON / 2016-11-29 / Technical Explanation / SKiiP®4
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3.2
Overview of the available types and current ratings
The Table 3—1: SKiiP®4 standard product range gives an overview of the available types and current
ratings (ICnom).
Table 3—1: SKiiP®4 standard product range
3-fold
4-fold
6-fold
SKiiP
1814GB12E43DUW
SKiiP
1814GB17E4
-3DUW
SKiiP
2414GB12E44DUW
SKiiP
2414GB17E44DUW
SKiiP
3614GB12E46DUW
SKiiP
3614GB17E46DUW
SKiiP
1814GB12E43DUL
SKiiP
1814GB17E4
-3DUL
SKiiP
2414GB12E44DUL
SKiiP
2414GB17E44DUL
SKiiP
3614GB12E46DUL
SKiiP
3614GB17E46DUL
ICnom = 1800A
ICnom = 2400A
© by SEMIKRON / 2016-11-29 / Technical Explanation / SKiiP®4
ICnom = 3600A
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4.
4.1
Standards and qualification tests
Tests for qualification and re-qualification
Table 4—1: SKiiP®4 Tests for qualification and re-qualification
No
Test
Test Conditions
Standard
01
High Temperature Reverse
Bias
1000h, VGE = 0V, 95% VCEmax
Ts=Tjmax-10°C
IEC 60747-9
02
High Temperature Gate
Stress
1000h, +/- VGEmax, Tjmax
IEC 60747-9
03
High Humidity High
Temperature Reverse Bias
1000h, 85°C, 85% RH, VCE
VGE=0V
04
High Temperature Storage
1000h, Ta = +125°C
IEC 60068 Part 2-2
05
Low Temperature Storage
1000h, Ta = -40°C
IEC 60068 Part 2-1
06
Thermal Cycling
100 cycles, -40°C/ +125°C
IEC 60068 Part 2-14
07
Power Cycling (EOL-Test)
60.000 load cycles @ ∆Tj = 110K, Tjm=95°C
200.000 load cycles @ ∆Tj = 70K, Tjm=115°C
IEC 60747-9
08
Vibration (Halt Test)
Sinusoidal Sweep, 5g, x, y, z – axis, 2h/ axis
IEC 60068 Part 2-6
09
Shock (Halt Test)
Half-sinusoidal Pulse, 30g, +/- x, +/- y, +/- z
direction, 1000 times per direction
IEC 60068 Part 2-27
10
Corrosive gas test
Ta = 25°C, 75%RH, 4 components: H2S
(hydrosulphide), NO2 (nitrogen dioxide), Cl2
(Chlorine), SO2 (Sulphur dioxide), 21 days
IEC 60068 Part 2-60
4.2
max.=1360
V,
IEC 60068 Part 2-67
Electromagnetic compatibility (EMC)
The SKiiP®4 is designed to withstand the following immunity tests with EMC compliant installation:
Table 4—2: SKiiP®4 Electromagnetic compatibility
Immunity test
Conditions
Test level
Fast transients (Burst) (61000-4-4)
On driver board interfaces
4kV / 5kHz
Radio Frequency Fields (61000-4-3)
Polarisation: vertical + horizontal
Frequency: 80 MHz - 1000 MHz
Modulation: 80% AM, 1kHz
Far field, homogeneous
Stripline acc.11425-5 level III/F3
20V/m
200V/m
RF Conducted Disturbance (61000-4-6)
Frequency: 150 kHz - 80 MHz
Modulation: 80 % AM, 1kHz
Voltage: 20V EMF
Magnet field (61000-4-8)
Far field, homogeneous
170A/m
Electrostatic discharge (ESD)
EN 61000-4-2
Contact discharge
Air discharge
6kV
8kV
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4.3
Isolation coordination
The isolation of the SKiiP®4 is designed according to EN50178 and EN61800-5-1. For working conditions
please refer to the datasheet SKiiP®4. 20601xxx and 20602xxx
Table 4—3: Isolation limits SKiiP®4
Isolation / Test level
Min value
Creepage primary - secondary
14mm
Creepage secondary – heat sink potential
8mm
Clearance primary – secondary
14mm
Clearance secondary – heat sink potential
8mm
Partial discharge extinction voltage
(IEC60664-1) between primary and secondary
side of driver board
1900V rms; QPD < 10pC
Rated surge withstand voltage (IEC60664-1)
primary to secondary
primary to heat sink
Part.Nr: 20601xxx
8kV
8kV
4.4
Part.Nr: 20602xxx
12kV
8kV
Installation altitude
Isolation coordination for SKiiP®4 is done for overvoltage category III and altitudes up to 2000m.
The required clearance distances between mains-circuits and their environment for overvoltage category III
are listed in EN50178.
For an earthed-neutral system the rated isolation voltage is defined in chapter 5.2.16.1 of EN50178 as:
“…the peak value of the rated voltage between phase and earthed neutral point.”
Based on this sentence the rated isolation voltage in case of a grounded delta grid (Figure 4.1) and a star
grounded grid (Figure 4.2) can be derived as:
Rated isolation voltage in case of 690V grounded delta grid: 690V
Rated isolation voltage in case of 690V star grounded grid: 400V
Figure 4.1: Grounded delta grid
Figure 4.2: Star grounded circuit network
(690V-TN-grid)
L1
690V
UL13
L1
UL12
UL1
UL3
L3
L2
L3
ULE=400V
UL2
ULL=690V
L2
UL23
Based on the kind of grid and the voltage level the required clearance distances for basic and reinforced
isolation differ from the designed ones.
According to HD625 S1 and IEC60664-1 the maximum altitude can be calculated based on the factors
between required and designed clearance distances.
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Table 4—4: Altitude correction factors (IEC 60664-1)
Altitude
Normal barometric
pressure
Multiplication factor
for clearances
m
kPa
2 000
80,0
1,00
3 000
70,0
1,14
4 000
62,0
1,29
5 000
54,0
1,48
6 000
47,0
1,70
7 000
41,0
1,95
8 000
35,5
2,25
9 000
30,5
2,62
10 000
26,5
3,02
15 000
12,0
6,67
20 000
5,5
14,5
The overvoltage category influences the installation altitude too. To increase the altitude further the
overvoltage category need to be reduced (EN50178):
“As an alternative to the values of table 3, columns 2 to 5, the clearances between mains-circuits of an EE
and its environment may be designed in accordance with overvoltage category II, if facilities are provided
which reduce overvoltages of category III to values of category II…However for reinforced isolation
according to column 7 shall not be reduced.”
The required clearance distances between mains-circuits and their environment for overvoltage category II
are listed in EN50178.
If safety isolation is necessary the maximum altitude of SKiiP®4 is 6250 m (690 TN grid and overvoltage
category II).
If only basic isolation is required even higher altitudes are possible. In case of 690V TN grid and
overvoltage category II an altitude of theoretically 9000 m for SKiiP®4 is possible.
This is the case when an additional basic isolation is implemented between SKiiP driver interface and
controller board. This can be realized by the following means:
•
•
•
Use of fiber optic for control signals (TOP, BOT, Error) and
SKiiP analogue signals (current, DC-voltage and temperature measurement) are not used and
all SKiiPs are supplied by separate power supplies to which no other circuit is connected.
The above described implementation is shown in the Figure 4.3. The F-Option board for SKiiP®4 (it is
shown in the Figure 4.3) can be ordered separately and can be easily mounted on the SKiiP®4 top cover.
© by SEMIKRON / 2016-11-29 / Technical Explanation / SKiiP®4
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Figure 4.3: Implementation of additional basic isolation between SKiiP®4 driver interface and
controller board
Finally, the installation altitude of SKiiP depends on:
• Grid configuration (star grounded grid, delta grounded grid)
• The voltage level of the line to earth voltage (rated isolation voltage)
• The overvoltage category (II or III)
• Whether safety isolation is required or not
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Table 4—5 summarizes the installation altitudes for SKiiP®4.
Table 4—5: Installation altitudes for SKiiP®4 in dependency of kind of grid, overvoltage
category and kind of required isolation
SKiiP4
(with 690V
grounded delta)
Overvoltage category III
Overvoltage category II
Grounded delta
grid
Grounded delta
grid
TN 690V
L1
L1
L1
690V
UL13
UL12
UL1
UL3
L3
L2 L3
Basic
isolation
against
ground
Reinforced
isolation
8 mm
L1
690V
UL13
UL12
UL1
ULE=400V
UL2
ULL=690V
L2
UL3
L3
UL23
Required
for
2000m
TN 690V
L2 L3
ULE=400V
UL2
ULL=690V
L2
UL23
5,5 mm
Existing
5,5 mm
3 mm
8 mm
Factor
1
1,45
1,45
2,66
Altitude
2000m
4840m
4840m
9000m
Required
for
2000m
14 mm
8 mm
14mm
8mm
Existing
14 mm
Factor
1
1,75
1
1,75
Altitude
2000m
6250m
2000m
6250m
Maximum Altitude
with safety
isolation
2000m
4840m
2000m
6250m
Maximum Altitude
without safety
isolation
2000m
4840m
4840m
9000m
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5.
5.1
Gate Driver Board
Overview
The functionality of the Gate Driver board can be seen in following block diagram.
• Gate driver interface SKiFace, red block in the Figure 5.1 (refer to Chapter 5.2)
• Gate driver board, green block in the Figure 5.1 (refer to Chapter 5.3)
Figure 5.1: Gate Driver Board block diagram
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5.2
Gate driver interface “SKiFace”
5.2.1
Overview
The Gate Driver Interface SKiFace is marked in Figure 5.2. It is a 25 pin D-Sub male plug connector. The
picture, the pin-out and the dimensions are summarized in Figure 5.3.
It includes Pins for:
• External Power Supply
(refer to chapter 5.2.3)
• Switching signal input
(refer to chapter 5.2.4)
• Analogue signals (refer to chapter 5.2.5)
• HALT logic (refer to chapter 5.2.6)
• CMN_GPIO 1 output (refer to chapter 5.2.7)
• CMN_GPIO 2 (refer to chapter 5.3.6)
• CAN interface (refer to chapter 5.2.8)
Figure 5.2: Gate Driver Interface
Figure 5.3: SKiiP®4 - connector D-Sub 25 pin, male plug, vertical, top view
Picture
Pin Configuration
Dimensions
For connecting the SKiiP®4 to a controller the following recommendations should be considered when
choosing a cable:
• Cable length should be kept shorter than 3m
• Usage of shielded cables is recommended
• Longer cables must be shielded
Verification according to mechanical stability and EMC behaviour in customer’s application is necessary.
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As the SKiFace interface is a standardized, it is also used for other SEMIKRON products. Due to that not all
signals are used for SKiiP®4.
Not used signals are: HB_RSRVD
Please note: The plastic cover of D-Sub connector should be removed shortly before start of operation
(ESD-Handling)
5.2.2
Pin description
Table 5—1: Pin configuration SKiiP®4
PIN
Signal
Function
Specification
1/2/3
PWR_VS
Power Supply
+24V (+/- 20%)
4
CMN_GPIO2
Digital input/ output
Bidirectional status
signal
Sync-signal for parallelized operation
For details see IntelliOff function, p. 32
5
CMN_HALT
Digital input/ output
Bidirectional status
signal
LOW (dominant) = not ready to operate (e.g.
error) HIGH (recessive) = ready to operate
For details see HALT Logic Signal, p. 24
Temperature signal out
This pin is used to transmit the temperature
sensor analogue signal.
Max output current: 5mA
Nominal voltage range: 0 … +10V
See Integrated DCB-Temperature Sensor, p. 40
6
CMN_TEMP
7
CMN_DCL
DC-Link voltage out
This pin is used to transmit the DC-Link voltage
level.
Max. output current: 5mA
Nominal voltage range: 0 … +10V
For details see DC-Link-Voltage Sensing, p. 41
8
HB_TOP
Switching signal input
for high side IGBT
LOW = High side IGBT off
HIGH = High side IGBT on
For details see Switching Signal Inputs, p. 21
9
HB_RSRVD
Reserved
Not connected
10
HB_I
Current sensor out
This pin is used to transmit the current sensor
analogue signal.
Max. output current: 5mA
Nominal voltage range: -10V … +10V
For details see AC-current sensor, p. 37
11
CAN_H
CAN interface INPUT/
OUTPUT HIGH
Input impedance = infinite
Specification according to ISO 11898.
12
CAN_H
13
SHLD_GND
GND
14/15/1
6
PWR_GND
Ground for PWR_VS
17
CMN_GND
Ground for CMN_HALT,
CMN_GPIO1/2
Internally connected to PWR_GND
18
CMN_GPIO1
Digital Input/Output
General purpose IO
Inverted CMN_HALT signal (except in case of
activated FRT-function, please refer to chapter
CMN_GPIO1 signal, p. 26
Internally connected to pin 11
Internally connected to PWR_GND
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19
CMN_TEMP_GND
Ground for CMN_TEMP
20
CMN_DCL_GND
Ground for CMN_DCL
21
HB_BOT
Switching signal input
for low side IGBT
LOW = Low side IGBT off
HIGH = Low side IGBT on
For details see Switching Signal Inputs, p.21
22
HB_GND
Ground for
CMN_HB_TOP,
CMN_HB_BOT,
CMN_HB_RSRVD
Internally connected to PWR_GND
23
HB_I_GND
Ground for HB_I
24
CAN_L
CAN interface INPUT/
OUTPUT LOW
25
CAN_L
Input impedance = infinite;
Specification according to ISO 11898.
Internally connected to pin 24
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Figure 5.4: Overview schematics SKiFace interface (CMN_GPIO1/2 and CMN_HALT are not
depicted
SKiiP®4 Driver interface
SKiFace
Controller interface
External power supply
0V
Chassis / PE
24V
Capacitive
grounding
D-Sub cable shield
direct
grounding
SHLD_GND
13
PWR_GND
CMN_GND
HB_GND
DC
14-17, 22
VS
GND
DC
VS
GND
PWR_VS = Supply voltage
1, 2, 3
Analogue output
Analogue input
CMN_TEMP = DCB-sensor temperature
6
CMN_TEMP_GND = Analogue ground
19
Analogue output
GND
Analogue input
CMN_DCL = DC-Link voltage
7
CMN_DCL_GND = Analogue ground
20
Analogue output
GND
Analogue input
HB_I = AC current signal
10
HB_I_GND = Analogue ground
23
GND
VS
VS
Digital output
Digital input
HB_TOP = Switching signal TOP
8
GND
GND
VS
VS
Digital output
Digital input
HB_BOT = Switching signal BOT
21
GND
GND
CAN_H
RXD
TXD
CAN_H
CAN_L
12
CAN_H
11
CAN_L
24
CAN_L
25
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CAN_H
CAN_L
RXD
TXD
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The left side shows the equivalent circuit diagram of the driver board with ground connections. The right
side shows an application example for the controller side.
5.2.3
External Power Supply
Table 5—2 shows the required features of an appropriate external power supply for a SKiiP®4.
Table 5—2: Requirements to the auxiliary power supply
Power supply
The maximum ratings for the supply voltage are given in the
SKiiP®4 data sheet on page 1 (refer to symbol Vs). The
supply voltage is defined at the SKiiP®4 input, not at the
controller output (voltage drop on connection cable)
Maximum rise time of 24V
<2 s
Rated current
1,5 times of the maximum driver input current
Minimum peak current
2 times of the maximum driver input current
(At least 1,5A)
Please note: Do not apply switching signals during power up.
The external power supply may not be turned-off for a short time as consequence of its current limitation.
Its output characteristic needs to be considered. Power supplies with fold-back characteristic or hiccupmode can create problems if insufficient over current margin is available. The voltage has to rise
continuously and without any plateau formation.
In order to ensure continuous operation and to have some margin in case of overload it is recommended to
choose the rated current of the external power supply higher than the maximum driver input current (see
symbol Is on page 2 of the corresponding SKiiP®4 datasheet).
If the power supply is able to provide a higher current, a peak current will flow in the first instant to charge
up the input capacitances on the driver. The peak current value will be limited only by the external power
supply and the effective impedances (e.g. distribution lines). It is recommended to avoid the paralleling of
several customer side external power supply units. Their different current limitations may lead to drops in
the supply voltage.
The formula given in the SKiiP®4 datasheet for calculating the supply current IS (page 2) consists of three
parts:
•
The first part is the current consumption of the driver during Standby. No switching signals are
applied. Consequently, no AC-current flows. Example below is given for SKiiP2414GB17E4
(ISO=260mA).
•
The second part is the required current consumption of the driver during switching.
•
The third part is the current consumption required by the integrated current sensor to compensate
the present value of the AC-current.
I s = 260mA + k1 ⋅ f sw + k2 ⋅ I AC
Current consumption of integrated current sensor
Current consumption of driver during switching
Standby current consumption of the
driver
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5.2.4
Switching Signal Inputs
The switching signal inputs HB_TOP for the TOP IGBT and HB_BOT for the BOT IGBT have a digital positive
/ active high logic (input HIGH = IGBT on; input LOW = IGBT off) characteristic.
For driving the inputs HB_TOP and HB_BOT it is mandatory to use line drivers with a push-pull
characteristic. Pull up and open collector output stages must not be used for driving these inputs. It is
recommended to choose the line drivers (e.g. IXDD604) according to the length of the signal wires.
Please note: A non-connected input will be considered as LOW signal.
Figure 5.5: TOP/BOT PWM Signal Input
A 1nF capacitor is connected to the
switching signal input to obtain high
noise immunity. This capacitor can
cause a delay of few ns for current
limited line drivers, which can be
neglected.
Input resistance is about 13kOhm
As shown in Figure 5.7. the switching signal will be considered as:
• High when > VIT+
• Low when < VITFigure 5.6: Threshold level for HB_TOP and HB_BOT
The threshold values VIT+ and VIT- are given in the SKiiP®4 datasheet on page 2.
VIT+: Minimum threshold that guarantees that input is recognized to switch on the IGBT.
VIT-: Maximum threshold that guarantees that input is recognized to switch off the IGBT.
All threshold values are related to the supply voltage Vs.
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5.2.5
Analogue Output Signals
The schematic in the Figure 5.7 shows the analogue output circuit of the gate driver.
This circuit is part of:
• Measurement of AC-current
• Measurement of DC-link voltage
• Measurement of DCB-sensor temperature
Figure 5.7: Schematics analogue output signals
Rf
Cf
332R
GND
100pF
100pF
GND
A resistor avoids damages caused by a temporary short circuit at the analogue output.
Please ensure that the maximum current, driven by the output operational amplifier does not
exceed 5mA.
A common mode choke and 100pF capacitors are used on the outputs to obtain high noise immunity.
On the user controller board a differential amplifier should be used which is connected to the analogue
output and the corresponding ground signals (CMN_TEMP_GND, CMN_DCL_GND, HB_I_GND). This ensures
accurate measurement of the analogue signals because there is no voltage drop on the analogue ground
wires due to the high input impedance of the differential amplifier (refer to Figure 5.13).
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A description for an equivalent analogue input circuit on the user controller board is given in Figure 5.8.
Figure 5.8: Application Example – Symmetric Wired differential Amplifier. Terminal
description HB_I and HB_I_GND for current measurement
The recommended values below have to be checked in the application.
•
The equivalent input capacitance should not be higher than 1nF for current measurement and 10nF for
temperature and voltage measurement to achieve stable operation of the amplifier circuit on the
SKiiP®4 board. Its signal response has to be checked in combination with the used signal cable.
•
C1 leaks differential and common mode high-frequency interference currents. This capacitor reduces the
bandwidth of the analogue signal. This can lead to regulation problems like AC current harmonics.
Depending on application PE should be connected to an appropriate ground, e.g. chassis ground.
•
Common Mode Choke L1 is used for filtering of common mode currents. The current-compensated ring
core choke with ferrite core and rating 51µH/0,5A is recommended.
•
Resistor (R1). The interference sensitivity of the overall circuit (user control, driver) is reduced by a
continuous current flow through this resistor. Recommended value: 10kOhm
Please note: Capacitors should not be used in parallel to the feedback resistor (R3) and also to the
resistor of the non-inverting input to ground (R3). These capacitors have often high tolerances, so the
common-mode rejection of the circuitry is reduced by this effect. There should be no capacitor between
the plus- and the minus-pin of the operational amplifier as well. This additional corner frequency can
lead to an oscillating signal.
•
The input resistor (R2) should be splitted up and installed between the clamping-diodes. The current in
the diodes is limited by this resistor. A diode with a low reverse current should be selected e.g. BAV99.
•
To achieve a good noise performance a low-impedance feedback-resistor should be used (R3).
Recommended value: 25kOhm.
•
A low pass filtering should be implemented to avoid remaining differential interferences. It can be
realized by a simple R-C network (R4, C4) at the end of operational amplifier. The corner frequency of
the filter should be adjusted with the behaviour of the operational amplifier used and the necessary
bandwidth of the analogue signal (Temp/DC-Link/Current).
•
If not using Rail-to-Rail amplifier, it is recommended to connect the pin -VCC to negative voltage
instead of ground in order to use the complete voltage range of the amplifier, especially close to 0V. The
possible negative output voltage of the amplifier has to be considered for designing the following circuit.
•
AGND should be connected to the ground of the analogue signal processing at the user controller board.
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5.2.6
HALT Logic Signal
Characteristics and functionality:
• enables and disables the Gate driver
• dominant/recessive (settable and readable by driver and user controller board)
• low active (LOW = IGBT driver disabled, HIGH = IGBT driver enabled)
• digital signal referred to the driver supply voltage VS
The driver will set the HALT signal to LOW state:
• during power on reset,
• when an error status is active (refer to chapter 5.3.7).
The driver release the HALT signal (recessive HIGH state):
• after power-on reset time has elapsed and no error is present and both TOP/BOT signals are LOW
• after error reset time has elapsed and no error is present and both signal inputs TOP/BOT are LOW
The HALT signals of all SKiiPs in one application can be connected together. Also other hardware
components can be connected to this signal, when an open drain/collector output is implemented. In this
case all signals that are connected to the HALT signal are wired-ored. That means the HALT signal is set to
LOW state when one of the connected SKiiPs is not ready to operate.
Please note: There is no possibility to see which SKiiP®4 set the HALT signal. For this purpose the
CAN-diagnostic interface should be used
This parallel connection of HALT signals offers a fast disabling of IGBT switching in case of an error or
power up of paralleled components. Operation can only start when all components are ready to operate.
The HALT signals of all SKiiPs in the application can also be connected to the controller separately as shown
in Figure 5.9. The circuit on the driver board is shown on the left hand side. The gate driver can be set into
HALT state by setting the CMN_HALT signal to GND at the user controller board.
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The HALT signal is pulled to GND by a transistor. Pull up resistors are connected on each driver board and
on the user controller board. In order to keep the current low when several SKiiP units are connected in
parallel the pull up resistor on the driver board is relatively high (51,1kOhm). The pull up resistor on the
user controller board should be at least 1kOhm. The delay of the HALT signal due to the capacitors on
driver board (10nF) must be considered.
Figure 5.9: Application example of the HALT signal for separate connected SKiiP®4 systems
Please note: If HALT signal is not used it must be connected to the Vs according to the Figure 5.16
(not used digital signals).
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5.2.7
CMN_GPIO1 signal
The CMN_GPIO1 signal is available at Pin 18 of the SKiFace interface.
The CMN_GPIO1 signal is the inverted HALT signal (
) that can be used as error output signal of the
SKiiP®4 (in case of activated FRT-function please refer to chapter 7.7 for further information).
Please note: As the CMN_GPIO1 signal is the inverted HALT signal, there is no possibility to see which
SKiiP®4 has set the error output signal. For this purpose the CAN-diagnostic interface should be used
Figure 5.10 depicts:
• on the left hand side the output stage of the CMN_GPIO1 signal
• on the right hand side an example of the input stage on the user controller board for each
CMN_GPIO1 output of several SKiiP®4
Figure 5.10: Application example of the CMN_GPIO1 (inverted HALT signal) as error output
signal
External
Power Supply
User Controller Board
VS
Driver Board 1
VS
PWR_VS
51.1k
send HALT signal and
stopp all devices
Vcc µC
1 … 5k
1k
from µC
10n
30V
10k
1k
20k
CMN_GPIO1
to µC
(Pin 18)
909Ω
12.1k
24.3k
CMN_GND
VS
Driver Board n
VS
Vcc µC
51.1k
from µC
send HALT signal and
stopp all devices
1 … 5k
CMN_GPIO1
1k
10n
30V
10k
1k
20k
to µC
(Pin 18)
909Ω
12.1k
24.3k
CMN_GND
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5.2.8
CAN-Interface
The CAN-Interface offers the possibility to read out exact error time, kind and source of the error. In
addition to this, the CAN-interface can be used for activation/deactivation of some optional features of
SKiiP®4, for example FRT-function (see Chapter 7.7) or DC-Link trip level deactivation.
Please note: By deactivating supervision of VDCtrip the max value ratings from the corresponding SKiiP4
data sheet must be strictly observed by user. The violation of these limits can lead to the threat to life
or physical condition, as well as to damage of the SKiiP.
The CAN-Interface is available at the Pins 11 and 12 (CAN_H) and at the Pins 24 and 25 (CAN_L) as shown
in Figure 5.11.
Figure 5.11: CAN-Interface
If several SKiiP®4 units are used: the CAN-application example as shown in Figure 5.12 is recommended.
Figure 5.12: CAN – application example for several SKiiP
For a detailed description of the SKiiP4 CAN interface please refer to the documents
• Diagnostic Interface SKiiP4 – CANopen User Manual
• Diagnostic Interface SKiiP4 – CANopen Object Dictionary
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5.2.9
Ground connection
®
SKiiP 4 interface has power grounds, digital grounds and
analogue grounds. The power ground and digital grounds are
used for power supply and reference of digital signals,
respectively. The analogue ground is used for accurate
measuring of analogue signals. All grounds are physically
connected to each other on the Gate Driver board. It is
allowed to short-circuit all ground potentials in exception of
the analogue grounds on the user controller board.
These analogue grounds should be used for differential
amplifier input on the controller board to ensure accurate
measurement (refer to Figure 5.13).
Figure 5.13: Prevention of ground loops due to
differential amplifier
Table 5—3: Ground connections of
SKiiP®4
Function
Signal
Power ground and
digital grounds
PWR_GND
CMN_GND
HB_GND
Analogue ground
CMN_TEMP_GND
CMN_DCL_GND
HB_I_GND
5.2.10 Shield and protective earth/chassis connection
The shield of the D-Sub connector is connected to GND at the Gate Driver board. There is no connection at
the Gate Driver board to heat sink nor other protective earth connections. On the user controller board the
shield should be connected to chassis which is protective earth in insulation class 1 systems. This single
ended grounding is effective against capacitive coupling e.g. from neighbouring conductors since the
grounded shield forms the opposite pole of the parasitic capacitance. The interference current flows away
via the shield. The GND of the user controller board can be connected to protective earth/chassis either
directly or via a capacitor. This connection should be low inductive (e.g. metal bolts from PCB to chassis)
and located close to the D-Sub connector. Further each signal output and input should have a capacitor to
chassis. These measures are for bypassing burst signals.
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Figure 5.14: Ground and shield connection. Principle schematics for Ground and shield
connection. Principle schematics for switching signal inputs
Figure 5.15: Ground and shield connection. Principle schematics for analogue output signal
(Example: Temperature output)
5.2.11 Reserved or not used signals
Not used pins for digital signals (CMN_GPIO1, CMN_GPIO2) at the user controller board should be
connected to VS by 51kOhm resistor in series to a diode as shown in Figure 5.16.
The diode prevents supplying of the controller by the driver board when the controller is not supplied. Also
a capacitor should be connected to GND to shorten burst signals.
For the CAN interface it is recommended to short the CAN open signals by 121 Ohm resistor, if the CAN
interface will not be used.
Not used analogue signals should be connected to GND by a 10kOhm resistor.
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Figure 5.16: Connection of reserved and not used signals at the user controller board
5.3
5.3.1
Gate driver board
Overview
The SKiiP®4 gate driver board includes following functions:
• Digital signal transmission (refer to chapter 5.3.2)
• Power-on Reset (refer to chapter 5.3.3)
• Dead time generation (refer to chapter 5.3.4)
• Short pulse suppression (refer to chapter 5.3.5)
• IntelliOff switching (refer to chapter 5.3.6)
• Failure management (refer to chapter 5.3.7)
The driver is based on digital signal processing, which provides individual control parameter settings and
the transmission of galvanic insulated sensor signals. The digital signal processing ensures high noise
rejection. IGBT overvoltages, especially those that occur in high-current turn-off conditions, are reduced by
the gate driver by means of intelligent turn-off control.
The gate voltages are +15V for turn on and -8V for turn off.
5.3.2
Digital signal transmission
The driver board has two independent signal channels from low voltage to high voltage sides for
transferring of switching and sensor signals. The signals are transferred by pulse transformers which are
designed for reinforced isolation. The signals are differential signals. This ensures:
• No temperature and aging effects
• Galvanic Isolation between low (primary) and high voltage (secondary) side inclusive temperature
and DC-Link voltage feedback
• High noise immunity
5.3.3
Power-On-Reset
The Power-On-Reset time is defined as tPOR in the SKiiP®4 data sheet.
The driver board processes a Power-On-Reset after turning on the supply voltage. During tPOR the HALT
signal is set to LOW. Without any error present, the HALT signal will be released (recessive HIGH-State)
after the Power-On-Reset is completed.
Please note: To assure a high level of system safety the TOP and BOT signal inputs must stay in LOW
stat during driver turn-on time. After the end of the power on reset, IGBT operation is permitted. The
driver will stay in error mode if switching signals are applied during power on as long as both switching
signals are not LOW (see Figure 5.17).
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Figure 5.17: Power-On-Reset timing diagramm
5.3.4
Interlock Dead Time Generation
The interlock dead time is defined as tTD in the SKiiP®4 data sheet.
The dead time circuit prevents, that TOP and BOT IGBT of one half bridge are switched on at the same
time.
It is allowed to control the SKiiP®4 by inverted pulses that means without controller dead time.
tTD is not added to a dead time given by the controller (see Figure 5.18).
5.3.5
Short pulse suppression
The short pulse suppression time is defined as tSIS in the SKiiP®4 data sheet.
This function suppresses short turn-on and off-pulses at the pins HB_TOP and HB_BOT of the SKiFace
interface. In this way the IGBTs are protected against noise which can occur due to bursts on the signal
lines. If a pulse is shorter than tSIS, it will be suppressed, the other channel remains on. No error will be
indicated.
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Figure 5.18: Short pulse suppression
5.3.6
IntelliOff
The SKiiP®4 has two different gate turn-off paths. Both paths distinguish in the gate resistor value. The
corresponding gate turn-off path will be chosen according to the actual measured AC current value. As
shown in Figure 5.19, there are two different switch off scenarios:
Figure 5.19 : Switch-off scenarios
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SKiiP®4 types with integrated IntelliOff function are listed in Table 5—4
= not implemented,
= implemented
Table 5—4: IntelliOff functionality
3GB
4GB
6GB
SKiiP voltage class
SKiiPxxxxGB12 (1200V)
SKiiPxxxxGB17 (1700V)
*
®
* IntelliOff only available for 3GB SKiiP 4 with part Nr. 20602xxx
In the IntelliOff mode the IGBT is switched-off by using higher gate resistors compared to hard switch-off.
Table 5—5: Power losses due to IntelliOff
3GB
4GB
6GB
Please note: When operating two or more SKiiP®4 modules in parallel connection, use GPIO2 port to
synchronize IntelliOff mode for equal current sharing when IntelliOff is activated.
The GPIO2 ports of all parallel operating SKiiP®4 modules have to be interconnected.
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5.3.7
Failure Management
A failure caused by
• Undervoltage primary side (refer to chapter 0)
• Exceeding maximum switching frequency (refer to chapter 5.3.7.3)
• Overlapping of TOP/BOT switching signals (refer to chapter 5.3.7.4)
• Internal bridge short circuit (refer to chapter 5.3.7.5)
• Exceeding maximum DCB-sensor/driver temperature
• DC-link overvoltage
• Load overcurrent (OCP)
• Internal driver error
will set the HALT signal to LOW state (not ready to operate) as long as the error is pending, or at least for
the “error memory reset time”, tpRESET (refer to SKiiP®4 data sheet, page 2). The IGBTs will be switched off
and switching pulses from the controller won´t be transferred to the output stage. During this time the
driver will check if the switching input signals HB_TOP and HB_BOT are set to LOW. If this is the case and
no error is present anymore the driver will release the HALT signal. If the input signals have not been
switched to LOW state the driver will pull the HALT signal to LOW (dominate) as long as the switching input
signals HB_TOP and HB_BOT are not LOW. So in case of error the switching input signals HB_TOP and
HB_BOT should be set to LOW within the error memory reset time tpRESET and not be activated before the
HALT signal is in HIGH state again (see Figure 5.22).
Please note: DC-link overvoltage monitoring is disabled at 1500V Photovoltaic SKiiP®4 Systems
5.3.7.1
Error delay time, td(err)
The error delay time is the propagation delay time of an error. This time is different for the different types
of errors. The exact values for the certain error types can be found in the Table 5—6
Table 5—6: Error delay time
*
Type of error
Typical values
DC-Link overvoltage
160 µs
Overcurrent protection (OCP-error)
2 µs
Short circuit protection (SCP) by Vcesat monitoring
3 µs
DCB-sensor over-temperature
6 ms*
Exceeding maximum switching frequency
6 µs
35ms for SKiiP®4 with part nr. 20601xxx
5.3.7.2
Under Voltage Protection (UVP) supply voltage
The Gate Driver board is equipped with a UVP of the supply voltage. The UVP of the primary side monitors
the supply voltage Vs. Table 5—7 summarizes the trip level.
Table 5—7: Signal characteristics of Under Voltage Protection primary side
Signal Characteristics
Typical values
Undervoltage protection trip level
18,0V
Threshold level for reset after failure event
18,5V
If the supply voltage of the driver board falls below the trip level, the IGBTs will be turned off. The
switching input signals HB_TOP and HB_BOT will be ignored and the status signal HALT is set to LOW state.
The system restarts after the error memory reset time tpRESET (refer to SKiiP®4 data sheet, page 2)., if the
supply voltage exceeds the threshold level for reset after failure event and if the switching input signals
HB_TOP and HB_BOT are set to LOW.
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5.3.7.3
Exceeding maximum switching frequency
The maximum switching frequency is defined as fsw in the SKiiP®4 data sheet.
In order to prevent the module against overheating, the switching signal inputs HB_TOP and HB_BOT are
monitored with respect to oscillations. The error latch will be set if the switching frequency is higher than
twice the corresponding fsw.
Figure 5.20 illustrates the frequency ranges.
Figure 5.20: Switching frequency range
5.3.7.4
Overlapping of switching signals
It is not allowed, that TOP and BOT IGBT of a half bridge are switched on at the same time. Due to this, a
simultaneous turn-on command for TOP and BOT at the customer interface cannot be transferred to the
IGBTs. This case is an overlapping condition of the input signals. The overlapping condition is tolerated for
3µs.After the overlapping ended and the interlock time is over the opposite IGBT will be switched on. The
timing diagram of the error processing in case the overlapping duration is shorter than 3µs, is shown in the
Figure 5.21.
Figure 5.21: Timing diagram for the TOP/BOT overlapping error processing (t<3µs)
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If the overlapping time is longer than 3µs both IGBT’s are switched off and the HALT-signal is activated to
indicate an error condition. This is shown in the Figure 5.22.
Please note: Before continuing with switching both switching input signals HB_TOP and HB_BOT must
be set to LOW.
Figure 5.22: Timing diagram for the HB_TOP/HB_BOT overlapping error processing (t>3µs)
5.3.7.5
Short Circuit Protection (SCP)
The SCP circuit is responsible for short circuit sensing. It monitors the collector-emitter voltage VCE of the
IGBT during on-state. In case of a short circuit the IGBTs are switched off and an error is indicated.
The threshold voltage (VCEstat) and the blanking time (tbl) are given in the SKiiP®4 data sheet.
Figure 5.23: No short circuit
Figure 5.24: Short circuit
during operation
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Figure 5.25: Short circuit
during turn on
Page 36/65
After the blanking time has expired, the de-saturation protection will be triggered as soon as VCE > VCEstat
and will lead to an soft turn off of the IGBT (high turn off resistor). The HALT signal will be set to LOW and
an error is indicated.
5.3.8
5.3.8.1
Analogue signals / sensor functionality
Load-current sensor
Each half bridge module (refer to Figure 2. 1) has an integrated load-current sensor. The measured current
is normalized to a corresponding voltage at the SKiFace interface (see Table 5—1).
Table 5—8: Signal characteristic of current measurement
Signal Characteristics per SKiiP®4
Value
3-fold
4-fold
6-fold
Analogue minimum current trip level ITRIPSC HB_I = 10V
2700A
3600A
5400A
Typical ratio of current analog value [mv/A]
3,70
2,78
1,85
Accuracy of analogue signal @ ITRIPSC over full temperature range
±3%
Small signal bandwidth, f0Iana
50 kHz
Figure 5.26: Characteristic between current and the voltage at HB_I, SKiiP®4 3-fold
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Figure 5.27: Characteristic between current and the voltage at HB_I, SKiiP®4 4-fold
Figure 5.28: Characteristic between current and the voltage at HB_I, SKiiP®4 6-fold
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The value f0Iana given in the Table 5—8 is marked in Figure 5.29. At this frequency the amplitude is still not
significantly damped.
Figure 5.29: Bode diagram of the AC-current measurement at the SKiiP4 interface
Current sensor working principle
The current transformers work according to the compensation principle. The magnetic field caused by the
load current is detected by a magnetic field sensor. This is a small coil with a high permeable core. Due to
the properties of this sensing element there is low gain and linearity failure. An electronic circuit evaluates
the value of the field sensor and feeds a current into the compensation coil to keep the effective magnetic
field at zero. The demanded compensation current measured by a burden resistor. An measurement circuit
generates a voltage that is proportional to the load current. The SKiiP®4 current sensor uses a switch mode
controller for the compensation current. Figure 5.30 illustrates the compensation principle with the current
sensor of SKiiP®4.
Figure 5.30: Compensation principle of SKiiP®4 current sensor
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5.3.8.2
Integrated DCB-temperature sensor
The integrated DCB-temperature sensor is a chip resistor with NTC characteristic. The sensor is placed on
the copper trace of the BOT IGBT (collector potential) which ensures that the measured temperature is
close to the chip. The measurement circuit which is realized on the secondary side of the driver board
generates an equivalent voltage which is digitized, transmitted to the primary side via a transformer for
galvanic isolation and converted into an analogue signal on primary side. The analogue temperature signal
is available on the SKiFace interface (see Table 5—1) with characteristic given below:
Table 5—9: Characteristics of the DCB-temperature sensor circuit
Temperature signal characteristics
Value
Trip level Ttrip
135°C
Minimum measurable temperature TMIN
+30°C
Analogue temperature signal CMN_TEMP @ 150°C
10V
Analogue temperature signal CMN_TEMP @ 30°C
0V
Accuracy of analogue signal @ Ttrip
±5%
Bandwidth, f0Tana
5Hz (-3dB)
Threshold level for reset after failure event
90°C
Figure 5.31: Characteristic between DCB-sensor temperature and the voltage at CMN_TEMP
In case of over temperature the HALT signal will be set to LOW and an error is indicated. If the DCBtemperature is lower than 90°C again and if the switching input signals HB_TOP and HB_BOT are set to
LOW the HALT signal will be released (recessive HIGH state).
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5.3.8.3
DC-Link-Voltage Sensing
The DC-link-voltage (VDC) is sensed on the secondary side of the driver board between DC plus and DC
minus terminal. After digitizing and transmitting the measured value to the primary side via a transformer
for galvanic isolation, the digital value is converted back to an analogue signal on primary. The analogue
DC-link voltage signal is available on the SKiFace interface (see Table 5—1) with the characteristic given in
Table 5—10. This principle of the galvanic isolation has the advantage - in comparison to a measurement
with high impedance resistor chain - that the primary to secondary leakage current does not increase with
the number of the used SKiiPs due to the parallel connection of resistor chains.
Table 5—10: VDC characteristics
VDC signal characteristics
1200V System
1700V System
1500V PV
Analogue DC-link voltage signal CMN_DCL @
900VDC
9V
6,75V
6,3V
9V
8,4V
7,5mV/V
7mV/V
Analogue DC-link voltage signal CMN_DCL @
1200VDC
Voltage ratio
10mV/V
Accuracy of analogue signal @ VDCTrip over full
temperature range
Phase shift, f0Uana
±3%
1,8kHz
The characteristic between the DC-Link voltage and the signal on CMN_DCL for 1200V and 1700V SKiiP®4
systems can be found in the Figure 5.32 and Figure 5.33 corresponding.
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Figure 5.32: DC link voltage sensor output 1200V system
Figure 5.33: DC-link voltage sensor output 1700V system
The value f0Uana =1,8kHz is marked in Figure 5.34.
Please note: SKiiP®4 for 1500V photovoltaic application has no trip level for DC-link overvoltage. User
must take care for DC-link voltage in application.
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Figure 5.34: Bode diagram of the DC-link voltage measurement at the SKiiP4 interface
6.
Power terminals
The power terminals of the SKiiP®4 are robust against external forces which may be caused by the
connection of the DC-link and load cables. Nevertheless, the SKiiP module is NOT MEANT to support the DC
link. The mechanical support must also be provided for the AC connection (e.g. inductor or motor cables) in
order to protect the power terminals from mechanical forces and vibration stress. The maximum forces that
must not be exceeded are given in Table 6—1
Table 6—1: Maximum allowable
forces to terminals
Force
F+x/ F-x
Maximum allowed force
[N]
300
F+y/ F-y
300
F+z/
200
F-z
500
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Figure 6.1: Maximum forces at the main terminals
DC-Terminals
AC-Terminal
F+Z
F+Z
F-y
F-y
F+x
F+y
F+
F+y
F-Z
F-Z
The following should be considered in the design process:
•
DC connection:
• Mechanical tolerances, especially when larger DC-links are used which are connected on more than
one SKiiP
•
Thermal expansion:
• The DC-link is heated up under load and expands. This causes mechanical forces on the terminals.
•
Stiffness of terminals for DC connection:
• The connections should be soft in order to minimize the mechanical forces. This can be realized e.g.
by using of tempered copper.
•
Terminal hole diameter:
• Should be large enough that the screw fits through the hole into the SKiiP connection.
•
Dimensions of the DC connections:
• Considering the heating and isolation. The terminals must not heat up snubber capacitors.
•
Symmetrical layout of DC connection
• The inductance between the terminals and the DC-link capacitor should be equal for a symmetrical
current sharing between the half bridges
AC connection:
•
Symmetrical AC connections for symmetrical current sharing between the paralleled half bridge
modules. The load cable should be connected in the middle of the AC terminal and have equal distance
to the each half bridge module.
•
Connect a plate (e.g. copper) on all AC terminals of one SKiiP
•
Cables can be connected on the same plate but it has to make sure that the cables do not apply force
on the terminals (pull or push). Therefore flexible cables with stress relief should be used.
•
The plate should be fixed by fixing poles. These poles shall be mounted directly on to the heat sink or a
fixed frame construction and placed close to the SKiiP device.
The design has to be as depicted in Figure 6.2
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Figure 6.2: AC connection
Please note: All screws of the AC terminals must be tightened uniformly
(not one screw completely fixed before the others) to avoid the warping.
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7.
7.1
Application hints
Verification of design
Measurements and calculations have to be carried out to be sure that the design works reliable. The
following points have to be considered:
• Maximum blocking voltage VCES/VRRM must not be exceeded in any case (normal conditions, short
circuit)
• Ripple current of snubber capacitors
• Current sharing between paralleled half bridge modules
• Recommended IGBT and diode junction temperatures must not be exceeded also considering
overload conditions
• Environmental temperatures which affects the lifetime of the electronics
• Load and temperature cycles which affect the lifetime of the power part
• Environmental conditions during operation, transport and storage
• EMC design
• Mechanical design
Besides these general points application specific conditions and requirements may be considered too.
7.2
Safe Operating Area for SKiiP®4
The Safe Operating Area for different SKiiP®4 systems is shown in the Figure 7.1. Please refer to the
corresponding data sheets for VDCtrip and ITripSC values for concrete SKiiP®4 types.
Figure 7.1: Safe Operating Area for standard SKiiP®4
Please note: The curves for Safe Operating Area (SOA) of 1500V photovoltaic SKiiP®4 Systems are
shown in the relevant data sheet.
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7.3
Maximum blocking voltage and snubber capacitors
The maximum blocking voltage VCES/VRRM which is given in the SKiiP®4 datasheet must not be exceeded. It
must also be considered that IGBT switches faster if the junction temperature is low. The first
countermeasure is a low inductive DC-link design to keep the overvoltage on the semiconductor low. In
addition, snubber capacitors are recommended, which should be mounted directly on the DC-link terminals
of each half bridge module. Application note AN-7006 “Peak voltage measurement and snubber capacitor
specification” provides information how to perform the tests and to select the snubber capacitors. The
following snubber capacitors have been designed for SKiiP®4. But nevertheless it has to be validated by
testing that the capacitors are compatible with the design and will not be overloaded.
Table 7—1: Snubber capacitors for
SKiiP®4
Capacitance / DC
voltage
For use with
680 nF / 1000V
1200V device
330 nF / 1600V
1700V device
7.4
Definition of Thermal Resistance
The definition of the thermal resistances given in the SKiiP®4 datasheet are shown in the Figure 7.2
Figure 7.2: Definition of thermal resistances
Tj
junction temperature of the hottest chip
Tsensor DCB-sensor temperature
Tsink
heat sink temperature in a drill hole 2mm underneath the chip
Ta
ambient temperature (coolant air or liquid)
Rth(j-r) thermal resistance between junction and reference
Rth(j-s) thermal resistance between junction and heat sink
Rth(s-a) thermal resistance between heat sink and ambient
Rth(r-a) thermal resistance between reference and ambient
Plosses Power losses of the chip
In general, the thermal resistance between two points 1 and 2 is defined according to following equation:
Rth (1− 2 ) =
T − T2
∆T
= 1
Plosses
Plosses
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The data sheet values for the thermal resistance are based on measured values. The point of the
temperature measurement has a major influence on the thermal resistance because of a temperature
profile between the different chip positions and across the heatsink surface.
The reference points for SKiiP®4 systems are: virtual junction temperature of the hottest chip (Tj); heat
sink temperature underneath the hottest chip (Tsink) and DCB-sensor temperature (Tsensor). A principle
sketch with the positions is shown in Figure 7.1. The values for Rth(j-s), Rth(s-a) and Rth(j-r) are calculated from
these temperatures. SKiiP modules have no base plate, therefore the case temperature TC can not be
measured without disturbance of the thermal system and the thermal resistance Rth(j-c) cannot be given.
TSink is measured in a drill hole 2mm underneath the heatsink surface. The 2 mm distance guaranties a low
disturbance of the thermal path and a minimum effect of heat sink parameters like size, thermal
conductivity, cooling medium etc.
The temperature sensor is located between IGBT and diode chips on the same DBC copper layer at high
voltage potential. This ensures an excellent thermal coupling between both power semiconductors and
sensor and furthermore a short reaction time on changes in power dissipation.
Only one of the temperature sensors is monitored by the Gate driver. The monitored sensor is in the
middle of the SKiiP (refer to Figure 7.3). The protection level is matched to the maximum operation
temperature of the power semiconductors.
During operation there will be a temperature profile along the heatsink from cool at the inlet of the coolant
to warm at the outlet.
Figure 7.3: Sensor position in SKiiP®4 GB (6fold, 4fold, 3fold) with proposed cooling (water
inlet) direction
1
2
AC AC
3
4
AC AC
5
6
1
2
AC
AC
AC
AC
DC DC DC DC DC DC
4
1
2
3
AC AC
AC
AC
AC
3
DC DC DC DC
DC DC DC
SKiiP
SKiiP
SKiiP
SKiiP®4 are equipped with high performance heat sinks. The data sheets contain transient thermal data
referenced to the built-in temperature sensor. This allows the calculation of junction temperature Tj, if the
generated losses are known. The thermal resistances given in the data sheets represent worst case values.
Evaluation of thermal impedance:
• • Junction to sensor
Ƭ
Zth(j-r) =Ʃ Rth(j-r)n * (1-e -t/ n), n=1,2,3,….
• • Sensor to ambient
Ƭ
• • Zth(r-a) =Ʃ Rth(r-a)n * (1-e -t/ n), n=1,2,3,….
Please note: The values for transient thermal impedance given in the data sheets (Zth(j-r)) are only
valid together with the SEMIKRON standard heat sinks and under conditions given in the data sheets.
The usage of these values for other heat sinks/conditions might cause deviations in calculation of
thermal resistance!
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7.5
Isolation voltage test (IVT)
During production test the isolation voltage of 5600Vdc (1700V devices) or 4300Vdc (1200V devices), each
polarity, is applied to 100% of SKiiP-systems for 1s with test set up shown in Figure 7.4 These values are
also available in the corresponding datasheets.
Figure 7.4: Graphic presentation of the electrical connections by the IVT procedure
The polarity change (whereby heat sink is always grounded) is only possible if the customer uses a
galvanically isolated test control device. Otherwise the plus and minus pole of the isolation test control
device will be shorted.
Please note: Because of the safety measures during and after the test procedure the heat sink should
be grounded: if the DUT fails with an arcing and if the test control device recognizes it and disconnects
from the DUT, it is possible the DUT is still electrically charged. In this case it would be dangerous to
touch the DUT after the test procedure. In addition to this without grounding the test voltage could drift
and the voltage to ground will be even higher than the nominal test voltage.
All isolation voltage tests must be performed at an ambient temperature of 15…35°C, a relative humidity of
45…75% and an atmospheric pressure of 860…1060 hPa. The norms define no certain leakage current
value, thus the isolation test (dielectric test) is considered passed if no electrical breakdown has occurred,
i.e. small leakage currents that occur are irrelevant.
There are two forms of an isolation damage:
• Fully breakdown (according the norms)
• High leakage current (not according the norms!)
According to the corresponding norms it is required to do an IVT with AC voltage. Despite of this the IVT
with DC voltage is recommended because in case of AC IVT the high leakage currents lead to the uncertain
identification of the isolation problems.
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It is recommended to ramp up the isolation voltage with 10kV/s. Faster ramp up leads to capacitive
leakage currents and could cause the faulty activation of the isolation test control unit. Slower ramp up
leads to the longer testing time. The count of the test time 1s, specified in the data sheet, begins after
ramp up of the full isolation voltage. The isolation voltage could be switched off without a ramp down. After
finishing the test it must be checked that the DUT is not charged anymore.
Please note: The isolation test voltage should not be greater than necessary for the application and the
corresponding standards.
The isolation measurement is performed in two steps:
• high voltage isolation test
• repeated isolation test
The high-voltage isolation test and repeated test of an isolation barrier can degrade isolation capability due
to partial discharge. During the IVT since the isolation voltage is applied the partial discharge starts after
the voltage goes beyond the partial discharge inception voltage. The higher and the longer the voltage
value is applied, the stronger the damage of the isolation through the partial discharge will be. Thus each
IVT leads to the weakening of the isolation. The partial discharge in the DCB doesn’t lead to the weakening
of the isolation, because the ceramic is resistant to the partial discharge. First of all the organic materials
(plastic), e.g. circuit boards and compound of transducers, will be damaged.
Since every isolation test may cause premature damage to the module as a result of partial discharge, the
number of tests should be kept low. If they can not be avoided, however, a regeneration time of at least 10
minutes must be complied with between 2 tests and the repeated isolation voltage tests should be
performed with reduced voltage. The test voltage must be reduced by 20% for each repeated test.
Please note: The F-option must be removed during the IVT (mounting instruction on request). Then
the normal test procedure as above described should be done.
7.6
Current sharing between paralleled half bridge modules
When the IGBT is switched on the current is commutated over the paralleled IGBT half bridge modules.
The busbar design has to be symmetrical to make sure that the current sharing is equal. Unequal current
sharing can overload single
half bridge modules and leads to imbalance during switching off which can finally destroy the power
section.
Symmetrical AC and DC-link design leads to equal stray inductances between the half bridge modules
which ensures equal commutation and current sharing. Each half bridge module has to have the same stray
inductance to the DC-link capacitors.
The recommended AC connection is shown in Figure 7.13.The current sharing should be measured in the
design phase by “double pulse testing” (see AN-7006) and in the final design under real operation
conditions. This can be done e.g. by Rogowski current sensors which are located around the DC+ and DCterminals.
7.7
FRT (Fault Ride Through) - Function
A typical SKiiP®4-application is a converter for wind turbines. It is state of the art that turbines must fulfill
grid code requirements for the connection to the electric power system. Parts of this requirements are
known as Fault Ride Through (FRT) or Low Voltage Ride Through (LVRT).
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Figure 7.5: Graphic schematic of the wind mill
When doubly fed induction generators are used only the rotor current is controlled by the converter.
Figure 7.6: Graphic presentation of SKiiP®4 behaviour without FRT-function activated in case
of overcurrent
In case of an FRT or LVRT the rotor current can increase to levels higher than the overcurrent trip level of
the SKiiP (ITRIPSC) and the SKiiP will trip. Consequentially the PWM of the IGBTs (pwmSKiiP) is interrupted by
the SKiiP-driver itself regardless of whether the PWM from the customer controller (pwmcontroller) is running.
The SKiiP-driver sets the CMN_HALT-signal to LOW and the CMN_GPIO1-signal to HIGH. The interrupt of
the pwmSKiiP is released after the error memory reset time tpRESET has elapsed and if the switching input
signals HB_TOP and HB_BOT are set to LOW. In most cases tpRESET is too high to fulfill the grid code
requirements.
If the FRT-function is activated the error-handling of the SKiiP will be changed and the grid code
requirements can be fulfilled. In this case CMN_GPIO1 will not be the inverted CMN_HALT signal anymore.
An overcurrent trip will never set CMN_HALT to LOW and it is never stored in the SKiiP error memory.
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Figure 7.7: Graphic presentation of SKiiP®4 behaviour with FRT-function activated in case of
overcurrent
If the rotor current Irotor exceeds the level ITRIPSC the SKiiP-driver will interrupt the pwmSKiiP and will set the
signal CMN_GPIO1 to HIGH as long as ITRIPSC is exceeded. The pwmcontroller must be turned off. After a
period tpReset(OCP) of 200µs which starts after Irotor is below ITRIPSC and pwmcontroller is turned off, the SKiiP is
enabled to start switching as long as the overcurrent trip level is not exceeded again.
Figure 7.8: Graphic presentation of the driver processing in FRT-case
The freewheeling diodes conduct the rotor current Irotor during the period of blocked pwmSKiiP. The user
must take care that the diodes will not be overloaded thermally in this time or later on, because the SKiiP
overcurrent protection is deactivated and the thermal protection is not able to protect the diodes fast
enough. Thermal calculations or simulations are necessary to confirm that the SKiiP diodes will not be
overloaded.
The activation of FRT-Function could be easy made by customer via CAN-Bus interface. Please see the CAN
manual documentation for further details.
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7.8
Solar function
For effective operation of the SKiiP®4 during startup phase, a higher DC-link voltage trip level must be
available for low load currents in comparison to standard application. Special modification of the existing
SKiiP®4 1200V type was created to fulfill requirements of the solar market.
Please note: The solar function cannot be activated via CAN, special SKiiP®4 type must be ordered. It
is available for 1200V type SKiiP®4 systems.
The Safe Operating Area (SOA) diagram for SKiiP®4 solar is available in the Figure 7.9. Whereas the SOA
for standard SKiiP®4 (shown in the Figure 7.1) is limited by over voltage trip level VDCtrip and over current
trip level ITRIPSC , the SOA of Solar SKiiP®4 has an additional area above VDCtrip limited by the low load
current ILL and a higher over voltage trip level VDCtripLL. This operation mode is called “solar mode” and is
marked orange in the right diagram of Figure 7.9. Parameters ILL and VDCtripLL are given in the data sheets
SKiiP®4 Solar.
Figure 7.9: SOA for SKiiP®4 Solar
The operation modes for SKiiP®4 solar are listed in the Table 7—2.
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Table 7—2: Operation modes SKiiP®4 solar
Operation mode
DC-voltage
Load current
Processing
Standard mode
VDC < VDCtrip
ILoad < Itrip
Hard Switch-off
VDCtrip < VDC < VDCtripLL
ILoad < ILL
Solar mode
Switch off with IntelliOff
ILoad > Itrip
Switch off with
IntelliOff, over current
error indicated
VDCtrip < VDC < VDCtripLL
ILoad > ILL
Switch off with
IntelliOff, solar mode
error indicated if
previous mode was
solar mode
VDCtrip < VDC < VDCtripLL
ILoad > ILL
Switch off with
IntelliOff, over voltage
error indicated if
previous mode was
standard mode.
Error mode
VDC > VDCtripLL
Switch off with
IntelliOff, over voltage
error indicated
In case SKiiP®4 is in solar mode (see Table 7—2) and at DC-Link voltage VDC > VDCtrip the load current ILoad
exceeds ILL, the solar mode error will be indicated. In this case SKiiP®4 comes into error mode: the SKiiPdriver sets the CMN_HALT-signal to LOW and the CMN_GPIO1-signal to HIGH. The interrupt of the
operation mode is released after the error memory reset time tpRESET has elapsed and the switching input
signals HB_TOP and HB_BOT are set to LOW.
The solar mode error can be read out by means of CANopen diagnostic. In the case of this error, both error
bits 13 (over current) and 14 (DC-Link error) will be set. Please see the CANopen Object Dictionary Rev.6
chapter 3.8. “Error recording” for more details.
Snubber capacitors must be used to avoid the exceeding of the maximum blocking voltage VCES/VRRM which
is given in the SKiiP®4 datasheet. Please see the Chapter 7.5 for further information.
For safe operation the interlock time tTD is increased to the 4,5µs in the solar mode (See the diagram of
Figure 7.9).
Please note: The load must be connected symmetrically and the load inductivity must be not less than
6µH.
The deactivation or change of the DC-Link trip level via CAN is not possible for SKiiP4 Solar.
The activation of FRT-Function via CAN is possible (Please see CANopen Object Dictionary Rev.6).
7.9
Recommended temperature rating
Please note: The compliance of temperature characteristics recommended in this chapter are
extremely important for the SKiiP®4 reliability and therefore for the long life time of the product.
The failure rate describes the probability of a failure within a certain time. Usually, the failure rate follows
the so-called bathtub curve, shown in Figure 7.10: high in the beginning (failures known as early failures),
then dropping to a low and more or less constant value (the random failures) before it rises again as wearout begins to set in and end-of-life failures set a limit to the useful life of a component.
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Figure 7.10: Probability of a failure during operation time.
The evaluation of the failure rate for different temperatures shows that its expected failure rate roughly
doubles for a 20 C increase in operating temperature (see Figure 7.11).
Figure 7.11: SKiiP driver failure rate temperature dependence calculated according to
SN29500
The less stress a device is subjected to, the less likely it is to fail. Low operation time, low current, low
temperature and low dc-link voltage prolong its life and reduce the failure rate. Therefore, the design has
to find a working compromise between exhausting a device to maximum capacity and obtaining an
acceptable failure rate and life time.
The following temperature rating is recommended for the SKiiP4 systems:
•
Power section: It is necessary to make sure by calculations and measurements that the recommended
IGBT and diode junction temperatures are not exceeded also considering overload conditions. The
recommended maximum junction temperatures are 150°C which is 25°C lower than the maximum
temperature of 175°C. That is to ensure the reliable operation. Calculations can be carried out by the
SEMIKRON simulation tool SEMISEL which is available on the SEMIKRON homepage www.semikron.com.
Load cycles and cooling conditions can be adapted to meet the application conditions. Measurement of
the DCB-sensor temperature (available on the driver connector as analogue voltage signal) has to be
carried out to check that the system works as calculated.
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•
Gate driver: Although it is fit for operation at Ta = 85°C, it is recommended that the average ambient
temperature for the driver board does not exceed 40°C for extended periods of time. For achieving the
lower driver temperature the additional air forced cooling for the driver might be necessary. The current
Tdriver in the application could be measured by means of temperature sensor situated on the bottom side
of the driver PCB (see Figure 7.12). The value of the sensor could be read out via CAN-bus interface
(please refer to the CAN documentation for the further information). If the temperature will exceed the
TDriver Trip that is given in the SKiiP®4 data sheet the switching will be blocked and an error signal will be
indicated. The default values for the TDriver Trip are given in the Table 7—3: Default values for the TDriver
TripTable 7—3.
Table 7—3: Default values for the TDriver Trip
TDriver Trip
Min. Value
Typ. Value
Max. Value
113
115
124
If necessary the Trip level of the temperature sensor can be adjusted to the lower level via CAN-bus
interface.
Figure 7.12: Position of the driver temperature sensor SKiiP4
7.10 Paralleling of SKiiP®4
For parallel operation the following features are necessary to realize:
• Common error management for all paralleled SKiiP®4 can be realized using the HALT signal
• Monitoring of analog signals, e.g. temperature or current
• one power supply should be used for all subsystems
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By using paralleled SKiiPs it has to be made sure that no SKiiP will be overloaded. To ensure this
inhomogeneous current has to be limited. This inhomogeneous current is caused by different output
voltages of the paralleled inverters which could be a consequence of:
• different propagation time of driver boards
• different switching times of power semiconductors
• tolerance of forward voltage drop of IGBT or diodes
• different DC link voltage levels
• different cooling conditions of paralleled half bridges (e.g. in air cooled applications with thermal
stacking)
• different external impedance
The low inductive parallel connection of the AC-terminals can be achieved by an additional flexible cross
connector directly mounted on the SKiiP AC terminals (marked with an arrow in the Figure 7.13).
Please note that the current rating of this bar must not be very high, because there is no load current
flowing in this bar. There are only high frequency currents flowing. Thus the flexibility can be achieved
by using a comparatively thin material.
Figure 7.13: An example of SKiiP®4 cross connection
To minimize the above mentioned effects the system designer has to make sure, that there is sufficient
inductance between the AC output terminals of the paralleled SKiiP subsystems. The impedance has two
tasks:
• On the one hand it should prevent the divergence of the current during the switching moment. That
could lead to different switching losses, respectively to oscillations. This is shown in Figure 7.14. The
value tjitter is given in the SKiiP®4 data sheet on page 2.
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Figure 7.14: Effects of paralleling SKiiP®4
•
On the other hand a different root mean square value of the output current should be avoided.
Symmetric effects come from the inductivities (AC choke) and the ohmic resistors (choke resistor,
wiring resistor and path resistance) as shown in Figure 7.15.
Figure 7.15: Schematic Circuit Diagram
Inverter 1
Iout
Z1
Iout1
Iout2
Iout1
Load
Inverter 2
Iout
Z2
t
Iout2
Tolerance of forward voltage drop of IGBT or diodes
The IGBTs used in the SKiiPs have a positive temperature coefficient. The freewheeling diodes are
produced with a small forward voltage range. Both limit the inhomogeneous current distribution. No further
selection of forward voltage groups is necessary.
Different DC link voltage levels
To avoid different output voltages caused by different DC link voltages levels, the DC link should be
connected in parallel. It has to be avoided that oscillations between the capacitor banks occur. For large
systems fuses between the capacitor banks are recommended. The paralleled systems should have the
same DC link with the same capacitor type and capacitor values.
Different cooling conditions of paralleled half bridges
The cooling system of the paralleled SKiiP units should be designed in way to avoid thermal stacking.
In spite of all the mentioned actions it has to be taken into account that for in-homogenous current sharing
a de-rating of the nominal current of the power section has to be considered.
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7.11 Prevention of condensation
Condensation during operation must be prevented. This can be ensured by regulation of the air or water
flow so that the heat sink temperature is always above the environmental temperature. The use of chilled
coolant is therefore not recommended. Condensation may also occur because of night/day temperature
change. If the power electronic equipment was exposed to humidity or moisture during transport and
storage, it should be dried before commissioning. This can be done by air heater in air cooled systems or
by pre-heated water in water cooled systems.
8.
Logistics
8.1
Label
For reasons of traceability all SKiiP®4 modules are marked with a system, half bridge, driver shuttle and a
warranty label.
8.1.1
System Label
The system label of SKiiP (Figure 8.1) is the label which contains all information necessary for customers.
In case of technical inquiries please always name the SKiiP Item number written on this label.
Figure 8.1: System Label of SKiiP®4
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8.1.2
Half bridge Laser Label
Figure 8.2: Half bridge label of SKiiP®4
8.1.3
Warranty Label
The warranty label is presented in the Figure 8.3. The position of the warranty label could be found in the
corresponding data sheet.
Figure 8.3: Warranty Label of SKiiP®4
Please note: Removing the warranty label will result in loss of warranty in case of product reclamation
8.1.4
Data Matrix Code
The Data Matrix Code is described as follows
• Cell size: 0,3mm
• Read distance: 60 – 100mm
• Max. angle of 30° (vertical reference line) for reading
Figure 8.4: Data Matrix Code of SKiiP®4 (example)
2060XXXX01_16DE12345601_001_ABCDEFGHIJ
10 digits free for customer information
3 digits continuously module number
2 digits additionally order number
10 digits production order number
2 digits
8 digits SKiiP item number
© by SEMIKRON / 2016-11-29 / Technical Explanation / SKiiP®4
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List of figures:
Figure 2. 1: SKiiP®4 – 4 fold .............................................................................................................5
Figure 2.2: Half bridge definition .......................................................................................................5
Figure 2.3: Half bridge “explosion picture” .........................................................................................6
Figure 2.4: Main terminals construction principle .................................................................................7
Figure 4.1: Grounded delta grid .................................................................................................. 11
Figure 4.2: Star grounded circuit network (690V-TN-grid) ......................................................... 11
Figure 4.3: Implementation of additional basic isolation between SKiiP®4 driver interface and controller
board ........................................................................................................................................... 13
Figure 5.1: Gate Driver Board block diagram..................................................................................... 15
Figure 5.2: Gate Driver Interface ..................................................................................................... 16
Figure 5.3: SKiiP®4 - connector D-Sub 25 pin, male plug, vertical, top view .......................................... 16
Figure 5.4: Overview schematics SKiFace interface (CMN_GPIO1/2 and CMN_HALT are not depicted ....... 19
Figure 5.5: TOP/BOT PWM Signal Input ............................................................................................ 21
Figure 5.6: Threshold level for HB_TOP and HB_BOT .......................................................................... 21
Figure 5.7: Schematics analogue output signals ................................................................................ 22
Figure 5.8: Application Example – Symmetric Wired differential Amplifier. Terminal description HB_I and
HB_I_GND for current measurement ................................................................................................ 23
Figure 5.9: Application example of the HALT signal for separate connected SKiiP®4 systems ................... 25
Figure 5.10: Application example of the CMN_GPIO1 (inverted HALT signal) as error output signal .......... 26
Figure 5.11: CAN-Interface ............................................................................................................. 27
Figure 5.12: CAN – application example for several SKiiP.................................................................... 27
Figure 5.13: Prevention of ground loops due to differential amplifier .................................................... 28
Figure 5.14: Ground and shield connection. Principle schematics for Ground and shield connection. Principle
schematics for switching signal inputs .............................................................................................. 29
Figure 5.15: Ground and shield connection. Principle schematics for analogue output signal (Example:
Temperature output) ...................................................................................................................... 29
Figure 5.16: Connection of reserved and not used signals at the user controller board ........................... 30
Figure 5.17: Power-On-Reset timing diagramm ................................................................................ 31
Figure 5.18: Short pulse suppression .............................................................................................. 32
Figure 5.19 : Switch-off scenarios .................................................................................................... 32
Figure 5.20: Switching frequency range ........................................................................................... 35
Figure 5.21: Timing diagram for the TOP/BOT overlapping error processing (t<3µs) ............................. 35
Figure 5.22: Timing diagram for the HB_TOP/HB_BOT overlapping error processing (t>3µs) .................. 36
Figure 5.23: No short circuit .......................................................................................................... 36
Figure 5.24: Short circuit during operation ....................................................................................... 36
Figure 5.25: Short circuit during turn on .......................................................................................... 36
Figure 5.26: Characteristic between current and the voltage at HB_I, SKiiP®4 3-fold ............................. 37
Figure 5.27: Characteristic between current and the voltage at HB_I, SKiiP®4 4-fold ............................. 38
Figure 5.28: Characteristic between current and the voltage at HB_I, SKiiP®4 6-fold ............................. 38
Figure 5.29: Bode diagram of the AC-current measurement at the SKiiP4 interface ............................... 39
Figure 5.30: Compensation principle of SKiiP®4 current sensor ........................................................... 39
Figure 5.31: Characteristic between DCB-sensor temperature and the voltage at CMN_TEMP .................. 40
Figure 5.32: DC link voltage sensor output 1200V system .................................................................. 42
Figure 5.33: DC-link voltage sensor output 1700V system .................................................................. 42
Figure 5.34: Bode diagram of the DC-link voltage measurement at the SKiiP4 interface ......................... 43
Figure 6.1: Maximum forces at the main terminals............................................................................. 44
Figure 6.2: AC connection .............................................................................................................. 45
Figure 7.1: Safe Operating Area for standard SKiiP®4......................................................................... 46
Figure 7.2: Definition of thermal resistances ..................................................................................... 47
Figure 7.3: Sensor position in SKiiP®4 GB (6fold, 4fold, 3fold) with proposed cooling (water inlet) direction48
Figure 7.4: Graphic presentation of the electrical connections by the IVT procedure ............................... 49
Figure 7.5: Graphic schematic of the wind mill .................................................................................. 51
Figure 7.6: Graphic presentation of SKiiP®4 behaviour without FRT-function activated in case of overcurrent51
Figure 7.7: Graphic presentation of SKiiP®4 behaviour with FRT-function activated in case of overcurrent 52
Figure 7.8: Graphic presentation of the driver processing in FRT-case .................................................. 52
Figure 7.9: SOA for SKiiP®4 Solar .................................................................................................... 53
Figure 7.10: Probability of a failure during operation time. .................................................................. 55
Figure 7.11: SKiiP driver failure rate temperature dependence calculated according to SN29500 ............. 55
Figure 7.12: Position of the driver temperature sensor SKiiP4 ............................................................. 56
Figure 7.13: An example of SKiiP®4 cross connection ......................................................................... 57
Figure 7.14: Effects of paralleling SKiiP®4 ......................................................................................... 58
© by SEMIKRON / 2016-11-29 / Technical Explanation / SKiiP®4
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Figure
Figure
Figure
Figure
Figure
7.15: Schematic Circuit Diagram............................................................................................ 58
8.1: System Label of SKiiP®4................................................................................................. 59
8.2: Half bridge label of SKiiP®4............................................................................................. 60
8.3: Warranty Label of SKiiP®4 .............................................................................................. 60
8.4: Data Matrix Code of SKiiP®4 (example) ............................................................................ 60
List of tables:
Table 3—1: SKiiP®4 standard product range .......................................................................................9
Table 4—1: SKiiP®4 Tests for qualification and re-qualification ............................................................ 10
Table 4—2: SKiiP®4 Electromagnetic compatibility ............................................................................ 10
Table 4—3: Isolation limits SKiiP®4 ................................................................................................. 11
Table 4—4: Altitude correction factors (IEC 60664-1) ......................................................................... 12
Table 4—5: Installation altitudes for SKiiP®4 in dependency of kind of grid, overvoltage category and kind
of required isolation ....................................................................................................................... 14
Table 5—1: Pin configuration SKiiP®4 ............................................................................................... 17
Table 5—2: Requirements to the auxiliary power supply ..................................................................... 20
Table 5—3: Ground connections of SKiiP®4 ....................................................................................... 28
Table 5—4: IntelliOff functionality .................................................................................................... 33
Table 5—5: Power losses due to IntelliOff ......................................................................................... 33
Table 5—6: Error delay time ........................................................................................................... 34
Table 5—7: Signal characteristics of Under Voltage Protection primary side .......................................... 34
Table 5—8: Signal characteristic of current measurement ................................................................... 37
Table 5—9: Characteristics of the DCB-temperature sensor circuit ....................................................... 40
Table 5—10: VDC characteristics....................................................................................................... 41
Table 6—1: Maximum allowable forces to terminals ........................................................................... 43
Table 7—1: Snubber capacitors for SKiiP®4 ....................................................................................... 47
Table 7—2: Operation modes SKiiP®4 solar ....................................................................................... 54
Table 7—3: Default values for the TDriver Trip ....................................................................................... 56
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9.
Abbreviations
Abbreviation
Meaning
CTE
Coefficient of Thermal Expansion
DBC
Direct bonded copper
D-Sub
D-Subminiature
EMC
Electromagnetic compatibility
GB
halfbridge configuration
GND
Ground
IGBT
Insulated Gate Bipolar Transistor
IPM
Intelligent Power Module
PCB
Printed Circuit Board
PTC
Positive Temperature Coefficent
RH
Relative Humidity
RoHS
Restriction of Hazardous Substances
SCP
Short Circuit Protection
SKiiP
Semikron intelligent integrated Power
SPS
Short Pulse Suppression
UVP
Under Voltage Protection
SOA
Safe Operating Area
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10. Symbols
Symbol
Meaning
ICnom
Nominal collector current of IGBT
IFnom
Nominal forward current of diode
Idigiout
Digital output sink current (HALT-signal)
QPD
Charge of the Partial Discharge event
RCC´+EE´
Resistance of the interconnections between terminals and die
Rth
Thermal resistance
tpReset(OCP)
Overcurrent reset time
tjitter
Jitter clock time
tSIS
Short pulse suppression time
tbl
Blanking time
tPOR
Power-On Reset time
Ta
Ambient temperature
Tj
Junction temperature
Tr
Temperature at reference position
ULE
Line to earth voltage
ULL
Line to line voltage
VCEstat
Collector-Emitter Threshold Static Monitoring Voltage
Vit+ HALT
Input threshold voltage HALT-signal (HIGH)
Vit- HALT
Input threshold voltage HALT-signal (LOW)
TDriverTrip
Over temperature trip level
f0Uana
Bandwidth of DC-voltage measurement @ VDctrip
f0Iana
Bandwidth of current measurement @ ITRIPSC
f0Tana
Bandwidth of temperature measurement @ Ttrip
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Symbols and Terms
Letter
Symbol
ICnom
Term
IFnom
Nominal forward current of diode
Idigiout
Digital output sink current (HALT-signal)
QPD
Charge of the Partial Discharge event
RCC´+EE´
Resistance of the interconnections between terminals and die
Rth
Thermal resistance
tpReset(OCP)
Overcurrent reset time
tjitter
Jitter clock time
tSIS
Short pulse suppression time
tbl
Blanking time
tPOR
Power-On Reset time
Ta
Ambient temperature
Tj
Junction temperature
Tr
Temperature at reference position
ULE
Line to earth voltage
ULL
Line to line voltage
VCestat
Collector-Emitter Threshold Static Monitoring Voltage
Vit+ HALT
Input threshold voltage HALT-signal (HIGH)
Vit- HALT
Input threshold voltage HALT-signal (LOW)
TDriverTrip
Over temperature trip level
f0Uana
Bandwidth of DC-voltage measurement @ VDctrip
f0Iana
Bandwidth of current measurement @ ITRIPSC
f0Tana
Bandwidth of temperature measurement @ Ttrip
Nominal collector current of IGBT
A detailed explanation of the terms and symbols can be found in the “Application Manual Power
Semiconductors” [2]
References
[1] www.SEMIKRON.com
[2] A. Wintrich, U. Nicolai, W. Tursky, T. Reimann, “Application Manual Power Semiconductors”,
ISLE Verlag 2011, ISBN 978-3-938843-666
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