Emulation I/F for Hitachi SH7750 User`s Guide

Emulation I/F for Hitachi SH7750 User`s Guide
User’s Guide
Publication number B3759-97023
July 2000
© Copyright Agilent Technologies 1994-2000
All Rights Reserved
Emulation I/F For Hitachi SH7750
Notice
Agilent Technologies makes no warranty of any kind with regard to this material,
including, but not limited to, the implied warranties of merchantability and fitness for
a particular purpose. Agilent Technologies shall not be liable for errors contained
herein or for incidental or consequential damages in connection with the furnishing,
performance, or use of this material.
Agilent Technologies assumes no responsibility for the use or reliability of its software
on equipment that is not furnished by Agilent Technologies.
© Copyright 1994-2000 Agilent Technologies.
This document contains proprietary information, which is protected by copyright. All
rights are reserved. No part of this document may be photocopied, reproduced, or
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2
Printing History
New editions are complete revisions of the manual. The date on the title page changes
only when a new edition is published.
A software code may be printed before the date; this indicates the version level of the
software product at the time the manual was issued. Many product updates and fixes
do not require manual changes, and manual corrections may be done without
accompanying product changes. Therefore, do not expect a one-to-one
correspondence between product updates and manual revisions.
Edition 1
B3759-97010, Mar 1999
Edition 2
B3759-97012, May 1999
Edition 3
B3759-97023, July 2000
Certification and Warranty
Certification and warranty information can be found at the end of this manual on the
pages before the back cover.
3
The Emulation Solution User Interface Overview
Agilent Technologies B3759A Emulation Solution User Interface is a high level
language debugger, which works with emulation solution for SH7750 system.
This book describes how to setup the Agilent Technologies E5900A/01A, and how
to use the processor specific features of the Agilent Technologies B3759A #710
Emulation Solution User Interface software.
For detailed information of how to setup Agilent Technologies E5900A/01A, please
refer to “Emulation for the Hitachi SH7750 User’s Guide”.
Features of the Agilent Technologies B3759A Emulation Solution User Interface and
how to use and install this software can be found in “Emulation I/F User’s Guide”.
In This Book
This book documents the Emulation Solution User Interface. It is organized into four
parts whose chapters are described below.
4
Chapter 1
shows you how to setup Agilent Technologies E5900A/01A.
Chapter2
shows you how to configure the software.
Chapter3
shows you how to compile or assemble your programs.
Chapter4
shows you how to perform cross triggering.
Contents
1
Setting Up Your System
Connecting Your Target System
8
Connecting your target system to the emulation probe.
Connecting your target system to the emulation module
2
9
10
Configuring the Emulation Solution User Interface
Configuring Emulation Solution User Interface
Instruction on Using The Emulation Solution User I/F
Debug Window
14
15
16
Peripheral window
16
Customizing sh7750.ini File
16
Hardware Configuration Dialog Window
Setting The Breakpoints
24
SH7750 Registers
25
Bus Trace Window
20
26
Establishing a connection to the logic analyzer.
26
Memory Map Settings
28
Loading and Storing Your Memory Map Settings
31
Using the Trace Trigger Condition window
32
Notes and Restrictions of the Trace Trigger Condition Window
3
Compiling and Assembling Programs
Compiling And Assembling Programs
Compilers and Assemblers
4
36
42
43
Performing Cross Triggering
Performing Cross Triggering
46
To stop the processor when the logic analyzer triggers
Emulation Solution I/F User’s Guide
47
5
Contents
Triggering the Logic Analyzer from the Emulation Module/Probe
50
Tracing until the processor halts
51
To capture a trace before the processor halts
51
Start tracing when the processor runs
53
To capture a trace when the processor started running
Measurement Examples
54
53
Index
Certification and Warranty
61
Certification
61
Warranty
61
6
Emulation Solution I/F User’s Guide
1
Setting Up Your System
7
Connecting Your Target System
This chapter shows you how:
• To connect your emulation probe to the target system.
• To connect your emulation module to the target system.
8
Emulation Solution User I/F User’s Guide
Chapter 1: Setting Up Your System
Connecting Your Target System
Connecting your target system to the emulation probe.
This section describes the connection between the emulation probe and your target
system.
The purpose of using the Emulation Probe.
The emulation probe connects to the on chip debug port of the processor. It offers
many features like run control of the target processor, code download, and display or
modification of the registers or the target memory. It also offers real time program
execution even on the fastest processor.
The purpose of using the Target Interface Module.
This module functions as a “Bridge” between the target system and the trace port
analyzer.
Emulation Solution User I/F User’s Guide
9
Chapter 1: Setting Up Your System
Connecting Your Target System
Connecting your target system to the emulation module
This section describes the connection between the emulation module and your target
system.
The purpose of using the emulation module.
Emulation module is a hardware device which is integrated into your Agilent
Technologies 16600A/16700A series logic analyzer. It can provide the same
functionality to the emulation probes.
The purpose of using the Target Interface Module.
This module functions as a “Bridge” between the target system and the trace port
analyzer.
10
Emulation Solution User I/F User’s Guide
Chapter 1: Setting Up Your System
Connecting Your Target System
Connect the cables as shown in the picture when using an emulation module.
Note
When connecting or disconnecting the cables, make sure that all the systems have
been powered down. It may damage the hardware if they are not properly powered
down during this procedure.
Refer to the “Emulation for the Hitachi SH7750 User’s Guide” for the proper
procedure of the each connection.
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11
Chapter 1: Setting Up Your System
Connecting Your Target System
12
Emulation Solution User I/F User’s Guide
2
Configuring the Emulation Solution User
Interface
13
Configuring Emulation Solution User Interface
This chapter talks about the topics below
Debug Window
• Peripheral window
• Hardware configuration dialog
• Setting the break points
• SH7750 Registers
Bus Trace Window
• Establishing a connection
• Memory Map settings
• Trace Trigger Condition window
• Notes and Restrictions
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Emulation Solution User I/F User’s Guide
Chapter 2: Configuring the Emulation Solution User Interface
Configuring Emulation Solution
Instruction on Using The Emulation Solution User I/F
This chapter describes how to use B3759A Emulation Solution user I/F Software #710
(Hitachi SH7750). This chapter talks about the processor specific features of this
software.
Agilent Technologies B3759A does not have a PC Trace Window. This was due to
the hardware line-up for the Hitachi SH7750 processor does not include the trace port
analyzer.
Note
Refer to the “Emulation I/F User’s Guide” for the software installation and the basic
operation commands.
Emulation Solution User I/F User’s Guide
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Chapter 2: Configuring the Emulation Solution User Interface
Debug Window
Debug Window
Peripheral window
The peripheral window displays the register names and the values of the specified
register class.
You may define the additional register names or the classes by editing the “sh7750.ini”
file located in your system as below.
HP-UX
/usr/hpmnn/h700_9/messages/default/prc
Solaris
/opt/hpmnn/solar_2/messages/default/prc
SunOS
/usr/hpmnn/sunos_4/messages/default/prc
PC
c:\hpmnn\b3759A\messages\default\prc
Customizing sh7750.ini File
You can customize the register class description in sh7750.ini file. Follow the rules
below to add your own register class. You do not have to delete the old entries in the
class definition. You may simply add a entirely new class definitions and keep the
old one in a same file. Specifying the chip name in ChipTable field determines which
register class description is used in the software.
Note:
All the default peripherals for the SH7750 processor are already defined in this file.
[ChipInfo]
ChipTable = <ChipName>
Example
(ChipName can be anything)
[ChipInfo]
ChipTable = MyChip
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Chapter 2: Configuring the Emulation Solution User Interface
Debug Window
The following description defines the main menu (Display menu in Peripheral
Window) appearance.
[SfrClass<ChipName>Info]
SfrClassTable = <ClassName><Description>
Example
[SfrClassMyChipInfo]
SfrClassTable = SP
Serial Port \\
DRAMC
DRAM Controller \\
You may add sub menus for the main menu which you defined above.
[SfrSubClass<ChipName>Info]
<Class>Sub = <SubClassName> <Description>
Example
[SfrSubClassMyChipInfo]
SPSub = SP0
0
\\
SP1
1
\\
Setting the characteristics for each register.
The following defines the each register’s address, width and attribute.
[<SubClassName><ChipName>Info]
<SubClassName>Table = <name><address><width(bit)><attribute>
For the register without a sub menu.
[<ClassName><ChipName>Info]
<ClassName>Table = <name><address><width(bit)><attribute>
Note
Attributes are 1->Read Only, 2->Write Only and 3->Read/Write
Example
[SP0MyChipInfo]
SP0Table = ua0tb
Emulation Solution User I/F User’s Guide
01C000000
16
2
\\
17
Chapter 2: Configuring the Emulation Solution User Interface
Debug Window
ua0rb
01C000004
16
1
ua0mr
01C000008
8
3
\\
[SP1MyChipInfo]
SP1Table = ua1tb
01C000014
16
2
\\
ualmr
01C00001D
32
1
\\
ua1cr
01C00001C
8
3
[DRAMCMyChipInfo]
Note
18
DRAMCTable = dccr0
0FFFF8000
32
3
dccr1
0FFFF4000
32
3
\\
Each peripheral must have its own entry for the above settings.
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Chapter 2: Configuring the Emulation Solution User Interface
Debug Window
Bus State Controller (BSC) registers
If you are using SDRAM for your target system, you must specify the proper address
into the SDMR2 or the SDMR3 register. Please refer to the chip’s hardware manual
on how to determine these value. To define the SDRAM mode in the B3759A #710
interface software, you must manually set the correct value in the sh7750.ini file. The
emulation probe can not access the SDRAM memory area if you incorrectly define
the address. Please refer below for where to edit in the file.
[Bsc7750Info]
#
Name
Type
Address
Width
Attribute
#
#
----------------------------------------------------------------------------------------
BscTable =
bcr1
memory
0FF800000 32
3
bcr2
memory
0FF800004 163\\
wcr1
memory
0FF800008 32
3
wcr2
memory
0FF80000C 32
3
wcr3
memory
0FF800010 32
3
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
sdmr2
memory
0FF900000 8
2
sdmr3
memory
0FF940000 8
2
Edit the memory address of sdmr2 or sdmr3 register above using a text editor.
Emulation Solution User I/F User’s Guide
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Chapter 2: Configuring the Emulation Solution User Interface
Debug Window
Hardware Configuration Dialog Window
You may set various emulation probes/modules settings from this dialog window.
From the Debug Window menu, choose the following command
Settings->Configuration->Hardware
Restrict to real time runs
Unchecked:
Allows commands which breaks to the monitor. Examples include
commands which display memory or registers. These commands
break to the monitor to access the target processor, then resume
the user program. (default)
Checked:
No commands are allowed which breaks to the monitor, except
“break”, “reset”, “run” or “step”. The processor must be explicitly
stopped before other commands can be performed.
Endian
20
Big:
Big endian mode.
Little:
Little endian mode.
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Chapter 2: Configuring the Emulation Solution User Interface
Debug Window
“Break In” Port
Rising:
The emulation probe will cause a break on a rising edge from
the BNC input.
Falling:
The emulation probe will cause a break on a falling edge from
the BNC input.
Off:
Inputs to the Break In BNC will be ignored.
“Trigger Out” Port
High:
BNC output will always be high.
Low:
BNC output will always be low.
Monitor High:
BNC output will go high when the processor is running in
background.
Monitor Low:
BNC output will go low when the processor is running in
background.
Hitachi-UDI Clock Speed
In MHz:
Specify the clock speed of the Hitachi-UDI (TCK clock). The
clock speed must be set slower than the SH7750’s internal
module clock speed. Specify the clock speed from the pull-down
menu.
Hitachi-UDI Connector
Target:
Choose this option if your emulation probe/module is connected
to your target board’s Hitachi-UDI connector. The /TRST signal
will be driven to low by the emulation probe when emulation
reset has been issued. (Resets Hitachi-UDI)
Analysis probe:
Choose this option if your emulation probe/module is connected
to your Agilent Technologies Analysis Probe’s Hitachi-UDI
connector. The emulation probe does not drive the /TRST signal.
You must manually reset your target board when the processor
or the Hitachi-UDI port is in unstable condition.
Emulation Solution User I/F User’s Guide
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Chapter 2: Configuring the Emulation Solution User Interface
Debug Window
Breakpoints at Delay Slot
Enable:
When this option is chosen, you can set breakpoints at any
location.
Disable:
When disabled, it checks if the instruction immediately
before the requested breakpoint address is delayed branch
or not. If the instruction is a delayed branch, it returns an
error message indicating that you may not place a
breakpoint in the location. Setting a breakpoint at the delay
slot can cause an illegal slot exception processing in your
program.
Initializing Timing
Power on Reset Only: The emulation circuitry in SH7750 (Hitachi-UDI) must be
initialized at target power-on and may need to be initialized
when it is in unstable condition. You may specify this option
if you want to initialize the SH7750 processor and the
SH7750 emulation circuitry only when the target power-on
is detected.
22
Target Reset:
Choose this option if you want to initialize the emulation
circuitry in SH7750 processor when the target power-on or
target reset is detected. When the emulation probe/module
detect the RESET signal being low, it initializes the
emulation circuitry of the SH7750 processor.
Emulation Reset:
Choose this option if you want to initialize the emulation
processor when the target power-on is detected or the
emulation reset is requested (By pressing the “reset” button
of the debug window). The initialization at the emulation
reset resets Hitachi-UDI only. Note that it may not be able
to recover from an unknown state because the emulation
reset can not initialize the entire emulation circuitry of the
Hitachi-UDI. The SH7750 processor may execute the user
program from the reset vector shortly after the Hitachi-UDI
reset. This configuration option should not be selected if
your user program at the reset vector is not properly
handled.
All Cases:
Choose this option if you want to initialize the processor
when the target power-on is detected, target reset is
detected, or emulation reset is requested.
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Chapter 2: Configuring the Emulation Solution User Interface
Debug Window
Language Tool Type
Hitachi:
Choose this option if you use Hitachi compiler for your program.
GHS:
Choose this option if you use Green Hills compiler for your
program.
SFR Reset Value
The emulation probe/module can initialize the SFR value when
the processor’s state is changed from “Emulation Reset” to
“Break”. Use the entry field and the buttons to set a value for
the SFR registers. You must set the SFR reset value in order to
correctly download your program onto the SH7750
microprocessor.
Name
You may choose the register names from the drop-down
menu in “Name” field.
Value
Specify the initial value of the register in this field.
Insert
Adds a register and the specified value to a list of registers
to be initialized.
Delete
Deletes a register and the specified value from the list.
Modify
Use this button to modify the value of the register in a list.
Emulation Solution User I/F User’s Guide
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Chapter 2: Configuring the Emulation Solution User Interface
Debug Window
Setting The Breakpoints
This section describes the restrictions on setting a hardware breakpoint on the SH7750
processor.
Setting a Hardware Breakpoint.
The Hitachi SH7750 processor equips three hardware break point. The hardware
break point may be enabled in the Debug window. It is disabled when the break point
is hit once. You need to enable it every time when your program runs in order to
make the hardware break point effective.
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Emulation Solution User I/F User’s Guide
Chapter 2: Configuring the Emulation Solution User Interface
Debug Window
SH7750 Registers
This section describes how the B3759A #710 interface software displays the SH7750
registers.
(*1)
Window Name
Registers
Register Window
(Window->Register)
R0-R15 (*1)
SR, GBR, SSR, SPC, SGR(*2),
DBR, VBR, MACH, MACHL,
PR, PC
Peripheral Window
(Window->Peripheral)
FR0-FR15 (*3)
XF0-XF15 (*3)
FPSCR, FPUL
When the processor is in privileged mode and the RB bit of the SR register is 1:
R0_BANK1 to R7_BANK1 are assigned to R0 to R7 general registers. R0_BANK0
to R7_BANK0 are listed as R0_BANK to R7_BANK in the register window.
When the processor is in privileged mode and the RB bit of the SR register is 0:
R0_BANK0 to R7_BANK0 are assigned to R0 to R7 general registers. R0_BANK1
to R7_BANK1 are listed as R0_BANK to R7_BANK in the register window.
When the processor is in user mode:
R0_BANK0 to R7_BANK0 are assigned to R0 to R7 general registers. R0_BANK1
to R7_BANK1 are listed as R0_BANK to R7_BANK in the register window.
(*2)
SGR register is read-only.
(*3)
When FR bit of the FPSCR register is 0:
FPR0_BANK0 to FPR15_BANK0 are assigned to FR0 to FR15 and FPR0_BANK1
to FPR15_BANK1 are assigned to XF0 to XF15.
When FR bit of the FPSCR register is 1:
FPR0_BANK0 to FPR15_BANK0 are assigned to XF0 to XF15 and FPR0_BANK1
to FPR15_BANK1 are assigned to FR0 to FR15.
Emulation Solution User I/F User’s Guide
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Chapter 2: Configuring the Emulation Solution User Interface
Bus Trace Window
Bus Trace Window
Establishing a connection to the logic analyzer.
When you are finished with attaching the analysis probe to the target system, proceed
to power up the both systems with the procedure written in chapter 1.
Before you launch B3759A #710 software, you must first load a correct configuration
file to your logic analyzer. The configuration file can be loaded from “Setup
Assistant” in your logic analyzer. Refer to the Solutions for the SH7750 for proper
procedures of loading the correct configuration file.
When a configuration file is loaded to your logic analyzer, you may proceed to launch
B3759A #710 interface software. From the main menu of the interface, choose the
following command.
Open->Bus Trace Window...
Dialog box below appears your screen.
In this dialog box, enter the processor name, the IP address for the logic analyzer and
a value for the connection timeout.
26
Processor Name:
Enter a target processor name. In B3759A #710, you may
choose “SH7750”.
LAN Address:
Enter an IP address or a host name for the logic analyzer.
Connection Timeout:
Enter the timeout value (In seconds) for the software to
try connecting to the logic analyzer.
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Chapter 2: Configuring the Emulation Solution User Interface
Bus Trace Window
Cancel:
This will close the dialog box without establishing the
connection.
Processor Name:
Processor names shown below are allowed in B3759A #710
SH7750
For Hitachi SH7750 Processor
Note:
You may encounter a message “Connection Timeout” after connecting to the logic
analyzer. You may see the message when your logic analyzer is processing a large
data file. (Or other tasks which require heavy load on your logic analyzer.)
Note:
The processor name which you supplied must match the processor name which you
have chosen when you ran “Setup Assistant” in your logic analyzer. It returns an error
message which says “Cannot Initialize” if the processor name does not match.
Note:
You may not connect multiple copies of the B3759A #710 interface software to one
logic analyzer at the same time. It gives you a dialog with following buttons.
Note:
Cancel
Cancel the connection to the logic analyzer
Unlock
Unlock the logic analyzer.
Connect
Forcefully connect to the logic analyzer.
When you make a connection to your logic analyzer, the B3759A #710 interface
software takes control over the state analyzer (which is in your logic analyzer). You
may not change any settings in your state analyzer. Doing so may cause the interface
software to show an inaccurate result. You may use other modules or functions in
your logic analyzer (Oscilloscope, Timing Analyzer, Group Measurements, etc.)
while the interface software is connected.
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Chapter 2: Configuring the Emulation Solution User Interface
Bus Trace Window
Memory Map Settings
Apply the following commands for the memory map settings.
Settings→Memory Map (ALT, S, M)
You must specify the memory map for each memory area of your target system. The
interface software does not show you the trace result of the memory area if you do
not correctly specify the memory settings. To specify each memory area, you must
first click on a memory area (area0-area6) from “Map Term” and choose a memory
type from “Attribute” pull-down menu. You must press “Apply” button for each
memory area for the settings to be reflected in the window. Follow the instructions
below for how to setup the memory map for each memory type.
ROM, Burst-ROM, or SRAM
Bus Width:
Choose from 8, 16, 32, or 64bit
Data Hold Time:
Specify the value for AnH1 and AnH0 bit of WCR3
register. The value must be set in decimal.
Write Strobe Setup Time:Specify the value for AnS0 bit of WCR3 register. The
value must be either 0 or 1.
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Chapter 2: Configuring the Emulation Solution User Interface
Bus Trace Window
Wait Control:
Specify the value for AnW2, AnW1, and AnW0 bit of
WCR2 register. The value must be set in decimal.
DRAM or EDO-DRAM
Bus Width:
Choose from 8, 16, 32, or 64bit
Column Address:
Choose from 8-12 bit.
SDRAM
Bus Width:
Choose from 8, 16, 32, or 64bit
Memory Product:
Specify the SDRAM type.
AMXEXT:
Specify the value for AMXEXT bit of the MCR register.
Burst Size:
Specify the value for BL bit of SDMR register. Specify
“4” when BL bits are ordered as “010”, and specify “8”
for “011”.
Wait Control:
Specify the value for AnW2, AnW1, and AnW0 bit of
WCR2 register. The value must be set in decimal.
MPX mode
Bus Width:
Choose from 8, 16, 32, or 64bit
Wait Control:
Specify the value for AnW2, AnW1, and AnW0 bit of
WCR2 register. The value must be set in decimal.
PCMCIA
Bus Width:
Choose from 8, 16, 32, or 64bit
Wait Control:
Specify the value for AnW2, AnW1, and AnW0 bit of
WCR2 register. The value must be set in decimal.
OE/WE assert delay time:Specify the value for AnTED2, AnTED1, and AnTED0
bit of PCR register. The value must be set in decimal.
OE/WE negate delay time:Specify the value for AnTEH2, AnTEH1, and AnTEH0
bit of PCR register. The value must be set in decimal.
PCMCIA wait:
Emulation Solution User I/F User’s Guide
Specify the value for AnPCW1 and AnPCW0 bit of PCR
register. The value must be set in decimal.
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Chapter 2: Configuring the Emulation Solution User Interface
Bus Trace Window
Apply:
Reflect the settings for the specific memory area in Map
Term.
Clear:
Clear settings of a memory area which is selected in Map
Term.
Clear.All:
Clear all memory area settings.
Endian:
Specify the endian mode.
OK:
Reflect the memory settings to the software and close the
dialog.
Cancel:
Cancel all the memory settings and close the dialog.
The data provided are reflected in Map Term area of the window only when you press
the “Apply” button.
Note:
You must press “Apply” button every time you change a memory area settings.
Note:
You must load the logic analyzer configuration file and the memory map settings
consistently. The interface software returns a error message “Invalid Logic Analyzer
Configuration” when you start a trace when both settings are not consistent. If a proper
configuration file was not loaded into the logic analyzer, you must exit the interface
software and re-connect to the logic analyzer after the correct configuration file is
loaded. If the memory map settings were not set correctly, you may specify the correct
memory settings in the memory map settings window. (You do not have to exit and
re-connect to the logic analyzer in this case.)
Note:
You may not use “Again” trace when you change the memory map settings. Changes
on the memory map settings are not reflected to the specific trace right away.
Note:
You must specify the memory map for each memory area of your target system. The
interface software does not show you the trace result of the memory area if you do
not specify the memory settings.
You may also specify the memory settings for the area which does not exist on your
target system for tracing illegal memory access to the memory address for your debug
purpose.
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Bus Trace Window
Loading and Storing Your Memory Map Settings
The following command let you store the current memory map settings of your
environment.
File→Store→Memory Map...(ALT, F, S, M)
This command opens a file selection dialog box from which you select the name of
the output file.
The following command let you load the previously stored memory map settings of
your environment.
File→Load→Memory Map...(ALT, F, L, M)
This command opens a file selection dialog box from which you select the name of
the previously stored memory map settings.
Note
You may not directly edit the memory map file. You must use the command
Settings→Memory Map (ALT, S, M) when you are making changes to the memory
map settings.
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Chapter 2: Configuring the Emulation Solution User Interface
Bus Trace Window
Using the Trace Trigger Condition window
Apply the following commands to use the Trace Trigger Condition dialog window.
Trigger->Condition (ALT, T, C)
The analysis probe can provide the processor external bus real-time trace, according
to the various settings of the Trace Trigger Condition dialog.
Address, data and status may be specified in this dialog. It then decides the trigger
condition for the logic analyzer.
32
Address:
Use this field to set a trigger on an address. You may enter symbols,
absolute addresses, or C source line number. You must specify an
address in this field to set a trigger.
Data:
Use this field to set a trigger on data. (In hexadecimal, decimal,
binary, or decimal format)
Data Size:
Use this field to specify the data size.
Auto:
Decides the data size from the symbol information of the
object file automatically.
Byte:
Specify the data size to byte.
Word:
Specify the data size to word.
Long:
Specify the data size to long word.
Emulation Solution User I/F User’s Guide
Chapter 2: Configuring the Emulation Solution User Interface
Bus Trace Window
Size Sensitive:
When the check box is selected:
When you are trying to set a trigger on a data access of an specified
address where data size is also specified, the trigger condition only
meets on the data access of the exact size at the address.
When the check box is not selected:
Trigger condition can meet at the specified data on an address
whenever there was an access to the address regardless of its access
size.
Status:
Specify the status of the trigger.
read:
Trigger on read cycle
write: Trigger on write cycle
Trigger Position:Specify the trigger position for accumulating the trace data.
Start:
Trace of after the trigger position
Center: Trace of before and after the trigger position
End:
Note:
Trace of before the trigger position
OK:
It sets a trigger on the logic analyzer and start the trace. The dialog
window then closes.
Apply:
It sets a trigger on the logic analyzer and start the trace. The dialog
window remains open, so you may change the settings and set a
different trigger condition as needed.
Close:
Dialog box closes. If you press this button before pressing
“Apply”, it will cancel your settings and does not set a trigger.
Clear:
All trigger conditions are cleared.
Do not click the “Apply” button rapidly for many times. (For example, double clicking
the button) Doing so may result in an incorrect trace.
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Chapter 2: Configuring the Emulation Solution User Interface
Bus Trace Window
Specifying the Trigger Address
This section describes the address format of the trace trigger condition window.
Address Format
Absolute address
Absolute address in range
Scaler symbol
Offset to a scaler symbol: The following example sets a trigger on an address of the
scaler symbol with an offset. (The example sets a trigger on an address of the symbol
plus 4 bytes.)
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Chapter 2: Configuring the Emulation Solution User Interface
Bus Trace Window
Range symbol: (Symbols which occupy blocks of addresses. For example,
“Union”,“Structure”, “Array” and “Function” in C language represent the range
symbols.).
Offset to a range symbol: The following example sets a trigger on a function
“decline”. It sets a trigger on the starting address of the function. When you specify
an offset, the symbol is treated as an address.
Note:
The trace trigger condition window returns an error message “Invalid address or
symbol” if you specify an address or a symbol which does not exist in your program.
It also returns the error message if you specify a range address which exceeds the
address range of the specific memory area.
Note:
The trace trigger condition window returns an error mesage “Invalid data or data size”
if you specify a incorrect data size (For example, choosing “Long Word” for 16bit
data bus).
Note:
Same address format rules apply to other methods of triggering. (For example,
“After()”, “About()” and “Before()”)
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Chapter 2: Configuring the Emulation Solution User Interface
Bus Trace Window
Notes and Restrictions of the Trace Trigger Condition
Window
Data Size Sensitive Option
The following example explains the sensitive option found in the trace trigger
condition window.
Example
You have a byte size data on an address 0C001003 and trying to set a trigger on the
byte data access on the address. (The following case is based on 32bit bus and big
endian)
With the size sensitive option checked
Byte size data access to 0C001003.
With sensitive option checked, the trigger condition meets only when there was a byte
data access to the address 0C001003.
The trigger condition does not meet when there was a word access or a long word
access to the address 0C001003.
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Chapter 2: Configuring the Emulation Solution User Interface
Bus Trace Window
With the size sensitive option unchecked
With the sensitive option checked, the trigger condition can meet at the following
three conditions.
Byte size data access to 0C001003
Word size data access to 0C001002
Long word data access to 0C001000
With sensitive option unchecked (Non-sensitive), the trigger condition can meet
whenever there was an access (regardless of its access size) to the address 0C001003.
Even if there was a word or long word access to the address, (The pictures above) the
trigger condition can still meet. The trigger condition meets as long as the specified
address (0C001003) is covered by the data access.
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Chapter 2: Configuring the Emulation Solution User Interface
Bus Trace Window
Restrictions of data size sensitive option
This section describes rules and restrictions of specifying the size sensitive option.
• If the data size is not selected and an absolute address is specified, it assumes the
data size to be byte size and non-sensitive triggering.
• If you choose “Auto” data size and “size sensitive” option, the trace trigger condition
window returns an error message “Invalid data size or size sensitive option”.
• You may not specify this option for a data larger than the data bus width.
• If you are setting a trigger on a range address (*1), you may not specify the data
size or the size sensitive option.
(*1) Symbols which occupy blocks of addresses. For example, “Union”, “Structure”,
“Array” and “Function” in C language represent the range symbols.
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Chapter 2: Configuring the Emulation Solution User Interface
Bus Trace Window
Specifying an Address and a Data
This section describes some of the restrictions and notes when specifying an address
in the Bus Trace window.
Restrictions
• If the supplied symbol size is double, it is treated as a range symbol(*1).
• You may not specify either the data size or the value for a range address(*1).
• You may not specify either the data size or the value for a data larger than the data
bus width.
• When setting a trigger on a range address of either DRAM or EDO-DRAM area,
the specified address range must not extend over two row addresses.
• If you are using either Multiplex mode or SDRAM on the target system, you may
only specify the trigger address and the data on the leading address of the burst
memory access.
• If you are using Multiplex mode, EDO-DRAM, or SDRAM on the target system,
you must specify either “Read” or “Write” when specifying a trigger on data. (“don’t
care” setting is not allowed)
• When setting a trigger on EDO-DRAM area and specify “Read” for status, last data
of the burst-cycle will not be presented.
• If you are setting a trigger on ROM, SRAM, PSRAM or Burst-ROM memory area,
you may specify the data size on write cycles only. (You may choose “Auto” and
“Non-Sensitive” settings for trigger on read cycles or read/write cycles.
• You may not specify the data size for trigger settings on either Multiplex mode or
PCMCIA area.
(*1) Symbols which occupy blocks of addresses. For example, “Union”, “Structure”,
“Array” and “Function” in C language represent the range symbols.
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Chapter 2: Configuring the Emulation Solution User Interface
Bus Trace Window
Specifying “Don’t Care”
When using 64bit data bus and specifying an address in binary. (When size
sensitive option is chosen)
• If you specify “x” (Dont’ Care) for A0, A1, or A2 bit of an address, you may not
choose byte size data access for the trigger setting.
• If you specify “x” for either A1 or A2 bit of an address, you may not choose word
size data access for the trigger setting.
• If you specify “x” for A2 bit of an address, you may not choose long word size data
access for the trigger setting.
When using 32bit data bus and specifying an address in binary. (When size
sensitive option is chosen)
• If you specify “x” for either A0 or A1 bit of an address, you may not choose byte
size data access for the trigger setting.
• If you specify “x” for A1 bit of an address, you may not choose word size data
access for the trigger setting.
When using 16bit data bus and specifying a binary address (When size sensitive
option is chosen)
• If you specify “x” for A0bit of an address, you may not choose byte size data access
for the trigger setting.
Other Restrictions
• You may not set a trigger on a data if you specify “Don’t Care” on SDRAM address
area. Trigger condition may not meet on the burst cycles.
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Emulation Solution User I/F User’s Guide
3
Compiling and Assembling Programs
41
Compiling And Assembling Programs
This chapter shows you:
• what languages are available
• what to do when compiling your program.
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Emulation Solution User I/F User’s Guide
Chapter 3: Compiling and Assembling Programs
Compiling And Assembling Programs
Compilers and Assemblers
This section covers the following topics.
• Object files.
• Compiling, assembling, and linking programs.
Object Files
The Agilent Technologies B3759A Emulation Solution I/F #700 software supports
object files created by the following language tools:
GHS Language Tools
Tool
Command
Description
C Compiler
ccsh
SH Cross Compiler
Assembler
asmsh
SH Macro Assembler
Linker
lx
SH Linker
Command Option
This section describes the important command options when using the GHS language
tools.
Compiling
For compiling, use the ccsh command in your GHS C Compiler with the following
option switch.
-g
Enables debug information output.
-ga
Use Frame Pointer
-nodbg
Output debug information in a object file.
Assembling
For assembling, use the asmsh command in your GHS Assembler with the following
option switch.
-g
Enables debug information output.
-elf
Output ELF format.
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Chapter 3: Compiling and Assembling Programs
Compiling And Assembling Programs
Linker
No command option switch is required.
HITACHI Language Tools
Tool
Command
Description
C Compiler
shc
SH Series C Compiler
Assembler
asm
SH Series Assembler
Linker
lnk
SH Series Linkage Editor
Command Option
This section describes the important command options when using the Hitachi
language tools.
Compiling
For compiling, use the shc command in your Hitachi C compiler with the following
option switch.
-debug
Enables debug information output.
Assembling
For assembling, use the asmsh command in your Hitachi assembler with the following
option switch.
-debug
Enables debug information output.
Linking
For linking, use the lnk command in your Hitachi linker with the following option
switch.
-debug
44
Enables debug information output.
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4
Performing Cross Triggering
45
Chapter 4: Performing Cross Triggering
Performing Cross Triggering
Performing Cross Triggering
This chapter shows you how:
• To trigger the emulation module/probe from the logic analyzer
• To trigger the logic analyzer from the emulation module/probe
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Chapter 4: Performing Cross Triggering
Performing Cross Triggering
To stop the processor when the logic analyzer triggers
You can trigger the emulation module from the logic analyzer using the
Agilent Technologies B3759A #710 interface software and the logic
analyzer’s intermodule window.
1 Open the Intermodule window from your logic analyzer’s main screen.
2 In the Intermodule window, click on the analyzer icon and select Group Run.
2-1 If you use emualtion module, select the analyzer and the emulation
module icon .
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Chapter 4: Performing Cross Triggering
Performing Cross Triggering
2-2 If you use the Agilent Technologies E5900A #710 emulation probe,
connect the emulation probe and the logic analyzer with BNC cable.
Connect the “Break In” port of the emulation probe and the “Port
Out” port of the logic analyzer (Located in back of your Agilent
Technologies 16600/700 series logic analyzers). Select the analyzer
and the “Port Out” icon.
3 Open the hardware configuration dialog from the Debug window.
(Settings→Configuration→Hardware)
3-1 Choose “Rising” check box from the “Break In Port”menu in the dialog.
3-2 Click “OK”.
4 From the Bus Trace window of the Agilent Technologies B3759A, create a
trigger using the Before() button on an address or using the Trace Trigger
Condition window. You must use “End” trigger position for the trigger
settings.
5 When you are done with setting a trigger, proceed to start your user program
on your target system.
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Chapter 4: Performing Cross Triggering
Performing Cross Triggering
Note:
Other types of trigger settings (“After()”, “About()”, “Always”, “Until Halt”,
or trigger position other than “End”) are not affective and may cause the
following sequence.
1 The analyzer triggers.
2 The trigger (“Break In”) is sent to the emulation module/probe.
3 The emulation module/probe stops the user program which is running
on the target processor. The processor enters a background debug
monitor.
4 Because the processor has stopped, the analyzer stops receiving a
qualified clock signal.
5 If the trigger position is “End”, the measurement will be completed. If
the trigger position is not “End”, the analyzer may continue waiting for
more states.
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Chapter 4: Performing Cross Triggering
Triggering the Logic Analyzer from the Emulation Module/Probe
Triggering the Logic Analyzer from the Emulation
Module/Probe
You can create an intermodule measurement that will allow the emulation
module to trigger another module such as a timing analyzer.
Before you trigger a logic analyzer (or another module) from the
emulation module/probe, you should understand a few things about the
emulation module/probe trigger:
The emulation module/probe trigger signal
The trigger signal coming from the emulation module/probe is an “In
Background Debug Monitor” (“In Monitor”) signal. This may cause
confusion because a variety of conditions can cause this signal and falsely
trigger your analyzer.
The “In Monitor” trigger signal can be caused by:
• The most common method to generate the signal is to click Run and then
click Break in the Agilent Technologies B3759A #710 or other debugger.
Going from “run” (Running user program) to “Break” (“In Monitor”)
generates the trigger singnal.
• Another method to generate the “In Monitor” signal is to click Reset and
then click Break. Going from the reset state of the processor to the “In
Monitor” state will generate the signal.
• In addition, an “In Monitor” signal is generated any time a debugger or other
user interface reads a register, reads memory, sets breakpoints or steps. Care
must be taken to not falsely trigger the logic analyzers listening to the “In
Monitor” signal.
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Chapter 4: Performing Cross Triggering
Triggering the Logic Analyzer from the Emulation
Tracing until the processor halts
You can trigger the state analyzer (or other module in your logic analyzer)
from the emulation module/probe using the Agilent Technologies
B3759A #710 interface software and the logic analyzer’s intermodule
window. To halt the processor, you can set a breakpoint using the Agilent
Technologies B3759A #710 interface software or other debugger.
Some possible uses for this measurement are:
• To store and display processor bus activity leading up to a system crash.
• To capture processor activity before a breakpoint.
• To determine why a function is being called. To do this, you could set a
breakpoint at the start of the function and use this measurement to see how
the function is getting called.
To capture a trace before the processor halts
1 Open the Intermodule window from your logic analyzer’s main screen.
2 In the Intermodule window, click the emulation module icon, and then select
the analyzer.
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Chapter 4: Performing Cross Triggering
Triggering the Logic Analyzer from the Emulation Module/Probe
2-2 If you use the Agilent Technologies E5900A #710 emulation probe,
connect the emulation probe and the logic analyzer with BNC cable.
Connect the “Trigger Out” port of the emulation probe and the “Port
In” port of the logic analyzer (Located in back of your Agilent
Technologies 16600/700 series logic analyzers). Select the “Group
Run armed from Port In”, and the analyzer.
3 Open the hardware configuration dialog from the Debug window.
(Settings→Configuration→Hardware)
3-1 Choose “Monitor High” check box from the “Trigger Out Port” menu in
the dialog.
3-2 Click “OK”.
4 From the Bus Trace window of the Agilent Technologies B3759A, press the
“Until Halt” button.
5 When you are done with setting a trigger, proceed to start your user program
on your target system.
6 You may either manually break the user program from the debugger or set a
breakpoint in your program to acquire the trace in the Bus Trace window.
The Bus Trace window shows you the trace before the processor halted.
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Chapter 4: Performing Cross Triggering
Triggering the Logic Analyzer from the Emulation
Start tracing when the processor runs
You may set a trigger to the state analyzer (or other modules in your logic
analyzer) from the emulation module/probe to acquire the trace after the
processor started.
Some possible uses for this measurement are:
• To store and display processor bus activity when the processor started
running.
• To capture the processor’s activity when a function is called first time after
the processor started running.
To capture a trace when the processor started running
For steps 1 and 2, refer to the previous section “To capture a trace before
the processor halts”
3 Open the hardware configuration dialog from the Debug window.
(Settings→Configuration→Hardware)
3-1 Choose “Monitor Low” check box from the “Trigger Out Port” menu in
the dialog.
3-2 Click “OK”.
4 From the Bus Trace window of the Agilent Technologies B3759A, press the
“Always” button for tracing the activity of the processor when it started
running. You may also specify other trigger settings to capture the trace of
an address which is called for the first time after the processor started.
5 When you are done with setting a trigger, proceed to start your user program
on your target system.
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Chapter 4: Performing Cross Triggering
Triggering the Logic Analyzer from the Emulation Module/Probe
Measurement Examples
Some measurements examples are shown below.
Example
You are experiencing an analog signal problem which only appears when the
processor starts to run. You need to capture a line in your program which cause
the analog signal problem.
To figure out, connect your emulation module to a state analyzer and a
oscilloscope module as follows in Intermodule window..
If you are using a emulation probe connected the “Trigger OUT” port of
the emulation probe and “Port IN” port of the logic anlayzer via BNC
cable. .
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Chapter 4: Performing Cross Triggering
Triggering the Logic Analyzer from the Emulation
1 Open the hardware configuration dialog from the Debug window.
(Settings→Configuration→Hardware)
1-1 Choose “Monitor Low” check box from the “Trigger Out Port” menu in
the dialog.
1-2 Click “OK”.
2 From the Bus Trace window of the Agilent Technologies B3759A, press the
“Always” button
3 When you are done with setting a trigger, proceed to start your user program
on your target system.
4 The oscilloscope module and the state analyzer triggers upon the beginning
of the user program. The Bus Trace window and the Oscilloscope window in
the logic analyzer are time-correlated with G1 and G2 marker. This enable
you to capture a line in your program which cause the analog signal problem.
Example
Your target system unexpectedly crashes when it is running your user
program. An analog signal which is controlled by the program is suspected
to be the possible cause of the crash.
To figure out what line in your program was running, and how the analog
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Chapter 4: Performing Cross Triggering
Triggering the Logic Analyzer from the Emulation Module/Probe
signal behave, connect the modules as follows.
If you are using a emulation probe connected the “Trigger OUT” port of
the emulation probe and “Port IN” port of the logic anlayzer via BNC
cable.
1 Open the hardware configuration dialog from the Debug window.
(Settings→Configuration→Hardware)
1-1 Choose “Monitor High” check box from the “Trigger Out Port” menu in
the dialog.
1-2 Click “OK”.
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Chapter 4: Performing Cross Triggering
Triggering the Logic Analyzer from the Emulation
2 From the Bus Trace window of the Agilent Technologies B3759A, press the
“Until Halt” button
3 When you are done with setting a trigger, proceed to start your user program
on your target system.
4 The oscilloscope module and the state analyzer triggers upon the system
crash. The Bus Trace window and the Oscilloscope window in the logic
analyzer are time-correlated with G1 and G2 markers. This enable you to
capture a line in your program which causes the system crash and let you
observe the analog signal at the line.
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Chapter 4: Performing Cross Triggering
Triggering the Logic Analyzer from the Emulation Module/Probe
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Index
A
asmsh,
43
B
B3759A, 15
Break, 23
Break Points, 24
Hardware Break Point,
24
C
Compilers and Assemblers,
Assembling, 43
debug information, 43
ELF, 43
GHS, 43
Linker, 44
Object Files, 43
Compiling, 43
Customizing
Peripheral, 18
r3930.ini, 16
D
Debug Window, 16
Peripheral window,
debugger
starting, 15
Delete, 23
E
Emulation Module, 10, 11
Emulation Probe, 9
Emulation Solution User I/F,
G
H
GHS
ccmipe, 43
GHS Language Tools,
43
16
15
43
hardware, 24
Hardware Configuration Dialog,
Break In Port, 21
Endian after Reset, 20
Emulation Solution User I/F User’s Guide
20
59
Index
Hitachi-UDI Clock Speed, 21
Hitachi-UDI Connector, 21
Restrict to real time, 20
SFR Reset Value, 23
Trigger Out Port, 21
60
I
Insert,
23
L
Logic Analyzer,
M
Modify,
N
Name,
O
On Chip Debug,
P
Peripheral Window, 16,
Register Class, 16
R
requirements, platform,
Reset, 23
Rising, 21
S
Settings->Configuration->Hardware, 20
T
Target Interface Module,
Target System, 9
V
Value,
Y
You,
10
23
23
9
17
10
9, 10
23
23
Emulation Solution User I/F User’s Guide
Certification and Warranty
Certification and Warranty
Certification
Agilent Technologies certifies that this product met its published specifications at the
time of shipment from the factory. Agilent Technologies further certifies that its
calibration measurements are traceable to the United States National Bureau of
Standards, to the extent allowed by the Bureau’s calibration facility, and to the
calibration facilities of other International Standards Organization members.
Warranty
This Agilent Technologies system product is warranted against defects in materials
and workmanship for a period of 90 days from date of installation. During the
warranty period, Agilent Technologies will, at its option, either repair or replace
products which probe to be defective.
Warranty service of this product will be performed at Buyer’s facility at no charge
within Agilent Technologies service travel areas. Outside Agilent Technologies
service travel areas, warranty service will be performed at Buyer’s facility only upon
Agilent Technologies’ prior agreement and Buyer shall pay Agilent Technologies’
round-trip travel expenses. In all other cases, products must be returned to a service
facility designated by Agilent Technologies.
For products returned to Agilent Technologies for warranty service, Buyer shall
prepay shipping charges to Agilent Technologies and Agilent shall pay shipping
charges to return the products to Buyer. However, Buyer shall pay all shipping
charges, duties, and taxes for products returned to Agilent Technologies from another
country. Agilent Technologies warrants that its software and firmware designated by
Agilent Technologies for use with an instrument will execute its programming
instructions when properly installed on that instrument. Agilent Technologies does
not warrant that the operation of the instrument, or software, or firmware
Emulation Solution User I/F User’s Guide
61
Certification and Warranty
Limitation of Warranty
The foregoing warranty shall not apply to defects resulting from improper or
inadequate maintenance by Buyer, Buyer-supplied software or interfacing,
unauthorized modification or misuse, operation outside of the environment
specifications for the product, or improper site preparation or maintenance.
No other warranty is expressed or implied. Agilent Technologies specifically
disclaims the implied warranties of merchantability and fitness for a particular
purpose.
Exclusive Remedies
The remedies provided herein are buyer’s sole and exclusive remedies. Agilent
Technologies shall not be liable for any direct, indirect, special, incidental, or
consequential damages, whether based on contract, tort, or any other legal theory.
Product maintenance agreements and other customer assistance agreements are
available for Agilent Technologies products.
For any assistance, contact your nearest Agilent Technologies Sales and Service
Office.
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Emulation Solution User I/F User’s Guide
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