MB86H70 Decoder
FACTSHEET
MB86H70
DIGITAL HDTV CHIP
DIGITAL HDTV CHIP
Highly integrated SoC for iDTV sets
Description
The MB86H70 is a highly integrated
System-on-Chip incorporating all the
processing functions required by digital
HDTV receivers particularly for
integrated digital TV sets, including
those for digital video, audio and
graphics.
JTAG
SPDIF
I 2S
Digital
RGB
ARM11
@ 324MHz
Cache
MMU
Audio
Decoder
HD Video
Decoder
AAC, HE-AAC,
MP3, DD, DD+,
MPEG L1/L2
H.264
MPEG-2
TCM
Timer
ITU-R 656
CVBS
LCD PANEL
Video
DAC
LVDS Tx
HD Video Processor
De-Interlacer /
De-Blocking
Scaler /
Enhancer
Colour
Processor
TTX, WSS,
PDC, VBID
PAL / SECAM
Encoder
OSD
The MB86H70 contains Fujitsu’s
original high quality picture engine for
Internal Bus
realising reality motion pictures. This
technology integrates motion adaptive
Interfaces
Transport
de-interlacing, 3:2/2:2 pull down
DMA
Stream Decoder
Controller
USB 2.0
DDR2
UART
IR Rx
Universal
detection, noise reduction and
HS OTG
Memory
Parallel
Controller
2C
I
Controller
ISO7816
Interface
enhanced hybrid filters for featuring
Section
Filter
DPLL
GPIO
PWM
sharpness and clearness by scene,
DVB
Descrambler
automatic setting of the best active tone
...
curve by scene, real 3D colour
management for colour control
2x DDR2
TS Input
Flash
CI
freedom, and more. In addition, Fujitsu
MB86H70 Block Diagram.
provides a picture quality adjustment
tool for emphasing motion picture
quality. The graphical and mouse-operated user interfaces
The MB86H70 incorporates the high performance ARM
help optimise the parameters affecting picture quality.
processor 1176JZF-STM featuring an integrated memory
management unit (MMU), a floating point co-processor,
This high definition media processor is able to decode both
ARM’s Jazelle® technology and Thumb® instruction set
MPEG-2 and H.264/AVC compressed video up to HD
extensions for compact code. The ARM11 provides all the
resolution (1920 x 1080) for DVB HD broadcasting TV
processing power needed to enable a whole host of
system. A dual link 10-bit LVDS video output is integrated for
middleware software. Only two 16-bit DDR2 memories are
connecting an HD LCD panel. Simultaneously, the video
required for HDTV operations, H.264 video/audio decoding
signal can be scaled down and offered in standard definition
and processing the high quality picture enhancement.
(SD) resolution. The picture quality on these SD component
outputs may be optimised by using cross-colour and crossAdvanced connectivity is provided by a USB 2.0 High Speed
luminance filters. Additionally, a digital RGB input and an
On-The-Go (OTG) controller. Integrated peripherals include
ITU-R 656 input are available.
two serial ports, ISO7816 smart card interfaces, three I2C
controllers, LED and keypad controller, IR receiver, SPI
The integrated audio processor can decode a wide variety of
input/ output for serial interface flash, PWM output and 96
audio standards required by the broadcast market such as
GPIO pins. The number of usable GPIOs depends on the
MPEG-1/2 Layer I, II, III and MPEG-4 AAC and HE-AAC.
system configuration since they are shared among other IO
Furthermore, support for Dolby® Digital (AC-3) and Dolby®
functions.
Digital Plus is planned. Available audio outputs are I2S with
delay processing for lip sync, and SPDIF.
1
FACTSHEET
MB86H70
DIGITAL HDTV CHIP
For evaluating the device and starting
software development, Fujitsu offers the
MB86H70 development kit. It
comprises the evaluation board,
documentation, schematics and a
comprehensive software package
including drivers, sample applications,
tools, an operating system and more.
2x DDR2
LCD Panel
(up to 1920 x 1080)
DVB-S2/T
Demodulator
DVB-S2/T
RF Tuner
TS
LVDS
CVBS/RGB
TS
Features
Flash
CI Module
CI-Slot
MB86H70
Digital HDTV Chip
Audio
DAC
CVBS/
Audio
Speaker
RGB/YUV, BT656,
Video
IR_IN
USB
SPDIF, I2S
• Specification
Analogue Front End,
USB
IR Rx
• H.264 high profile / Level 4.0
HDMI
PHY
decoder
• MPEG-2 video main profile /
D-Sub HDMI
SCART
USB
high level decoder
• Resolution
CVBS/Audio
Component/Audio
• Input: 480i, 480p, 576i, 576p,
MB86H70 System Configuration Example.
720p, 1080i, 1080p
• Output: 1920 x 1080, 1366 x 768,
640 x 480
TS processing
• Processing
• Format
• Motion adaptive de-interlacing
• MPEG-2 TS standard
• 3:2 / 2:2 Pull down
• Interface
• Frame rate conversion
• 2 input stream
• Noise reduction
• Built-in DVB de-scrambler
• Enlarge / shrink
• Edge emphasis
CPU
• 3D-LUT dynamic colour management
• ARM1176JZF-S™ @ 324MHz with 16k-I/16k-D cache,
• Interface
16k-I/16k-D TCM, FPU, MMU
• 10-bit digital RGB input
• ITU-R BT. 656 video input
DDR2 memory interface
• Dual link 10-bit LVDS video output
• 2 x 16-bit width DDR2-SDRAM 667
• Supports 256Mbit to 1Gbit SDRAM
Audio
• Format
Peripherals
• MPEG-1/2 Layer 1, 2 and 3 (MP3), MPEG-2/4 AAC
• UPI, USB OTG Link, GPIO, Smart Card, I2C, UART,
®
®
and MPEG-4 HE-AAC, Dolby Digital and Dolby
IR, PWM, low speed ADC, Interrupt, SPI
Digital Plus
• Interface
Packaging
• 5.1 channels
• 484-pin plastic BGA, 27sq. mm (1.0-mm pitch)
• L/R serial, SPDIF
• Additional delay for lip sync
OSD
• Layer
• Video x 1, OSD x 3, background x 1
• Size
• OSD1/2 : 1920 x 1080, OSD3: 480 x 1080
• Format
• 32bpp / 16bpp / 8-bit CLUT
ASK FUJITSU MICROELECTRONICS EUROPE
ARM1176JZF-S is the trademark of ARM Limited. Dolby is a registered trademark of
Dolby Laboratories. Any other trademarks or trade names mentioned are the
property of their respective owners.
2
Contact us on +49(0) 61 03 69 00 or visit
http://emea.fujitsu.com/microelectronics
FME-M18-0908
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