USB 2.0 Port Protection with Charger Detection PI3USB9281A

USB 2.0 Port Protection with Charger Detection PI3USB9281A
PI3USB9281A
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USB 2.0 Port Protection with Charger Detection
Features
Description
 USB-device charger detector
PI3USB9281A provides external detection for any USB-
 Can tolerate USB3.0-PD with VBUS = 20V
device. The part can detect various chargers available in
 USB Charging-type detection
the market, MHL accessories, OTG accessories, and car-
 Battery Charging 1.2 (BC1.2) – DCP
chargers per the CEA936 spec. It also integrates a power
 Battery Charging 1.2 (BC1.2) – CDP
switch with over-voltage and over-current protections.
 Battery Charging 1.2 (BC1.2) – SDP
The VBUSIN input pin can tolerate voltages up to 28V,
 Apple 1A, 2A & 2.4A dedicated chargers
which is important for USB3.0-PowerDelivery enabled
 Samsung-Fast chargers
ports. The new USB-3.0-PowerDelivery specification
 YD/T-1951 dedicated chargers
supports voltages up to 20V.
 CEA-936 Carkit#1 and #2 chargers
The PI3USB9281A can operate over a temperature
 Integrated Power FET
range of -40 to +85°C.
 VBUS Tolerance up to 28V
Typical applications involve portable & consumer
 1.7A Over-Current Protection (OCP)
applications, such as tablet, smart phones, digital
 VBUS Over-Voltage Protection (OVP)
cameras, and notebooks with integrated Li-ion batteries
 Non-charging Accessory Detection
that charge via USB connectors.
 USB On-The-Go (OTG) detection
Block Diagram
 Mobile HDMI Link (MHL) device detection
 Wide Supply Voltage Range 3V to 5.5V
 I2C Programmability
 Small Package:
 CSP 1.5x2.0-15L
 UQFN 3x4x0.5mm 20L
Applications
 Personal Media Players
 Mobile Phones
 Tablet
Figure 1. PI3USB9281A Block diagram
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PI3USB9281A
USB 2.0 Port Protection with Charger Detection
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INTB
VBUS
DET
VBUS
OUT
VBUS
IN
B
VDDIO
SDA
SCL
ID
D-
A
ENB
DNH
DPH
GND
D+
2
3
4
5
Figure 2a CSP 1.5x2.0-15L with 0.4mm Pitch
VBUSIN
D-
VBUSOUT
DPH
SCL
DNH
SDA
NC
INTB
NC
VBAT
NC
1
NC
NC
VBAT
VBUSDET
ENB
C
GND
VDDIO
Top View
D+
ID
Pin Configuration
Figure 2b UQFN 20L (3 x 4 x0.5 mm)
Pin Descriptions
Name
Type
Default State
DPH
Signal Path
Open
DNH
Signal Path
Open
Connector Interface
ID
Signal Path
Open
Description
USB Interface
D+
Signal Path
Open
DSignal Path
VBUSIN
Power Path
Power Interface
Open
NA
VBAT
Power
VDDIO
Power
ENB
Input
GND
Power
Charger Interface
VBUSOUT
Power Path
Open-Drain
VBUSDET
Output
I2C Interface
SCL
Input
SDA Open-Drain I/O
INTB
CMOS Output
NC
D+ signal switch path, dedicated USB port to be connected to the resident USB
transceiver on the device
D- signal switch path, dedicated USB port to be connected to the resident USB
transceiver on the device
Connected to the USB connector ID pin and used for detecting accessories
Connected to the USB connector D+ pin; depending on the signaling
mode
Connected to the USB connector D- pin; depending on the signaling mode
Input voltage supply pin to be connected to the VBUS pin of the USB connector
NA
Hi-Z
NA
Input voltage supply pin to be connected to the device battery output or to an
internal regulator
Baseband processor interface I/O supply pin
System enable for the circuit (Active Low)
Ground
NA
Output voltage supply pin to be connected to the source voltage pin on the charger IC
Hi-Z
Open-drain active LOW output when VBUSIN is valid
Hi-Z
Hi-Z
I2C serial clock signal to be connected to the phone-based I2C master
I2C serial data signal to be connected to the phone-based I2C master
Interrupt active LOW output used to prompt the phone baseband processor to read the I2C
register bits, indicates a change in ID pin status or accessory attach status
No Connection
NA
LOW
Hi-Z
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USB 2.0 Port Protection with Charger Detection
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Maximum Ratings
Storage Temperature .................................................................................. -65oC to +150oC
Supply Voltage from Battery/Baseband ......................................................-0.5V to +6.5V
Supply Voltage from Micro-USB Connector ......................................... -0.5V to +28.0V
Switch I/O Voltage USB.................................................................................-1.0V to +5.5V
Input Clamp Diode current .............................................................................................50mA
Charger Detect Pin Sink current (VBUSDET) ..........................................................30mA
Switch I/O Current (Continuous) USB ........................................................................50mA
Switch I/O Switch Peak Current (Pulsed at 1ms Duration, <10% Duty Cycle)
USB, and All Other Channels ..................................................................................... 150mA
Charger FET ............................................................................................................................2A
ESD: HBM .....................................................................................................................3500V
HBM (USB connector pins: VBUSIN, D+, D-, ID to GND)....................6500V
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the
device. This is a stress rating only and functional
operation of the device at these or any other
conditions above those indicated in the operational
sections of this specification is not implied.
Exposure to absolute maximum rating conditions
for extended periods may affect reliability.
Recommended operation conditions
Symbol
VBAT
VBAT_TH
VBUSIN
VDDIO
VSW
CID
TA
Parameter
Battery Supply Voltage
Battery Supply Voltage Threshold
VBUSIN Pin Supply Voltage
Processor Supply Voltage
Switch I/O Voltage
USB Path Active
Capacitive Load on ID Pin for Reliable Accessory Detection
Operating Temperature
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Min.
3.0
4.0
1.8
0
0
-40
Max.
5.5
3.0
5.5
5.5
3.6
1.0
85
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Units
V
V
V
V
V
nF
°C
05/29/15
PI3USB9281A
USB 2.0 Port Protection with Charger Detection
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Switch Path DC Electrical Characteristics
Min and Max apply for T A between -40°C to 85°C and TJ up to +125°C (unless otherwise noted). Typical values are
referenced to T A=+25°C
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
USB Data Switches (D+, D-)
RONUSB
USB Switch On-Resistance ILOAD = 8mA, VD+ / D-= 0V, 0.4V
2.5
3.3
USB Analog Signal Voltage Range
VBAT=3.0 to 4.4V
0
3.6
Charging FET Switch
VBUS_th VBUSIN Detection Threshold Voltage, VBAT=3.6V, ENB=0V
3.1
VBUS_hys VBUSIN Detection Hysteresis Voltage, VBAT=3.6V, ENB=0V
VOVP
RONCHG
Over-Voltage Protection (OVP) Threshold Voltage
Charging FET On-Resistance
VBUSIN=4.2V-5.0V, ILOAD=1A, CSP 15L
VBUSIN=4.2V-5.0V, ILOAD=1A, QFN 20L
Over-Current Protection (OCP)
VBUSIN=5V
Threshold Current(2)
Host Interface Pins (INTB, VBUSDET)
IOCP
VOH
Output High Voltage
VOL
Output Low Voltage
Current Consumption
ICC
ISTANDBY
Battery Supply Current
Battery Supply
Standby Current
Power-Off Leakage Current
Off Leakage Current
Short-Circuit Current(2)
IOH=2mA, VBAT=3.0 to 4.4V
IOL=10mA, VBAT=3.0 to 4.4V
No Accessory Static Current,
VBAT=3.6V,VBUSIN=0V
With Accessory Static Current,
VBAT=3.6V,VBUSIN=0V
With Accessory Static Current,
VBAT=3.6V,VBUSIN=5V
VBAT=3.6V,VBUSIN=0V,ENB=3.6V
3.5
100
Test Conditions
VBAT=3.8V , f=1MHz
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V
mV
6.8
7.2
V
-
100
150
150
200
mΩ
mΩ
1.4
1.7
2.0
A
-
-
V
-
0.4
V
-
20
30
µA
-
50
80
µA
-
-
1
µA
-
-
1
µA
10
0.1
-
µA
µA
mA
Max.
-
Units
pF
0.7×
VDDIO
-
Min.
-
Typ.
4.0
PT0529-3
4
Ω
V
6.2
IOFF
VBAT=0V, VSW=0 to 4.4V
ION(OFF)
VBAT=3.0 to 4.4V, I/O pins=0.3V, 4.1V
-0.1
0.001
IIDSHORT
VBAT=3.0 to 4.4V, ID=0V
5
Note:
1. On-resistance is the voltage drop between the two terminals at the indicated current through the switch.
2. Limits based on electrical characterization data.
Capacitance (TA = -40°C to 85°C)
Symbol
Parameter
CONUSB
D+, D- On Capacitance (USB Mode)
3.7
Units
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PI3USB9281A
USB 2.0 Port Protection with Charger Detection
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Switch AC Electrical Characteristics
Min and Max apply for T A between -40°C to 85°C and TJ up to +125°C (unless otherwise noted). Typical values are
referenced to T A=+25°C, VBAT=3.8V.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
BWUSB
-3dB Bandwidth of USB channel
1300
OIRR
OFF-Isolation
USB Mode
f=1MHz, RS=50Ω, CL=0
-70
f=1MHz, RS=50Ω, CL=0
-70
Active Channel
XTALK
USB Mode
Crosstalk D+ to Df=240MHz, RS=50Ω, CL=0
-30
Skew of Opposite Transitions of the Same tr=tf=750ps (10-90%) at
tSK(P)
30
Output (USB Mode)
240MHz, CL=0pF, RL=50Ω
2
2
Time When I C_SDA and I C_SCL Both
tI2CRST
15
LOW to Cause a Reset
Time after INT Mask Cleared to “0” until
INTB Goes LOW to Signal the Interrupt
tINTMASK
5
after Interruptible Event while INT Mask
Bit Set to “1”
Time from VBUSIN Valid to VBUSOUT Valid
with Charger FET Closed and USB
tSDPDET
See Figure 6
200
Switches Closed for USB Standard
Downstream Port
Time from VBUSIN Valid to VBUSOUT Valid
tCHGOUT
with Charger FET Closed for USB See Figure 4 and Figure 5
200
Charging Ports(CDP and DCP)
Time from VBUSIN Valid to Car Kit Type 1
tCARKIT
See Figure 8
130
or Type 2 Charger Detected
Time from ID Not Floating to INTB LOW
tIDDET
to Signal Accessory Attached that is ID See Figure 9
100
Resistance-Based Only (VBUSIN Not Valid)
Units
MHz
dB
dB
ps
ms
us
ms
ms
ms
ms
I2C Controller DC Electrical Characteristics
Symbol
VIL
VIH
VHYS
VOL1
II2C
CI
Parameter
Low-Level Input Voltage
High-Level Input Voltage
VDDIO>2V
VDDIO<2V
Low-Level Output Voltage at 3mA Sink Current (Open- VDDIO>2V
Drain)
VDDIO<2V
Input Current of I2C SDA and SCL Pins, Input Voltage 0.26V to2.34V
Capacitance for Each I/O Pin
Hysteresis of Schmitt Trigger Inputs
Fast Mode (400kHz)
Min.
Max.
-0.5
0.3VDDIO
0.7VDDIO
0.05VDDIO
0.1VDDIO
0
0.4
0.2VDDIO
-10
10
10
Units
V
V
V
V
µA
pF
I2C AC Electrical Characteristics
Symbol
fSCL
Parameter
SCL Clock Frequency
Hold Time (Repeated) START Condition
LOW Period of SCL Clock
HIGH Period of SCL Clock
Set-up Time for Repeated START Condition
Data Hold Time
Data Set-up Time(1)
Rsie Time of SDA and SCL Signals(2)
Fall Time of SDA and SCL Signals(2)
Set-up Time for STOP Condition
Bus-Free Time between STOP and START Conditions
Pulse Width of Spikes that Must Be Suppressed by the Input Filter
Fast Mode (400kHz)
Min.
Max.
0
400
0.6
1.3
0.6
0.6
0
0.9
100
20+0.1Cb
300
20+0.1Cb
300
0.6
1.3
0
50
Units
kHz
µs
µs
µs
µs
µs
ns
tHDSTA
tLOW
tHIGH
tSETSTA
tHDDAT
tSETDAT
tr
ns
tf
tSETSTO
µs
tBUF
µs
tSP
ns
Notes:
1. A fast-mode I2C-bus device can be used in a standard-mode I2C-bus system, but the requirement t SETDAT ≥ 250ns must be met.
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USB 2.0 Port Protection with Charger Detection
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This is automatically the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the
LOW period of the SCL signal, it must output the next data bit to the SDA line tr_max + tSETDAT = 1000 + 250 = 1250ns
(according to the standard-mode I2C bus specification) before the SCL line is released.
2. Cb equals the total capacitance of one BUS line in pF. If mixed with high-speed devices, faster fall times are allowed according
to the I2C specification.
Definition of Timing for Full-Speed Mode Devices on the I2C Bus
Name
Slave Address
Size (Bits)
8
Table 2. I2C Slave Address
Bit 7
Bit 6
Bit 5
Bit 4
0
1
0
0
Bit 3
1
Bit 2
0
Bit 1
1
Bit 0
R/W
Table 3 Register Map
Address Register Type
01H
Device
ID
Reset
Value
Bit 7
Read 00000000
Bit 6
Bit 5
Bit 4
03H
05H
Control
Bit 1
Manual Switch
Reserved:
0: Open all
0: Manual
-Read 1
switches
configuration
-Write 1
1: Switch
1: Automatic
based on
configuration
detection
Reserved
OCP Event OVP Event
-Read xxx, -Write 000
OVP&OCP
Recovery
0: OVP and/or
0: No OCP 0: No OVP
Read/
Interrupt
00000000 OCP event not
event
event
Clear
recovered
1: OVP and/or
1: OCP
1: OVP
OCP event
event
event
recovered
OVP&OCP
OCP
OVP
1: Mask
OVP&OCP
Recovery
interrupt
1: Mask
1: Mask
OCP Event OVP Event
interrupt
interrupt
Bit 0
Vendor ID(Pericom): 000
Reserved:
-Read xxx
-Write 000
Read/
00011111
Write
Interrupt Read/
00000000
Mask Write
Bit 2
Version ID : 00011
Switch Open
02H
Bit 3
Reserved:
-Read 1
-Write 1
Global
Interrupt
Mask
0: Does not
Mask
Interrupts
1: Mask
Interrupts
Detach
Attach
0: No Interrupt
Reserved:
-Read xxx, -Write 000
Reserved: -Read xxx, -Write 000
0: No Interrupt Mask
Reserved:
-Read xxx, -Write 000
1: accessory 1: accessory
detached
attached
Detach
Attach
1: Mask
Detach
interrupt
1: Mask
Attach
interrupt
To be continued.
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USB 2.0 Port Protection with Charger Detection
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Register Map (Continuously.)
Address Register Type
Reset
Value
Reserved
Read 00000000 -Read x,
-Write 0
0AH
Device
Type
0EH
Charger
Read 00000000
Status
13H
1BH(2)
1DH
Bit 7
Bit 6
Bit 5
USB
Charging
(DCP)
USB
Charging
(CDP)
1: USB
1: USB
dedicated
charging
charging port downstream
(DCP)
port (CDP)
detected
detected
Reserved:
-Read xxx
-Write 000
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reserved:
USB Data
-Read x,
OTG
MHL
(SDP)
-Write 0
0: No Detect
1: USB
1: USB
Reserved standard 1: USB OTG or
Car Kit
1: MHL
-Read x, downstream Unidentified
Charger
detected
-Write 0 port (SDP) Devices detected
detected
detected
Apple Charger Type
Charger Type
0: No Detect
00: No connection
1: 2.4A
1: 2A
1: 1A
01: Reserved Charger
Apple
Apple
Apple
10: Car Kit charger type1
charger
charger
charger
11: Car Kit charger Type 2
detected
detected detected
D+ Connection
VBUS Connection
Car Kit
Charger
D- Connection
Manual Read/
00000000 000: Open D- switch
000: Open D+ switch
00: Open VBUS switch
Switch Write
001: D- connected to DNH of USB port 001: D+ connected to DPH of USB port 11: VBUSOUT connected to VBUSIN
Reset
0: No Reset
Read/
Reset
x0001000
Reserved: -Read xxxxxxx, -Write 0000000
1: Reset
Write
(Always
reads 0)
VBUSIN
Valid
Reserved: 0: VBUSIN Not
VBUS Read 00000000
Reserved: -Read xxxxxx, -Write 000000
Read x, Valid
Write 0
1: VBUSIN Valid
after 100ms
Note:
1.
Register address 04H, 06H, 07H, 08H, 09H, 0BH, 0CH, 0DH, 0FH, 10H, 11H, 12H, 14H, 15H, 16H, 17H, 18H, 19H,
1AH, 1CH, 1EH, 1FH, 20H and 21H are reserved.
2. 1BH reset should not be applied during the cycle of the device detection. Normally, it would be applied at least 40ms
after the device detection completed.
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PI3USB9281A
USB 2.0 Port Protection with Charger Detection
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Functional Description
USB Port Accessory Detection List
Summarized below in Table 4 are the types of USB2.0 ports that PI3USB9281A can detect.
Table 4. ID and VBUSIN Detection for USB Devices
ID Resistance to GND (5)
Min.
Typ.
Max.
GND
GND
GND
950Ω
1kΩ
1.05Ω
190kΩ
200kΩ
210kΩ
419.9kΩ
442kΩ
464kΩ
3MΩ
Open
Open
3MΩ
Open
Open
3MΩ
Open
Open
VBUS
D+
D-
x
x
5V
5V
5V
5V
5V
x
x
x
x
2V
2.7V
2.7V
x
x
x
x
2.7V
2V
2.7V
USB
switch
Enable
Disable
Enable
Enable
Enable
Enable
Enable
5V
(3)
(3)
Enable
3MΩ
Open
Open
5V
5V
(3)
(3)
(3)
(3)
Enable
Enable
3MΩ
3MΩ
Open
Open
Open
Open
Accessory Detected(1)
OTG
MHL
Car Kit Type 1 Charger(2)
Car Kit Type 2 Charger(2)
1A Apple Charger
2A Apple Charger
2.4A Apple Charger
USBBC1.2 DCP mode or Samsung
FAST Charger (4)
USB BC1.2 CDP Mode
USB BC1.2 SDP Mode
Notes:
1. The accessory type is reported in the Device Type 1 (0Ah) and Charger Status (0Eh) registers with each valid accessory
detection.
2. Follows the ANSI/CEA-936-A USB Car Kit specification.
3. The PI3USB9281A follows the Battery Charging 1.2 specification, which uses D+ and D- to determine what USB accessory
is attached.
4. Samsung 1.2V fast charger will recognize as DCP attachment and enable the fast charging operation.
5. For devices with ID resistance other than those listed in Table 1, PI3USB9281A reports device attachment through I2C to the
embedded controller. The Unknown devices are mapped to OTG such that data switches are turned on to allow embedded
controller to communicate and identify the unknown devices through USB protocols.
VBUSIN Detection Scheme
VBUSDET pin is used to indicate VBUSIN voltage level. The VBUSIN comparator stays awake in all cases including disable
state (ENB=HIGH) and dead battery case (VBAT=0V). Tables below summarize the detection behavior for VBUSIN detection.
All charger detections are disabled in disable state (ENB=HIGH). PI3USB9281A will undergo charger detection when the system
is recovered from disable state (ENB = Transit from HIGH to LOW).
Table 5 VBUSDET outputs
VBUSIN Voltage level
VBUSIN < 3.4V
VBUSIN ≧ 3.5V
VBUSDET
High Impedance
Low
Table 6. Power supplies and control
Power supplies and control
VBUSIN VBAT Supply
ENB
Low
Low
X(Don’t care)
High
Low
Low (Enabled)
High
Low
High (Disabled)
High
High
Low (Enabled)
High
High
High (Disabled)
Functionality
VBUSDET
High Impedance
Low with 30us wake up time
Low with 30us wake up time
Low
Low
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I2C & Registers
Reset
Normal operation
Reset
Normal operation
Reset
BC1.2 Detection
No charger plugin
Charger detected
Detection disabled
Charger detected
Detection disabled
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PI3USB9281A
USB 2.0 Port Protection with Charger Detection
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USB Port Detection Flowchart
Yes
ID = GND
Standby
No
No
Yes
ID = 200kΩ
Yes
OTG
VBUS > 3.5V
No
ID = 1kΩ
Yes
MHL
No
ID = 442kΩ
Yes
CarKit1
No
D+ > 2.35V
Yes
No
D- > 2.35V
Yes
No
2.4 A
Apple
Charger
CarKit2
2A
Apple
Charger
1A
Apple
Charger
Yes
D- > 2.35V
No
Primary detect
D- = 0.6V
Yes
Secondary detect
D+ = 0.6V
No
SDP
No
Yes
DCP
CDP
Figure 3. Accessory detection flowchart
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USB 2.0 Port Protection with Charger Detection
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USB Port Detection Timing
The following figures show the attach timing of the USB after insertion of accessories and the relationship between the INTB
assertion and the VBUSDET assertion. PI3USB9281A has incorporated a VBUS de-bounce circuit that waits a settle time of the
USB cable.
Charger FET closed, INTB
asserted and registers written
VBUSIN≧3.5V
VBUSIN Voltage
ID Floating
VBUSIN Valid 130ms
250ms
VBUSOUT
Charger detection 70ms
Closed
Open
USB switch
INTB Pin
VBUSDET Pin
Figure 4. USB Charging Downstream Port (CDP) Attach Timing
Charger FET closed, INTB
asserted and registers written
VBUSIN≧3.5V
VBUSIN Voltage
ID Floating
200ms
VBUSOUT
USB switch
Closed
Open
INTB Pin
VBUSDET Pin
Figure 5. USB Dedicated Charging Port (DCP) Attach Timing
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USB 2.0 Port Protection with Charger Detection
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Charger FET closed, INTB
asserted and registers written
VBUSIN≧3.5V
VBUSIN Voltage
ID Floating
200ms
VBUSOUT
Closed
Open
USB switch
INTB Pin
VBUSDET Pin
Figure 6. USB Standard Downstream Port (SDP) Attach Timing
Charger FET closed, INTB
asserted and registers written
VBUSIN≧3.5V
VBUSIN Voltage
ID Floating
200ms
VBUSOUT
USB switch
Closed
Open
INTB Pin
VBUSDET Pin
Figure 7. Apple Chargers (1A/2A/2.4A) Attach Timing
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USB 2.0 Port Protection with Charger Detection
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Charger FET closed, INTB
asserted and registers written
VBUSIN≧3.5V
VBUSIN Voltage
ID Floating
130ms
VBUSOUT
Switch State
Closed
Open
INTB Pin
VBUSDET Pin
Figure 8. Car Kit Type 1 and 2 Timing
ID
Floating
10ms
90ms
INTB Pin
PI3USB9281A PI3USB9281A
remains silent for performs ID
PD chip to do
Detection
detection first
Figure 9. USB Power Delivery (PD) Cables and Other Accessories Detection Timing
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USB 2.0 Port Protection with Charger Detection
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TYPICAL CHARACTERISTICS
Frequency response curve for USB switch channel (D+ to DPH,3db BW=1.3G))
Eye diagram for USB 2.0 High Speed
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USB 2.0 Port Protection with Charger Detection
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Mechanical Information
CSP 1.5 x 2.0-15L
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USB 2.0 Port Protection with Charger Detection
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20-Lead UQFN (3×4×0.55mm)
Ordering Information
Part No.
PI3USB9281AGEEX
PI3USB9281AXWEX
Package Code
GE
XW
Package
15-Pin 1.5×2.0×0.5mm CSP package, Tape & Reel
Lead free and Green 20-Lead 3×4×0.5mm UQFN package, Tape & Reel
Notes:

E = Pb-free and Green

Adding X Suffix= Tape/Reel
Pericom Semiconductor Corporation  1-800-435-2336  www.pericom.com
Pericom reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and to supply
the best possible product. Pericom does not assume any responsibility for use of any circuitry described other than the circuitry embodied in Pericom product. The
company makes no representations that circuitry described herein is free from patent infringement or other rights, of Pericom.
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