1A Step Down Converter in 2 x 2 SON Package (Rev. C)
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TPS62590
SLVS897C – JANUARY 2009 – REVISED DECEMBER 2015
TPS62590 1-A Step Down Converter in 2-mm × 2-mm WSON Package
1 Features
3 Description
•
•
•
•
•
•
The TPS62590 device is a high-efficiency
synchronous step down converter, optimized for
battery powered portable applications. The device
provides up to 1000-mA output current from batteries,
such as single Li-Ion or other common chemistry AA
and AAA cells.
1
•
Output Current up to 1000 mA
Input Voltage Range from 2.5 V to 5.5 V
Output Voltage Accuracy in PWM Mode ±2.5%
Typical 15-μA Quiescent Current
100% Duty Cycle for Lowest Dropout
Available in a 2 mm × 2 mm × 0.8 mm WSON
Package
For Improved Features Set, See the TPS62290
device (SLVS764)
2 Applications
•
•
•
•
•
Mobile Phones, Smart Phones
Tablet PCs
WLAN
Low Power DSP Supply
Point-of-Load (POL) Applications
With an input voltage range of 2.5 V to 5.5 V, the
device is targeted to power a large variety of portable
handheld equipment or POL applications.
The TPS62590 family operates at 2.25-MHz fixed
switching frequency and enters a power save mode
operation at light load currents to maintain a high
efficiency over the entire load current range.
The power save mode is optimized for low output
voltage ripple. For low noise applications, the device
can be forced into fixed frequency pulse width
modulation (PWM) mode by pulling the MODE pin
high. In the shutdown mode the current consumption
is reduced to less than 1 µA. The TPS62590 allows
the use of small inductors and capacitors to achieve a
small solution size.
The TPS62590 is available in a 2-mm × 2-mm 6-pin
WSON package.
Device Information(1)
PART NUMBER
PACKAGE
TPS62590
BODY SIZE (NOM)
WSON (6)
2.00 mm × 2.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application Schematic
Efficiency vs Output Current
100
2.5 V to 5.5 V
4
CIN
10mF
2
VIN
SW
1
EN
FB
3
GND
6
L
2.2 mH
R1
C1
70
COUT
R2
10mF
VI = 5 V
80
0.75 V to VIN
22pF
MODE
PwrPAD
90
VOUT
Efficiency - %
TPS62590DRV
5
VI N
VI = 4.2 V
VI = 3.8 V
60
50
40
30
VOUT = 3.3 V,
MODE = GND,
L = 2.2 mH
20
10
0
0.0001
0.001
0.01
IO - Output Current - A
0.1
1
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS62590
SLVS897C – JANUARY 2009 – REVISED DECEMBER 2015
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
4
4
4
4
5
6
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description .............................................. 7
7.1
7.2
7.3
7.4
Overview ...................................................................
Functional Block Diagram .........................................
Feature Description...................................................
Device Functional Modes..........................................
7
7
8
9
8
Application and Implementation ........................ 11
8.1 Application Information............................................ 11
8.2 Typical Application .................................................. 11
8.3 System Example ..................................................... 16
9 Power Supply Recommendations...................... 16
10 Layout................................................................... 17
10.1 Layout Guidelines ................................................. 17
10.2 Layout Example .................................................... 17
11 Device and Documentation Support ................. 18
11.1
11.2
11.3
11.4
11.5
11.6
Device Support......................................................
Documentation Support ........................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
18
18
18
18
18
18
12 Mechanical, Packaging, and Orderable
Information ........................................................... 18
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (April 2011) to Revision C
•
Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
Changes from Revision A (November 2009) to Revision B
•
2
Page
Page
Replaced the DISSIPATION RATINGS with the THERMAL INFORMATION table............................................................... 4
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SLVS897C – JANUARY 2009 – REVISED DECEMBER 2015
5 Pin Configuration and Functions
DRV Package
6-Pin WSON
Top View
SW
MODE
FB
1
2
3
ed
os al
p
m
Ex her ad
T P
6
5
4
GND
VIN
EN
Pin Functions
PIN
NAME
NO.
TYPE (1)
DESCRIPTION
EN
4
I
This is the enable pin of the device. Pulling this pin to low forces the device into shutdown mode.
Pulling this pin to high enables the device. This pin must be terminated.
Exposed
Thermal Pad
–
–
Must be soldered to achieve appropriate power dissipation. Should be connected to GND.
FB
3
I
Feedback pin for the internal regulation loop. Connect the external resistor divider to this pin. In
case of fixed output voltage option, connect this pin directly to the output capacitor.
GND
6
P
GND supply pin
MODE
2
I
MODE pin = High forces the device to operate in fixed-frequency PWM mode. Mode pin = Low
enables the power save mode with automatic transition from PFM mode to fixed-frequency PWM
mode.
SW
1
O
This is the switch pin and is connected to the internal MOSFET switches. Connect the external
inductor between this terminal and the output capacitor.
VIN
5
P
VIN power supply pin
(1)
I = Input, O = Output, P = Power
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
VIN
MIN
MAX
Input voltage (2)
–0.3
7
Voltage at EN, MODE
–0.3
VIN + 0.3, ≤ 7
Voltage on SW
–0.3
7
Peak output current
UNIT
Internally limited
V
A
TJ
Maximum operating junction temperature
–40
125
°C
Tstg
Storage temperature
–65
150
°C
(1)
(2)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101, all pins (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
MIN
VIN
Supply voltage
MAX
UNIT
2.5
5.5
Output voltage for adjustable voltage
0.75
VIN
V
V
TA
Operating ambient temperature
–40
85
°C
TJ
Operating junction temperature
–40
125
°C
6.4 Thermal Information
TPS62590
THERMAL METRIC (1)
DRV (WSON)
UNIT
6 PINS
RθJA
Junction-to-ambient thermal resistance
67.8
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
88.5
°C/W
RθJB
Junction-to-board thermal resistance
37.2
°C/W
ψJT
Junction-to-top characterization parameter
2.0
°C/W
ψJB
Junction-to-board characterization parameter
37.6
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
7.9
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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6.5 Electrical Characteristics
Over full operating ambient temperature range, typical values are at TA = 25°C. Unless otherwise noted, specifications apply
for condition VIN = EN = 3.6 V. External components CIN = 10 μF 0603, COUT = 10 μF 0603, L = 2.2 μH, refer to parameter
measurement information.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY
VIN
Input voltage range
IOUT
Output current
IQ
Operating quiescent current
ISD
Shutdown current
UVLO
Undervoltage lockout threshold
2.5
5.5
VIN 2.7 V to 5.5 V
1000
VIN 2.5 V to 2.7 V
600
V
mA
IOUT = 0 mA, PFM mode enabled
(MODE = GND) device not switching,
see (1)
15
μA
IOUT = 0 mA, switching with no load
(MODE = VIN) PWM operation,
VOUT = 1.8 V, VIN = 3 V
3.8
mA
0.5
μA
EN = GND
Falling
1.85
Rising
1.95
V
ENABLE, MODE
VIH
High level input voltage, EN,
MODE
2.5 V ≤ VIN ≤ 5.5 V
1
VIN
V
VIL
Low level input voltage, EN,
MODE
2.5 V ≤ VIN ≤ 5.5 V
0
0.4
V
IIN
Input bias current, EN, MODE
EN, MODE = GND or VIN
1
μA
0.01
POWER SWITCH
RDS(on)
ILIMF
TSD
High side MOSFET on-resistance
Low side MOSFET on-resistance
250
VIN = VGS = 3.6 V, TA = 25°C
mΩ
190
Forward current limit MOSFET
high side and low side
VIN = VGS = 3.6 V
Thermal shutdown
Increasing junction temperature
140
Thermal shutdown hysteresis
Decreasing junction temperature
20
1.19
1.4
1.68
A
°C
OSCILLATOR
fSW
Oscillator frequency
2.5 V ≤ VIN ≤ 5.5 V
2.25
MHz
OUTPUT
VO
Adjustable output voltage range
VREF
Reference voltage
0.75
VI
600
VFB(PWM)
Feedback voltage
MODE = VIN, PWM operation,
2.5 V ≤ VIN ≤ 5.5 V, see (2)
VFB(PFM)
Feedback voltage PFM mode
MODE = GND, device in PFM mode,
+1% voltage positioning active, see (1)
Load regulation
–2.5%
0%
2.5%
–1
%/A
500
μs
μs
tStart Up
Start-up time
tRamp
VOUT ramp-up time
Time to ramp from 5% to 95% of VOUT
250
Leakage current into SW pin
VIN = 3.6 V, VIN = VOUT = VSW, EN =
GND,
see (3)
0.1
(1)
(2)
(3)
mV
1%
Time from active EN to reach 95% of
VOUT
Ilkg
V
1
μA
In PFM mode, the internal reference voltage is set to typical 1.01 × VREF . See the parameter measurement information.
For VIN = VOUT + 1 V.
In fixed output voltage versions, the internal resistor divider network is disconnected from FB pin.
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6.6 Typical Characteristics
0.8
20
0.7
18
0.6
IQ – Quiescent Current – mA
ISD - Shutdown Current Into VIN − mA
EN = GND
o
TA = 85 C
0.5
0.4
0.3
0.2
o
TA = -40oC
TA = 25 C
MODE = GND,
EN = VIN,
Device Not Switching
16
o
TA = 25 C
14
12
o
TA = -40 C
10
0.1
0
2.5
3
3.5
4
4.5
5
8
2.5
5.5
3
3.5
VIN − Input Voltage − V
High Side Switching
0.7
0.6
o
TA = 85 C
0.5
o
TA = 25 C
0.4
0.3
0.2
0
2.5
o
TA = -40 C
3
3.5
4
5
5.5
4.5
5
VIN − Input Voltage − V
Figure 3. Static Drain-Source ON-State Resistance
vs Input Voltage
Figure 2. Quiescent Current vs Input Voltage
RDS(on) - Static Drain-Source On-State Resistance − W
RDS(on) - Static Drain-Source On-State Resistance − W
0.8
0.1
4.5
4
VIN − Input Voltage − V
Figure 1. Shutdown Current onto VIN vs Input Voltage
6
o
TA = 85 C
0.4
Low Side Switching
0.35
0.3
o
TA = 85 C
0.25
o
TA = 25 C
0.2
0.15
0.1
o
0.05
0
2.5
TA = -40 C
3
3.5
4
4.5
5
VIN − Input Voltage − V
Figure 4. Static Drain-Source ON-State Resistance
vs Input Voltage
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7 Detailed Description
7.1 Overview
The TPS62590 step-down converter operates with typically 2.25-MHz fixed frequency pulse width modulation
(PWM) at moderate to heavy load currents. At light load currents, the converter can automatically enter power
save mode and operates then in pulse frequency modulation (PFM) mode.
During PWM operation, the converter use a unique fast response voltage mode controller scheme with input
voltage feed-forward to achieve good line and load regulation allowing the use of small ceramic input and output
capacitors. At the beginning of each clock cycle initiated by the clock signal, the high-side MOSFET switch is
turned on. The current flows now from the input capacitor through the high-side MOSFET switch through the
inductor to the output capacitor and load. During this phase, the current ramps up until the PWM comparator trips
and the control logic turns off the switch. The current limit comparator also turns off the switch if the current limit
of the high-side MOSFET switch is exceeded. After a dead time preventing shoot through current, the low-side
MOSFET rectifier is turned on and the inductor current ramps down. The current flows now from the inductor to
the output capacitor and to the load. It returns to the inductor through the low-side MOSFET rectifier.
The next cycle is initiated by the clock signal again turning off the low-side MOSFET rectifier and turning on the
high-side MOSFET switch.
7.2 Functional Block Diagram
VIN
EN
Thermal
Shutdown
Current
Limit Comparator
Softstart
VOUT RAMP
CONTROL
VIN
High Side
Reference
0.6 V VREF
PFM Comp
FB
VREF
MODE
Undervoltage
Lockout 1.8 V
MODE
Error Amp
Control
Stage
Gate Driver
Anti
Shoot-Through
SW
VREF
Integrator
FB
Zero-Pole
AMP.
PWM
Comp .
GND
Low Side
Sawtooth
Generator
2.25 MHz
Oscillator
Current
Limit Comparator
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7.3 Feature Description
7.3.1 Dynamic Voltage Positioning
This feature reduces the voltage undershoots and overshoots at load steps from light to heavy load and vice
versa. It is active in power-save mode and regulates the output voltage 1% higher than the nominal value. This
provides more headroom for both the voltage drop at a load step, and the voltage increase at a load throw-off.
Output voltage
Voltage Positioning
Vout +1%
PFM Comparator
threshold
Light load
PFM Mode
Vout (PWM)
moderate to heavy load
PWM Mode
Figure 5. Power-Save Mode Operation
7.3.2 Undervoltage Lockout
The undervoltage lockout circuit prevents the device from malfunctioning at low input voltages and from
excessive discharge of the battery and disables the output stage of the converter. The undervoltage lockout
threshold is typically 1.85 V with falling VIN.
7.3.3 Mode Selection
The MODE pin allows mode selection between forced PWM mode and power-save mode.
Connecting this pin to GND enables the power-save mode with automatic transition between PWM and PFM
mode. Pulling the MODE pin high forces the converter to operate in fixed frequency PWM mode even at light
load currents. This allows simple filtering of the switching frequency for noise-sensitive applications. In this mode,
the efficiency is lower compared to the power-save mode during light loads.
The condition of the MODE pin can be changed during operation and allows efficient power management by
adjusting the operation mode of the converter to the specific system requirements.
7.3.4 Enable
The device is enabled setting EN pin to high. During the start-up time tStart Up the internal circuits are settled.
Afterwards, the device activates the soft-start circuit. The EN input can be used to control power sequencing in a
system with various DC–DC converters. The EN pin can be connected to the output of another converter, to
drive the EN pin high and getting a sequencing of supply rails. With EN = GND, the device enters shutdown
mode. In this mode, all circuits are disabled. In fixed output voltage versions, the internal resistor divider network
is disconnected from FB pin.
7.3.5 Thermal Shutdown
As soon as the junction temperature TJ exceeds 140°C (typical) the device goes into thermal shutdown. In this
mode, the high-side and low-side MOSFETs are turned off. The device continues its operation when the junction
temperature falls below the thermal shutdown hysteresis.
8
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7.4 Device Functional Modes
7.4.1 Soft-Start
The TPS62590 has an internal soft-start circuit that controls the ramp up of the output voltage. The output
voltage ramps up from 5% to 95% of its nominal value within typical 250 μs. This limits the inrush current in the
converter during ramp up and prevents possible input voltage drops when a battery or high impedance power
source is used. The soft start circuit is enabled within the start up time tStart Up.
7.4.2 Power-Save Mode
The power-save mode is enabled with MODE pin set to low level. If the load current decreases, the converter will
enter power save mode operation automatically. During power save mode the converter skips switching and
operates with reduced frequency in PFM mode with a minimum quiescent current to maintain high efficiency. The
converter will position the output voltage +1% above the nominal output voltage typically. This voltage positioning
feature minimizes voltage drops caused by a sudden load step.
The transition from PWM mode to PFM mode occurs once the inductor current in the low-side MOSFET switch
becomes zero, which indicates discontinuous conduction mode.
During the power-save mode the output voltage is monitored with a PFM comparator. As the output voltage falls
below the PFM comparator threshold of VOUT nominal +1%, the device starts a PFM current pulse. For this the
high-side MOSFET switch will turn on and the inductor current ramps up. After the ON-time expires, the switch is
turned off and the low-side MOSFET switch is turned on until the inductor current becomes zero.
The converter effectively delivers a current to the output capacitor and the load. If the load is below the delivered
current, the output voltage will rise. If the output voltage is equal to or higher than the PFM comparator threshold,
the device stops switching and enters a sleep mode with typical 15-μA current consumption.
If the output voltage is still below the PFM comparator threshold, a sequence of further PFM current pulses are
generated until the PFM comparator threshold is reached. The converter starts switching again once the output
voltage drops below the PFM comparator threshold.
With a fast single threshold comparator, the output voltage ripple during PFM mode operation can be kept small.
The PFM pulse is time controlled, which allows to modify the charge transferred to the output capacitor by the
value of the inductor. The resulting PFM output voltage ripple and PFM frequency depend in first order on the
size of the output capacitor and the inductor value. Increasing output capacitor values and inductor values will
minimize the output ripple. The PFM frequency decreases with smaller inductor values and increases with larger
values.
The PFM mode is left and PWM mode entered in case the output current can not longer be supported in PFM
mode. The power save mode can be disabled through the MODE pin set to high. The converter will then operate
in fixed frequency PWM mode.
7.4.3 100% Duty Cycle Low Dropout Operation
The device starts to enter 100% duty cycle mode once the input voltage comes close the nominal output voltage.
To maintain the output voltage, the high-side MOSFET switch is turned on 100% for one or more cycles.
With further decreasing VIN the high side MOSFET switch is turned on completely. In this case, the converter
offers a low input-to-output voltage difference. This is particularly useful in battery-powered applications to
achieve longest operation time by taking full advantage of the whole battery voltage range.
The minimum input voltage to maintain regulation depends on the load current and output voltage, and can be
calculated by Equation 1:
VINmin = VOUTmax + IOUTmax × RDS(on)max + RL)
where
•
•
•
•
IOUTmax = Maximum output current plus inductor ripple current
RDS(on)max = Maximum P-channel switch RDS(on)
RL = DC resistance of the inductor
VOUTmax = Nominal output voltage plus maximum output voltage tolerance
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Device Functional Modes (continued)
7.4.4 Short-Circuit Protection
The high-side and low side MOSFET switches are short-circuit protected with maximum switch current equal to
ILIMF. The current in the switches is monitored by current limit comparators. Once the current in the high-side
MOSFET switch exceeds the threshold of its current limit comparator, it turns off and the low-side MOSFET
switch is activated to ramp down the current in the inductor and high-side MOSFET switch. The high-side
MOSFET switch can only turn on again, once the current in the low-side MOSFET switch has decreased below
the threshold of its current limit comparator.
10
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The TPS62590 device is a high-efficiency synchronous step-down DC–DC converter featuring power-save mode
or 2.25-MHz fixed frequency operation.
8.2 Typical Application
L
2.2 mH
TPS62590DRV
5
VIN
2.5 V to 5.5 V
4
CIN
10mF
2
VIN
SW
EN
FB
MODE
GND
VOUT =1.8V
1
3
R1
360kΩ
Up to 1A
C1
22pF
6
PwrPAD
R2
180kΩ
COUT
10mF
Figure 6. TPS62590DRV Adjustable 1.8 V
8.2.1 Design Requirements
The device operates over an input voltage range from 2.5 V to 5.5 V. The output voltage is adjustable using an
external feedback divider.
8.2.2 Detailed Design Procedure
8.2.2.1 Output Voltage Setting
The output voltage can be calculated by Equation 2 with the internal reference voltage VREF = 0.6 V typically.
æ
R1ö÷
V OUT = VREF x çç1 +
÷
çè
R2 ø÷
(2)
To minimize the current through the feedback divider network, R2 should be 180 kΩ or 360 kΩ. The sum of R1
and R2 should not exceed ~1 MΩ, to keep the network robust against noise. An external feed forward capacitor
C1 is required for optimum load transient response. The value of C1 should be in the range between 22 pF and
33 pF.
Route the FB line away from noise sources, such as the inductor or the SW line.
8.2.2.2 Output Filter Design (Inductor and Output Capacitor)
The TPS62590 is designed to operate with inductors in the range of 1.5 μH to 4.7 μH and with output capacitors
in the range of 4.7 μF to 22 μF. The part is optimized for operation with a 2.2-μH inductor and 10-μF output
capacitor. Larger or smaller inductor values can be used to optimize the performance of the device for specific
operation conditions. For stable operation, the L and C values of the output filter may not fall below 1-μH
effective inductance and 3.5-μF effective capacitance.
8.2.2.2.1 Inductor Selection
The inductor value has a direct effect on the ripple current. The selected inductor has to be rated for its DC
resistance and saturation current. The inductor ripple current (ΔIL) decreases with higher inductance and
increases with higher VIN or VOUT.
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Typical Application (continued)
The inductor selection has also impact on the output voltage ripple in PFM mode. Higher inductor values will lead
to lower output voltage ripple and higher PFM frequency, lower inductor values will lead to a higher output
voltage ripple but lower PFM frequency.
Equation 3 calculates the maximum inductor current under static load conditions. The saturation current of the
inductor should be rated higher than the maximum inductor current as calculated with Equation 4. This is
recommended because during heavy load transient the inductor current will rise above the calculated value.
V
1 - OUT
VIN
DIL = VOUT ´
L´f
(3)
DIL
IL max = IOUT max +
2
where
•
•
•
•
f = Switching frequency (2.25 MHz typical)
L = Inductor value
ΔIL = Peak-to-peak inductor ripple current
ILmax = Maximum inductor current
(4)
A more conservative approach is to select the inductor current rating just for the maximum switch current of the
corresponding converter.
Accepting larger values of ripple current allows the use of low inductance values, but results in higher output
voltage ripple, greater core losses, and lower output current capability.
The total losses of the coil have a strong impact on the efficiency of the DC–DC conversion and consist of both
the losses in the DC resistance (R(DC)) and the following frequency-dependent components:
• The losses in the core material (magnetic hysteresis loss, especially at high switching frequencies)
• Additional losses in the conductor from the skin effect (current displacement at high frequencies)
• Magnetic field losses of the neighboring windings (proximity effect)
• Radiation losses
Table 1. List of Inductors
DIMENSIONS [mm3]
INDUCTOR TYPE
SUPPLIER
3 × 3 × 1.5
LPS3015
Coilcraft
3 × 3 × 1.5
LQH3NPN2R2NM0
MURATA
3.2 × 2.6 × 1.2
MIPSA3226D2R2
FDK
8.2.2.2.2 Output Capacitor Selection
The advanced fast-response voltage mode control scheme of the TPS62590 allows the use of tiny ceramic
capacitors. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are
recommended. The output capacitor requires either an X7R or X5R dielectric. Y5V and Z5U dielectric capacitors,
aside from their wide variation in capacitance over temperature, become resistive at high frequencies.
At nominal load current, the device operates in PWM mode and the RMS ripple current is calculated by
Equation 5:
V
1 - OUT
VIN
1
IRMSC OUT = VOUT ´
´
L´f
2´ 3
(5)
At nominal load current, the device operates in PWM mode and the overall output voltage ripple is the sum of the
voltage spike caused by the output capacitor ESR plus the voltage ripple caused by charging and discharging the
output capacitor shown in Equation 6:
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VOUT
VIN
æ
ö
1
´ç
+ ESR ÷
L´f
8
Cout
f
´
´
è
ø
1DVOUT = VOUT ´
(6)
At light load currents the converter operates in power save mode and the output voltage ripple is dependent on
the output capacitor and inductor value. Larger output capacitor and inductor values minimize the voltage ripple
in PFM mode and tighten DC output accuracy in PFM mode.
8.2.2.2.3 Input Capacitor Selection
The buck converter has a natural pulsating input current; therefore, a low ESR input capacitor is required for best
input voltage filtering and minimizing the interference with other circuits caused by high input voltage spikes. For
most applications, a 10-μF ceramic capacitor is recommended. The input capacitor can be increased without any
limit for better input voltage filtering.
Take care when using only small ceramic input capacitors. When a ceramic capacitor is used at the input and the
power is being supplied through long wires, such as from a wall adapter, a load step at the output or VIN step on
the input can induce ringing at the VIN pin. The ringing can couple to the output and be mistaken as loop
instability or could even damage the part by exceeding the maximum ratings.
Table 2. List of Capacitor
CAPACITANCE
10 μF
TYPE
SIZE
SUPPLIER
3
GRM188R60J106M69D
0603 1.6 × 0.8 × 0.8mm
Murata
Table 3 shows the list of components for the Application Curves.
Table 3. List of Components
COMPONENT REFERENCE
PART NUMBER
MANUFACTURER
VALUE
CIN
GRM188R60J106M
Murata
10 μF, 6.3-V. X5R Ceramic
COUT
GRM188R60J106M
Murata
10 μF, 6.3-V. X5R Ceramic
Murata
22-pF, COG Ceramic
Coilcraft
2.2 μH, 110 mΩ
C1
L1
LPS3015
R1, R2
Values depending on the programmed output voltage
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8.2.3 Application Curves
100
100
VI = 2.7 V
90
90
VI = 3.6 V
80
VI = 3.3 V
70
Efficiency - %
70
Efficiency - %
80
VI = 4.5 V
VI = 5 V
60
50
40
30
10
0
0.0001
0.001
0.01
IO - Output Current - A
0.1
VI = 5 V
50
VI = 4.5 V
40
30
VOUT = 1.8 V,
MODE = GND,
L = 2.2 mH
20
VI = 2.7 V
60
VOUT = 1.8 V,
MODE = VIN,
L = 2.2 mH
20
10
0
0.001
1
0.01
0.1
IO - Output Current - A
Figure 7. Efficiency vs Output Current
Figure 8. Efficiency vs Output Current
100
100
VI = 5 V
80
80
VI = 4.2 V
70
VI = 3.8 V
60
50
40
30
10
0
0.0001
0.001
VI = 5 V
0.01
IO - Output Current - A
0.1
60
VI = 4.5 V
50
40
VOUT = 3.3 V,
MODE = VIN,
L = 2.2 mH
30
VOUT = 3.3 V,
MODE = GND,
L = 2.2 mH
20
VI = 3.8 V
70
Efficiency - %
Efficiency - %
VI = 4.2 V
90
90
20
10
0
0.001
1
0.01
0.1
IO - Output Current - A
1
Figure 10. Efficiency vs Output Current
Figure 9. Efficiency vs Output Current
1.9
1.85
VO = 1.8 V,
MODE = GND
VO = 1.8 V,
MODE = VI
1.88
VO - Output Voltage - V
1.83
VO - Output Voltage - V
1
VI = 2.7 V, TA = 25°C
1.81
1.79
VI = 4.5 V, TA = 25°C
VI = 3.6 V, TA = 25°C
1.77
1.86
PFM Mode, Voltage Positioning On
PWM Mode
1.84
1.82
VI = 4.5 V, TA = 25°C
VI = 3.6 V, TA = 25°C
1.8
VI = 2.7 V, TA = 25°C
1.75
0.00001
0.0001
0.001
0.01
IO - Output Current - A
0.1
Figure 11. Output Voltage vs Output Current
14
1
1.78
0.00001
0.0001
0.001
0.01
IO - Output Current - A
0.1
1
Figure 12. Output Voltage vs Output Current
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3.4
3.35
VO = 3.3 V,
MODE = GND
VO = 3.3 V,
MODE = VI
VO - Output Voltage - V
VO - Output Voltage - V
VI = 4.5 V, TA = 25°C
3.36
3.33
VI = 4.5 V, TA = 25°C
3.31
VI = 4.2 V, TA = 25°C
VI = 3.7 V, TA = 25°C
3.29
VI = 5 V, TA = 25°C
VI = 4.2 V, TA = 25°C
3.32
PFM Mode, Voltage Positioning On
PWM Mode
3.28
3.24
3.27
3.25
0.00001
0.0001
0.001
0.01
IO - Output Current - A
0.1
Figure 13. Output Voltage vs Output Current
1
3.2
0.00001
0.0001
0.001
0.01
IO - Output Current - A
0.1
1
Figure 14. Output Voltage vs Output Current
VIN 3.6 V,
VOUT 1.8 V,
IOUT 300 mA to 800 mA,
MODE = GND VOUT 100 mV/Div
SW 2V/Div
VOUT 50 mV/Div
IOUT 500 mA/Div
VIN 3.6 V,
VOUT 1.8 V,
IOUT 50 mA to 250 mA,
250 mA
MODE = GND
800 mA
300 mA
IOUT 200 mA/Div
50 mA
Icoil 500 mA/Div
Icoil 500 mA/Div
Time Base - 20 ms/Div
Time Base - 20 ms/Div
Figure 16. PWM Load Transient
Figure 15. PFM Load Transient
VIN 3.6 V to 4.2 V
500 mV/Div
VOUT = 1.8 V,
50 mV/Div,
IOUT = 50 mA,
MODE = GND
VIN 3.6 V to 4.2 V,
500 mV/Div
VOUT = 1.8 V,
50 mV/Div,
IOUT = 250 mA,
MODE = GND
Time Base - 100 ms/Div
Time Base - 100 ms/Div
Figure 17. PFM Line Transient
Figure 18. PWM Line Transient
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VIN 3.6 V,
VOUT 1.8 V, IOUT 150 mA,
VOUT 20 mV/Div
VOUT 10 mV/Div
L 2.2 mH, COUT 10 mF 0603
VIN 3.6 V,
VOUT 1.8 V, IOUT 10 mA,
SW 2 V/Div
L 2.2 mH, COUT 10 mF 0603
SW 2 V/Div
Icoil 200 mA/Div
Icoil 200 mA/Div
Time Base - 10 ms/Div
Time Base - 10 ms/Div
Figure 20. Typical Operation – PWM Mode
Figure 19. Typical Operation – PFM Mode
8.3 System Example
L
2.2 mH
TPS62590DRV
5
VIN
3.3 V to 5.5 V
4
CIN
10mF
2
VIN
SW
EN
FB
MODE
GND
PwrPAD
VOUT =3.3V
1
3
R1
820kΩ
I OUT,max =1A
C1
22pF
6
R2
182kΩ
COUT
10mF
Figure 21. TPS62590DRV Adjustable 3.3 V
9 Power Supply Recommendations
The TPS62590 device has no special requirements for its input power supply. The output current of the input
power supply needs to be rated according to the supply voltage, output voltage and output current of the
TPS62590.
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10 Layout
10.1 Layout Guidelines
As for all switching power supplies, the layout is an important step in the design. Proper function of the device
demands careful attention to PCB layout. Take care in board layout to get the specified performance. If the
layout is not carefully done, the regulator could show poor line and/or load regulation, stability issues as well as
EMI problems. It is critical to provide a low inductance, impedance ground path. Therefore, use wide and short
traces for the main current paths. The input capacitor should be placed as close as possible to the IC pins as
well as the inductor and output capacitor.
Connect the GND pin of the device to the exposed thermal pad of the PCB and use this pad as a star point. Use
a common power GND node and a different node for the signal GND to minimize the effects of ground noise.
Connect these ground nodes together to the exposed thermal pad (star point) underneath the IC. Keep the
common path to the GND pin, which returns the small signal components and the high current of the output
capacitors as short as possible to avoid ground noise. The FB line should be connected right to the output
capacitor and routed away from noisy components and traces (for example, the SW line).
10.2 Layout Example
VOUT
R2
GND
C1
R1
COUT
CIN
VIN
L
G
N
D
U
Figure 22. PCB Layout
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11 Device and Documentation Support
11.1 Device Support
11.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
11.2 Documentation Support
11.2.1 Related Documentation
For related documentation, see the following:
TPS62290 2.25MHz 1A Step-Down Converter in 2x2mm SON Package, SLVS764
11.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
15-Apr-2017
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
HPA00695DRVR
ACTIVE
WSON
DRV
6
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
OAL
HPA00822DRVR
ACTIVE
WSON
DRV
6
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
OAL
TPS62590DRVR
ACTIVE
WSON
DRV
6
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
OAL
TPS62590DRVT
ACTIVE
WSON
DRV
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
OAL
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
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15-Apr-2017
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TPS62590 :
• Automotive: TPS62590-Q1
NOTE: Qualified Version Definitions:
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 2
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