NAU8223 3.1W Stereo Filter-Free Class

NAU8223 3.1W Stereo Filter-Free Class
NAU8223
3.1W Stereo Filter-Free Class-D Audio Amplifier
1
Description
The NAU8223 is a stereo high efficiency filter-free Class-D audio amplifier, which is capable of driving a 4Ω load with
up to 3.1W output power. This device provides chip enable pin with extremely low standby current and fast start-up time
of 3.4ms. It has five selectable gain settings (i.e. 0dB, 6dB, 12dB, 18dB and 24dB), which can be controlled by a single
gain pin.
The NAU8223 is ideal for the portable applications of battery drive, as it has advanced features like 87dB PSRR, 91%
efficiency, ultra low quiescent current (i.e. 2.1mA at 3.7V for 2 channels) and superior EMI performance. It has the
ability to configure the inputs in either single-ended or differential mode.
NAU8223 is available in Miniature QFN-20 package and TSSOP-20 package.
Key Features
Low Quiescent Current:
• 2.1mA at 3.7V for 2 channels
• 3.2mA at 5V for 2 channels
5 Selectable Gain Settings:
• 0dB / 6dB / 12dB / 18dB / 24dB
Powerful Stereo Class-D Amplifier:
• 2ch x 3.1W (4Ω @ 5V, 10% THD+N)
• 2ch x 1.26W (4Ω @ 3.7V, 1% THD+N)
• 2ch x 1.76W (8Ω @ 5V, 10% THD+N)
• 2ch x 0.76W (8Ω @ 3.7V, 1% THD+N)
Low Output Noise: 20 µVRMS @0dB gain
87dB PSRR @217Hz
Low Current Shutdown Mode
Click-and Pop Suppression
Applications
Notebooks / Tablet PCs
Personal Media Players / Portable TVs
MP3 Players
Portable Game Players
Digital Camcorders
Figure 1: NAU8223Block Diagram
NAU8223 Datasheet Rev 1.3
Page 1 of 23
July, 2012
2
Pinout
2.1 NAU8223 QFN 20 (TOP VIEW)
NAU8223Datasheet Rev 1.4
Page 2 of 23
August, 2013
2.2 TSSOP 20 (TOP VIEW)
NAU8223Datasheet Rev 1.4
Part Number
Dimension
Package
Package Material
NAU8223YG
4mm x 4mm
QFN-20
Pb-Free
NAU8223WG
4.4mm x 6.5mm
TSSOP-20
Pb-Free
Page 3 of 23
August, 2013
3
Pin Descriptions
QFN
TSSOP
Name
Type
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
9
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
-
OUTRP
VDD
NC
EN
INR
IPR
GS
VDD
VSS
IPL
INL
NC
NC
VDD
OUTLP
VSS
OUTLN
VDD
OUTRN
VSS
Ex-Pad
Analog Output
Supply
NC
Digital Input
Analog Input
Analog Input
Analog Input
Supply
Supply
Analog Input
Analog Input
NC
NC
Supply
Analog Output
Supply
Analog Output
Supply
Analog Output
Supply
Analog Input
Functionality
Right Channel Positive BTL Output
Power Supply
No Connect
Chip Enable (High = Enable; Low = PD)
Right Channel Negative Input
Right Channel Positive Input
5 Selectable Gain Setting (0dB / 6dB / 12dB / 18dB / 24dB)
Power Supply
Ground
Left Channel Positive Input
Left Channel Negative Input
No Connect
No Connect
Power Supply
Left Channel Positive BTL Output
Ground
Left Channel Negative BTL Output
Power Supply
Right Channel Negative BTL Output
Ground
Thermal Tab (must be connected to VSS, QFN-20 package, only)
Notes
1. Pins designated as NC (Not Internally Connected) should be left as no-connection
Table 1: NAU8223 Pin description
NAU8223Datasheet Rev 1.4
Page 4 of 23
August, 2013
4
Electrical Characteristics
Conditions: EN = VDD = 5V, VSS = 0V, Av = 12dB ZL = ∞, Bandwidth = 20Hz to 22kHz, TA = 25 oC
Parameter
Symbol
Comments/Conditions
Min
Typ
Max
Units
Power Delivered
Output Power
(per channel)
Pout
ZL = 4Ω + 33µH
THD + N = 10%
ZL = 4Ω + 33µH
THD + N = 1%
ZL = 8Ω + 68µH
THD + N = 10%
ZL = 8Ω + 68µH
THD + N = 1%
Parameter
Chip Enable (EN)
Voltage Enable High
Voltage Enable Low
Input Leakage Current
Thermal and Current Protection
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
Short circuit Threshold
Gain Setting
Voltage Gain
Differential Input Resistance
NAU8223Datasheet Rev 1.4
Symbol
VEN_H
VEN_L
VDD = 5.0V
VDD = 3.7V
VDD = 5.0V
VDD = 3.7V
VDD = 5.0V
VDD = 3.7V
VDD = 5.0V
VDD = 3.7V
Comments/Conditions
VDD = 2.5V to 5.5V
VDD = 2.5V to 5.5V
3.1
1.57
2.46
1.26
1.76
0.95
1.41
0.76
Min
Typ
Units
0.4
+1
V
V
µA
o
130
15
2.1
ILIMIT
RIN
Max
1.4
-1
AV
W
Tie GS to VSS
GS Connect VSS through
100k ± 5%
Tie GS pin to VDD
GS Connect VDD
through 100k ± 5%
Floating Node
AV = 24dB
AV = 18dB
AV = 12dB
AV = 6dB
AV = 0dB
Page 5 of 23
C
C
A
o
24
18
12
6
dB
0
35
70
140
280
558
kΩ
August, 2013
Electrical Characteristics (continued)
Conditions: EN = VDD = 5V, VSS = 0V, Av = 12dB, ZL = ∞, Bandwidth = 20Hz to 22kHz, TA = 25 oC
Parameter
Symbol
Comments/Conditions
Min
Typ
Max
Units
Normal Operation
Quiescent Current Consumption
IQUI
Shut Down Current
Oscillator Frequency
Efficiency
Start Up Time
Output Offset Voltage
Common Mode Rejection Ratio
IOFF
fOSC
η
Tstart
VOS
CMRR
Click-and-Pop Suppression
DC
PSRR
AC
PSRR*
Power Supply Rejection Ratio
VDD = 3.7V
VDD = 5V
EN = 0
2.1
3.17
0.1
300
91
3.4
±1
80
-72
fIN = 1kHz
Into Shutdown (ZL=8Ω)
A Weighted
VDD = 2.5V to 5.5V
VRIPPLE =
0.2Vpp@217Hz**
VRIPPLE = 0.2Vpp@1KHz
VRIPPLE =
0.2Vpp@10KHz
fIN = 1kHz,
ZL = 8Ω + 68µH
*Measured with 0.1uF capacitor on VDD and Battery supply
Symbol
Comments/Conditions
dBV
98
dB
87
dB
74
54
Channel Crosstalk
Parameter
±4
mA
mA
µA
kHz
%
msec
mV
dB
-101
dB
** Measured with 2.2uF input capacitor.
Min
Typ
Max
Units
Noise Performance
Av = 0dB (A-weighted)
Av = 6dB (A-weighted)
Av = 12dB (A-weighted)
Av = 18dB (A-weighted)
Av = 24dB (A-weighted)
20
21
27
36
52
µVRMS
The following setup is used to measure the above parameters
NAU8223Datasheet Rev 1.4
Page 6 of 23
August, 2013
Absolute Maximum Ratings
Condition
Min
Max
Units
-0.50
+5.50
V
Industrial operating temperature
-40
+85
°C
Storage temperature range
-65
+150
°C
Analog supply
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may
adversely influence product reliability and result in failures not covered by warranty.
Operating Conditions
Condition
Symbol
Min
Typical
Max
Units
Analog supply range
VDD
2.50
3.7
5.50
V
Ground
VSS
NAU8223Datasheet Rev 1.4
Page 7 of 23
0
V
August, 2013
6
Special Feature Description
The NAU8223 offers excellent quantity performance as high efficiency, high output power and low quiescent current. It
also provides the following special features.
6.1
Gain Setting
The NAU8223 has a GS pin, which can control five selectable gain settings (i.e. 0dB / 6dB / 12dB / 18dB / 24dB).
6.2
GS Pin Configuration
Internal Gain (dB)
GS tie to VSS
24
GS connect to VSS through
100kΩ ± 5% resistor
18
GS tie to VDD
12
GS connect to VDD through
100kΩ ± 5% resistor
6
Floating (open node)
0
Device Protection
The NAU8223 includes device protection for three operating scenarios. They are
1.
2.
3.
6.2.1
Thermal Overload
Short circuit
Supply under voltage
Thermal Overload Protection
When the device internal junction temperature reaches 130°C, the NAU8223 will disable the output drivers. When the
device cools down and a safe operating temperature of 115°C has been reached for at least about 47mSec, the output
drivers will be enabled again.
6.2.2
Short Circuit Protection
If a short circuit is detected on any of the pull-up or pull-down devices on the output drivers for at least 14uSec, the
output drivers will be disabled for 47mSec. The output drivers will then be enabled again and check for the short circuit.
If the short circuit is still present, the output drivers are disabled after 14uSec. This cycle will continue until the short
circuit is removed. The short circuit threshold is set at 2.1A.
6.2.3
Supply under Voltage Protection
If the supply voltage drops under 2.1V, the output drivers will be disabled while the NAU8223 control circuitry still
operates. This will avoid the battery supply to drag down too low before the host processor can safely shut down the
devices on the system. If the supply drops further below 1.0v the internal power on reset activated and puts the entire
device in power down state.
NAU8223Datasheet Rev 1.4
Page 8 of 23
August, 2013
6.3
Power up and Power down Control
When the supply voltage ramps up, the internal power on reset circuit gets triggered. At this time all internal circuits will
be set to power down state. The device can be enabled by setting the EN pin high. Upon setting the EN pin high, the
device will go through an internal power up sequence in order to minimize ‘pops’ on the speaker output. The complete
power up sequence will take about 3.4mSec. The device will power down in about 30uSec, when the EN pin is set low.
It is important to keep the input signal at zero amplitude or enable the mute condition in order to minimize the ‘pops’
when the EN pin is toggled.
.
NAU8223Datasheet Rev 1.4
Page 9 of 23
August, 2013
7
Typical Operating Characteristics
Conditions: EN = VDD = 5V, VSS = 0V, Av = 12dB, ZL = ∞, Bandwidth = 20Hz to 22kHz, TA = 25 oC, unless otherwise
noted
Efficiency Vs Output Power
(VDD = 3.7V)
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
Efficiency(%)
Efficiency(%)
Efficiency Vs Output Power
(VDD = 5.0V)
ZL=4Ω+33uH
ZL=8Ω+68uH
0
1
2
3
Output Power(W)
ZL=4Ω+ 33uH
ZL=8Ω +68uH
0
4
THD+N vs Frequency
(VDD = 3.7V, ZL= 8Ω + 68uH)
1
1.5
Output Power(W)
THD+N vs Frequency
(VDD = 4.2V, ZL= 8Ω + 68uH)
1
1
Pout 0.2W
Pout 0.4W
0.1
Pout 0.2W
Pout 0.6W
THD+N(%)
THD+N(%)
0.5
0.01
0.1
0.01
0.001
0.001
20
200
2000
20000
Frequency(Hz)
NAU8223Datasheet Rev 1.4
20
200
2000
20000
Frequency(Hz)
Page 10 of 23
August, 2013
2
THD+N vs Pout
(VDD = 3.7V, ZL = 8Ω + 68uH)
THD+N vs Frequency
(VDD = 5V, ZL= 8Ω + 68uH)
100
Pout 0.2W
Pout 1.2W
0.1
f 100Hz
f 1kHz
f 6kHz
10
THD+N (%)
THD+N(%)
1
0.01
1
0.1
0.01
0.001
20
200
2000
0.001
20000
0
Frequency(Hz)
0.5
1
1.5
Pout (W)
THD+N vs Pout
(VDD = 5V, ZL=8Ω + 68uH)
100
100
10
10
THD+N (%)
THD+N (%)
THD+N vs Pout
(VDD = 4.2V, ZL= 8Ω + 68uH)
1
f 100Hz
f 1kHz
f 6kHz
0.1
0.01
1
f 100Hz
f 1kHz
f 6kHz
0.1
0.01
0.001
0.001
0
0.5
NAU8223Datasheet Rev 1.4
1
Pout (W)
1.5
2
0
1
2
Pout (W)
Page 11 of 23
August, 2013
3
THD+N vs Frequency
(VDD = 3.7V, ZL= 4Ω + 33uH)
THD+N vs Frequency
(VDD = 4.2V, ZL= 4Ω + 33uH)
1
1
0.1
THD+N(%)
THD+N(%)
Pout 0.2W
Pout 0.8W
0.01
Pout 0.2W
Pout 1W
0.1
0.01
0.001
20
200
2000
20000
0.001
20
Frequency(Hz)
2000
20000
Frequency(Hz)
THD+N vs Frequency
THD+N vs Pout
(VDD = 3.7V, ZL= 4Ω + 33uH)
(VDD = 5V, ZL= 4Ω + 33uH)
1
100
Pout 1.5W
Pout 2W
10
0.1
THD+N (%)
THD+N(%)
200
0.01
1
f = 100Hz
f = 1kHz
f = 6kHz
0.1
0.01
0.001
0.001
20
200
NAU8223Datasheet Rev 1.4
2000
Frequency (Hz)
20000
0
1
2
Pout (W)
Page 12 of 23
August, 2013
3
THD+N vs Pout
(VDD = 5V, ZL= 4Ω + 33uH)
100
100
10
10
THD+N (%)
THD+N (%)
THD+N vs Pout
(VDD = 4.2V, ZL= 4Ω + 33uH)
1
f = 100Hz
f = 1kHz
f = 6kHz
0.1
1
0.1
0.01
0.01
0.001
0.001
0
1
2
f = 100Hz
f = 1kHz
f = 6kHz
0
3
1
2
Pout (W)
Pout (W)
Gain 0dB
Gain 6dB
Gain 12dB
Gain 18dB
Gain 24dB
Gain vs Frequency
30
25
Crosstalk vs Frequency
0
Left to Right
Right to Left
-20
Level (dB)
20
Gain (dB)
3
15
10
5
0
-40
-60
-80
-100
-5
-120
-10
20
200
2000
20000
200
2000
20000
Frequency (Hz)
Frequency (Hz)
NAU8223Datasheet Rev 1.4
20
Page 13 of 23
August, 2013
4
AC PSRR vs Frequency
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
PSRR @Gain 0dB, 1KHz
2.5
3.5
4.5
5.5
PSRR (dB)
PSRR (dB)
AC PSRR vs Supply Voltage
6.5
PSRR @ Gain 0dB
20
200
2000
20000
Frequency (Hz)
Supply Voltage (V)
NAU8223Datasheet Rev 1.4
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
Page 14 of 23
August, 2013
SupplyVoltage vs SupplyCurrent
3.5
3
Supply Current(mA)
2.5
2
1.5
1
0.5
0
2.5
NAU8223Datasheet Rev 1.4
3.5
4.5
Supply Voltage (V)
5.5
Page 15 of 23
August, 2013
OUTLP
15
VDD
NAU8223
Stereo Class D NC
QFN 20-Pin
NC
14
INL
11
1
OUTRP
2
VDD
3
NC
4
EN
5
INR
VSS
20
VSS
19
OUTRN
18
VDD
17
OUTLN
16
Application diagram
6
8.1
Application Information
13
12
IPR
7
GS
8
VDD
9
VSS
10
IPL
8
P.S. GS Pin – The 100kΩ resistors are optional. GS can be floating for internal gain setting = 0dB. Please refer Section
2.1 (Gain Setting) for the detailed explanation.
NAU8223Datasheet Rev 1.4
Page 16 of 23
August, 2013
8.2
Component selection
Coupling Capacitors
An ac coupling capacitor (Cin) is used to block the dc content from the input source. The input resistance of the amplifier
(Rin) together with the Cin will act as a high pass filter. So depending on the required cut off frequency the Cin can be
calculated by using the following formula
Where
is the desired cut off frequency of the High pass filter.
Input
Cin
Amplifier
Output
Rin(Input Resistance)
Bypass Capacitors
Bypass capacitors are required to remove the ac ripple on the VDD pins. The value of these capacitors depends on the
length of the VDD trace. In most cases, 10uF and 0.1uF are enough to get the good performance.
8.3
Layout considerations
The NAU8223 QFN package uses an exposed pad on the bottom side of the package to dissipate excess power from the
output drivers. This pad must be soldered carefully to the PCB for proper operation of the NAU8223. This pad is
internally connected to Vss. A typical layout is shown below.
NAU8223Datasheet Rev 1.4
Page 17 of 23
August, 2013
The PCB has to be designed in such a manner that it should have nine vias in 3x3 grid under NAU8223. The vias should
have hole size of 12mil and a spacing of 30mils. The pad size of the vias is 24mils. The vias on the top side of the board
should be connected with a copper pour that has an area of 2mm x 2mm, centered underneath the NAU8223. The nine
vias should connect to copper pour area on the bottom of the PCB. It is preferred to pour the complete bottom side of the
board with Vss.
Also good PCB layout and grounding techniques are essential to get the good audio performance. It is better to use low
resistance traces as these devices are driving low impedance loads. The resistance of the traces has a significant effect on
the output power delivered to the load. In order to dissipate more heat, use wide traces for the power and ground lines.
8.4
Class D without filter
The NAU8223 is designed for use without any filter on the output line. That means the outputs can be directly connected
to the speaker in the simplest configuration. This type of filter less design is suitable for portable applications where the
speaker is very close to the amplifier. In other words, this is preferable in applications where the length of the traces
between the speaker and amplifier is short. The following diagram shows this simple configuration.
NAU8223 outputs connected to speaker without filter circuit
8.5
Class D with filter
In some applications, the shorter trace lengths are not possible because of speaker size limitations and other layout
reasons. In these applications, the long traces will cause EMI issues. There are two types of filter circuits available to
reduce the EMI effects. These are ferrite bead and LC filters.
Ferrite Bead filter
The ferrite bead filters are used to reduce the high frequency emissions. The typical circuit diagram is shown in the
figure.
NAU8223 outputs connected to speaker with Ferrite Bead filter
NAU8223Datasheet Rev 1.4
Page 18 of 23
August, 2013
The characteristic of ferrite bead is such that it offers higher impedance at high frequencies. For better EMI performance
select ferrite bead which offers highest impedance at high frequencies, so that it will attenuate the signals at higher
frequencies. Usually the ferrite beads have low impedance in the audio range, so it will act as a pass through filter in the
audio frequency range.
LC filter
The LC filter is used to suppress the low frequency emissions. The following diagram shows the NAU8223 outputs
connected to the speaker with LC filter circuit. RL is the resistance of the speaker coil.
NAU8223 outputs connected to speaker with LC filter
Standard Low pass LCR filter
The following are the equations for the critically damped (ζ = 0.707) standard low pass LCR filter
2 √
is the cutoff frequency
0.707 1
∗√
2
The L and C values for differential configuration can be calculated by duplicating the single ended configuration values
and substituting RL = 2R.
NAU8223Datasheet Rev 1.4
Page 19 of 23
August, 2013
8.6
NAU8223 EMI performance
The NAU8223 includes a spread spectrum oscillator for reduced EMI. The PWM oscillator frequency typically sweeps
in a range of 300 kHz +/- 15 kHz in order to spread the energy of the PWM pulses over a larger frequency band. In
addition, slew rate control on the output drivers allows the application of ‘filter less’ loads, while suppressing EMI at
high frequencies. The below graph shows the EMI performance of NAU8223 with ferrite beads and speaker cable length
of 30cm.
NAU8223Datasheet Rev 1.4
Page 20 of 23
August, 2013
9
9.1
Package Dimensions
QFN20L 4X4 MM^2, Pitch:0.50 MM
TOP VI EW
15
BOTTOM VI EW
11
16
20
1
NAU8223Datasheet Rev 1.4
11
10
10
6
6
5
16
20
5
Page 21 of 23
15
1
August, 2013
9.2
TSSOP20L 4.4X6.5 MM^2, Pitch:0.65 MM
NAU8223Datasheet Rev 1.4
Page 22 of 23
August, 2013
10 Ordering Information
Nuvoton Part Number Description
NAU8223 _G
Package Material:
G
=
Pb-free Package
Package Type:
Y
=
20-Pin QFN Package
W
=
20-Pin TSSOP Package
Version History
VERSION
DATE
PAGE
DESCRIPTION
Preliminary Revision
Updated typical characteristics
Updated Pin No.
Added application diagrams
Rev1.0
March, 2012
P.8, P.9
Rev1.1
March, 2012
P.2, P.10
Rev1.2
May, 2012
NA
Updated Electrical Characteristics
Rev1.3
July, 2012
P.4, P.5,
P.10-P.18
Added Application information section
Added/Modified Typical operating Characteristics
Updated Electrical Characteristics
Rev1.4
August, 2013
P.4, P.5,
P.22,P.23
Added TSSOP20 Package information section
Table 1: Version History
Important Notice
Nuvoton products are not designed, intended, authorized or warranted for use as components in systems or equipment
intended for surgical implantation, atomic energy control instruments, airplane or spaceship instruments, transportation
instruments, traffic signal instruments, combustion control instruments, or for other applications intended to support or
sustain life. Furthermore, Nuvoton products are not intended for applications wherein failure of Nuvoton products could
result or lead to a situation wherein personal injury, death or severe property or environmental damage could occur.
Nuvoton customers using or selling these products for use in such applications do so at their own risk and agree to fully
indemnify Nuvoton for any damages resulting from such improper use or sales.
NAU8223Datasheet Rev 1.4
Page 23 of 23
August, 2013
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