UTC MC33218 LINEAR INTEGRATED CIRCUIT

UTC MC33218 LINEAR INTEGRATED CIRCUIT
UTC MC33218 LINEAR INTEGRATED CIRCUIT
VOICE SWITCHED
SPEAKERPHONE WITH
MICROPROCESSOR INTERFACE
DESCRIPTION
The UTC MC33218 voice switched speakerphone circuit
incorporates the necessary amplifiers, attenuators, level
detectors and control algorithm to form the heart of a high
quality hands-free speaker-phone system. Includes are a
microphone amplifier with mute, transmit and receive
attenuators a background monitoring system for both the
transmit and receive paths, and level detectors for each path.
An AGC system reduces the receive gain on long lines where
loop current and power are in short supply. A dial tone
detector prevents fading of dial tone. A chip disable pin
permits conserving power when the circuit is not in use.
Additionally, the UTC MC33218 has a serial data port
which permits microprocessor control of the receive volume
level, microphone mute, attenuator range, and selection of
transmit, receive, idle or normal modes. The data port can be
operated at up to 1.0MHz
The UTC MC33218 can be operated from a power supply,
or from the telephone line, requiring typically 4.6mA.It can be
used in conjunction with a variety of speech networks.
Applications include not only speakerphones, but intercoms
and other voice switched devices.
SOP-24
DIP-24
FEATURES
* Supply Voltage Range: 2.7V ~ 6.5V
* Attenuator Range: 53 or 27 dB (selectable)
* 2 Point Sensing with background oise monitor in each path
* Microprocessor port for control of:
Volume control(40dB range over 16 levels)
Mute microphone amplifier
Force to receive transmit, or idle modes
Attenuator range selection(27 or 53dB)
UTC
UNISONIC TECHNOLOGIES CO., LTD.
1
QW-R108-017,A
UTC MC33218 LINEAR INTEGRATED CIRCUIT
PIN CONFIGURATION
CP2
1
24
Vcc
XDI
2
23
TAO
CPT
3
22
MCO
TLI
4
21
MCI
TLO
5
20
POR
VB
6
19
DR
CT
7
18
DATA
CD
8
17
CLK
NC
9
16
RXI
CPR
10
15
RXO
RLI
11
14
RAO
RLO
12
13
GND
PIN DESCRIPTION
PIN NO. PIN NAME
1
CP2
2
3
4
5
XD1
CPT
TL1
TLO
6
VB
7
CT
8
CD
9
10
11
12
13
14
NC
CPR
RL1
RLO
GND
RAO
15
RXO
16
17
18
19
RXI
CLK
DATA
DR
20
POR
21
22
23
24
MCI
MCO
TAO
VCC
UTC
DESCRIPTION
A capacitor at this pin stores voltage representing the transmit background noise and
speech levels for the background noise monitor.
Input to the transmit background noise monitor.
An RC sets the time constant for the transmit background noise monitor.
Input to the transmit level detector.
Output of the transmit level detector.
A mid-supply reference voltage, and analog ground for the amplifiers. This must be well
bypassed for proper power supply rejection.
An RC sets the switching time between transmit, receive and idle modes.
Chip Disable (logic input). When low, the IC is active. When high, the entire IC is powered
down and non-functional, except for VB, Input impedance is nominally 235 kΩ.
No internal connection.
An RC sets the time constant for the receive background noise monitor.
Input to the receive level detector.
Output of the receive level detector.
Ground pin for the entire IC.
Output of the receive attenuator.
Output of the receive path input amplifier, and input of the receive attenuator and the dial
tone detector.
Inverting input of the receive amplifier. Bias current flows out of the pin.
Serial Port Clock.1.0MHz maximum. Data is entered on clock’s rising edge.
Serial Port Data Input. Data consists of an 8 bit word, B7 first, B0 last.
Serial Port Data Ready. Taking this line high latches new data into the registers.
Power on reset for the serial port. Upon power up, or when CD is active, all internal
registers are set to logic 0. This logic input may be taken low to reset the registers.
Inverting input of the microphone amplifier, and input of the transmit attenuator.
Output of the microphone amplifier, and input of the transmit attenuator.
Output of the transmit attenuator.
Power Supply pin. Operating range is 2.7V ~ 6.5V. Bypassing is required.
UNISONIC TECHNOLOGIES CO., LTD.
2
QW-R108-017,A
UTC MC33218 LINEAR INTEGRATED CIRCUIT
BLOCK DIAGRAM
Microphone
Transmit Out
Receive In
SerialPort
+
-
Attenuator
Control
BNM
VB
DTD
Rx Attenuator
BNM
+
-
CLK
DATA
POR
DR
CD
Vcc
VB
VB
Tx Attenuator
+
-
+
+
VB
VB
Reg.
Speaker
Speaker
Amplifier
This device contains 610 active transistors
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Supply Voltage
Any Input
Maximum Junction Temperature
Storage Temperature Range
SYMBOL
RATINGS
UNIT
Vcc
VIN
TJ
Tstg
-0.5 ~ 7.0
-0.4 ~ Vcc +0.4
+150
-65 ~ +150
V
V
℃
℃
RECOMMENDED OPERATION LIMITS
PARAMETER
Supply Voltage (Non-AGC Range)
(AGC Range)
Maximum Attenuator Input Signal
Logic Input Voltage (Pins 8,17-19)
Low
High
Clock and Data Rate (serial port)
VB Output Current
Operating Ambient Temperature Range
UTC
SYMBOL
MIN
Vcc
3.5
2.7
TYP
6.5
3.5
300
Vin(max)
VINL
FDATA
IVB
Ta
MAX
0
2.0
0
0.8
Vcc
1.0
See Figure 14
-40
+85
UNISONIC TECHNOLOGIES CO., LTD.
UNIT
V
mVrms
V
MHz
mA
℃
3
QW-R108-017,A
UTC MC33218 LINEAR INTEGRATED CIRCUIT
ELECTRICAL CHARACTERISTICS (Ta=+25℃, Vcc=5.0V, CD≤0.8V,unless noted, see Figure 3)
PARAMETER
POWER SUPPLY
Supply Current
Idle Mode
Tx Mode
Rx Mode
Supply Current
SYMBOL
ICCE
ICCD
VB Output Voltage
VB
VB Output Resistance
PSRR @ VB versus Vcc
ATTENUATOR CONTROL
CT Voltage (with Respect to VB)
ROVB
PSRR
VCT-VB
CT Source Current
CT Sink Current
CT Idle Current
Dial Tone Detector Threshold
ATTENUATORS
Receive Attenuator Gain
ICTR
ICTT
ICTI
VDT
GRXF
GRXTF
GRXIF
ΔGRXF
GRXH
GRXTH
GRXIH
ΔGRXH
Volume Control Range
VCR
AGC Attenuation Range
GAGC
UTC
TEST CONDITION
Enabled, CD≤0.8V, VB Open,
See Figure 13
Disabled, CD=2.0V, VB Open,
VCC=3.0V
VCC=5.0V
VCC=6.5V
IVB=0, CD=0
VCC=2.7V
VCC=5.0V
VCC=6.5V
IVB≤-1.0mA
f=1.0kHz, CVB=100μF
Full Range, B5=0
Rx Mode (Maximum Volume)
Idle Mode
Tx Mode
Half Range, B5=1
Rx Mode (Maximum Volume)
Idle Mode
Tx Mode
Switching to Rx Mode
Switching to Tx Mode
With Respect to VB at RXO
f=1.0kHz, Maximum Volume
Full Attenuation Range (B5=0)
Rx Mode
Tx Mode
Idle Mode
Range (Rx to Tx Mode)
Half Attenuation Range (B5=1)
Rx Mode
Tx Mode
Idle Mode
Range (Rx to Tx Mode)
Rx Mode Only. B3-B0 changed
from 0000 ~ 1111, See Figure 6,7
Full Range
Half Range
Vcc=3.5 ~ 2.7V, Receive Mode
only, B3 ~ B0=0000, See Figure 8
Full Range
Half Range
MIN
TYP
MAX
3.0
4.6
4.6
5.3
6.0
50
2.1
67
110
150
170
0.9
2.2
3.0
600
57
2.3
UNIT
mA
μA
V
Ω
dB
+150
0
-100
mV
-55
33
-3.0
-4.0
+85
0
-35
-42
42
0
-20
-33
55
3.0
-8.0
3.0
-49
-28
50
6.7
-47
-25
53
9.0
-43
-22
56
-10
-37
-28
23
-7.0
-34
-25
27
-4.0
-31
-22
39
34
40
25
46
12
21
19
28
UNISONIC TECHNOLOGIES CO., LTD.
μA
μA
μA
mV
dB
dB
dB
4
QW-R108-017,A
UTC MC33218 LINEAR INTEGRATED CIRCUIT
PARAMETER
SYMBOL
Transmit Attenuation Gain
GTXF
GTXRF
GTXIF
ΔGTXH
GTXH
GTXRH
GTXIH
ΔGTXH
RAO. TAO Output Current
IOATT
Capability
RAO Offset Voltage with Respect
to VB
Rx Mode
VRAO
Idle Mode
Tx Mode
TAO Offset Voltage with Respect
to VB
VTAO
Rx Mode
Idle Mode
Tx Mode
MICROPHONE AMPLIFIER (Pin 21, 22)
Output Offset with Respect to VB
MCOVOS
Input Bias Current (Pin 21)
IMBIAS
Open Loop Gain
AVOLM
Gain Bandwidth
GBWM
Maximum Output Voltage Swing
VOMAX
Maximum Output Current Capability
IOMCO
MUTING (ΔGain)
Microphone Amplifier Only
AMT
TEST CONDITION
f=1.0kHz, Maximum Volume)
Full Attenuation Range (B5=0)
Tx Mode
Rx Mode
Idle Mode
Range (Tx to Rx Mode)
Half Attenuation Range (B5=1)
Tx Mode
Rx Mode
Idle Mode
Range (Tx to Rx Mode)
TYP
MAX
UNIT
3.0
-49
-19
50
6.7
-47
-16
53
9.0
-43
-13
56
dB
-9.0
-36
-19
23
-6.5
-34
-16
27
-3.0
-30
-13
29
RF=300kΩ
f < 100 Hz
(Note 1)
Measured at pin 22
RF=300 kΩ
RF=100 kΩ
Microphone Amplifier +Transmit
Measured at Pin 23
TMT
RF=300 kΩ
Attenuator in Receive Mode
MUTING (ΔGain)
Timing from Data Ready Lo-to-Hi
(See Figure 27)
To Mute
tMM
To Enable
tENM
RECEIVE AMPLIFIER (Pins 15,16)
Output Offset with Respect to VB
RXOVOS RF=10 kΩ
Input Bias Current (Pin 16)
IRBIAS
Open Loop Gain
AVOLR f<100Hz
Gain Bandwidth
GBWR
Maximum Output Voltage Swing
VOMAX (Note 2)
Maximum Output Current Capability
IORXO
LEVEL DETECTORS AND BACKGROUND NOISE MONITORS
Tx-Rx Switching Threshold
ITH
(Pins 4,11)
UTC
MIN
95
2.0
mA
-50
0
-2.0
mV
-2.0
-5.0
-50
mV
-10
-30
80
1.5
350
2.0
mV
nA
dB
MHz
mVrms
mA
73
64
dB
113
dB
μs
2.0
1.0
-1.3
-30
80
1.5
350
2.0
0.8
1.0
UNISONIC TECHNOLOGIES CO., LTD.
mV
nA
dB
MHz
mVrms
mA
1.2
μA
5
QW-R108-017,A
UTC MC33218 LINEAR INTEGRATED CIRCUIT
PARAMETER
CPR, CPT Output Resistance (for
Pull down)
CPR, CPT Leakage Current
CPR, CPT Nominal DC Voltage
(No Signal)
TLO, RLO, CP2 Source Current
TLO, RLO, CP2 Output Resistance
TLO, RLO, CP2 Sink Current
CD INPUT (PIN 8)
Switching Threshold
Input Resistance
Input Current
Timing
To Disable
To Enable (See Figure 26)
POR INPUT (Pin 20)
Switching Threshold
Nominal DC Voltage
Effective Resistance
Input Current
Timing to Reset
Minimum Power On Reset Time
(See Figure 20)
SERIAL PORT (PINS17-19)
Switching Threshold
Clock Input Current (Pin 17)
SYMBOL
Data Ready Input Current (Pin19)
Timing
Minimum Requirements
(See Figure 2)
MIN
TYP
MAX
5.0
Ω
ICPLK
VCP
-0.2
1.9
μA
-2.0
500
2.0
mA
Ω
μA
ILDOH
RLD
ILDOL
VTHCD
RCD
ICD
@ VB-1.0V
@ VB+1.0V
Vin=0.8V
Vin=5.0V
170
tCD
tENC
VTHPOR
VPOR
RPOR
IPOR
tPOR
TMPOR
2.7V≤Vcc≤6.5V
2.7V≤Vcc≤6.5V
0V<Vin<0.5V
Vin=0V
Vin=5.0V
Pin 20 Taken to<1.2V
C=0.1μF
VCC=6.5V
VCC=5.0V
VCC=2.7V
70
IINDA
IINDR
t1
t2
DR≤0.8V, VIN=0.9V
VIN=5.0V
DR≥2.0V, VIN=0.6V
VIN=5.0V
VIN=0.9V
VIN=5.0V
VIN=0.9V
VIN=5.0V
Data Ready Falling Edge to Clock
8th Clock Rising Edge to DR
Rising Edge
Data Setup Time
Data Hold Time
Clock High Time
1.5
235
40
V
300
5.6
5.2
5.6
13.8
V
kΩ
μA
3.0
μs
1.2
1.5
115
-40
630
30
V
V
kΩ
160
μA
μs
2.7
3.7
10.6
VTHSP
t3
t4
t5
1.3
7.5
75
7.9
84
7.5
75
20
200
200
100
ms
V
12.8
13.3
12.8
36
UNISONIC TECHNOLOGIES CO., LTD.
μA
μA
μA
ns
100
100
200
SYSTEM DISTORTION (See Figure 1)
Microphone Amplifier +TX
THDT
0.2
Attenuator Distortion
Receive Amplifier +Rx Attenuator
THDR
0.2
Distortion
Note 1: Output swing is limited by the capability of the transmit attenuator input. (See Figure 16)
Note 2: Output swing is limited by the capability of the receive attenuator input. (See Figure 16)
UTC
UNIT
RCP
IINCK
Data Input Current (Pin18)
TEST CONDITION
3.0
%
3.0
%
6
QW-R108-017,A
UTC MC33218 LINEAR INTEGRATED CIRCUIT
TYPICAL TEMPERATURE PERFORMANCE
-40℃
PARAMETER
0℃
+25℃
+85℃
UNIT
Power Supply Current
5.4
4.9
4.6
4.2
Enabled .VB Open
129
118
110
125
Disabled. VB Open
VB Output Voltage (IVB=0)
2.0
2.15
2.2
2.3
CT Source Current (Switching to Rx Mode)
-37
-41
-42
-42
CT Sink Current (Switching to Tx Mode)
36
41
42
43
Attenuator “On” Gain (Full Range)
6.7
6.7
6.7
6.4
Attenuator Range (Full Range)
53
53
53
53
Volume Control Range (Rx Mode Only)
36
39
40
42
B3-B0 Changed from 0000 ~ 1111
AGC Attenuation Range
38
20
21
22
NOTE: Temperature data is typical performance only, based on sample characterization, and does not
guaranteed limits over temperature.
Vin
3.5mV
1.0kHz
3.0k
mA
μA
V
μA
μA
dB
dB
dB
dB
provide
300k
MCI
MCO
21
22
+
VB
Tx Attenuator
TAO
23
Vout
Note: Tx Attenuator forced to transmit mode.
Vin
3.5mV
1.0kHz
10k
10k
RXI
RXO
16
VB
15
+
Rx Attenuator
RAO
14
Vout
Note: Rx Attenuator forced to receive mode.
Figure 1. System Distortion Test
UTC
UNISONIC TECHNOLOGIES CO., LTD.
7
QW-R108-017,A
UTC MC33218 LINEAR INTEGRATED CIRCUIT
Data Ready
t2
t1
t5
Clock
t3 t4
B7
Dala In
B6
B5
B4
B3
B2
B1
B0
Figure 2. Serial Port Timing Diagram
NOTES: 1. Maximum clock and data rate is 1.0MHz. There is no required minimum rate
2. B7 is to be entered first, B0 last.
3. Data is entered on the clock rising edge.
4. Clock can continue to toggle after B0 is entered if Data Ready goes high before the colck's next rising
edge. This is not recommended due to possible noise problems.
5. Upon power up. all bits are internally set to logic 0, by the POR pin.
6. Data Ready must go low before the first falling clock edge after the clock rising edge associated with B7.
See text for additional information.
SERIAL PORT CONTROL BITS
BITS
CODE
FUNCTION
00
Normal voice switched operation
01
Force to receive mode
B7, B6
10
Force to idle mode
11
Force to transmit mode
0
Attenuator range is 53 dB
B5
1
Attenuator range is 27 dB
0
Microphone amplifier is active
B4
1
Microphone amplifier is muted
B3-B0
0000
Maximum receive volume
(Note 1)
1111
Minimum receive volume
Note 1: Bit B0 is the LSB for the volume control.
UTC
UNISONIC TECHNOLOGIES CO., LTD.
8
QW-R108-017,A
UTC MC33218 LINEAR INTEGRATED CIRCUIT
From
Microphone
Transmit Output To
2-4 Wire Converter
0.22
300k
3.0k
5.1k
R1
0.1 TAO
23
MCO
22
21
MCI VB +
Tx Attenuator
Microprocessor
DR
DR
19
Data
Clock
SPI
1.0
XDI
2
100k
CP2 CPT TLI
3
4
1
Vcc
VB +
AGC
Data
18 Register
CK 17
and
POR 20 Decode
Logic
0.1
DIN
47
4.7k 0.1
Tx
BNM
Attenuator
Control Circuit
Vcc
5 TLO
1.0
+
Tx-Rx Comp
7 CT
6
Normal
Disable
8
CD
24
Vcc
100
Bias
13
GND
Vcc
Rx
BNM
10
12
11
CPR RLO
RLI
1.0
47
100k
Dial Tone Detector
+ VB
-
+
VTH
Rx Attenuator
14
RAO
+
15
15k 15
VB 100
16 RXI
VB
RXO
R2 0.1
5.1k
10k
MC34119
Speaker
Amplifier
10k
0.1
Receive Input From
2-4 Wire Converter
NOTES: 1. All capacitors are in µF unless otherwise noted.
2. Values shown are suggested initial values only. See Applications Information for circuit adjustments.
Figure 3. UTC MC33218 Block Diagram and Test Circuit
UTC
UNISONIC TECHNOLOGIES CO., LTD.
9
QW-R108-017,A
UTC MC33218 LINEAR INTEGRATED CIRCUIT
TYPICAL CHARACTIRS
Figure 4. Attenuator Gain versus V
Figure 5. Attenuator Gain versus V
-10
-20
-30
-40
-50
-100
-50
0
50
100
Transmit
Attenuator
Receive
Attenuator
-10
-20
-30
-40
-35
150
-15
5.0
25
VCT - VB (mV)
Vcc≧3.5V
-10
Vcc=3.1V
-20
-30
Vcc=2.7V
-40
-50
0
4
8
C
-10
Vcc≧3.5V
-20
Vcc=3.1V
-30
Vcc=2.7V
-40
-50
F
0
100
Vout - VB, OUTPUT VOLTAGE (mV)
RECEIVE ATTENUATOR GAIN (dB)
Full Range
0
Half Range
-20
-30
B3-B0=0000
2.9
3.1
Vcc (V)
UTC
3.3
8
C
F
Figure 9. Level Detector AC Transfer
Characteristics
Figure 8. Receive Gain versus Vcc
-50
2.7
4
VOLUME SETTING (BITS B3-B0, HEX VALUE)
10
-40
85
0
VOLUME SETTING (BITS B3-B0, HEX VALUE)
-10
65
Figure 7. Receive Gain versus Volume Control
Levels (Hall Attenuation Range)
10
RECEIVE ATTENUATOR GAIN (dB)
RECEIVE ATTENUATOR GAIN (dB)
0
45
VCT - VB (mV)
Figure 6. Receive Gain versus Volume Control
Levels (Full Attenuation Range)
10
CT
(Half Attenuation Range)
0
Receive
Attenuator
Transmit
Attenuator
0
(Pin 7)
ATTENUATOR GAIN (dB)
ATTENUATOR GAIN (dB)
CT
(Full Attenuator Range)
10
3.5
R=5.1k, C=0.1μF
60
R=10k, C=0.047μF
R=10k, C=0.1μF
20
TLI
RLI
XDI
R
0
-20
C
-60
-100
VB
+
TLO
RLO
500 CP2 Vout
2.0μA
1.0μF
Vin
@ 1.0kHz
0
40
80
120
160
200
INPUT SIGNAL, Vin (mVrms)
UNISONIC TECHNOLOGIES CO., LTD.
10
QW-R108-017,A
UTC MC33218 LINEAR INTEGRATED CIRCUIT
Figure 10. Level Detector AC Transfer
Characteristics versus Frequency
Vin = 100 mVrms
60
TLI
RLI
XDI
20
5.1k
TLO
RLO
500 CP2 Vout
+
0.1μA
C
0
VB
Vin
@ 1.0kHz
-20
100
300
1.0μF
2.0μA
1.0k
Figure 11. Level Detector DC Transfer
Characteristics
200
OUTPUT VOLTAGE, V out-VB (mV)
OUTPUT VOLTAGE, V out-VB (mV)
100
150
100
0
TLO
RLO
500 CP2 Vout
+
VB
1.0μF
2.0μA
Vin
-50
-100
10k
TLI
RLI
XDI
50
0
-40
FREQUENCY, f (Hz)
-80
-120
-160
-200
DC INPUT CURRENT, Iin (μA)
Figure 12. CD input Characteristics (Pin 8)
Figure 13. Power Supply Current
60
6.0
CD≒0.8V
Idle Mode
4.0
40
Icc (mA)
INPUT CURRENT (米A)
5.0
3.0
2.0
20
1.0
0
0
1.0
2.0
3.0
4.0
5.0
6.0
150μA
2.0V≦CD≦Vcc
Valid for Vin≦Vcc
0
7.0
0
1.0
3.0
2.0
INPUT VOLTAGE (V)
Figure 14. VB Output Characteristics
4.0
100
80
3.0
PSRR (dB)
VB (V)
Vcc=6.5V
2.0
1.0
Vcc=3.0V
0
0
-0.5
Vcc=5.0V
Vcc=4.0V
-1.0
-1.5
OUTPUT CURRENT, I B (mA)
UTC
4.0
5.0
6.0
7.0
Vcc (V)
60
40
Figure 15. VB Power Supply Rejection
versus Frequency and VB Capacitor
CVB=1000μF
CVB=100μF
CVB=33μF
20
-2.0
0
200
1.0k
10k
20k
FREQUENCY, f (Hz)
UNISONIC TECHNOLOGIES CO., LTD.
11
QW-R108-017,A
UTC MC33218 LINEAR INTEGRATED CIRCUIT
Figure 16. Receive Amp and Microphone
Amp Output Swing
THD=5%
0.5
Figure 17. Microphone Amplifier Muting
versus Feedback Resistor
100
80
MUTING → GAIN, (dB)
OUTPUT SWING (Vrms)
1.0
THD≦1%
60
40
20
2.7V≦Vcc≦6.5V
THD measured at TAO, RAO
0
2.5
4.5
3.5
5.5
0
1.0k
6.5
10k
Vcc (V)
Figure 18. Serial Port Input Characteristics
(Pins 17,18,19)
Figure 19. POR Input Characteristics (Pin 20)
DR
200
CIk (DR=Hi)
100
Data & CIk
(DR=Lo)
0
1.0
2.0
5.0
4.0
3.0
INPUT VOLTAGE (V)
800
600
400
200
Vcc=3.0V
0
Valid for Vin≦Vcc
0
300k
1000
INPUT CURRENT (μA)
INPUT CURRENT (μA)
300
100k
FEEDBACK RESISTOR, RF (Ω)
6.0
-100
7.0
Vcc=6.5V
0
1.0
2.0
Valid for Vin≦Vcc
3.0
4.0
5.0
INPUT VOLTAGE (V)
6.0
7.0
Figure 20. Minimum Reset Time versus
Vcc and Pin 20 Capacitor
80
Time for Pin 20 to reach
1.2V from Ground.
RESET TIME (ms)
60
C=0.68μF
40
20
C=0.22μF
C=0.1μF
0
2.5
3.5
4.5
5.5
6.5
Vcc (V)
UTC
UNISONIC TECHNOLOGIES CO., LTD.
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QW-R108-017,A
UTC MC33218 LINEAR INTEGRATED CIRCUIT
200mVrms,1.0kHz
MCO
14mVrms
1.0s
1.0s
TAO
Output
32mVrms
420mVrms
85ms
36ms
200mV
36ms
CPT
240ms
Idle
CT
100mV
TX
225 ms Time Constant
84mV
TLO
140mV
Figure 21. Idle
UTC
Transmit Timing
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QW-R108-017,A
UTC MC33218 LINEAR INTEGRATED CIRCUIT
200mVrms, 1.0kHz
RXO
2.0mVrms
1.0s
1.0s
RAO
Output
85ms
420mVrms
55ms
360mV
CPR
610ms
RX
150mV
CT
Idle
225 ms Time Constant
75ms
140mV
RLO
Note : Refer to Figure 3 for component values. Timing and output amplitudes shown are nominal, and are for the indicated
input signal and component values. Actual timing and outaputs will vary with the application. Bits B7, B6=00.
Figure 22. Idle
UTC
Receive Timing
UNISONIC TECHNOLOGIES CO., LTD.
14
QW-R108-017,A
UTC MC33218 LINEAR INTEGRATED CIRCUIT
200mVrms, 1.0kHz
MCO
〜300ms
〜
〜300ms
〜
200mVrms, 1.0kHz
RXO
TLO
200mV
100ms
RLO
RX
CT Idle
TX
80ms 75ms
200mV
250mV
TAO
Output
90ms
17ms
430mVrms
RAO
Output
430mVrms
Note : External component values are those shown in Figure 3. Timing and output amplitudes shown are nominal, and are for the
indicated input signal and component values. Actual timing and outaputs will vary with the application. Bits B7, B6=00
Figure 23. Tyansmit
Receive Timing
(Short Cycle Timing)
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QW-R108-017,A
UTC MC33218 LINEAR INTEGRATED CIRCUIT
200mVrms, 1.0kHz
MCO
〜1.0s
〜
〜1.0s
〜
200mVrms, 1.0kHz
RXO
200mV
TLO
85ms
RLO
RX
CT Idle
TX
200mV
75ms
250mV
145ms
225ms Time Constant
TAO
Output
t1
80ms
430mVrms
67mVrms
RAO
Output
430mVrms
Note : External component values are those shown in Figure 3. Timing and output amplitudes shown are nominal, and
are for the indicated input signal and component values. Actual timing and outputs will vary with the application. Time
t1 depends on the ratio of the "on"/"off" amplitude of the signal at MCO. Bits B7, B6=00
Figure 24. Transmit
Receive Timing
(Long Cycle Timing)
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QW-R108-017,A
UTC MC33218 LINEAR INTEGRATED CIRCUIT
200mVrms, 1.0kHz
MCO
〜1.0s
〜
〜1.0s
〜
200mVrms, 1.0kHz
RXO
200mV
TLO
85ms
RLO
RX
CT Idle
TX
200mV
27ms
250mV
63ms
100ms Time Constant
t1
29ms
TAO
Output
430mVrms
40mVrms
RAO
Output
430mVrms
Note : External component values are those shown in Figure 3. except the capacitor at CT is 6.8µF. Timing and output
amplitudes shown are nominal, and are for the indicated input signal and component values. Actual timing and outputs
will vary with the application. Time t1 depends on the ratio of the "on"/"off" amplitude of the signal at MCO. Bits B7,
B6=00.
Figure 25. Transmit
Receive Timing
(Long Cycle Timing)
UTC
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17
QW-R108-017,A
UTC MC33218 LINEAR INTEGRATED CIRCUIT
toff
CD Input
(Pin 8)
5.0μs
t1
3.0μs
Output at
RAO, TAO
Note: Enable time t1 depends on the length of
toff according to the following chart:
toff
10ms
20ms
≧50ms
t1
25ms
45ms
60ms
Figure 26. Chip Disable Timing
Data Ready
(Pin 19)
B4=0
2.0μs
1.0μs
Output at
MCO
Figure 27.Muting Timing
POR
(Pin 20)
1.2V
30μs
MCO
Note : Above time established by first muting the microphone amplifier (B4=1).Then the POR pin is taken
low. The 30µs is representative if the internal delay for the internal registers to be reset to 0, and the
associated function change. The registers will remain set to 0 when POR goes high, until new data is
written.
Figure 28. POR Timing
UTC
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UTC MC33218 LINEAR INTEGRATED CIRCUIT
FUNCTIONAL DESCRIPTION
Introduction
The fundamental difference between the operation of a speakerphone and a telephone handset is that of
half-duplex versus full-duplex. The handset is full duplex, meaning conversation can occur in both directions
(transmit and receive ) simultaneously. This is possible due to both the low sound level at the receiver, and the fact
that the acoustic coupling from the earpiece to the mouthpiece is almost non-existent(the receiver is normally held
against a person’s ear). The loop gain from the receiver to the microphone and through the circuit is well below that
needed to sustain oscillations.
A speakerphone, on the other hand, has higher gain levels in both the transmit and receive paths, and attempting
to converse full duplex results in oscillatory problems due to the loop that exists within the speakerphone circuit. The
loop is formed by the hybrid, the acoustic coupling (speaker to microphone), and the transmit and receive
paths(between the hybid and the speaker/microphone). The only practical and economical method used to date is to
design the speakerphone to function in a half duplex mode-i.e., only one person speaks at a time, while the other
listens. To achieve this requires a circuit which can detect who is talking (in reality, who is talking louder), switch “on”
the appropriate path (transmit or receive), and switch “off” (attenuate) the other path. In this way, the loop gain is
maintained less than unity. When the talkers exchange function, the circuit must quickly detect this, and switch the
circuit appropriately. By providing speech level detector, the circuit operates in a “hands-free” mode, eliminating the
need for a “push-to-talk” switch.
The UTC MC33218 provides the necessary circuitry to perform a voice switched, half duplex, speakerphone
function. The IC includes transmit and receive attenuators, pre-amplifiers, and level detectors and background noise
monitors for each path. An attenuator control circuit automatically adjusts the gain of the transmit and receive
attenuators based on the relative strengths of the voice signals present, the volume control, and the supply voltage
(when low). The detection sensitivity and timing are externally controllable.
The UTC MC33218 is unique compared to most speakerphone integrated circuits in that it has a microprocessor
serial port for control of various functions. Those functions are:
-Volume level (15 steps of ≈ 3.0dB each)
-Microphone amplifier mute
-Attenuator range selection (53dB or 27dB)
-Force to receive, idle, or transmit to override the automatic switching.
Please refer to the Block Diagram (Figure 3) when reading the following sections.
Transmit and Receive Attenuators (Full Range B5=0)
The transmit and receive attenuators are complementary, performing a log-antilog function. When one is at
maximum gain (≈6.7dB), the other is at maximum attenuation (-47dB) -they are never both fully ”on” or fully “off”.
Both attenuators are controlled by a single output from the Attenuators are controlled by a single output from the
Attenuator Control Circuit which ensures the sum of their gains will remain constant at a typical value of –40dB. Their
purpose is to provide the half-duplex operation required in a speakerphone.
The attenuators are non-inverting, and have a usable bandwidth of 50kHz. Their input signal (at MCO and RXO)
should be limited to 300mVrms (850mVp-p) to prevent distortion. That maximum recommended input signal is
independent of the volume control setting. Both the inputs and outputs are biased at ≈VB. The output impedance is
<10Ω until the output current limit (typically 2.0mA peak) is reached.
The attenuators are controlled by the single output of the Attenuator Control Circuit, which is measurable at CT (pin
7). When the circuit detects speech signals directing it to the receive mode (by means of the level detectors
described below), an internal current source of 42μA will charge the CT capacitor to a voltage positive with respect
to VB (See Figure 29). At the maximum volume control setting, this voltage will be approximately +150 mV, and the
receive attenuator will have a gain of +6.7dB. When the circuit detects speech signals directing it to the transmit
mode, an internal current source of 42μA will take the capacitor to approximately –100mV with respect to VB (the
transmit attenuator will have a gain of +6.7dB). When there is no speech present in either path, the current sources
are shut off, and the voltage at CT will decay to be equal to VB. This is the idle mode, and the attenuators’ gains are
nearly half-way between their full “on” and fully “off” positions (-25dB for the Rx attenuator, -16dB for the Tx
attenuator). Monitoring the CT voltage (with respect to VB) is the most direct method of monitoring the circuit’s mode,
and its response.
UTC
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UTC MC33218 LINEAR INTEGRATED CIRCUIT
Transmit and Receive Attenuators (Half Range B5=1)
With the attenuators set to the half range, the attenuator which is “on” will have a gain of ≈7.0dB, while the “off”
attenuator will have a gain of ≈-34dB. The idle mode is the same as for the full range (-25dB for the Rx attenuator,
-16dB for the Tx attenuator). The voltage at the CT pin, with respect to VB, will be -35mV for the transmit mode, and
+85mV for the receive mode.
Attenuator Control Circuit
The input to the attenuator control section (Figure 29) are six: The Tx-Rx comparator operated by the level
detectors, two background noise monitors, the AGC circuit, the dial-tone detector, and the microprocessor interface.
These six functions are described as follows.
Level Detectors, Tx-Rx Comparator
There are two identical level detectors –one on the receive side and one on the transmit side (refer to Figure 30).
Each level detector is a high gain amplifier with back-to-back diodes in the feedback path, resulting in non-linear gain,
which permits operation over a wide dynamic range of speech levels. Refer to the graphs of Figure 9,10 and 11 for
their DC and AC transfer characteristics. The sensitivity of each level detector is determined by the external resistor
and capacitor at their input (TLI and RLI). The output charges an external capacitor through a diode and limiting
resistor, thus providing a DC representation of the input AC signal level. The outputs have a quick rise time
(determined by the capacitor and an internal 500Ω resistor), and a slow decay time set by an internal current source
and the capacitor. The capacitors at RLO and TLO should have the same value (±10%) to prevent timing problems.
VB
RT
CT
CT
UTC
MC33218
Voltage
Clamps
I1
42μA
I2
42μA
+
RX
TX
Control
Circuit
AGC
To
Attenuators
TX Background
Monitors
RX
Tx-Rx Comp
μ P Interface
Dial Tone Det
Figure 29. CT Attenuator Control Circuit
Referring to Figure 3, the outputs of the two level detectors drive the Tx-Rx comparator. The comparator’s output
state depends on whether the transmit or receive speech signal is stronger, as sensed by the level detectors. The
attenuator control circuit uses this signal, along with the background noise monitors, to determined which mode to
set.
UTC
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UTC MC33218 LINEAR INTEGRATED CIRCUIT
Signal
Input
C
R
TLI
VB
(RLI)
+
500 Ω
2.0μA
TLO
(RLO)
1.0μF
Figure 30. Level Detector
Background Noise Monitors
The purpose of a background noise monitor is to distinguish speech (which consists of bursts) from background
noise (a relatively constant signal). There are two background noise monitors-on for the receive path and one for the
transmit path. Referring to Figure 32, each is operated on by a level detector, which provides a dc voltage
representative of the combined speech and noise level. The peaks, valleys, and bursts, which are characteristic of
speech, will cause that DC voltage (at CP2 or RLO) to increase relatively quickly, causing the output of the next
amplifier to also rise quickly. If that increase exceeds the 36mV offset,at a speed faster than the time constant at
CPT (CPR), the output of the last comparator will change, indicating the presence of speech to the attenuator control
circuit. This will keep the circuit in either the transmit or the receive mode, depending on which side has the stronger
signals. Whenever a new continuous signal is applied, the time constant at CPT (CPR) determines how long it takes
the circuit to decide that the new sound is continuous, and therefore background noise. The system requires that the
average speech signal be stronger than the background noise level (by 6.0-7.0dB) for proper speech detection to
occur.
When only background noise is present in both paths, the output of the monitors will indicate the absence of
speech, allowing the circuit to go to the idle mode.
AGC Circuit
In the receive mode only, the AGC circuit decreases the gain of the receive attenuator when the supply voltage at
Vcc falls below 3.5V, according to the graph of Figure 8. The gain of the transmit path changes in a complementary
manner.
The purpose of this feature is to reduce the power (and current) used by the speaker when the speakerphone is
powered by the phone line, and is connected to a long telephone line, where the available power is limited. Reducing
the speaker power controls the voltage sag at Vcc, reduces clipping and distortion at the speaker output, and
prevents possible erratic operation.
Dial Tone Detector
When a speakerphone is initially taken off-hook, the dial tone signal will switch the circuit to the receive mode.
However, since the dial tone is a continuous signal, the UTC MC33218 will consider it as background noise, rather
than speech, and would switch from receive to idle, causing the dial tone sound to fade. The dial tone detector
prevents the fading by disabling the receive background noise monitor.
The dial tone detector is a comparator with one side connected to the receive attenuator input (RXO), and the
other input connected to VB with a –20mV offset (see Figure 31). If the circuit is in the deceive mode, and the
incoming signal has peaks greater than 20mV (14mVrms), the comparator’s output will change, keeping the circuit
from switching to the idle mode. The receive attenuator will then be at a gain determined solely by the volume
control.
NOTE: The dial tone detector is not a frequency discriminating circuit.
UTC
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UTC MC33218 LINEAR INTEGRATED CIRCUIT
To Rx
Attenuator
RXO
+
To Attenuator
Control Circuit
20mV
VB
Figure 31. Dial Tone Detector
CPT
(CPR) 100k
Background
Noise Monitor
Signal
Input
C
R
XDI
(RLI)
+
External Component Values
are Application Dependent
500Ω
2.0μA
CP2
(RLO)
47μF
+
-
1.0μF
Vcc
+
36mV
31.7k
18.6k
+
To Attenuators
Control Circuit
VB
Figure 32. Background Noise Monitor
Microprocessor Interface
The three line SPI port (Pin17 ~ 19) is used for setting various functions with a single 8 bit word. The functions are
as follows:
Volume control: Bits B0-B3 control the gain of the attenuators only when in the receive mode. Setting B3-B0=0000
sets the receive attenuator to its maximum gain (+6.7dB in full range, -7.0dB in half range), and therefore maximum
volume at the speaker. Setting B3-B0=1111 sets the receive attenuator to a minimum gain level (≈-32dB), and is
the minimum volume setting. B0 is the LSB for this function, and each step changes the gain by ≈3.0dB at the high
volume end (see Figure 6 and 7). The transmit attenuator gain is varied in a complementary manner. These bits
have no effect in the idle or transmit modes.
Muting of the microphone amplifier: bit B4 is used to set the microphone amplifier to the normal or the muted mode.
When this bit is a 1, the amplifier is muted. See the paragraph entitled ”Microphone Amplifier, Mute” elsewhere in
this document.
Attenuator range: bit B5 is used to select the attenuator range. When it is a 0, the range is 53dB (from full ” on” to
full” off”). when it is a 1, the range is 27dB. The 53dB range is used for the majority of applications, such as
desktop speakerphones (home or office use), intercom units, and any application where the speaker and
microphone are in close proximity. The 27dB range is commonly used in European speakerphone applications,
where the typical design involves using the handset for the microphone function, and is therefore somewhat
separated from the speaker.
Operating mode: bit B7 and B6 set the circuit operating mode. When 00, the normal voice activated switching is
enabled, and the circuit responds to the speech levels as described elsewhere in this document. When 01, the circuit
is forced to the receive mode in that the receive attenuator is “on” and the transmit attenuator is “off”. The volume
control (Bits B3-B0) is effective in this mode. When 10, the circuit is forced to the idle mode, When 11, the circuit is
forced to the transmit mode. The volume control bits have no effect in the idle or transmit modes.
The eight bits are entered serially. B7 first and B0 last. Each bit is entered on a clock rising edge. The maximum
clock and data rate is 1.0MHz, and there is no minimum required speed. Data Ready, which is normally high, is to be
held low while the eight bits are clocked in. The eight bits take effect when Data ready is taken high. There is no chip
UTC
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address, or other protocol or handshaking required. See Figure 2 for a timing diagram. Note that Data Ready need
not be taken low before the first clock rising edge. It must be taken low before the first clock falling edge which
follows the first clock rising edge. This allows Data Ready to be taken low coincident with the first clock rising edge, if
desired, as well as before that.
It is recommended that DR be kept high when not entering data, to prevent disruption of the circuit by transients or
glitches on the clock or data lines. This is not required, and DR may be taken low after latching in data, if desired.
The clock input can be stopped after B0 is entered, or it may continue to run as long as Data ready is taken high
before the next clock rising edge. It is recommended that the clock not be continued to prevent possible noise
problems.
The three inputs must be kept within the range of Vcc and GND. If an input is taken more than 0.5V above Vcc or
below GND excessive currents will flow, and the device’s operation will be distorted. See Figure 18 for input current
requirements at these pins.
Power On Reset
The power on reset, when at a logic low (below its threshold of 1.2V) resets the internal registers to a logic 0,
independent of the Clock, Data, or Data Ready position. A capacitor on this pin provides a power up time delay to
allow Vcc to stabilize before the registers can accept data. Alternately, Pin20 can be driven directly from a logic
source if desired. The POR input must be kept within the range of Vcc and GND. If the input is taken more than 0.5V
above Vcc or below GND excessive currents will flow, and the device’s operation will be distorted. The configuration
of this pin is shown in Figure 33.
When Vcc is applied to the UTC MC33218 the registers will be enabled when the voltage at POR exceeds 1.2V.
The time to reach this level depends on the capacitor at POR, and Vcc and will not be less than the time shown in
Figure 20, The actual reset time is affected by the rise time of Vcc. Any data written to the registers while POR is
below 1.2V will not be stored or effective.
The nominal DC voltage at POR is ≈15V.
The registers may be intentionally reset by external control by pulling POR to ground with (for example) an open
collector NPN transistor. The time to reset is shown in Figure 28. When POR once again goes high, the registers’
data will remain at 0 until new data is entered. Old data is not retained. The time required to release the registers
after releasing POR (by turning “off” the NPN transistor) is shown in Figure 20.
If POR is driven by an external logic output, its input current requirement is shown in Figure 19.
Vcc
CD
POR
96k
5.0k
Figure 33. Power On Reset Pin
Microphone Amplifier, Mute
The microphone amplifier (Pins 21, 22) has the non-inverting input internally connected to VB, while the inverting
input and the output are pinned out. Unlike most op-amps, the amplifier has an all-NPN output stage, which
maximizes phase margin and gain-bandwidth. This feature ensures stability at gains less than unity, as well as with a
wide range of reactive loads. The open loop gain is typically 80dB (f<100Hz), and the gain-bandwidth is typically
1.5MHz. The maximum output swing, for 1.0% or less distortion, is determined by the input capability of the transmit
attenuator (300 ~ 350mVrms), and by VCC at low supply voltages (see Figure 16). The output impedance is <10Ω
until current limiting is reached (typically 2.0mA peak). The input bias current at MCI is typically 30nA out of the pin.
The mute function, when activated, will reduce the gain of the amplifier by shorting the external feedback resistor
UTC
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UTC MC33218 LINEAR INTEGRATED CIRCUIT
(RMF Figure34). The amplifier is not disabled in this mode-MCO remains a low impedance output, and MCI remains
a virtual ground at VB. The amount of muting (the change in gain) depends on the value of the external feedback
resistor, according to the graph of Figure 17. Muting is enabled by setting bit B4 to a logic 1.
RMF
From
Micriphone
From
μP
VB
RMI
+
-
MCI
MCO
B4
μP Interface
Figure 34. Microphone Amplifier and Mute
Receive Amplifier
The receive amplifier (pin 15, 16) has the non-inverting input internally connected to VB, while the inverting input
and the output are pinned out. Unlike most op–amps, the amplifier has an all–NPN output stage, which maximizes
phase margin and gain–bandwidth. This feature ensures stability at gains less than unity, as well as with a wide
range of reactive loads. The open loop gain is typically 80dB (f <100 Hz), and the gain–bandwidth is typically 1.5
MHz. The maximum p–p output swing, for 1.0% or less distortion, is determined by the input capability of the receive
attenuator (300 ~ 350mVrms), and by VCC at low supply voltages (see Figure 16). The output impedance is <10Ω
until current limiting is reached (typically 2.0 mA peak). The input bias current at RXI is typically 30 nA out of the pin.
Power Supply, VB and Chip Disable
The power supply voltage at Pin 24 is to be between 3.5V and 6.5V for normal operation, and down to 2.7V with
the AGC in effect (see AGC section). The supply current required is typically 4.6mA in the idle and transmit modes
(at 5.0V), and slightly more in the receive mode. Figure 13 shows the supply current for both the normal and
disabled modes.
The output voltage at VB (Pin6) is approximately equal to (Vcc-0.7)/2, and provides an ac ground for the internal
amplifiers, and the system. The output impedance at VB is approximately 600Ω,and in conjunction with the external
capacitor at VB, forms a low pass filter for power supply noise rejection. The choice of the VB capacitor size is
application dependent based on whether the circuit is powered by the telephone line or a regulated supply. See
Figure 15 for PSRR data from VCC to VB. Since VB biases the microphone and receive amplifiers, the amount of
supply rejection at their outputs is a function of the rejection at VB, as well as the gains of the amplifiers.
The amount of current, which can be sourced out of the VB pin depends on the VCC voltage (see Figure 14).
Drawing current in excess of that shown in Figure 14 will cause VB to drop low enough to disrupt the circuit’s
operation. This pin can sink ≈100μA when enabled, and 0μA when disabled.
The chip disable (Pin 8) permits powering down the IC for power conservation. With CD between 0 and 0.8V,
normal operation is in effect. With CD between 2.0V and Vcc, the IC is powered down, and the supply current drops
to ≈110μA (at Vcc=5.0V, see Figure 13). When CD is high, the microphone and receive amplifiers, the level
detectors, and the two attenuators are disabled (their outputs go to a high impedance). The background noise
monitors are disabled, and pins 3 and 10 will go to Vcc. The VB output, however, remains active, except that it
cannot sink any current. The serial port is disabled so that new data may not be entered. Upon re-enabling the circuit,
the 8 internal registers will be set 0, regardless of their previous contents. Figure 26 indicates the disable and enable
timing.
The CD input must be kept within the range of Vcc and GND. See Figure 12 for input current requirements. If the
input is taken more than 0.5V above Vcc or below GND excessive currents will flow, and the device’s operation will
be distorted. If the disable function is not used, the pin should be connected to ground.
UTC
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UTC MC33218 LINEAR INTEGRATED CIRCUIT
Switching and Response Time Theory
The switching time of the UTC MC33218 circuit is dominated by the components at CT (Pin7, refer to Figure 3),
and second by the capacitors at the level detector outputs (RLO, TLO).
The transition time to receive or to transmit mode from idle, or from the other mode, is determined by the capacitor
at CT, together with the internal current source (refer to Figure 29). The switching time is:
∆T =
∆V × CT
I
When switching from idle to receive,ΔV = 150mV, I = 42μA, the CT capacitor is 15μF, and ΔT calculates to ≈
53ms. When switching from idle to transmit,ΔV = 100mV, I = 42μA, the CT capacitor is 15μF, and ΔT calculates
to ≈36ms .
When the circuit switches to idle, the internal current sources are shut ”off ”, and the time constant is determined
by the CT capacitor and RT, the external resistor (see Figure 29). With CT =15μF, and RT =15kΩ,the time constant
is ≈225ms, giving a total switching time of ≈0.68s (for 95% change). The switching period to idle begins when
both speakers have stopped talking. The switching time back to the original mode will depend on how soon that
speaker begins speaking again. The sooner the speaking starts during the “decay to idle” period, the quicker the
switching time since a smaller voltage excursion is required. That switching time is determined by the internal current
sources as described above.
When the circuit switches directly from receive to transmit (or vice-versa), the total switching time depends not
only on the components and currents at the CT pin, but also on the response of the level detectors, the relative
amplitude of the two speech signals, and the mode of the circuit, since the two level detectors are connected
differently to the two attenuators.
The rise time of the level detector’s outputs (RLO, TLO) is not significant since it is so short, The decay time,
however, provides a significant part of the “hold time” necessary to hold the circuit (in transmit or receive) during the
normal pauses in speech. The capacitors at the two outputs must be equal value (±10%) to prevent problems in
timing and signal response.
The components at the inputs of the level detectors (RLI, TLI) do not affect the switching time, but rather affect the
relative signal levels required to switch the circuit, as well as the frequency response of the detectors. They must be
adjusted for proper switching response as described later in this document.
Switching and Response Time Measurements
Using burst of 1.0kHz sine waves to force the circuit to switch among its modes, the timing results were measured
and are indicated in Figures 21-25.
(a) In Figure 21, when a signal is applied to the transmit attenuator only (normally via the microphone and the
microphone amplifier), the transmit background noise monitor immediately indicates the “presence of speech”
as evidenced by the fact that CPT begins rising. The slope of the rising CPT signal is determined by the
external resistor and capacitor on that pin. Even though the transmit attenuator is initially in the idle mode
(-16dB), there is sufficient signal at its output to cause TLO to increase. The attenuator control circuit then
forces the circuit to the transmit mode, evidenced by the change at the CT pin. The attenuator output signal is
then 6.7dB above the input.
With the steady sine wave applied to the transmit input, the circuit will stay in the transmit mode until the CPT
pin gets to within 36mV of its final value. At that point the internal comparator (see Figure 32) switches
indicating to the attenuator, control circuit that the signal is not speech, but rather it is background noise. The
circuit now begins to decay to idle, as evidenced by the change at CT and TLO, and the change in amplitude at
TAO.
When the transmit signal at MCO is removed (or reduced), the CPT pin drops quickly, allowing the CPT to
quickly respond to any new speech which may appear afterwards. The voltage at CT decays according to the
time constant of its external components, if not already at idle.
The voltage change at CP2, CPT, and TAO depend on the input signal’s amplitude, and the components at XDI
and TLI. The change at CT is internally fixed at the level shown. The timing numbers shown depend both on the
signal amplitudes and the components at the CT and CPT pins.
(b) Figure 22 indicates what happens when the same signal is applied to the receive side only. RLO and CPR
react similarly to TLO and CPT. However, the circuit does not switch to idle when CPR finishes transitioning
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since the dial tone detector disables the background noise monitor, allowing the circuit to stay in the receive
mode as long as there is a signal present. If the input signal amplitude had been less than the dial tone
detector’s threshold, the circuit response would have been similar to that shown in Figure 21. The voltage
change at CT depends on the setting of the volume control (bits B3-B0). The +150mV represent maximum
volume.
(c) Figure 23 indicates the circuit response when transmit and receive signals are alternately applied, with
relatively short cycle times (300ms each) so that neither attenuator will begin to go to idle during its “on” time.
Figure 24 indicates the circuit response with longer cycle times (1s each), where the transmit side is allowed to
go to idle. Figure 25 is the same as Figure 24, except the capacitor at CT has been reduced from 15μF ~ 6.8μ
F, providing a quicker switching time. The reactions at the various pins are shown. The response times at TAO
and RAO are different, and typically slightly longer than what is shown in Figure 21 and 22 due to:
-The larger transition required at CT pin,
-The greater difference in the levels at RLO and TLO due to the positions of the attenuators, as well as their
decay time, and
-Response time of background noise monitors.
The timing responses shown in these three figures are representative for those input signal amplitudes, and
burst durations. Actual response time will vary for different signal conditions
NOTE: While it may seem desirable to decrease the switching time between modes by reducing the capacitor at
CT, this should be done with caution for two reasons:
(1) If the switching time is too short, the circuit response may appear to be “too quick” to the user, who may consider
its operation erratic. The recommended values in this data sheet, along with the accompanying timings, provide
what experience has shown to be a “comfortable response” by the circuit.
(2) The distortion in the receive attenuator will increase as the CT capacitor value is decreased. The extra THD will
be most noticeable at the lower frequencies, and at the lower amplitudes. Table 1 provides a guideline for this
issue.
TABLE 1. THD versus CT Capacitor
CT CAPACITOR
IDLE-Rx TRANSITON
INPUT @RAI
20mVrms
15μF
53ms
100mVrms
20mVrms
6.8μF
24ms
100mVrms
20mVrms
3.3μF
12ms
100mVrms
FREQ.
THE@RAD
300Hz
1.0kHz
300Hz
1.0kHz
300Hz
1.0kHz
300Hz
1.0kHz
300Hz
1.0kHz
300Hz
1.0kHz
1.5%
0.3%
0.6%
0.12%
3.6%
1.0%
1.4%
0.4%
7.0%
1.9%
2.8%
0.7%
Considerations in the Design of a Speakerphone
The design and adjustment of a speakerphone involves human interfaces issues, as well as proper signal levels.
Because of this fact, it is not practical to do all of the design mathematically. Certain parts of the design must be
done by trial and error, most notably the switching response and the “How does it sound?” parts of the testing.
Among the recommendations for a successful design are:
(1) Design the enclosure CONCURRENTLY with the electronics. Do not leave the case design to the end as its
properties are just as important (just as equally important) as the electronics. One of the major issues involved
in a speakerphone design is the acoustic coupling of the speaker to the microphone, which must be minimized.
This parameter is dependent entirely on the design of the enclosure, the mounting of the speaker and the
microphone and their characteristics.
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(2)
(3)
(4)
(5)
(6)
(7)
Ensure the speaker is optimally mounted. This fact alone can make a difference of several dB in the sound
level from the speaker, as well as the sound quality. The speaker manufacturer should be consulted for this
information.
Do not breadboard the circuit with the microphone and speaker hanging out in midair. It will not work. The
speaker and microphone must be in a suitable enclosure, preferably one resembling the end product. If this is
not feasible, temporarily use some other properly designed enclosure, such as one of the many speakerphones
on the market.
Do not breadboard the circuit on a wirewrapped board or a plug-in prototyping board. Use a PC board,
preferably with a ground plane. Proper filtering of the supply voltage, at the Vcc pin, is essential.
The speakerphone must be tested with the intended hybrid, and connected to a phone line, or phone line
simulator. The performance of the hybrid is just as important as the enclosure and the speakerphone IC.
When testing the speakerphone, be conscious of the environment. If the speakerphone is in a room with large
windows and tile floors, it will sound different than if it is in a carpeted room with drapes. Additionally, be
conscious of the background noise in a room.
When testing the speakerphone on a phone line, make sure the person at the other end of the phone line is not
in the same room as the speakerphone.
Design and adjustment Procedure
Assuming the end product enclosure is available, with the intended production microphone and speaker installed,
and the PC boards installed (or temporary substitutes for the PC boards) a recommended sequence is as follows
(refer to Figure 35):
(1) Design the hybrid, ensuring it interfaces properly with the phone line for both DC and AC characteristics. The
return loss must be adjusted so as to comply with the appropriate regulatory agency. The sidetone should then
be adjusted according to the intent of the product. If the product is a speakerphone only, without a handset, the
sidetone gain (GST) should be adjusted for maximum loss. If a handset is part of the end product, the sidetone
must be adjusted for the minimum acceptable sidetone levels in the handset. Generally, for the speakerphone,
10-20dB sidetone loss is preferred for GST.
(2) Check the acoustic coupling of the enclosure (GAC in Figure 35). With a steady sound coming out of the
speaker, measure the rms voltage on the speaker terminals, and the rms voltage out of the microphone.
Experience has shown that the loss should be at least 40dB, preferably 50dB. This should be checked over the
frequency range of 20Hz ~ 10kHz
(3) Adjust the transmit path for proper signal levels, based on the lowest speech levels as well as the loudest.
Based on the typical levels form commonly available microphones, a gain of about 35-45dBis required from the
microphone terminals to Tip and Ring. Most of that gain should be in the microphone amplifier so as to make
best use of the transmit attenuator, but make sure the maximum attenuator input level at MCO is not exceeded.
If a signal generator is used instead of a microphone for testing, the circuit can be locked into the transmit
mode by grounding CPT (Pin3), or using bits B7 and B6 (set to 11) Frequency response can generally be
tailored with capacitors at the microphone amplifier.
(4) Adjust the receive path for proper signal levels, based on the lowest speech levels as well as the loudest. A
gain of about 30dB is required from Tip and Ring to the speaker terminals for most applications (at max.
volume). Most of that gain should be in the receive amplifier (at RXI, RXO) so as to make best use of the
receive attenuator, but make sure the max. Attenuator input level at RXO is not exceeded. If a signal generator
is used for signal injection during testing, the circuit can be locked into the receive mode by grounding CPR
(Pin 10), although this is usually not necessary since the dial tone detector will keep the circuit in the receive
mode. As an alternate, bit B7 and B6 can be set to 01. Frequency response can generally be tailored with
capacitors at the receive amplifier.
(5) Check that the loop gain (i.e. the receive path gain + acoustic coupling gain +transmit path gain+ sidetone gain)
is less than 0dB over all frequencies. If not, ”singing” will occur-a steady oscillation at some audible frequency.
(6)
(a) The final step is to adjust the resistors at the level detector inputs (RLI and TLI) for proper switching
response (the switch point occurs when I1=I2). This has to be the last step as the resistor values depend
on all of the above adjustments, which are based on the mechanical, as well as the electrical,
characteristics of the system. NOTE: An extreme case of level detector misadjustment can result in
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(b)
(c)
(d)
(e)
“motorboating”. In this condition, with a receive signal applied, sound from the speaker enters the
microphone, and causes the circuit to switch to the transmit mode. This causes the speaker sound to
stop (as well as the sound into the microphone), allowing the circuit to switch back to the receive mode.
This sequence is then repeated, usually, at a rate of a few Hz. The first thing to check is the acoustic
coupling, and then the level detector input resistors.
Starting with the recommended values for R1 and R2 (in Figure 3), hold a normal conversation with
someone on another phone .If the resistor values are not optimum, one of the talkers will dominate, and
the other will have difficulty getting through. If, for example, the person at the speakerphone is dominant,
the transmit path is overly sensitive, and the receive path is not sensitive enough. In this case, R1
should be increased, or R2 decreased, or both. Their exact value is not critical at this point, only their
relative value. Keeping R1 and R2 in the range of 2.0 ~ 2.0K, adjust them until a suitable switching
response is obtained.
Then have the person at the other end of the phone line speak continuously loudly, or connect to a
recording which is somewhat strong. Monitor the state of the circuit (by measuring the CT versus VB
pins, and by listening carefully to the speaker) to check that the shound out of the speaker is not
attempting to switch the circuit to the transmit side (through acoustic coupling). If it is, increase R1 (at
TLI) in small steps just enough to stop the switching (this de-sensitizes the transmit side). If R1 has
been changed a large amount, it may be necessary to readjust R2. If this cannot be achieved in a
reasonable manner, the acoustic coupling is too strong.
Then have the person at the speakerphone speak somewhat loudly, and again monitor the state of the
circuit, primarily by having the person at the other end listen carefully for fading. If there is obvious
fading of the sound, increase R2 so as to de-sensitize the receive side. Increase R2 just enough to stop
the fading. If this cannot be achieved in a reasonable manner, the sidetone coupling is too strong.
If necessary, readjust R1 and R2, relative to each other, a small amount to further optimize the switching
response.
Microprocessor Interface
The microprocessor interface (Pins 17-19) can be controlled by any microprocessor with an SPI port, or from a
general purpose port which can be configured to provide the correct signals. The UTC MC33218 requires one 8-bit
word to set the various parameters-there is no chip address, or other protocol or handshaking required. See Figure 2
for a timing diagram. The function of each of the bits is described in the functional description, as well as in a table
near the beginning of this document. The pin’s functions are as follows:
-DATA: Bit B7 is entered first, and B0 last, and each bit is entered on a clock rising edge. The minimum setup and
hold times indicated in the Electrical Characteristics must be adhered to. If more than 8 bits are entered, the last 8
bits to be entered will be stored in the registers.
-CLOCK: The clock enters the data on each rising edge. There is no minimum required frequency, and the
maximum frequency is 1.0MHz.It is recommended that the clock be stopped when data is not being entered to
minimize the possibility of creating audible noise in the speech paths. This input is disabled when Data Ready is
high.
-DATA READY: This input must be held low while data is being entered, and then taken high to latch in the new
data. The new data will not affect the UTC MC33218 until data ready is taken high. It is recommended that Data
ready be kept high at all times except when entering data, although this is not required for the IC to function
correctly.
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VM
MCI
Mike
Amp
MCO
Tx
Attenuator
TAO
V1
R1
I1
+
Acoustic
(GAC)
Coupling
Control
TLI
VB
GST Hybrid
Tip
Ring
+
RLI
I2
Speaker
Amp
RAO
Rx
Attenuator
V2
R2
RXO
RXI
Figure 35. Basic Block Diagram for Design Purpose
Upon powering up the UTC MC33218 or when the IC is disabled by means of the CD pin (Pin 8), the eight
registers are internally set to a logic 0, regardless of their previous contents. This default condition corresponds to
normal voice switched operation, 53dB attenuator range, active microphone amplifier, and maximum receive volume
level.
The amplitude of the three inputs must be less than 0.8V for a logic 0, and between 2.0V and Vcc for a logic 1.The
three inputs must be kept within the range of Vcc and GND. If any input is taken more than 0.5V above Vcc or below
GND excessive currents will flow, and the device’s operation will be distorted.
Power On Reset
The power on reset function sets the 8 internal registers to logic 0’s whenever the UTC MC33218 is powered up,
or whenever the chip disable pin (pin 8) is taken high. A capacitor on pin 20 (POR) creates a time delay, allowing
Vcc to stabilize before the registers can accept data. The effective resistance at this pin, for timing purposes, is ≈
115kΩ. A 0.1μF capacitor, for example, provides a time delay of ≈3.7ms (at Vcc = 5.0V).
Alternately, Pin 20 can be driven directly from a logic source if desired, -the switching threshold is ≈1.2V. When
taken low, the registers are reset to 0, independent of the clock or data ready position. The POR input must be kept
within the range of Vcc and GND, If the input is taken more than 0.5V above Vcc or below GND excessive currents
will flow, and the device’s operation will be distorted. See Figure 33 for the circuit configuration.
Transmit/Receive Detection Priority
Although the UTC MC33218 was designed to have an idle mode such that the transmit side has a small priority
(the idle mode position is closer to the full transmit side than the receive side), the idle mode position can be moved
with respect to the transmit or the receive side. With this done, the ability to gain control of the circuit by each talker
will be changed.
By connecting a resistor from CT (Pin 7) to ground, the circuit will be biased more towards the transmit side. The
resistor value is calculated from:
R= RT
VB
∆V
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Where R is the added resistor, RT is the resistor normally between Pin 6 and 7 (typically 15kΩ), and ΔV is the
desired change in the CT voltage at idle. VB is the voltage at Pin 6.
By connecting a resistor from CT (Pin 7) to Vcc, the circuit will be biased towards the receive side. The resistor
value is calculated from:
R= RT
VCC VB
1
∆V
R, RT, ΔV, and VB are the same as above. Switching response and the switching time will be somewhat affected
in each case due to the different voltage excursions required to get to transmit and receive from idle. For practical
considerations, the ΔV shift should not exceed 50mV.
Disabling the Idle Mode
In order to test the gain, and performance, of the transmit path and the receive path, they can each be set to their
full “on” positions using bits B7 and B6 of the serial port. However, if it is desired to tests these paths with the IC in
the normal voice switched mode (B7, 6=00), the transmit or receive attenuator can be set to the “on” positions, even
with steady signals applied, by disabling the background noise monitors. Grounding the CPT pin will disable the
transmit background noise monitor, causing the circuit to stay in the full transmit mode, even with a low level
continuous signal applied to the transmit path. Grounding CPR does the same for the receive path. Additionally, the
receive background noise monitor is automatically disabled by the dial tone detector whenever the receive signal
exceeds that detector’s threshold.
Dial Tone Detector Threshold
The threshold for the dial tone detector is internally set at ≈2.0mV (14mVrms) below VB (see Figure 31). That
threshold can be changed if desired by changing the DC bias level at RXO.
Since the attenuator input is DC coupled to the receive amplifier, the threshold is changed by forcing an offset
through the receive amplifier. As shown in Figure 36, connect a resistor (RTO) from the summing node to either
ground or Vcc, depending on whether the dial tone detector threshold is to be increased or decreased. RF and RI
are the resistors normally used to set the receive audio gain.
Vcc or Gnd
Signal Input
RTO
RF
RI
RXI
RXO
+
100k
VB
VB
+
20mV
+
Attenuator
To Attenuator
Control Circuit
VB
Figure 36. Adjusting Dial Tone Detector Threshold
Adding RTO, and connecting it to ground will shift RXO up, thereby increasing the dial tone detector threshold. In
this case, RTO is calculated from:
RTO =
VB × RF
∆V
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VB is the voltage at pin 6, and ΔV is the amount that the detector’s threshold is to be increased. For example, if
VB=2.2V, RF=10K, and ΔV=20mV, RTO calculates to 1.1MΩ.
Connecting RTO to Vcc will shift RXO down, thereby decreasing the dial tone detector threshold. In this case,
RTO is calculated from:
RTO =
V CC -VB × RF
∆V
For example , if Vcc = 5.0V, VB = 2.2V, RF = 10K, and ΔV = 10mV, RTO calculates to 2.8MΩ.
Board Layout, RFI Interference
Although the UTC MC33218 is meant to be used at audio frequencies, the various amplifiers within have
bandwidths exceeding 1.0MHz, and can therefore oscillate due to stray capacitance and other parasitics if care is
not taken in the board layout. A PC board, with a ground plane, is recommended for breadboarding as well as
production, Factors to keep in mind are:
-The heavy current draw in a speakerphone type product is in the speakerphone type product is in the speaker,
and consequently, in the speaker amplifier .The power supply and ground connection to the speaker amplifier must
be done with care so as to not create significant ripple, or ground noise, for the remaining circuitry.
-The power supply bypass for the UTC MC33218 should be 100μF if powered by a regulated power supply, and
1000μF if powered by the phone line. The bypass capacitor must be physically close to the IC-preferably within one
inch. This is particularly important in a circuit powered by the phone line. Oscillations, or instabilities, can result if this
guideline is not followed.
-As with any circuit which involves mixing analog and digital circuitry, care must be taken in the layout to prevent
digital noise from getting into the analog speech paths. As a general rule, all the analog circuitry (phone line interface,
speech network, speakerphone, and speaker amplifier) should be “in its own area”. Mixing of the analog and digital
circuits can result in the high speed logic transitions creating frequencies in the audible range.
-Generally it is not necessary to have a separate analog and digital ground. With many mixed mode devices (such
as the UTC MC33218), this is impractical since there is only one ground pin on the IC. The significant factors here
are that the ground plane be continuous, the various circuit sections be arranged logically, and that the Vcc
distribution be done so as to not distribute noise to the analog circuits.
-Potential radio frequency interference (RFI) problems should be addressed early in the electrical and mechanical
design of the speakerphone. RFI may enter the circuit through Tip and Ring, through the microphone wiring to the
microphone amplifier (this wiring should be short), or through any of the PC board traces. The most sensitive pins on
the UTC MC33218 are the inputs to the level detectors (RLI, TLI. XDI) since, when there is no speech present, the
inputs are high impedance and these op amps are in a near open loop condition. The board traces to these pins
should be kept short, and the resistor and capacitor for each of these pins should be physically close to the pins. All
other input pins should also be considered sensitive to RFI signals.
In The Final Analysis
Proper operation of a speakerphone is a combination of proper mechanical (acoustic) design as well as proper
electronic design. The acoustics of the enclosure must be considered early in the design of a speakerphone. In
general, electronics cannot compensate for poor acoustics, low speaker quality, low microphone quality, or any
combination of these items. Proper acoustic separation of the speaker and microphone is essential. The physical
location of the microphone, along with the characteristics of the selected microphone, will play a large role in the
quality of the transmitted sound. The microphone and speaker vendors can usually provide additional information on
the use of their products.
In the final analysis, the circuit will have to be fine tuned t match the acoustics of the enclosure, the specific hybrid,
and the specific speaker and microphone selected. The components shown in this data sheet should be considered
as starting points only. The gains of the transmit and receive paths are easily adjusted at the microphone and
receive amplifiers, respectively. The switching response can then be fine tuned by varying (in small steps) the
components at the level detector inputs (TLI, RLI) until satisfactory operation is obtained for both long and short
lines.
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For additional information on speakerphone design please refer to The Bell System Technical Journal, Volume
XXXIX.
DEFINITIONS
Attenuation - A decrease in magnitude of a communication signal, usually expressed in dB.
Bandwidth - The range of information carrying frequencies of a communication system.
Battery - The voltage which provides the loop current to the telephone from the CO. The name derives from the fact
that COs have always used batteries, in conjunction with AC power, to provide this voltage.
C-Message Filter - A frequency weighting which evaluates the effects of noise on a typical subscriber’s system.
Central Office - Abbreviated CO, it is a main telephone office, usually within of a few miles of its subscribers, that
houses switching gear for interconnection within its exchange area, and to the rest of the telephone system. A CO
can handle up to 10,000 subscriber numbers.
CO - See Central Office
CODEC - Coder/Decoder –In the Central Office, it converts the transmit signal to digital, and converts the digital
receive signal to analog.
dB - A power or voltage measurement unit, referred to another power or voltage. It is generally computed as:
10×log(P1/P2)
for power measurement, and
20×log(V1/V2)
for voltage measurements.
dBm - An indication of signal power.1.0mW across 600Ω, or 0.775Vrms, is defined as 0dBm. Any other voltage
level is converted to dBm by:
dBm = 20×log (Vrms/0.775), or
dBm = [20×log (Vrms)]/+2.22
dBmp - Indicates dBm measurement using a psophometric weighting filter.
dBrn - Indicates a dBm measurement relative to 1.0pW power level into 600 Ω .Generally used for noise
measurements, 0dBm=-90dBm.
dBrnC - Indicates a dBrn measurement using a C-message weighting filter.
DTMF - Dual Tone MultiFrequency. It is the “tone dialing” system based on outputting two non-harmonic related
frequencies simultaneously to identify the number dialed. Eight frequencies have been assigned to the four rows and
four columns of a keypad.
Four Wire Circuit - The portion of a telephone, or central office, which operates on two pairs of wires. One pair is for
the Transmit path, and one pair is for the Receive path.
Full Duplex - A transmission system which permits communication in both directions simultaneously. The standard
handset telephone system is full duplex.
Gain - The change in signal amplitude (increase or decrease) after passing through an amplifier, or other circuit
stage. Usually expressed in dB, an increase is a positive number, and a decrease is a negative number.
Half Duplex - A transmission system which permits communication in one direction at a time. CB radios, with
“push-to-talk” switches, and voice activated speakerphones, are half duplex.
Hookswitch - A switch, within the telephone, which connects the telephone circuit to the subscriber loop. The name
derives from old telephones where the switch was activated by lifting the receiver off and onto a hook on the side of
the phone.
Hybrid - A two-to-four wire converter.
Idle Channel Noise - Residual background noise when transmit and receive signals are absent.
Line Card - The pc board, and circuitry, in the CO or PBX which connects to the subscriber’s phone line. A line card
may hold circuitry for one subscriber, or a number of subscribers.
Longitudinal Balance - The ability of the telephone circuit to reject longitudinal signals on Tip and Ring
Longitudinal Signals - Common mode signals.
Loop - The loop formed by the two subscriber wires (Tip and Ring) connected to the telephone at one end, and the
central office (or PBX) at the other end. Generally it is a floating system, not referred to ground, or AC power.
Loop Current - The DC current which flows through the subscriber loop. It is typically provided by the central office
or PBX, and ranges from 20-120mA.
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Mute - Reducing the level of an audio signal, generally so that it is inaudible. Partial muting is used in some
applications.
Off Hook - The condition when the telephone is connected to the phone system, permitting the loop current to flow.
The central office detects the DC current as an indication that the phone is busy.
On Hook - The condition when the telephone is disconnected from the phone system, and no DC loop current flows.
The central office regards an on hook phone as available for ringing.
PABX - Private Automatic Branch Exchange. In effect, a miniature central office, it is a customer owned switching
system servicing the phones within a facility, such as an office building. A portion of the PABX connects to the Bell
(or other local) telephone system.
Power Supply Rejection Ration - The ability of a circuit to reject outputting noise, or ripple, which is present on the
power supply lines. PSRR is usually expressed in dB.
Protection, Primary - Usually consisting of carbon blocks or gas discharge tubes, it absorbs the bulk of a lightning
induced transient on the phone line by clamping the voltages to less than ±1500V.
Protection, Secondary - Usually located within the telephone, it protects the phone circuit from transient surges.
Typically, it must be capable of clamping a ±1.5kV surge of 1.0ms duration.
Pulse Dialing – A dialing system whereby the loop current is interrupted a number of times in quick succession. The
number of interruption rate is typically 10 per second. The old rotary phones, and many new pushbutton phones, use
pulse dialing.
Receive Path - Within the telephone it is the speech path from the phone line (Tip and Ring) towards the receiver or
speaker.
REN - Ringer Equivalence Number. An indication of the impedance, or loading factor, of a telephone bell or ringer
circuit. An REN of 1.0 equals ≈8.0kΩ. The bell system typically permits a maximum of 5.0 REN (1.6 kΩ)on an
individual subscriber line. A minimum REN of 0.2(40 kΩ) is required by the bell system.
Return Loss - Expressed in dB, it is a measure of how well the telephone’s AC impedance matches the line’s AC
characteristic impedance. With a perfect match, there is no reflected signal, and therefore infinite return loss. It is
calculated from:
RL=20 ×log
(ZLINE+ZCKT)
(ZLINE-ZCKT)
Ring - One of the two wires connecting the central office to a telephone. The name derives from the ring portion of
the plugs used by operators (in older equipment) to make the connection. Ring is traditionally negative with respect
to Tip.
SPI – Serial Port Interface. A three line microprocessor interface port which is used to clock in data serially. The
three lines are clock, data, and a control line which enables entry of the data, Some serial ports are bidirectional.
Sidetone Rejection - The rejection (in dB) of the reflected signal in the receive path resulting from a transmit signal
applied to the phone, and phone line.
SLIC - Subscriber Line Interface Circuit. It is the circuitry within the CO or PBX which connects to the user’s phone
line.
Subscriber - The customer at the telephone end of the line.
Subscriber Line - The system consisting of the user’s telephone, the interconnecting wires, and the central office
equipment dedicated to that subscriber (also referred to as a loop).
Tip - One of the two wires connecting the central office to a telephone. The name derives from the tip of the plugs
use d by operators (in older equipment) to make the connection. Tip is traditionally positive with respect to Ring.
Transmit Path - Within the telephone it is the speech path from the microphone towards the phone line (Tip and
Ring).
Two Wire Circuit - Refers to the two wires connecting the central office to the subscriber’s telephone. Commonly
referred to as Tip and Ring, the two wires carry both transmit and receive signals in a differential manner.
Two –to-Four Wire Converter - A circuit which has four wires (on the side) -two (signal and ground) for the
outgoing signal, and two for the incoming signal. The outgoing signal is sent out differentially on the two wire side,
and incoming differential signals received on the two wire side are directed to the receive path of the four wire side.
Additional circuit within cancels the reflected outgoing signal to keep it separate from the incoming signal.
UTC
UNISONIC TECHNOLOGIES CO., LTD.
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QW-R108-017,A
UTC MC33218 LINEAR INTEGRATED CIRCUIT
Voiceband -That portion of the audio frequency range used for transmission across the telephone system. Typically
it is 300 ~ 3400Hz.
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
UTC
UNISONIC TECHNOLOGIES CO., LTD.
34
QW-R108-017,A
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