System Manual EVS93xx__9300 Servo inverter Extension

System Manual EVS93xx__9300 Servo inverter Extension
Global Drive
Ä.FZ9ä
EDSVS9332S−EXT
.FZ9
System Manual
(Extension)
9300
0.37 ... 75 kW
EVS9321xS ... EVS9332xS
Servo inverter
Contents
1
2
3
Preface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1−1
1.1
How to use this System Manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1.1
Information provided by the System Manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1.2
Document history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1.3
Products to which the System Manual applies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1−3
1−3
1−4
1−5
1.2
Definition of notes used . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1−6
Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2−1
2.1
Configuration with Global Drive Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2−3
2.2
Basic configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.1
Changing the basic configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.2
Speed control C0005 = 1XXX (1000) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.3
Torque control with speed limitation 4000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.4
Master frequency coupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.5
Speed synchronism . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.6
Angular synchronism . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2−4
2−5
2−6
2−11
2−13
2−25
2−26
2.3
Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3.1
Parameter setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3.2
Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2−36
2−36
2−36
2.4
Change of the terminal assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4.1
Freely assignable digital inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4.2
Freely assignable digital outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4.3
Freely assignable analog inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4.4
Freely assignable monitor outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2−37
2−37
2−39
2−39
2−40
Function library . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3−1
3.1
Working with function blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.1
Signal types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.2
Elements of a function block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.3
Connecting function blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.4
Entries into the processing table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3−3
3−3
3−4
3−6
3−10
3.2
Function blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.1
Table of function blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.2
Table of free control codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.3
Addition block (ADD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.4
Automation interface (AIF−IN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.5
Automation interface (AIF−OUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.6
Analog inputs via terminal X6/1, X6/2 and X6/3, X6/4 (AIN) . . . . . . . . . . . . . . . . . . . . . . . .
3.2.7
AND operation (AND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.8
Inverter (ANEG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.9
Analog output via terminal 62/63 (AOUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.10
Arithmetic block (ARIT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3−12
3−12
3−14
3−16
3−17
3−20
3−22
3−24
3−28
3−29
3−31
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EDSVS9332S−EXT EN 2.0
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Contents
3.2.11
3.2.12
3.2.13
3.2.14
3.2.15
3.2.16
3.2.17
3.2.18
3.2.19
3.2.20
3.2.21
3.2.22
3.2.23
3.2.24
3.2.25
3.2.26
3.2.27
3.2.28
3.2.29
3.2.30
3.2.31
3.2.32
3.2.33
3.2.34
3.2.35
3.2.36
3.2.37
3.2.38
3.2.39
3.2.40
3.2.41
3.2.42
3.2.43
3.2.44
3.2.45
3.2.46
3.2.47
3.2.48
3.2.49
3.2.50
3.2.51
3.2.52
3.2.53
ii
Arithmetic block (ARITPH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Analog signal changeover switch (ASW) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Holding brake (BRK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
System bus (CAN−IN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
System bus (CAN−OUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Comparator (CMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Signal conversion (CONV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Angle conversion (CONVPHA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Angle conversion (CONVPHPH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Speed conversion (CONVPP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Characteristic function (CURVE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Dead band (DB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Control of the drive controller (DCTRL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Master frequency input (DFIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital frequency output (DFOUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital frequency ramp function generator (DFRFG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital frequency processing (DFSET) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Delay elements (DIGDEL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Freely assignable digital inputs (DIGIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Freely assignable digital outputs (DIGOUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
First order derivative−action element (DT1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Free piece counter (FCNT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Free digital outputs (FDO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Freely assignable input variables (FEVAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Fixed setpoints (FIXSET) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Flipflop element (FLIP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Gearbox compensation (GEARCOMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Limiting element (LIM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Internal motor control (MCTRL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Mains failure control (MFAIL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Motor phase failure detection (MLP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Monitor outputs of monitoring system (MONIT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Motor potentiometer (MPOT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic NOT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Speed setpoint conditioning (NSET) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
OR operation (OR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Oscilloscope function (OSZ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Process controller (PCTRL1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Angle addition block (PHADD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Angle comparator (PHCMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Actual angle integrator (PHDIFF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Signal adaptation for angle signals (PHDIV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Phase integrator (PHINT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
EDSVS9332S−EXT EN 2.0
3−32
3−33
3−35
3−40
3−41
3−42
3−47
3−50
3−51
3−52
3−53
3−56
3−57
3−62
3−65
3−69
3−75
3−81
3−84
3−85
3−86
3−87
3−88
3−90
3−95
3−97
3−100
3−101
3−102
3−111
3−122
3−123
3−125
3−128
3−130
3−135
3−138
3−142
3−145
3−146
3−148
3−149
3−150
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Contents
3.2.54
3.2.55
3.2.56
3.2.57
3.2.58
3.2.59
3.2.60
3.2.61
3.2.62
3.2.63
3.2.64
4
5
Delay element (PT1−1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CW/CCW/QSP linking (R/L/Q) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Homing function (REF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ramp function generator (RFG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sample and hold function (S&H) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
S−shaped ramp function generator (SRFG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output of digital status signals (STAT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Control of a drive network (STATE−BUS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage block (STORE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Multi−axis synchronisation (SYNC1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Edge evaluation (TRANS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3−156
3−157
3−158
3−164
3−166
3−167
3−169
3−170
3−171
3−175
3−183
Application examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−1
4.1
Important notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−3
4.2
Speed control (C0005 = 1000) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−4
4.3
Torque control with speed limitation (C0005 = 4000) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−7
4.4
Master frequency − Master − Drive (C0005 = 5000) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−9
4.5
Master frequency bus − slave − drive (C0005 = 6000) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−12
4.6
Master frequency cascade − slave − drive (C0005 = 7000) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−14
Appendix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5−1
5.1
Glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.1.1
Terminology and abbreviations used . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5−3
5−3
5.2
Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5−5
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EDSVS9332S−EXT EN 2.0
iii
Contents
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EDSVS9332S−EXT EN 2.0
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Preface and general information
1
Preface
Contents
1.1
How to use this System Manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1.1
Information provided by the System Manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1.2
Document history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1.3
Products to which the System Manual applies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1−3
1−3
1−4
1−5
1.2
Definition of notes used . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1−6
EDSVS9332S−EXT EN 2.0
1−1
l
Preface and general information
1−2
EDSVS9332S−EXT EN 2.0
l
Preface and general information
How to use this System Manual
1.1.1
Information provided by the System Manual
1.1
How to use this System Manual
1.1.1
Information provided by the System Manual
Target group
This System Manual addresses to all persons who dimension, install, commission, and set 9300
servo inverters.
Together with the System Manual, document no. EDSVS9332S, and the catalogue, it forms the basis
for project planning for the manufacturer of plants and machinery.
Contents
The System Manual (Extension) completes the System Manual, document no. EDSVS9332S:
l
The features and functions are described in detail.
l
It describes additional possible applications in detail.
l
Examples describe how to set the parameters for typical applications.
l
In case of doubt always the mounting instructions supplied with the 9300 servo inverter are
valid.
Contents of the System Manual
1 Preface
2 Safety
3 Technical data
4 Mounting the standard device
5 Wiring the standard device
6 Commissioning
7 Parameter setting
8 Configuration
8.1 Monitoring
8.2 Monitoring functions
8.3 Code table
8.4 Selection lists
8.5 Table of attributes
−
−
9 Troubleshooting and fault elimination
10 DC−bus operation
11 Safe standstill
12 Accessories
13 Appendix
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Contents of the System Manual (Extension)
1 Preface
−
−
−
−
−
−
2 Configuration
2.1 Configuration with Global Drive Control
2.2 Basic configurations
2.3 Modes of operation
2.4 Change of the terminal assignment
3
4
−
−
−
−
5
Function library
Application examples
Appendix
EDSVS9332S−EXT EN 2.0
1−3
Preface and general information
How to use this System Manual
1.1.2
Document history
How to find information
Use the System Manual as the basis. It contains references to the corresponding chapters in the
System Manual Supplement:
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Each chapter is a complete unit and comprehensively informs about a subject.
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The Table of Contents and Index help you to find all information about a certain topic.
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Descriptions and data of other Lenze products (Drive PLC, Lenze geared motors, Lenze
motors, ...) can be found in the corresponding catalogs, Operating Instructions and manuals.
The required documentation can be ordered at your Lenze sales partner or downloaded as
PDF file from the Internet.
)
Note!
Information and tools concerning the Lenze products can be found in the download
area under
http://www.Lenze.com 1
1.1.2
Document history
What is new / what has changed?
Material number
.FZ9
13296208
1−4
Version
2.0
1.0
03/2012
05/2010
TD23
TD23
Description
Error corrections
Extended by functions for software version 8.0
Error correction
Division of the System Manual into 2 parts (EDSVS9332S and
EDSVS9332S−EXT)
EDSVS9332S−EXT EN 2.0
l
Preface and general information
How to use this System Manual
1.1.3
1.1.3
Products to which the System Manual applies
Products to which the System Manual applies
This documentation is valid for 9300 servo inverters as of nameplate data:

EVS
93xx
−
x
S
Vxx
‚
ƒ
1x
8x
Nameplate
Product series
EVS =
Servo controller
Type no. / rated power
400V
480 V
9321 =
0.37 kW
0.37 kW
9322 =
0.75 kW
0.75 kW
9323 =
1.5 kW
1.5 kW
9324 =
3.0 kW
3.0 kW
9325 =
5.5 kW
5.5 kW
9326 =
11 kW
11 kW
9327 =
15 kW
18.5 kW
3928 =
22 kW
30 kW
9329 =
30 kW
37 kW
9330 =
45 kW
45 kW
9331 =
55 kW
55 kW
9332 =
75 kW
90 kW
Design
E=
C=
Panel−mounted unit
Built−in unit in "cold plate" technique
9300vec112
Model
S=
Servo inverter
Variant
−
V003 =
V004 =
Standard
In "cold plate" technique
With "safe standstill" function
V100 =
For IT systems
V104 =
With "safe standstill" function and for IT systems
Hardware version
Software version
l
EDSVS9332S−EXT EN 2.0
1−5
Preface and general information
Definition of the notes used
1.2
Definition of notes used
All safety information given in these instructions has the same layout:
}
Pictograph (indicates the type of danger)
Signal word! (indicates the severity of danger)
Note (describes the danger and explains how to avoid it)
Pictograph
Signal word
Signal word
Danger!
Meaning
Impending danger for persons
Consequences if disregarded
Death or severe injuries
Warning!
Possible, very dangerous situation for
persons
Death or severe injuries
Caution!
Possible, dangerous situation for
persons
Injuries
Stop!
Possible damage to material
Damage of the drive system or its
environment
Note!
Useful tip
If you observe it, handling of the drive
system will be easier.
Dangerous electrical voltage
General danger
1−6
EDSVS9332S−EXT EN 2.0
l
Configuration
2
Configuration
Contents
2.1
Configuration with Global Drive Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2−3
2.2
Basic configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.1
Changing the basic configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.2
Speed control C0005 = 1XXX (1000) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.3
Torque control with speed limitation 4000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.4
Master frequency coupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.5
Speed synchronism . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.6
Angular synchronism . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2−4
2−5
2−6
2−11
2−13
2−25
2−26
2.3
Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3.1
Parameter setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3.2
Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2−36
2−36
2−36
2.4
Change of the terminal assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4.1
Freely assignable digital inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4.2
Freely assignable digital outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4.3
Freely assignable analog inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4.4
Freely assignable monitor outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2−37
2−37
2−39
2−39
2−40
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EDSVS9332S−EXT EN 2.0
2−1
Configuration
2−2
EDSVS9332S−EXT EN 2.0
l
Configuration
Configuration with Global Drive Control
2.1
Configuration with Global Drive Control
With Global Drive Control (GDC), a program for the PC, Lenze offers an easy−to−understand,
clearly−laid−out and convenient tool for configuring your application−specific drive task.
Function block library
GDC provides a clear overview of the function blocks (FB) available in a library. GDC also lists the
complete assignment of a function block.
Signal configuration
Signals can be configured in a single dialog box. This is a convenient way
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to display every FB as a block diagram.
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to see the assignment of all signal inputs at a glance.
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to enter the FB in the processing table.
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to print your signal configuration.
Terminal assignment
Freely assignable terminals can be configured using two dialog boxes:
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Dialog box − to link digital inputs and outputs.
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Dialog box − to link analog inputs and outputs.
EDSVS9332S−EXT EN 2.0
2−3
Configuration
Basic configurations
2.2
Basic configurations
(
Stop!
It is possible to load predefined basic configurations via code C0005. If you load a
configuration via C0005, the assignment of all inputs and outputs will be overwritten
with the corresponding basic configuration.
Adapt the function assignment to the wiring.
The internal signal processing is adapted to the drive task by selecting a predefined basic
configuration. You can, for instance, use the Lenze setting for speed control.
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A detailed description of the basic configurations with terminal assignments, signal flow
diagrams, and application examples can be found in chapter "Application examples".
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Before loading a basic configuration via C0005, the controller must be inhibited.
Several predefined signal configurations can be loaded by using code C0005. The selection numbers
have the following meaning:
C0005 =
X
X
X
X
Control
0 − Terminal control
1 − Control via LECOM A/B/LI
3 − Control via AIF (INTERBUS,PROFIBUS)
5 − Control via system bus (CAN)
Voltage source for the control terminals
0 − External supply of control terminals
1 − Internal supply of control terminals
Additional function
0 − No additional function
1 − Brake control via digital output X5/A2
9 − At quick stop (QSP) deceleration of the complete drive system to zero speed in an angle−controlled
mode
Basic function
1 − Speed control
4 − Torque control with speed limitation
5 − Master for digital frequency coupling
6 − Slave on digital frequency bus
7 − Slave on digital frequency cascade
2−4
EDSVS9332S−EXT EN 2.0
l
Configuration
Basic configurations
2.2.1
2.2.1
Changing the basic configuration
Changing the basic configuration
If the basic configuration must be changed for a special application, proceed as follows:
1. Select a basic configuration via C0005 which largely meets the requirements.
2. Add functions by:
– Reconfiguring inputs and/or outputs.
– Setting parameters for function blocks. ( 3−4)
– Inserting or removing function blocks. ( 3−10)
)
Note!
If you change the signal flow of the basic configuration, e. g. by adding function
blocks, C0005 is set to 0. The display indicates "COMMON".
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EDSVS9332S−EXT EN 2.0
2−5
Configuration
Basic configurations
2.2.2
2.2.2
Speed control C0005 = 1XXX (1000)
Speed control C0005 = 1XXX (1000)
For standard applications, with the default settings you can commission the drive immediately. In
order to adapt it to specific requirements, observe the notes in the following sections.
2.2.2.1
Setpoint selection
Main setpoint
Via the setpoint nset (display in C0046) the speed is defined, relating to the value nmax (C0011) which
can be set. The setpoint is specified in a bipolar analog manner via input X6/1,2. By the settings
carried out, the drive runs with the speed set in C0011 if a master voltage of 10 V is selected. If you
want to actuate the drive at master voltages with low voltages you can adapt the system via codes
C0026/1 (offset) and C0027/1 (gain).
Alternatively you can also specify the setpoints via
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Keyboard,
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Integrated system bus (CAN),
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Automation interface (LECOM, InterBus, Profibus DP, RS 232,
RS 485, optical fibre).
Which input is active as setpoint source depends on the configuration selected in C0005, or the
setpoint source can be set via configuration code C0780 in the NSET function block.
Current master value
If the analog main setpoint is to be specified as current master value via X6/1,2, you can select the
current setting range with code C0034:
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For −20 mA … +20 mA: C0034 = 2
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For 4 … 20 mA: C0034 = 1 (can only be used in unipolar mode)
If the range 4…20 mA has been selected, the error message Sd5 appears when the value is lower
than 2 mA.
The signal conditioning for this is effected in function block AIN1.
The change−over from the voltage master value to the current master value (current load 242R) has
to be effected via the jumper position at X3:
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Voltage master value/potentiometer:
– Jumper X3 in the lower position (default setting)
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Current master value:
– Jumper X3 in the upper position
JOG setpoints
If you require specific fixed settings as main setpoint, you can call parameterisable setpoints from
the memory via the JOG inputs. JOG setpoints replace the main setpoint. The JOG setpoints are
entered in a relative manner in % of nmax. If you set input E3 to HIGH signal, the main setpoint is
switched off and at the same time the first JOG setpoint is activated. A total of 15 JOG setpoints can
be selected.
2−6
EDSVS9332S−EXT EN 2.0
l
Configuration
Basic configurations
2.2.2
Speed control C0005 = 1XXX (1000)
Inverting the main setpoint
Via terminals E1 and E2 the main setpoint can be inverted (i.e. the sign of the input value is changed).
The following applies:
E1
E2
Main setpoint
0
0
Drive executes QSP (quick stop)
1
0
Main setpoint not inverted
0
1
Main setpoint inverted
1
1
Drive maintains its previous state
Acceleration and deceleration times for the main setpoint path
The main setpoint is controlled via a ramp function generator. Like this, input steps can be converted
to a ramp.
The acceleration time and deceleration time refer to a change in speed from 0 to nmax (0% to 100%).
The calculation of the times Tir (C0012) and Tif (C0013) to be set is described in the NSET function
block description.
Additional acceleration and deceleration times
For the ramp function generator of the main setpoint (NSET−N/JOG setpoint) you can call additional
acceleration and deceleration times from the memory via the NSET−TI*x inputs, e.g. to change over
the acceleration speed of the drive from a specific speed. For this, these inputs have to be assigned
to a signal source. A maximum of 15 additional acceleration and deceleration times can be
programmed.
S−shaped ramp function generator characteristic
For the ramp function generator of the main setpoint you can select two different characteristics via
C0134:
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Linear characteristic for all acceleration processes requiring a constant acceleration
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S−shaped characteristic for all acceleration processes requiring a jerk−free acceleration
Code
Parameter
Meaning
C0134
0
1
Linear characteristic
S−shaped characteristic
C0182
0.01 … 50.0 s
Ti −time for the S−shaped ramp function generator
C0012
0.00 … 999.9 s
Tir −time for the acceleration
C0013
0.00 … 999.9 s
Tif −time for the deceleration
Additional setpoint
Via input X6/3,4 (or also another signal source) an analog additional setpoint (bipolar) can be
connected. The additional setpoint (display in C0049) internally first goes to the NSET function block
via an analog switch. Here the additional setpoint first is lead across a facility for inversion. This facility
for inversion is deactivated. Furthermore there is a ramp function generator (acceleration and
deceleration times via C0220/C0221) before the additional setpoint is linked with the main setpoint
in the arithmetic block. The additional setpoint for instance can be used as a correcting signal for
grinding machines (for controlling a constant circumferential speed when the grinding wheel
diameter is decreased).
If you want to use the additional setpoint, set code C0190 to the desired arithmetic link. According
to the default setting, code C0190 is parameterised to 0. Thus the additional setpoint is switched off.
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EDSVS9332S−EXT EN 2.0
2−7
Configuration
Basic configurations
2.2.2
Speed control C0005 = 1XXX (1000)
Selection of direction of rotation
The selection of direction of rotation results from the sign of the speed setpoint at the input
MCTRL−N−SET of the MCTRL function block.
In turn, the sign of this speed setpoint results from
2−8
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the sign of the main and additional setpoint,
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the level position at terminals E1 and E2,
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the selected link of the main and additional setpoint via the arithmetic block in the NSET
function block
EDSVS9332S−EXT EN 2.0
l
Configuration
Basic configurations
2.2.2
Speed control C0005 = 1XXX (1000)
Limitation of the speed setpoint
The speed setpoint is always limited to 100% nmax (C0011) in the MCTRL function block. This m
eans
that the maximum speed is always specified to the greatest speed possible in C0011.
Example:
With this configuration a speed of 4500 rpm is to be travelled. The speed is to be corrected in the
range from 0 to +10% using the additional setpoint. At inputs X6/1,2 and X6/3,4 a master voltage of
0 to +10 V is provided.
The following parameter setting results from this:
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C0011 = 5000 rpm, C0190 = 1 (addition)
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C0027/1 = 90%
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C0027/2 = 10%
Code C0909 presents another possibility of influencing the speed limit. Here the direction of rotation
can be specified:
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C0909 = 0 ³ clockwise and counter−clockwise rotating direction permitted
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C0909 = 1 ³ only clockwise rotating direction permitted
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C0909 = 2 ³ only counter−clockwise rotating direction permitted
For systems that only permit one rotating direction this serves to prevent the drive from rotating
backwards which would be caused by the setpoint.
Additional torque setpoint
For some applications it may be required to apply an additional torque setpoint.
Example: An acceleration connection for winding and positioning applications:
For this purpose, the input MCTRL−M−ADD is provided. This input is not active by default (is on
FIXED0%). To use this input, an analog signal source has to be assigned to it.
Torque limitation
The torque can be limited in the range from 0 to +100% via code C0472/3.
Every other signal source can be assigned as well.
Actual speed value feedback
In this configuration all specified actual value encoders can be used. The corresponding actual value
encoder can be selected via code C0025. An adjustment is not required.
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EDSVS9332S−EXT EN 2.0
2−9
Configuration
Basic configurations
2.2.2
Speed control C0005 = 1XXX (1000)
Quick stop (QSP)
When the quick stop function is activated, the drive runs to speed 0 via the ramp set in C0105 and
executes a holding torque with a drift−free standstill. The torque limitation and the additional torque
setpoint have no effect. This means that the drive outputs the maximum possible torque (observe
settings of motor data). When the QSP request is cancelled, the drive synchronises to the current
speed.
Controller inhibit (CINH)
By setting controller inhibit the drive becomes torqueless, the machine coasts. When the controller
inhibit request is cancelled, the drive synchronises to the current speed.
Shutting down the controller via TRIP (TRIP−SET)
With LOW signal at terminal X5/E4, the controller can be shut down via the monitoring function. This
input mainly serves to evaluate external binary encoders.
The response to this input signal can be programmed.
Resetting a fault (TRIP−RESET)
With a LOW−HIGH edge at terminal X5/E5 a pending TRIP can be reset if the cause of the fault has
been eliminated.
2−10
EDSVS9332S−EXT EN 2.0
l
Configuration
Basic configurations
2.2.3
2.2.3
Torque control with speed limitation 4000
Torque control with speed limitation 4000
The drive is set to torque control with the configuration C0005 = 4XXX "Torque control with speed
limitation". The torque can be provided in both directions.
The speed in the different operating cases is monitored using the n−controllers via a speed limitation.
2.2.3.1
Function
If the actual speed is within its limitation, the drive is torque−controlled. If one of the speed limits (CCW
or CW rotation) is reached, the drive becomes speed−controlled.
2.2.3.2
Setpoint input
Torque setpoint
The torque setpoint is entered via the analog terminal X6/3,4. When all motor data are entered
correctly, the drive provides 100 % of the possible torque (C0057) in the positive direction (CW) with
an input voltage of +10 V (corresponding to 100 % in negative direction (CCW) with −10 V).
If you want to operate the controller with a lower master voltage, you can adapt the system via the
codes C0026/2 (offset) and C0027/2 (gain).
Alternatively, you can also enter the setpoints via
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keypad,
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integrated system bus (CAN),
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automation interface (LECOM, InterBus, Profibus DP, RS 232, RS 485, fiber optics).
It depends on the selected configuration C0005, which of these inputs is active as a setpoint source.
The signal source can also be set under the configuration C0891 (MCTRL−M−ADD) in the MCTRL
function block.
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EDSVS9332S−EXT EN 2.0
2−11
Configuration
Basic configurations
2.2.3
Torque control with speed limitation 4000
Speed setpoint (speed limits)
The speed limitation is carried out via the n−controllers in the MCTRL function block. The first speed
controller (main speed controller) is the upper speed limit and the second speed controller is the lower
speed limit.
Example:
The speed can be within a range of "5000 rpm.
+5000rpm (CW rotation) is the upper limit and −5000 rpm (CCW rotation) is the lower limit. The
parameter setting is explained below.
The upper speed limit is provided via the analog terminal X6/1,2. This input can be used as a speed
setpoint e.g. in the threading in winding systems, wire−drawing machines, etc.
Please observe:
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The torque cannot exceed the input at terminal X6/3,4.
The input voltage must be set to 10 V, if necessary.
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The value cannot fall below the lower speed limit (code C0472/4).
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The setpoint speed is conditioned in the same way as for speed control (C0005=1000).
Reference values:
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When a master voltage of +10 V is entered, the setting under C0011 is the upper speed limit
(CW rotation).
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If −10 V are provided, C0011 is the upper speed limit in CCW rotation.
The lower speed limit is entered under code C0472/4.
Reference values:
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If −100% are entered, the setting under C0011 is the lower speed limit in CCW rotation.
Quick stop (QSP) and controller inhibit (CINH)
See quick stop (QSP) and controller inhibit (CINH).
TRIP−SET and TRIP−RESET
See TRIP−SET and TRIP−RESET.
2−12
EDSVS9332S−EXT EN 2.0
l
Configuration
Basic configurations
2.2.4
Master frequency coupling
2.2.4
Master frequency coupling
2.2.4.1
General system description
The master frequency coupling described here provides a digital setpoint transmission and
evaluation path between a setpoint source and one or several controllers. Here, the transmission
path can either be used as bus or cascade (see later explanation) for:
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phase−synchronous running
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speed−synchronous running
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speed−ratio synchronism
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Positioning control with driftfree standstill
In each controller the setpoint can be evaluated with a factor and, electrically buffered, be output at
the corresponding master frequency output.
The master frequency coupling is a purely digital setpoint transmission with all the advantages
involved:
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driftfree
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high−precision
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increased interference immunity
A drive system consists of a master and several slaves. For implementing a master frequency
coupling, three configurations are offered:
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master, C0005 = 5XXX (master integrator)
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slave for master frequency bus, C0005 = 6XXX (parallel connection)
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slave for master frequency cascade, C0005 = 7XXX (series connection)
Setpoint conditioning
In the setpoint arm the speed and phase setpoints are processed as absolute values.
Gearbox factors (C0032 and C0033)
The weighting factors C0032 and C0033 are in the setpoint channel of the corresponding drive
(slave). Here, a gearbox factor can be set.
Setting range of factors:
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C0032 from −32767 ... +32767
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C0033 from +1 ... +32767
The quotient is limited to a maximum of ±32767.
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EDSVS9332S−EXT EN 2.0
2−13
Configuration
Basic configurations
2.2.4
2.2.4.2
Master frequency coupling
Master configuration
Purpose
The master configuration serves to
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activate the phase control, which is upstream to the speed controller and
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configure the drive as master drive for the master frequency coupling for generating the
master frequency for the slave drives.
The phase control improves the control properties of the drive so that a driftfree standstill is achieved
for e. g. positioning tasks, hoists etc.
Features
The features describe the basic properties of this configuration. Some of them, however, can only
be used after reprogramming.
2−14
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Master with the option of signal conditioning as in the configurations C0005 = 1XXX, 4XXX
except the setpoint inversion via terminal X5/E1, X5/E2
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Master frequency output signal is setpoint for slave 0 (master drive) and other slaves
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Setpoint evaluation for slave 0 with a factor (numerator/denominator) and gearbox adaptation
(numerator/denominator). Can be set via
– automation interface or system bus
– motor potentiometer
– other signal source
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External torque limitation possible by means of reconfiguration
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Emergency stop function for the entire drive system possible by means of reconfiguration
(C0005 = 5900)
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Controller enable function causes a reloading of the setpoint integrator with the actual value of
slave 0 (setpoint = actual value)
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Possible interventions for phase trimming and speed correction via
– automation interface or system bus
– analog terminal
– one of the signal sources (function blocks)
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Message "following error limit reached" can be set via code
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TRIP when reaching the phase controller limit
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Speed limit of slave 0 = C0011
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Phase controller influence can be set and switched off via the digital input
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Homing function is possible via zero track or touch probe
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Synchronising to a setpoint is possible via zero track or touch probe
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Synchronising characteristic can be set via ramp−function generator
EDSVS9332S−EXT EN 2.0
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Configuration
Basic configurations
2.2.4
Master frequency coupling
Master integrator (setpoint generation)
The setpoint path is designed according to the configurations 1XXX and 4XXX, but without inverting
the main setpoint via the terminals X5/E1,E2. This means:
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Main setpoint is generated by analogy via terminal X6/1, X6/2
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Additional setpoint is generated by analogy via terminal X6/3, X6/4 (when used, the additional
setpoint must be enabled via C0190)
In this configuration, the setpoint selection refers to the frequency at the master frequency output
X10.
Tip!
The resulting speed setpoint is output at the master frequency output X10. It is the setpoint in terms
of amount and direction of rotation for the following slaves. At the same time it is considered to be
the setpoint for slave 0 (included in the master drive), i.e. for the entire drive system.
The master drive consists of the master integrator and the slave 0. Slave 0 is the first drive at the
master frequency.
Master frequency output X10
The master frequency output simulates an incremental encoder with two 5 V complementary signals
shifted by 90°. The encoder constant (inc/rev.) can be set and scaled in code C0030. Here, the
encoder type 2048 inc/rev. is set as standard.
The output frequency is determined by the speed set in C0011 (nmax) and the encoder constant.
Example:
C0011 = 5000 rpm, C0030 = 4 ³ 4096 inc/rev. setpoint = 100 %
The output frequency is 341.3 kHz (5000/60s × 4096).
With higher speeds, e. g. 8000 rpm in this setting, the output frequency is 564.1 kHz. In this case,
the maximum possible output frequency of 500 kHz would be exceeded. Hence, an encoder
constant with a smaller number of increments must be selected.
Tip!
In principle, the highest possible frequencies should be selected since the 400 kHz range provides
the best resolution.
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EDSVS9332S−EXT EN 2.0
2−15
Configuration
Basic configurations
2.2.4
Master frequency coupling
Setpoint conditioning
All settings that follow only refer to this drive, not to the entire drive system.
The setpoint is controlled via the function block DFSET. With this, essential adaptations to the drive
tasks can be done.
The setpoint is evaluated with a factor (numerator/denominator). With this, the ratio can be set with
which the drive is to run to its setpoint. For changing the direction of rotation of the drive, negative
values can be set here.
The denominator is preset via code C0533. The numerator in this setting is selected via the free
control code C0473/1, but can also be selected by every analog source by reprogramming
(reconfiguring).
Another possible adaptation can be done via the gearbox factor (numerator/denominator). With this,
the gearbox ratio of the drive can be set. The denominator is selected via C0033. The numerator is
selected in this configuration via the free control code C0032, but can be selected by every analog
source by reprogramming (reconfiguring).
Speed trimming (additional speed setpoint)
An additional setpoint can be added to the speed setpoint via the control code C0472/5. This serves
to accelerate or decelerate the drive. The input is done in % of nmax. Here, however, every analog
source can be used as signal source.
Purpose:
e. g. input for correction values
Phase trimming
Via the control code C0473/3 an additional setpoint can be added to the phase setpoint. This serves
to move the rotor position forwards or backwards compared to the setpoint (leading or lagging). The
input is done in increments. One revolution is split up into 65535 increments. The phase trimming can
take place in the range "32767 (i.e. "1/2 revolution). Via C0529 a multiplicator can be set, which
serves to expand the setting range.
Example: Phase trimming = DFSET_A_TRIM * C0529
Here, every analog source can also be used as signal source.
100 % correspond to 1/4 revolution = 16383 inc.
Purpose:
e. g. input for correction values
2−16
EDSVS9332S−EXT EN 2.0
l
Configuration
Basic configurations
2.2.4
Master frequency coupling
Phase offset
Via C0252 a fixed phase offset can be added to the setpoint of the drive. This can be set in the range
±245760000 inc.
Reference:
see phase trimming
Phase adjustment
In some applications it is necessary that the phase leads or lags with increasing speed. For this, an
adjustment of ±1/2 revolution can be entered under C0253. The phase adjustment set is reached at
15000 rpm (linear connection).
QSP at the master
If QSP is set at the master drive, the setpoint (C0050) for all drives is decelerated along the QSP ramp.
The complete drive system can thus be stopped, led by the QSP integrator. If QSP is cancelled before
the drives come to a standstill, the drive system starts to decelerate or accelerate with the value in
C0050 to the speed setpoint at the setpoint integrator.
Unlike the configuration 5900, the phase synchronism between master and slave gets lost in the
configuration 5000.
QSP at the slave 0 (master drive)
If the deceleration ramp is very short and can only be reached with Imax , the phase synchronism gets
lost. A driftfree standstill is obtained. Switching QSP is a continuous operation for the downstream
slaves so that a reversal is possible if the deceleration ramp set at the master is too short for one of
the slave drives (e. g. to high centrifugal mass for the set deceleration ramp).
CINH at the master
If the master drive is inhibited, the actual value of slave 0 is used as setpoint for the other slaves. This
could bring the entire drive system to a standstill led by the coasting slave 0. If the master is
re−enabled before reaching the standstill, the drive system starts to accelerate with the actual speed.
When setting CINH, the phase difference is set to zero.
l
EDSVS9332S−EXT EN 2.0
2−17
Configuration
Basic configurations
2.2.4
2.2.4.3
Master frequency coupling
Slave for master frequency bus
Purpose
The configuration C0005 = 6XXX for the setpoint bus serves to
l
activate the phase control, which is upstream to the speed controller
l
change the setpoint signal path to master frequency coupling for phase or speed−synchronous
operation
Master drive with
Master integrator and
Slave 0
Slave 1
R
Slave2
R
Resolver
X7
Encoder
X8
R
Resolver
X7
Resolver
Encoder
X8
X7
Factor
SWI
Encoder
X8
Factor
ö,n − controller
ö,n − controller
ö,n − controller
X6
X9
X10
X9
Encoder
output
Fig. 2−1
2−18
X10
Encoder
output
X9
X10
Encoder
output
Slave for master frequency bus
EDSVS9332S−EXT EN 2.0
l
Configuration
Basic configurations
2.2.4
Master frequency coupling
Features
The features describe the basic properties of this configuration. Some of them, however, can only
be used by reprogramming.
l
l
Hardware connection of the master frequency input with the master frequency output (so that
any number of drives can be connected in series)
l
Setpoint evaluation with a factor (numerator/denominator) for the corresponding slave
(gearbox adaptation). Can be set via an analog signal source:
– Terminal,
– code or
– function block.
l
external torque limitation is possible
l
QSP function for the individual drive. The setpoint is continued to be output.
l
CINH function for the individual drive. The setpoint is continued to be output to the master
frequency output.
l
Possible interventions for phase trimming and speed correction via
– LECOM
– analog terminal
– one of the signal sources (function blocks)
l
Message "following error limit reached" can be set via code
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TRIP when reaching the phase controller limit
l
Speed limit of slave 0 = C0011
l
Phase controller influence can be set and switched off via the digital input
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Homing function is possible via zero track or touch probe
l
Synchronising to a setpoint is possible via zero track or touch probe
l
Synchronising characteristic can be set via ramp−function generator
EDSVS9332S−EXT EN 2.0
2−19
Configuration
Basic configurations
2.2.4
Master frequency coupling
Cascading factor (C0473/1 and C0533)
This function is valid only if the configuration is not changed.
The following constants for the master frequency input (X9) can be set under C0425:
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16384 inc/rev.
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8192 inc/rev.
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4096 inc/rev.
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2048 inc/rev.
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1024 inc/rev.
l
512 inc/rev.
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256 inc/rev.
Cascading factors which cannot be raised to the power of two can be assigned via C0473/1 and
C0533. The following connection applies:
C0473ń1
C0425
+
Encoderconstant
C0533
The quotient is limited to a maximum of ±32767.
Setting range of factors:
l
C0473/1: −32767 ... +32767
l
C0533: +1 ... +32767
Setpoint conditioning of the slave
The value read by the input Dig.−Set (X9) is the setpoint (speed and phase) for the internal control.
Differences compared to the speed control:
l
No setpoint integrator in the setpoint channel
l
Change to the JOG value is not possible
l
The additional setpoint is not active
l
The CW/CCW changeover must be performed via the sign of the gearbox factor
QSP at the slave
If you set QSP at the slave drive, the setpoint (C0050) is decelerated along the QSP ramp. Home
positions get lost. A driftfree standstill is obtained since the set phase is led by the QSP integrator
when switching QSP.
CINH at the slave
If a slave drive is inhibited, the motor is coasting at the friction torque. The master frequency output,
however, continues to output the setpoint for the following slave. If the slave is enabled again, the
drive accelerates to its setpoint. (possibly at the current limit). When CINH is set, the phase
integrators are set to zero. Home positions get lost.
Exception:
If pulse inhibit (IMP) is released due to short−term mains undervoltage (< 500 ms), the phase
integrators are not reset. After mains recovery, the drive is able to follow its setpoint again. A phase
difference which emerged before is balanced.
2−20
EDSVS9332S−EXT EN 2.0
l
Configuration
Basic configurations
2.2.4
2.2.4.4
Master frequency coupling
Slave for master frequency cascade
Purpose
The configuration C0005 = 7XXX for the setpoint cascade serves to
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activate the phase control, which is upstream to the speed controller
l
change the setpoint signal path to master frequency coupling for speed ratio synchronism
Master drive with
Master integrator and
Slave 0
R
Resolver
X7
Slave 1
Slave2
R
R
Encoder
X8
Resolver
X7
Resolver
X8
X7
Factor
X8
Factor
SWI
X6
X9
X10
X9
Encoder
output
Fig. 2−2
l
ö,n − controller
ö,n − controller
ö,n − controller
X10
Encoder
output
X9
X10
Encoder
output
Slave for master frequency cascade
EDSVS9332S−EXT EN 2.0
2−21
Configuration
Basic configurations
2.2.4
Master frequency coupling
Features
The features describe the basic properties of this configuration. Some of them, however, can only
be used by reprogramming.
2−22
l
Resolver feedback is possible only
l
Evaluation of the setpoint (cascading factor) is possible with a factor (numerator/denominator)
for the master frequency output (and thus for all following drives)
l
Other evaluation of the setpoint is possible with a factor (numerator/denominator) for the
corresponding slave (gearbox adaptation). Can be set via an analog signal source (standard:
code C0032, C0033)
l
External torque limitation is possible
l
The QSP or CINH function in the individual drive do not influence the setpoint for the cascade.
l
Possible interventions for phase trimming and speed correction via
– LECOM,
– analog terminal or
– one of the signal sources (function blocks).
l
Message "following error limit reached" can be set via code
l
TRIP when reaching the phase controller limit
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Speed limit of slave 0 = C0011
l
Phase controller influence can be set and switched off via the digital input
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Homing function is possible via zero track or touch probe
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Synchronising to a setpoint is possible via zero track or touch probe
l
Synchronising characteristic can be set via ramp−function generator
EDSVS9332S−EXT EN 2.0
l
Configuration
Basic configurations
2.2.4
Master frequency coupling
Cascading factor (C0473/1 and C0533)
This function is valid only if the configuration is not changed.
The following constants for the master frequency input (X9) can be set under C0425:
l
16384 inc/rev.
l
8192 inc/rev.
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4096 inc/rev.
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2048 inc/rev.
l
1024 inc/rev.
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512 inc/rev.
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256 inc/rev.
Cascading factors which cannot be raised to the power of two can be assigned via C0473/1 and
C0533. The following connection applies:
The quotient is limited to a maximum of ±32767.
Setting range of factors:
l
C0473/1: −32767 ... +32767
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C0533: +1 ... +32767
Setpoint conditioning of the slave
The value read from X9, evaluated with C0425, C0473/1 and C0533, is the setpoint (speed and phase)
for the internal control and also the output value at the master frequency output X10.
The setpoint for the corresponding drive can be evaluated via the gearbox factor C0032 and C0033.
The direction of rotation of the corresponding slave can be set via the evaluation factors.
Differences compared to the speed control:
l
As standard, there is no setpoint path in the setpoint integrator
l
Change to the JOG value is not possible
l
The additional setpoint is not active
Feedback system (X7)
Only the resolver can be selected as feedback system.
QSP at the slave
If you set QSP at the slave drive, the setpoint (C0050) is decelerated along the QSP ramp. Home
positions get lost. A driftfree standstill is obtained since the set phase is led by the QSP integrator
when switching QSP.
If the deceleration ramp is very short and can only be obtained with Imax , the phase synchronism gets
lost (e.g. too high centrifugal mass for the set deceleration ramp).
The setpoint for the following slave(s) is continued to be output at the master frequency output.
CINH at the slave
If a slave drive is inhibited, the motor is coasting at the friction torque. The master frequency output,
however, continues to output the setpoint for the following slave. If the slave is enabled again, the
drive accelerates to its setpoint (possibly at the current limit):
The phase difference is set to zero when switching CINH. Home positions get lost.
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EDSVS9332S−EXT EN 2.0
2−23
Configuration
Basic configurations
2.2.4
Master frequency coupling
Exception:
If controller inhibit is released due to short−term mains undervoltage (< 500 ms), the phase difference
is not reset. After mains recovery, the drive can follow again its set phase. A phase difference which
emerged before is balanced. The setpoint for the slave(s) is continued to be output at the master
frequency output.
2−24
EDSVS9332S−EXT EN 2.0
l
Configuration
Basic configurations
2.2.5
Speed synchronism
2.2.5
Speed synchronism
2.2.5.1
How to select the correct configuration
The following slave configurations can be selected for the speed synchronism with the master
configuration C0005 = 5XXX:
l
Slave for setpoint bus C0005 = 6XXX;
for only two drives or fixed speed relationships which must be set only once (commissioning)
l
Slave for setpoint cascade C0005 = 7XXX;
for more than two drives or simple change of the speed relationship with stretching factors in
the running process
A correction value for the speed synchronism can be changed and displayed via the input
DFSET−N−TRIM in the DFSET function block.
The input can be changed by reconfiguration via:
l
analog terminal
l
motor potentiometer
l
keypad
l
automation interface or system bus
The correction value is provided in % of C0011 (nmax).
Deactivate the phase controller for the speed synchronism. This means that the phase−synchronous
running becomes a speed−synchronous running, which results in adding phase errors between the
drives. The phase controller can be deactivated by setting code C0254 to zero.
2.2.5.2
Speed−synchronous running
Purpose
For material transports with very low stretching coefficients, such as paper, metal, etc., the tension
can be set via the gearbox factor C0032/C0033 by oversynchonism in the ‰ range. A specified
tension thus results from the stretching coefficient of the material. For a better operation and higher
accuracy in the digital frequency coupling, we recommend the digital frequency cascade C0005 =
7XXX.
2.2.5.3
Speed ratio synchronism
Purpose
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Stretching systems
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Wire−drawing plants
Example
Extruder system with stretching of plastic threads by a speed ratio synchronism. The stretching is
performed online during the process via a motor potentiometer function.
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EDSVS9332S−EXT EN 2.0
2−25
Configuration
Basic configurations
2.2.6
2.2.6
Angular synchronism
Angular synchronism
Purpose
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Drive concept for positive movements (e.g. packing of bottles on conveyor belts)
l
Electrical shaft (e.g. vertical shaft, printing machines with embossing or printing rolls
depending on the format).
Conditions
Configuration C0005 = 6XXX or 7XXX.
In the configurations C0005 = 5XXX the specifications only apply to the slave 0.
Angle−synchronous operation
When the angle controller is active, every controller can perform angle−synchronous, drift−free
angular synchronism with regard to its setpoint. Since in the master frequency cascade the setpoint
of the second slave is conditioned in the first slave and both systems are not synchronous, a fixed
angular offset develops between the motor shafts which, however, does not add up over time.
2.2.6.1
Angle controller
Angle controller adaptation
A value at MCTRL−P−ADAPT affects the gain set in C0254.
Special features
The difference between setpoint and actual angle is supplied to the angle controller. With reference
to the angle it is designed as P controller. Its influence can be set via C0254. C0254 = 0 means the
complete disconnection of the angle controller from the controlled system.
Setting range of C0254 = 0.0001 ... 3.9999, C0254=1.00 and 16384 INC system deviation
(1/4 revolution) correspond to a speed variation of nmax.
The output of the angle controller can be limited via C0472/6. The limitation can also be connected
with another analog signal source.
Angle controller limit
The angle controller limit is fixed to an angular difference of 65531 revolutions. If this angular
difference is exceeded, the angle controller cannot balance the setpoint angle anymore. When
reaching the angle controller limit, a TRIP P13 is generated. The error message can be evaluated
according to its priority.
Note!
When reaching the angle controller limit and monitoring is switched off, the sign at the angle
controller output may reverse.When setting CINH, the angular difference is set to zero.
2−26
EDSVS9332S−EXT EN 2.0
l
Configuration
Basic configurations
2.2.6
2.2.6.2
Angular synchronism
Angular trimming
The angular trimming can be changed via C0473/3. It is displayed via C0536/3. Angular trimming can
also be carried out via another analog signal source:
l
Analog output of a function block
l
Motor potentiometer
l
Analog terminal
l
Keyboard
l
Automation interface or system bus
The input of the angle trimming can be multiplied in C0529.
This serves to change the rotor position by up to 20000 revolutions:
l
Negative values = CCW offset
l
Positive values = CW offset
Resolution: 65536 inc/rev. = 1 rev. × C0529
2.2.6.3
Following error limit
The absolute value of the following error limit can be set in increments via C0255. The setting range
is: 0 ... 1.8 × 109 increments.
When reaching the following error limit, a signal is generated which is evaluated via "Monitoring". This
signal can be evaluated with the priority (TRIP, MESSAGE or WARNING) required by the user.
When setting CINH, the angular difference is set to zero. Thus, neither the signal "following error limit"
is generated any longer.
2.2.6.4
Processing of the zero pulse (flying synchronising)
If the zero pulses are not used for the master frequency processing, an angular synchronism with a
constant phase offset is achieved.
Initial situation
Master
Slave
Dö
F
F
Dö = phase offset
n = Speed
Fig. 2−3
Initial situation for zero pulse processing (Döā0ā0)
If this phase offset is to be corrected to 0, either
l
l
homing is required or
l
the zero pulses of the master frequency input and the feedback system are to be processed.
EDSVS9332S−EXT EN 2.0
2−27
Configuration
Basic configurations
2.2.6
Angular synchronism
Target situation
Master
Slave
Dö=0
F
F
Dö = phase offset
n = Speed
Fig. 2−4
Target situation for zero pulse processing (Döā+ā0)
Conditions for reaching the target situation:
l
The function must be activated via code C0534 (function block DFSET)
l
The input DFSET−0−PULSE must be triggered with a HIGH signal when the zero pulse is
evaluated once (function block DFSET)
l
The angle control must be activated (function block MCTRL)
l
The zero pulses must be connected to the Sub−D connectors X9 and X8 (X8 when using an
encoder)
Zero pulse at the setpoint
The set rotor position is specified via the setpoint zero pulse (i.e. when the drive system is running).
It is only synchronised if one setpoint zero pulse and actual zero pulse have occurred before, i.e. not
before the second zero pulse.
Control mode:
The phase offset is compensated via acceleration or deceleration. The direction (acceleration or
deceleration) depends on the detected phase offset. If the rotor is leading in the range from 0 to 180 °,
the drive is synchronised by deceleration. If the rotor is lagging in the range from 0 to 180 °, the drive
is synchronised by acceleration.
Different synchronisation modes
In C0534 you can select between different synchronisation modes.
2−28
C0534
Synchronisation mode
1
Continuous synchronisation as described under "Zero pulse at the setpoint" (see page 2−28)
2
Same as selection 1, but DFSET−0−PULSE must be triggered with a LOW−HIGH edge
10
One−time synchronisation; control mode as described under "Zero pulse at the setpoint" (see page 2−28)
11
One−time synchronisation; the drive is always synchronised by clockwise rotation
12
One−time synchronisation; the drive is always synchronised by counter−clockwise rotation
13
One−time evaluation of the setpoint pulse and the actual pulse; the synchronisation direction results from the sign between
setpoint pulse and actual pulse
EDSVS9332S−EXT EN 2.0
l
Configuration
Basic configurations
2.2.6
Angular synchronism
Use of TOUCH−PROBE
Besides the zero pulses of the inputs X9 and the corresponding feedback system, the zero pulse
evaluation can also be derived from the digital inputs X5/E4 (actual value) and X5/E5 (setpoint). The
function is switched from zero pulse evaluation of the encoder (or resolver) to the evaluation of the
inputs X5/E4 and X5/E5 by C0532 = 2.
IMPORTANT:
The inputs X5/E4 and X5/E5 are assigned with TRIP−Set or TRIP−Reset as standard. In this case, the
input terminals must be removed from the function block DCTRL (drive control).
Use of zero pulse for the setpoint and TOUCH−PROBE for the actual value
The zero pulses can also be evaluated via a zero pulse at setpoint input X9 and a TOUCH−PROBE
input X5/E4 (actual value). The function is switched on with C0532 = 3.
Master
Slave
Touch probe
1:5
1:5
R
M
X7
X7
9300 Master
Vwithdrawal 2
−
+
=
1
X10
X10
Stretch factor
E4
E5
28
Gearbox
A1
Ctrl. enable
l
9300 slave
X9
Gearbox
Fig. 2−5
R
M
A4 39
A2
nact=0
E4
E5
28
A1
Ctrl. enable
A4 39
A2
nact=0
Example for using TOUCH−PROBE
EDSVS9332S−EXT EN 2.0
2−29
Configuration
Basic configurations
2.2.6
2.2.6.5
Angular synchronism
Referencing
The homing function is available with the configurations 5XXX, 6XXX and 7XXX.. The drive shaft can
be positioned via the homing function. For this purpose, the drive is disconnected from the setpoint
path and follows the profile generator.
REF
C0933
C0932
C0930
C0931
C0934
C0935
C0936
Ref−mark
REF−OK
C0921
C0927/2
CTRL
REF−BUSY
Ref−on
C0920
C0927/1
REF−N−IN
REF−N−SET
C0923
C0929
REF−PHI−IN
REF−PSET
C0922
C0928
Fig. 2−6
Homing function block (REF)
Homing is started via a rising edge at the digital input "REF−ON" (default setting is assigned to
terminal X5/E3); this input must be applied until the end of the homing process.
After the negative edge has occurred at the input REF−MARK (default setting is assigned to terminal
X5/E2), it is positioned to the home position. This input is intended for a reference switch. The speed
travel profile is created via a profile generator which is integrated in the REF function block. Via this,
the acceleration and deceleration times as well as the speed during the homing process can also be
set.
The home position is defined as follows:
Next zero pulse after the negative edge of the reference switch plus the home position offset
(C09334).
For position feedback via resolver, the zero position (depending on the resolver attachment to the
motor) is used instead of the zero pulse. Accordingly, the touch probe angle is used for homing via
touch probe.
The output signal "REF−BUSY" indicates with HIGH signal, whether the homing function is active.
The output signal "REF−OK" indicates with HIGH signal that homing is completed successfully. This
signal can be scanned via the output terminal X5/A4.
The setpoint outputs for position and speed of the REF function block are connected with the
corresponding setpoint inputs of the function block MCTRL (see signal flow diagram for the
configurations 5XXX, 6XXX and 7XXX). If the homing function is active (input REF−ON = HIGH), the
drive is disconnected from the setpoint path. The drive then follows the profile generator.
During the homing process the input DFSET−SET of the master frequency processing is active. This
is done through the output REF−BUSY of the REF function block. After the homing process is
completed, REF−BUSY=LOW is switched back to master frequency without jerk.
A renewed homing process requires an edge at the input REF−ON.
2−30
EDSVS9332S−EXT EN 2.0
l
Configuration
Basic configurations
2.2.6
2.2.6.6
Angular synchronism
Homing modes
Mode 0
Homing with zero pulse/zero position.
Travel in clockwise rotation to the home position. The home position lies at the next zero pulse/zero
position after the negative edge of the reference switch REF−MARK plus the home position offset.
C0934
Zero pulse
Reference switch
REF−MARK
Travel path
Starting point
Fig. 2−7
Direction of travel Home position
Homing with zero pulse/zero position; approaching the home position in CW rotation
Mode 1
Homing with zero pulse/zero position.
Travel in counter−clockwise rotation to the home position. The home position lies at the next zero
pulse/zero position after the negative edge of the reference switch REF−MARK plus the home
position offset (C0934).
C0934
Zero pulse
Reference switch
REF−MARK
Travel path
Home position
Fig. 2−8
Direction of travel
Starting point
Homing with zero pulse/zero position; approaching the home position in CCW rotation
Modes 2 ... 5
Modes 2 ... 5 are reserved.
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EDSVS9332S−EXT EN 2.0
2−31
Configuration
Basic configurations
2.2.6
Angular synchronism
Mode 6
Homing with touch probe.
Travel in clockwise rotation to the home position. The home position lies at the touch probe signal
after the negative edge of the reference switch REF−MARK plus the home position offset (C0934).
C0934
Touch probe
Reference switch
REF−MARK
Travel path
Starting point
Fig. 2−9
Direction of travel
Home position
Homing with touch probe; approaching the home position in CW rotation
Mode 7
Homing with touch probe.
Travel in counter−clockwise rotation to the home position. The home position lies at the TP signal after
the negative edge of the reference switch plus the home position offset.
Mode 8
Homing with touch probe.
Travel in clockwise rotation to the home position. The home position lies at the next TP signal plus
the home position offset.
Mode 9
Homing with touch probe.
Travel in counter−clockwise rotation to the home position. The home position lies at the next touch
probe signal plus the home position offset.
Note concerning mode 6 to mode 9
In code C0933 you can select the edge of the zero pulse or touch probe signal (LOW → HIGH or
HIGH → LOW) determining the home position.
2−32
EDSVS9332S−EXT EN 2.0
l
Configuration
Basic configurations
2.2.6
2.2.6.7
Angular synchronism
Profile generator
The speed travel profile for homing is generated via a profile generator. During the homing process
the target can be changed.
The profile generator generates a speed travel profile with linear ramps.
The following parameters must be entered:
Code
Meaning
Input
C0930
Gearbox ratio − numerator
1 ... 65535
Numerator of the gearbox ratio between motor and position encoder (motor side)
C0931
Gearbox ratio − denominator
1 ... 65535
Denominator of the gearbox ratio between motor and position encoder (encoder
side)
C0934
Home position offset
−2,140,000,000 ... +2,140,000,000 inc
Distance between zero pulse or touch probe and the home position during the
homing process
C0935
Homing speed
0.0001 ... 100.0000 % nmax
Motor speed during the homing process
C0936
Homing Ti time
0.01 ... 990.00 s
Acceleration and deceleration time during the homing process.
Reference: 0 ... nmax or nmax ... 0
The travel profile for homing is determined by entering a percentage speed and an integration time
(Ti) for the ramps. The home position offset is directly entered in increments of the encoder system.
(In this way, complex conversions and the entry of e. g. the feed constant can be avoided)
The home position can be approached in three ways:
l
Case 1: High home position offset
l
Case 2: Home position offset = 0; the zero pulse has not yet occurred during the homing
process
l
Case 3: Home position offset = 0; the zero pulse has occurred once during the homing
process
High home position offset (case 1)
Home position offset
V
C0935
C0936
C0936
t
Reference
switch
Fig. 2−10
l
Zero pulse
Home position
Approaching the home position (case 1)
EDSVS9332S−EXT EN 2.0
2−33
Configuration
Basic configurations
2.2.6
Angular synchronism
Home position offset = 0 (case 2)
The zero pulse has not yet occurred during the homing process (e.g. in case of incremental encoders,
the position is only determined after one revolution):
Home position offset=0
V
C0935
t
Reference
switch
Fig. 2−11
Zero pulse=
home position
Home position
Approaching the home position (case 2)
If the parameter setting or the position of the reference switch have been selected unfavourably, the
drive is unable to directly approach the home position due to a too high moment of inertia. This means
that the drive travels beyond the home position and then back again.
Reversing during the homing process can be prevented by setting the home position offset so that
the path is long enough to decelerate into standstill. The reference switch and the subsequent zero
pulse must be brought forward accordingly.
2−34
EDSVS9332S−EXT EN 2.0
l
Configuration
Basic configurations
2.2.6
Angular synchronism
Home position offset = 0 (case 3)
The zero pulse has already occurred once during the homing process.
V
Home position offset=0
t
Zero pulse
Fig. 2−12
Reference
switch
Zero pulse = home position
Approaching the home position (case 3)
If the zero pulse has already occurred once during traversing or if an absolute value encoder (e.g.
ar esolver) is used as an actual value encoder, the drive traverses to its home position along the set
ramp as described in Fig. 2−12Approaching….
Acceleration and deceleration time
The deceleration and acceleration time refers to a change of the output value from 0 to 100%
(C0011). The time C0936 to be set can be calculated as follows:
C0011
w2
C0936=t i @ wC0011
2 * w1
w1
0
ti
C0936
Fig. 2−13
ti
t
C0936
Calculation of the acceleration and deceleration time
In this case the time desired for the change lies between w1 and w2.
The calculated time is to be entered into C0936.
l
EDSVS9332S−EXT EN 2.0
2−35
Configuration
Operating modes
2.3.1
2.3
Parameter setting
Operating modes
By selecting the operating mode you can also select the interface you want to use for parameter
setting or control of the controller.
C0005 contains predefined configurations which allow a very easy change of the operating mode.
2.3.1
Parameter setting
Parameters can be set with one of the following modules:
2.3.2
l
Communication module
– 2102 (LECOM A/B/LI)
– 2111, 2113 (INTERBUS)
– 2131, 2133 (PROFIBUS)
– 2175 (CANopen/DeviceNet)
l
PC system bus module (CAN)
– 2173
Control
The drive controller can be controlled via terminals (X5 and X6), via the fieldbus module at X1 or via
the system bus (X4). Mixed forms are also possible.
Example: C0005 = 1005
This configuration corresponds to a speed control with control via system bus (CAN).
If more inputs of the function blocks are to be controlled via an interface, proceed as follows:
l
Assign the function block inputs to be controlled to "control objects" depending on the
interface used (see System Manual):
– Free control codes
in case of control via LECOM A/B/LI (RS232, RS485 or optical fibre interface) or operating
module.
– AIF objects
in case of control using InterBus S or Profibus DP.
– CAN objects
in case of control using system bus.
l
Then the inputs can be controlled using these codes or input objects by accessing them via
the interface.
Example for a distribution of the control on terminals and RS232:
The main speed setpoint in the configuration C0005=1
000 is to be controlled via LECOM A/B/LI. All
other inputs remain on terminal control.
1. Select C0780 via LECOM:
– C0780 is the configuration code for the main setpoint NSET−N in the function block "Speed
setpoint conditioning" (NSET).
2. Assign a free control code via a selection number.
– e.g. 19515 (control code C0141)
The main speed setpoint is now controlled by C0141.
2−36
EDSVS9332S−EXT EN 2.0
l
Configuration
Change of the terminal assignment
2.4.1
2.4
Freely assignable digital inputs
Change of the terminal assignment
(see also chapter 3.1 "Working with function blocks")
If the configuration is changed via C0005, the assignment of all inputs and outputs is overwritten with
the corresponding basic assignment. If necessary, the function assignment must be adapted to the
wiring.
Tip!
Use the menu "Terminal I/O" for the keypad 9371BB or the menu "Terminal I/O" for Global Drive
Control or LEMOC2.
Stop!
If you reassign an input, the signal source that has been assigned up to know will not be overwritten!
Those active connections that are not required must be removed (see chapter 3.1.3).
2.4.1
Freely assignable digital inputs
Five freely assignable digital inputs are available (X5/E1 … X5/E5). You can define a polarity for each
input which serves to determine the input to be HIGH active or LOW active.
Change assignment:
Tip!
Use the submenu "DIGIN" for the keypad 9371BB or the submenu "Digital inputs" for Global Drive
Control or LEMOC2.
l
EDSVS9332S−EXT EN 2.0
2−37
Configuration
Change of the terminal assignment
2.4.1
Freely assignable digital inputs
Example:
Menu "Terminal I/O; DIGIN" (terminal I/O; digital inputs)
Here are the most important aims for digital inputs
Valid for the basic configuration C0005 = 1000.
Code
CFG
C0885
C0886
C0787
controlled by
C0881
Subcode
000
000
001
002
003
004
001
002
003
004
001
002
000
Signal name
R/L/Q−R
R/L/Q−L
NSET−JOG*1
NSET−JOG*2
NSET−JOG*4
NSET−JOG*8
NSET−TI*1
NSET−TI*2
NSET−TI*4
NSET−TI*8
DCTRL−PAR*1
DCTRL−PAR*2
DCTRL−PAR−LOAD
Signal
DIGIN1
DIGIN2
DIGIN3
FIXED0
FIXED0
FIXED0
FIXED0
FIXED0
FIXED0
FIXED0
FIXED0
FIXED0
FIXED0
C0871
C0876
C0920
C0921
000
−
000
000
DCTRL−TRIP−SET
DCTRL−TRIP−RES
REF−ON
REF−MARK
DIGIN4
DIGIN5
FIXED0
FIXED0
C0788
C0880
Note
(interface)
(Term. X5/E1)
(Term. X5/E2)
(Term. X5/E3)
−
−
−
−
−
−
−
−
−
−
Selection list 2
0051
0052
0053
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
(Term. X5/E4)
(Term. X5/E5)
−
−
0054
0055
1000
1000
HIGH = do not invert main setpoint (CW rotation)
HIGH = Invert main setpoint (CCW rotation)
HIGH = Main setpoint is substituted by the fixed speed from
C0039/x
The signals are binary coded.
Additional acceleration and deceleration times from C0101/x
and C0103/x
The signals are binary coded.
Parameter set selection:
The signals are binary coded.
Signal LOW−HIGH loads selected parameter set with
DCTRL−PAR*x
LOW = Controller sets TRIP (EEr)
Signal LOW−HIGH = Resets active trip
HIGH = Start homing
LOW−HIGH edge = Stop homing
1. Select the input of the function blocks which is to be assigned to a new source under the
configuration code CFG in the code level.
– Example:
C0787/2 (CFG/subcode) determines the source for the input "NSET−JOG*2" (signal name) in
the function block "Speed setpoint conditioning" (NSET).
2. Change to the parameter level with PRG. Select the source (signal) from the indicated list. Ask
yourself: Where does the signal for controlling this input is to come from?
– Example:
"NSET−JOG*2" is to be controlled by terminal X5/E5 (interface).
– For this, select DIGIN5 (signal) and confirm with SHIFT + PRG.
3. Change to the code level with 2 * .
4. Determine the polarity of the input terminals X5/E1 to X5/E5 (HIGH active or LOW active)
under code C0114 and subcode.
– In the code level the terminal is selected via subcode.
– Change to the parameter level using PRG and select the polarity.
– Change to the code level by 2 * PRG.
5. Repeat steps 1. to 4. until all inputs required are assigned.
6. Remove undesired connections (see chapter 3.1.3). The connection so far of the terminal
X5/E5 is not cancelled automatically. If the connection is to be cancelled:
– Select C0876 in the code level (previous target of terminal X5/E5)
– Change to the parameter level using PRG.
– Select FIXED0 (signal) and acknowledge with SHIFT+PRG.
2−38
EDSVS9332S−EXT EN 2.0
l
Configuration
Change of the terminal assignment
2.4.2
2.4.2
Freely assignable digital outputs
Freely assignable digital outputs
Four freely assignable digital outputs are available (X5/A1 … X5/A4). You can define a polarity for
each input which serves to determine the input to be HIGH active or LOW active.
The most important codes can be found in the submenu: DIGOUT (digital outputs).
Change assignment:
1. Select the output which is to be assigned to another function via the subcode under C0117.
2. Change to the parameter level with PRG. Select the signal from the indicated list, which is to
be output via the selected output terminal. Change to the code level with PRG.
3. Determine the polarity (HIGH active or LOW active) via the subcode of the output under
C0118.
4. Repeat step 1. to 3., until all outputs desired are assigned.
2.4.3
Freely assignable analog inputs
The most important codes can be found in the submenu: AIN1 X6.1/2 or AIN2 X6.3/4 (analog input 1
(X6.1/2) or analog input 2 (X6.3/4))
Change assignment:
1. Select the input of the function block to be assigned to a new source in the code level.
– Example
Determine the source for the input "Main setpoint" (NSET−N) in the function block "Speed
setpoint conditioning" (NSET) under C0780.
2. Change to the parameter level with PRG. Select the signal from the indicated list, which is to
be used for the selected input.
3. Repeat steps 1. and 2. until all inputs required are assigned.
4. Remove unwanted links (see Chapter 3.1.3).
l
EDSVS9332S−EXT EN 2.0
2−39
Configuration
Change of the terminal assignment
2.4.4
2.4.4
Freely assignable monitor outputs
Freely assignable monitor outputs
Use the monitor outputs X6/62 and X6/63 to output internal signals as voltage signals.
Under C0108 and C0109 the outputs can be adapted to e.g. a measuring device or a slave drive.
The most important codes can be found in the submenu: AOUT1 X6.62 or AIN2 X6.63 (analog output
1 (X6.62) or analog output 1 (X6.63))
Change assignment:
1. Select the output to be assigned to another signal (source) (e.g. C0431 for output X6/62) in the
code level.
2. Change to the parameter level with PRG. Select the signal from the indicated list which is to
be output via the monitor output.
3. If necessary, adjust an offset in the hardware under C0109
4. If necessary, the signal gain can be adapted to the hardware under C0108.
5. Repeat steps 1. to 4. to assign the second output.
2−40
EDSVS9332S−EXT EN 2.0
l
Function library
3
Function library
Contents
3.1
Working with function blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.1
Signal types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.2
Elements of a function block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.3
Connecting function blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.4
Entries into the processing table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3−3
3−3
3−4
3−6
3−10
3.2
Function blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.1
Table of function blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.2
Table of free control codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.3
Addition block (ADD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.4
Automation interface (AIF−IN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.5
Automation interface (AIF−OUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.6
Analog inputs via terminal X6/1, X6/2 and X6/3, X6/4 (AIN) . . . . . . . . . . . . . . . . . . . . . . . .
3.2.7
AND operation (AND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.8
Inverter (ANEG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.9
Analog output via terminal 62/63 (AOUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.10
Arithmetic block (ARIT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.11
Arithmetic block (ARITPH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.12
Analog signal changeover switch (ASW) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.13
Holding brake (BRK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.14
System bus (CAN−IN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.15
System bus (CAN−OUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.16
Comparator (CMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.17
Signal conversion (CONV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.18
Angle conversion (CONVPHA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.19
Angle conversion (CONVPHPH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.20
Speed conversion (CONVPP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.21
Characteristic function (CURVE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.22
Dead band (DB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.23
Control of the drive controller (DCTRL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.24
Master frequency input (DFIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.25
Digital frequency output (DFOUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.26
Digital frequency ramp function generator (DFRFG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.27
Digital frequency processing (DFSET) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.28
Delay elements (DIGDEL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.29
Freely assignable digital inputs (DIGIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.30
Freely assignable digital outputs (DIGOUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.31
First order derivative−action element (DT1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.32
Free piece counter (FCNT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.33
Free digital outputs (FDO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.34
Freely assignable input variables (FEVAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.35
Fixed setpoints (FIXSET) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3−12
3−12
3−14
3−16
3−17
3−20
3−22
3−24
3−28
3−29
3−31
3−32
3−33
3−35
3−40
3−41
3−42
3−47
3−50
3−51
3−52
3−53
3−56
3−57
3−62
3−65
3−69
3−75
3−81
3−84
3−85
3−86
3−87
3−88
3−90
3−95
l
EDSVS9332S−EXT EN 2.0
3−1
Function library
3.2.36
3.2.37
3.2.38
3.2.39
3.2.40
3.2.41
3.2.42
3.2.43
3.2.44
3.2.45
3.2.46
3.2.47
3.2.48
3.2.49
3.2.50
3.2.51
3.2.52
3.2.53
3.2.54
3.2.55
3.2.56
3.2.57
3.2.58
3.2.59
3.2.60
3.2.61
3.2.62
3.2.63
3.2.64
3−2
Flipflop element (FLIP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Gearbox compensation (GEARCOMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Limiting element (LIM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Internal motor control (MCTRL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Mains failure control (MFAIL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Motor phase failure detection (MLP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Monitor outputs of monitoring system (MONIT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Motor potentiometer (MPOT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic NOT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Speed setpoint conditioning (NSET) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
OR operation (OR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Oscilloscope function (OSZ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Process controller (PCTRL1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Angle addition block (PHADD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Angle comparator (PHCMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Actual angle integrator (PHDIFF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Signal adaptation for angle signals (PHDIV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Phase integrator (PHINT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Delay element (PT1−1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CW/CCW/QSP linking (R/L/Q) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Homing function (REF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ramp function generator (RFG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sample and hold function (S&H) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
S−shaped ramp function generator (SRFG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output of digital status signals (STAT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Control of a drive network (STATE−BUS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage block (STORE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Multi−axis synchronisation (SYNC1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Edge evaluation (TRANS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
EDSVS9332S−EXT EN 2.0
3−97
3−100
3−101
3−102
3−111
3−122
3−123
3−125
3−128
3−130
3−135
3−138
3−142
3−145
3−146
3−148
3−149
3−150
3−156
3−157
3−158
3−164
3−166
3−167
3−169
3−170
3−171
3−175
3−183
l
Function library
Working with function blocks
3.1.1
3.1
Signal types
Working with function blocks
The signal flow of the controller can be configured by connecting function blocks. The controller can
thus be easily adapted to diverse applications.
3.1.1
Signal types
Each function block has a certain number of inputs and outputs, which can be interlinked.
Corresponding to their respective functions, only particular signal types occur at the inputs and
outputs:
l
Quasi analog signals
– Symbol: – Unit: %
– Designation: a
– Value range: ±16384 = ±100 %
– Resolution: 16 bits, scaling: ±16384 ¢ ±100 %
l
Digital signals
– Symbol: – Unit: binary, with HIGH or LOW level
– Designation: d
– Resolution: 1 bit
l
Speed signals
– Symbol: – Unit: rpm (for display, internal representation in [inc/ms])
– Designation: phd
– Value range: ±215 − 1
– Resolution: 16 bit
l
Angle signals
– Symbol: – Unit: inc
– Designation: ph
– Value range: ±231 − 1
– Resolution: 32 bits, scaling: 1 revolution ¢ 65536 inc
Only the same signal types can be connected with each other. Thus, an analog output signal of one
function block can only be connected to the analog output of the other function block. If two different
signal types are connected, the connection will be rejected.
l
EDSVS9332S−EXT EN 2.0
3−3
Function library
Working with function blocks
3.1.2
3.1.2
Elements of a function block
Elements of a function block
Parameterisation code
Input name
FB name
FCNT1
C1100
C1102/1
FCNT1−CLKUP
FCNT1−OUT
C1104/1
C1102/2
FCNT1−CLKDWN
Output symbol
C1104/2
Input symbol
C1101/1
FCNT1−LD−VAL
CTRL
FCNT1−EQUAL
C1103/1
C1102/3
FCNT1−LOAD
C1104/3
C1101/2
FCNT1−CMP−VAL
C1103/2
Configuration code
Function
Display code
Fig. 3−1
Output name
Structure of a function block (FB) using the example of FCNT1
FB name
Clearly identifies the FB. The FB name is followed by a number distinguishing the function of the FB.
Each FB is defined via its selection number. For calculating the FB the input of the selection number
into the processing table is always required. ( 3−10)
The selection numbers are listed in selection list 5.
Example:
(FCNT1, see Fig. 3−1)
l
FCNT1 ¢ selection number 6400 (selection list 5).
Input symbol
Indicates the signal type which can be used as a signal source for this input. ( 3−3)
)
Note!
Only inputs led through the FB can be configured.
Input name
Consists of the FB name and a designation. Inputs with the same function are distinguished by the
number that is added to the designation.
3−4
EDSVS9332S−EXT EN 2.0
l
Function library
Working with function blocks
3.1.2
Elements of a function block
Configuration code
Configures the input with a signal source (e. g. terminal signal, control code, output of an FB, ...).
Inputs with identical codes are distinguished by the attached subcode (Cxxxx/1). These codes are
configured via the subcode.
It is not possible to connect an input with several signal sources.
Display code
Displays the current input value. Inputs with identical codes are distinguished by the attached
subcode (Cxxxx/1). These codes are displayed via the subcode.
Display codes cannot be processed.
Function
Represents the mathematical function as a block diagram (see Fig. 3−1).
Parameterisation code
Adaptation of the function or behaviour to the drive task. Possible settings are described in the text
editor and / or the line diagrams. ( 3−12)
Output symbol
Designates the signal type. Connections with inputs of the same signal type are possible. ( 3−3)
Each output is defined by a selection number. The selection numbers are divided into selection lists
(1 ... 4) according to the different signal types.
An output is linked to an input by the selection numbers.
Example:
(FCNT1, see Fig. 3−1)
l
FCNT1−OUT ¢ selection number 6400 (analog signal, selection list 1).
l
FCNT1−EQUAL ¢ selection number 6400 (digital signal, selection list 2).
)
Note!
Only outputs brought out of the FB can be configured.
Output name
Consists of the FB name and a designation. Outputs with the same function are distinguished by the
number that is added to the designation.
l
EDSVS9332S−EXT EN 2.0
3−5
Function library
Working with function blocks
3.1.3
3.1.3
Connecting function blocks
Connecting function blocks
General rules
l
Assign a signal source to an input.
l
One input can have only one signal source.
l
Inputs of different function blocks can have the same signal source.
l
Only signals of the same type can be connected.
(
Stop!
Existing connections which are not required must be removed by reconfiguration.
Otherwise the drive cannot perform the desired function.
AND1
AND1−IN1
C0820/1
C0820/2
C0820/3
C0821/1
AND1−IN2
C0840
&
C0842
NOT2−IN
1
NOT2
NOT2−OUT
X
OR1
OR1−IN1
C0830/1
C0830/3
NOT1
NOT1−OUT
C0843
C0821/3
C0830/2
1
C0841
AND1−OUT
C0821/2
AND1−IN3
C0831/1
OR1−IN2
NOT1−IN
|1
OR1−OUT
C0723
DIGDEL1−IN
C0724
C0831/2
OR1−IN3
DIGDEL1
C0720
C0721
DIGDEL1−OUT
0
t
C0831/3
Connection is possible
Connection not possible
Fig. 3−2
3−6
Correct connection of function blocks
EDSVS9332S−EXT EN 2.0
l
Function library
Working with function blocks
3.1.3
Connecting function blocks
Basic procedure
1. Select the configuration code of the function block input which is to be changed.
2. Determine the source of the input signal for the selected input
(e.g. from the output of another function block).
3. The function block input is assigned via a menu which contains only those signal sources
which are of the same type as the function block input to be assigned.
4. Select and confirm the signal source.
5. Remove undesired connections, if any.
– For this, select the corresponding signal assignment of the input via the configuration code
(e.g. FIXED0, FIXED1, FIXED0%, ...).
6. Repeat 1. to 5. until the desired configuration is set.
7. Save modified configuration in the desired parameter set.
Example
l
Condition:
– Default setting
l
Task:
– Square the analog signal of X6/3, X6/4 and output to X6/62.
l
Solution:
– You need the function blocks AIN2, ARIT2 and AOUT2.
AIN2
3
+
+
4
AIN2−OUT
C0026/2
C0602/1
C0407
ARIT2−IN2
C0409/1
C0027/2
C0408
AIN2−GAIN
C0600
ARIT2−IN1
x
y
ARIT2
"200%
C0601/1
AIN2−OFFSET
+ − *
/ x/(1−y)
C0601/2
C434/1
ARIT2−OUT
C0431
C0108/1
C0433
C0109/1
C0432
+
AOUT1−GAIN
+
62
C0434/3
C0602/2
C0409/2
AOUT1
AOUT1−IN
AOUT1−OFFSET
C0434/2
Fig. 3−3
l
Example of a simple configuration
EDSVS9332S−EXT EN 2.0
3−7
Function library
Working with function blocks
3.1.3
Connecting function blocks
Create connections
1. Determine the signal source for ARIT2−IN1:
– Change to the code level using the arrow keys
– Select C0601/1 using or .
– Change to the parameter level using PRG.
– Select output AIN2−OUT (selection number 55) using or .
– Confirm using SH + PRG
– Change to the code level again using PRG.
2. Determine signal source for ARIT2−IN2:
– Select C0601/2 using .
– Change to the parameter level using PRG.
– Select output AIN2−OUT (selection number 55) using or .
– Confirm using SH + PRG
– Change to the code level again using PRG.
3. Parameterise ARIT2:
– Select C0600 using .
– Change to the parameter level using PRG.
– Select multiplication (selection number 3).
– Confirm using SH + PRG
– Change to the code level again using PRG.
4. Determine signal source for AOUT1:
– Select C0431 using .
– Change to the parameter level using PRG.
– Select output ARIT2−OUT (selection number 5505).
– Confirm using SH + PRG
– Change to the code level again using PRG.
5. Enter function block ARIT2 in the processing table:
– Select C0465 and subcode 8 using .
– Change to the parameter level using PRG.
– Enter function block ARIT2 (selection number 5505).
– Confirm using SH + PRG
– Change to the code level again using PRG.
– The sequence of the FB processing is thus determined.
3−8
EDSVS9332S−EXT EN 2.0
l
Function library
Working with function blocks
3.1.3
Connecting function blocks
Remove connections
l
Since a source can have several targets, there may be additional, unwanted signal
connections.
l
Example:
– In the basic configuration C0005 = 1000, ASW1−IN1 and AIN2−OUT are connected.
– This connection is not automatically removed by the settings described above! If you do not
want this connection, remove it.
ASW1
C0812/1
C0810/1
FIXED0%
C0810/2
ASW1−IN1
0
ASW1−IN2
1
ASW1−OUT
NSET−NADD
C0812/2
FIXED0
C0811
ASW1−SET
C0813
AIN2
3
+
+
4
C0601/1
AIN2−OFFSET
C0026/2
C0602/1
C0407
ARIT2−IN2
C0409/1
C0027/2
C0408
C0600
ARIT2−IN1
AIN2−OUT
x
y
+ − *
/ x/(1−y)
C0601/2
AIN2−GAIN
"200%
ARIT2
C434/1
ARIT2−OUT
C0431
C0108/1
C0433
C0109/1
C0432
+
AOUT1−GAIN
+
62
C0434/3
C0602/2
C0409/2
AOUT1
AOUT1−IN
AOUT1−OFFSET
C0434/2
Fig. 3−4
Removing connections in a configuration
1. Remove connection between ASW1−IN1 and AIN2−OUT:
– Select C0810/1 using or .
– Change to the parameter level using PRG.
– Select the constant FIXED0% (selection number 1000) using or .
– Confirm using SH + PRG
– Change to the code level again using PRG.
Now, the connection is removed.
2. Save new configuration, if desired:
– If you do not want to lose the modifications after mains disconnection, save the new signal
configuration under C0003 in one of the parameter sets.
l
EDSVS9332S−EXT EN 2.0
3−9
Function library
Working with function blocks
3.1.4
3.1.4
Entries into the processing table
Entries into the processing table
The 93XX drive controller provides a certain computing time for processing function blocks. Since
the type and number of the function blocks used can vary considerably, not all function blocks
available are permanently calculated. Therefore the code C0465 provides a processing table, in
which only the FBs used are entered. This means that the drive system is perfectly adapted to the
task to be solved. If further FBs are used in an extant configuration, they must be entered into the
processing table.
The following aspects must be observed:
The number of FBs to be processed is limited
A maximum of 50 FBs can be integrated into a configuration. Each FB needs a certain processing
time (operating time). The code C0466 shows the time still remaining for processing the FBs. If this
time has elapsed, no further FBs can be integrated.
Sequence for entering FBs
Normally, the sequence of the entries into C0465 is discretionary, but it may be important for
applications with a highly dynamic response. In general the most favourable sequence is adapted
to the signal flow.
Example:
E1
E2
E3
E4
E5
DIGIN
C0114/1...5
0
1
C0820/1
DIGIN1
DIGIN2
DIGIN3
C0820/2
DIGIN4
DIGIN5
C0443
C0820/3
C0821/1
AND1-IN2
&
AND1-OUT
C0821/2
AND1-IN3
C0821/3
C0830/1
C0830/2
FIXED0
AND1
AND1-IN1
C0830/3
DIGOUT1
DIGOUT2
DIGOUT3
DIGOUT4
C0444/1
C0444/2
C0444/3
C0444/4
DIGOUT
C0118/1...4
0
1
A1
A2
A3
A4
OR1
OR1-IN1
C0831/1
OR1-IN2
C0117/1
C0117/2
C0117/3
C0117/4
≥1
OR1-OUT
C0831/2
OR1-IN3
C0831/3
C0822/1
C0822/2
FIXED1
C0822/3
AND2
AND2-IN1
C0823/1
AND2-IN2
&
AND2-OUT
C0823/2
AND2-IN3
C0823/3
Fig. 3−5
3−10
Example of a configuration
EDSVS9332S−EXT EN 2.0
l
Function library
Working with function blocks
3.1.4
Entries into the processing table
Structure of the processing table for the configuration example Fig. 3−5:
1. DIGIN does not have to be entered into the processing table.
2. The first FB is AND1, since it receives its input signals from DIGIN and only has successors.
3. The second FB is OR1, since its signal source is the output of AND1 (predecessor). Hence, the
output signal in AND1 must be generated first, before being processed in OR1. At the same
time, OR1 has a successor. Hence, OR1 must be entered into the processing table before the
successor.
4. The third FB is AND2, since it has a predecessor (see 3.)
5. The entries under C0465 are as follows:
– Position 10: AND1 10500
– Position 11: OR1 10550
– Position 12: AND2 10505
This example was started with position 10, since these positions are not assigned in the default
setting.
FBs do not have to be entered into the processing table directly one after the other. Empty positions
in the processing table are permissible.
)
Note!
It is also possible that other FBs are entered between the FBs listed in the example.
FBs, which do not have to be entered into the processing table
The following signal sources are always executed and therefore do not need to be entered into the
processing table:
l AIF−IN
l CANx−IN
l DIGIN
l DIGOUT
l FCODE (all free codes)
l MCTRL
l fixed signal sources (FIXED0, FIXED0%, etc.)
Frequent errors
l
Malfunction
Cause
Remedy
FB does not supply an output signal
FB was not entered into the processing table
C0465
Enter FB
FB only supplies constant signals
FB was deleted from or overwritten in the
processing table C0465
Enter FB again, possibly under a different
subcode (list position)
The output signal does not arrive at the
following FB
The connection between the FBs has not been Establish the connection (from the view of the
established
following FB) via the configuration code (CFG)
FB cannot be entered into the table C0465
Residual processing time is too short
(see C0466)
Delete unused FBs (e. g. inputs and outputs
not used)
In networked drives, functions may be
assigned to other controllers
The drive controller transmits internally
calculated signals with a delay to the outputs.
The FBs are processed in an incorrect
sequence
Adapt the processing table under C0465 to the
signal flow
EDSVS9332S−EXT EN 2.0
3−11
Function library
Function blocks
3.2.1
Table of function blocks
3.2
Function blocks
3.2.1
Table of function blocks
3−12
Function block
Description
CPU time
[ms]
ABS1
ADD1
AIF−IN
AIF−OUT
AIN1
AIN2
AND1
AND2
AND3
AND4
AND5
AND6
AND7
ANEG1
ANEG2
AOUT1
AOUT2
ARIT1
ARIT2
ARITPH1
ASW1
ASW2
ASW3
ASW4
BRK
CAN−IN1
CAN−IN2
CAN−IN3
CAN−OUT1
CAN−OUT2
CAN−OUT2
CMP1
CMP2
CMP3
CONV1
CONV2
CONV3
CONV4
CONV5
CONV6
CONVPHA1
CONVPHPH1
CONVPP1
CURVE1
DB1
DCTRL
DFIN
DFOUT
DFRFG1
DFSET
DIGDEL1
DIGDEL2
Absolute value generator
Addition block
Fieldbus
Fieldbus
Analog input X6/1, X6/2
Analog input X6/3, X6/4
Logic AND, block1
Logic AND, block2
Logic AND, block3
Logic AND, block4
Logic AND, block5
Logic AND, block6
Logic AND, block7
Analog inverter 1
Analog inverter 2
Analog output X6/62
Analog output X6/63
Arithmetic block 1
Arithmetic block 2
32 Bit arithmetic block
Analog changeover 1
Analog changeover 2
Analog changeover 3
Analog changeover 4
Trigger holding brake
System bus
System bus
System bus
System bus
System bus
System bus
Comparator 1
Comparator 2
Comparator 3
Conversion
Conversion
Conversion
Conversion
Conversion
Conversion
32 bit conversion
32 bit conversion
32 bit / 16 bit conversion
Characteristic function
Dead band
Device control
Digital frequency input
Digital frequency output
Digital frequency ramp function generator
Digital frequency processing
Binary delay element 1
Binary delay element 2
used in basic configuration C0005
1000
4000
5000
6000
7000
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
3
·
·
·
·
12
·
·
·
·
·
·
·
·
4
8
—
56
10
28
6
20
·
21
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
11
15
4
·
·
15
—
56
·
·
·
·
·
15
·
·
·
·
·
8
·
·
6
80
55
15
7
—
5
35
40
85
9
EDSVS9332S−EXT EN 2.0
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
l
Function library
Function blocks
3.2.1
l
Table of function blocks
Function block
Description
CPU time
[ms]
DIGIN
DIGOUT
DT1−1
FCNT1
FEVAN1
FEVAN2
FDO
FIXED
FIXSET1
FLIP1
FLIP2
GEARCOMP
LIM1
MCTRL
MFAIL
MLP1
MONIT
MPOT1
NOT1
NOT2
NOT3
NOT4
NOT5
NSET
OR1
OR2
OR3
OR4
OR5
OSZ
PCTRL1
PHADD1
PHCMP1
PHCMP2
PHCMP3
PHDIFF
PHDIV1
PHINT1
PHINT2
PHINT3
PT1−1
CW/CCW/Q
REF
RFG1
S&H
SRFG1
STAT
STATE−BUS
STORE1
STORE2
SYNC1
TRANS1
TRANS2
TRANS3
TRANS4
Input terminals X5/E1...X5/E5
Output terminals X5/A1...X5/A4
Differential element
Piece counter
Free analog input variable
Free analog input variable
Free digital outputs
Constant signals
Fixed setpoints
D−flipflop 1
D−flipflop 2
Gearbox torsion
Limiter
Motor control
Mains failure detection
Motor phase failure detection
Monitoring
Motor potentiometer
Logic NOT, block1
Logic NOT, block2
Logic NOT, block3
Logic NOT, block4
Logic NOT, block5
Speed setpoint conditioning
Logic OR, block1
Logic OR, block2
Logic OR, block3
Logic OR, block4
Logic OR, block5
Oscilloscope function
Process controller
32 bit addition block
Comparator
Comparator
Comparator
32 bit setpoint/act. value comparison
Conversion
Phase integrator
Phase integrator
Phase integrator
1st order delay element
QSP / setpoint inversion
Homing function
Ramp function generator
Sample and Hold
S−shape ramp function generator
Digital status signals
State bus
Memory 1
Memory 2
Multi−axis positioning
Binary edge evaluation
Binary edge evaluation
Binary edge evaluation
Binary edge evaluation
—
—
12
11
4
—
—
9
6
1
5
—
40
30
—
20
4
70
6
used in basic configuration C0005
1000
·
·
4000
·
·
5000
·
·
6000
·
·
7000
·
·
20
·
·
21
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
70
58
10
8
·
10
8
7
10
8
8
100
16
4
15
—
—
35
20
55
7
EDSVS9332S−EXT EN 2.0
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
3−13
Function library
Function blocks
3.2.2
3.2.2
Table of free control codes
Table of free control codes
Function block
Description
FCODE 17
FCODE 26/1
Free control codes
CPU time
[ms]
—
FCODE 26/2
FCODE 27/1
FCODE 27/2
FCODE 32
FCODE 37
FCODE 108/1
FCODE 108/2
FCODE 109/1
FCODE 109/2
FCODE 135
FCODE 141
FCODE 250
FCODE 471
FCODE 472/1
FCODE 472/2
FCODE 472/3
FCODE 472/4
FCODE 472/5
FCODE 472/6
FCODE 472/7
FCODE 472/8
FCODE 472/9
FCODE 472/10
FCODE 472/11
FCODE 472/12
FCODE 472/13
FCODE 472/14
FCODE 472/15
FCODE 472/16
FCODE 472/17
FCODE 472/18
FCODE 472/19
FCODE 472/20
FCODE 473/1
FCODE 473/2
FCODE 473/3
FCODE 473/4
FCODE 473/5
FCODE 473/6
FCODE 473/7
FCODE 473/8
FCODE 473/9
FCODE 473/10
FCODE 474/1
FCODE 474/2
FCODE 474/3
FCODE 474/4
FCODE 474/5
FCODE 475/2
3−14
used in basic configuration C0005
1000
·
·
·
·
·
4000
·
·
·
·
·
5000
·
·
·
·
·
·
6000
·
·
·
·
·
·
7000
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
EDSVS9332S−EXT EN 2.0
·
·
·
·
·
·
20
·
·
·
·
·
·
·
·
·
·
21
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
l
Function library
Function blocks
Description
This function block converts bipolar signals to unipolar signals.
The absolute value is generated by the input signal and is provided at the output.
C0661
ABS1-IN
ABS1
ABS1-OUT
C0662
fb_abs
Fig. 3−6
l
Absolute value generator (ABS1)
EDSVS9332S−EXT EN 2.0
3−15
Function library
Function blocks
3.2.3
3.2.3
Addition block (ADD)
Addition block (ADD)
Purpose
Adds or subtracts "analog" signal depending on the input used.
± 1 9 9 .9 9 %
C 0 6 1 0 /1
C 0 6 1 0 /2
C 0 6 1 0 /3
A D D 1 -IN 1
C 0 6 1 1 /1
A D D 1 -IN 2
+
A D D 1
A D D 1 -O U T
+
-
C 0 6 1 1 /2
A D D 1 -IN 3
C 0 6 1 1 /3
9300POSADD1
Fig. 3−7
Addition block (ADD1)
Source
Signal
Name
ADD1−IN1
ADD1−IN2
ADD1−IN3
ADD1−OUT
Note
Type
DIS
DIS format
CFG
List
Lenze
a
a
a
a
C0611/1
C0611/2
C0611/3
−
dec [%]
dec [%]
dec [%]
−
C0610/1
C0610/2
C0610/3
−
1
1
1
−
1000
1000
1000
−
Addition input
Addition input
Subtraction input
Limited to ±199.99%
Function
3−16
l
Input ADD1−IN1 is added to input ADD1−IN2.
l
The input ADD−IN3 is subtracted from the calculated result.
l
Then, the result of the subtraction is limited to ±199.99 %.
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.4
3.2.4
Automation interface (AIF−IN)
Automation interface (AIF−IN)
Purpose
Interface for input signals of the plug−on fieldbus module (e.g. INTERBUS, PROFIBUS) for setpoints
and actual values as binary, analog, or angle information. Please observe the corresponding
Operating Instructions for the plug−on fieldbus module.
A IF -IN
D C T R L
A IF -C T R L .B 3
Q S P
A IF -C T R L .B 8
D IS A B L E
A IF -C T R L .B 9
C IN H
A IF -C T R L .B 1 0
T R IP -S E T
A IF -C T R L .B 1 1
B it 0
T R IP -R E S E T
A IF -C T R L .B 0
C o n tro l w o rd
A IF -C T R L .B 1
A IF -C T R L .B 2
A IF -C T R L .B 4
A IF -C T R L .B 5
1 6 b its
A IF
A IF
A IF
A IF
A IF
B it 1 5
-C
-C
-C
-C
-C
T R
T R
T R
T R
T R
L .B
L .B
L .B
L .B
L .B
6
7
1 2
1 3
1 4
A IF -C T R L .B 1 5
B y te 3 ,4
C 0 1 3 6 /3
A IF -IN .W 1
1 6 b its
1 6 B it
L O W
C 0 8 5 6 /1
W o rd
1 6 B it
H IG H
A u to m a tio n
in te r fa c e X 1
W o rd
A IF -IN .D 2
C 1 1 9 7
A IF -IN .W 2
1 6 b its
C 0 8 5 6 /2
1 6 b its
A IF -IN .B 0
A IF -IN .B 2
C 0 8 5 5 /1
1 6 b in a r y
s ig n a ls
A IF -IN .B 1 4
A IF -IN .B 1 5
A IF -IN .B 1 6
A IF -IN .B 1 7
C 0 8 5 5 /2
...
1 6 b in a r y
s ig n a ls
B y te 7 ,8
A IF -IN .W 3
...
B y te 5 ,6
C 0 8 5 6 /3
A IF -IN .B 3 0
A IF -IN .B 3 1
1 6 b its
L O W
1 6 b its
H IG H
w o rd
w o rd
A IF -IN .D 1
C 0 8 5 7
AIF−IN1
Fig. 3−8
l
Automation interface (AIF−IN)
EDSVS9332S−EXT EN 2.0
3−17
Function library
Function blocks
3.2.4
Automation interface (AIF−IN)
Signal
Name
AIF−CTRL.B0
AIF−CTRL.B1
AIF−CTRL.B2
AIF−CTRL.B4
AIF−CTRL.B5
AIF−CTRL.B6
AIF−CTRL.B7
AIF−CTRL.B12
AIF−CTRL.B13
AIF−CTRL.B14
AIF−CTRL.B15
AIF−IN.W1
AIF−IN.W2
AIF−IN.W3
AIF−IN.D1
AIF−IN.D2
AIF−IN.B0
AIF−IN.B1
AIF−IN.B2
AIF−IN.B3
AIF−IN.B4
AIF−IN.B5
AIF−IN.B6
AIF−IN.B7
AIF−IN.B8
AIF−IN.B9
AIF−IN.B10
AIF−IN.B11
AIF−IN.B12
AIF−IN.B13
AIF−IN.B14
AIF−IN.B15
AIF−IN.B16
AIF−IN.B17
AIF−IN.B18
AIF−IN.B19
AIF−IN.B20
AIF−IN.B21
AIF−IN.B22
AIF−IN.B23
AIF−IN.B24
AIF−IN.B25
AIF−IN.B26
AIF−IN.B27
AIF−IN.B28
AIF−IN.B29
AIF−IN.B30
AIF−IN.B31
3−18
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
d
d
d
d
d
d
d
d
d
d
d
a
a
a
ph
ph
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
C0136/3
C0136/3
C0136/3
C0136/3
C0136/3
C0136/3
C0136/3
C0136/3
C0136/3
C0136/3
C0136/3
C0856/1
C0856/2
C0856/3
C0857
C1197
C0855/1
C0855/1
C0855/1
C0855/1
C0855/1
C0855/1
C0855/1
C0855/1
C0855/1
C0855/1
C0855/1
C0855/1
C0855/1
C0855/1
C0855/1
C0855/1
C0855/2
C0855/2
C0855/2
C0855/2
C0855/2
C0855/2
C0855/2
C0855/2
C0855/2
C0855/2
C0855/2
C0855/2
C0855/2
C0855/2
C0855/2
C0855/2
bin
bin
bin
bin
bin
bin
bin
bin
bin
bin
bin
dec [%]
dec [%]
dec [%]
dec [inc]
dec [inc]
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
EDSVS9332S−EXT EN 2.0
+16384 = +100 %
+16384 = +100 %
+16384 = +100 %
65536 = 1 rev.
65536 = 1 rev.
l
Function library
Function blocks
3.2.4
Automation interface (AIF−IN)
Function
The input signals of the 8−byte user data of the AIF object are converted into corresponding signal
types. The signals can be used via further function blocks.
Byte 1 and 2
Byte 1 and 2 form the control word for the controller. The bits 3, 8, 9, 10, and 11 of these bytes are
directly transferred into the function block DCTRL where they are linked with further signals. The
other 11 bits can be used to control further function blocks.
Byte 3 and 4
form the signal to AIF−IN.W1.
Byte 5, 6, 7, and 8
This user data can be interpreted as different signal types. According to the requirement this data can
be evaluated as up to two analog signals, 32 digital signals or one angle signal. Mixed forms are also
possible.
l
EDSVS9332S−EXT EN 2.0
3−19
Function library
Function blocks
3.2.5
3.2.5
Automation interface (AIF−OUT)
Automation interface (AIF−OUT)
Purpose
Interface for output signals of the plug−on fieldbus modules (e.g. INTERBUS, PROFIBUS) for
setpoints and actual values as binary, analog or angle information. Please observe the corresponding
Operating Instructions for the plug−on fieldbus module.
C 0 1 5 6 /1
A IF -O U T
B it 0
S T A T
S T A T .B 0
S ta tu s
A IF -O U T .D 2
1 6 b its
H IG H w o rd
C 1 1 9 6
C 0 8 5 0 /1
C 0 8 5 0 /2
C 0 8 5 0 /3
1 6 b its
L O W w o rd
C 0 1 1 6 /3 2
C 0 8 5 1
0
3
C 0 8 5 8 /1
A IF -O U T .W 2
C 0 8 5 8 /2
A IF -O U T .W 3
C 0 8 5 2
1 6 b its
L O W w o rd
F D O -1 5
F D O -1 6
A u to m a tio n
in te r fa c e
X 1
B it 1 5
B it 0
0
F D O
...
F D O -0
1
2
3
1 6 b its
H IG H w o rd
...
C 0 1 1 6 /1 6
C 0 1 1 6 /1 7
B it 1 5
B it 0
A IF -O U T .W 1
C 0 8 5 8 /3
C 0 1 1 6 /1
C 0 8 5 4
B y te 3 ,4
C 1 1 9 5
S T A T .B 1 5
B y te 5 ,6
C 0 1 5 6 /7
1 6 b its
S T A T .B 1 4
F D O -3 1
C 0 8 5 3
A IF -O U T .D 1
1 6 b its
L O W w o rd
1 6 b its
H IG H w o rd
C 0 8 5 9
0
B y te 7 ,8
C 0 1 5 6 /6
w o rd
...
D C T R L -IM P
1
2
B it 3 1
AIF−OUT1
Fig. 3−9
Automation interface (AIF−OUT)
Signal
Name
AIF−OUT.W1
AIF−OUT.W2
AIF−OUT.W3
AIF−OUT.D1
AIF−OUT.D2
3−20
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
a
a
a
ph
ph
C0858/1
C0858/2
C0858/3
C0859
C1196
dec [%]
dec [%]
dec [%]
abs [inc]
abs [inc]
C0850/1
C0850/2
C0850/3
C0851
C1195
1
1
1
4
4
1000
1000
1000
1000
1000
EDSVS9332S−EXT EN 2.0
+100 % = +16384
+100 % = +16384
+100 % = +16384
1 rev. = 65536
1 rev. = 65536
l
Function library
Function blocks
3.2.5
Automation interface (AIF−OUT)
Function
The input signals of this function block are copied into the 8−byte user data of the AIF object and
assigned to the plug−on fieldbus module. The meaning of the user data can be determined very easily
with C0852 and C0853 and the corresponding configuration code (CFG).
Byte 1 and 2
Here, the status word from the function block STAT is mapped. Some of the bits are freely assignable
(see description of the function block STAT in chapter 3.2.60)
Byte 3 and 4
l
C0854 = 0
– The analog signal at AIF−OUT.W1 is output.
l
C0854 = 3
– The LOW−WORD of AIF−OUT.D2 is output.
Byte 5 and 6
l
C0852 = 0
– The analog signal at AIF−OUT.W2 is output at bytes 5 and 6.
l
C0852 = 1
– The bits 0 ... 15 of FDO are output.
l
C0852 = 2
– The LOW−WORD of AIF−OUT.D1 is output.
l
C0852 = 3
– The HIGH−WORD of AIF−OUT.D2 is output.
Byte 7 and 8
l
C0853 = 0
– The analog signal at AIF−OUT.W3 is output.
l
C0853 = 1
– The bits 16 ... 31 of FDO are output.
l
C0853 = 2
– The HIGH−WORD of AIF−OUT.D1 is output.
Example
You want to output 16 digital signals of FDO and the LOW−WORD of AIF−OUT.D1:
l
l
The LOW−WORD of AIF−OUT.D1 can only be output at bytes 5 and 6.
– For this purpose, C0852 is set to 2. The angle signal at C0851 is output at bytes 5 and 6.
l
For the digital signals, only the bits 16 ... 31 (bytes 7 and 8) are available (bytes 5 and 6 are
assigned):
– For this purpose, C0853 is set to 1. Bits 16 ... 31 (FDO) are output at bytes 7 and 8.
EDSVS9332S−EXT EN 2.0
3−21
Function library
Function blocks
3.2.6
3.2.6
Analog inputs via terminal X6/1, X6/2 and X6/3, X6/4 (AIN)
Analog inputs via terminal X6/1, X6/2 and X6/3, X6/4 (AIN)
Purpose
These function blocks are the interface for analog signals as the
l
setpoint input,
l
actual value input and
l
parameter control.
AIN1
C0034
1
2
C0402
C0403
AIN1-OFFSET
AIN1-OUT
+
+
C0400
C0404/1
AIN1-GAIN
C0404/2
Fig. 3−10
Analog input via terminal X6/1, X6/2 (AIN1)
Source
Signal
Name
AIN1−OFFSET
AIN1−GAIN
AIN1−OUT
Note
Type
DIS
DIS format
CFG
List
Lenze
a
a
a
C0404/1
C0404/2
C0400
dec [%]
dec [%]
−
C0402
C0403
−
1
1
−
19502
19504
−
−
−
−
Special features of AIN1
l
A dead band element can be integrated into the output signal at AIN1 via code C0034.
Together with the jumper position X2 (controller front) the function 4 ... 20 mA can be
implemented as a master current value.
l
The signal is read cyclically (1 ms).
AIN2
3
4
C0407
C0408
AIN2-OFFSET
+
+
AIN2-OUT
C0405
C0409/1
AIN2-GAIN
C0409/2
Fig. 3−11
Analog input via terminal X6/3, X6/4 (AIN2)
Signal
Name
AIN2−OFFSET
AIN2−GAIN
AIN2−OUT
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
a
a
a
C0409/1
C0409/2
C0405
dec [%]
dec [%]
−
C0407
C0408
−
1
1
−
19503
19505
−
−
−
−
Special feature of AIN2
l
3−22
The signal is read cyclically every 250 ms.
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.6
Analog inputs via terminal X6/1, X6/2 and X6/3, X6/4 (AIN)
Function
l
The analog input value is added to the value at input AINx−OFFSET.
l
The result of the addition is limited to ±200 %.
l
The limited value is multiplied by the value which is applied to input AINx−GAIN.
l
Then the signal is limited to ±200%.
l
The signal is output at AINx−OUT.
AIN−OUT
AIN−GAIN
ÎÎÎÎÎ
AIN−OFFSET
Fig. 3−12
l
IN
Offset and gain of the analog input
EDSVS9332S−EXT EN 2.0
3−23
Function library
Function blocks
3.2.7
3.2.7
AND operation (AND)
AND operation (AND)
Purpose
With this function digital signals can be logically ANDed. These links can be used to control functions
or to create status information.
C0820/1
C0820/2
C0820/3
AND1
AND1-IN1
C0821/1
AND1-IN2
&
AND1-OUT
C0821/2
AND1-IN3
C0821/3
Fig. 3−13
AND operation (AND1)
Signal
Name
AND1−IN1
AND1−IN2
AND1−IN3
AND1−OUT
Type
d
d
d
d
Source
DIS
C0821/1
C0821/2
C0821/3
−
DIS format
bin
bin
bin
−
C0822/1
C0822/2
C0822/3
CFG
C0820/1
C0820/2
C0820/3
−
List
2
2
2
−
−
−
−
−
AND2
AND2-IN1
C0823/1
AND2-IN2
Note
Lenze
1000
1000
1000
−
&
AND2-OUT
C0823/2
AND2-IN3
C0823/3
Fig. 3−14
AND operation (AND2)
Signal
Name
AND2−IN1
AND2−IN2
AND2−IN3
AND2−OUT
3−24
Type
d
d
d
d
Source
DIS
C0823/1
C0823/2
C0823/3
−
DIS format
bin
bin
bin
−
CFG
C0822/1
C0822/2
C0822/3
−
EDSVS9332S−EXT EN 2.0
List
2
2
2
−
Note
Lenze
1000
1000
1000
−
−
−
−
−
l
Function library
Function blocks
3.2.7
AND operation (AND)
C0824/1
C0824/2
C0824/3
AND3
AND3-IN1
C0825/1
AND3-IN2
&
AND3-OUT
C0825/2
AND3-IN3
C0825/3
Fig. 3−15
AND operation (AND3)
Source
Signal
Name
AND3−IN1
AND3−IN2
AND3−IN3
AND3−OUT
Type
d
d
d
d
DIS
C0825/1
C0825/2
C0825/3
−
DIS format
bin
bin
bin
−
C0826/1
C0826/2
C0826/3
CFG
C0824/1
C0824/2
C0824/3
−
List
2
2
2
−
−
−
−
−
AND4
AND4-IN1
C0827/1
AND4-IN2
Note
Lenze
1000
1000
1000
−
&
AND4-OUT
C0827/2
AND4-IN3
C0827/3
Fig. 3−16
AND operation (AND4)
Source
Signal
Name
AND4−IN1
AND4−IN2
AND4−IN3
AND4−OUT
Type
d
d
d
d
DIS
C0827/1
C0827/2
C0827/3
−
DIS format
bin
bin
bin
−
C0828/1
C0828/2
C0828/3
CFG
C0826/1
C0826/2
C0826/3
−
List
2
2
2
−
−
−
−
−
AND5
AND5-IN1
C0829/1
AND5-IN2
Note
Lenze
1000
1000
1000
−
&
AND5-OUT
C0829/2
AND5-IN3
C0829/3
Fig. 3−17
AND operation (AND5)
Source
Signal
Name
AND5−IN1
AND5−IN2
AND5−IN3
AND5−OUT
l
Type
d
d
d
d
DIS
C0829/1
C0829/2
C0829/3
−
DIS format
bin
bin
bin
−
CFG
C0828/1
C0828/2
C0828/3
−
EDSVS9332S−EXT EN 2.0
List
2
2
2
−
Note
Lenze
1000
1000
1000
−
−
−
−
−
3−25
Function library
Function blocks
3.2.7
AND operation (AND)
C 1 1 7 5 /1
C 1 1 7 5 /2
C 1 1 7 5 /3
A N D 6
A N D 6 -IN 1
C 1 1 7 6 /1
A N D 6 -IN 2
&
A N D 6 -O U T
C 1 1 7 6 /2
A N D 6 -IN 3
C 1 1 7 6 /3
Fig. 3−18
AND operation (AND6)
Signal
Name
AND6−IN1
AND6−IN2
AND6−IN3
AND6−OUT
Type
d
d
d
d
Source
DIS
C1176/1
C1176/2
C1176/3
−
DIS format
bin
bin
bin
−
C 1 1 7 8 /1
C 1 1 7 8 /2
C 1 1 7 8 /3
CFG
C1175/1
C1175/2
C1175/3
−
List
2
2
2
−
−
−
−
−
A N D 7
A N D 7 -IN 1
C 1 1 7 9 /1
A N D 7 -IN 2
Note
Lenze
1000
1000
1000
−
&
A N D 7 -O U T
C 1 1 7 9 /2
A N D 7 -IN 3
C 1 1 7 9 /3
Fig. 3−19
AND operation (AND7)
Signal
Name
AND7−IN1
AND7−IN2
AND7−IN3
AND7−OUT
3−26
Type
d
d
d
d
Source
DIS
C1179/1
C1179/2
C1179/3
−
DIS format
bin
bin
bin
−
CFG
C1178/1
C1178/2
C1178/3
−
EDSVS9332S−EXT EN 2.0
List
2
2
2
−
Note
Lenze
1000
1000
1000
−
−
−
−
−
l
Function library
Function blocks
3.2.7
AND operation (AND)
Function
ANDx−IN1
0
ANDx−IN2
0
ANDx−IN3
0
ANDx−OUT
0
1
0
0
0
0
1
0
0
1
1
0
0
0
0
1
0
1
0
1
0
0
1
1
0
1
1
1
1
The function corresponds to a series connection of normally−open contacts in a contactor control.
ANDx−IN1
ANDx−IN2
ANDx−IN3
ANDx−OUT
Fig. 3−20
AND function as a series connection of normally−open contacts
Tip!
If only two inputs are required, use the inputs ANDx−IN1 and ANDx−IN2. Assign the input ANDx−IN3
to the signal source FIXED1 via the configuration code.
l
EDSVS9332S−EXT EN 2.0
3−27
Function library
Function blocks
3.2.8
3.2.8
Inverter (ANEG)
Inverter (ANEG)
Purpose
This FB inverts the sign of an analog signal.
Two inverters are available:
C0700
ANEG1-IN
( 1)
ANEG1
ANEG1-OUT
C0701
Fig. 3−21
Inverter (ANEG1)
Source
Signal
Name
ANEG1−IN
ANEG1−OUT
Note
Type
DIS
DIS format
CFG
List
Lenze
a
a
C0701
−
dec [%]
−
C0700
−
1
−
19523
−
C0703
ANEG2-IN
( 1)
−
−
ANEG2
ANEG2-OUT
C0704
Fig. 3−22
Inverter (ANEG2)
Signal
Name
ANEG2−IN
ANEG2−OUT
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
a
a
C0704
−
dec [%]
−
C0703
−
1
−
1000
−
−
−
Function
The input value is multiplied by −1 and then output again.
3−28
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.9
3.2.9
Analog output via terminal 62/63 (AOUT)
Analog output via terminal 62/63 (AOUT)
Purpose
AOUT1 and AOUT2 can be used as monitor outputs.
Internal analog signals can be output as voltage signals and be used e.g. as display values or
setpoints for slaves.
C434/1 AOUT1
C0431
C0433
AOUT1-IN
+
AOUT1-GAIN
+
62
C0434/3
C0432
AOUT1-OFFSET
C0434/2
Fig. 3−23
Analog output via terminal X6/62 (AOUT1)
Source
Signal
Name
AOUT1−IN
AOUT1−GAIN
AOUT1−OFFSET
Note
Type
DIS
DIS format
CFG
List
Lenze
a
a
a
C0434/1
C0434/3
C0434/2
dec [%]
dec [%]
dec [%]
C0431
C0433
C0432
1
1
1
5001
19510
19512
−
−
−
C439/1 AOUT2
C0436
C0438
AOUT2-IN
+
AOUT2-GAIN
+
63
C0439/3
C0437
AOUT2-OFFSET
C0439/2
Fig. 3−24
Analog output via terminal X6/63 (AOUT2)
Source
Signal
Name
AOUT2−IN
AOUT2−GAIN
AOUT2−OFFSET
Note
Type
DIS
DIS format
CFG
List
Lenze
a
a
a
C0439/1
C0439/3
C0439/2
dec [%]
dec [%]
dec [%]
C0436
C0438
C0437
1
1
1
5002
19511
19513
−
−
−
Function
l
l
The value at input AOUTx−IN is multiplied by the value at input AOUTx−GAIN.
– The formula for the multiplication is: 100% * 100% = 100%.
l
The result of the multiplication is limited to ±200%.
l
The limited value is added to the value which is applied at input AOUTx−OFFSET.
– The formula for the addition is 50% + 10% = 60%. The result of the calculation is mapped
in such a way that 100% = 10 V.
l
The result of the addition is again limited to ±200%.
l
The result of the calculation is mapped in such a way that 100% = 10 V and is output as a
signal at terminal 62 or 63.
EDSVS9332S−EXT EN 2.0
3−29
Function library
Function blocks
3.2.9
Analog output via terminal 62/63 (AOUT)
Example for an output value
AOUT1−IN = 50%, AOUT1−GAIN = 100%, AOUT1−OFFSET = 10%
Output terminal 62 = ((50% * 100% = 50%) + 10% = 60%) = 6 V
OUT
AOUT−GAIN
ÎÎÎÎÎ
AOUT−OFFSET
AOUT−IN
Fig. 3−25
3−30
Offset and gain of the analog output
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.10
3.2.10
Arithmetic block (ARIT)
Arithmetic block (ARIT)
Purpose
Arithmetic operation of two "analog" signals.
C 0 3 3 9 /1
C 0 3 3 8
A R IT 1 -IN 1
C 0 3 4 0 /1
x
C 0 3 3 9 /2
+
y
-
/
A R IT 1 -IN 2
A R IT 1
± 1 9 9 .9 9 %
A R IT 1 -O U T
*
x /(1 -y )
C 0 3 4 0 /2
9300posARIT1
Fig. 3−26
Arithmetic block (ARIT1)
Source
Signal
Name
ARIT1−IN1
ARIT1−IN2
ARIT1−OUT
Note
Type
DIS
DIS format
CFG
List
Lenze
a
a
a
C0340/1
C0340/2
−
dec [%]
dec [%]
−
C0339/1
C0339/2
−
1
1
−
1000
1000
−
C 0 6 0 1 /1
C 0 6 0 2 /1
C 0 6 0 1 /2
A R IT 2 -IN 2
A R IT 2
± 1 9 9 .9 9 %
A R IT 2 -O U T
C 0 6 0 0
A R IT 2 -IN 1
y
x
+
/
-
−
−
Limited to ±199.99 %
*
x /(1 -y )
C 0 6 0 2 /2
9300posARIT2
Fig. 3−27
Arithmetic block (ARIT2)
Source
Signal
Name
ARIT2−IN1
ARIT2−IN2
ARIT2−OUT
Note
Type
DIS
DIS format
CFG
List
Lenze
a
a
a
C0602/1
C0602/2
−
dec [%]
dec [%]
−
C0601/1
C0601/2
−
1
1
−
1000
1000
−
−
−
Limited to ±199.99 %
Function
For both arithmetic blocks the following functions can be preselected:
Code
Subcode
0
ARIT1: C0338
1
2
3
4
5
Arithmetic function
Example
OUT = IN1
Note: IN2 will not be processed
OUT = IN1 + IN2
OUT = IN1 − IN2
OUT [inc] = IN1 [inc] ´IN2 [inc] ¸16384
OUT [%] = IN1 [%] ´ IN2 [%] ¸100
OUT [inc] = IN1 [inc] ´16384¸100 ¸ ½IN2½[inc]
OUT [%] = IN1 [%] ¸ ½ IN2 ½[%]
OUT [inc] = IN1 [inc] ´16384 ¸ (16384 − IN2 [inc])
OUT [%] = IN1 [%] ´ 100 ¸ (100 − IN2 [%])
100% = 50% + 50%
50% = 100% − 50%
100% = 100% ´100% ¸(100)
1% = 100% ¸100%
200% = 100% ´ (100) ¸ (100 − 50%)
Conversion: [inc] = [%] ¸100 ´ 16384
l
EDSVS9332S−EXT EN 2.0
3−31
Function library
Function blocks
3.2.11
3.2.11
Arithmetic block (ARITPH)
Arithmetic block (ARITPH)
Purpose
The FB ARITPH calculates a angle output signal from two angle input signals.
ARITPH1
C1011/1
C1012/1
C1011/2
Mode
C1010
ARITPH1-IN1
ARITPH1-IN2
x
y
ARITPH1
±230-1
+ *
- /
ARITPH1-OUT
C1012/2
Fig. 3−28
Function block ARITPH1
Source
Signal
Name
ARITPH1−IN1
ARITPH1−IN2
ARITPH1−OUT
Note
Type
DIS
DIS format
CFG
List
ph
ph
ph
C1012/1
C1012/2
−
dec [inc]
dec [inc]
−
C1011/1
C1011/2
−
3
3
−
−
−
Function
l
Selection of the arithmetic function with the code ARITPH mode.
l
The function block limits the result (see table)
ARITPH mode
C1010 = 0
C1010 = 1
C1010 = 2
C1010 = 3
C1010 = 13
C1010 = 14
C1010 = 21
C1010 = 22
l
3−32
Arithmetic function
OUT = IN1
OUT = IN1 + IN2
OUT = IN1 − IN2
OUT = (IN1 * IN2) / 2 30
OUT = IN1 * IN2
OUT = IN1 / IN2
OUT = IN1 + IN2
OUT = IN1 − IN2
Limitation
230 −1
230 −1
230 −1
230 −1
231
30
2 −1
without
without
(remainder not considered)
(remainder not considered)
with overflow
with overflow
The calculation is performed cyclically in the control program.
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.12
3.2.12
Analog signal changeover switch (ASW)
Analog signal changeover switch (ASW)
Purpose
This FB changes between two analog signals.
This FB enables you to change e.g. during a winding process between an initial diameter and a
calculated diameter.
ASW1
C0812/1
ASW1-IN1
0
C0810/1
ASW1-IN2
1
C0810/2
C0811
ASW1-OUT
C0812/2
ASW1-SET
C0813
Fig. 3−29
Changeover switch for analog signals (ASW1)
Source
Signal
Name
ASW1−IN1
ASW1−IN2
ASW1−SET
ASW1−OUT
Note
Type
DIS
DIS format
CFG
List
Lenze
a
a
d
a
C0812/1
C0812/2
C0813
−
dec [%]
dec [%]
bin
−
C0810/1
C0810/2
C0811
−
1
1
2
−
55
1000
1000
−
ASW2
C0817/1
ASW2-IN1
0
C0815/1
ASW2-IN2
1
C0815/2
C0816
−
−
−
−
ASW2-OUT
C0817/2
ASW2-SET
C0818
Fig. 3−30
Changeover switch for analog signals (ASW2)
Source
Signal
Name
ASW2−IN2
ASW2−IN1
ASW2−SET
ASW2−OUT
Note
Type
DIS
DIS format
CFG
List
Lenze
a
a
d
a
C0817/1
C0817/2
C0818
−
dec [%]
dec [%]
bin
−
C0815/1
C0815/2
C0816
−
1
1
2
−
1000
1000
1000
−
C 1 1 6 0 /1
C 1 1 6 0 /2
C 1 1 6 1
−
−
−
−
A S W 3
C 1 1 6 2 /1
A S W 3 -IN 1
0
A S W 3 -IN 2
1
A S W 3 -O U T
C 1 1 6 2 /2
A S W 3 -S E T
C 1 1 6 3
Fig. 3−31
Changeover switch for analog signals (ASW3)
Source
Signal
Name
ASW3−IN2
ASW3−IN1
ASW3−SET
ASW3−OUT
l
Note
Type
DIS
DIS format
CFG
List
Lenze
a
a
d
a
C1162/1
C1162/2
C1163
−
dec [%]
dec [%]
bin
−
C1160/1
C1160/2
C1161
−
1
1
2
−
1000
1000
1000
−
EDSVS9332S−EXT EN 2.0
−
−
−
−
3−33
Function library
Function blocks
3.2.12
Analog signal changeover switch (ASW)
C 1 1 6 5 /1
C 1 1 6 5 /2
C 1 1 6 6
A S W 4
C 1 1 6 7 /1
A S W 4 -IN 1
0
A S W 4 -IN 2
1
A S W 4 -O U T
C 1 1 6 7 /2
A S W 4 -S E T
C 1 1 6 8
Fig. 3−32
Changeover switch for analog signals (ASW4)
Signal
Name
ASW4−IN2
ASW4−IN1
ASW4−SET
ASW4−OUT
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
a
a
d
a
C1167/1
C1167/2
C1168
−
dec [%]
dec [%]
bin
−
C1165/1
C1165/2
C1166
−
1
1
2
−
1000
1000
1000
−
−
−
−
−
Function
This FB is controlled via the binary input. Depending on the input signal, different signals are sent to
the output:
3−34
l
If a HIGH signal is applied at the binary input, the signal which is applied at the ASWx−IN2
input is sent to the output.
l
If a LOW signal is applied, the signal which is applied at the ASW−IN2 input is sent to the
output.
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.13
3.2.13
Holding brake (BRK)
Holding brake (BRK)
Danger!
Condition for using the BRK function block
Triggering the holding brake solely via the function block BRK is not permissible!
The safe triggering of the holding brake additionally requires a second switch−off path. Unsafe
triggering creates the risk of severe personal injury and danger to material assets!
Applications with active loads
When the DC−bus voltage increases (e.g. by braking processes), the torque limitation may be
activated via code C0172. The torque limitation becomes active if for instance the brake resistor is
defective or the switching threshold set on the brake chopper or the brake module is not correctly
adjusted.
Code C0172 is a pre−stage of the monitoring function OU" (overvoltage of the DC−bus voltage).
Code C0172 defines the voltage difference to OU causing a reduction in torque. In the Lenze setting,
the torque is reduced to "0" if the DC−bus voltage reaches 760 V (770V−10V):
l
OU threshold = 770V (C0173 = 0...3)
– Exception: OU threshold 800 V for C0173 = 4 (see description in code table)
l
C0172 = 10 V
l
No message is generated.
Only after the DC−bus voltage has decreased below the OU reconnection threshold, the torque is
reconnected.
With unchanged basic conditions the continuously "chopping" drive behaviour may lead to
undefined motions.
Remedy
1. Set C0172 = 0 V
2. MONIT−OU has to generate EEr−TRIP (e.g. by C0871/0 = 15011).
– By this, the standstill brake is engaged via controller inhibit (CINH) if the braking energy
cannot be dissipated.
l
EDSVS9332S−EXT EN 2.0
3−35
Function library
Function blocks
3.2.13
Holding brake (BRK)
Purpose
The FB is used to trigger a holding brake.
Possible applications:
l
Hoists
l
Traversing drives
l
Active loads
BRK1
C0196
C0450
BRK1-Nx
BRK1-QSP
C0451
0
t
C0458/1
DCTRL-IMP
MCTRL-NACT
MCTRL-NSET2
MCTRL-MACT
BRK1-SET
BRK1-OUT
BRK1-M-STORE
CTRL
C0195
BRK1-CINH
0
C0459
t
C0244
C0452
BRK1-SIGN
BRK1-M-SET
SIGN
C0458/2
Fig. 3−33
Holding brake (BRK1)
Signal
Name
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
BRK1−SET
BRK1−NX
d
a
C0459
C0458/1
bin
dec [%]
C0451
C0450
2
1
1000
1000
BRK1−SIGN
a
C0458/2
dec [%]
C0452
1
1000
BRK1−M−SET
a
)
−
Speed threshold from which the drive may
output the signal "Close brake". The signal
source for this input can be a control code,
a fixed value, or any other analog FB
output.
The input signal is processed internally as
an absolute value.
Direction of the torque with which the drive
is to set up a torque against the brake. The
signal source for this input can be a control
code, a fixed value, or any other FB output.
Feedforward control torque for releasing
the brake
100 % = value of C0057
Note!
The internal signals MCTRL−NACT, MCTRL−MACT and MCTRL−NSET2 are
processed as absolute values.
3−36
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.13
3.2.13.1
Holding brake (BRK)
Engaging the brake
Purpose
A HIGH signal at the BRK1−SET input
activates the function. The output
BRK1−QSP is simultaneously switched
to HIGH. This signal can be used to
decelerate the drive to zero speed via a
deceleration ramp.
BRK1−SET
t
BRK1−QSP
t
MCTRL−NSET2
Function
If the setpoint speed falls below the
value set at the BRK1−Nx input, the
output BRK1−OUT is set to HIGH. In
order to ensure a fail−safe design this
signal must be inverted at the output
(e.g. via C0118).
|BRK1−Nx
|
t
BRK1−OUT
C0195
t
BRK1−CINH
t
3.2.13.2
Disengaging (releasing) the brake
Purpose
A LOW signal at the BRK−SET input
immediately sets the BRK−CINH output
to LOW. At the same time the
BRK1−M−STORE output is set to HIGH.
This signal can be used to generate a
defined torque against the brake. The
drive thus takes over the torque while
the brake is released. The signal is only
reset after the time set under C0196
has elapsed.
BRK1−SET
t
BRK1−CINH
t
BRK1−QSP
t
BRK1−M−STORE
Function
As soon as the torque reaches the
value set under C0244 (holding torque),
the output BRK1−OUT is set to LOW.
When the input is reset, a timing
element is triggered. After the time set
under C0196 has elapsed the
BRK1−QSP output is reset. This signal
serves to e.g. release the setpoint
integrator after the brake release time
has elapsed.
t
MACT = C0244
MCTRL−MACT
t
BRK1−OUT
C0196
t
MCTRL−NSET2
t
Note
l
If an actual speed higher than the value at BRK1−Nx is detected before the brake release time (C0196) has elapsed, the
signals BRK1−QSP and BRK1−M−STORE are reset immediately. The drive can operate in a speed or angle−controlled
manner immediately. If the BRK1−QSP output acts on the QSP control word, then the drive is synchronised to the actual
speed and follows its setpoint.
EDSVS9332S−EXT EN 2.0
3−37
Function library
Function blocks
3.2.13
3.2.13.3
Holding brake (BRK)
Setting controller inhibit
Setting controller inhibit may for instance be required in the case of a fault (LU, OU, ...).
Function
When the controller is inhibited (CINH), the BRK1−OUT signal is set to HIGH immediately. The drive
is then braked via the mechanical brake.
If the fault is eliminated quickly, i.e. the controller inhibit (CINH) is reset before the actual speed falls
below the threshold value BRK1−Nx, the BRK1−OUT signal is set to LOW immediately. The drive is
synchronised to the actual speed and follows its setpoint.
If the value falls below the threshold, the drive starts as described under "Release brake".
BRK1−CINH
t
MCTRL−NACT
|BRK1−Nx|
t
BRK1−OUT
t
BRK1−QSP
t
BRK1−M−STORE
C0196
t
MCTRL−MACT
MCTRL−MACT = C0244
t
Fig. 3−34
3−38
Brake control with CINH
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.13
Holding brake (BRK)
BRK1−SET
C0196
t
BRK1−QSP
t
BRK1−M−STORE
t
MCTRL−MACT
MCTRL−MACT = C0244
t
BRK1−OUT
C0195
BRK1−CINH
t
t
MCTRL−NSET2
|BRK1−Nx|
t
Fig. 3−35
l
Switching cycle when braking
EDSVS9332S−EXT EN 2.0
3−39
Function library
Function blocks
3.2.14
3.2.14
System bus (CAN−IN)
System bus (CAN−IN)
A detailed description of the system bus (CAN) can be found in the "CAN Communication Manual".
3−40
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.15
3.2.15
System bus (CAN−OUT)
System bus (CAN−OUT)
A detailed description of the system bus (CAN) can be found in the "CAN Communication Manual".
l
EDSVS9332S−EXT EN 2.0
3−41
Function library
Function blocks
3.2.16
3.2.16
Comparator (CMP)
Comparator (CMP)
Purpose
These FBs serve to compare two analog signals. Three comparators are available which serve to
implement triggers.
CMP1
CMP1
C0680
C0681
C0682
C0683/1
C0683/2
CMP1-IN1
CMP1-OUT
C0684/1
CMP1-IN2
C0684/2
Fig. 3−36
Comparator (CMP1)
Source
Signal
Name
Note
Type
DIS
DIS format
CFG
List
Lenze
a
a
a
C0684/1
C0684/2
−
dec [%]
dec [%]
−
C0683/1
C0683/2
−
1
1
−
5001
19500
−
CMP1−IN1
CMP1−IN2
CMP1−OUT
−
−
−
CMP2
CMP2
C0685
C0686
C0687
C0688/1
C0688/2
CMP2-IN1
CMP2-OUT
C0689/1
CMP2-IN2
C0689/2
Fig. 3−37
Comparator (CMP2)
Source
Signal
Name
CMP2−IN1
CMP2−IN2
CMP2−OUT
3−42
Note
Type
DIS
DIS format
CFG
List
Lenze
a
a
a
C0689/1
C0689/2
−
dec [%]
dec [%]
−
C0688/1
C0688/2
−
1
1
−
1000
1000
−
EDSVS9332S−EXT EN 2.0
−
−
−
l
Function library
Function blocks
3.2.16
Comparator (CMP)
CMP3
C0690
C0691
C0692
C0693/1
C0693/2
CMP3-IN1
CMP3
CMP3-OUT
C0694/1
CMP3-IN2
C0694/2
Fig. 3−38
Comparator (CMP3)
Source
Signal
Name
CMP3−IN1
CMP3−IN2
CMP3−OUT
Note
Type
DIS
DIS format
CFG
List
Lenze
a
a
a
C0694/1
C0694/2
−
dec [%]
dec [%]
C0693/1
C0693/2
−
1
1
−
1000
1000
−
−
−
−
Function
The description uses the example of CMP1 and also applies to CMP2 and CMP3.
The function of these function blocks can be set via code C0680 (CMP1). The following comparison
operations are available:
l
l
CMP1−IN1 = CMP1−IN2
l
CMP1−IN1 > CMP1−IN2
l
CMP1−IN1 < CMP1−IN2
l
|CMP1−IN1| = |CMP1−IN2|
l
|CMP1−IN1| > |CMP1−IN2|
l
|CMP1−IN1| < |CMP1−IN2|
EDSVS9332S−EXT EN 2.0
3−43
Function library
Function blocks
3.2.16
3.2.16.1
Comparator (CMP)
Function 1: CMP1−IN1 = CMP1−IN2
This function serves to compare two signals with regard to equality. Hence, the comparison "actual
speed equals setpoint speed (nact = nset)" can be carried out.
l
Via code C0682 the window of equality can be set.
l
Via code C0681 a hysteresis can be set if the input signals are not stable and cause the output
to oscillate.
The exact function can be obtained from the line diagram.
C0681 C0682 C0682 C0681
1
0
CMP1−IN2
CMP1−IN1
CMP1−IN1
C0681
C0682
CMP1−IN2
C0682
C0681
t
CMP1−OUT
t
Fig. 3−39
3−44
Equality of signals (CMP1−IN1 = CMP1−IN2)
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.16
3.2.16.2
Comparator (CMP)
Function 2: CMP1−IN1 > CMP1−IN2
This function is used, for example, to implement the comparison "Actual speed is higher than a limit
value (nact > nx)" for a direction of rotation.
l
If the value at input CMP1−IN1 exceeds the value at input CMP1−IN2, the output CMP1−OUT
changes from LOW to HIGH.
l
Only if the signal at input CMP1−IN1 falls below the value of CMP1−IN2 − C0681 again, the
output changes from HIGH to LOW.
CMP1−IN1
CMP1−IN2
C0681
CMP1−OUT
1
C0681
t
CMP1−OUT
0
CMP1−IN2
t
CMP1−IN1
Fig. 3−40
Exceeding signal values (CMP1−IN1 > CMP1−IN2)
3.2.16.3
Function 3: CMP1−IN1 < CMP1−IN2
This function is used, for example, to implement the comparison "Actual speed is lower than a limit
value (nact <nx)" for a direction of rotation.
l
If the value at input CMP1−IN1 falls below the value at input CMP1−IN2, the output CMP1−OUT
changes from LOW to HIGH.
l
Only if the signal at input CMP1−IN1 exceeds the value of CMP1−IN2 − C0681 again, the
output changes from HIGH to LOW.
CMP1−IN1
C0681
CMP1−IN2
C0681
CMP1−OUT
t
1
CMP1−OUT
0
CMP1−IN2
CMP1−IN1
Fig. 3−41
Values falling below signal values (CMP1−IN1 CMP1−IN2)
3.2.16.4
Function 4: |CMP1−IN1| = |CMP1−IN2|
t
This function is the same as function 1. Before signal processing the absolute value of the input
signals (without sign) is generated.
This can be used to implement the comparison "nact = 0".
3.2.16.5
Function 5: |CMP1−IN1| > |CMP1−IN2|
This function is the same as function 3. Before signal processing the absolute value of input signals
(without sign) is generated.
This can be used to implement the comparison "|nact| > |nx|" irrespective of the direction of rotation.
l
EDSVS9332S−EXT EN 2.0
3−45
Function library
Function blocks
3.2.16
3.2.16.6
Comparator (CMP)
Function 6: |CMP1−IN1| < |CMP1−IN2|
This function is the same as function 2. Before signal processing the absolute value of input signals
(without sign) is generated.
This can be used to implement the comparison "|nact| < |nx|" irrespective of the direction of rotation.
3−46
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.17
3.2.17
Signal conversion (CONV)
Signal conversion (CONV)
Purpose
These function blocks can be used to standardize signals or signal types or to convert signal types
into different signal types.The conversion is very precise by providing the conversion factor as
numerator and denominator.
CONV1
C0942
CONV1-IN
C0943
Fig. 3−42
CONV1
C0940
C0941
CONV1-OUT
Function block CONV1
Source
Signal
Name
Note
Type
DIS
DIS format
CFG
List
Lenze
a
a
C0943
−
dec [%]
−
C0942
−
1
−
1000
−
CONV1−IN
CONV1−OUT
Limited to ±199.99 %
This function block is used to multiply or divide analog signals.
The conversion is done according to the formula:
CONV1–OUT + CONV1–IN @ C0940
C0941
Example:
An analog signal is to be multiplied with 1.12.
For this, enter C0940 = 112 and C0941 = 100.
CONV2
C0947
CONV2-IN
C0948
Fig. 3−43
CONV2
C0945
C0946
CONV2-OUT
Function block CONV2
Source
Signal
Name
CONV2−IN
CONV2−OUT
Note
Type
DIS
DIS format
CFG
List
Lenze
a
a
C0948
−
dec [%]
−
C0947
−
1
−
1000
−
Limited to ±199.99 %
This function block is used to multiply or divide analog signals.
The conversion is done according to the formula:
CONV2–OUT + CONV2–IN @ C0945
C0946
l
EDSVS9332S−EXT EN 2.0
3−47
Function library
Function blocks
3.2.17
Signal conversion (CONV)
CONV3
C0952
CONV3-IN
C0953
Fig. 3−44
CONV3
C0950
C0951
CONV3-OUT
Function block CONV3
Source
Signal
Name
CONV3−IN
CONV3−OUT
Note
Type
DIS
DIS format
CFG
List
Lenze
phd
a
C0953
−
dec [rpm]
−
C0952
−
4
−
1000
−
Limited to ±199.99 %
This function block is used to convert speed signals into analog signals.
The conversion is done according to the formula:
CONV3−OUT + CONV3−IN @
100 %
@ C0950
15000 rpm C0951
CONV4
C0957
CONV4-IN
C0958
Fig. 3−45
CONV4
C0955
C0956
CONV4-OUT
Function block CONV4
Signal
Name
CONV4−IN
CONV4−OUT
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
phd
a
C0958
−
dec [rpm]
−
C0957
−
4
−
1000
−
Limited to ±199.99 %
This function block is used to convert speed signals into analog signals.
The conversion is done according to the formula:
CONV4−OUT + CONV4−IN @
100 %
@ C0955
15000 rpm C0956
CONV5
C0657
CONV5-IN
C0658
Fig. 3−46
CONV5
C0655
C0656
CONV5-OUT
Function block CONV5
Signal
Name
CONV5−IN
CONV5−OUT
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
a
phd
C0658
−
dec [%]
−
C0657
−
1
−
1000
−
Limited to ±29999 rpm
This function block is used to convert analog signals into speed signals.
Conversion according to formula:
CONV5−OUT + CONV5−IN @
3−48
15000 rpm C0655
@
C0656
100 %
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.17
Signal conversion (CONV)
CONV6
C 1 1 7 2
C O N V 6 -IN
C 1 1 7 3
Fig. 3−47
C O N V 6
C 1 1 7 0
C 1 1 7 1
C O N V 6 -O U T
Function block CONV6
Source
Signal
Name
CONV6−IN
CONV6−OUT
Note
Type
DIS
DIS format
CFG
List
Lenze
a
phd
C1173
−
dec [%]
−
C1172
−
1
−
1000
−
Limited to ±29999 rpm
This function block is used to convert analog signals into speed signals.
Conversion according to formula:
CONV6−OUT + CONV6−IN @
l
15000 rpm C1170
@
C1171
100 %
EDSVS9332S−EXT EN 2.0
3−49
Function library
Function blocks
3.2.18
3.2.18
Angle conversion (CONVPHA)
Angle conversion (CONVPHA)
Purpose
l
Converts a angle signal into an analog signal
or
l
converts a angle difference signal into a speed signal.
C O N V P H A 1
C O N V P H A 1 -IN
1
C 1 0 0 1
2
C 1 0 0 2
Fig. 3−48
C 1 0 0 0
± 1 9 9 ,9 9 %
-O U T 2
-O U T
Angle conversion (CONVPHA1)
Signal
Name
CONVPHA1−IN
CONVPHA1−OUT
CONVPHA1−OUT2
Source
Note
Type
DIS
DIS format
CFG
List
ph
a
phd
C1002
−
−
dec [inc]
−
−
C1001
−
−
3
−
−
−
Limited to ±199.99 %, remainder considered
Limited to ±32767 rpm, remainder considered
Function
l
Conversion with adaptation using a divisor.
l
Conversion according to formula:
CONVPHA1−OUT[%] + CONVPHA1−IN[inc] @
100
2 14 @ 2 C1000
CONVPHA1−OUT2[rpm] + CONVPHA1−IN[inc] @
CONVPHA1−OUT2[inc] + CONVPHA1−IN[inc] @
3−50
15000
2 14 @ 2 C1000
1
2 C1000
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.19
3.2.19
Angle conversion (CONVPHPH)
Angle conversion (CONVPHPH)
Purpose
Conversion of a angle signal with dynamic fraction.
C 1 2 4 0 /1
C O N V P H P H 1 -N U M
C O N V P H P H 1
C 1 2 4 5 /1
C O N V P H P H 1 -IN
C 1 2 4 2
x
C 1 2 4 7
C 1 2 4 1
C O N V P H P H 1 _ A C T
C 1 2 4 0 /2
C O N V P H P H 1 _ D E N
y
C O N V P H P H 1 O U T
C 1 2 4 6
1
C 1 2 4 5 /2
Fig. 3−49
Angle conversion (CONVPHPH1)
Source
Signal
Name
CONVPHPH1−IN
CONVPHPH1−NUM
CONVPHPH1−DEN
CONVPHPH1−ACT
CONVPHPH1−OUT
Note
Type
DIS
DIS format
CFG
List
ph
a
a
d
ph
C1247
C1245/1
C1245/2
C1246
−
dec [inc]
dec
dec
bin
−
C1242
C1240/1
C1240/2
C1241
−
3
1
1
2
−
−
Numerator
Denominator (with absolute value generation)
−
Without limitation, remainder considered
Function
Caution!
The conversion result is not limited. The result must therefore not exceed the range of ±2147483647.
l
l
C1241 = HIGH
– The angle signal at CONVPHPH1−IN is evaluated using the factor from C1245/1 / C1245/2.
l
C1241 = LOW
– The value 0 is evaluated using the factor from C1245/1 / C1245/2.
EDSVS9332S−EXT EN 2.0
3−51
Function library
Function blocks
3.2.20
3.2.20
Speed conversion (CONVPP)
Speed conversion (CONVPP)
Purpose
Conversion of a speed signal with dynamic fraction.
C 1 2 5 1 /1
C O N V P P 1 -N U M
C O N V P P 1
C 1 2 5 4 /1
C 1 2 5 0
C O N V P P 1 -IN
x
C 1 2 5 3
C O N V P P 1 _ D E N
C 1 2 5 1 /2
y
C O N V P P 1 O U T
1
C 1 2 5 4 /2
Fig. 3−50
Speed conversion (CONVPP1)
Signal
Name
CONVPP1−IN
CONVPP1−NUM
CONVPP1−DEN
CONVPP1−OUT
Source
Note
Type
DIS
DIS format
CFG
List
phd
ph
ph
phd
C1253
C1254/1
C1254/2
−
dec [rpm]
dec [inc]
dec [inc]
−
C1250
C1251/1
C1251/2
−
4
3
3
−
−
Numerator
Denominator (with absolute value generation)
Without limitation, remainder considered
Function
Caution!
The conversion result is not limited. The result must therefore not exceed ±32767.
l
3−52
The speed signal at CONVPP1−IN is evaluated using the factor from C1251/1 / C1251/2.
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.21
3.2.21
Characteristic function (CURVE)
Characteristic function (CURVE)
Purpose
Conversion of an analog signal into a characteristic.
C h a r a c te r is tic 1
y
y 0
C 0 9 6 0
1
C 0 9 6 7
C U R V E 1 -IN
2
C 0 9 6 8
3
x
C 0
C 0
C 0
C 0
C 0
C 0
9 6
9 6
9 6
9 6
9 6
9 6
1
2
1
C h a r a c te r is tic 2
y
y 1
y 1 0 0
2
x
3
y 0
x 1
Y 0
=
Y 1
=
Y 2
=
Y 1 0 0 =
X 1
=
X 2
=
C U R V E 1
y 1 0 0
C U R V E 1 -O U T
3
C h a r a c te r is tic 3
y
4
5
y 1 0 0
y 0 y 1
6
x 1
y 2
x 2
x
CURVE1
Fig. 3−51
Characteristic function (CURVE1)
Signal
Name
CURVE1−IN
CURVE1−OUT
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
a
a
C0968
−
dec [%]
−
C0967
−
1
−
5001
−
−
−
Range of functions
Under C0960, you can select the function:
l
Characteristic with two interpolation points
l
Characteristic with three interpolation points
l
Characteristic with four interpolation points
The codes for entering the interpolation points can be obtained from the line diagrams.
Linear interpolation between the points.
For negative input values at CURVEx−IN, the settings of the interpolation points are processed
inversely (see line diagrams). If this is not desired:
l
Connect an absolute value generator (ABS) before or behind the CURVE function block
or
l
l
connect a limiter (LIM) before or behind the CURVE function block
EDSVS9332S−EXT EN 2.0
3−53
Function library
Function blocks
3.2.21
3.2.21.1
Characteristic function (CURVE)
Characteristic with two interpolation points
Set C0960 = 1.
y
CURVE1-OUT
y100
C0964
y0
C0961
-100%
100%
x
CURVE1-IN
100%
x
CURVE1-IN
-C0961
-C0964
Fig. 3−52
Line diagram of characteristic with 2 interpolation points
3.2.21.2
Characteristic with three interpolation points
Set C0960 = 2.
y
CURVE1-OUT
y100
C0964
y1
C0962
C0961
-100%
y0
-C0965
x1
C0965
-C0961
-C0962
-C0964
Fig. 3−53
3−54
Line diagram of characteristic with 3 interpolation points
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.21
3.2.21.3
Characteristic function (CURVE)
Characteristic with four interpolation points
Set C0960 = 3.
y
CURVE1-OUT
y100
C0964
y1
C0962
C0961
-100%
-C0966
-C0965
y0
C0963
x1
-C0963
-C0961
C0965
y2
x2
C0966
100%
x
CURVE1-IN
-C0962
-C0964
Fig. 3−54
l
Line diagram of characteristic with 4 interpolation points
EDSVS9332S−EXT EN 2.0
3−55
Function library
Function blocks
3.2.22
3.2.22
Dead band (DB)
Dead band (DB)
Purpose
The dead band element is used to set interfering influences around zero, e.g. interferences on analog
input voltages, to digital zero.
C 0 6 2 0
C 0 6 2 1
C 0 6 2 2
D B 1 -IN
D B 1
± 1 9 9 ,9 9 %
D B 1 -O U T
C 0 6 2 3
Fig. 3−55
Dead band element (DB1)
Source
Signal
Name
DB1−IN
DB1−OUT
Note
Type
DIS
DIS format
CFG
List
Lenze
a
a
C0623
−
dec [%]
−
C0622
−
1
−
1000
−
−
Limited to ±199.99 %
Function
l
The dead band is parameterised under C0621.
l
The gain is set under C0620.
DB1−OUT
C0620
DB1−IN
C0621
Fig. 3−56
3−56
Dead band and gain
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.23
3.2.23
Control of the drive controller (DCTRL)
Control of the drive controller (DCTRL)
Purpose
Directs the controller to certain states (e.g. trip, trip reset, quick stop or controller inhibit).
C0135
16
CAN-CTRL.B3
AIF-CTRL.B3
C135.B3
³1
CAN-CTRL.B8
AIF-CTRL.B8
C135.B8
³1
MONIT-TRIP
CAN-CTRL.B9
AIF-CTRL.B9
C135.B9
C0136/1
X5/28
DCTRL-CINH1
C0870/1
C0870/2
DCTRL
QSP
DISABLE
DCTRL-IMP
³1
C0876
C0880/1
C0880/2
C0881
DCTRL-TRIP
CINH
DCTRL-WARN
C0878/1
DCTRL-CINH2
CAN-CTRL.B10
AIF-CTRL.B10
C135.B10
DCTRL-TRIP-SET
MCTRL
DCTRL-RDY
DCTRL-CINH
DCTRL-MESS
³1
C0878/2
C0871
DCTRL-QSP
³1
C0878/3
CAN-CTRL.B11
AIF-CTRL.B11
³1
C135.B11
DCTRL-TRIP-RESET
TRIP-SET
DCTRL-FAIL
DCTRL-CW/CCW
DCTRL-NACT=0
DCTRL-STAT*1
TRIP-RESET
DCTRL-STAT*2
DCTRL-STAT*4
STAT
DCTRL-STAT*8
C0878/4
DCTRL-PAR*1
DCTRL-INIT
C0884/1
DCTRL-PAR*2
DCTRL-PARBUSY
DCTRL-PAR*1-O
C0884/2
DCTRL-PAR-LOAD
DCTRL-PAR*2-O
C0884/3
fb_dctrl
Fig. 3−57
l
Control of the drive controller (DCTRL)
EDSVS9332S−EXT EN 2.0
3−57
Function library
Function blocks
3.2.23
Control of the drive controller (DCTRL)
Signal
Name
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
DCTRL−CINH1
DCTRL−CINH2
DCTRL−TRIP−SET
DCTRL−TRIP−RESET
DCTRL−PAR*1
DCTRL−PAR*2
DCTRL−PAR−LOAD
DCTRL−QSP
DCTRL−RDY
DCTRL−CINH
DCTRL−IMP
d
d
d
d
d
d
d
d
d
d
d
C0878/1
C0878/2
C0878/3
C0878/4
C0884/1
C0884/2
C0884/3
−
−
−
−
bin
bin
bin
bin
bin
bin
bin
−
−
−
−
C0870/1
C0870/2
C0871
C0876
C0880/1
C0880/2
C0881
−
−
−
−
2
2
2
2
2
2
2
−
−
−
−
1000
1000
54
55
1000
1000
1000
−
−
−
−
HIGH = Inhibit controller
HIGH = Inhibit controller
HIGH = Fault signal EEr
LOW−HIGH signal = TRIP reset
Selecting a parameter set
Selecting a parameter set
LOW−HIGH edge = Loading a parameter set
HIGH = Drive performs quick stop
HIGH = Ready for operation
HIGH = Controller reset
HIGH = High−resistance power output
stages
DCTRL−TRIP
DCTRL−WARN
DCTRL−MESS
DCTRL−FAIL
DCTRL−CW/CCW
DCTRL−NACT=0
DCTRL−STAT*1
DCTRL−STAT*2
DCTRL−STAT*4
DCTRL−STAT*8
DCTRL−INIT
DCTRL−PARBUSY
DCTRL−PAR*1−O
DCTRL−PAR*2−0
d
d
d
d
d
d
d
d
d
d
d
d
d
d
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
HIGH = Active fault
HIGH = Active warning
HIGH = Active message
−
LOW = CW rotation, HIGH = CCW rotation
HIGH = Motor speed < C0019
General status (binary coded)
General status (binary coded)
General status (binary coded)
General status (binary coded)
−
HIGH = Parameter set changeover is active
Parameter set X is active (binary coded)
Parameter set X is active (binary coded)
−
−
Function
3.2.23.1
l
Quick stop (QSP)
l
Operation inhibited (DISABLE)
l
Controller inhibit (CINH)
l
TRIP−set
l
TRIP−RESET
l
Change of parameter set (PAR)
l
Controller state
Quick stop (QSP)
The drive is braked to standstill via the deceleration ramp C105 and generates a holding torque.
3−58
l
The function can be controlled by three inputs
– Control word CAN−CTRL bit 3 of CAN−IN1
– Control word AIF−CTRL bit 3 of AIF−IN
– Control word C0135 bit 3
l
All inputs are linked by an OR−operation.
l
C0136/1 displays the control word C0135
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.23
3.2.23.2
Control of the drive controller (DCTRL)
Operation inhibit (DISABLE)
In this state the drive cannot be started by the "Controller enable" command. The power output
stages are inhibited. All controllers are reset.
3.2.23.3
l
The function can be controlled by three inputs
– Control word CAN−CTRL bit 8 of CAN−IN1
– Control word AIF−CTRL bit 8 of AIF−IN
– Control word C0135 bit 8
l
All inputs are linked by an OR−operation.
l
C0136/1 displays the control word C0135
Controller inhibit (CINH)
The power output stages are inhibited. All controllers are reset.
l
The function can be controlled by seven inputs:
– Terminal X5/28 (LOW = controller inhibit)
– Control word CAN−CTRL bit 9 of CAN−IN1
– Control word AIF−CTRL bit 9 of AIF−IN
– Control word C0135 bit 9
– MONIT−TRIP (HIGH = in the function block MONIT a monitoring function configured to TRIP
has been triggered)
– Free input DCTRL−CINH1
– Free input DCTRL−CINH2
l
All inputs are linked by an OR−operation.
l
C0136/1 displays the control word C0135
)
Note!
If an LU message or an OU message occurs, the CINH signal will not be set.
3.2.23.4
TRIP−SET
The drive is controlled into the state under code C0581 and indicates EEr (external monitoring).
l
l
The function can be controlled by four inputs
– Control word CAN−CTRL bit 10 of CAN−IN1
– Control word AIF−CTRL bit 10 of AIF−IN
– Control word C0135 bit 10
– Free input DCTRL−TRIP−SET
l
All inputs are linked by an OR−operation.
l
C0136/1 displays the control word C0135
EDSVS9332S−EXT EN 2.0
3−59
Function library
Function blocks
3.2.23
3.2.23.5
Control of the drive controller (DCTRL)
TRIP−RESET
Resets a pending trip as soon as the cause of malfunction has been removed. If the cause is still
active, no reaction occurs.
l
The function can be controlled by four inputs
– Control word CAN−CTRL bit 11 of CAN−IN1
– Control word AIF−CTRL bit 11 of AIF−IN
– Control word C0135 bit 11
– Free input DCTRL−TRIP−RESET
l
All inputs are linked by an OR−operation.
l
The function can only be performed by a LOW−HIGH edge of the signal resulting from the OR
operation.
l
C0136/1 displays the control word C0135
)
Note!
If one of the inputs is set to HIGH, it is not possible that a LOW−HIGH edge will
occur on the resulting signal.
3−60
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.23
3.2.23.6
Control of the drive controller (DCTRL)
Parameter set changeover (PAR)
The controller loads and operates with the parameter set selected.
l
The parameter set to be loaded is selected via the inputs DCTRL−PAR*1 and DCTRL−PAR*2.
The inputs are binary coded (1 from 4).
PAR*2
PAR*1
Selected parameter set
0
0
Parameter set 1
0
1
Parameter set 2
1
0
Parameter set 3
1
1
Parameter set 4
l
A LOW−HIGH edge at the input DCTRL−PAR−LOAD enables the controller to switch to the new
parameter set.
)
Note!
If the parameter set to be loaded via the terminal X5/Ex is already selected before
switching on the supply voltage, there is no need for the LOW−HIGH edge at the
input DCTRL−PAR−LOAD. In this case, the controller loads the selected parameter
set automatically.
l
3.2.23.7
The controller is not ready for operation for approx. one second. During this period, DCTRL−
RDY displays LOW.
Controller state
The binary−coded status of the controller is output via DCTRL−STAT*x. These outputs are connected
to the STAT function block inside the device.
The status can be evaluated via the status word C0150, CAN status word and AIF status word.
STAT*8
0
0
0
0
0
1
3.2.23.8
STAT*4
0
0
0
1
1
0
STAT*2
0
0
1
1
1
0
STAT*1
0
1
1
0
1
0
Action of the controller
Initialisation after the supply voltage has been connected
Lock mode, restart protection is active C0142
Drive is in controller inhibit mode
Controller enabled
The release of a monitoring function resulted in a "message"
The release of a monitoring function resulted in a "trip"
Standstill message (DCTRL−NACT=0)
The standstill message (DCTRL−NACT=0) is set immediately if the actual speed (MCTRL−NACT) falls
below the speed threshold (without any hysteresis effect) set in C0019.
The standstill message disappears if the actual speed (MCTRL−NACT) exceeds the sum of the speed
threshold set in C0019 and the hysteresis. The hysteresis amounts to 1 % of the maximum speed
set in C0011.
)
Note!
The hysteresis ensures a stable standstill signal even if the actual speed value jitters.
l
EDSVS9332S−EXT EN 2.0
3−61
Function library
Function blocks
3.2.24
3.2.24
Master frequency input (DFIN)
Master frequency input (DFIN)
Purpose
Converting and scaling a power pulse current at the digital frequency input X9 into a speed and phase
setpoint. The digital frequency is transferred in a high−precision mode (with offset and gain errors).
X9
C0427
DFIN
DFIN-OUT
C0425
Fig. 3−58
C0426
Digital frequency input (DFIN)
Signal
Name
DFIN−OUT
Source
Note
Type
DIS
DIS format
CFG
List
phd
C0426
dec [rpm]
−
−
Function
l
The input X9 is designed for signals with TTL level.
l
In the event of digital frequency cascade or digital frequency rail, adapt the drive to the
connected encoder or controller via C0425.
l
The input of a zero track is optional.
l
Via C0427 the following input signals can be evaluated:
C0427 = 0
O
O
B
B
Z
Z
Fig. 3−59
Phase−delayed signal sequence (CW rotation)
CW rotation
CCW rotation
3−62
Track A is leading track B by 90
Track A is lagging track B by 90
(positive value at DFIN−OUT).
(negative value at DFIN−OUT).
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.24
Master frequency input (DFIN)
C0427 = 1
O
O
B
B
Z
Z
Fig. 3−60
Control of direction of rotation via track B
CW rotation
CCW rotation
Track A transmits the speed
Track B = LOW (positive value at DFIN−OUT)
Track A transmits the speed
Track B = HIGH (negative value at DFIN−OUT)
C0427 = 2
O
O
B
B
Z
Z
Fig. 3−61
Control of speed and direction of rotation via track A or track B
CW rotation
CCW rotation
Track A transmits the speed and direction of rotation (positive value at DFIN−OUT)
Track B = LOW
Track B transmits the speed and direction of rotation (negative value at DFIN−OUT)
Track A = LOW
Transfer function
DFIN−OUT[rpm] + f[Hz] @
60
Number of increments from C0425
Example:
Input frequency = 200 kHz
C0425 = 3 (¢ a number of increments of 2048 Inc/rev.)
DFIN−OUT[rpm] + 200000Hz @ 60 + 5859rpm
2048
l
EDSVS9332S−EXT EN 2.0
3−63
Function library
Function blocks
3.2.24
Master frequency input (DFIN)
Signal adaptation
Finer resolutions than the power−of−two format can be realised by connecting an FB (e.g. CONV3 or
CONV4).
Example:
The FB CONV3 converts the speed signal into a quasi−analog signal. The conversion is done
according to the formula:
CONV3−OUT[%] + f[Hz] @
X9
C0427
DFIN
DFIN-OUT
C0425
Fig. 3−62
0, 4
@ C0950
Number of increments from C0425 C0951
C0426
CONV3
C0952
CONV3-IN
C0953
C0950
C0951
CONV3-OUT
Digital frequency input (DFIN) with connected converter
(
STOP!
If C0540 = 0, 1, 2, 3 and a feedback system C0025 > 10, you must not use the
digital frequency input X9 anymore.
3−64
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.25
3.2.25
Digital frequency output (DFOUT)
Digital frequency output (DFOUT)
Purpose
Converts internal speed signals into frequency signals and outputs them to subsequent drives. The
transmission is highly precise (without offset and gain errors).
C0542
C0541
C0544
C0030
C0540
DFOUT-DF-IN
DFOUT
DFOUT-OUT
C0549
DFOUT-AN-IN
C0547
DFOUT-SYN-RDY
C0548
CTRL
C0540
X5 E5
0
C0545
C0429
X9
2
3
4
5
X8
Fig. 3−63
X10
1
Digital frequency output (DFOUT)
Signal
Name
DFOUT−DF−IN
DFOUT−AN−IN
DFOUT−SYN−RDY
DFOUT−OUT
Source
Note
Type
DIS
DIS format
CFG
List
phd
a
d
phd
C0549
C0547
C0548
−
dec [rpm]
dec [%]
bin
−
C0542
C0541
C0544
−
4
1
2
−
−
Input in [%] of nmax (C0011)
−
−
Function
l
l
Output signals on X10
l
Output of an analog signal
l
Output of a speed signal
l
Encoder simulation of the resolver with internal zero track
l
Encoder simulation of the resolver with external zero track
l
Direct output of X8
l
Direct output of X9
EDSVS9332S−EXT EN 2.0
3−65
Function library
Function blocks
3.2.25
3.2.25.1
Digital frequency output (DFOUT)
Output signals on X10
C
W
r o t a tio n
A
A
B
B
Z
Z
Fig. 3−64
Signal sequence for CW rotation (definition)
l
The output signal corresponds to the simulation of an incremental encoder:
– Track A, B and, if necessary, zero track as well as the corresponding inverted tracks are
output with tracks shifted by 90 degrees.
– The levels are TTL−compatible.
l
Positive input values (CW rotation) result in the represented signal sequence.
l
With negative input values (CCW rotation) track B is leading track A by 90° .
l
The zero track is output according to the function set in C0540
l
With C0030 the encoder constant of the encoder simulation is set.
l
The function of the digital frequency output X10 is defined via C0540.
(
Stop!
C0540 = 0 to C0540 = 3 cannot be set if the connection to the digital frequency
input DFIN X9 has been established and C0025 > 10 has been selected.
C0540
Signal at X10
0
DFOUT−AN−IN is output at X10; zero track can be input externally
1
DFOUT−DF−IN is output at X10; zero track can be input externally
2
Encoder simulation of the resolver with zero track in resolver zero position (mounted on the motor)
3
Encoder simulation of the resolver with external input of the zero track (terminal X5/E5)
4
The signal at input X9 is electrically amplified and directly output (C0030 is without function)
5
The signal at input X8 is electrically amplified and directly output (C0030 is without function)
Create zero track (Z track)
3−66
l
Condition:
– Set C0540 = 0, C0540 = 1 or C0540 = 3.
– Encoder simulation must be active.
l
Start creation:
– The creation starts immediately with the first rising or falling edge on track A or track B.
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.25
3.2.25.2
Digital frequency output (DFOUT)
Output of an analog signal
For this purpose, set code C0540 = 0. The value applied at input DFOUT−AN−IN is converted into a
frequency.
Transfer function
f[Hz] + DFOUT * AN * IN[%] @
No. of increments from C0030 C0011
@
100
60
Example:
DFOUT−AN−IN = 50 %
C0030 = 3, this corresponds to a number of increments of 2048 inc/rev.
C0011 = 3000 rpm
f[Hz] + 50% @ 2048 @ 3000 + 51200Hz
100
60
Generating a zero pulse
An artificial zero pulse can be generated for the output frequency.
1. Activate the function through a LOW ® HIGH edge at the input DFOUT−SYN−RDY.
2. A LOW ® HIGH edge at terminal X5/E5 causes the generation of the zero pulse after 360°.
After this, every 360° a zero pulse is generated according to the setting in C0030.
3. The zero pulse is automatically shifted by the value C0545.
)
Note!
This procedure must be done after every mains switching.
3.2.25.3
Output of a speed signal
l
Set C0540 = 1.
– This setting only converts the value at input DFOUT−DF−IN into a frequency.
Transfer function
f[Hz] + DFOUT−DF−IN[rpm] @
No. of increments from C0030
60
Example:
DFOUT−DF−IN = 3000 rpm
C0030 = 3, this corresponds to a number of increments of 2048 inc/rev.
f[Hz] + 3000[rpm] @ 2048 + 102400[Hz]
60
Generating a zero pulse
An artificial zero pulse can be generated for the output frequency.
1. Set input DFOUT−SYN−RDY = edge from LOW ® HIGH.
2. A LOW−HIGH edge at terminal X5/E5 causes the generation of the zero pulse after 360°. After
this, every 360° a zero pulse is generated according to the setting in C0030.
3. The zero pulse can be shifted by +360° via C0545 (65536 inc = 360°).
l
EDSVS9332S−EXT EN 2.0
3−67
Function library
Function blocks
3.2.25
3.2.25.4
Digital frequency output (DFOUT)
Encoder simulation of the resolver
Set C0540 = 2 or C0540 = 3 (depending on the desired generation of the zero track)
l
The function is used when a resolver is connected to X7.
l
The encoder constant for output X10 is set in C0030.
Generating a zero pulse in resolver zero position (C0540 = 2)
The output of the zero pulse with regard to the rotor depends on how the resolver is mounted to the
motor.
l
The zero pulse can be shifted by +360° via C0545 (65536 inc = 360°).
Generating an external zero pulse (C0540 = 3)
An artificial zero pulse can be generated for the output frequency.
l
The function is activated through a LOW−HIGH edge at the input DFOUT−SYN−RDY.
l
A LOW−HIGH edge at terminal X5/E5 causes the generation of the zero pulse after 360°.
– After this, every 360° a zero pulse is generated according to the setting in C0030.
l
The zero pulse can be shifted by +360° via C0545 (65536 inc = 360°).
)
Note!
The procedure for generating an artificial zero pulse must be repeated after every
mains switching and after every setting of C0540 = 3.
3.2.25.5
3.2.25.6
Direct output of X8 (C0540 = 5)
l
The input signal at X8 is electrically amplified and directly output.
l
The signals depend on the assignment of the input X8.
l
C0030 and C0545 have no function.
l
The zero track is only output if it is connected to X8.
Direct output of X9 (C0540 = 4)
l
The input signal at X9 is electrically amplified and directly output.
l
The signals depend on the assignment of the input X9.
l
C0030 and C0545 have no function.
l
The zero track is only output if it is connected to X9.
)
Note!
For directly outputting X8 or X9 to the digital frequency output X10 the function
block DFOUT does not need to be entered into the processing table.
3−68
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.26
3.2.26
Digital frequency ramp function generator (DFRFG)
Digital frequency ramp function generator (DFRFG)
Purpose
The drive (motor shaft) is synchronised to a digital frequency (phase selection). The drive then
performs a phase−synchronous operation with the digital frequency.
C 0 7 5 7
X 5
E 5
C 0 7 5 8
C 0 7 5 9
C 0 7 6 0
C 0 7 6 1
Fig. 3−65
0
0
C 0 7 5 3
C 0 7 5 1
C 0 4 2 9
1
C 0 7 6 6
C 0 7 5 6
C 0 7 5 5
D F R F G 1
D F R F G 1 -S Y N C
C T R L
C 0 7 5 2
D F R F G 1 -IN
D F R F G 1 -O U T
C 0 7 6 5
D F R F G 1 -Q S P
C 0 7 5 4
C 0 7 6 4 /1
D F R F G 1 -S T O P
Q
S
D F R F G 1 -F A IL
R
C 0 7 6 4 /2
D F R F G 1 -R E S E T
C 0 7 6 4 /3
FB_dfrfg1
Digital frequency ramp function generator (DFRFG1)
Signal
Designation
DFRFG1−SET
DFRFG1−IN
DFRFG1−QSP
DFRFG1−STOP
DFRFG1−RESET
DFRFG1−OUT
DFRFG1−SYNC
DFRFG1−FAIL
Source
Note
Type
DIS
DIS format
CFG
List
phd
phd
d
d
d
phd
d
d
C0769
C0765
C0764/1
C0764/2
C0764/3
−
−
−
−
dec [rpm]
bin
bin
bin
−
−
−
C0768
C0758
C0759
C0760
C0761
−
−
−
−
4
2
2
2
−
−
−
Initial speed
Speed/Phase setpoint
HIGH = quick stop
HIGH = save setpoint
HIGH = reset
Speed/Phase setpoint
HIGH = drive runs synchronously
HIGH = phase difference exceeded
Function
l
l
Profile generator
l
Quick stop
l
Ramp function generator stop
l
RESET
l
Detect phase difference
l
Start via touch probe initiator (terminal X5/E5)
l
Correction of the touch probe initiator (terminal X5/E5)
EDSVS9332S−EXT EN 2.0
3−69
Function library
Function blocks
3.2.26
3.2.26.1
Digital frequency ramp function generator (DFRFG)
Profile generator
DFRFG-OUT
C0751
C0751
C0755
DFRFG-IN
DFRFG-SYNC
C0752
t
t
Fig. 3−66
Synchronisation on DFRFG
The profile generator generates ramps which lead the setpoint phase to its target position.
l
Set acceleration and deceleration via C0751.
l
Set max. speed via C0752.
l
When the distance and speed reach their setpoints, the output switches
DFRFG1−SYNC = HIGH. At the same time the FB switches the profile generator to "inactive".
l
Set the switching point via C0755.
Stop!
Do not operate the drive with this function at the torque limitation Mmax, Imax.
Fig. 3−67
Speed−time diagram DFRFG
The number of increments at DFRFG−IN (master drive) defines the target position. The target can be
displayed as a path. The speed−time diagram shows the distance covered (angle) as the area below
the speed profile. When synchronicity is reached, master and slave have covered the same distance
(angle).
3−70
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.26
3.2.26.2
Digital frequency ramp function generator (DFRFG)
Quick stop
Removes the drive from the network and brakes it to standstill.
l
Activate with DFRFG−QSP = HIGH.
l
Set deceleration time via C0753.
l
Store the setpoint phase detected at DFRFG−IN.
l
Approach the setpoint phase via the profile generator after resetting the quick stop request.
DFRFG-OUT
C0751
C0751
DFRFG-IN
C0752
C0753
t
DFRFG-QSP
t
Fig. 3−68
Quick stop DFRFG
3.2.26.3
Ramp function generator stop
Maintains the state of the profile generator during operation.
l
Activate with DFRFG−STOP = HIGH
l
Output of the last state at DFRFG−OUT.
l
Store the setpoint phase detected at DFRFG−IN.
l
Approach the setpoint phase via the profile generator after resetting the stop request.
DFRFG-OUT
DFRFG-IN
DFRFG-STOP
C0752
t
t
Fig. 3−69
l
Ramp function generator stop
EDSVS9332S−EXT EN 2.0
3−71
Function library
Function blocks
3.2.26
3.2.26.4
Digital frequency ramp function generator (DFRFG)
RESET
DFRFG−RESET = HIGH:
3.2.26.5
l
Resets setpoint phases which are internally added.
l
Activates the profile generator.
l
HIGH−LOW edge at DFRFG−RESET: Detecting the setpoint phase.
Detect phase difference
Monitoring the phase difference between input DFRFG−IN and output DFRFG−OUT.
3−72
l
Set limit value of monitoring via C0754.
l
Activates the monitoring: DFRFG−FAIL = HIGH
l
Storing the signal until DFRFG−RESET = HIGH.
l
The profile generator can accept a phase difference of up to ±2140000000 inc (= 32000
revolutions).
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.26
3.2.26.6
Digital frequency ramp function generator (DFRFG)
Start via touch probe initiator (terminal X5/E5)
Stop!
In the default setting the terminal X5/E5 is assigned to another function.
Function
l
Set C0757 = 1.
l
The function is activated by simultaneously setting the inputs:
– DFRFG−QSP and DFRFG−RESET = HIGH.
l
Starting procedure:
– Signals at DFRFG−QSP and DFRFG−RESET = LOW.
– Otherwise touch probe signals are ignored.
l
A LOW−HIGH edge at terminal X5/E5 starts the process:
DFRFG-OUT
DFRFG-IN
Touch-Probe X5/E5
DFRFG-QSP
DFRFG-RESET
t
Fig. 3−70
l
Start via touch probe initiator (terminal X5/E5)
EDSVS9332S−EXT EN 2.0
3−73
Function library
Function blocks
3.2.26
3.2.26.7
Digital frequency ramp function generator (DFRFG)
Correction of the touch probe initiator (terminal X5/E5)
Delay times during the activation of the initiator cause a speed−dependent phase offset (e.g. during
positioning, synchronising).
In order to take this angular offset into account, the response time [ms] of the initiators as a function
of the setpoint speed DFRFG−IN is converted to a phase angle correction and is then taken into
consideration in the setpoint angle. For this, the response time [ms] has to be converted to a
correction value [Inc.] first.
l
Set correction value for the phase offset under C0429.
l
Formula for input value in C0429:
Input value C0429 = 16384 × response time [ms]
l
3.2.26.8
The response time [ms] can be gathered from the data sheet of the initiator or requested by
the manufacturer.
Offset setting
The offset can be set with code C0756. The offset refers to the digital frequency input and is scaled
to 1 revolution (¢65536 increments).
The touch probe (TP) initiates the start of the ramp function generator. The leading of the master drive
from the moment of starting or the resulting path/phase difference is taken up during the acceleration
phase.
l
Setting: positive offset values
– Causes a time shift of the TP
– This means that less time is necessary − compared to the setting with e.g. offset = 0 − to
obtain synchronism with the master drive.
Tip!
With high offsets and low input speeds the drive may reverse. To avoid this, a direction of rotation
can be selected for the output via C0766.
3−74
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.27
3.2.27
Digital frequency processing (DFSET)
Digital frequency processing (DFSET)
Purpose
Conditions the digital frequency for the controller. Selection of stretch factor, gearbox factor and
speed trimming or angular trimming.
C0525
DFSET
C0429
C0534
C0546
C0551
DFSET-0-PULSE
C0532
C0538/1
3
2
1
X5/E4
MCTRL-PHI-ACT
X5/E5
C0524
DFSET-ACK
3
2
CTRL
C0528/1
C0528/3
C0528/4
1
X9/6,7
C1255
C0531
DFSET-N-TRIM2
C0535
+
DFSET-N-TRIM
C1258
DFSET-RAT-DIV
C0537
DFSET-VP-DIV
C0536/2
+
C0522
C0521
DFSET-POUT
C0520
C0536/1
DFSET-IN
C0539
a
a
* b
b
C0033
a
a
* b
b
C0533
DFSET-NOUT
+
+
C0530
1
C0527
+
+
+
+
+
-
C0528/2
DFSET-SET
DFSET-PSET
DFSET-PSET2
C0538/3
C0526 DFSET-RESET
C0523
C0253
C0252
0
C0538/2
DFSET-A-TRIM
*
C0529
C0536/3
MCTRL-PHI-ACT
fb_dfset
Fig. 3−71
Digital frequency processing (DFSET)
Source
Signal
Name
DIS
DIS format
CFG
List
phd
a
phd
a
a
a
d
d
C0539
C0537
C1258
C0536/3
C0536/1
C0536//2
C0538/1
C0538/3
dec [rpm]
dec [%]
dec [rpm]
dec [inc]
dec
dec
bin
bin
C0520
C0524
C1255
C0523
C0521
C0522
C0525
C0527
4
1
4
1
1
1
2
2
Speed/angle setpoint
Speed trimming in [%] of C0011
Speed trimming in [rpm] of C0011
Angular trimming 100% = 16384 inc
Numerator of stretch factor 100 % = 16384 inc
Numerator of gearbox factor 100 % = 16384 inc
HIGH = Enabling of zero pulse synchronisation
· HIGH = Sets angle integrators to equal values
· LOW−HIGH edge sets DFSET−PSET = 0
· HIGH−LOW edge sets DFSET−PSET = current value
of MCTRL−PHI−SET
· DFSET−SET has a higher priority than DFSET−RESET
DFSET−RESET
d
C0538/2
bin
C0526
2
· HIGH = Sets position difference = 0
· HIGH = Sets DFSET−PSET and DFSET−PSET2 = 0
DFSET−NOUT
DFSET−POUT
DFSET−PSET
DFSET−PSET2
DFSET−ACK
a
phd
ph
ph
d
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
In [%] of nmax (C0011)
Speed/angle setpoint
Following error for angle controller
Angle setpoint 65536 inc = 1 revolution
HIGH = Synchronising is performed
DFSET−IN
DFSET−N−TRIM
DFSET−N−TRIM2
DFSET−A−TRIM
DFSET−VP−DIV
DFSET−RAT−DIV
DFSET−0−PULSE
DFSET−SET
l
Note
Type
EDSVS9332S−EXT EN 2.0
3−75
Function library
Function blocks
3.2.27
Digital frequency processing (DFSET)
Function
3.2.27.1
l
Setpoint conditioning with stretch and gearbox factor
l
Processing of correction values
l
Synchronising to zero track or touch probe (for resolver feedback touch probe only)
l
Suppressing fault signals when synchronising via touch probe
Setpoint conditioning with stretch and gearbox factor
Stretch factor
The stretch factor defines the ratio between the drive in operation and its setpoint.
The evaluation is based on the setpoint at DFSET−IN. DFSET−POUT outputs the result.
DFSET−POUT + DFSET−IN @ DFSET−VP−DIV
C0533
The stretch factor results from numerator and denominator:
l
The numerator (DFSET−VP−DIV) can be variable (provided by an analog signal source) or a
constant value (provided by a code).
l
The denominator must be set in C0533.
Gearbox factor
The gearbox factor defines the gearbox ratio of the drive. Enter the transmission ratio of the drive.
The evaluation is based on the setpoint at DFSET−IN multiplied by the stretch factor. DFSET−NOUT
outputs the result.
DFSET−NOUT + Reckfaktor @ DFSET−RAT−DIV
C0033
DFSET−NOUT + DFSET−IN @ DFSET−VP−DIV @ DFSET−RAT−DIV
C0533
C0033
The gearbox factor results from numerator and denominator.
l
The numerator ca be variable (provided by an analog signal source) or a constant value
(provided by a code).
l
The denominator must be set in C0033.
)
Note!
With code C0530 you can deactivate the use of the gearbox factor and the
DFSET−N−TRIM values as the basis for the setpoint angle integrator. When
C0530 = 1, only the stretch factor is used for the calculation of the setpoint angle.
3−76
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.27
3.2.27.2
Digital frequency processing (DFSET)
Processing of correction values
Speed trimming
This is used to add correction values, e.g. by a superimposed control loop. This enables the drive to
accelerate or decelerate.
l
Adds an analog value at DFSET−N−TRIM (see C0537) to the speed setpoint.
l
Adds a speed value at DFSET−N−TRIM2 (see C1258) to the speed setpoint.
– The speed trimming via this input is more precise.
Angular trimming
Adds a setpoint at DFSET−A−TRIM (see C0536/3) to the angle setpoint. The rotor position with
respect to the setpoint can be changed in either direction by the defined number of increments (the
drive is leading or lagging). The angle is trimmed within a range of ±32767 increments (corresponds
to ±1/2 revolution). Every analog signal can be used as a source.
l
The input is made in increments (one revolution corresponds to 65536 increments).
l
When analog values are entered, 100% correspond to 1/4 revolution = 16384 increments.
l
Extension of the setting range with a multiplier under C0529.
Angular offset
The angular offset (C0252) adds a constant angular offset to the setpoint of the drive.
Speed−proportional angle adjustment
With speed−proportional angle adjustment the angle lags or leads with rising speed.
l
l
Enter a corresponding adjustment value in increments in C0253.
l
The set angle adjustment is reached at 15000 rpm of the drive (linear relationship).
EDSVS9332S−EXT EN 2.0
3−77
Function library
Function blocks
3.2.27
3.2.27.3
Digital frequency processing (DFSET)
Synchronising to zero track or touch probe
(
Stop!
If synchronisation via terminals X5/E4 and X5/E5 (C0532 = 2) is activated, there
must not be any other signal connections to the terminals. If you have selected a
basic configuration via C0005, the terminals are subject to a basic assignment.
The synchronisation mode can be selected in C0532.
l
C0532 = 1, zero pulse
– Zero track of digital frequency input X9 and zero track by the feedback system set under
C0490 (not for resolver evaluation).
l
C0532 = 2, touch probe
– Via terminals X5/E4 (actual pulse) and X5/E5 (setpoint pulse).
l
C0532 = 3, zero pulse (setpoint) and touch probe (actual value)
– Setpoint pulses of digital frequency input X9 and actual pulses via the touch probe input at
terminal X5/E4.
)
Note!
For all three modes you can define a division factor for the actual pulses (code
C0531) and for the setpoint pulses (code C0535).
l Example: For C0531 = 10 only every tenth actual pulse is evaluated. The other 9
pulses are ignored.
l Lenze setting: C0531 = 1, C0533 = 3
Correction of the touch probe initiator (terminal X5/E5)
Delay times during the activation of the initiator cause a speed−dependent angular offset (e.g. during
positioning, synchronising). To compensate this angular offset, the response time [ms] of the
initiators is converted into an angular correction value depending on the setpoint speed and then
taken into account in the setpoint angle.
How to determine the angular correction value:
1. Use the below formula to convert the response time [ms] into a correction value [inc]:
Angular correction value in C0429 = 16384 × response time [ms]
– Please refer to the data sheet for the response time [ms] or contact the manufacturer of the
initiator.
2. Set the angular correction value for the angular offset in C0429.
3−78
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.27
Digital frequency processing (DFSET)
Synchronisation mode
For the synchronisation, different modes are available which can be set under C0534.
C0534
0
1
2
10
11
12
13
Synchronisation mode
Inactive
Continuous synchronisation with correction in the shortest
possible way
Continuous synchronisation with correction in the shortest
possible way
One−time synchronisation, an angular deviation is corrected in
the shortest possible way
One−time synchronisation, an angular deviation is corrected in
CW direction
One−time synchronisation, an angular deviation is corrected in
CCW direction
One−time synchronisation, an angular difference is determined
between setpoint pulse and actual pulse and is corrected to the
corresponding direction of rotation according to the sign
Note
Function inactive
A LOW−HIGH edge at DFSET−0−Pulse initiates continuous
synchronisation
A LOW−HIGH edge at DFSET−0−Pulse initiates a one−time
synchronisation
Code C0528/1 displays the number of increments (angular difference) between the setpoint pulse
and the actual pulse before the synchronisation.
l
EDSVS9332S−EXT EN 2.0
3−79
Function library
Function blocks
3.2.27
3.2.27.4
Digital frequency processing (DFSET)
Suppressing fault signals when synchronising via touch probe
Interference pulses which act on the actual pulse and setpoint pulse signal at the inputs X5/E4 and
X5/E5 can cause unwanted transients and faulty functions.
As of software version 6.2 it is possible to filter interference pulses via masking windows, thus
reducing interferences by up to 90%, depending on the application.
The masking windows can be set separately, for the actual pulses (X5/E4) via C0551 and for the
setpoint pulses (X5/E5) via C0546.
ƒ
C0551
X5/E4


X5/E5
Fig. 3−72
‚

ƒ
C0546
‚
„
0

„
0
‚
‚
‚
‚
‚
‚
9300STD340
Masking of interference pulses for setpoint and actual pulses
Variations of the actual / setpoint pulses
 Actual pulses at X5/E4
‚ Setpoint pulses at X5/E5
ƒ Interference pulse in the masked area is filtered out
„ Interference pulse in a non−masked area causes transients
Setting of masking window
1. Measure the number of increments between two pulses. Since the number varies depending
on the application, the variation limits must be detected and considered when setting the
masking windows.
– C0528/4 displays the number of increments between 2 actual pulses at X5/E4 (e.g. motor
increments).
– C0528/3 displays the number of increments between 2 setpoint pulses at X5/E5 (e.g. master
increments).
2. Set the size of the masking window, considering the variation limits. The higher the limits the
smaller the masking window must be set.
– In C0551 the size of the masking window between 2 actual pulses at X5/E4 can be set by
entering the corresponding number of increments.
– In C0546 the size of the masking window between 2 setpoint pulses at X5/E5 can be set by
entering the corresponding number of increments.
– Consider the division factors C0531 and C0535 when setting the masking windows.
)
Note!
l
l
3−80
The range to be masked out (masking windows C0546 and C0551) starts with the
first touch probe pulse and restarts with every new touch probe pulse.
Modifications of the masking window via C0546 or C0551 are accepted
immediately.
If very low speeds are used, the masking window in C0551 should be set to
1 increment to prevent that actual pulses are classified as interference pulses.
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.28
3.2.28
Delay elements (DIGDEL)
Delay elements (DIGDEL)
Purpose
This function is used to delay digital signals. This function can be used for the control of functions
or the generation of status information.
DIGDEL1
C0720
C0721
DIGDEL1-IN
C0723
C0724
Fig. 3−73
DIGDEL1-OUT
0
t
Delay element (DIGDEL1)
Source
Signal
Name
DIGDEL1−IN
DIGDEL1−OUT
DIS
DIS format
CFG
List
Lenze
d
d
C0724
−
bin
−
C0723
−
2
−
1000
−
DIGDEL2-IN
C0728
C0729
−
−
DIGDEL2
C0725
C0726
Fig. 3−74
Note
Type
DIGDEL2-OUT
0
t
Delay element (DIGDEL2)
Signal
Name
DIGDEL2−IN
DIGDEL−OUT
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
d
d
C0729
−
bin
−
C0728
−
2
−
1000
−
−
−
Function
You can select the following functions under C0720 (DIGDEL1) and C0725 (DIGDEL2):
l
l
On−delay
l
Off−delay
l
General delay
EDSVS9332S−EXT EN 2.0
3−81
Function library
Function blocks
3.2.28
3.2.28.1
Delay elements (DIGDEL)
On−delay
If the on−delay is set, a signal change from LOW to HIGH at the input DIGDELx−IN is passed on to
the DIGDELx−OUT output after the delay time set under C0721 or C0726 has elapsed.
DIGDEL1−IN
C0721
t
C0721
DIGDEL1−OUT
t
Fig. 3−75
On−delay (DIGDEL1)
In this function, the time element operates like a retriggerable monoflop:
3.2.28.2
l
A LOW−HIGH edge at the input DIGDELx−IN starts the time element.
l
If the delay time set under C0721 or C0726 has elapsed, the output DIGDELx−OUT is set to
HIGH.
l
The time element is reset and the output DIGDELx−OUT is set to LOW with a HIGH−LOW edge
at the input DIGDELx−IN.
Off−delay
An off−delay causes a signal change from HIGH to LOW at the input DIGDELx−IN to be passed on
to the output DIGDELx−OUT after the delay time set under C0721 or C0726 has elapsed.
DIGDEL1−IN
C0721
C0721
t
DIGDEL1−OUT
t
Fig. 3−76
3−82
Off−delay (DIGDEL1)
l
A LOW−HIGH edge at the input DIGDELx−IN causes the output DIGDELx−OUT to be set to
HIGH and the time element to be reset.
l
The time element is started with a HIGH−LOW edge at the input DIGDELx−IN.
l
After the delay time set under C0721 or C0726 has elapsed, the output DIGDELx−OUT is set to
LOW.
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.28
3.2.28.3
Delay elements (DIGDEL)
General delay
A general delay causes any signal change at the input DIGDELx−IN to be passed onto the output
DIGDELx−OUT only after the time set under C0721 or C0726 has elapsed.
DIGDEL1−IN
ÎÎÎ
C0721
DIGDEL1−TIMER
t
t
DIGDEL1−OUT
t
Fig. 3−77
l
General delay
l
The time element is started with any edge at the input DIGDELx−IN.
l
When the timer (can be set under C0721 or C0726) has reached the upper limit, the output
DIGDELx−OUT is set to the same value as the input DIGDEL1−IN.
EDSVS9332S−EXT EN 2.0
3−83
Function library
Function blocks
3.2.29
3.2.29
Freely assignable digital inputs (DIGIN)
Freely assignable digital inputs (DIGIN)
Purpose
Reading and conditioning of the signals at the terminals X5/E1 to X5/E5.
X5
28
E1
E2
E3
E4
DIGIN
DCTRL -X5/28
DIGIN-CINH
DIGIN1
C0114/1...5 DIGIN2
DIGIN3
0
DIGIN4
1
1
DIGIN5
C0443
E5
Fig. 3−78
Freely assignable digital inputs (DIGIN)
Signal
Name
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
DIGIN−CINH
d
−
dec
−
−
−
Controller inhibit acts directly on the DCTRL
control
DIGIN1
DIGIN2
DIGIN3
DIGIN4
DIGIN5
d
d
d
d
d
C0443
C0443
C0443
C0443
C0443
dec
dec
dec
dec
dec
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
Function
The terminals X5/E1 to X5/E5 are scanned every millisecond. The level for every input can be
inverted. For this, proceed as follows:
3−84
l
Select code C0114 with corresponding subcode (e.g. subcode 3 for input X5/E3)
l
Enter the desired level as a parameter:
– 0 = Level not inverted (HIGH active)
– 1 = Level inverted (LOW active)
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.30
3.2.30
Freely assignable digital outputs (DIGOUT)
Freely assignable digital outputs (DIGOUT)
Purpose
Conditioning of the digital signals and output at the terminals X5/A1 to X5/A4.
C0117/1
C0117/2
C0117/3
C0117/4
DIGOUT1
DIGOUT2
DIGOUT3
DIGOUT4
DIGOUT
C0118/1...4
0
1
1
C0444/1
C0444/2
C0444/3
C0444/4
Fig. 3−79
X5
A1
A2
A3
A4
Freely assignable digital outputs (DIGOUT)
Signal
Name
DIGOUT1
DIGOUT2
DIGOUT3
DIGOUT4
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
d
d
d
d
C0444/1
C0444/2
C0444/3
C0444/4
bin
bin
bin
bin
C0117/1
C0117/2
C0117/3
C0117/4
2
2
2
2
15000
10650
500
5003
−
−
−
−
Function
The terminals X5/A1 to X5/A4 are updated every millisecond. The level for every output can be
inverted. For this, proceed as follows:
l
l
Select code C0118 with corresponding subcode (e.g. subcode 3 for output X5/A3)
l
Enter the desired level as a parameter:
– 0 = Level not inverted (HIGH active)
– 1 = Level inverted (LOW active)
EDSVS9332S−EXT EN 2.0
3−85
Function library
Function blocks
3.2.31
3.2.31
First order derivative−action element (DT1)
First order derivative−action element (DT1)
Purpose
Derivative action on signals.
For instance, used for the acceleration processes (dv/dt).
C0653
C0652
C0650
C0651
DT1-1-IN
DT1-1
±199.99 %
DT1-1-OUT
C0654
fb_dt1−1
Fig. 3−80
First order derivative−action element (DT1−1)
Source
Signal
Name
DT1−1−IN
DT1−1−OUT
Note
Type
DIS
DIS format
CFG
List
Lenze
a
a
C0654
−
dec [%]
−
C0652
−
1
−
1000
−
−
Limited to ±199.99 %
Function
l
The gain is set under C0650.
l
The delay Tv is set under C0651.
l
The input sensitivity of the DT1−1 element can be reduced under C0653.
l
The FB only evaluates the specified most significant bits, according to the setting.
K=Td / Tv
Tv
Fig. 3−81
3−86
t
Delay time Tv of the first order derivative−action element
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.32
3.2.32
Free piece counter (FCNT)
Free piece counter (FCNT)
Purpose
Digital up/down counter
F C N T 1
C 1 1 0 0
C 1 1 0 2 /1
F C N T 1 -O U T
F C N T 1 -C L K U P
C 1 1 0 4 /1
C 1 1 0 2 /2
F C N T 1 -C L K D W N
C 1 1 0 4 /2
C 1 1 0 1 /1
C 1 1 0 2 /3
F C N T 1 -E Q U A L
C T R L
F C N T 1 -L D -V A L
C 1 1 0 3 /1
F C N T 1 -L O A D
C 1 1 0 4 /3
C 1 1 0 1 /2
F C N T 1 -C M P -V A L
C 1 1 0 3 /2
Fig. 3−82
Free piece counter (FCNT1)
Signal
Name
Source
Note
Type
DIS
DIS format
CFG
List
FCNT1−CLKUP
FCNT1−CLKDWN
FCNT1−LD−VAL
FCNT1−LOAD
d
d
a
d
C1104/1
C1104/2
C1103/1
C1104/3
bin
bin
dec
bin
C1102/1
C1102/2
C1101/1
C1102/3
2
2
1
2
FCNT1−CMP−VAL
FCNT1−OUT
FCNT1−EQUAL
a
a
d
C1103/2
−
−
dec
−
−
C1101/2
−
−
1
−
−
LOW−HIGH edge = counts up by 1
LOW−HIGH edge = counts down by 1
Starting value
· HIGH = Accept starting value
· The input has the highest priority
Comparison value
Counter limited to ±199.99 % (¢ ±32767)
HIGH = comparison value reached
Function
l
C1100 = 1
– If | counter content | ³ | FCNT1−CMP−VAL | (comparison value), FCNT1−EQUAL is set = HIGH
for 1 ms. Afterwards the counter is reset to the starting value (FCNT1−LD−VAL).
)
Note!
If the signal is to be available longer, e. g. for a query of the output via a PLC, you
can prolong the signal via the TRANS function block.
l
l
C1100 = 2
– If | counter content | ³ | FCNT1−CMP−VAL | (comparison value), the counter is stopped.
– Via FCNT1−LOAD = HIGH, the counter is reset to the starting value (FCNT1−LD−VAL).
l
C1100 = 3
– If | counter content| = | FCNT1−CMP−VAL | (comparison value), the counter is stopped.
– Via FCNT1−LOAD = HIGH, the counter is reset to the starting value (FCNT1−LD−VAL).
– FCNT1−OUT is limited to 32767 for counting upwards and to −32767 for counting
downwards.
EDSVS9332S−EXT EN 2.0
3−87
Function library
Function blocks
3.2.33
3.2.33
Free digital outputs (FDO)
Free digital outputs (FDO)
Purpose
This function block can be used to connect digital signals via C0151, the function block AIF−OUT and
function block CAN−OUT to the connected fieldbus systems.
C0116/1
C0116/2
C0116/3
C0116/4
C0116/5
C0116/6
C0116/7
C0116/8
C0116/9
C0116/10
C0116/11
C0116/12
C0116/13
C0116/14
C0116/15
C0116/16
C0116/17
C0116/18
C0116/19
C0116/20
C0116/21
C0116/22
C0116/23
C0116/24
C0116/25
C0116/26
C0116/27
C0116/28
C0116/29
C0116/30
C0116/31
C0116/32
Fig. 3−83
3−88
FDO-0
FDO-1
FDO-2
FDO-3
FDO-4
FDO-5
FDO-6
FDO-7
FDO-8
FDO-9
FDO-10
FDO-11
FDO-12
FDO-13
FDO-14
FDO-15
FDO-16
FDO-17
FDO-18
FDO-19
FDO-20
FDO-21
FDO-22
FDO-23
FDO-24
FDO-25
FDO-26
FDO-27
FDO-28
FDO-29
FDO-30
FDO-31
FDO
C0151
AIF-OUT
CAN1-OUT
CAN2-OUT
CAN3-OUT
Free digital outputs (FDO)
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.33
Free digital outputs (FDO)
Signal
Name
FDO−0
FDO−1
FDO−2
FDO−3
FDO−4
FDO−5
FDO−6
FDO−7
FDO−8
FDO−9
FDO−10
FDO−11
FDO−12
FDO−13
FDO−14
FDO−15
FDO−16
FDO−17
FDO−18
FDO−19
FDO−20
FDO−21
FDO−22
FDO−23
FDO−24
FDO−25
FDO−26
FDO−27
FDO−28
FDO−29
FDO−30
FDO−31
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
d
C0151
C0151
C0151
C0151
C0151
C0151
C0151
C0151
C0151
C0151
C0151
C0151
C0151
C0151
C0151
C0151
C0151
C0151
C0151
C0151
C0151
C0151
C0151
C0151
C0151
C0151
C0151
C0151
C0151
C0151
C0151
C0151
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
hex
C0116/1
C0116/2
C0116/3
C0116/4
C0116/5
C0116/6
C0116/7
C0116/8
C0116/9
C0116/10
C0116/11
C0116/12
C0116/13
C0116/14
C0116/15
C0116/16
C0116/17
C0116/18
C0116/19
C0116/20
C0116/21
C0116/22
C0116/23
C0116/24
C0116/25
C0116/26
C0116/27
C0116/28
C0116/29
C0116/30
C0116/31
C0116/32
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
Function
You can freely select a digital signal source for every signal input.
l
l
The corresponding bit in the data word (DWORD) is marked with FDO−x (e.g. FDO−0 for the
LSB and FDO−31 for the MSB).
l
The DWORD is transferred to code C0151 and to the function blocks AIF−OUT, CAN−OUT1,
CAN−OUT2, and CAN−OUT3.
EDSVS9332S−EXT EN 2.0
3−89
Function library
Function blocks
3.2.34
3.2.34
Freely assignable input variables (FEVAN)
Freely assignable input variables (FEVAN)
Purpose
Transfer of analog signals to any code. At the same time, the FB converts the signal into the data
format of the target code.
C 1 0 9 1
C 1 0 9 2
C 1 0 9 5
F E V A N 1 -IN
C 1 0 9 6
C 1 0 9 8
S & H
+
C T R L
C 1 0 9 0
F E V A N 1 -L O A D
C 1 0 9 7
Fig. 3−84
+
C 1 0 9 3
C 1 0 9 4
C 1 0 9 9
Signal
Source
Note
Type
DIS
DIS format
CFG
List
FEVAN1−IN
FEVAN1−LOAD
a
d
C1098
C1099/1
dec
bin
C1096
C1097/1
1
2
Input value
A LOW−HIGH edge transmits the converted signal to the
target code.
FEVAN1−BUSY
FEVAN1−FAIL
d
d
−
−
−
−
−
−
−
−
HIGH = transmitting
HIGH = transmission failed
A LOW−HIGH edge at FEFAN1−LOAD sets FEFAN1−FAIL
= LOW.
−
−
C1090
−
−
−
Display of the converted signal
C 1 5 0 1
C 1 5 0 2
C 1 5 0 5
F E V A N 2 -IN
C 1 5 0 6
C 1 5 0 8
C 1 5 0 3
C 1 5 0 4
+
+
F E V A N 2
C o d e /S u b c o d e
(C x x x x /y y y )
S & H
C T R L
C 1 5 0 0
F E V A N 2 -L O A D
C 1 5 0 7
F E V A N 2 -B U S Y
F E V A N 2 -F A IL
C 1 5 0 9
Freely assignable input variables (FEVAN2)
Signal
Name
3−90
F E V A N 1 -B U S Y
F E V A N 1 -F A IL
Freely assignable input variables (FEVAN1)
Name
Fig. 3−85
F E V A N 1
C o d e /S u b c o d e
(C x x x x /y y y )
Source
Note
Type
DIS
DIS format
CFG
List
FEVAN2−IN
FEVAN2−LOAD
a
d
C1508
C1509/1
dec
bin
C1506
C1507/1
1
2
Input value
A LOW−HIGH edge transmits the converted signal to the
target code.
FEVAN2−BUSY
FEVAN2−FAIL
d
d
−
−
−
−
−
−
−
−
HIGH = transmitting
HIGH = transmission failed
A LOW−HIGH edge at FEFAN2−LOAD sets FEFAN2−FAIL
= LOW.
−
−
C1500
−
−
−
Display of the converted signal
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.34
Freely assignable input variables (FEVAN)
Function
l
Conversion of the read data via:
– Numerator, denominator.
– Offset.
l
Selection of a target code for the read data.
Codes for the conversion of the read data and for the selection of the target code
Selection of the target code
Function block
FEVAN1
FEVAN2
Numerator
C1093
C1503
Denominator Offset
C1094
C1095
C1504
C1505
Code
C1091
C1501
Subcode
C1092
C1502
Examples
Data transmission
Correct transmission
Wrong transmission
FEVANx-FAIL
FEVANx-BUSY
FEVANx-LOAD
Fig. 3−86
Signal flow
Transmission errors may occur if
l
no target code is available,
l
no target subcode is available,
l
the data transmitted are out of the target code limits,
l
the target code is inhibited since it may only be written if the controller is inhibited. Inhibit the
controller (see code table).
Cyclic data transmission
C 1 0 9 1
C 1 0 9 2
C 1 0 9 5
C 1 0 9 6
C 0 8 4 0
Fig. 3−87
l
N O T 1 -IN
C 0 8 4 1
1
N O T 1
N O T 1 -O U T
C 1 0 9 7
F E V A N 1 -IN
C 1 0 9 8
C 1 0 9 3
C 1 0 9 4
F E V A N 1 -L O A D
C 1 0 9 9
+
+
F E V A N 1
C o d e /S u b c o d e
(C x x x x /y y y )
S & H
C 1 0 9 0
C T R L
F E V A N 1 -B U S Y
F E V A N 1 -F A IL
Example for a cyclic data transmission to a target code
EDSVS9332S−EXT EN 2.0
3−91
Function library
Function blocks
3.2.34
Freely assignable input variables (FEVAN)
Conversion
In the example, the conversion is made at FB FEVAN1.
3−92
l
The data format of the target code is important for the conversion (see attribute table).
l
Adapt the input signal to the data format of the target code:
– C1093 (numerator).
– C1094 (denominator).
l
C1094 also fixes the decimal positions of the target code:
– Set C1094 according to the existing decimal positions of the target code. The number of
decimal positions can be obtained from the code table.
– 0.0001 ¢ no decimal positions.
– 0.001 ¢ one decimal position.
– 0.01 ¢ two decimal positions.
– 0.1 ¢ three decimal positions.
– 1 ¢ four decimal positions.
l
For target codes with % scaling the formula for conversion must include a scaling factor (see
example 1).
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.34
Freely assignable input variables (FEVAN)
Example 1 (only for FIX32 format with % scaling):
C 1 0 9 1
C 1 0 9 2
C 1 0 9 5
Fig. 3−88
C 0 4 7 2 /1
C 1 0 9 6
C 0 4 7 1 .B 0
C 1 0 9 7
F E V A N 1 -IN
C 1 0 9 8
C 1 0 9 3
C 1 0 9 4
+
+
S & H
C 1 0 9 0
F E V A N 1 -L O A D
F E V A N 1
C o d e /S u b c o d e
(C x x x x /y y y )
C T R L
F E V A N 1 -B U S Y
F E V A N 1 -F A IL
C 1 0 9 9
Example of a circuit for FIX32 format with % scaling
Task:
l
C0472/1 = 1.05 %. Write this value to C0141.
Configuration:
l
Connect FEVAN1−IN (C1096) with FCODE−472/1 (19521).
l
Connect FEVAN1−LOAD (C1097/1) with FCODE−471.B0 (19521).
Parameter setting:
l
Set C1091 = 141 (¢ C0141)
l
Set C1092 = 0 (no subcode available)
l
C1093 = calculate numerator
l
Set C1094 = 0.01 (two decimal positions)
l
Set C1095 = 0 (no offset).
Calculation:
FEVAN1–IN[%] @
1 @ 16384 @ C1093 ) C1095 + C0141[%]
100
10000
C1094
Scaling factor
Scaling factor
Control:
l
Set C0471.B0 = 1 (¢ 00000001h) so that the data are transmitted to the target code.
Example for converting to C1093:
1
1.05% @ 10000 @ 100 @ C1094 @
+ C1093 + 0.6103
16384
1.05%
Setpoint in C0141
FEVAN1−IN
Display:
l
l
C0141 = 1.00 %
EDSVS9332S−EXT EN 2.0
3−93
Function library
Function blocks
3.2.34
Freely assignable input variables (FEVAN)
Example 2 (only for FIX32 format without % scaling):
Task:
l
C0473/1 = 1000. Write this value to C0011.
Configuration:
l
Connect FEVAN1−IN (C1096) with FCODE−473/1 (19551).
l
Connect FEVAN1−LOAD (C1097/1) with FCODE−471.B0 (19521).
Parameter setting:
l
Set C1091 = 11 (¢ C0011)
l
Set C1092 = 0 (no subcode available)
l
Set C1093 = 1.0
l
Set C1094 = 0.0001 (no decimal position)
l
Set C1095 = 0 (no offset).
The source code has no unit. The scaling factor is dropped.
Calculation:
FEVAN1–IN @
1 @ C1093 ) C1095 + C0011[rpm]
10000
C1094
Scaling factor
1, 0
1000 @ 1 @
) 0 + 1000rpm
0.0001
10000
Control:
l
Set C0471.B0 = 1 (¢ 00000001h) so that the data are transmitted to the target code.
Display:
l
C0011 displays the value 1000 rpm.
The other formats are calculated with the following formula:
FEVAN1–IN @ C1093 ) C1095 + x
C1094
3−94
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.35
3.2.35
Fixed setpoints (FIXSET)
Fixed setpoints (FIXSET)
Purpose
This FB serves to program up to 15 fixed setpoints which can be retrieved via digital terminals or
control codes.
The fixed setpoints can e.g. be used for:
l
different setpoint dancer positions for one dancer position control or
l
different stretching ratios (gearbox factor) for a speed ratio control with digital frequency
coupling
FIXSET1
FIXSET1-AIN
C0561
FIXSET1-IN1*1
C0562/1
C0564/1
C0562/2
FIXSET1-IN2*2
C0563
DMUX
0
C0564/2
C0562/3
FIXSET1-IN3*4
3
FIXSET1-OUT
C0560/1
C0560/2
C0560/15
0 FIXSET1...15
15
C0564/3
C0562/4
FIXSET1-IN4*8
C0564/4
Fig. 3−89
Fixed setpoint (FIXSET1)
Signal
Name
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
FIXSET1−AIN
a
C0563
dec [%]
C0561
1
1000
FIXSET1−IN1*1
FIXSET1−IN2*2
FIXSET1−IN3*4
FIXSET1−IN4*8
FIXSET1−OUT
d
d
d
d
a
C0564/1
C0564/2
C0564/3
C0564/4
−
bin
bin
bin
bin
−
C0562/1
C0562/2
C0562/3
C0562/4
−
2
2
2
2
−
1000
1000
1000
1000
−
The input is switched to the output if a LOW
level is applied to all selection inputs
FIXSET−INx.
The number of the inputs to be assigned
depends on the number of the FIXSET
setpoints required.
Function
The FB output can be used as a setpoint source (signal source) for another FB (e.g. process controller,
arithmetic block etc.). Parameter setting and handling are similar to JOG but independent of JOG (cp.
FB NSET).
l
l
Parameter setting of the fixed setpoints:
– The single fixed setpoints are parameterised via the subcodes of C0560.
l
Output of the fixed setpoint selected:
– If the binary inputs are triggered with HIGH signal, a fixed setpoint from the table is switched
to the output.
l
Value range:
– The values for the fixed setpoint can be set between −200% and +200%.
EDSVS9332S−EXT EN 2.0
3−95
Function library
Function blocks
3.2.35
3.2.35.1
Fixed setpoints (FIXSET)
Release of the FIXSET1 setpoints
Number of the fixed setpoints required
Number of inputs to be assigned
1
at least 1
1 ... 3
at least 2
4 ... 7
at least 3
8 ... 15
4
System for decoding the binary input signals:
Output signal
FIXSET1−OUT =
3−96
1st input
FIXSET1−IN1
2nd input
FIXSET1−IN2
3rd input
FIXSET1−IN3
4th input
FIXSET1−IN4
FIXSET1−Ain
0
0
0
0
C0560/1
1
0
0
0
C0560/2
0
1
0
0
C0560/3
1
1
0
0
C0560/4
0
0
1
0
C0560/5
1
0
1
0
C0560/6
0
1
1
0
C0560/7
1
1
1
0
C0560/8
0
0
0
1
C0560/9
1
0
0
1
C0560/10
0
1
0
1
C0560/11
1
1
0
1
C0560/12
0
0
1
1
C0560/13
1
0
1
1
C0560/14
0
1
1
1
C0560/15
1
1
1
1
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.36
3.2.36
Flipflop element (FLIP)
Flipflop element (FLIP)
Purpose
This FB is a D flipflop. This function is used to evaluate and save digital signal edges.
FLIP1-D
C0770
FLIP1
C0773/1
D
FLIP1-OUT
FLIP1-CLK
C0771
C0773/2
C0772
Q
CLR
FLIP1-CLR
C0773/3
Fig. 3−90
Flipflop element (FLIP1)
Signal
Name
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
FLIP1−D
FLIP1−CLK
FLIP1−CLR
d
d
d
C0773/1
C0773/2
C0773/3
bin
bin
bin
C0770
C0771
C0772
2
2
2
1000
1000
1000
FLIP1−OUT
d
−
−
−
−
−
FLIP2-D
C0775
−
FLIP2
C0778/1
D
Q
FLIP2-OUT
FLIP2-CLK
C0776
C0778/2
C0777
−
Evaluates LOW−HIGH edges only
Evaluates the input level only: input has
highest priority
CLR
FLIP2-CLR
C0778/3
Fig. 3−91
Flipflop element (FLIP2)
Signal
Name
l
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
FLIP2−D
FLIP2−CLK
FLIP2−CLR
d
d
d
C0778/1
C0778/2
C0778/3
bin
bin
bin
C0775
C0776
C0777
2
2
2
1000
1000
1000
FLIP2−OUT
d
−
−
−
−
−
EDSVS9332S−EXT EN 2.0
−
Evaluates LOW−HIGH edges only
Evaluates the input level only: input has
highest priority
−
3−97
Function library
Function blocks
3.2.36
Flipflop element (FLIP)
C1060/2
C1060/3
FLIP3
FLIP3−D
C1060/1
C1061/1
FLIP3−CLK
C1061/2
FLIP3−CLR
D
Q
FLIP3−OUT
CLR
C1061/3
FB_flip3
Fig. 3−92
Flipflop element (FLIP3)
Source
Signal
Name
Note
Type
DIS
DIS format
CFG
List
Lenze
FLIP3−D
FLIP3−CLK
FLIP3−CLR
d
d
d
C1061/1
C1061/2
C1061/3
bin
bin
bin
C1060/1
C1060/2
C1060/3
2
2
2
1000
1000
1000
FLIP3−OUT
d
−
−
−
−
−
−
Evaluates LOW−HIGH edges only
Evaluates the input level only: input has
highest priority
−
FLIP4
C1060/4 FLIP4−D
FLIP4−OUT
Q
D
C1061/4
FLIP4−CLK
C1060/5
C1061/5
FLIP4−CLR CLR
C1060/6
C1061/6
FB_flip4
Fig. 3−93
Flipflop element (FLIP4)
Source
Signal
Name
3−98
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
FLIP4−D
FLIP4−CLK
FLIP4−CLR
d
d
d
C1061/4
C1061/5
C1061/6
bin
bin
bin
C1060/4
C1060/5
C1060/6
2
2
2
1000
1000
1000
FLIP4−OUT
d
−
−
−
−
−
EDSVS9332S−EXT EN 2.0
−
Evaluates LOW−HIGH edges only
Evaluates the input level only: input has
highest priority
−
l
Function library
Function blocks
3.2.36
Flipflop element (FLIP)
Function
FLIPx−D
t
FLIPx−CLK
t
FLIPx−OUT
t
Fig. 3−94
l
Function sequence of a flipflop
l
The input FLIPx−CLR always has priority.
l
If a HIGH level is applied at the input FLIPx−CLR, the output FLIPx−OUT is set to and
maintained at a LOW level al long as this input is at a HIGH level.
l
With a LOW−HIGH edge at the input FLIPx−CLK, the level at the input FLIPx−D is switched to
the output and saved until
– another LOW−HIGH edge is applied at the input FLIPx−CLK or
– the input FLIPx−CLR is set to a HIGH level.
EDSVS9332S−EXT EN 2.0
3−99
Function library
Function blocks
3.2.37
3.2.37
Gearbox compensation (GEARCOMP)
Gearbox compensation (GEARCOMP)
Purpose
Compensates elasticities in the drive train (e.g. gearbox torsion).
Implementation of an adaptive linkage of e.g. the phase setpoint (32 bits) and the torque feedforward
control (14 bits).
G E A R C O M P -T O R Q U E
C 1 2 6 5
C 1 2 6 8
V o r z e ic h e n
+
+
G E A R C O M P
C 1 2 6 1
C 1 2 6 2
0
2
-2
G E A R C O M P -P H I-IN +
+
C 1 2 6 9
C 1 2 6 6
Fig. 3−95
2
C 1 2 6 0
1 4
1 5
-1
1 5
+ 1
G E A R C O M P -O U T
Gearbox compensation (GEARCOMP)
Source
Signal
Comment
Name
Type
DIS
DIS format
CFG
List
GEARCOMP−TORQUE
GEARCOMP−PHI−IN
GEARCOMP−OUT
a
ph
ph
C1268
C1269
−
dec [%]
dec [inc]
−
C1265
C1266
−
2
3
−
Input value
Outputs the compensated phase setpoint.
Function
l
The signal at GEARCOMP−TORQUE is broken down into the absolute value and the sign.
– The absolute value is limited to 214 (+16384) first.
l
The absolute value is converted (via C1260, C1261, C1262).
l
The result is evaluated with the sign and is added to the signal at GEARCOMP−PHI−IN.
Codes for the conversion of the absolute value:
Code
C1260
C1261
Function
Offset
Numerator
Selection
−16383
−32767
{1}
{1}
16383
32767
Comment
C1262
Denominator
1
{1}
32767
Dynamic disconnection at C1261 = 0
(GEARCOMP−PHI−IN = GEARCOMP−OUT)
3−100
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.38
3.2.38
Limiting element (LIM)
Limiting element (LIM)
Purpose
This FB is used to limit signals to adjustable value ranges.
LIM1
C0630
C0632
LIM1-IN
C0633
Fig. 3−96
LIM1-OUT
C0631
Limiting element (LIM1)
Source
Signal
Name
LIM1−IN1
LIM1−OUT
Note
Type
DIS
DIS format
CFG
List
Lenze
a
a
C0633
−
dec [%]
−
C0632
−
1
−
1000
−
−
−
Function
l
If the input signal exceeds the upper limit (C0630), the upper limit is effective.
l
If the input signal falls below the lower limit (C0631), the lower limit is effective.
Tip!
The lower limit (C0631) must be smaller than the upper limit (C0630).
l
EDSVS9332S−EXT EN 2.0
3−101
Function library
Function blocks
3.2.39
3.2.39
Internal motor control (MCTRL)
Internal motor control (MCTRL)
Purpose
This function block controls the drive machine consisting of angle controller, speed controller, and
motor control.
MCTRL
DCTRL-QSP
C0900
>
–1
MCTRL-QSP-OUT
MCTRL-QSP
C0042
C0907/3
C0893
C0892
C0899
C0902
C0901
MCTRL-HI-M-LIM
C0050
MCTRL-N/M-SWT C0906/3
MCTRL-I-SET
C0907/4
C0105
C0906/8
±100%
C0906/1
C0891
C0053
1
0
+
+
+
0
+
-
+
1
PWM
0
C0072
C0070
C0071
0
MCTRL-PHI-SET
C0086
1
-
MCTRL-PHI-LIM
MCTRL-PHI-ON
MCTRL-N2-LIM
MCTRL-M-ADD
+
C0906/5
C0907/1
C0006
C0022
C0075
C0076
C0077
C0078
C0081
C0084
C0085
C0087
C0088
C0089
C0090
C0091
C0018
MCTRL-LOAD-I2xt
C0066
C0906/6
MCTRL-UTILIZATION
CONST
MCTRL-FLD-WEAK
C0064
MCTRL-PHI-ANA
C0906/7
X7
VECT-CTRL
1
C0254
MCTRL-P-ADAPT
C0906/2
C0898
MCTRL-IMAX
C0909
C0908
C0896
C0054
MCTRL-DCVOLT
C0906/9
C0897
MCTRL-MACT
C0907/2
MCTRL-N-SET
C0895
C0056
MCTRL-IACT
MCTRL-I-LOAD
C0890
C0894
MCTRL-MMAX
MCTRL-MSET2
MCTRL-LO-M-LIM C0906/4
QSP
C0903
MCTRL-NSET2
C0497
MCTRL-PHI-ACT
Resolver
MCTRL-NACT
C0051
X8
Encoder
C0420
C0490
C0495
C0011
MCTRL-PHI-ANG
C0025
fb_mctrl
Fig. 3−97
3−102
Internal motor control (MCTRL)
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.39
Internal motor control (MCTRL)
Signal
Name
Note
DIS
DIS format
CFG
List
Lenze
MCTRL−PHI−SET
ph
C0908
dec [inc]
C0894
3
1000
Angle controller input for difference of
setpoint angle to actual angle
MCTRL−N−SET
MCTRL−M−ADD
a
a
C0906/1
C0906/2
dec [%]
dec [%]
C0890
C0891
1
1
5050
1000
Speed setpoint input
Additional torque setpoint or torque
setpoint
MCTRL−LO−MLIM
MCTRL−HI−MLIM
MCTRL−PHI−LIM
a
a
a
C0906/3
C0906/4
C0906/5
dec [%]
dec [%]
dec [%]
C0892
C0893
C0895
1
1
1
5700
19523
1006
Lower torque limitation in % of C0057
Upper torque limitation in % of C0057
Influence of angle controller in % of nmax
C0011
MCTRL−N2−LIM
MCTRL−FLDWEAK
MCTRL−I−SET
a
a
a
C0906/6
C0906/7
C0906/8
dec [%]
dec [%]
dec [%]
C0896
C0898
C0901
1
1
1
1000
1006
1006
Lower speed limit at speed limitation
Motor excitation
Input for setting the I component of the
speed controller
MCTRL−P−ADAPT
a
C0906/9
dec [%]
C0903
1
1006
Influence in % on VP of C0254, the absolute
value is processed (without sign)
MCTRL−PHI−ON
MCTRL−N/M−SWT
d
d
C0907/1
C0907/2
bin
bin
C0897
C0899
2
2
1000
1000
MCTRL−QSP
MCTRL−I−LOAD
d
d
C0907/3
C0907/4
bin
bin
C0900
C0902
2
2
10250
1000
HIGH = Activation of angle controller
LOW = active speed control
HIGH = active torque control
HIGH = drive performs QSP
HIGH = I component of the n−controller is
accepted by MCTRL−I−SET
MCTRL−QSP−OUT
MCTRL−NSET2
MCTRL−MMAX
d
a
d
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
HIGH = drive performs QSP
In % of nmax (C0011)
HIGH = speed controller operates within the
limits
MCTRL−MSET2
MCTRL−MACT
MCTRL−IACT
MCTRL−IMAX
a
a
a
d
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
In % of Mmax (C0057)
In % of Mmax (C0057)
MCTRL−IACT = 100 % = C0022
HIGH = drive operates at the current limit
C0022
MCTRL−DCVOLT
MCTRL−LOAD−I2xt
MCTRL−UTILIZATION
MCTRL−PHI−ANA
a
a
a
a
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
100 % = 1000 V
I2 × t utilisation of the motor in %
Device utilisation I × t in %
Actual angle value as analog signal
90° = 100 %
phd
a
ph
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
MCTRL−PHI−ACT
MCTRL−NACT
MCTRL−PHI−ANG
l
Source
Type
EDSVS9332S−EXT EN 2.0
In % of nmax (C0011)
65536 inc = one revolution
3−103
Function library
Function blocks
3.2.39
Internal motor control (MCTRL)
Function
3.2.39.1
l
Current controller
l
Torque limitation
l
Additional torque setpoint
l
Speed controller
l
Torque control with speed limitation
l
Speed setpoint limitation
l
Angle controller
l
Quick stop QSP
l
Field weakening
l
Switching frequency changeover
Current controller
Adapt current controller via C0075 (proportional gain) and C0076 (reset time) to the machine
connected.
)
Note!
Use C0086 to select a suitable motor from the motor selection list. In this way, the
parameters of the current controller are automatically set to the correct values.
3.2.39.2
Additional torque setpoint
The input MCTRL−M−ADD serves as torque setpoint or additional torque setpoint, depending on the
control of the input MCTRL−N/M−SWT. The additional torque setpoint can be used e.g. for friction
compensation or speed injection (dv/dt).
3−104
l
When MCTRL−N/M−SWT = LOW the speed control is active.
– MCTRL−M−ADD is added to the output of the n−controller.
– The limits defined by the torque limitations MCTRL−LO−M−LIM and MCTRL−HI−M−LIM
cannot be exceeded.
l
When MCTRL−N/M−SWT = HIGH, the torque control is active.
– MCTRL−M−ADD acts as torque setpoint
– The n−controllers have a monitoring function.
l
The torque setpoint is specified in [%] of the max. possible torque (see C0057).
– Negative values mean a torque with CCW rotation of the motor.
– Positive values mean a torque with CW rotation of the motor.
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.39
3.2.39.3
Internal motor control (MCTRL)
Torque limitation
Via the inputs MCTRL−LO−M−LIM and MCTRL−HI−M−LIM an external torque limitation can be set.
This serves to set different torques for the quadrants "driving" and "braking".
l
MCTRL−HI−M−LIM is the upper torque limit in [%] of the max. possible torque (C0057).
l
MCTRL−LO−M−LIM is the lower torque limit in [%] of the max. possible torque (C0057).
l
In case of quick stop (QSP) the torque limitation is deactivated.
(
Stop!
Only apply positive values to MCTRL−HI−M−LIM and negative values to
MCTRL−LO−M−LIM. Otherwise the speed controller may lose control and the drive
may rev up in an uncontrolled manner.
l
EDSVS9332S−EXT EN 2.0
3−105
Function library
Function blocks
3.2.39
3.2.39.4
Internal motor control (MCTRL)
Speed controller
The speed controller is designed as an ideal PID controller.
Parameter setting
If you select a motor via C0086, the parameters are preset so that only a few (if any) adaptations to
the application are necessary.
l
Parameterisation of the proportional gain Vp in C0070:
– Enter approx. 50 % of the speed setpoint
– Increase C0070 until the drive becomes unstable (observe motor noises)
– Reduce C0070 until the drive runs stable again
– Reduce C0070 to approx. 50 %
l
Parameterisation of the reset time Tn in C0071:
– Reduce C0071 until the drive becomes unstable (observe motor noises)
– Increase C0071 until the drive runs stable again
– Set C0071 to the double value
l
Parameterisation of the derivative gain Td in C0072:
– Increase C0072 during operation until an optimum behaviour is achieved.
Signal limitation
When the drive outputs the max. torque, the speed controller operates within the limits.
l
The drive cannot follow the speed setpoint.
l
This state is indicated with MCTRL−MMAX = HIGH.
Setting the integral component
To enter defined starting values for the torque the integral component of the n−controller can be set
externally (e.g. when using the brake control).
3−106
l
MCTRL−I−LOAD = HIGH
– The n−controller accepts the value at input MCTRL−I−SET as its integral component.
– The value at input MCTRL−I−SET acts as a torque setpoint for the motor control.
l
MCTRL−I−LOAD = LOW
– Function is switched off.
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.39
3.2.39.5
Internal motor control (MCTRL)
Torque control with speed limitation
This function is activated with MCTRL−N/M−SWT = HIGH. A second speed controller (auxiliary speed
controller) is connected for the speed limitation.
3.2.39.6
l
MCTRL−M−ADD acts as bipolar torque setpoint.
l
The n−controller 1 is used to create the upper speed limit.
– The upper speed limit is selected at the input MCTRL−N−SET in [%] of nmax (C0011) (pos.
sign for CW rotation).
– The upper speed limit is only to be used for CW rotation.
l
The n−controller (auxiliary speed controller) is used to form the lower speed limit
– The lower speed limit is selected at the input MCTRL−N2−LIM in [%] of nmax (C0011) (neg.
sign for CCW rotation).
– The lower speed limit is only to be used for CCW rotation.
Speed setpoint limitation
The speed setpoint is limited to ±100 % of nmax (C0011) at the MCTRL−N−SET input.
C0909 is used to set a limitation of the direction of rotation for the speed setpoint.
l
EDSVS9332S−EXT EN 2.0
3−107
Function library
Function blocks
3.2.39
3.2.39.7
Internal motor control (MCTRL)
Angle controller
The angle controller is required to achieve angular synchronism and drift−free standstill.
)
Note!
Select a configuration with digital frequency coupling in C0005 since this serves to
link all important signals automatically. On this basis the system can be optimised.
Activating the angle controller
1. Configure a signal source with C0894, which provides the angular difference between setpoint
and actual angle (see "Digital frequency configuration under C0005).
2. Select a value > 0 at the MCTRL−PHI−LIM input.
3. Trigger the input MCTRL−PHI−ON with HIGH (e.g. with FIXED1).
4. Set the gain of the angle controller > 0 in C0254 (see chapter 3.2.39.4)
– Before setting C0254, select an as high as possible P−gain for the n−controller in C0070.
– Increase C0254 during operation until the drive shows the required control response.
Influence of angle controller
The output of the angle controller is added to the speed setpoint.
l
If the actual angle is lagging, the drive is accelerated
l
If the actual angle is leading the drive is decelerated until the required angular synchronism is
achieved.
The influence of the angle controller consists of:
l
Angular difference multiplied by the P−gain C0254
l
Additional influence via analog signal at MCTRL−P−ADAPT
l
Limitation of the angle controller output to ±MCTRL−PHI−LIM
Limitation of the angle controller output
This limits the max. speed−up of the drive at high angular differences.
3−108
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.39
3.2.39.8
Internal motor control (MCTRL)
Quick stop QSP
The QSP function is used to stop the drive within an adjustable time independently of the setpoint
selection.
The QSP function is active
l
if the input MCTRL−QSP is triggered with HIGH.
l
if the controller is triggered via the control words (DCTRL).
Function:
l
If torque control has been selected, it will be deactivated. The drive is controlled by the speed
controller.
l
The speed runs with the deceleration time set under C0105 to zero speed.
l
The torque limitations MCTRL−LO−M−LIM and MCTRL−HI−M−LIM are deactivated.
l
The angle controller is activated. If the rotor position is shifted actively, the drive generates a
torque against this displacement if:
– C0254 is not zero
– The input MCTRL−PHI−LIM is triggered with a value > 0 %.
(
Stop!
If the field is weakened manually (MCTRL−FLD−WEAK < 100%), the drive is unable
to generate the max. torque.
l
EDSVS9332S−EXT EN 2.0
3−109
Function library
Function blocks
3.2.39
3.2.39.9
Internal motor control (MCTRL)
Field weakening
The field weakening range does not need to be set if the motor type has been set in C0086. In this
case all settings required are made automatically. The motor is operated in the field weakening mode
if
l
the output voltage of the controller exceeds the rated motor voltage set in C0090,
l
the controller cannot increase the output voltage with rising speed any more because of the
mains voltage / DC−bus voltage.
Manual field weakening
A manual field weakening is possible via the input MCTRL−FLD−WEAK. For reaching the maximum
excitation this input must be triggered with +100 % (e.g. FIXED100%).
(
Stop!
The available torque is reduced by the field weakening.
3.2.39.10
Switching frequency changeover
The switching frequency of the inverter can be selected:
l
8 kHz fixed, for power−optimised operation (C0018 = 1)
– maximum power output of the controller, but with audible pulse operation
l
16 kHz fixed, for noise−optimised operation (C0018 = 2)
– inaudible pulse operation of the controller, but with reduced power output (torque)
l
Automatic changeover between power−optimised and noise−optimised operation (C0018 = 0)
Automatic switching frequency changeover
The automatic switching frequency changeover can be used if the drive is to be operated in the
noise−optimised range, but the available torque is not sufficient for acceleration processes.
3−110
Condition M = f(I)
Function
M < MN16 (IN16)
Controller is operated with 16 kHz (noise−optimised)
MN16 (IN16) < M < MN8 (IN8)
Controller switches over to 8 kHz (power−optimised)
M > Mmax8 (Imax8)
Controller operates with 8 kHz in the current limitation
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.40
3.2.40
Mains failure control (MFAIL)
Mains failure control (MFAIL)
Purpose
If the supply voltage via L1, L2, L3 or +UG, −UG fails, the drive (drive network) can be decelerated
(braked) in a controlled way. Without this function, the drive (drive network) would coast.
MFAIL-ADAPT
C0973
C0974
C988/3
C0978
MFAIL
C0980 Vp
C988/2
MFAIL-CONST
C0982
MFAIL-DC-SET
C0988/7
C0970
+
MCRTLDCVOLT
+
C0981 Tn
MFAIL-N-SET
1
0
C0988/1
C0971
C0972
C0975
MFAIL-FAULT
C0989/1
MFAIL-RESET
C0989/2
MFAIL-THRESHOLD
CTRL
MFAIL-STATUS
C0988/4
C0976
MFAIL-NACT
MFAIL-I-RESET
C0988/5
C0977
MFAIL-NOUT
C0983
MFAIL-SET
C0988/6
Fig. 3−98
Mains failure control (MFAIL)
Signal
Name
l
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
MFAIL−N−SET
MFAIL−ADAPT
a
a
C0988/1
C0988/2
dec [%]
dec [%]
C0970
C0973
1
1
1000
1000
Speed setpoint in [%] of C0011
Dynamic adaptation of the proportional
gain of the UGset controller in [%] of C0980
MFAIL−KONST
a
C0988/3
dec [%]
C0974
1
1000
Proportional gain of the UGset controller in
[%] of C0980
MFAIL−THRESHOLD
MFAIL−NACT
a
a
C0988/4
C0988/5
dec [%]
dec [%]
C0975
C0976
1
1
1000
1000
Restart threshold in [%] of C0011
Comparison value for the restart threshold
in [%] of C0011
MFAIL−SET
a
C0988/6
dec [%]
C0977
1
1000
Speed start point for the deceleration in
[%] of C0011
MFAIL−DC−SET
a
C0988/7
dec [%]
C0978
1
1000
MFAIL−FAULT
MFAIL−RESET
MFAIL−N−OUT
MFAIL−STATUS
MFAIL−I−RESET
d
d
a
d
d
C0989/1
C0989/2
−
−
−
bin
bin
−
−
−
C0971
C0972
−
−
−
2
2
−
−
−
1000
1000
−
−
−
Voltage setpoint on which the DC bus
voltage is to be maintained, 100% =
1000V
HIGH = activates the mains failure control
HIGH = reset
Speed setpoint in [%] of C0011
HIGH = mains failure control active
HIGH = mains failure control active, the
drive is braking
EDSVS9332S−EXT EN 2.0
3−111
Function library
Function blocks
3.2.40
Mains failure control (MFAIL)
Range of functions
3.2.40.1
l
Mains failure detection
l
Mains failure control
l
Restart protection
l
Reset of the mains failure control
l
Dynamic adaptation of the control parameters
l
Fast mains recovery (KU)
l
Application examples
Mains failure control
A failure of the controller’s power section supply can be detected by
l
evaluating the DC−bus voltage or
l
an external system for mains failure detection (e.g. 934X module or voltage measuring relay).
It is possible to combine the two methods.
The type of the mains failure detection to be used depends on the drive system used.
DC−bus voltage evaluation
Use with single drives or multi−axis drives, which do not use external monitoring systems.
l
For this you can use a comparator (e.g. CMP2). Set the following signal combinations:
– C0688/1 = 5005 (MCTRL−DCVOLT to CMP2−IN1)
– C0688/2 = 19540 (free code C0472/20 to CMP2−IN2)
– C0971 = 10655 (CMP2−OUT to MFAIL−FAULT)
– Set function of the comparator CMP2 with C0685 = 3
Enter the function blocks CMP2 and MFAIL into free positions of the processing table in C0465.
MFAIL
C0685
C0686
C0687
C0472/20
MCTRL-DCVOLT
C0688/1
C0688/2
CMP2-IN1
C0689/1
CMP2-IN2
CMP2
C0970
3−112
1
0
C0988/1
CMP2-OUT
C0971
C0972
C0689/2
Fig. 3−99
MFAIL-N-SET
MFAIL-NOUT
MFAIL-FAULT
C0989/1
MFAIL-RESET
CTRL
C0989/2
Example of a mains failure detection with internal function blocks (section)
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.40
Mains failure control (MFAIL)
External system for mains failure detection (934x supply module)
l
A digital output of the supply module 934x is applied to the function block MFAIL via the digital
inputs DIGIN of the controller 93XX. In the example the input X5/E4 is used. For this purpose
the signal combination must be set as follows:
– C0971 = 54 (DIGIN4 to MFAIL−FAULT)
– C0871 = 1000 (remove DCTRL−TRIP−SET from terminal X5/E4)
– Select level (HIGH or LOW active) with C0114/4
Enter the function block MFAIL into a free position of the processing table in C0465.
X5
28
E1
E2
E3
E4
E5
DIGIN
DCTRL -X5/28
MFAIL
DIGIN1
C0114/1...5 DIGIN2
DIGIN3
0
DIGIN4
1
DIGIN5
C0970
MFAIL-N-SET
1
0
C0988/1
C0971
C0443
C0972
MFAIL-NOUT
MFAIL-FAULT
C0989/1
MFAIL-RESET
CTRL
C0989/2
Fig. 3−100
Example of a mains failure detection by an external monitoring system
Combination of the two methods
l
The combination of both processes is done via an OR operation with an internal function
block. In the example, OR5 is used. For this, set the following signal combinations:
– C0688/1 = 5005 (MCTRL−DCVOLT to CMP2−IN1)
– C0688/2 = 19540 (free code C0472/20 to CMP2−IN2)
– Set function of the comparator CMP2 with C0685 = 3
– C0838/1 = 10655 (CMP2−OUT to OR5−IN1)
– C0838/2 = 54 (DIGIN5 to OR5−IN2)
– C0971 = 10570 (OR5−OUT to MFAIL−FAULT)
Enter the function blocks CMP2, OR5 and MFAIL into free positions of the processing table in C0465.
X5
28
E1
E2
E3
E4
E5
DIGIN
DCTRL -X5/28
DIGIN1
C0114/1...5 DIGIN2
DIGIN3
0
DIGIN4
1
DIGIN5
MFAIL
C0443
FIXED0
C0685
C0686
C0687
C0472/20
MCTRL-DCVOLT
C0688/1
C0688/2
CMP2-IN1
CMP2
C0838/1
C0838/2
C0838/3
OR5
OR5-IN1
C0839/1
OR5-IN2
³1
C0970
MFAIL-N-SET
1
0
C0988/1
OR5-OUT
C0839/2
OR5-IN3
C0839/3
C0971
C0972
MFAIL-NOUT
MFAIL-FAULT
C0989/1
MFAIL-RESET
CTRL
C0989/2
CMP2-OUT
C0689/1
CMP2-IN2
C0689/2
Fig. 3−101
l
Example of a mains failure detected by different sources
EDSVS9332S−EXT EN 2.0
3−113
Function library
Function blocks
3.2.40
3.2.40.2
Mains failure control (MFAIL)
Mains failure control
Integration of the function block into the signal flow of the controller
As an example, the function block is integrated into the basic configuration C0005 = 1000 (speed
control).
MFAIL−ADAPT
FIXED0%
FIXED100%
C0974
C0978
C0980 Vp
C988/2
MFAIL−CONST
C988/3
C1472/19
MFAIL
C0973
−
+
MCRTL−
DCVOLT
C0982
MFAIL−DC−SET
−
+
C0988/7
C0981 Tn
NSET−NOUT
C0970
MFAIL−N−SET
CMP2−OUT
DIGIN5
C0472/18
C0971
C0972
C0975
1
MFAIL−FAULT
C0976
C0989/1
MFAIL−RESET
C0989/2
MFAIL−THRESHOLD
CTRL
MFAIL−STATUS
MFAIL−NACT
MFAIL−I−RESET
C0988/5
MCTRL−NACT
C0977
MCTRL−n−set
C0983
C0988/4
MCTRL−NACT
MFAIL−NOUT
0
C0988/1
MCTRL−i−load
MFAIL−SET
C0988/6
9300kur024
Fig. 3−102
Linkage for the base configuration C0005 = 1000
·
·
2. Start value selection (here: act. speed value)
·
3. Selection of setpoint source for DC−bus voltage (here: by ·
1. Create speed setpoint path
the freely connectable code FCODE C0472/19)
4. Selection of source which activates the mains failure
control
5. Adaptation of proportional gain and DC−bus voltage
controller
6. Achieve restart protection
C0970 = 5050 (NSET−NOUT to MFAIL−N−SET)
C0890 = 6100 (MFAIL−NOUT to MCTRL−N−SET)
C0977 = 6100 (MFAIL−NOUT to MFAIL−SET)
C0978 = 19539 (C0472/19 to MFAIL−DC−SET)
· see chapter 3.2.40.1
·
·
·
·
·
·
C0974 = 1006 (FIXED100% to MFAIL−CONST)
C0973 = 1000 (FIXED0% to MFAIL−ADAPT)
C0976 = 6100 (MFAIL−NACT to MCTRL−NACT)
C0975 = 19538 (C0472/18 to MFAIL−THRESHLD)
First enter approx. 2 % under C0472/18 (reference: nmax C0011)
C0972 = 55 (DIGIN5 to MFAIL−RESET)
7. Connect reset input (here with terminal X5/E5
TRIP−RESET)
8. Enter all function blocks used (except for codes and digital inputs DIGIN) into free positions of the processing table in C0465.
)
Note!
All settings must be saved non−volatile in a parameter set under C0003.
3−114
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.40
Mains failure control (MFAIL)
Activation
l
MFAIL−FAULT = HIGH activates the mains failure control.
l
MFAIL−FAULT = LOW triggers a timing element. After the time set under C0983 has elapsed,
the mains failure control is completed/cancelled (see description of mains recovery,
chapter 3.2.40.6).
– The drive is accelerated to the speed setpoint if the restart protection is not active.
– The drive is continued to be braked to zero speed if the restart protection is active (see
description for restart protection, chapter 3.2.40.3).
– If the restart protection is active, the drive can only be reset by a HIGH level signal at the
MFAIL−RESET input.
Function
The controller generates the operational energy required from the rotational energy of the driving
machine. The driving machine is braked via the power loss of the controller and the motor. Thus, the
speed deceleration ramp is shorter than with a non−controlled system (coasting drive).
With the activation,
l
the DC bus voltage is controlled to the value at the MFAIL−DC−SET input.
l
An internally generated speed setpoint is output at output MFAIL−N−OUT. This serves to brake
the drive (via the speed setpoint) to a speed of almost zero.
– Starting value for the controlled deceleration is the value at input MFAIL−SET. This input is
generally connected to the output MCTRL−NACT (actual speed value) or MCTRL−NSET2,
MFAIL−NOUT (speed setpoint).
– The speed deceleration ramp (and thus the brake torque) results from the moment of inertia
of the driven machine(s), the power loss, and the parameterisation.
(
Stop!
l
l
l
If a connected braking unit is activated, the drive is braked with the max. possible
torque (Imax). In this case, the parameter setting can be adapted, if required (see
description for parameter setting).
If the power stage is not supplied, the drive cannot generate a standstill torque
(important for active loads such as hoists).
EDSVS9332S−EXT EN 2.0
3−115
Function library
Function blocks
3.2.40
Mains failure control (MFAIL)
Parameter setting
The parameters to be set depend strongly on the motor used, the inertia of the driven machine and
the drive configuration (single drive, drive network, master/slave operation etc.). For this reason, this
function must be adjusted to the prevailing application case.
The following specifications refer to chapter 3.2.40.1.
Important settings prior to the initial set−up:
1. Save the previous setting in a parameter set (e.g. parameter set 4)
(
Stop!
For the internal voltage supply of the terminals (C0005 = xx1x) the terminal X6/63 is
used as a voltage source for external potentiometers. In this case, measure at the
terminals +UG, −UG.
2. Measure the DC bus voltage with an oscilloscope (channel 1)
– with a suitable voltage divider across terminals +UG, −UG. or
– by outputting the DC−bus voltage e.g. to terminal X6/62. For this purpose set C0436 = 5005
(MCTRL−DCVOLT). 1 V at terminal X6/63 = 100 V to +UG, −UG.
3. Measure the speed with an oscilloscope (channel 2)
– by outputting the speed e.g. to terminal X6/62. (Standard setting). For this purpose set
C0431 = 5001 (MCTRL−NACT). 10 V to terminal X6/62 = nmax (C0011).
4. Defining the operating threshold for the mains failure detection in C0472/20. The definition
depends on the setting in C0173.
– Set the operating threshold approx. 50 V above the LU switch−off threshold (e.g. C0173 = 0,
1; C0472/20 = 48 % ¢ 480 V).
3−116
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.40
Mains failure control (MFAIL)
FB_mfail_7
Mains voltage range
Message LU
Message OU
C0173
< 400 V
0
285 V
430 V
755 V
770 V
400 V
1
285 V
430 V
755 V
770 V
400 V ... 460 V
2
328 V
473 V
755 V
770 V
480 V without brake chopper
3
342 V
487 V
755 V
770 V
Operation with brake chopper (up to 480 V)
4
342 V
487 V
785 V
800 V
DC−bus voltage (UZK)
(
Stop!
This setpoint must be below the operating threshold of a possibly connected
braking unit. If a connected braking unit is activated, the drive will be braked with
the max. possible torque (Imax). The desired operational performance gets lost.
5. Set the setpoint on which the DC bus voltage is to be controlled:
– Set the setpoint to approx. 700 V (C0472/19 = 70 %).
l
EDSVS9332S−EXT EN 2.0
3−117
Function library
Function blocks
3.2.40
Mains failure control (MFAIL)
Commissioning
The commissioning should be carried out with motors without load.
1. The drive can be started with a LOW−HIGH edge at X5/E5.
2. Set the acceleration time Tir:
– Set speed setpoint to 100%, operate controller with maximum speed.
– Inhibit controller via terminal X5/28 (you can also use any other controller inhibit source,
CINH) and measure deceleration time until standstill.
– Set approx. 1/10 of the deceleration time in C0982.
3. Setting the retrigger time
l
In case of mains failure detection by detecting the DC bus voltage level:
– Set measured deceleration time from item 2. under C0983.
l
In case of mains failure detection via an external system (e.g. supply module 934X):
– Under C0983, set the time in which the drive is to be continued to be braked in a controlled
way for short−term mains recovery.
4. Switch off supply voltage (mains or DC bus).
The oscilloscope should display the following characteristic:
n
0
t
UG
Abschaltschwelle OU
Einschaltschwelle Bremseinheit
MFAIL-DC-SET
Ansprechschwelle
CMP2-OUT
0
Fig. 3−103
Abschaltschwelle LU
t1
t2
t
Schematic representation with activated mains failure control (ideal characteristic)
t1 Mains failure
t2 Zero speed reached
3−118
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.40
Mains failure control (MFAIL)
Fine setting
n
0
t
UG
Abschaltschwelle OU
Einschaltschwelle Bremseinheit
MFAIL-DC-SET
Ansprechschwelle
CMP2-OUT
0
Fig. 3−104
Abschaltschwelle LU
t2
t1
t3
t
Schematic with different brake torques
t = t1
t = t2
t = t3
t > t3
Mains failure
Zero speed with higher braking torque (short adjustment time)
Drive reaches the LU switch−off threshold with lower brake torque (higher adjustment time)
without reaching speed 0
Drive is no longer controlled (is braked by friction)
Repeat the following steps several times.
1. Obtaining a very low final speed before the controller reaches the undervoltage threshold LU:
– Increasing the proportional gain MFAIL Vp (C0980).
– Decreasing the integral−action time MFAIL Tn (C0981).
2. Avoid activation of the brake unit or the overvoltage threshold:
– Increasing the integral−action time MFAIL Tn (C0981) until the characteristic in Fig. 3−103 is
almost reached.
– Reduce additionally the setpoint of the DC bus voltage at the input MFAIL−DC−SET (in the
example C0472/19), if necessary.
l
EDSVS9332S−EXT EN 2.0
3−119
Function library
Function blocks
3.2.40
Mains failure control (MFAIL)
3. Increase of the deceleration time or reduction of the brake torque (see Fig. 3−104) is only
possible with restrictions:
– An increase of the acceleration time MFAIL Tir (C0982) reduces the initial brake torque and
increases the deceleration time.
– Increasing the integral−action time MFAIL Tn (C0981) decreases the braking torque and
simultaneously increases the deceleration time. If C0981 contains too high integral−action
times, the controller runs into the LU threshold before speed 0 is reached. Thus, the drive is
not controlled anymore.
4. Re−establish possibly required signal connections to the outputs of the controller (terminals
X6).
)
Note!
All settings must be saved non−volatile in a parameter set under C0003.
3.2.40.3
Restart protection
The integrated restart protection is to avoid a restart in the lower speed range, after the supply voltage
was interrupted for a short time only (mains recovery before the drive has come to standstill).
3.2.40.4
3−120
l
How to protect the drive from restart is explained in chapter 3.2.40.2.
l
Go to C0472/18 and enter the threshold in [%] of nmax (C0011) if you do not want an
automatic restart below this threshold after mains recovery.
– Speed at mains recovery < threshold in C0472/18: Drive is continued to be braked in a
controlled way. This function can only be completed by MFAIL−RESET = HIGH.
– Speed after mains recovery > threshold in C0472/18 Drive accelerates to its setpoint along
the set ramps.
l
The function is deactivated by:
– C0472/18 = 0 % or
– C0975 = 1000 (FIXED0% to MFAIL−THRESHLD)
l
Reset with MFAIL−RESET = HIGH
– is required after every mains connection
– is displayed by MFAIL−STATUS = HIGH, if MFAIL−FAULT = LOW
Reset of the mains failure control
l
The mains failure control is reset with MFAIL−RESET = HIGH (in the example with terminal
X5/E5).
l
The reset pulse is always required if:
– the restart protection is active.
– the restart protection is used and the supply (mains or DC supply) was switched on.
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.40
3.2.40.5
Mains failure control (MFAIL)
Dynamic adaptation of the control parameters
In special cases a dynamic change of the proportional gain may be sensible. For this purpose, the
function block MFAIL is provided with two inputs (MFAIL−CONST and MFAIL−ADAPT). The resulting
proportional gain arises from:
V p + C0980 @
3.2.40.6
MFAIL−CONST * |MFAIL−ADAPT|
100%
Fast mains recovery (KU)
The fast mains recovery leads to the restart of the controller if the restart protection is not activated.
Then the drive runs to its setpoint. If this is not required, the restart can be decelerated via the retrigger
time C0983 or prevented in connection with the restart protection.
A fast mains recovery occurs:
l
Due to the system, the mains recovery is indicated by the mains failure detection via the level
of the DC bus voltage (see chapter 3.2.40.1).
l
because of a "short interrupt" (KU) of the utility company (e.g. in case of thunderstorms)
l
because of faulty components in the supply cables
Set the retrigger time C0983 higher than the measured deceleration time during braking.
3.2.40.7
Application example
Drive network with pulse train coupling
(
Stop!
In drive networks which are connected via pulse trains (a master and one or more
slaves):
l the mains failure detection may only be activated for the master.
– the mains failure control must be integrated correspondingly into the signal
flow.
l All controllers must be operated via the terminals +UG, −UG in the DC−bus
connection. For this, the information in the "Dimensioning" chapter must be
observed.
)
Note!
Further information and predefined configurations can be obtained from Lenze.
l
EDSVS9332S−EXT EN 2.0
3−121
Function library
Function blocks
3.2.41
3.2.41
Motor phase failure detection (MLP)
Motor phase failure detection (MLP)
Purpose
Motor phase monitoring.
MLP1
Fig. 3−105
Motor phase failure detection (MLP1)
Code
LCD
C0597 MONIT LP1
C0599 LIMIT LP 1
Possible settings
Lenze Selection
3
0
Trip
2
Warning
3
Off
5.0
1.0
Important
{0.1}
Conf. LP1
Configuration of motor phase failure
monitoring
10.0 Current limit LP1
Current limit for motor phase failure
monitoring
Function
Detailed descriptions of monitoring systems and error messages can be found in the system manual,
document number EDSVS9332P.
The function block MLP1 must be entered in the processing table if the motor phase failure detection
is to be used.
3−122
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.42
3.2.42
Monitor outputs of monitoring system (MONIT)
Monitor outputs of monitoring system (MONIT)
Purpose
The monitoring functions output digital monitor signals.
MONIT
LU
OU
EER
..
..
..
..
P18
SD8
nErr
Fig. 3−106
FB_monit
Monitor outputs of the monitoring system (MONIT)
Function
The MONIT outputs switch to HIGH level if one of the monitoring functions responds.
The digital monitor signals respond dynamically, i.e.
l
depending on the state of the monitoring function, but
l
independently of the selected fault reaction (e.g. TRIP).
Example
MONIT−LP1 (motor phase monitoring) responds if a cable disruption is detected in a motor
connection phase, although the fault reaction of LP1 is set to "Off" (C0597 = 3).
)
Note!
l
l
l
With appropriate signal conditioning, the MONIT outputs can be used to locate
the cause of malfunction (e.g. by storing the MONIT output signal via the FLIP
function block).
More detailed descriptions of the monitoring functions / error messages can be
found in the chapter "Troubleshooting and fault elimination".
EDSVS9332S−EXT EN 2.0
3−123
Function library
Function blocks
3.2.42
Monitor outputs of monitoring system (MONIT)
MONIT outputs
MONIT output
CE0
CE1
CE2
CE3
CE4
EEr
H05
H07
H10
H11
LP1
LU
nErr
NMAX
OC2
OC5
OC6
OC8
OH
OH3
OH4
OH7
OH8
OU
P03
P16
P19
PL
Sd2
Sd3
Sd5
Sd6
Sd7
Sd8
3−124
Description
Communication error − automation interface (AIF)
Communication error − process data input object CAN1_IN
Communication error − process data input object CAN2_IN
Communication error − process data input object CAN3_IN
BUS−OFF state of system bus (CAN)
External monitoring, triggered via DCTRL
Internal fault (memory)
Internal fault (power section)
Thermal sensor error − heatsink
Thermal sensor error − inside the device
Motor phase failure
Undervoltage in the DC bus
Speed control error
Maximum speed (C0596) exceeded
Earth fault − motor cable
I x t overload
I2 x t overload
I2 x t overload advance warning
Heatsink temperature > +90 °C
Motor temperature > +150 °C threshold
(temperature detected via resolver or incremental value encoder)
Heatsink temperature > C0122
Motor temperature > C0121
(temperature detected via resolver or incremental value encoder)
Motor temperature measured via inputs T1 and T2 too high
DC−bus overvoltage
Following error
Faulty transmission of sync telegram on system bus (CAN)
Limitation of input values at X9
Error during rotor position adjustment
Resolver error at X7
Encoder error at X9
Encoder error at X6 pins 1 and 2
Thermal sensor error − motor (X7 or X8)
Absolute value encoder at X8
Initialisation error or communication error during rotor position adjustment
Sin/cos encoder at X8 transmits no or inconsistent data
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.43
3.2.43
Motor potentiometer (MPOT)
Motor potentiometer (MPOT)
Purpose
The FB replaces a hardware motor potentiometer.
The motor potentiometer is used as an alternative setpoint source, which is controlled via two
terminals.
C0267/1
C0268
C0267/2
MPOT1-UP
C0269/1
MPOT1-INACT
C0269/3
MPOT1-DOWN
C0265
C0264
C0260
C0262
MPOT
CRTL
MPOT1
MPOT1-OUT
C0263
C0261
C0269/2
Fig. 3−107
Motor potentiometer (MPOT1)
Source
Signal
Name
MPOT1−UP
MPOT1−INACT
MPOT1−DOWN
MPOT1−OUT
Note
Type
DIS
DIS format
CFG
List
Lenze
d
d
d
a
C0269/1
C0269/3
C0269/2
−
bin
bin
bin
−
C0267/1
C0268
C0267/2
−
2
2
2
−
1000
1000
1000
−
−
−
−
Function
Control of the motor potentiometer:
l
l
MPOT1−UP = HIGH
– The motor potentiometer approaches its upper limit value.
l
MPOT1−DOWN = HIGH
– The motor potentiometer approaches its lower limit value.
l
MPOT1−UP = LOW and MPOT1−DOWN = LOW or
MPOT1−UP = HIGH and MPOT1−DOWN = HIGH:
– The motor potentiometer does not change the output signal.
EDSVS9332S−EXT EN 2.0
3−125
Function library
Function blocks
3.2.43
Motor potentiometer (MPOT)
C0260
Tir
Tir
+
Tif
MPOT1−OUT
−
0
Tir
C0261
MPOT1−UP
MPOT1−DOWN
Fig. 3−108
Control signals of the motor potentiometer
In addition to the digital signals MPOT1−UP and MPOT1−DOWN another digital input exists
(MPOT1−INACT). The input MPOT1−INACT is used to activate or deactivate the motor potentiometer
function. Logic 1 at this input deactivates the motor potentiometer function. The input
MPOT1−INACT has priority over the inputs MPOT1−UP and MPOT1−DOWN.
When the motor potentiometer is deactivated, the motor potentiometer output (MPOT1−OUT)
follows the function set under C0264. The following functions can be set under C0264:
3−126
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.43
Motor potentiometer (MPOT)
C0264 =
Meaning
0
No further action; the output MPOT1−OUT keeps its value
1
The motor potentiometer returns to 0 % with the corresponding deceleration time
2
The motor potentiometer approaches the lower limit value with the corresponding deceleration time (C0261)
3
The motor potentiometer immediately changes its output to 0%. (Important for EMERGENCY−OFF function)
4
The motor potentiometer immediately changes its output to the lower limit value (C0261)
5
The motor potentiometer approaches the upper limit value with the corresponding acceleration time (C0260)
If the motor potentiometer is activated (input MPOT1−INACT = 0), the subsequent function depends
on
l
the current output signal,
l
the set limit values of the MPOT,
l
the control signals UP and DOWN.
If the output value is out of the set limits, the MPOT approaches the next limit with the set Ti times.
This function is independent of the control inputs MPOT1−UP and MPOT1−DOWN
If the output value is within the set limits, the output follows the selected control function UP, DOWN
or no action.
C0260
Tif
Tir
MPOT1−OUT
Tif
C0261
Tif
Tir
0
MPOT1−UP
MPOT1−DOWN
MPOT1−INACT
Fig. 3−109
Deactivation of the motor potentiometer via the input MPOT1−INACT
Initialisation
This function is used to store the output value of the MPOT non−volatilely in the internal memory of
the device, when the mains is switched off. The value is saved automatically if this function was
selected via the code. When the mains is switched on, the value is reloaded into the MPOT.
C0265 can be used to activate other initialisation functions (see code table).
When the initialisation is completed, the MPOT follows the applied control function.
l
EDSVS9332S−EXT EN 2.0
3−127
Function library
Function blocks
3.2.44
3.2.44
Logic NOT
Logic NOT
Purpose
Logic inversion of digital signals. The inversion can be used to control functions or generate status
information.
C0840
NOT1-IN
NOT1
1
NOT1-OUT
C0841
Fig. 3−110
Logic NOT (NOT1)
Signal
Name
NOT1−IN
NOT1−OUT
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
d
d
C0841
−
bin
−
C0840
−
2
−
1000
−
C0842
NOT2-IN
−
−
NOT2
1
NOT2-OUT
C0843
Fig. 3−111
Logic NOT (NOT2)
Signal
Name
NOT2−IN
NOT2−OUT
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
d
d
C0843
−
bin
−
C0842
−
2
−
1000
−
C0844
NOT3-IN
−
−
NOT3
1
NOT3-OUT
C0845
Fig. 3−112
Logic NOT (NOT3)
Source
Signal
Name
NOT3−IN
NOT3−OUT
3−128
Note
Type
DIS
DIS format
CFG
List
Lenze
d
d
C0845
−
bin
−
C0844
−
2
−
1000
−
EDSVS9332S−EXT EN 2.0
−
−
l
Function library
Function blocks
3.2.44
Logic NOT
C0846
NOT4-IN
NOT4
1
NOT4-OUT
C0847
Fig. 3−113
Logic NOT (NOT4)
Signal
Name
NOT4−IN
NOT4−OUT
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
d
d
C0847
−
bin
−
C0846
−
2
−
1000
−
C0848
NOT5-IN
−
−
NOT5
1
NOT5-OUT
C0849
Fig. 3−114
Logic NOT (NOT5)
Source
Signal
Name
NOT5−IN
NOT5−OUT
Note
Type
DIS
DIS format
CFG
List
Lenze
d
d
C0849
−
bin
−
C0848
−
2
−
1000
−
−
−
Function
NOTx−IN1
NOTx−OUT
0
1
1
0
The function corresponds to a change from an NO contact to an NC contact in a contactor control.
NOTx−IN
NOTx−OUT
Fig. 3−115
l
Function of NOT when changing an NO contact to an NC contact.
EDSVS9332S−EXT EN 2.0
3−129
Function library
Function blocks
3.2.45
3.2.45
Speed setpoint conditioning (NSET)
Speed setpoint conditioning (NSET)
Purpose
This FB conditions
l
the main speed setpoint and
l
an additional setpoint (or other signals as well)
for the following control structure via ramp function generator or fixed speeds.
C 0 7 8 4
C 0 7 9 0
C 0 7 8 9
C 0 7 8 1
C 0 7 8 0
N S E T -C IN H -V A L
N S E T
C 0 7 9 8 /1
N S E T -R F G -S T O P
C 0 7 9 9 /1 3
N S E T -R F G -0
C 0 7 9 9 /1 2
N S E T -N -IN V
C 0
C 0
C 0
C 0
7 8
7 8
7 8
7 8
7 /1
7 /2
7 /3
7 /4
C 0
C 0
C 0
C 0
7 8
7 8
7 8
7 8
8 /1
8 /2
8 /3
8 /4
N S
N S
N S
N S
C 0 7 8 5
C 0 7 8 6
C 0 7 8 3
C 0 7 8 2
E T
E T
E T
E T
E T
E T
E T
E T
-J
-J
-J
-J
-T
-T
-T
-T
O G
O G
O G
O G
I*
I*
I*
I*
*1
*2
*4
*8
D M U X
3
D M U X
1
0
2
4
8
3
C 0 0 1 2
C 0 0 1 3
C 0 1 0 1 /1
C 0 1 0 1 /2
C 0 1 0 3 /1
C 0 1 0 3 /2
C 0 1 0 1 /1 5
C 0 1 0 3 /1 5
3−130
C 0 1 3 4
+
/
-
x /(1
*
-y
± 1 9 9 ,9 9 %
N S E T -N O U T
)
C 0 2 4 1
N S E T -R F G -I= 0
T I 0 ...1 5
0
1 5
C 0 1 3 0
N S E T -S E T
N S E T -L O A D
N S E T -N A D D -IN V
N S E T -N A D D
C 0 7 9 8 /2
C 0 2 2 0 /
C 0 2 2 1
C 0 7 9 9 /3
C 0 7 9 9 /2
C 0 0 4 9
Fig. 3−116
y
C 0 0 4 5
J O G 1 ...1 5
0
1 5
x
1
*-1
C 0 0 3 9 /1 5
0
C 0 1 9 0
C 0 1 8 2
0
C 0 0 3 9 /1
C 0 0 3 9 /2
C 0 0 4 6
N S
N S
N S
N S
C IN H
C 0 7 9 9 /1
N S E T -N
C IN H
0
*-1
1
Speed setpoint conditioning (NSET)
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.45
Speed setpoint conditioning (NSET)
Signal
Name
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
NSET−N
O
C0046
dec [%]
C0780
1
50
NSET−NADD
O
C0047
dec [%]
C0782
1
5650
Intended for additional setpoint, other
signals are permissible
NSET−JOG*1
NSET−JOG*2
NSET−JOG*4
NSET−JOG*8
NSET−TI*1
NSET−TI*2
NSET−TI*4
NSET−TI*8
NSET−N−INV
d
d
d
d
d
d
d
d
d
C0799/4
C0799/5
C0799/6
C0799/7
C0799/8
C0799/9
C0799/10
C0799/11
C0799/1
bin
bin
bin
bin
bin
bin
bin
bin
bin
C0787/1
C0787/2
C0787/3
C0787/4
C0788/1
C0788/2
C0788/3
C0788/4
C0781
2
2
2
2
2
2
2
2
2
53
1000
1000
1000
1000
1000
1000
1000
10251
Selection and control of overriding "fixed
setpoints" for the main setpoint
NSET−NADD−INV
d
C0799/2
bin
C0783
2
1000
Control of the signal inversion for the
additional setpoint
NSET−RFG−0
d
C0799/12
bin
C0789
2
1000
The main setpoint integrator is led to zero
via the current Ti times.
NSET−RFG−STOP
d
C0799/13
bin
C0790
2
1000
Keeping (freezing) of the main setpoint
integrator to its actual value.
NSET−CINH−VAL
O
C0798/1
dec [%]
C0784
1
5001
NSET−SET
O
C0798/2
dec [%]
C0785
1
5000
NSET−LOAD
d
C0799/3
bin
C0786
2
5001
Here, the signal is applied which is to be
accepted by the main setpoint integrator
when the controller is inhibited
Here, the signal is applied which is to be
accepted by the main setpoint integrator
when the NSET−LOAD input is set
Control of both ramp function generators in
special situations, e.g. QSP
NSET−OUT
NSET−RFG−I=0
O
d
−
−
−
−
−
−
−
−
−
−
Intended for main setpoint, other signals
are permissible
Selection and control of alternative
acceleration and deceleration times for the
main setpoint
Control of the signal inversion for the main
setpoint
−
−
Function
3.2.45.1
l
l
Main setpoint path
l
JOG setpoints
l
Setpoint inversion
l
S ramp
Main setpoint path
l
The signals in the main setpoint path are limited to the value range ±199.99 %.
l
The signal at input NSET−N is led via the function JOG selection.
l
The JOG function has priority over the setpoint input NSET−N. This means a selected JOG
value deactivates the input. The subsequent signal conditioning the JOG value instead.
EDSVS9332S−EXT EN 2.0
3−131
Function library
Function blocks
3.2.45
3.2.45.2
Speed setpoint conditioning (NSET)
JOG setpoints
l
Are fixed values which are stored in the memory.
l
JOG values can be called from the memory via the inputs NSET−JOG*x.
l
The inputs NSET−JOG*x are binary coded so that 15 JOG values can be called.
l
The decoding for enabling the JOG values (called from the memory) is carried out according to
the following table:
Output signal
3−132
1st input
NSET−JOG*1
2nd input
NSET−JOG*2
3rd input
NSET−JOG*4
4th input
NSET−JOG*8
NSET−N
0
0
0
0
JOG 1
1
0
0
0
JOG 2
0
1
0
0
JOG 3
1
1
0
0
JOG 4
0
0
1
0
JOG 5
1
0
1
0
JOG 6
0
1
1
0
JOG 7
1
1
1
0
JOG 8
0
0
0
1
JOG 9
1
0
0
1
JOG 10
0
1
0
1
JOG 11
1
1
0
1
JOG 12
0
0
1
1
JOG 13
1
0
1
1
JOG 14
0
1
1
1
JOG 15
1
1
1
1
l
When all inputs are assigned with 0, the input NSET−N is active.
l
The number of inputs that must be assigned depends on the required number of JOG values.
Four inputs and thus 15 possible selections are available. A digital signal source is assigned
via C0787 and the corresponding subcode.
Number of required JOG setpoints
Number of inputs to be assigned
1
at least 1
1 ... 3
at least 2
4 ... 7
at least 3
8 ... 15
4
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.45
3.2.45.3
Speed setpoint conditioning (NSET)
Setpoint inversion
The output signal of the JOG function is led via an inverter.
The sign of the setpoint is inverted, if the input NSET−N−INV is triggered with HIGH signal.
Ramp function generator for the main setpoint
The setpoint is then led via a ramp function generator with linear characteristic. Setpoint
step−changes at the input are thus led into a ramp.
[%]
RFG−OUT
100 %
w2
W1
0
Fig. 3−117
l
t ir
t if
t ir
t if
T ir + t ir 100%
w2 * w1
T if + t if 100%
w2 * w1
t
Acceleration and deceleration times of the ramp function generator
l
The ramps can be set separately for acceleration and deceleration.
– Different acceleration and deceleration times can be activated via the inputs NSET−TI*x 16
(for table and function see JOG setpoints; the decoding must be done according to the
signal graphic).
– The Ti times can only be activated in pairs.
l
When the controller is inhibited (CINH) the ramp function generator accepts the value that was
applied to the input NSET−CINH−VAL and transmits it to the next function. This function has
priority over all other functions.
l
NSET−RFG−STOP = HIGH
– The ramp function generator is stopped. Changes at the input of the ramp function
generator have no effect on the output.
l
NSET−RFG−0 = HIGH
– The ramp function generator decelerates to zero along the deceleration ramp.
l
It is also possible to load the ramp function generator online with a defined value. For this, the
input NSET−LOAD must be set to HIGH. As long as this input is set, the value at input
NSET−SET is accepted by the ramp function generator and provided the output.
EDSVS9332S−EXT EN 2.0
3−133
Function library
Function blocks
3.2.45
Speed setpoint conditioning (NSET)
Priorities:
CINH
3.2.45.4
NSET−LOAD
NSET−RFG−0
NSET−RFG−STOP
Function
0
0
0
0
RFG follows the input value via the set ramps
0
0
0
1
The value at the output of RFG is frozen
0
0
1
0
RFG decelerates to zero along the set deceleration time
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
0
0
0
1
0
0
1
1
0
1
0
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
1
1
1
1
RFG accepts the value applied to input NSET−SET and provides it at its
output
RFG accepts the value applied to input CINH−VAL and provides it at its
output
S ramp
The linear ramp function generator is connected to a PT1 element. This arrangement implements an
S ramp for an almost jerk−free acceleration and deceleration.
3.2.45.5
l
The PT1 element is switched on and off via C0134.
l
The time constant is set via C0182.
Arithmetic operation
The output value is led to an arithmetic module. This module links the main setpoint and the additional
setpoint arithmetically. The arithmetic operation is selected via C0190 (see the following table).
3.2.45.6
3−134
C0190
Function
Example
0
Output = X (Y is not processed)
−
1
Output = X + Y
100 % = 50 % + 50 %
2
Output = X − Y
50 % = 100 % − 50%
3
Output = X * Y
100 % = 100 % * 100%
4
Output = X/|Y|
1 % = 100 % / 100%
5
Output = X/(100% − Y)
200 % = 100 % / (100 % − 50 %)
Additional setpoint
l
An additional setpoint (e.g. a correction signal) can be linked with the main setpoint via the
input NSET−NADD.
l
The input signal can be inverted via the input NSET−NADD−INV before affecting the ramp
function generator. The ramp function generator has a linear characteristic and an acceleration
time and deceleration time each.
l
With NSET−LOAD = HIGH the ramp function generator is set to zero and kept there without
considering the Ti times.The same applies when the controller is inhibited.
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.46
3.2.46
OR operation (OR)
OR operation (OR)
Purpose
Logical ORing of digital signals. The operations are used for controlling functions or creating status
information.
C0830/1
C0830/2
C0830/3
OR1
OR1-IN1
C0831/1
OR1-IN2
1
OR1-OUT
C0831/2
OR1-IN3
C0831/3
Fig. 3−118
OR operation (OR1)
Signal
Name
OR1−IN1
OR1−IN2
OR1−IN3
OR1−OUT
C0832/1
C0832/2
C0832/3
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
d
d
d
d
C0831/1
C0831/2
C0831/3
−
bin
bin
bin
−
C0830/1
C0830/2
C0830/3
−
2
2
2
−
1000
1000
1000
−
OR2-IN1
−
−
−
−
OR2
C0833/1
OR2-IN2
1
OR2-OUT
C0833/2
OR2-IN3
C0833/3
Fig. 3−119
OR operation (OR2)
Signal
Name
OR2−IN1
OR2−IN2
OR2−IN
OR2−OUT
l
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
d
d
d
d
C0833/1
C0833/2
C0833/3
−
bin
bin
bin
−
C0832/1
C0832/2
C0832/3
−
2
2
2
−
1000
1000
1000
−
EDSVS9332S−EXT EN 2.0
−
−
−
−
3−135
Function library
Function blocks
3.2.46
OR operation (OR)
C0834/1
C0834/2
C0834/3
OR3-IN1
OR3
C0835/1
OR3-IN2
1
OR3-OUT
C0835/2
OR3-IN3
C0835/3
Fig. 3−120
OR operation (OR3)
Source
Signal
Name
OR3−IN1
OR3−IN2
OR3−IN3
OR3−OUT
C0836/1
C0836/2
C0836/3
Note
Type
DIS
DIS format
CFG
List
Lenze
d
d
d
d
C0835/1
C0835/2
C0835/3
−
bin
bin
bin
−
C0834/1
C0834/2
C0834/3
−
2
2
2
−
1000
1000
1000
−
OR4-IN1
−
−
−
−
OR4
C0837/1
OR4-IN2
1
OR4-OUT
C0837/2
OR4-IN3
C0837/3
Fig. 3−121
OR operation (OR4)
Signal
Name
OR4−IN1
OR4−IN2
OR4−IN3
OR4−OUT
C0838/1
C0838/2
C0838/3
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
d
d
d
d
C0837/1
C0837/2
C0837/3
−
bin
bin
bin
−
C0826/1
C0826/2
C0826/3
−
2
2
2
−
1000
1000
1000
−
OR5-IN1
−
−
−
−
OR5
C0839/1
OR5-IN2
1
OR5-OUT
C0839/2
OR5-IN3
C0839/3
Fig. 3−122
OR operation (OR5)
Signal
Name
OR5−IN1
OR5−IN2
OR5−IN3
OR5−OUT
3−136
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
d
d
d
d
C0839/1
C0839/2
C0839/3
−
bin
bin
bin
−
C0828/1
C0828/2
C0828/3
−
2
2
2
−
1000
1000
1000
−
EDSVS9332S−EXT EN 2.0
−
−
−
−
l
Function library
Function blocks
3.2.46
OR operation (OR)
Function of OR1 ... OR5
l
ORx−OUT = ORx−IN1 Ú ORx−IN2 Ú ORx−IN3
l
Equivalent network:
ORx-IN1
ORx-IN2
ORx-IN3
ORx-OUT
9300kur071
Fig. 3−123
Equivalent network of the OR operation for OR1 ... OR5
)
Note!
Connect inputs that are not used to FIXED0.
l
EDSVS9332S−EXT EN 2.0
3−137
Function library
Function blocks
3.2.47
3.2.47
Oscilloscope function (OSZ)
Oscilloscope function (OSZ)
Purpose
Detection of any measured variable (e. g. speed setpoint, actual speed, torque etc.). They are
visualised in Global Drive Control.
Supports the commissioning of controllers and the troubleshooting.
C0732/1
C0732/2
OSZ-CHANNEL2
C0732/3
OSZ-CHANNEL3
C0732/4
OSZ-CHANNEL4
C0733/1
OSZ-DIG-TRIGGER
measuring value
memory
OSZ
OSZ-CHANNEL1
CTRL
C0730
C0731
C0734
C0735
C0736
C0737
1
2
3
4
C0738
C0739
C0740
C0741
C0744
C0749
fb_osz
Fig. 3−124
Oscilloscope function (OSZ)
Source
Signal
Name
OSZ CHANNEL1
OSZ CHANNEL2
OSZ CHANNEL3
OSZ CHANNEL4
OSZ−DIG−TRIGGER
Note
Type
DIS
DIS format
CFG
List
Lenze
a
a
a
a
d
−
−
−
−
−
−
−
−
−
−
C0732/1
C0732/2
C0732/3
C0732/4
C0733/1
1
1
1
1
2
−
−
−
−
−
−
−
−
−
−
Function
The FB has three function units:
3−138
l
Trigger check
– Monitoring of the digital trigger source for a valid trigger event
l
Processing of the measured signal
– Linking the measurement inputs
– Calculating the time base
– Monitoring of the analog trigger source for a valid trigger event.
l
Measuring value memory
– Scaling the ring buffer
– Filing the measured data in the ring buffer
– Saving the measuring points for image generation
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.47
Oscilloscope function (OSZ)
Functional description
Function
OSZ mode
Code
Selection
C0730
1
0
C0731
1
OSZ status
2
3
4
5
Configuration
OSZ channel
1 ... 4
C0732/1
to
C0732/4
Configuration
OSZ trigger
C0733/1
Trigger source
C0734
Trigger level
C0735
1
0
−32767 ... 32767
Trigger edge
C0736
l
1
0
Description
Controls the measurement in the controller
· Starts the recording of the measured values
· Cancels a running measurement
Displays five different operating states
· Measurement completed
– The memory of the measured values is completely filled with measured data. The
measured values can be accessed via the PC.
· Measurement active
– A measurement was started with C0730 = 1. The FB is waiting for a valid trigger
event.
· Trigger detected
– The FB has detected a valid trigger event. Depending on the trigger delay the
saving of the measured data is not yet completed. It is automatically completed
with the entry into the last memory unit.
· Measurement cancelled
– Cancel of a running recording of the measured values (C0730 = 0). The memory of
the measured values is filled with the data that has just been measured. The data
can be accessed via the PC.
· Read data memory
– The measured data memory is being read at the moment. No settings are possible
in this operating state.
· Links the measuring channels of the FB with the signals of the process environment
– The four measuring channels can be assigned with any analog signal. Enter the
corresponding signal number into C0732/1 ... C0732/4.
– Always start linking with channel 1, then channel 2 and so on. Unused channels
are automatically assigned with signal FIXED 0%.
Links the digital trigger input with a digital signal in the process environment.
– The trigger input can be assigned with any digital signal. Enter the corresponding
signal number into C0733/1.
Defines the trigger source
Source is one of the four measuring channels (C0734/1 ... C0734/4)
Source is the digital trigger input (C0733/1)
· Defines the trigger level which activates the triggering when the level is exceeded.
– The trigger level is only monitored when the triggering is done on one of the four
channels.
– The trigger level is not effective with digital triggering.
Defines the trigger edge which activates the triggering.
· Triggering on an analog input channel
– With a LOW−HIGH trigger edge the analog trigger signal must exceed a defined
trigger level to activate the triggering.
– With a HIGH−LOW trigger edge the analog trigger signal must fall below a defined
trigger level to activate the triggering.
· Triggering on a digital trigger input
– With a LOW−HIGH trigger edge the digital trigger signal must change from LOW to
HIGH to activate the triggering.
– With a HIGH−LOW trigger edge the digital trigger signal must change from HIGH to
LOW to activate the triggering.
Fig. 3−125 shows the triggering of an analog signal with a positive edge.
– HIGH−LOW trigger edge
LOW−HIGH trigger edge
EDSVS9332S−EXT EN 2.0
3−139
Function library
Function blocks
3.2.47
Oscilloscope function (OSZ)
Function
Trigger delay
Code
Selection
C0737
−100.0 % ... 0 %
0 % ... 999.9 %
Sampling period C0738
1 ms ... 10 min
Number of
Channels
Read data
memory
C0740/1
0 ... 16383
C0740/2
1
C0739
0
Information
about the
function block
3−140
C0741/1
C0741/2
C0741/3
C0741/4
Description
The trigger delay defines when to begin with the saving of the measured values with
regard to the trigger time.
· Negative trigger delay (pre−triggering)
– Defines a percentage of the whole memory content. This part of the memory
content is filled with measured values before the triggering (see Fig. 3−126).
· Positive trigger delay (post−triggering)
– Defines a percentage of the whole memory content. The saving of the measured
values after triggering is delayed by this part of the memory content (Fig. 3−125).
· Setting of the sampling period
– The sampling period is the time between two measurements
– The measurements are carried out simultaneously for all channels (e. g. value
measured at channel 1 is measured at the same time as the measured value at
channel 2, 3 or 4.
– The sampling period can be set in steps of 1, 2 and 5.
Number of channels used for measurements.
The code is required if the GDC is not used for the visualisation.
· Defines the starting point for reading the data memory and thus enables the memory
array to be selectively accessed.
– In order to read the data memory bit by bit (e. g. reading only the measured values
of one channel or reading with reduced memory depth), the starting point can be
changed.
· Enable Read memory"
– Enables the access to the memory to read the data
· Inhibit Read memory"
– Inhibits the access to the memory. The access must be inhibited after every
reading of the data
Provides information on the function block
Version of the function block (e. g. 120: Version 1.20)
Data memory size (1024 ... 16384 bytes)
Data width of the measured values (1 byte / 2 bytes)
Number of the available measuring channels (1 ... 4)
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.47
Oscilloscope function (OSZ)
Function
Memory size
Code
C0744
Selection
0 ... 6
Description
Set memory depth of the data memory
– Max. size of the data memory: 8192 measured values ¢ 16384 bytes (C0744 = 6)
– Min. size of the data memory: 512 measured values ¢ 1024 bytes (C0744 = 0)
– Changing the memory depth from 512 to 8192 measured values/step
– A memory depth which is optimally adapted to the corresponding measuring task
reduces the data transmission time.
Information on saving the measured values in the data memory
The FB saves the data in a ring format. For reconstructing the chronological signal
sequence the following three "graphic points" are marked.
Measured value no. of the instant of abortion
Measured value no. of the instant of triggering
Measured value no. of the instant of completion
Information on
saving
C0749/1
C0749/2
C0749/3
Memory content
Instant of triggering
Trigger level
Measured signal
Signal characteristic
before triggering
Fig. 3−125
Signal characteristic after triggering
Example: Trigger level and trigger delay with approx. −30 % of pre−triggering
Memory content
Instant of triggering
Trigger level
Measured signal
Trigger delay
Signal characteristic after triggering
Signal characteristic
before triggering
Fig. 3−126
l
Example: Trigger level and trigger delay with approx. −30 % of post−triggering
EDSVS9332S−EXT EN 2.0
3−141
Function library
Function blocks
3.2.48
3.2.48
Process controller (PCTRL1)
Process controller (PCTRL1)
Purpose
The FB is used, for instance, as a higher−level controller (dancer position controller, tension controller,
pressure controller etc.).
The control characteristic follows the ideal PID algorithm, but it can also be changed over to a PI or
P characteristic.
C0222
PCTRL1-ADAPT
C0803
C0808/4
C0805
C0802
2
3
Vp2 C0325
Vp3 C0326
soll2 C0327
C0337
C0223
C0224
C0336
±100%
+
-
C0808/1
C0804
C0222
Vp
PCTRL1-SET
C0333
PCTRL1-ACT
C0801
1
3
C0332
C0800
0
Vp2 C0325
Vp
2
C0328 soll1
PCTRL1-INACT
PCTRL1-I-OFF
PCTRL1-INFLU
C0329 PCTRL1
C0222
PCTRL1-OUT
RESET
C0808/2
C0809/1
C0809/2
C0808/3
Fig. 3−127
Process controller (PCTRL1)
Source
Signal
Name
Note
Type
DIS
DIS format
CFG
List
Lenze
PCTRL1−SET
a
C0808/1
dec [%]
C0800
1
1000
PCTRL1−ACT
PCTRL1−INFLU
a
a
C0808/2
C0808/3
dec [%]
dec [%]
C0801
C0802
1
1
1000
1000
PCTRL1−ADAPT
a
C0808/4
dec [%]
C0803
1
1000
PCTRL1−INACT
d
C0809/1
bin
C0804
2
1000
PCTRL1−I−OFF
PCTRL1−OUT
d
a
C0809/2
−
bin
−
C0805
−
2
−
1000
−
Input of the process setpoint. Possible
value range: ±200%. The time
characteristic of step−change signals can
be affected via the ramp function generator
(C0332 for the acceleration time; C0333 for
the deceleration time).
Actual value input; value range ±200%
Evaluation or suppression of the output
signal; value range ±200%
Online change of the P gain;
value range ±200%
Online deactivation of the process
controller
Online setting of the I component to zero
−
Function
Setpoint and actual value are sent to the process controller via the corresponding inputs and
processed according to the selected control algorithm (control chararacteristic).
3−142
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.48
3.2.48.1
Process controller (PCTRL1)
Control characteristic
l
In the default setting, the PID algorithm is active.
l
The D−component can be deactivated by setting code C0224 to zero. Thus, the controller
becomes a PI−controller (or P−controller if the I−component is also switched off).
l
The I−component can be switched on or off online via the PCTRL−I−OFF input. For this, the
input is assigned a digital signal source (e.g. one of the freely assignable digital input
terminals). If the I−component is to be switched off permanently, the input is assigned the
signal source "FIXED1".
– PCTRL−I−OFF = HIGH switches off the I−component
– PCTRL−I−OFF = LOW switches on the I−component
l
The reset time is parameterised via C0223.
l
The P−gain can be set in different ways. The function providing the P−gain is selected under
C0329:
– C0329 = 0
The P−gain is entered under C0222.
– C0329 = 1
The P−gain is entered via the PCTRL−ADAPT input. The input value is led via a linear
characteristic. The slope of the characteristic is set under C0222 (upper limit) and C0325
(lower limit). The value under C0222 is valid if the input value = +100 % or −100 %. The value
under C0325 applies if the input value is 0 %.
Vp
Vp1
Input data:
Vp1 = C0222
Vp2 = C0325
Vp2
PCTRL−ADAPT
0
Fig. 3−128
Display value:
Vpact = C0336
100 %
Input of the P−gain via PCTRL−ADAPT input
– C0329 = 2
The P−gain is derived from the process setpoint PCTRL−SET. The setpoint is measured after
the ramp function generator and calculated by means of a characteristic with three
interpolation points.
Vp
Vp1
Vp2
Vp3
s
s0
Fig. 3−129
s1
Input data:
Vp1 = C0222
Vp2 = C0325
Vp3 = C0326
s0= C0328
s1= C0327
Display value:
Vpact = C0336
P−gain derived from the PCTRL−SET process setpoint
– C0329 = 3
The P−gain is derived from the control difference and calculated by means of a characteristic
as for C0329 = 2.
l
EDSVS9332S−EXT EN 2.0
3−143
Function library
Function blocks
3.2.48
3.2.48.2
Process controller (PCTRL1)
Ramp function generator
The setpoint PCTRL−SET is led via a ramp function generator with linear characteristic. Thus,
setpoint step−changes at the input can be transformed into a ramp.
[%]
RFG−OUT
100 %
w2
w1
0
Fig. 3−130
3.2.48.3
3.2.48.4
T ir
T if
T ir + t ir 100%
w2 * w1
T if + t if 100%
w2 * w1
l
The ramps can be adjusted separately for acceleration and deceleration.
– Acceleration time tir with C0332.
– Deceleration time tif with C0333.
l
PCTRL−INACT = HIGH
– The ramp function generator is immediately set to zero.
t
Value range of the output signal
l
The process controller operates in bipolar mode in the default setting.
– The output value is limited to ±100 %.
l
The function can be set to unipolar mode under C0337.
– The output value is limited to 0 ... +100 %.
Evaluation of the output signal
The output signal can be evaluated after the limitation block via PCTRL−INFLU.
– The process controller can be hidden or unhidden with this evaluation.
– The calcuation is done according to the following formula:
100 % (PCTRL−OUT) = 100 % * 100 % (PCTRL−INFLU).
Deactivation of the process controller
l
3−144
t if
Acceleration and deceleration times of the ramp function generator
l
3.2.48.5
t ir
PCTRL−INACT = HIGH deactivates the process controller
– PCTRL−OUT is set to zero.
– The I−component is set to zero.
– The ramp function generator is set to zero.
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.49
3.2.49
Angle addition block (PHADD)
Angle addition block (PHADD)
Purpose
Adds or subtracts angle signals depending on the input used.
PHADD1
±231−1
C1200/1
C1200/2
PHADD1−IN1 +
+
PHADD1−OUT
+
−
C1201/1
PHADD1−IN2
PHADD1−OUT2
C1201/2
C1200/3
PHADD1−IN3
C1201/3
Fig. 3−131
FB_phadd1
Angle addition block (PHADD1)
Signal
Name
PHADD1−IN1
PHADD1−IN2
PHADD1−IN3
PHADD1−OUT
PHADD1−OUT2
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
ph
ph
ph
ph
ph
C1201/1
C1201/2
C1201/3
−
−
dec [inc]
dec [inc]
dec [inc]
−
−
C1200/1
C1200/2
C1200/3
−
−
3
3
3
−
−
1000
1000
1000
−
−
Addition input
Addition input
Subtraction input
Limited to ±2147483647
−
Function
l
l
Input PHADD1−IN1 is added to input PHADD1−IN2.
l
The input PHADD−IN3 is subtracted from the calculated result.
l
Then the result of the subtraction
– is limited to ±2147483647 and output at PHADD1−OUT.
– is output at PHADD1−OUT2 without limitations.
EDSVS9332S−EXT EN 2.0
3−145
Function library
Function blocks
3.2.50
3.2.50
Angle comparator (PHCMP)
Angle comparator (PHCMP)
Purpose
Compares two angle signals (distances) with each other.
PHCMP1
C0695
C0697/1
C0697/2
PHCMP1-IN1
PHCMP1-OUT
C0698/1
PHCMP1-IN2
C0698/2
Fig. 3−132
Angle comparator (PHCMP1)
Source
Signal
Name
PHCOMP1−IN1
PHCOMP1−IN2
PHCOMP1−OUT
Note
Type
DIS
DIS format
CFG
List
Lenze
ph
ph
d
C0698/1
C0698/2
−
dec [inc]
dec [inc]
−
C0697/1
C0697/2
−
3
3
−
1000
1000
−
Signal to be compared
Comparison value
P H C M P 2
C 1 2 0 7
C 1 2 0 5 /1
C 1 2 0 5 /2
P H C M P 2 -IN 1
P H C M P 2 -O U T
C 1 2 0 6 /1
P H C M P 2 -IN 2
C 1 2 0 6 /2
Fig. 3−133
Angle comparator (PHCMP2)
Source
Signal
Name
PHCOMP2−IN1
PHCOMP2−IN2
PHCOMP2−OUT
Note
Type
DIS
DIS format
CFG
List
Lenze
ph
ph
d
C1206/1
C1206/2
−
dec [inc]
dec [inc]
−
C1205/1
C1205/2
−
3
3
−
1000
1000
−
Signal to be compared
Comparison value
P H C M P 3
C 1 2 7 2
C 1 2 7 0 /1
C 1 2 7 0 /2
P H C M P 3 -IN 1
P H C M P 3 -O U T
C 1 2 7 1 /1
P H C M P 3 -IN 2
C 1 2 7 1 /2
Fig. 3−134
Angle comparator (PHCMP3)
Source
Signal
Name
PHCOMP3−IN1
PHCOMP3−IN2
PHCOMP3−OUT
3−146
Note
Type
DIS
DIS format
CFG
List
Lenze
ph
ph
d
C1271/1
C1271/2
−
dec [inc]
dec [inc]
−
C1270/1
C1270/2
−
3
3
−
1000
1000
−
EDSVS9332S−EXT EN 2.0
Signal to be compared
Comparison value
l
Function library
Function blocks
3.2.50
Angle comparator (PHCMP)
Function
Function block
PHCMP1
PHCMP2
PHCMP3
PHCMP1
PHCMP2
PHCMP3
Code
C0695 = 1
C1207 = 1
C1272 = 1
C0695 = 2
C1207 = 2
C1272 = 2
Function
· If PHCMPx−IN1 < PHCMPx−IN2, PHCMPx−OUT switches to HIGH
· If PHCMPx−IN1 ³ PHCMPx−IN2, PHCMPx−OUT switches to LOW
Note
· If | PHCMPx−IN1 | < | PHCMPx−IN2 |, PHCMPx−OUT switches to HIGH
· If | PHCMPx−IN1 | ³ | PHCMPx−IN2 |, PHCMPx−OUT switches to LOW
Compares the
absolute values of the
inputs
PHCMPx-IN2
PHCMPx-IN1
t
PHCMPx-OUT
t
9300std004
Fig. 3−135
l
Diagram of the function
EDSVS9332S−EXT EN 2.0
3−147
Function library
Function blocks
3.2.51
3.2.51
Actual angle integrator (PHDIFF)
Actual angle integrator (PHDIFF)
Purpose
Selective addition of a angle signal to the setpoint angle.
It is also possible to compare setpoint and actual angle signals.
C 1 2 3 2 /1
P H D IF F 1
P H D IF F 1 -S E T
P H D IF F 1 -O U T
+
C 1 2 3 7 /1
C 1 2 3 2 /2
C 1 2 3 0 /1
P H D IF F 1 -A D D
C 1 2 3 7 /2
P H D IF F 1 -E N
P H D IF F 1 -IN
C 1 2 3 1
-
C 1 2 3 5 /1
C 1 2 3 6
C 1 2 3 0 /2
P H D IF F 1 -R E S E T
C 1 2 3 5 /2
Fig. 3−136
Actual angle integrator (PHDIFF1)
Signal
Name
PHDIFF1−IN
PHDIFF1−SET
PHDIFF1−ADD
PHDIFF1−EN
PHDIFF1−RESET
PHDIFF1−OUT
Source
Note
Type
DIS
DIS format
CFG
List
phd
ph
ph
d
d
ph
C1236
C1237/1
C1237/2
C1235/1
C1235/2
−
dec [rpm]
dec [inc]
dec [inc]
bin
bin
−
C1231
C1232/1
C1232/2
C1230/1
C1230/2
−
4
3
3
2
2
−
−
−
−
−
HIGH = sets the actual angle integrator = 0
Without limit
Function
C1230/1 = HIGH
l
The speed signal at PHDIFF1−IN is integrated by the actual angle integrator.
l
The angle signal at PHDIFF1−ADD is added to the integrated speed signal.
l
The result of the actual angle integrator is subtracted from the angle signal at PHDIFF1−SET.
C1230/1 = LOW
3−148
l
The speed signal at PHDIFF1−IN is integrated by the actual angle integrator.
l
The result of the actual angle integrator is subtracted from the angle signal at PHDIFF1−SET.
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.52
3.2.52
Signal adaptation for angle signals (PHDIV)
Signal adaptation for angle signals (PHDIV)
Purpose
Power−of−two division or multiplication of angle signals.
±32767
Revolution
PHDIV1-IN
C0996
PHDIV1
PHDIV1-OUT
C0995
C0997
Fig. 3−137
1
2
Signal adaptation for angle signals (PHDIV1)
Source
Signal
Name
PHDIV1−IN
PHDIV1−OUT
Note
Type
DIS
DIS format
CFG
List
Lenze
ph
ph
C0997
−
dec [inc]
−
C0996
−
3
−
1000
−
65536 inc = one encoder revolution
Function
l
Arithmetic function:
PHDIV1−OUT + PHDIV1−IN
2 C0995
– Positive values in C0995 result in a division.
– Negative values in C0995 result in a multiplication.
l
l
The output value is limited to ±(231−1) inc (corresponds to ±32767 encoder revolutions).
– If the limit is exceeded, the output is kept at the limit value.
EDSVS9332S−EXT EN 2.0
3−149
Function library
Function blocks
3.2.53
3.2.53
Phase integrator (PHINT)
Phase integrator (PHINT)
Purpose
Integrates a speed or a velocity to a phase (distance). The integrator can maximally accept ±32000
encoder revolutions.
PHINT3 can recognise a relative distance.
P H IN T 1
C 0 9 9 0
C 0 9 9 1
P H IN T 1 -IN
C 0 9 9 2
P H IN T 1 -R E S E T
P H IN T 1 -O U T
± 3 2 0 0 0
R e v o lu tio n
P H IN T 1 -F A IL
C 0 9 9 3
Fig. 3−138
Phase integrator (PHINT1)
Source
Signal
Note
Name
Type
DIS
DIS format
CFG
List
PHINT1−IN
PHINT1−RESET
phd
d
C0992
C0993
dec [rpm]
bin
C0990
C0091
4
2
1 revolution = 65536 increments
HIGH = sets the phase integrator to 0 and PHINT1−FAIL
= LOW
PHINT1−OUT
PHINT1−FAIL
ph
d
−
−
−
−
−
−
−
−
65536 inc = 1 encoder revolution, overflow is possible
HIGH = overflow
P H IN T 2
C 1 0 3 0
C 1 0 3 1
P H IN T 2 -IN
C 1 0 3 2
P H IN T 2 -R E S E T
P H IN T 2 -O U T
± 3 2 0 0 0
R e v o lu tio n
P H IN T 2 -F A IL
C 1 0 3 3
Fig. 3−139
Phase integrator (PHINT2)
Signal
3−150
Source
Note
Name
Type
DIS
DIS format
CFG
List
PHINT2−IN
PHINT2−RESET
phd
d
C1032
C1033
dec [rpm]
bin
C1030
C1031
4
2
1 revolution = 65536 increments
HIGH = sets the phase integrator to 0 and PHINT2−FAIL
= LOW
PHINT2−OUT
PHINT2−FAIL
ph
d
−
−
−
−
−
−
−
−
65536 inc = 1 encoder revolution, overflow is possible
HIGH = overflow
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.53
Phase integrator (PHINT)
P H IN T 3
C 1 1 5 0
C 1 1 5 1
C 1 1 5 3
Fig. 3−140
P H IN T 3 -O U T
P H IN T 3 -IN
P H IN T 3 -S T A T U S
C 1 1 5 7
C 1 1 5 4
P H IN T 3 -L O A D
C 1 1 5 5
P H IN T 3 -S E T
C 1 1 5 8
C 1 1 5 9
Phase integrator (PHINT3)
Signal
Source
Note
Name
Type
DIS
DIS format
CFG
List
PHINT3−IN
PHINT3−LOAD
phd
d
C1157
C1158
dec [rpm]
bin
C1153
C1154
4
2
PHINT3−SET
PHINT3−OUT
PHINT3−STATUS
ph
ph
d
C1159
−
−
dec [inc]
−
−
C1155
−
−
3
−
−
1 revolution = 65536 increments
HIGH = sets the phase integrator to the input signals of
PHINT3−IN and PHINT3−STATUS = LOW
65536 inc = 1 encoder revolution, overflow is possible
HIGH = Overflow or distance is processed
Function
l
l
Constant input value (PHINT1, PHINT2 and PHINT3)
l
Input value with sign reversal (PHINT3)
l
Scaling of PHINTx−OUT
EDSVS9332S−EXT EN 2.0
3−151
Function library
Function blocks
3.2.53
3.2.53.1
Phase integrator (PHINT)
Constant input value (PHINT1 and PHINT2)
P H IN T x -O U T
+ 3 2 7 6 7 re v .
+ 3 2 0 0 0
t
-3 2 0 0 0
-3 2 7 6 7 re v .
P H IN T x -F A IL
t
Fig. 3−141
3−152
Function of PHINTx with constant input value
l
The FB integrates speed or velocity values at PHINTx−IN to a phase (distance).
l
PHINTx−OUT outputs the count of the bipolar integrator.
– A positive value at PHINTx−IN increments the integrator (count is increased).
– A negative value at PHINTx−IN decrements the integrator (count is reduced).
l
If the count exceeds the value of +32767 encoder revolutions (¢ +2147483647 inc)
– an overflow occurs. The counting is continued with the value −32768.
– PHINTx−FAIL switches to HIGH when the value w +32000 is reached.
PHINTx−FAIL = HIGH.
l
If the count falls below the value of −32768 encoder revolutions (¢ −2147483648 inc)
– an overflow occurs. The counting starts at the value +32767.
– PHINTx−FAIL switches to HIGH when the value v −32000 is reached.
l
PHINTX−RESET = HIGH
– sets the integrator to 0
– sets PHINTx−OUT = 0, as long as a HIGH level is applied to PHINTx−IN.
– sets PHINTx−FAIL = LOW.
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.53
3.2.53.2
Phase integrator (PHINT)
Constant input value (PHINT3)
The FB PHINT3 has three modes which can be set via C1150.
Mode C1150 = 2 is in chapter. 3.2.53.3.
C1150 = 0
The input PHINT3−LOAD is state−controlled (HIGH level).
· PHINT3−LOAD = HIGH
– The integrator is loaded with the input value at PHINT3−SET.
– Sets the output PHINT3−STATUS = LOW
P H IN T 3 -O U T
C1150 = 1
The input PHINT3−LOAD is edge−triggered (LOW−HIGH edge).
· PHINT3−LOAD = LOW−HIGH edge
– The integrator is loaded with input value at PHINT3−SET and
immediately starts to integrate
– Sets the output PHINT3−STATUS = LOW
+ 3 2 7 6 7 re v .
+ C 1 1 5 1
t
-C 1 1 5 1
-3 2 7 6 7 re v .
P H IN T 3 -S T A T U S
t
Fig. 3−142
l
Function of PHINT3 with constant input value at C1150 = 0 and C1150 = 1
l
The FB integrates speed or velocity values at PHINT3−IN to a phase (distance).
l
PHINT3−OUT outputs the count of the bipolar integrator.
– A positive value at PHINT3−IN increments the integrator (count is increased).
– A negative value at PHINT3−IN decrements the integrator (count is reduced).
l
If the count exceeds the value of +32767 encoder revolutions (¢ +2147483647 inc)
– an overflow occurs. The counting is continued with the value −32768,
– PHINT3−STATUS switches to HIGH when the value of (+) C1151 is reached.
l
If the count falls below the value of −32768 encoder revolutions (¢ −2147483648 inc)
– an overflow occurs. The counting starts at the value +32767,
– PHINT3−STATUS switches to HIGH when the value of (−) C1151 is reached.
EDSVS9332S−EXT EN 2.0
3−153
Function library
Function blocks
3.2.53
3.2.53.3
Phase integrator (PHINT)
Input value with sign reversal (PHINT3)
C1150 = 2
The input PHINT3−LOAD is state−controlled (HIGH level).
l
PHINT3−LOAD = HIGH
– The integrator is loaded with the input value at PHINT3−SET.
– Sets the output PHINT3−STATUS = LOW.
P H IN T 3 -O U T
C 1 1 5 1
C h a n g e o f s ig n a t th e in p u t
-C 1 1 5 1
P H IN T 3 -S T A T U S
Fig. 3−143
3−154
Function of PHINT3 with sign reversal of the input value at C1150 = 2
l
The FB integrates speed or velocity values at PHINT3−IN to a phase (distance).
l
PHINT3−OUT outputs the count of the bipolar integrator.
– A positive value at PHINT3−IN increments the integrator (count is increased).
– A negative value at PHINT3−IN decrements the integrator (count is reduced).
l
If the counter content exceeds the value of (+) C1151
– the value of C1151 is subtracted from the counter content,
– switches PHINT3−STATUS = HIGH for 1 ms.
l
If the counter content falls below the value of () C1151
– the value of C1151 is added to the counter content,
– switches PHINT3−STATUS = HIGH for 1 ms.
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.53
3.2.53.4
Phase integrator (PHINT)
Scaling of PHINTx−OUT
Mathematical description of PHINTx−OUT:
PHINTx * OUT[inc] + PHINTx * IN[rpm] @ t[s] @ 65536[incńrev.]
t
Integration time
Example:
You want to determine the count of the integrator with a certain speed at the input and a certain
integration time.
l
Given values:
– PHINTx−IN = 1000 rpm
– t = 10 s
– Start value of the integrator = 0
l
Solution:
– Conversion of PHINTx−IN:
1000rpm + 1000rev.
60s
– Calculation of PHINTx−OUT:
PHINTx * OUT + 1000rev. @ 10s @ 65536inc
rev. + 10922666inc
60s
l
EDSVS9332S−EXT EN 2.0
3−155
Function library
Function blocks
3.2.54
3.2.54
Delay element (PT1−1)
Delay element (PT1−1)
Purpose
Filtering and delaying of analog signals.
C0640
C0641
PT1-1-IN
PT1-1
PT1-1-OUT
C0642
Fig. 3−144
Delay element (PT1−1)
Source
Signal
Name
PT1−1−IN
PT1−1−OUT
Note
Type
DIS
DIS format
CFG
List
Lenze
a
a
C0642
−
dec [%]
−
C0641
−
1
−
1000
−
−
−
Function
l
The delay time T is set under C0640.
l
The proportional coefficient is fixed at K = 1.
K=1
T
Fig. 3−145
3−156
t
Delay time T of the first order delay element
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.55
3.2.55
CW/CCW/QSP linking (R/L/Q)
CW/CCW/QSP linking (R/L/Q)
Purpose
The FB provides a fail−safe connection for the selection of a rotation direction and the QSP function.
C0885
C0886
R/L/Q
C0889/1
R/L/Q-R
R/L/Q-QSP
R/L/Q-L
R/L/Q-R/L
C0889/2
Fig. 3−146
CW/CCW/QSP linking (R/L/Q)
Source
Signal
Name
R/L/Q−R
R/L/Q−L
R/L/Q−QSP
R/L/Q−R/L
Note
Type
DIS
DIS format
CFG
List
Lenze
d
d
d
d
C0889/1
C0889/2
−
−
bin
bin
−
−
C0885
C0886
−
−
2
2
−
−
51
52
−
−
−
−
−
−
Function
l
After mains connection and simultaneous HIGH level at both inputs, the outputs are set as
follows:
Inputs
l
Outputs
R/L/Q−R
R/L/Q−L
R/L/Q−R/L
R/L/Q−QSP
1
1
0
1
The following truth table results if one of the inputs is set to LOW once after mains connection:
Inputs
l
l
Outputs
R/L/Q−R
R/L/Q−L
R/L/Q−R/L
R/L/Q−QSP
0
0
0
1
1
0
0
0
0
1
1
0
1
1
unchanged
unchanged
If both inputs are set to HIGH during operation, the values at both outputs remain unchanged.
EDSVS9332S−EXT EN 2.0
3−157
Function library
Function blocks
3.2.56
3.2.56
Homing function (REF)
Homing function (REF)
Purpose
The homing function serves to bring the drive shaft to a defined position.
)
Note!
At first, select the predefined configuration in C0005, which already contains the
REF function block. This ensures that all important signal connections are restored
automatically. Then, adapt the configuration to your application.
C0925
C0924
C0926/1
REF-POS-LOAD
C0921
C0927/3
REF-MARK
CTRL
C0926/3
C0926/4
C0927/2
C0920
C0922
REF-OK
REF-BUSY
REF-ON
C0927/1
C0923
REF
C0933
C0932
C0930
C0931
C0934
C0935
C0936
REF-ACTPOS-IN
REF-N-SET
REF-N-IN
C0929
REF-PHI-IN
REF-PSET
C0928
Fig. 3−147
Homing function (REF)
Signal
Name
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
REF−N−IN
REF−PHI−IN
a
ph
dec [%]
dec [inc]
C0923
C0922
1
3
1000
1000
Speed setpoint in [%] of nmax C0011
Angle setpoint (following error for angle
controller in FB MCTRL)
REF−ACTPOS−IN
ph
C0929
C0928
C0926/2
C0926/1
dec [inc]
C0925
3
1000
REF−ON
REF−MARK
REF−POS−LOAD
d
d
d
C0927/1
C0927/2
C0927/3
bin
bin
bin
C0920
C0921
C0924
2
2
2
1000
1000
1000
REF−OK
d
−
−
−
−
−
Loading value for current position
(REF−ACTPOS)
HIGH = Start homing
Reference switch
LOW−HIGH edge = Angle at the input
REF−ACTPOS−IN is loaded in REF−ACTPOS
(starting value)
HIGH = Homing completed/home position
known
REF−BUSY
REF−N−SET
REF−PSET
d
a
ph
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
HIGH = Homing function active
Speed setpoint for n−controller
Angle setpoint (following error for angle
controller in FB MCTRL)
Range of functions
3−158
l
Profile generator
l
Homing modes
l
Control via input signals
l
Output of status signals
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.56
3.2.56.1
Homing function (REF)
Profile generator
The speed profile for homing can be adapted to the application.
v
Referenzpunkt-Offset C0934
C0936
C0935
C0936
t
REF-MARK
Fig. 3−148
Nullimpuls
Referenzpunkt
Homing speed profile
Code
C0930
C0931
C0933
Meaning
Encoder/gearbox factor − numerator (motor speed)
Encoder/gearbox factor − denominator (encoder speed)
Selection of the edge of the touch probe signal at X5/E4
C0934
Home position offset = number of increments after zero pulse Reference: 65536 inc = 1 revolution. Max. entry: 2140000000
inc
C0935
C0936
C0926/3
C0926/4
Homing speed
Homing acceleration time, homing deceleration time
REFC−ACTPOS, actual position value
REFC−TARGET, current target position
Note
Setting only required if the actual value encoder is not
mounted to the motor
The touch probe edge provides the bench mark for the home
position offset to the homing modes that include touch probe.
Input in [%] of nmax (C0011)
Linear ramps
Read only
Read only
The profile generator calculates the speed profile from the set profile parameters.
l
l
The parameters can be changed during homing.
– C0935 and C0936 become active if REF−ON = LOW.
l
The drive should not be driven at the torque limit (MCTRL−MMAX = HIGH), otherwise the drive
cannot follow the speed profile.
– Prolonging the acceleration / deceleration time until MCTRL−MMAX does not respond
anymore.
l
The angle controller in the MCTRL function block must be activated.
EDSVS9332S−EXT EN 2.0
3−159
Function library
Function blocks
3.2.56
3.2.56.2
Homing function (REF)
Homing modes
The home position is defined via
l
the homing mode C0932
l
the signal edge of the zero pulse or touch probe signal C0933
l
the home position offset C0934
)
Note!
For position feedback via resolver, the zero position (depending on the resolver
attachment to the motor) is used instead of the zero pulse. Accordingly, the touch
probe angle is used for homing via touch probe.
Homing to zero pulse/zero position with reference switch
The home position is after the negative edge of the reference switch REF−MARK, at the next zero
pulse/zero position plus the home position offset:
l
Mode 0 (C0932 = 0):
– Move to the home position in CW rotation.
– Enter positive home position offset C0934.
C0934
MCTRL-PHI-ACT
REF-MARK
Fahrtstrecke
Startpunkt
Fig. 3−149
Referenzpunkt
Fahrtrichtung
Homing with zero pulse/zero position; approaching the home position in CW rotation
l
Mode 1 (C0932 = 1):
– Move to the home position in CCW rotation.
– Enter negative home position offset C0934.
C0934
MCTRL-PHI-ACT
REF-MARK
Fahrtstrecke
Referenzpunkt
Fahrtrichtung
Startpunkt
9300STD219
Fig. 3−150
3−160
Homing with zero pulse/zero position; approaching the home position in CW rotation
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.56
Homing function (REF)
Homing with reference switch and touch probe (TP)
The home position is after the negative edge of the reference switch REF−MARK, at the touch probe
signal (terminal X5/E4) plus the home position offset:
l
Mode 6 (C0932 = 6):
– Move to the home position in CW rotation.
– Enter positive home position offset C0934.
C0934
X5/E4
REF-MARK
Fahrtstrecke
Startpunkt
Fahrtrichtung
Referenzpunkt
9300STD220
Fig. 3−151
Homing with touch probe; approaching the home position in CW rotation
l
Mode 7 (C0932 = 7):
– Move to the home position in CCW rotation.
– Enter negative home position offset C0934.
Homing with touch probe (TP)
The home position is at the next touch probe signal (terminal X5/E4) plus the home position offset.
l
l
Mode 8 (C0932 = 8):
– Move to the home position in CW rotation.
– Enter positive home position offset C0934.
l
Mode 9 (C0932 = 9):
– Move to the home position in CCW rotation.
– Enter negative home position offset C0934.
EDSVS9332S−EXT EN 2.0
3−161
Function library
Function blocks
3.2.56
Homing function (REF)
Direct homing
The home position is on the home position offset.
l
Mode 20 (C0932 = 20):
– Directly after the activation (REF−ON = HIGH), the drive traverses from the actual position
(REF−ACTPOS) to the home position.
– Before that, the actual position (REF−ACTPOS) can be loaded with the input value
REF−ACTPOS−IN (see chapter 3.2.56.3).
– The route and direction of travel results from the actual position (REF−ACTPOS) and the
home position offset (C0934) set.
Referenzpunktoffset (C0934)
REF-ACTPOS
Fahrtstrecke
Fahrtstrecke
0
Fig. 3−152
3−162
Fahrtrichtung
Referenzpunkt
Direct homing; approaching the home position in CW rotation
l
3.2.56.3
Startpunkt
Mode 21 (C0932 = 21) is the same as mode 20 but additionally features:
– The actual position value (REF−ACTPOS) is stored when the mains is disconnected and
reloaded when the mains is connected.
Control via input signals
l
REF−ON = LOW−HIGH edge starts homing:
– The input must remain on HIGH until the end of the homing process. Homing is aborted if
the input is set to LOW before the home position is reached.
l
REF−ON = LOW interrupts homing:
– The drive is decelerated to zero speed along the ramp set under C0936.
– The inputs REF−N−IN and REF−PHI−IN are switched to the outputs REF−N−SET and
REF−PSET.
– Has no effect if homing is already completed (REF−BUSY = LOW).
l
REF−POS−LOAD = LOW−HIGH edge
– The profile generator accepts the angle at the input REF−ACTPOS−IN as starting value in the
actual position value REF−ACTPOS.
– The function is only active if REF−ON = LOW
– The function is only active in the modes 20 and 21.
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.56
3.2.56.4
3.2.56.5
l
Homing function (REF)
Output of status signals
l
REF−BUSY = HIGH: the homing function is active:
– The profile generator is switched to the outputs REF−PSET and REF−N−SET.
l
REF−BUSY = LOW: the homing function is not active nor is it completed:
– The inputs REF−N−IN and REF−PHI−IN are switched to the outputs REF−N−SET and
REF−PSET.
l
REF−OK = HIGH: homing has been completed successfully:
– Homing is completed when the setpoint of the profile generator has reached the home
position.
– If a following error is present, it is transferred into the function block DFSET and corrected
(see chapter 3.2.56.5), provided that the drive is not operated within the torque limitation.
l
REF−OK = LOW:
– Homing is currently being executed or
– the home position is no longer known, e.g. due to a failure, or
– homing has been interrupted.
Function block interconnection
l
REF−PSET provides the angle setpoint belonging to REF−N−SET (following error) for the angle
controller in the function block MCTRL.
– Faultless homing requires a processing of both signals (REF−PSET and REF−N−SET).
l
The homing function must be connected to the function block DFSET (see signal flow diagram
for the configurations 5000, 6000 and 7000).
– Otherwise accumulating angle errors may occur.
EDSVS9332S−EXT EN 2.0
3−163
Function library
Function blocks
3.2.57
3.2.57
Ramp function generator (RFG)
Ramp function generator (RFG)
Purpose
The ramp function generator limits the rise of signals.
RFG1
C0671
C0672
C0673
RFG1-IN
C0676/1
C0674
C0675
RFG1-OUT
0
RFG1-SET 1
C0676/2
RFG1-LOAD
C0677
Fig. 3−153
Ramp function generator (RFG1)
Signal
Name
RFG1−IN
RFG1−SET
RFG1−LOAD
RFG1−OUT
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
a
a
d
a
C0676/1
C0676/2
C0677
−
dec [%]
dec [%]
−
−
C0673
C0674
C0675
−
1
1
2
−
1000
1000
1000
−
−
−
−
−
Function
3−164
l
Calculation and setting of the times Tir and Tif
l
Loading of the ramp function generator
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.57
3.2.57.1
Ramp function generator (RFG)
Calculation and setting of the times Tir and Tif
The acceleration time and deceleration time refer to a change of the output value from 0 to 100 %.
The times Tir and Tif to be set can be calculated as follows:
[%]
RFG1−OUT
100 %
w2
w1
0
Fig. 3−154
t ir
t if
T ir
T if
T ir + t ir 100%
w2 * w1
T if + t if 100%
w2 * w1
t
Acceleration and deceleration times of the ramp function generator
tir and tif are the times desired for the change between w 1 and w2.The values for Tir and Tif can be
set under C0671 and C0672.
3.2.57.2
Loading of the ramp function generator
The ramp function generator can be initialised with defined values via the inputs RFG1−SET and
RFG1−LOAD.
l
l
As long as the input RFG1−LOAD = HIGH, the input RFG1−SET is switched to the output.
l
If the input RFG1−LOAD = LOW, the ramp function generator accelerates/decelerates from this
value to its input value within the set T i times.
EDSVS9332S−EXT EN 2.0
3−165
Function library
Function blocks
3.2.58
3.2.58
Sample and hold function (S&H)
Sample and hold function (S&H)
Purpose
The FB can save analog signals. The saved value is also available after mains switching.
C0570
C0571
S&H1-IN
S&H1
S&H S&H1-OUT
C0572
S&H1-LOAD
C0573
Fig. 3−155
Sample and hold function (S&H1)
Signal
Name
S&H1−IN
S&H1−LOAD
S&H1−OUT
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
a
d
a
C0572
C0573
−
dec [%]
bin
−
C0570
C0571
−
1
2
−
1000
1000
−
LOW = save
Function
l
With S&H1−LOAD = HIGH the signal at the input S&H1−IN is switched to the output
S&H1−OUT.
l
With S&H1−LOAD = LOW the output S&H1−OUT is disconnected from the input S&H1−IN and
outputs the value which was last valid.
Saving in the case of mains disconnection:
3−166
l
Keep S&H1−LOAD at LOW level when disconnecting the supply voltage (mains, DC bus or
terminal 59).
l
Keep S&H1−LOAD at LOW level when connecting the supply voltage (mains, DC bus or
terminal 59).
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.59
3.2.59
S−shaped ramp function generator (SRFG)
S−shaped ramp function generator (SRFG)
Purpose
The function block serves to direct the input signal via a jerk−limited ramp generator (S shape) in order
to avoid setpoint step−changes.
C1040
C1041
SRFG1
SRFG1-OUT
C1042
SRFG1-IN
C1045/1
C1043
C1044
SRFG1-DIFF
0
SRFG1-SET 1
C1045/2
SRFG1-LOAD
C1046
Fig. 3−156
S−shaped ramp function generator (SRFG1)
Source
Signal
Name
SRFG1−IN
SRFG1−SET
Note
Type
DIS
DIS format
CFG
List
a
a
C1045/1
C1045/2
dec [%]
dec [%]
C1042
C1043
1
1
input
Starting value for the ramp function generator, will be
accepted if SRFG1−LOAD = High
HIGH = accepts the value at SRFG1−SET and provides it
at SRFG1−OUT; SRFG1−DIFF always remains at 0 %
Output limited to ±100 %
Output limited to ±100 %, provides the acceleration of
the ramp function generator
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
SRFG1−LOAD
d
C1046
bin
C0144
2
SRFG1−OUT
SRFG1−DIFF
a
a
−
−
−
−
−
−
−
−
SRFG1−LOAD
l
l
Via digital input SRFG1−LOAD, the ramp function generator is loaded (set) with the signal from
SRFG1−SET.
l
This value is immediately accepted, i.e. there is no acceleration/deceleration via S shape (the
output skips to this value).
l
As long as SRFG−LOAD = HIGH, the ramp function generator remains inhibited.
EDSVS9332S−EXT EN 2.0
3−167
Function library
Function blocks
3.2.59
S−shaped ramp function generator (SRFG)
Function
The maximum acceleration and the jerk can be set separately.
SRFG1-IN
t
SRFG1-OUT
t
SRFG1-DIFF
(Beschleunigung)
C1040
t
C1040
C1041
Ruck
t
Fig. 3−157
Line diagram
l
Max. acceleration:
– C1040 applies to both the positive and the negative acceleration.
– Setting according to formula:
T irlin + 1s @
W 2[%] * W 1[%]
C1040[%]
n [% ]
W 2
W 1
T
ir lin
t [s ]
K35.0272
l
3−168
Jerk (C1041):
– The jerk is selected in [s] until the ramp function generator operates at max. acceleration
(see Fig. 3−157).
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.60
3.2.60
Output of digital status signals (STAT)
Output of digital status signals (STAT)
Purpose
The FB evaluates digital signals of function blocks and the status of the controller and passes them
on to C0150 and FB AIF−OUT and CAN−OUT1.
C0156/1
C0156/2
C0156/3
C0156/4
C0156/5
C0156/6
C0156/7
Fig. 3−158
STAT.B0
DCTRL-IMP
STAT.B2
STAT.B3
STAT.B4
STAT.B5
DCTRL-NACT=0
DCTRL-CINH
DCTRL-STAT*1
DCTRL-STAT*2
DCTRL-STAT*4
DCTRL-STAT*8
DCTRL-WARN
DCTRL-MESS
STAT.B14
STAT.B15
STAT
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
C0150
AIFStatusword
CAN1Statusword
Output of digital status signals (STAT)
Signal
Name
STAT.B0
STAT.B2
STAT.B3
STAT.B4
STAT.B5
STAT.B14
STAT.B15
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
d
d
d
d
d
d
d
−
−
−
−
−
−
−
bin
bin
bin
bin
bin
bin
bin
C0156/1
C0156/2
C0156/3
C0156/4
C0156/5
C0156/6
C0156/7
2
2
2
2
2
2
2
2000
5002
5003
5050
10650
505
500
Function
The status word consists of some fixedly linked (DCTRL−xxxx−) and some freely linkable signal inputs
(STAT.Bx).
l
l
Digital signal sources can be freely assigned to the inputs STAT.Bx.
l
The corresponding bit in the data word is marked with STAT.Bx (e.g. STAT.B0 for the LSB)
l
The status word is transferred to code C0150 and to the function blocks AIF−OUT and
CAN−OUT1.
l
The inputs with the name DCTRL−xxxx are directly accepted from the function block DCTRL.
( 3−57)
EDSVS9332S−EXT EN 2.0
3−169
Function library
Function blocks
3.2.61
3.2.61
Control of a drive network (STATE−BUS)
Control of a drive network (STATE−BUS)
Purpose
The FB controls the drive network to specified states (e.g. trip, quick stop or controller inhibit).
STATE-BUS
+10V
C0440
STATE-BUS-O
1
STATE-BUS
ST
ST
X5
C0441
Fig. 3−159
Control of a function block STATE−BUS
Source
Signal
Name
STATE−BUS
STATE−BUS−O
TERMINAL X5/ST
Note
Type
DIS
DIS format
CFG
List
Lenze
d
d
d
C0441
−
−
bin
−
−
C0440
−
−
2
−
−
1000
−
−
Function
The STATE−BUS is a device−specific bus system which is designed for Lenze controllers only. The
function block STATE−BUS acts on the terminals X5/ST or reacts on a LOW signal at these terminals
(multi−master capable).
l
Every connected controller can set these terminals to LOW.
l
All connected controllers evaluate the signal level at these terminals and control the internally
configured function blocks.
l
Up to 20 controllers can be connected.
Stop!
Do not apply an external voltage at terminals X5/ST.
3−170
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.62
3.2.62
Storage block (STORE)
Storage block (STORE)
Purpose
Stores a set phase signal created from a speed signal. The storage process is activated via the TP
input Ex.
1
0
C 1 2 1 0 /2
S T O R E 1
0
T P E in g a n g E 5
1
S T O R E 1 -E N T P
>_ 1
S T O R E 1 -T P -IN H
D
R
C 1 2 1 5 /2
C 1 2 1 0 /3
S T O R E 1 -E N W IN
&
C 1 2 1 5 /3
S T O R E 1 -M A S K V
C 1 2 1 2
>_ 1
_> M a s k v
C 1 2 1 7
S T O R E 1 -M A S K I
C 1 2 1 1 /2
C 1 2 1 6 /2
C 1 2 1 1 /1
S T O R E 1 -A C T
S T O R E 1 -IN
C
C 1 2 1 0 /1
C
S T O R E 1 -R E S E T
C 1 2 1 0 /4
C T R
>_ 1
R
C 1 2 1 5 /4
C 1 2 1 0 /5
R e g 2
R
C 1 2 1 5 /1
S T O R E 1 -L O A D 0
1
C
S T O R E 1 -P H 1
R e g 1
R
C 1 2 1 6 /1
S T O R E 1 -P H 2
+
S T O R E 1 -P H D IF F
2
C
L
R
S & H
S T O R E 1 -L O A D 1
C 1 2 1 5 /5
Fig. 3−160
Storage block (STORE1)
Signal
Name
l
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
STORE1−IN
STORE1−RESET
STORE1−ENTP
phd
d
d
C1216/1
C1215/1
C1215/2
dec [rpm]
bin
bin
C1211/1
C1210/1
C1210/2
4
2
2
1000
1000
1000
STORE1−MASKI
STORE1−MASKV
STORE1−ENWIN
phd
ph
d
C1216/2
C1217
C1215/3
dec [rpm]
dec [inc]
bin
C1211/2
C1212
C1210/3
4
3
2
1000
1000
1000
STORE1−LOAD0
d
C1215/4
bin
C1210/4
2
1000
HIGH = resets the counter which controls
the output at STORE1−PHDIFF
STORE1−LOAD1
d
C1215/5
bin
C1012/5
2
1000
LOW−HIGH edge = sets the counter = 1
which controls the output to
STORE1−PHDIFF
EDSVS9332S−EXT EN 2.0
−
HIGH = resets all functions
HIGH = enables the triggering via the
TP input E5
−
−
HIGH = signal enable when
| STORE1−MASKI | w STORE1−MASKV
3−171
Function library
Function blocks
3.2.62
Storage block (STORE)
Type
DIS
DIS format
CFG
List
Lenze
STORE1−ACT
STORE1−PH1
STORE1−PH2
Name
ph
ph
ph
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
Outputs the currently integrated value
Outputs the last value stored by X5/E5
Outputs the last but one value stored by
X5/E5
STORE1−PHDIFF
ph
−
−
−
−
−
Outputs the difference of STORE1−PH1 and
STORE1−PH2
STORE1−TP−INH
d
−
−
−
−
−
HIGH = triggering via TP input E5 has been
done. For another triggering a positive edge
must be activated at the input
STORE1−ENTP.
0
S T O R E 2 -E N T P
C 1 2 2 0 /2
S T O R E 2
0
T P E in g a n g E 4
1
1
S T O R E 2 -T P -IN H
D
R
>_ 1
C 1 2 2 3 /2
S T O R E 2 -A C T
M C T R L -P H I-A C T
C
C
S T O R E 2 -R E S E T
C 1 2 2 0 /1
S T O R E 2 -P H 1
R e g 1
R
R
S T O R E 2 -P H 2
R e g 2
C 1 2 2 3 /1
Fig. 3−161
Storage block (STORE2)
Signal
Name
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
STORE2−RESET
STORE2−ENTP
d
d
C1223/1
C1223/2
bin
bin
C1220/1
C1220/2
2
2
1000
1000
STORE2−ACT
STORE2−PH1
STORE2−PH2
ph
ph
ph
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
STORE2−TP−INH
d
−
−
−
−
−
HIGH = resets all functions
HIGH = enables the triggering via the
TP input E4 free
Outputs the currently integrated value
Outputs the last value stored by X5/E5
Outputs the last but one value stored by
X5/E5
HIGH = triggering via TP input E4 has been
done. For another triggering a positive edge
must be activated at the input
STORE1−ENTP.
Function
3−172
l
STORE1 control via TP input E5
l
Storing STORE1 phase signal
l
Storing STORE2 phase signal
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.62
3.2.62.1
Storage block (STORE)
STORE1 control via TP input E5
The trigger signal STORE1−TP−INH indicates a triggering done via the TP input E5 with a HIGH signal
(LOW−HIGH edge at X5/E5). At the same time it is signalled with STORE1−TP−INH that the triggering
is deactivated and must be reset to the active state. This can be done via
l
STORE1−RESET = HIGH
l
STORE1−ENTP = LOW−HIGH edge
l
STORE1−ENWIN = HIGH and the comparison of phase signals
Comparison of phase signals
A phase signal is created from the speed signal at STORE1−MASKI and is compared with the phase
signal at STORE1−MASKV.
If the condition | STORE1−MASKI | w STORE1−MASKV
is fulfilled,
l
l
the TP input E5 is enabled for the next triggering with STORE1−ENWIN = HIGH,
l
the integrator for the speed signal at STORE1−MASKI is reset.
EDSVS9332S−EXT EN 2.0
3−173
Function library
Function blocks
3.2.62
3.2.62.2
Storage block (STORE)
Storing STORE1 phase signal
A phase signal is created from a speed signal at STORE1−IN. The following sequence shows, in
addition to storing, the options of signal output
l
The actual phase signal is output at STORE1−ACT.
1. A LOW−HIGH edge at the TP input E5 stores the last phase signal and outputs it at
STORE1−PH1.
2. STORE1−ENTP = LOW−HIGH edge enables the TP input E5 for the next triggering.
3. A renewed LOW−HIGH edge at the TP input E5 stores the last phase signal.
– STORE1−PH1 outputs this last phase signal.
– STORE1−PH2 outputs the last but one phase signal.
– STORE1−PHDIFF outputs the difference of STORE1−PH1 and STORE1−PH2.
l
STORE1−RESET = HIGH resets memory, counter and integrators and activates the TP input
for triggering.
Output of the difference between both phase signals stored
l
A two−stage counter controls the output to STORE1−PHDIFF.
l
Every second triggering via the TP input results in a new output to STORE1−PHDIFF.
l
STORE1−LOAD0 = HIGH resets the counter.
Additional control
1. STORE1−LOAD1 = LOW−HIGH edge, sets the counter to the first stage (preparation for the
output to STORE1−PHDIFF).
2. Triggering via TP input E5 sets the counter to the second stage (output to STORE1−PHDIFF is
done).
Tip!
If STORE1−LOAD1 is set cyclically, STORE1−PHDIFF outputs a new difference signal after every
triggering.
3.2.62.3
Storing STORE2 phase signal
A phase signal is created from a speed signal at MCTRL−PHI−ACT. The following sequence shows,
in addition to storing, the options of signal output.
l
The actual phase signal is output to STORE2−ACT.
1. A LOW−HIGH edge at the TP input E4 stores the last phase signal and outputs it at
STORE2−PH1.
2. STORE2−ENTP = LOW−HIGH edge activates the TP input E4 for the next triggering.
3. A renewed LOW−HIGH edge at the TP input E4 stores the last phase signal.
– STORE2−PH1 outputs this last phase signal.
– STORE2−PH2 outputs the last but one phase signal.
l
3−174
STORE2−RESET = HIGH resets the memory and integrator and activates the TP input E4 for
triggering.
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.63
3.2.63
Multi−axis synchronisation (SYNC1)
Multi−axis synchronisation (SYNC1)
Purpose
Synchronises the control program cycle of the drives to the cycle of a master control.
C
C 1
C 1
C
C 1
C 1
X 4
X 5 -E 5
C 1 1 2 4
C 1 1 2 5
C 1 1 2 6
1 1
1 2
1 2
1 1
1 2
1 2
2 0
1 /1
1 /2
2 2
3 /1
3 /2
C LK
S Y N C 1
S Y N C 1 -S T A T
S Y N C 1 -IN 1
S Y N C 1 -O U T 1
C 1 1 2 7
S Y N C 1 -IN 2
S Y N C 1 -O U T 2
C 1 1 2 8
S Y N C 1 -IN 3
S Y N C 1 -O U T 3
C 1 1 2 9
C 0 3 6 3
Signal
Name
l
Source
Note
Type
DIS
DIS format
CFG
List
Lenze
SYNC1−IN1
SYNC1−IN2
SYNC1−IN3
SYNC1−STAT
a
ph
a
d
C1127
C1128
1129
−
dec [inc]
dec [inc]
dec
−
C1124
C1125
C1126
−
1
3
1
−
1000
1000
1000
−
SYNC1−OUT1
phd
−
−
−
−
−
SYNC1−OUT2
ph
−
−
−
−
−
SYNC1−OUT3
a
−
−
−
−
−
EDSVS9332S−EXT EN 2.0
−
−
After the synchronisation is completed,
SYNC1−STAT switches to HIGH.
If the synchronisation is quit,
SYNC1−STAT switches to LOW.
Cannot be used for angle−accurate
speed/angle difference transmission
With interpolation, for cyclically
synchronised position information
With interpolation, for analog values
3−175
Function library
Function blocks
3.2.63
Multi−axis synchronisation (SYNC1)
Function
3.2.63.1
l
Possible axis synchronisations (chapter 3.2.63.1)
l
Cycle times (chapter 3.2.63.2)
l
Phase displacement (chapter 3.2.63.3)
l
Synchronisation window for synchronisation via terminal (SYNC WINDOW) (chapter 3.2.63.4)
l
Correction value of phase controller (SYNC CORRECT) (chapter 3.2.63.5)
l
Fault indications (chapter 3.2.63.6)
l
Configuration examples (chapter 3.2.63.7)
l
Scaling (chapter 3.2.63.8)
Possible axis synchronisations
Operating mode
Code
C1120
Value
0
1
2
Function
FB without function.
Assigns the data at the inputs directly to the outputs.
CAN Sync active
Synchronises the controllers to the sync telegram of the system bus.
Terminal Sync active
Synchronises the controllers to the sync signal of terminal X5/E5.
Synchronisation time
In addition to certain mains connection and initialisation time of the controller, the FB SYNC1 also
requires a synchronisation time.
The synchronisation time depends on
3−176
l
the baud rate of the system bus (CAN−SYNC),
l
the starting time (reception of the first SYNC telegram / signal),
l
the time between the SYNC telegrams,
l
the SYNC correction factor (C0363),
l
the operating mode of the FB SYNC1.
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.63
Multi−axis synchronisation (SYNC1)
Axis synchronisation via system bus (CAN)
The system bus (CAN) transmits the sync telegram and the process signals.
Application examples:
l
Selection of cyclic, synchronised position setpoint information for multi−axis positioning via the
system bus (CAN).
C A N -IN 3
C A N -IN 3 .B 1 6
C A N -IN 3 .B 1 7
C 0 8 6 3 /6
B y te 3 ,4
C A N -IN 3 .B 3 0
C A N -IN 3 .B 3 1
B y te 5 ,6
1 6 B it
H ig h W o r d
Fig. 3−162
X 4
C 1 1 2 4
1 6 B it
L o w W o rd
S y te m b u s
X 4
C 1 1 2 0
C 1 1 2 1
C 1 1 2 2
...
1 6 b in a r y
s ig n a ls
C A N -IN 3 .D 1
C 1 1 2 5
C 0 8 6 7 /3
C 1 1 2 6
C L K
S Y N C 1
S Y N C 1 -S T A T
S Y N C 1 -IN 1
S Y N C 1 -O U T 1
C 1 1 2 7
S Y N C 1 -IN 2
S Y N C 1 -O U T 2
C 1 1 2 8
S Y N C 1 -IN 3
S Y N C 1 -O U T 3
P O S -P S E T -E X T
C 1 1 2 9
C A N -IN 3 .W 3
1 6 B it
C 0 8 6 6 /1 0
Example for linking the FB SYNC1
Axis synchronisation via terminal control (X5/E5)
The transmission paths for the sync signal and the process signals are separated.
l
The process signals are connected via a freely selectable input channel (e. g. AIF interface, DF
input).
l
The sync signal is injected via terminal X5/E5.
Application examples:
l
l
Selection of cyclic, synchronised position setpoint information for multi−axis positioning via
other bus systems (e. g. Interbus).
l
Synchronisation of the internal processing cycles of the FB to higher−level process controls.
EDSVS9332S−EXT EN 2.0
3−177
Function library
Function blocks
3.2.63
3.2.63.2
Multi−axis synchronisation (SYNC1)
Cycle times
Sync cycle time (SYNC CYCLE)
The master (e. g. PLC) sends the periodic sync telegram1) (sync signal2)).
The controllers (slaves) receive the sync telegram and compare the time between two LOW−HIGH
edges of the signal with the selected cycle time (1121/1).
The cycle time is entered in integers (1 ms, 2 ms, 3 ms, ...).
1)
2)
Designation for the synchronisation via system bus (CAN)
Designation for the synchronisation via terminal
Code
C1121/1
3−178
Value
1 ... 13 ms
Function
Definition of the cycle time of the sync telegram (sync signal).
Parameters must only be set for the slave.
· C1120 = 1 (CAN sync)
– Time between two sync telegrams of the master. Adapt the time to the master SYNC. C0362
indicates the time (CAN sync cycle) for the slave. Set the value in C1121/1 higher than the value in
C0362.
· C1120 = 2 (terminal SYNC)
– Time between two sync signals of the master at X5/E5. Adapt the time to the master SYNC. Set the
value in C1121/1 w the cycle time of the master.
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.63
Multi−axis synchronisation (SYNC1)
Interpolation cycle time (INTPOL. CYCLE)
The FB interpolates the input signals (C1124, C1125, C1126) between the sync telegrams or sync
signals and transmits them to the corresponding output. This ensures an optimum signal course with
regard to the internal processing cycle (e. g. minimising signal jumps in the output variable when
operating with high sync cycles).
The interpolation is restarted with every sync signal (LOW−HIGH edge).
Code
C1121/2
Value
1 ... 13 ms
Function
Definition of the interpolation cycles/steps
· C1120 = 1
– C1121/2 has no effect.
– The interpolation cycles are derived from the sync cycle (C1121/1).
· C1120 = 2
– The interpolation cycle can be selected irrespective of the sync cycle.
– The parameter setting of C1121/2 must be selected according to the cycle of the process value
input.
CANNEL 3
SYNC1-OUT3
[x.x%; 1ms]
GND3
CANNEL 2
SYNC1-IN3
[x.x%; 1ms]
GND2
CANNEL 1
SYNC - SIGNAL
[10V; 1ms]
GND1
TINTPOL
TSYNC
9300kur095
Fig. 3−163
Interpolation example
See Fig. 3−163:
An analog value at SYNC1−IN3 is output as an interpolated value at SYNC1−OUT3.
l
l
Sync cycle (C1121/1) = 4 ms
l
Interpol. cycle (C1121/2) = process cycle = 2 ms
l
Phase displacement (C1123/1) = 0 ms
EDSVS9332S−EXT EN 2.0
3−179
Function library
Function blocks
3.2.63
3.2.63.3
Multi−axis synchronisation (SYNC1)
Phase displacement
Phase displacement for synchronisation via system bus (SYNC TIME)
Code
C1122
Value
0 ...10.000 ms
Function
· C1120 = 1
– Phase displacement between the sync telegram and the start of the internal control program.
– The parameters are set automatically depending on the parameter setting of the system bus (CAN).
· C1120 = 2
– C1122 has no effect.
Phase displacement for synchronisation via terminal (PHASESHIFT)
Code
C1123/1
3.2.63.4
Value
−1.000 ms
to
+1.000 ms
Function
· C1120 = 1
– C1123/1 has no effect.
· C1120 = 2
– Phase displacement between the sync signal and the start of the internal control program (e. g. for
compensating the effects of signal propagation delays/dead times for the sync signal of the single
slave drives).
Time slot for synchronisation via terminal
Code
C1123/2
Value
0 ... 1.000 ms
Function
· C1120 = 1
– C1123/2 has no effect.
· C1120 = 2
– Definition of a "time slot" for the LOW−HIGH edges of the sync signal for the slave (defined via
C1121/1).
– If the sync signal sent by the master is within the "time slot", the SYNC1−STAT is switched to HIGH.
S Y N C - W in d o w
(C 1 1 2 3 /2 )
S Y N C - S ig n a l
S Y N C - C y c le ( C 1 1 2 1 /1 )
Fig. 3−164
Time slot" for the LOW−HIGH edges of the sync signal
Tip!
A jitter of up to ±200 μs on the LOW−HIGH edges of the sync signal is permissible. The size of the
jitter affects the parameter setting of the "time slot".
3−180
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.63
3.2.63.5
Multi−axis synchronisation (SYNC1)
Correction value of the phase controller
Code
C0363
3.2.63.6
Value
1 ... 5
Function
· Correction values for C0363 =
1 ® 0.8 ms
2 ® 1.6 ms
3 ® 2.4 ms
4 ® 3.2 ms
5 ® 4.0 ms
· C1120 = 1
– The value is automatically derived from the internal parameters of the system bus (CAN).
· C1120 = 2
– Optimising the rise time of the phase controller depending on the frequency of the sync signal.
– Increase the value if the frequency of the sync signal decreases.
– A stable signal at SYNC1−STAT is an indicator for an optimal parameter setting.
Fault indications
Fault indications for the synchronisation via system bus
Fault
P16
Cause
Controller was enabled in an unsynchronised
state (SYNC1−STAT = LOW)
The time between two sync telegrams is
faulty
Remedy
Only enable the controller when SYNC1−STAT = HIGH
C0362 indicates the time between two sync telegrams
· Set the time in C1121/1 to the time in C0362
· Adapt the time interval of the sync telegram from the master
Fault indications for the synchronisation via terminal
Fault
P16
l
Cause
Controller was enabled in an unsynchronised
state (SYNC1−STAT = LOW)
Sync signal is missing
The period of the sync signal is not a multiple
of 1 ms
Sync window is too small
Remedy
Only enable the controller when SYNC1−STAT = HIGH
Connect sync signal with terminal X5/E5
Adapt the period
Adapt C1123/2 to the conditions
EDSVS9332S−EXT EN 2.0
3−181
Function library
Function blocks
3.2.63
3.2.63.7
Multi−axis synchronisation (SYNC1)
Configuration examples
Configuration example CAN−SYNC
Observe the following order for commissioning:
Step
1.
2.
3.
Where
−
−
CAN master
4.
5.
6.
7.
8.
CAN slave drives
CAN master
CAN slave drives
9.
10.
11.
12.
13.
Operation
Commission controller and system bus without FB SYNC1
Inhibit controller
Define the sequence of the telegrams
1. Send new setpoint to all slaves
2. Send sync telegram
3. All slaves must respond
Enter FB SYNC1 into the first position of the processing table
Parameterise the signal assignment of the inputs at FB SYNC1
Select C1120 = 1 (sync mode for FB SYNC1)
Start communication, send sync telegrams
FB SYNC1 (CAN SYNC−CYCLE)
· Retrieve cycle time of the SYNC telegram from the master via C0362
FB SYNC1 (SYNC CYCLE)
· Set C1121 according to the time interval of the sync telegrams from the control
· Set C1121 w C0362
Parameterise the monitoring function P16 via C1290
Connect the output signals of SYNC1 with the required inputs of the corresponding FB
Via FB DIGOUT
· Detect signal of SYNC1−STAT
Only enable the controller when SYNC1−STAT = HIGH
Configuration example TERMINAL−SYNC
Observe the following order for commissioning:
Step
1.
2.
3.
4.
5.
6.
7.
8.
Where
−
−
Slave drives
Sync master
Slave drives
9.
10.
11.
12.
13.
3.2.63.8
Operation
Commission controller without FB SYNC1
Inhibit controller
Enter FB SYNC1 into the first position of the processing table
Apply sync signal to terminal X5/E5
Parameterise the signal assignment of the inputs at FB SYNC1
Select C1120 = 2 (sync mode for FB SYNC1)
Start communication, send sync signals
FB SYNC1 (SYNC CYCLE)
· Parameterise the sync cycle time of the sending source via C1121
Parameterise the monitoring function P16 via C1290
Connect the output signals of SYNC1 with the required inputs of the corresponding FB
Via FB DIGOUT
· Output signal of SYNC1−STAT
FB SYNC1 (SYNC WINDOW)
· Enter the optimal size of the "time slot" via C1123/2
· If the sync signal jitters strongly, increase the "time slot"
Only enable the controller when SYNC1−STAT = HIGH
Scaling
The signal at input is transmitted in a scaled form to SYNC1−OUT1.
Scaling formula:
SYNC1−OUT1[rpm] + SYNC1−IN1[inc] @
1875rpm
2048inc
The inputs SYNC1−IN2 and SYNC1−IN3 are not scaled. The FB transmits the data to SYNC1−OUT2
or SYNC1−OUT3 without any evaluation.
3−182
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.64
3.2.64
Edge evaluation (TRANS)
Edge evaluation (TRANS)
Purpose
This function is used to evaluate digital signal edges and convert them into pulses of a defined
duration.
C0710
C0713
TRANS1-IN
TRANS1-OUT
0
C0714
Fig. 3−165
Source
Signal
TRANS1−IN
TRANS1−OUT
Note
Type
DIS
DIS format
CFG
List
Lenze
d
d
C0714
−
bin
−
C0713
−
2
−
1000
−
C0715
C0718
−
−
TRANS2
C0716
TRANS2-IN
TRANS2-OUT
0
C0719
t
Edge evaluation (TRANS2)
Source
Signal
Name
TRANS2−IN
TRANS2−OUT
Note
Type
DIS
DIS format
CFG
List
Lenze
d
d
C0719
−
bin
−
C0718
−
2
−
1000
−
C 1 1 4 0
C 1 1 4 3
−
−
T R A N S 3
C 1 1 4 1
T R A N S 3 -IN
T R A N S 3 -O U T
0
C 1 1 4 4
Fig. 3−167
t
Edge evaluation (TRANS1)
Name
Fig. 3−166
TRANS1
C0711
t
Edge evaluation (TRANS3)
Source
Signal
Name
TRANS3−IN
TRANS3−OUT
Note
Type
DIS
DIS format
CFG
List
Lenze
d
d
C1144
−
bin
−
C1143
−
2
−
1000
−
C 1 1 4 5
C 1 1 4 8
−
−
T R A N S 4
C 1 1 4 6
T R A N S 4 -IN
T R A N S 4 -O U T
0
C 1 1 4 9
t
FB_trans4
Fig. 3−168
Signal evaluation (TRANS4)
Source
Signal
Name
TRANS4−IN
TRANS4−OUT
l
Note
Type
DIS
DIS format
CFG
List
Lenze
d
d
C1149
−
bin
−
C1148
−
2
−
1000
−
EDSVS9332S−EXT EN 2.0
−
−
3−183
Function library
Function blocks
3.2.64
Edge evaluation (TRANS)
Function
This FB is an edge evaluator which can be retriggered. This FB can react to different events. The
following functions can be selected under code C0710 or C0716:
3.2.64.1
l
Positive edge
l
Negative edge
l
Positive or negative edge
Evaluate positive edge
TRANS1−IN
C0711
C0711
t
TRANS1−OUT
t
Fig. 3−169
3.2.64.2
Evaluation of positive edges (TRANS1)
l
The output TRANSx−OUT is set to HIGH as soon as a LOW−HIGH edge is sent to the input.
l
After the time set under C0711 or C0716 has elapsed, the output changes again to LOW
unless there is another LOW−HIGH edge at the input.
Evaluate negative edge
TRANS1−IN
C0711
C0711
t
TRANS1−OUT
t
Fig. 3−170
3−184
Evaluation of negative edges (TRANS1)
l
The output TRANSx−OUT is set to HIGH as soon as a HIGH−LOW edge is sent to the input.
l
After the time set under C0711 or C0716 has elapsed, the output changes again to LOW,
unless there is another HIGH−LOW edge at the input.
EDSVS9332S−EXT EN 2.0
l
Function library
Function blocks
3.2.64
3.2.64.3
Edge evaluation (TRANS)
Evaluate positive or negative edge
TRANS1−IN
C0711
C0711
t
TRANS1−OUT
t
Fig. 3−171
l
Evaluation of positive and negative edges (TRANS1)
l
The output TRANSx−OUT is set to HIGH as soon as a HIGH−LOW edge or a LOW−HIGH edge
is sent to the input.
l
After the time set under C0711 or C0716 has elapsed, the output changes again to LOW
unless there is another HIGH−LOW edge or LOW−HIGH edge at the input.
EDSVS9332S−EXT EN 2.0
3−185
Function library
Function blocks
3.2.64
3−186
Edge evaluation (TRANS)
EDSVS9332S−EXT EN 2.0
l
Application examples
4
Application examples
Contents
4.1
Important notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−3
4.2
Speed control (C0005 = 1000) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−4
4.3
Torque control with speed limitation (C0005 = 4000) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−7
4.4
Master frequency − Master − Drive (C0005 = 5000) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−9
4.5
Master frequency bus − slave − drive (C0005 = 6000) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−12
4.6
Master frequency cascade − slave − drive (C0005 = 7000) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−14
l
EDSVS9332S−EXT EN 2.0
4−1
Application examples
4−2
EDSVS9332S−EXT EN 2.0
l
Application examples
4.1
4.1
Important notes
Important notes
Signal processing in the controller is saved in basic configurations for common applications.
l
You can select and activate the basic configurations via C0005 and adapt them with only a
few settings to your application (short setup). ( 2−4)
l
The setting of the motor data and the adaptation of the motor control is generally independent
of the configuration and is described in chapter "Commissioning".
Configuration
1xxx
4xxx
5xxx
6xxx
7xxx
)
Basic function
Speed control
Torque control with speed limitation
Master for digital frequency coupling
Slave to digital frequency bus
Slave to digital frequency cascade
4−4
4−7
4−9
4−12
4−14
Note!
The GDC and the keypad include the most important codes for the basic
configurations in the Short setup" menus.
l
EDSVS9332S−EXT EN 2.0
4−3
Application examples
4.2
4.2
Speed control (C0005 = 1000)
Speed control (C0005 = 1000)
Tip!
The most important settings can be found in the menu: "Short Setup / Speed mode" of the XT keypad
or in the menu "Short setup / Speed mode" in Global Drive Control.
Enter motor type (contains all nameplate data of the motor)
C0173
xxx
Enter UG limit (mains voltage)
C0086
000
Enter motor data manually
Enter maximum motor current
C0022
xxxA
Determine Imax
Enter controller configuration
C0005
1000
Select speed control
C0025
xxx
Enter feedback system
Speed setpoint settings
C0011
xxx rpm
Determine max. speed
C0012
xxx s
Set acceleration time
C0013
xxx s
Set deceleration time
C0105
xxx s
Set QSP deceleration time
Application parameters
C0070
xxx
Vp n−controller
C0071
xxx
Tn n−controller
Save parameters
C0003
4−4
xxx
Save all parameters
EDSVS9332S−EXT EN 2.0
l
Fig. 4−1
l
DIGIN1
C0027/1
EDSVS9332S−EXT EN 2.0
C0896
C0891
FIXED0%
FIXED0%
X8
X7
ENCODER
RESOLVER
C0897
FIXED0
C0898
C0895
C0894
C0890
C0901
C0902
C0899
FIXED0%
FIXED0INC
FIXED0%
FIXED0
C0892
C0893
*-1
ANEG
C0027/2
MCTRL-HI-M-LIM
MCTRL-PHI-SET
C0906/1
MCTRL-N-SET
C0906/6
C0907/1
C0906/5
C0254
C0420
C0490
C0495
C0025
C0051
Actual speed
C0906/7
0
1
C0011
Phase controller
100%
MCTRL-FLD-WEAK C0906/2
MCTRL-M-ADD
MCTRL-N2-LIM
MCTRL-PHI-ON
MCTRL-PHI-LIM
C0908
C0906/8
C0907/4
C0907/2
C0906/3
QSP decel. ramp
MCTRL-I-SET
MCTRL-I-LOAD
MCTRL-N/M-SWT
C0906/4
C0907/3
DCTRL-QSP
MCTRL-QSP-OUT
FIXED0
MCTRL-LO-M-LIM
C0105
0
1
1
FIXED0
FIXED0
QSP
MCTRL-NSET2
ASW1
C0812/1
MCTRL-QSP
FIXED0%
C0034
C0900
+
+
AIN2
+
+
AIN1
TRIP-RESET
DIGIN5
R/L
TRIP-SET
L
QSP
R/L/Q
DIGIN4
R/L/Q-QSP
C0026/2
C0026/1
1
0
C0114/1...5 DIGIN2
DIGIN3
DIGIN
R
1
C0497
+
+
0
15
0
15
+
-
+
C0072
C0070
C0071
1
0
1
+
*-1
1
0
C0130
+
C0049
C0799/2
C0799/3
C0798/2
TI 0...15
*-1
0
0
1
C0134
C0182
/
*
NSET-NOUT
NSET-RFG-I=0
200%
C0241
x/(1-y)
C0190
x
y +
Linking of main
and additional
setpoint
NSET
CONST
C0086
MCTRL-MACT
MCTRL-DCVOLT
MCTRL-IMAX
MCTRL-IACT
MCTRL-MMAX
MCTRL-MSET1
MCTRL-MSET2
MCTRL-NSET2
C0018
MCTRL-PHI-ANG
MCTRL-NACT
MCTRL-PHI-ACT
MCTRL-PHI-ANA
C0006
C0022
C0075
C0076
C0077
C0078
C0081
C0084
C0085
C0087
C0088
C0089
C0090
C0091
VECT-CTRL PWM
C0056
C0050
Current controller
MCTRL-QSP-OUT
MCTRL
C0680
C0681
C0683/1
CMP1
C0017
FIXED0
FIXED-PHI-0
Ramp generator additional setpoint
CINH
Torque
limitation
C0220/
C0221
CINH
S-shape
Ramp generator main setpoint
C0045
C0103/15
C0103/1
C0103/2
C0101/1
C0101/2
C0101/15
C0013
C0012
JOG1...15
C0039/15
C0039/1
C0039/2
C0799/1
Speed
limitation
C0042
NSET-NADD
NSET-NADD-INV
3
0
3
C0046
DMUX
0
C0799/13
C0798/1
C0799/12
DMUX
NSET-LOAD
NSET-SET
NSET-TI*1
NSET-TI*2
NSET-TI*4
NSET-TI*8
NSET-JOG*1
NSET-JOG*2
NSET-JOG*4
NSET-JOG*8
NSET-N
NSET-N-INV
NSET-RFG-0
NSET-RFG-STOP
NSET-CINH-VAL
Speed
controller
C0909
C0782
C0783
C0786
C0785
C0788/1
C0788/2
C0788/3
C0788/4
C0787/1
C0787/2
C0787/3
C0787/4
C0780
C0781
C0789
C0790
C0784
X8
X9
C0547
C0549
DFOUT-AN-IN
RDY
MMAX
TRIP
NACT=0
C0548
+
DIGOUT
2
3
4
5
1
0
C0540
DFOUT-OUT
0
1
+
A1
A2
A3
A4
X5
DFOUT
C0434/2
C0434/3
AOUT1-OFFSET
AOUT1-GAIN
62
X6
63
X6
X10
C434/1 AOUT1
+
AOUT1-IN
C0439/2
C0439/3
AOUT2-OFFSET
AOUT2-GAIN
C439/1 AOUT2
+
AOUT2-IN
C0118/1...4
C0545
CTRL
C0030
C0540
DIGOUT1
DIGOUT2
DIGOUT3
DIGOUT4
DFOUT-SYN-RDY
X5 E5
C0544
C0541
C0542
DFOUT-DF-IN
C0432
C0433
C0431
C0437
C0438
C0436
4.2
FIXED100%
C0472/3
3
4
X6
1
2
X6
E1
E2
E3
E4
E5
X5
MCTRL-NACT
Application examples
Speed control (C0005 = 1000)
Signal flow diagram for configuration 1000
9300STD322
4−5
Application examples
4.2
Speed control (C0005 = 1000)
M a in s s w itc h
L 1
L 2
L 3
N
P E
M a in s fu s e
O F F
M a in s
c o n ta c to r
O N
K 1
K 1
M a in s c h o k e
L
J
K
R B
K 1
F 1
L 1 L 2 L 3
U
V
W
P E
P E
9 3 X X
X 6
X 7
1
2
3
+ U G
4
F 2
-U G
-U G
+ U G
P E
9 3 5 2
X 5
P E
2 8
E 1 E 2 E 3 E 4 E 5
3 9 A 1 A 2 A 3 A 4
R B 1 R B 2
5 9
+
=
R F R
-
R
L
K 1
M
3 ~
R
R B
Q S P
J
R B
T R IP -S E T
M o to r
9300std016
Fig. 4−2
Connection diagram of configuration 1000
Tip!
A braking unit is only required if the DC−bus voltage in the 93XX servo inverter exceeds the upper
switch−off threshold set in C0173 when operating in generator mode (activation of the monitoring
function "OU"). The braking unit prevents "OU" from being activated by converting the kinetic energy
of the machine into heat which prevents the DC−bus voltage from exceeding the upper switch−off
threshold.
4−6
EDSVS9332S−EXT EN 2.0
l
Application examples
4.3
4.3
Torque control with speed limitation (C0005 = 4000)
Torque control with speed limitation (C0005 = 4000)
Tip!
The most important settings can be found in the menu: "Short Setup / Speed mode" of the operating
module or in the menu "Short setup / Speed mode" in Global Drive Control.
Enter motor type (contains all nameplate data of the motor)
C0173
xxx
Enter UG limit (mains voltage)
C0086
000
Enter motor data manually
Enter maximum motor current
C0022
xxxA
Determine Imax
Enter controller configuration
C0005
4000
Select torque control
C0025
xxx
Enter feedback system
Speed setpoint settings
C0011
xxx rpm
Determine max. speed
C0105
xxx s
Set QSP deceleration time
Speed limitation
C0472/4
xxx % nmax
Determine lower speed limit
Application parameters
C0070
xxx
Vp n−controller
C0071
xxx
Tn n−controller
Save parameters
C0003
l
xxx
Save all parameters
EDSVS9332S−EXT EN 2.0
4−7
Fig. 4−3
4−8
C0472/3
3
4
X6
1
2
X6
EDSVS9332S−EXT EN 2.0
AIN2
C0901
FIXED0%
C0896
C0472/4
X8
X7
ENCODER
C0897
FIXED0
FIXED100%
C0895
FIXED0%
C0898
C0891
C0894
FIXED0INC
C0890
C0902
FIXED0
C0892
C0893
C0900
C0027/2
C0899
RESOLVER
+
+
C0027/1
MCTRL-PHI-SET
C0906/1
C0906/8
C0907/4
C0907/2
C0906/3
C0906/4
C0906/6
C0907/1
C0906/5
C0254
1
C0420
C0490
C0495
C0906/7
C0025
C0051
Actual speed
0
C0011
Phase controller
100%
MCTRL-FLD-WEAK C0906/2
MCTRL-M-ADD
MCTRL-N2-LIM
MCTRL-PHI-ON
MCTRL-PHI-LIM
C0908
1
QSP decel. ramp
MCTRL-N-SET
C0105
MCTRL-I-SET
MCTRL-I-LOAD
MCTRL-N/M-SWT
MCTRL-LO-M-LIM
C0907/3
DCTRL-QSP
1
C0497
+
+
C0909
0
15
0
15
+
-
+
-
C0072
C0070
C0071
0
1
+
*-1
0
1
1
0
C0130
+
C0049
C0799/2
C0799/3
C0798/2
TI 0...15
*-1
0
1
C0134
C0182
S-shape
/
*
NSET-NOUT
NSET-RFG-I=0
200%
Linking of main
and additional
setpoint
C0241
x/(1-y)
x
y +
C0190
NSET
CONST
C0086
MCTRL-MACT
MCTRL-DCVOLT
MCTRL-MSET1
MCTRL-MSET2
MCTRL-IMAX
MCTRL-IACT
MCTRL-MMAX
MCTRL-NSET2
C0018
MCTRL-PHI-ANG
MCTRL-NACT
MCTRL-PHI-ACT
MCTRL-PHI-ANA
C0006
C0022
C0075
C0076
C0077
C0078
C0081
C0084
C0085
C0087
C0088
C0089
C0090
C0091
VECT-CTRL PWM
C0056
C0050
Current controller
MCTRL-QSP-OUT
MCTRL
C0680
C0681
C0683/1
CMP1
C0017
FIXED0
FIXED-PHI-0
Ramp generator additional setpoint
CINH
Torque
limitation
C0220/
C0221
CINH
Ramp generator main setpoint
C0045
C0103/15
C0103/1
C0103/2
C0101/1
C0101/2
C0101/15
C0013
C0012
JOG1...15
C0039/15
C0039/1
C0039/2
C0799/1
Speed
limitation
C0042
NSET-NADD
NSET-NADD-INV
3
0
3
C0046
DMUX
0
C0799/13
C0798/1
C0799/12
DMUX
NSET-LOAD
NSET-SET
NSET-TI*1
NSET-TI*2
NSET-TI*4
NSET-TI*8
NSET-JOG*1
NSET-JOG*2
NSET-JOG*4
NSET-JOG*8
NSET-N
NSET-N-INV
NSET-RFG-0
NSET-RFG-STOP
NSET-CINH-VAL
Speed
controller
C0782
C0783
C0786
MCTRL-QSP-OUT
FIXED0
C0785
C0788/1
C0788/2
C0788/3
C0788/4
C0787/1
C0787/2
C0787/3
C0787/4
C0780
C0781
C0789
C0790
C0784
MTCRL-NSET2
MCTRL-HI-M-LIM
MCTRL-QSP
C0034
TRIP-RESET
DIGIN5
R/L
QSP
TRIP-SET
AIN1
+
+
R
L
DIGIN4
FIXED1
*-1
ANEG
R/L/Q-QSP
C0026/2
C0026/1
1
0
DIGIN1
C0114/1...5 DIGIN2
DIGIN3
DIGIN
FIXED0
QSP
MCTRL-NACT
X8
X9
C0547
C0549
DFOUT-AN-IN
DFOUT-DF-IN
RDY
MMAX
TRIP
NACT=0
C0548
+
2
3
4
5
1
0
C0540
DIGOUT
0
1
+
A1
A2
A3
A4
X5
DFOUT
DFOUT-OUT
C0434/2
C0434/3
AOUT1-OFFSET
AOUT1-GAIN
C434/1 AOUT1
+
AOUT1-IN
C0439/2
C0439/3
AOUT2-OFFSET
AOUT2-GAIN
C439/1 AOUT2
+
AOUT2-IN
C0118/1...4
C0545
CTRL
C0030
C0540
DIGOUT1
DIGOUT2
DIGOUT3
DIGOUT4
DFOUT-SYN-RDY
X5 E5
C0544
C0541
C0542
C0432
C0433
C0431
C0437
C0438
C0436
X10
62
X6
63
X6
4.3
E1
E2
E3
E4
E5
X5
R/L/Q
Application examples
Torque control with speed limitation (C0005 = 4000)
9300STD323
Signal flow diagram of configuration 4000
l
Application examples
4.4
4.4
Master frequency − Master − Drive (C0005 = 5000)
Master frequency − Master − Drive (C0005 = 5000)
Tip!
The most important settings can be found in the menu: "Short Setup / Speed mode" of the operating
module or in the menu "Short setup / Speed mode" in Global Drive Control.
Enter motor type (contains all nameplate data of the motor)
C0173
xxx
Enter UG limit (mains voltage)
C0086
000
Enter motor data manually
Enter maximum motor current
C0022
xxxA
Determine Imax
Enter controller configuration
C0005
C0025
5000
Master frequency − master − general drive
5900
with emergency stop for the drive system with QSP
xxx
Enter feedback system
Speed setpoint settings
C0011
xxx rpm
Determine max. speed
C0012
xxx s
Set acceleration time
C0013
xxx s
Set deceleration time
C0105
xxx s
Set QSP deceleration time under C0005 = 5000
C0672
xxx s
Set QSP deceleration time under C0005 = 59xx
C0032
xxx
Numerator of gearbox factor
C0033
xxx
Denominator of gearbox factor
C0473/1
xxx
Numerator of stretching factor
C0533
xxx
Denominator of stretching factor
Application parameters
C0070
xxx
Vp n−controller
C0071
xxx
Tn n−controller
C0254
xxx
Gain of the angle controller
Save parameters
C0003
l
xxx
Save all parameters
EDSVS9332S−EXT EN 2.0
4−9
Fig. 4−4
4−10
EDSVS9332S−EXT EN 2.0
FIXED0
C0830/2
E5
E4
E3
E2
E1
28
X5
C0831/1
C0831/3
OR1-IN3
C0831/2
OR1-IN2
+
+
OR1
DCTRL -X5/28
DIGIN-CINH
C0443
QSP
C0521
C0473/1
C0473/3
C0522
C0032
DFSET-A-TRIM
X5
E5
X5
E4
*
+
1
0
C0530
Set phase
C0535
*
C0529
Phase trimming
+
0
15
C0534
C0049
+
+
+
+
+
C0253
C0528/2
C0252
-
DFSET
C0220/
C0221
DFSET-PSET
DFSET-NOUT
DFSET-POUT
DFSET-ACK
1
0
C0528/1
*-1
0
1
C0130
Phase offset
C0799/2
C0799/3
C0798/2
TI 0...15
*-1
C0045
C0103/15
C0103/1
C0103/2
C0101/1
C0101/2
C0101/15
C0013
C0012
JOG1...15
C0039/15
C0039/1
C0039/2
C0799/1
CTRL
0
15
NSET-NADD-INV
3
0
Phase trimming=f(n)
C0536/3
C0538/2
C0538/3
a
a
b
b
C0033
C0536/2
C0537
3
0
DMUX
C0046
NSET-NADD
C0531
C0799/13
C0798/1
C0799/12
DMUX
NSET-LOAD
NSET-SET
NSET-TI*1
NSET-TI*2
NSET-TI*4
NSET-TI*8
NSET-JOG*1
NSET-JOG*2
NSET-JOG*4
NSET-JOG*8
NSET-N
NSET-N-INV
NSET-RFG-0
NSET-RFG-STOP
NSET-CINH-VAL
C0532
2
1
2
1
C0782
C0783
Speed
trimming
a
a
b
b
C0533
*
DFSET-RESET
DFSET-SET
C0539
DFSET-IN
C0536/1
DFSET-VP-DIV
DFSET-RAT-DIV
DFSET-N-TRIM
X9/6,7
MCTRL-PHI-ACT
C0538/1
DFSET-0-PULSE
TRIP-SET
TRIP-RESET
C0523
C0526
C0527
C0520
C0524
C0525
FIXDE0
1
0
ASW1
C0812/1
C0786
MCTRL-NSET2
MCTRL-QSP-OUT
C0785
FIXED0
C0787/1
C0787/2
C0787/3
C0787/4
C0780
C0781
C0788/1
C0788/2
C0788/3
C0788/4
C0472/5
C0027/2
FIXED0%
C0034
C0027/1
1 OR1-OUT
AIN2
+
+
AIN1
DIGIN1
C0114/1...5 DIGIN2
DIGIN3
0
DIGIN4
1
1
DIGIN5
DIGIN
C0830/3
C0830/1
QSP
OR1-IN1
C0026/2
C0026/1
RSP
3
4
X6
1
2
X6
C0789
C0790
C0784
C0134
C0182
C0474/1
CINH
CINH
C0922
C0923
C0920
C0921
C0924
C0925
*
C0928
C0929
REF-PHI-IN
REF-N-IN
C0927/1
REF-ON
C0927/2
C0927/3
REF-MARK
C0926/1
REF-POS-LOAD
NSET-NOUT
CTRL
C0926/3
C0926/4
C0933
C0932
C0930
C0931
C0934
C0935
C0936
NSET-RFG-I=0
200%
C0241
x/(1-y)
REF-ACTPOS-IN
/
x
y +
C0190
NSET
REF-PSET
REF-N-SET
REF-OK
REF-BUSY
REF
FIXED0
FIXEDPHI-0
X8
X9
C0547
C0549
DFOUT-AN-IN
DFOUT-DF-IN
C0548
DFOUT-SYN-RDY
X5 E5
C0544
C0541
C0542
C0545
CTRL
C0030
C0540
DFOUT
2
3
4
5
1
0
C0540
DFOUT-OUT
X10
4.4
FIXED0
MCTRL-NACT
Application examples
Master frequency − Master − Drive (C0005 = 5000)
Signal flow diagram for configuration 5000 (sheet 1)
9300STD324
l
C0472/3
Fig. 4−5
l
X8
X7
Encoder
Resolver
FIXED0%
FIXED0%
C0420
C0490
C0495
C0051
C0906/2
C0906/6
C0025
Actual speed
MCTRL-M-ADD
MCTRL-N2-LIM
MCTRL-PHI-ON
C0908
MCTRL-PHI-LIM
C0254
Phase controller
MCTRL-PHI-SET
C0906/1
+/-100%
QSP decel. ramp
MCTRL-N-SET
C0105
MCTRL-N/M-SWT
MCTRL-LO-M-LIM
MCTRL-HI-M-LIM
0
1
QSP
C0011
1
+
+
C0909
+
-
+
Speed
limitation
C0070
C0071
C0072
Speed controller
+
+
C0050
0
1
C0056
C0086
Torque limitation
0
1
QSP
MCTRL-MSET1
MCTRL-MSET2
MCTRL-IMAX
MCTRL-NSET2
C0018
MCTRL-NACT
MCTRL-PHI-ACT
C0006
C0022
C0081
C0084
C0085
C0087
C0088
C0089
C0090
C0091
VECT-CTRL PWM
Current
controller
MCTRL
MCTRL-MMAX
C0680
C0681
C0683/1
CMP1
C0017
RDY
TRIP
NACT=0
DIGOUT
C434/1
C0109/1
+
+
AOUT2
1
0
+
+
AOUT1
C0118/1...4
C0108/1
DIGOUT1
DIGOUT2
DIGOUT3
DIGOUT4
C0109/2
C0108/2
C439/1
62
X6
X5
A1
A2
A3
A4
63
X6
4.4
C0472/6
FIXED1
FIXED0
*-1
ANEG
Application examples
Master frequency − Master − Drive (C0005 = 5000)
Signal flow diagram for configuration 5000 (sheet 2)
9300STD327
EDSVS9332S−EXT EN 2.0
4−11
Application examples
4.5
4.5
Master frequency bus − slave − drive (C0005 = 6000)
Master frequency bus − slave − drive (C0005 = 6000)
Tip!
The most important settings can be found in the menu: "Short Setup / Speed mode" of the operating
module or in the menu "Short setup / Speed mode" in Global Drive Control.
Enter motor type (contains all nameplate data of the motor)
C0173
xxx
Enter UG limit (mains voltage)
C0086
000
Enter motor data manually
Enter maximum motor current
C0022
xxxA
Determine Imax
Enter controller configuration
C0005
6000
Select digital frequency cascade − slave
C0025
xxx
Enter feedback system
Speed setpoint settings
C0011
xxx rpm
Determine max. speed
C0032
xxx
Numerator of gearbox factor
C0033
xxx
Denominator of gearbox factor
C0425
xxx
Adjust encoder constant to the master
Application parameters
C0070
xxx
Vp n−controller
C0071
xxx
Tn n−controller
C0254
xxx
Gain of the angle controller
Save parameters
C0003
4−12
xxx
Save all parameters
EDSVS9332S−EXT EN 2.0
l
Fig. 4−6
l
E1
E5
E4
E3
E2
C0472/3
1
OR1
EDSVS9332S−EXT EN 2.0
*-1
ANEG
X8
X7
C0443
DCTRL -X5/28
DIGIN-CINH
DIGIN1
C0114/1...5 DIGIN2
DIGIN3
0
DIGIN4
1
1
DIGIN5
X5 DIGIN
28
QSP
CINH
C0425
DFIN
C0891
C0898
FIXED0%
FIXED100%
ENCODER
RESOLVER
C0897
C0896
FIXED1
C0895
C0894
FIXED0%
C0472/6
C0901
C0890
C0902
FIXED0
C0899
FIXED0%
FIXED0
C0892
C0893
C0900
TRIP-SET
TRIP-RESET
DIGIN1
QSP
C0473/3
MCTRL-HI-M-LIM
C0906/6
C0907/1
C0906/5
C0420
C0490
C0495
C0025
C0051
Actual speed
C0906/7
MCTRL-FLD-WEAK C0906/2
MCTRL-M-ADD
MCTRL-N2-LIM
MCTRL-PHI-ON
MCTRL-PHI-LIM
C0908
C0254
100%
Phase controller
MCTRL-PHI-SET
C0906/1
C0906/8
C0907/4
C0907/2
C0906/3
C0906/4
C0907/3
QSP decel. ramp
MCTRL-N-SET
C0105
MCTRL-I-SET
MCTRL-I-LOAD
MCTRL-N/M-SWT
MCTRL-LO-M-LIM
1
0
C0530
*
C0529
0
1
C0011
1
1
C0909
C0497
+
+
+
-
+
Speed
controller
C0528/2
+
+
+
C0253
Speed
limitation
+
+
Act. phase
C0072
C0070
C0071
+
+
C0528/1
-
DFSET
DFSET-POUT
DFSET-ACK
1
0
DFSET-PSET
DFSET-NOUT
Phase offset
C0252
CTRL
C0534
C0042
Set phase
C0535
Phase trimming
+
+
C0532
C0531
Phase trimming=f(n)
C0536/3
C0538/2
C0538/3
2
1
2
1
a
a
* b
b
C0033
C0536/2
C0537
DCTRL-QSP
DFSET-A-TRIM
X5
E5
X5
E4
Speed
trimming
a
a
* b
b
C0533
DFSET-RESET
DFSET-SET
C0539
DFSET-IN
C0536/1
DFSET-VP-DIV
DFSET-RAT-DIV
DFSET-N-TRIM
X9/6,7
MCTRL-PHI-ACT
C0538/1
DFSET-0-PULSE
MCTRL-QSP
C0523
C0526
C0527
C0520
C0522
C0521
C0032
C0524
C0473/1
C0472/5
C0525
0
1
CTRL
C0017
REF-PSET
REF-N-SET
REF-OK
REF-BUSY
REF
CONST
MCTRL-MACT
MCTRL-DCVOLT
MCTRL-MSET1
MCTRL-MSET2
MCTRL-IMAX
MCTRL-IACT
MCTRL-MMAX
C0018
MCTRL-PHI-ANG
MCTRL-NACT
MCTRL-PHI-ACT
MCTRL-PHI-ANA
C0006
C0022
C0075
C0076
C0077
C0078
C0081
C0084
C0085
C0087
C0088
C0089
C0090
C0091
VECT-CTRL PWM
C0056
C0050
C0680
C0681
C0683/1
CMP1
TRIP
NACT=0
RDY
C0117/1
C0117/2
C0117/3
C0117/4
AOUT2
C434/1
C0109/1
1
1
0
C0118/1...4
DIGOUT
63
X6
+
+
62
AOUT1 X6
C0444/1
C0444/2
C0444/3
C0444/4
DIGOUT1
DIGOUT2
DIGOUT3
DIGOUT4
C0108/1
C0109/2
C0108/2
C439/1
+
C0926/3
C0926/4
C0933
C0932
C0930
C0931
C0934
C0935
C0936
+
MCTRL-QSP-OUT
MCTRL
C0928
C0929
REF-PHI-IN
REF-N-IN
C0927/1
REF-ON
C0927/2
C0927/3
REF-MARK
C0926/1
REF-POS-LOAD
REF-ACTPOS-IN
MCTRL-NSET2
C0922
C0923
C0920
C0921
C0924
C0925
Current controller
C0086
Torque
limitation
C0474/1
A4
A3
A2
A1
X5
4.5
FIXED0
X9
FIXED0
X10
Application examples
Master frequency bus − slave − drive (C0005 = 6000)
Signal flow diagram for configuration 6000
9300STD325
4−13
Application examples
4.6
4.6
Master frequency cascade − slave − drive (C0005 = 7000)
Master frequency cascade − slave − drive (C0005 = 7000)
Tip!
The most important settings can be found in the menu: "Short Setup / Speed mode" of the operating
module or in the menu "Short setup / Speed mode" in Global Drive Control.
Enter motor type (contains all nameplate data of the motor)
C0173
xxx
Enter UG limit (mains voltage)
C0086
000
Enter motor data manually
Enter maximum motor current
C0022
xxxA
Determine Imax
Enter controller configuration
C0005
7000
Select digital frequency cascade − slave
Speed setpoint settings
C0011
xxx rpm
Determine max. speed
C0032
xxx
Numerator of gearbox factor
C0033
xxx
Denominator of gearbox factor
C0425
xxx
Adjust encoder constant to the master
C0473/1
xxx
Numerator of stretching factor
C0533
xxx
Denominator of stretching factor
Application parameters
C0070
xxx
Vp n−controller
C0071
xxx
Tn n−controller
C0254
xxx
Gain of the angle controller
Save parameters
C0003
4−14
xxx
Save all parameters
EDSVS9332S−EXT EN 2.0
l
Fig. 4−7
l
E1
E5
E4
E3
E2
C0472/3
1
OR1
EDSVS9332S−EXT EN 2.0
*-1
ANEG
X7
C0897
C0896
C0891
C0898
FIXED1
FIXED0%
FIXED100%
C0895
C0894
FIXED0%
C0472/6
C0901
C0890
C0902
C0899
FIXED0
FIXED0
C0892
C0893
C0900
TRIP-SET
TRIP-RESET
DIGIN1
QSP
C0473/3
C0538/1
MCTRL-HI-M-LIM
C0906/6
C0907/1
C0906/5
C0420
C0490
C0495
C0025
C0051
Actual speed
C0906/7
MCTRL-FLD-WEAK C0906/2
MCTRL-M-ADD
MCTRL-N2-LIM
MCTRL-PHI-ON
MCTRL-PHI-LIM
C0908
C0254
100%
Phase controller
MCTRL-PHI-SET
C0906/1
C0906/8
C0907/4
C0907/2
C0906/3
C0906/4
C0907/3
QSP decel. ramp
MCTRL-N-SET
C0105
MCTRL-I-SET
MCTRL-I-LOAD
MCTRL-N/M-SWT
MCTRL-LO-M-LIM
1
0
C0530
Set phase
*
C0529
C0011
0
1
1
C0909
+
-
+
-
+
+
C0072
C0070
C0071
+
+
Act. phase
+
+
C0253
C0528/2
C0252
+
C0528/1
DFSET-POUT
DFSET-ACK
DFSET
-
1
0
DFSET-PSET
DFSET-NOUT
Phase offset
Speed
limitation
C0042
Speed
controller
C0497
+
+
C0534
CTRL
Phase trimming
+
+
C0535
C0531
i
Phase trimming=f(n)
1
C0536/3
C0538/2
C0538/3
2
1
2
1
C0532
a
a
* b
b
C0033
C0536/2
C0537
DCTRL-QSP
DFSET-A-TRIM
X5
E5
X5
E4
Speed
trimming
a
a
* b
b
C0533
DFSET-RESET
DFSET-SET
C0539
DFSET-IN
C0536/1
DFSET-VP-DIV
DFSET-RAT-DIV
DFSET-N-TRIM
X9/6,7
MCTRL-PHI-ACT
MCTRL-QSP
C0523
C0526
C0527
C0520
C0522
C0521
C0032
C0524
C0473/1
C0472/5
FIXED0%
RESOLVER
C0443
DCTRL -X5/28
DIGIN-CINH
DIGIN1
C0114/1...5 DIGIN2
DIGIN3
0
DIGIN4
1
1
DIGIN5
DIGIN
X5
28
QSP
CINH
C0425
DFIN
C0525
DFSET-0-PULSE
CONST
C0086
Torque
limitation
0
1
C0474/1
MCTRL-QSP-OUT
MCTRL-MACT
MCTRL-DCVOLT
MCTRL-IMAX
MCTRL IACT
MCTRL-MSET1
MCTRL-MSET2
MCTRL-MMAX
MCTRL-NSET2
C0018
MCTRL-PHI-ANG
MCTRL-NACT
MCTRL-PHI-ACT
MCTRL-PHI-ANA
C0006
C0022
C0075
C0076
C0077
C0078
C0081
C0084
C0085
C0087
C0088
C0089
C0090
C0091
VECT-CTRL PWM
C0056
C0050
CTRL
MCTRL
C0928
C0929
REF-PHI-IN
C0927/1
REF-N-IN
REF-ON
C0927/2
C0927/3
REF-MARK
C0926/1
REF-POS-LOAD
REF-ACTPOS-IN
Current controller
C0922
C0923
C0920
C0921
C0924
C0925
C0926/3
C0926/4
C0933
C0932
C0930
C0931
C0934
C0935
C0936
C0680
C0681
C0683/1
CMP1
C0017
REF-PSET
REF-N-SET
REF-OK
REF-BUSY
REF
TRIP
RDY
NACT=0
FIXED0
FIXED0%
X8
X9
C0547
C0549
DFOUT-AN-IN
DFOUT-DF-IN
C0117/1
C0117/2
C0117/3
C0117/4
C0545
CTRL
C0030
C0540
C434/1
C0109/1
DFOUT
DIGOUT
1
1
0
C0118/1...4
63
X6
2
3
4
5
1
0
C0540
DFOUT-OUT
+
+
62
AOUT1 X6
C0444/1
C0444/2
C0444/3
C0444/4
DIGOUT1
DIGOUT2
DIGOUT3
DIGOUT4
+
+
AOUT2
C0108/1
C0109/2
C0108/2
C439/1
C0548
DFOUT-SYN-RDY
X5 E5
C0544
C0541
C0542
A4
A3
A2
A1
X5
X10
4.6
FIXED0
X9
FIXED0
Application examples
Master frequency cascade − slave − drive (C0005 = 7000)
Signal flow diagram for configuration 7000
9300STD326
4−15
Fig. 4−8
4−16
EDSVS9332S−EXT EN 2.0
P ro c e s s c o n tro l
P L C
- =
V p u ll- o ff
+
1
2
R F R
2 8
X 7
R
E 5
+ 2 4 V
e x te rn a l
5 9
G e a rb o x
T R IP
A 1
A 4
M m a x
3 9
9 3 0 0 M a s te r
T R IP -R e s e t
R ig h t
Q S P
E 1
M
i= 1 9 ,4
n is t= 0
A 2
X 1 0
S tre tc h >
S tre tc h <
+ 2 4 V e x te rn a l
D ig ita l fr e q u e n c y
E 3
E 4
R F R
2 8
X 7
R ig h t
Q S P
E 1
A 1
T R IP
+ 2 4 V
e x te rn a l
5 9
M
A 4
M m a x
3 9
9 3 0 0 S la v e
T R IP -R e s e t
E 5
G e a rb o x
S tre tc h fa c to r
X 9
R
i= 5 ,3
n is t= 0
A 2
X 1 0
v = 8 0 m /m in
S tr e tc h u n it 1
S tre tc h >
S tre tc h <
+ 2 4 V e x te rn a l
D ig ita l fr e q u e n c y
E 3
E 4
R F R
2 8
E 5
5 9
M
A 1
T R IP
A 4
M m a x
3 9
9 3 0 0 S la v e
+ 2 4 V
e x te rn a l
X 7
T R IP -R e s e t
R ig h t
Q S P
E 1
G e a rb o x
S tre tc h fa c to r
X 9
R
i= 5 ,3
n is t= 0
A 2
X 1 0
v = 1 1 0 m /m in
S tr e tc h u n it 2
4.6
v = 5 0 m /m in
P u ll-o ff u n it (m a s te r d r iv e )
Application examples
Master frequency cascade − slave − drive (C0005 = 7000)
Connection diagram of digital frequency configuration
9300STD127
l
Appendix
5
Appendix
Contents
5.1
Glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.1.1
Terminology and abbreviations used . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5−3
5−3
5.2
Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5−5
EDSVS9332S−EXT EN 2.0
5−1
l
Appendix
5−2
EDSVS9332S−EXT EN 2.0
l
Appendix
5.1
Glossary
5.1
Glossary
5.1.1
Terminology and abbreviations used
l
Cross−reference to a chapter with the corresponding page number
AC
AC current or AC voltage
AIF
Automation interface
AIF interface, interface for communication modules
CE
Communauté Européene
Controller
Any frequency inverter, servo inverter, or DC speed controller
Cxxxx/y
Subcode y of code Cxxxx
(e. g. C0404/2 = subcode 2 of code C0404)
DC
DC current or DC voltage
DIN
Deutsches Institut für Normung(German Institute for Standardization)
Drive
Lenze controller in combination with a geared motor, a three−phase AC motor, and other
Lenze drive components
EMC
Electromagnetic compatibility
EN
European standard
fr [Hz]
Rated motor frequency
Ia [A]
Current output current
IEC
International Electrotechnical Commission
Imains [A]
Mains current
Imax [A]
Maximum output current
IP
International Protection Code
IPC
Industrial PC
IPE [mA]
Discharge current
Ir [A]
Rated output current
L [mH]
Inductance
Mr [Nm]
Rated motor torque
NEMA
National Electrical Manufacturers Association
PDC [kW]
Power that can be additionally taken from the DC bus if a power−adapted motor is used for
operation
PLC
Programmable control system
Ploss [W]
Power loss of inverter
Pr [kW]
Rated motor power
R [W]
Resistance
EDSVS9332S−EXT EN 2.0
5−3
Appendix
5.1
5−4
Glossary
SN [kVA]
Controller output power
UDC [V]
DC supply voltage
UL
Underwriters Laboratories
UM [V]
Output voltage
Umains [V]
Mains voltage
VDE
Verband deutscher Elektrotechniker (Association of German Electrical Engineers)
Xk/y
Terminal y on terminal strip Xk (e. g. X5/28 = terminal 28 on terminal strip X5)
EDSVS9332S−EXT EN 2.0
l
Appendix
5.2
5.2
Index
Index
A
Absolute position determination, 2−34
Acceleration and deceleration times, 2−7
− additional, 2−7
Actual angle integrator (PHDIFF), 3−148
Addition block (ADD), 3−16
Additional setpoint, 2−7 , 3−134
Configuration, 2−1
−
−
−
−
Basic configurations, 2−4
Function blocks, 3−3
Function library, 3−1
Global Drive Control, 2−3
Control characteristic, 3−143
Control of drive controller (DCTRL), 3−57
Controller inhibit, 2−10
− correcting signal, 2−7
Controller inhibit (CINH), 3−59
Additional torque setpoint, 2−9 , 3−104
Current controller, 3−104
Analog input (AIN), 3−22
Current master value, 2−6
Analog output (AOUT), 3−29
CW/CCW/QSP linking (R/L/Q), 3−157
Analog signal changeover switch (ASW), 3−33
D
AND operation (AND), 3−24
angle addition block (PHADD), 3−145
Angle comparator (PHCMP), 3−146
Angle controller, 2−26
− Angle controller limits, 2−26
Dead band(DB), 3−56
Definition of notes used, 1−6
Definitions, Terms, 5−3
Delay element (PT1−1), 3−156
− Influence of angle controller, 3−108
Delay elements (DIGDEL), 3−81
Angle controller limits, 2−26
Derivative−action element (DT1), 3−86
Angle conversion (CONVPHA), 3−50
Digital frequency output (DFOUT), 3−65
Angle conversion (CONVPHPH), 3−51
Digital frequency processing (DFSET), 3−75
Angle signal adaptation (PHDIV), 3−149
Digital frequency ramp function generator
(DFRFG), 3−69
Angle−synchronous operation, 2−26
Angular synchronism, 2−26
Angular trimming, 2−27
Application examples, 4−1
Digital inputs (DIGIN), 3−84
Digital outputs (DIGOUT), 3−85
Digital status signals (STAT), 3−169
Drive system, 2−13
− Speed control, 4−4 , 4−7 , 4−9 , 4−12 , 4−14
Arithmetic blocks (ARIT), 3−31
Automation interface (AIF−IN), 3−17
E
Edge evaluation (TRANS), 3−183
Automation interface (AIF−OUT), 3−20
Electrical shaft, 2−26
C
F
Cascading factor, 2−20 , 2−23
Fast mains recovery (KU), 3−121
Characteristic function (CURVE), 3−53
Field weakening, 3−110
CINH at the master, 2−17
Fieldbus module, 3−17
CINH at the slave, 2−20 , 2−23
Fixed setpoints (FIXSET), 3−95
Comparator (CMP), 3−42
Flipflop (FLIP), 3−97
l
EDSVS9332S−EXT EN 2.0
5−5
Appendix
5.2
Index
Flying synchronising, 2−27
Following error limit, 2−27
Free control codes, overview, 3−14
Free digital outputs (FDO), 3−88
Free piece counter (FCNT), 3−87
Freely assignable input variables (FEVAN), 3−90
Function blocks, 3−3 , 3−12
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
5−6
Actual angle integrator (PHDIFF), 3−148
Addition block (ADD), 3−16
analog input (AIN), 3−22
Analog output (AOUT), 3−29
Analog signal changeover switch (ASW), 3−33
AND operation (AND), 3−24
angle addition block (PHADD), 3−145
Angle comparator (PHCMP), 3−146
angle conversion (CONVPHA), 3−50
Angle conversion (CONVPHPH), 3−51
Angle conversion (CONVPP), 3−52
Angle signal adaptation (PHDIV), 3−149
Arithmetic blocks (ARIT), 3−31
Automation interface (AIF−IN), 3−17
Automation interface (AIF−OUT), 3−20
Characteristic function (CURVE), 3−53
comparator (CMP), 3−42
Configuration code, 3−5
Connection, 3−6
Control of drive controller (DCTRL), 3−57
Controller inhibit (CINH), 3−59
Operation inhibit (DISABLE), 3−59
Parameter set changeover (PAR), 3−61
Quick stop (QSP), 3−58
TRIP−RESET, 3−60
TRIP−SET, 3−59
Create connections, 3−8
CW/CCW/QSP linking (R/L/Q), 3−157
Dead band(DB), 3−56
delay element (PT1−1), 3−156
Delay elements (DIGDEL), 3−81
Derivative−action element (DT1), 3−86
Digital frequency output (DFOUT), 3−65
Digital frequency processing (DFSET), 3−75
digital frequency ramp function generator (DFRFG), 3−69
Digital inputs (DIGIN), 3−84
Digital outputs (DIGOUT), 3−85
Digital status signals (STAT), 3−169
Display code, 3−5
Edge evaluation (TRANS), 3−183
Fixed setpoints (FIXSET), 3−95
Flipflop (FLIP), 3−97
Free digital outputs (FDO), 3−88
Free piece counter (FCNT), 3−87
gearbox compensation (GEARCOMP), 3−100
holding brake (BRK), 3−35
holding brake (BRK1)
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
disengaging the brake, 3−37
engaging the brake, 3−37
setting controller inhibit, 3−38
Homing function (REF), 3−158
Input name, 3−4
Input symbol, 3−4
Internal motor control (MCTRL), 3−102
Inverter (ANEG), 3−28
Limiting element (LIM), 3−101
Logic NOT, 3−128
Mains failure control (MFAIL), 3−111
master frequency input (DFIN), 3−62
Monitor outputs of monitoring system (MONIT), 3−123
motor phase failure detection (MLP), 3−122
Motor potentiometer (MPOT), 3−125
Multi−axis synchronisation (SYNC), 3−175
Names, 3−4
OR operation (OR), 3−135
Oscilloscope function (OSZ), 3−138
Output name, 3−5
Output symbol, 3−5
overview, 3−12
Parameterisation code, 3−5
Phase integrator (PHINT), 3−150
Process controller (PCTRL1), Dancer position, tension, pressure
controller, 3−142
Ramp generator(RFG), 3−164
Remove connections, 3−9
Sample and hold function (S&H), 3−166
Signal conversion (CONV), 3−47
Signal types, 3−3
speed setpoint conditioning (NSET), 3−130
State bus connection, 3−170
storage block (STORE), 3−171
system bus (CAN−IN), 3−40
system bus (CAN−OUT), 3−41
Function blocks , Freely assignable input
variables (FEVAN), 3−90
function blocks, S−shaped ramp function
generator (SRFG), 3−167
Function library, 3−1
G
Gearbox compensation (GEARCOMP), 3−100
Gearbox factors, weighting factors, 2−13
Global Drive Control, configuration with, 2−3
H
Holding brake (BRK), 3−35
Homing, 2−30 , 2−33
Homing function (REF), 3−158
− Homing modes, 3−160
− profile generator, 3−159
EDSVS9332S−EXT EN 2.0
l
Appendix
5.2
Homing modes, 2−31 , 3−160
I
Internal motor control (MCTRL), 3−102
− Additional torque setpoint, 3−104
− Angle controller, Influence of angle controller, 3−108
− Current controller, 3−104
− Quick stop (QSP)
Field weakening, 3−110
Switching frequency changeover, 3−110
− Quick stop QSP, 3−109
− Speed controller, 3−106
Index
Master configuration, 2−14
−
−
−
−
−
−
−
−
−
−
−
−
−
−
CINH at the master, 2−17
features, 2−14
following error limit, 2−14
homing function, 2−14
master frequency output X10, 2−15
Master integrator, 2−15
phase adjustment, 2−17
Phase offset, 2−17
phase trimming, 2−16
phase trimming, speed correction, 2−14
QSP at the master, 2−17
QSP at the slave 0, 2−17
Setpoint conditioning, 2−16
speed trimming, 2−16
Master frequency bus, 2−18
− cascading factor, 2−20
− Speed setpoint limitation, 3−107
− Torque control, with speed limitation, 3−107
− Torque limitation, 3−105
Inverter (ANEG), 3−28
Inverting the main setpoint, 2−7
J
Master frequency cascade, 2−21
− cascading factor, 2−23
− CINH at the slave, 2−23
− QSP at the slave, 2−23
Master frequency coupling, 2−13
− gearbox factors, 2−13
− master configuration, 2−14
− System description, 2−13
Master frequency input (DFIN), 3−62
Master frequency output X10, 2−15
− encoder constant, 2−15
JOG setpoint, 2−6
JOG setpoints, 3−132
Master integrator, 2−13 , 2−15
Monitor outputs of monitoring system (MONIT),
3−123
Motor phase failure detection (MLP), 3−122
L
Motor potentiometer (MPOT), 3−125
Multi−axis synchronisation (SYNC)
Limiting element (LIM), 3−101
Logic NOT, 3−128
M
Main setpoint, 2−6
−
−
−
−
−
−
−
−
−
Configuration examples, 3−182
Correcting the angle controller, 3−181
Cycle times, 3−178
Fault indications, 3−181
Operating mode, 3−176
Phase displacement, 3−180
Scaling, 3−182
synchronising, 3−176
Time slot, 3−180
Multi−axis synchronisation (SYNC1), 3−175
Main setpoint path, 3−131
N
Mains failure control, 3−112 , 3−114
Mains failure control (MFAIL), 3−111
− fast mains recovery (KU), 3−121
Nameplate, 1−5
Notes, definition, 1−6
− mains failure control, 3−112 , 3−114
O
− restart protection, 3−120
Operation inhibit (DISABLE), 3−59
l
EDSVS9332S−EXT EN 2.0
5−7
Appendix
5.2
Index
OR operation (OR), 3−135
S
Oscilloscope function (OSZ), 3−138
S ramp, PT1 element, 3−134
S−shaped ramp function generator (SRFG), 3−167
P
Parameter set changeover (PAR), 3−61
Safety instructions
Phase adjustment, 2−17
Phase integrator (PHINT), 3−150
− Definition, 1−6
− Structure, 1−6
− constant input value, 3−152 , 3−153
Sample and hold function (S&H), 3−166
− Input value with sign reversal, 3−154
Selection of direction of rotation, 2−8
− Scaling of PHINTx−OUT, 3−155
Setpoint conditioning of the slave, 2−20
Phase offset, 2−17 , 2−27
Phase trimming, 2−16
Setpoint inversion, Ramp function generator, main
setpoint, 3−133
Phase−synchronous operation, 2−13
Setting the integral component, 3−106
Positioning control with driftfree standstill, 2−13
Signal conversion (CONV), 3−47
Process controller (PCTRL1)
Slave, 2−18
− Control characteristic, 3−143
Speed control, 2−6 , 4−4 , 4−7 , 4−9 , 4−12 ,
4−14
− Dancer position, tension, pressure controller, 3−142
− Ramp function generator, 3−144
Processing table, 3−10
− Frequent faults, 3−11
Profile generator, 2−30 , 2−33 , 3−159
− gearbox ratio, 2−33
− home position offset, 2−33
− homing speed, 2−33
− homing Ti time, 2−33
Q
QSP (quick stop), 2−10 , 3−109
−
−
−
−
−
−
−
−
−
−
−
−
−
−
acceleration and deceleration times, 2−7
additional acceleration and deceleration times, 2−7
additional setpoint, 2−7
additional torque setpoint, 2−9
controller inhibit, 2−10
current master value, 2−6
inverting the main setpoint, 2−7
JOG setpoint, 2−6
main setpoint, 2−6
resetting a fault, 2−10
S−shaped ramp function generator characteristic, 2−7
selection of direction of rotation, 2−8
setpoint selection, 2−6
speed limit, 2−9
QSP at the master, 2−17
Speed controller, 3−106
QSP at the slave, 2−20 , 2−23
− Setting the integral component, 3−106
QSP at the slave 0, 2−17
Quick stop (QSP), 2−10 , 3−58
Quick stop QSP, 3−109
R
Ramp function generator, 3−144
Ramp generator(RFG), 3−164
Referencing, 2−30
5−8
S−shaped ramp function generator characteristic,
2−7
Speed conversion (CONVPP), 3−52
Speed limit, 2−9
Speed limitation, 2−12
Speed ratio synchronism, 2−25
Speed setpoint conditioning (NSET), 3−130
−
−
−
−
−
Additional setpoint, 3−134
JOG setpoints, 3−132
Main setpoint, 3−131
S ramp, PT1 element, 3−134
Setpoint inversion, Ramp function generator, main setpoint,
3−133
Resetting a fault, 2−10
Speed setpoint limitation, 3−107
Restart protection, 3−120
Speed synchronism, 2−25
EDSVS9332S−EXT EN 2.0
l
Appendix
5.2
Index
Speed travel profile, 2−33
Torque limitation, 3−105
Speed trimming, 2−16
Torque setpoint, 2−11
Speed−ratio synchronism, 2−13
Touch probe, 2−32
Speed−synchronous operation, 2−13 , 2−18
Touch−Probe, 2−29
Speed−synchronous running, 2−25
State bus connection, 3−170
Storage block (STORE), 3−171
TRIP, 2−10
TRIP−RESET, 3−60
TRIP−SET, 3−59
Switching frequency changeover, 3−110
System bus (CAN−IN), 3−40
V
System bus (CAN−OUT), 3−41
Vertical shaft, 2−26
T
Preface, 1−1
Terms
− controller, 5−3
− Definitions, 5−3
− drive, 5−3
Z
Zero pulse, 2−27
Torque control, 2−11
Zero pulse at the setpoint, 2−28
− Setpoint input, 2−11
− Speed limitation, 2−12
− with speed limitation, 3−107
Zero pulse evaluation, 2−28
l
Zero pulse synchronisation, 2−28
EDSVS9332S−EXT EN 2.0
5−9
© 03/2012
F
Lenze Automation GmbH
Hans−Lenze−Str. 1
D−31855 Aerzen
Germany
Service
Lenze Service GmbH
Breslauer Straße 3
D−32699 Extertal
Germany
(
Ê
š
ü
+49(0)51 54 /82−0
(
Ê
š
008000/ 2446877 (24 h helpline)
+49(0)51 54 /82 − 28 00
Lenze@Lenze.de
+49(0)5154/ 82−11 12
Service@Lenze.de
www.Lenze.com
EDSVS9332S−EXT § .FZ9 § EN § 2.0 § TD23
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