FWA8308

FWA8308 Series

Networking Appliance

User

s Manual

Version: 1.1

0

Table of Contents

Chapter 1 Introduction 3

Chapter 2 System Specification .............................................................................................................. 4

Chapter 3 Hardware Configuration ......................................................................................................... 6

Chapter 4 Console Mode Information ................................................................................................... 12

Chapter 5 Open the Chassis ................................................................................................................ 14

Chapter 6 Installing DDR3 Memory ...................................................................................................... 14

Chapter 7 Installing CompactFlash Card .............................................................................................. 15

Chapter 8 Removing and Installing the Battery .................................................................................... 15

Chapter 9 Installing 2.5” HDD (FWA8308 & FWA8308-RPSU) ............................................................ 16

Chapter 10 Installing Optional Dual 2.5” HDD Kit ................................................................................. 17

Chapter 11 Installing Add-on Card ....................................................................................................... 18

Chapter 12 Installing Mini PCI-e Card .................................................................................................. 18

Chapter 13 BIOS Information ............................................................................................................... 19

Chapter 14 Watchdog Timer Configuration .......................................................................................... 32

Chapter 15 Digital I/O Sample Configuration ........................................................................................ 35

Chapter 16 Drivers Installation ............................................................................................................. 39

Appendix-A I/O Port Address Map ......................................................................................................... 50

Appendix-B Interrupt Request Lines (IRQ) ............................................................................................ 50

Appendix-C FWA8308 Series Configurations ....................................................................................... 51

1

Foreword

To prevent damage to the system board, please handle it with care and follow the measures below, which are generally sufficient to protect your equipment from static electricity discharge:

When handling the board, use a grounded wrist strap designed for static discharge elimination grounded to a metal object before removing the board from the antistatic bag. Handle the board by its edges only; do not touch its components, peripheral chips, memory modules or gold contacts.

When handling processor chips or memory modules, avoid touching their pins or gold edge fingers. Return the Network Appliance system board and peripherals back into the antistatic bag when not in use or not installed in the chassis.

Some circuitry on the system board can continue to operate even though the power is switched off. Under no circumstances should the Lithium battery cell used to power the real-time clock be allowed to be shorted.

The battery cell may heat up under these conditions and present a burn hazard.

WARNING!

1. "CAUTION: DANGER OF EXPLOSION IF BATTERY IS INCORRECTLY REPLACED.

REPLACE ONLY WITH SAME OR EQUIVALENT TYPE RECOMMENDED BY THE

MANUFACTURER. DISCARD USED BATTERIES ACCORDING TO THE

MANUFACTURER’S INSTRUCTIONS"

2. This guide is for technically qualified personnel who have experience installing and configuring system boards. Disconnect the system board power supply from its power source before you connect/disconnect cables or install/remove any system board components. Failure to do this can result in personnel injury or equipment damage.

3. Avoid short-circuiting the lithium battery; this can cause it to superheat and cause burns if touched.

4. Do not operate the processor without a thermal solution. Damage to the processor can occur in seconds.

5. Do not block air vents at least minimum 1/2-inch clearance required.

2

Chapter 1 Introduction

FWA8308 series was specifically designed for the network security & management market.

Network Security Applications:

• Firewall

• Unified Threat Management (UTM)

• Virtual Private Network (VPN)

• Proxy Server

• Caching Server

Network Management Applications:

• Load balancing

• Quality of Service

• Remote Access Service

The FWA networking appliance product line covers the spectrum from offering platforms designed for:

• SOHO

• SMB

• Enterprise

Each product is designed to address the distinctive requirements of its respective market segment from cost effective entry-level solutions to high throughput and performance-bound systems for the Enterprise level.

3

Product Name

Form Factor

Motherboard

Processor

Chipset

Supported CPUs

Memory

Network

Expansion Slot

Storage

Front Panel

Rear Panel

Chapter 2 System Specification

FWA8308

19” 1U Mainstream Networking Product

MB968

 Support for Intel® Shark Bay DT LGA1150 Haswell processors

 TDP = 35W ~ 84W (DC / QC)

Intel ® Lynx Point C226 PCH

Package =23 mm x 22 mm , 0.65 mm ball pitch

 E3-1275 v3

 E3-1225 v3

 E3-1268L v3

 i7-4770TE

 i7-4770S

 i5-4570S

 i5-4570TE

 i3-4330

 i3-4330TE

 Celeron G1820TE

 Celeron G1820

 Pentium G3320TE

 Pentium G3420

 Four DDR3 UDIMM total for 32GB max memory (4Gb chip support)

 Support DDR3 / DDR3L at 1.5V

 Dual channel DDR3 up to 1600 MHz

 Unbuffered

 ECC or non-ECC

 Eth1: Intel® Clarkville I217LM GbE PHY , 6mm x 6mm, QFN48

with iAMT 9.0 supporting. No Bypass

 Eth2~4: Intel® Pearsonville I210-AT. No Bypass.

 Eth5~6: Intel® Pearsonville I210-AT. Support Bypass.

 Eth7~8: Intel® Pearsonville I210-AT. Support Bypass.

 Two PCI-e x8 Golden Finger

 CF Card Socket

 Mini PCI-e Socket (m-SATA compatible)

One internal 2.5” HDD (FWA8308 & FWA8308-RPSU)

One internal 3.5” HDD (FWA8308-2SLOT)

 Two RJ-45 1x4 connectors for Eth1~4 & 5~6



USB 3.0 x2

 RJ-45 (for console, COM1)

 Three LEDs for Power, Bypass & Status

 Factory Mode Restore Reset Switch

 PSU inlet

 1x or 2x Slot (Depend on product SKU)

 Two USB 3.0 + 2.0 ports at front panel

 One USB 2.0 for Mini PCI-e

 Six USB 2.0 pin headers (pitch 2.54)

USB Port

4

ATM

TPM

VGA

LCM

Watchdog Timer

ATM 9.0

Nuvoton WPCT210AA0WX TPM1.2

Pin header on board

2x16 characters LCM

256 segments, 0, 1, 2…255 sec/min

Power Supply

 300W Single PSU (FWA8308 & FWA8308-2SLOT)

 275W 1+1 redundant PSU (FWA8308-RPSU)

Dimensions

44 (H) x 440 (W) x 406.5 (D) mm

Operation Temperature

0 ~ 45 °C

Storage Temperature

-20 ~ 70 °C

Operation Humidity

Certifications

5% ~ 95%

Compatible Front

Expansion Cards

CE, FCC, LVD



IBP161: 4-port RJ-45 10/100/1000 Copper LAN Module Card

 IBP162: 2-port 10 GbE SFP+ LAN Module Card



IBP163: 2+2 ports GbE Copper or SFP LAN Module Card

 IBP164: Crypto Acceleration Card

 IBP165: 4-port RJ-45 10/100/1000 Copper LAN Module Card

 IBP167: 8-port RJ-45 10/100/1000 Copper LAN Module Card

 IP331: PCI-e 1-to-1 Riser Card

 IP332: PCI-e Adapter Card (with 2.5” HDD Interface)



5

Chapter 3 Hardware Configuration

Jumper Locations on MB968

6

Jumper Settings on MB968

JP2: Clear CMOS Setting

JP2 Setting

Normal

Clear CMOS

JP3: Clear ME Setting

JP3 Setting

Normal

Clear ME

JP9: AT / ATX Mode Setting

JP9 Setting

ATX

AT

JP12: BIOS Flash Security Setting

JP12 Setting

Normal

For BIOS Update

JP15: LED Function Selection

JP15 Setting

HDD Activate

Bypass Activate

J17, J18: PCIE Config Setting

J18 J17 Setting

2 x 8 for Golden Finger PCIE1 &

PCIE2

1x16 for Golden Finger PCIE2

7

J2: System Function Connector

J2 provides connectors for system indicators that provide light indication of the computer activities and switches to change the computer status. J2 is a 20-pin header that provides interfaces for the following functions

Pin 2, 4, 6, 8: Speaker

This connector provides an interface to a speaker for audio tone generation. An 8-ohm speaker is recommended.

Pin # Signal Name

2 SPEAKER

4 NC

6 GND

8 +5V

Pin 1, 3, 5: Power LED

The power LED indicates the status of the main power switch.


1 +5V

3 NC

5 GND

Pin 13, 14: ATX Power ON Switch

This 2-pin connector is an “ATX Power Supply On/Off Switch” on the system that connects to the power switch on the case. When pressed, the power switch will force the system to power on. When pressed again, it will force the system to power off.


13 GND

14 Power_ON

Pin 17, 18: Reset Switch

The reset switch allows the user to reset the system without turning the main power switch off and then on again. Orientation is not required when making a connection to this header.


17 GND

18 PM_SYSRST#

Pins 19, 20: HDD LED

This connector connects to the hard drive activity LED on control panel. This LED will flash when the HDD is being accessed.


19 +3.3V

20 -HDD_LED

J5: VGA Connectors

S I G N A L

N A M E

Pin # Pin # Signal Name

VGA_R 1 2 VGA_PWR

VGA_G 3 4 GND

VGA_B 5 6 NC

GND 15

8

J6, J7, J8: USB6~USB11 Ports

S I G N A

L

N A M E

Pin

#

Pin

#

Signal Name

GND 7 8 +5V

J9: Compact Flash Socket

Note: CF card supports IDE mode only.

If CF card applied, please set the SATA configuration to “IDE mode” in BIOS.

J10: Mini PCI- E / mSATA Socket

J11: SPI Debug Port

S I G N A L

N A M E

Pin # Pin # Signal Name

SPI_CS#

0

3 4 +3.3V

SPI0_WP# 7 8 SPI_CLK

J12: Digital IO 4-IN / 4-OUT Connector

S I G N

Pin # Pin #

Signal

Name

A L

N A M E

GND 1 2 +5V

OUT3 3 4 OUT1

OUT2 5 6 OUT0

IN3 7 8 IN1

IN2 9 10 IN0

J13: LPC Debug Port

Signal Pin # Pin # Signal

Name

Name

LPC_AD0 1 2

LPC_AD1 3 4

LPC_AD2 5 6 +3.3V

LPC_AD3 7 8 Ground

LPC_CLK 9

J15, J16, J20: Serial Port (COM1~COM3)

Signal

Name

Pin # Pin # Signal

Name

DCD# 1 6 DSR#

SIN 2 7 RTS#

SOUT 3 8 CTS#

DTR# 4 9 RI#

GND 5

9

J19, J25: ATX Power Connector

J21, J22, J23: Power Connector, Pitch 2.54mm


1 +5V

2 Ground

3 Ground

4 +12V

J24: Power Connector, Pitch 2.0mm


1 +5V

2 Ground

3 Ground

4 +12V

J27: mSATA Socket

CN1, CN3: HDD Serial ATA Connector

CPU_FAN1: CPU Fan Connector

CPU_FAN1 is a 4-pin header for the CPU fan.

The fan must be 12V (Max. 1A).


1 Ground

2 +12V

FAN1, FAN2, FAN3: System Fan Connectors

FAN1, FAN2, FAN3 is a 4-pin header for system fans.

The fan must be 12V (Max. 1A).


1 Ground

2 +12V

LED4: Status LED

A1 & C1 : Status LED

A2 & C2 : Bypass or HDD status LED

A3 & C3 : Power LED

Status

S I G N A L

Pin

#

Bypass or HDD

N A M E

Power

Pin

#

SIO_GPIO33 A1 C1

+5 V A2 C2

+3.3 V A3 C3

Signal

Name

SIO_GPIO32

JP15 Selection

GND

SW1: Software reset button

I/O base :

Read IO 0x1C00 and set bit 7 to “1” (Enable GPIO function)

Read IO 0x1C04 and set bit 7 to “1” (GPIO act as GPI)

Read IO 0x1C0C and set check bit 7 (Control Pin)

Signal Name

Pin # Pin #

Signal Name

2

PCH

GPIO7

10

Front Panel Features

Console Management Port

LCM

LEDs

Rear Panel Features

FWA8308 & FWA8308-2SLOT

Eth1 2 3 4 5 6 7 8

Optional

Front Expansion Card

3x Smart Fans

300W Power Supply

One or two

Add-on Card Expansion

Slot Opening

FWA8308-RPSU

275W 1+1 Redundant Power Supply

One Add-on Card

Expansion Slot Opening

11

Chapter 4 Console Mode Information

FWA8308 supports output information via Console in BIOS level.

Prepare a computer as client loaded with an existing OS such as Windows XP and Windows 7.

Connect client computer and FWA8308 with NULL Modem cable.

Follow the steps below to configure the Windows Hyper Terminal application setting:

1. Execute Hyper Terminal. Issue command “hypertrm”.

2. Customize your name for the new connection.

3. Choose COM port on the client computer for the connection.

12

4. Please make the port settings to Baud rate 19200, Parity None, Data bits 8, Stop bits 1

5. Power on FWA8308.

Press <

Tab

> key to enter BIOS setup screen in

Console mode

.

Press <

Del

> key to enter BIOS setup screen in

VGA mode

.

13

Chapter 5 Open the Chassis

Chapter 6 Installing DDR3 Memory

Install system memory by pulling the socket’s arm and pressing it into the slot gently.

Notice:

1. MB968 supports two groups of dual channels memory.

One group is on the black DIMM sockets, and the other one is blue DIMM sockets.

2. The recommended height of memory module doesn’t exceed 30 mm.

14

Chapter 7 Installing CompactFlash Card

Insert CompactFlash card into the socket.

Fig. 7-1 Insert CompactFlash Card into the

CF interface

Fig. 7-2 Completion of CompactFlash Card connection

Chapter 8 Removing and Installing the Battery

1. Press the metal clip back to eject the button battery.

2. Replace it with a new one by pressing the battery with fingertip to restore the battery

Fig. 8-1

Eject the battery and replace with new one

15

Chapter 9 Installing 2.5” HDD (FWA8308 & FWA8308-RPSU)

Front

Fig. 9- Take off two screws on bottom to remove 2.5” HDD bracket.

Fig. 9-2 Fasten the four screws to lock HDD and bracket together.

Fig. 9-3 Push HDD into connector

Front

Fig. 9-4 Completion of HDD connection

Fig. 9-5 Fix HDD bracket with two screws

16

Chapter 10 Installing Optional Dual 2.5” HDD Kit

The following is for optional Dual 2.5” HDD kit:

Fig. 10-1

Push eight shock-absorbent pads to fasten HDD bracket.

Fig. 10-2

Fasten the screws to lock 2.5” HDD bracket and bracket together.

Fig. 10-3

Fix HDD bracket on chassis with four

screws

17

Chapter 11 Installing Add-on Card

Fig. 11-1

Loosen screw on slot bracket.

Fig. 11-2

Slide in PCI-e add-on card.

Fig. 11-3

Fix the add-on card

Chapter 12 Installing Mini PCI-e Card

Fig. 12-1

Insert Mini PCI-e card.

Fig. 12-2

Push down Mini PCI-e card & fix it with two M2 screws

18

Chapter 13 BIOS Information

This setup allows you to view processor configuration used in your computer system and set the system time and date.

Main Settings

Aptio Setup Utility – Copyright © 2012 American Megatrends, Inc.

Main

Advanced

BIOS Information

System Language

System Date

System Time

Access Level

Chipset Boot

[English]

[Fri 02/21/2014]

[10:30:55]

Administrator

Security Save & Exit

Choose the system default language

→ ←

Select Screen

↑↓ Select Item

Enter: Select

+- Change Field

F1: General Help

F2: Previous Values

F3: Optimized Default

F4: Save ESC: Exit

System Language

Choose the system default language.

System Date

Set the Date. Use Tab to switch between Data elements.

System Time

Set the Time. Use Tab to switch between Data elements.

Advanced Settings

This section allows you to configure and improve your system and allows you to set up some system features according to your preference.

Aptio Setup Utility

Main

Advanced

Chipset Boot

► PCI Subsystem Settings

► ACPI Settings

► Wake up event setting

► CPU Configuration

► SATA Configuration

► Thermal Configuration

► Shutdown Temperature Configuration

► LAN Bypass Configuration

► Intel(R) Rapid Start Technology

► Intel TXT(LT) Configuration

► Intel(R) Anti-Theft Technology Configura…

► AMT Configuration

► Acoustic Management Configuration

► USB Configuration

► F81866 Super IO Configuration

► F81866 H/W Monitor

► Serial Port Console Redirection


→ ←

Select Screen


Enter: Select

+- Change Field





PCI Subsystem Settings


Main

Advanced

Chipset Boot Security

PCI Bus Driver Version V 2.05.02

PCI Common Settings

PCI Latency Timer

VGA Palette Snoop

PERR# Generation

SERR# Generation

► PCI Express Settings

[32 PCI Bus Clocks]

[Disabled]

[Disabled]

[Disabled]

Save & Exit

→ ←

Select Screen


Enter: Select

+- Change Field





PCI Latency Timer

19

Value to be programmed into PCI Latency Timer Register.

VGA Palette Snoop

Enables or disables VGA Palette Registers Snooping.

PERR# Generation

Enables or disables PCI device to generate PERR#.

SERR# Generation

Enables or disables PCI device to generate SERR#.

PCI Express Settings

Change PCI Express devices settings.

PCI Express Settings


Main

Advanced

Chipset Boot

PCI Express Device Register Settings

Relaxed Ordering

Extended Tag

No Snoop

Maximum Payload

Maximum Read Request

[Disabled]

[Disabled]

[Enabled]

[Auto]

[Auto]

PCI Express Link Register Settings

ASPM Support [Disabled]

WARNING: Enabling ASPM may cause some

PCI-E devices to fail

Extended Synch [Disabled]

Link Training Retry

Link Training Timeout

Unpopulated Links

Restore PCIE Register

[5]

100

[Keep Link ON]

[Disabled]


→ ←

Select Screen


Enter: Select

+- Change Field





Relaxed Ordering

Enables or disables PCI Express Device Relaxed Ordering.

Extended Tag

If ENABLED allows device to use 8-bit Tag field as a requester.

No Snoop

Enables or disables PCI Express Device No Snoop option.

Maximum Payload

Set Maximum Payload of PCI Express Device or allow System BIOS to select the value.

Maximum Read Request

Set Maximum Read Request Size of PCI Express Device or allow System BIOS to select the value.

ASPM Support

Set the ASPM Level: Force L0s

– Force all links to L0s State:

AUTO

– BIOS auto configure : DISABLE – Disables ASPM.

Extended Synch

If ENABLED allows generation of Extended Synchronization patterns.

Link Training Retry

Defines number of Retry Attempts software will take to retrain the link if previous training attempt was unsuccessful.

Link Training Timeout

Defines number of Microseconds software will wait before polling

‘Link Training’ bit in Link Status register. Value range from 10 to 1000 uS.

Unpopulated Links

In order to save power, software will disable unpopulated PCI Express links, if this option set to

‘Disable Link’.

ACPI Settings

20

Main

Advanced

ACPI Settings

Enable ACPI Auto Conf

Enable Hibernation

ACPI Sleep State

Lock Legacy Resources

S3 Video Repost

Chipset


Boot

[Disabled]

Security

[Enabled]

[S1 only (CPU Stop C…]

[Disabled]

[Disabled]

Save & Exit

→ ←

Select Screen


Enter: Select

+- Change Field





Enable Hibernation

Enables or Disables System ability to Hibernate (OS/S4 Sleep State). This option may be not effective with some OS.

ACPI Sleep State

Select ACPI sleep state the system will enter, when the SUSPEND button is pressed.

Lock Legacy Resources

Enabled or Disabled Lock of Legacy Resources.

S3 Video Repost

Enable or disable S3 Video Repost.

Wake up event settings


Main

Advanced

Chipset Boot

Wake system with Fixed Time [Disabled]

Wake on Ring

Wake on PCI PME

[Enabled]

[Enabled]

Wake on PCIE Wake Event [Enabled]


→ ←

Select Screen


Enter: Select

+- Change Field





Wake system with Fixed Time

Enables or Disables System wake on alarm event. When enabled, System will wake on the hr::min:: sec specified.

Wake on PCIE PME Wake Event

The options are Disabled and Enabled.

Trusted Computing


Main

Advanced

Chipset

Configuration

Security Device Sup

Current TPM Status Information

SUPPORT TUREND OFF

Boot

[Disabled]


→ ←

Select Screen


Enter: Select

+- Change Field





Security Device Support

Enables or disables BIOS support for security device. O.S. will not show Security Device. TCG EFI protocol and

INT1A interface will not be available.

21

CPU Configuration

This section shows the CPU configuration parameters.


Main

Advanced

Chipset Boot Security Save & Exit

CPU Configuration

Intel(R) Xeon(R) CPU E3-1268L v3 @ 2.30GHz

CPU Signature

Processor Family

Microcode Patch

FSB Speed

Max CPU Speed

Min CPU Speed

CPU Speed

Processor Cores

306c3

6

16

100 MHz

2300 MHz

800 MHz

2700 MHz

4

Intel HT Technology

Intel VT-x Technology

Intel SMX Technology

Supported

Supported

Supported

→ ←

Select Screen

EIST Technology

CPU C3 state

CPU C6 state

CPU C7 state

L1 Data Cache

L1 Code Cache

L2 Cache

L3 Cache

Supported

Supported

Supported

Supported

32 kB x 4

32 kB x 4

256 kB x 4

8192 kB


Enter: Select

+- Change Field





Hyper-threading [Enabled]

Active Processor Cores [All]

Limit CPUID Maximum

Execute Disable Bit

Intel Virtualization

Hardware Prefetcher

Adjacent Cache Line Prefetch

CPU AEC

[Disabled]

[Enabled]

[Enabled]

[Enabled]

[Enabled]

[Enabled]

Hyper-threading

Enabled for Windows XP and Linux (OS optimized for Hyper-Threading Technology) and Disabled for other OS (OS not optimized for Hyper-Threading Technology). When Disabled, only one thread per enabled core is enabled.

Active Processor Cores

Number of cores to enable in each processor package.

Limit CPUID Maximum

Disabled for Windows XP.

Execute Disable Bit

XD can prevent certain classes of malicious buffer overflow attacks when combined with a supporting OS (Windows

Server 2003 SP1, Windows XP SP2, SuSE Linux 9.2, Re33dHat Enterprise 3 Update 3.)

Intel Virtualization Technology

When enabled, a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology.

Hardware Prefetcher

To turn on/off the Mid level Cache (L2) streamer Prefetcher.

Adjacent Cache Line Prefetch

To turn on/off prefetching of adjacent cache lines.

SATA Configuration

22

SATA Devices Configuration.


Main

Advanced

SATA Controller(s)

SATA Mode Selection

SATA Port0

Software Preserve

SATA Port1

Software Preserve

SATA Port2

Software Preserve

SATA Port3

Software Preserve

SATA Port4

Software Preserve

SATA Port5

Software Preserve

Chipset

SATA Controller(s)

Enable / Disable Serial ATA Controller.

SATA Mode Selection

(1) IDE Mode.

(2) AHCI Mode.

(3) RAID Mode.

Thermal Configuration

Boot

[Enabled]

[AHCI]

Empty

Unknown

Empty

Unknown

Empty

Unknown

Empty

Unknown

Empty

Unknown

Empty

Unknown



→ ←

Select Screen


Enter: Select

+- Change Field



Main

Advanced

Chipset

► Platform Thermal Configuration

Boot Security Save & Exit

Platform Thermal Configuration


Main

Advanced

Chipset

Platform Thermal Configuration

Automatic Thermal Rep

Active Trip Point 0 F

Active Trip Point 1

Active Trip Point 1 F

Passive TC1 Value

Passive TC2 Value

Passive TSP Value

PCH Thermal Device

Boot

[Enabled]

100

[55 C]

75

1

5

10

[Disabled]


Automatic Thermal Reporting

Configure CRT, PSV and ACO automatically based on values recommended in BWG

’s thermal reporting for thermal management settings. Set to Disable for manual configuration.

Shutdown Temperature Configuration


Main

Advanced

Chipset

APCI Shutdown Temperature

Boot

[Disabled]


ACPI Shutdown Temperature

Set function Disabled or 70/75/80/85/90/95/100 ℃

23

LAN Bypass Configuration

Main

Advanced

Chipset

LAN Bypass Configuration

Bypass Quick Setting

Boot

[Normal]


Bypass Quick Setting

Set LAN Bypass to Normal, Bypass, Firewall or Custom Define Mode

Normal mode: All LAN ports in NORMAL. When Watchdog monitor system hangs, software will initiates a system reboot.

Bypass mode: All LAN ports in BYPASS during power-off or watchdog initiates Bypass. System will not reboot.

Firewall mode: All LAN ports in BYPASS until software change it to NORMAL under OS. When watchdog monitors system hang, software will initiates a system reboot.

Custom Define mode: Customer defines watchdog reset, watchdog Bypass and power-off Bypass settings.


Main

Advanced

LAN Bypass Configuration

Bypass Quick Setting

WDT Reset Signal

WDT Bypass Setting

LAN5 LAN6 Bypass

LAN7 LAN8 Bypass

Ext LAN1 LAN2 Bypass


System OFF Bypass Setting

LAN5 LAN6 Bypass

LAN7 LAN8 Bypass



Chipset


Boot

[Custom Define]

[Disabled]

[Normal]

[Normal]

[Normal]

[Normal]

[Normal]

[Normal]

[Normal]

[Normal]


Note:

“Ext LAN Bypass” items only appear when extended IBASE LAN module card installed.

AMT Configuration


Main

Advanced

Chipset Boot Security Save & Exit

Intel AMT

BIOS Hotkey Pressed

MEBx Selection Screen

Hide Un-Configure ME Confirmation

Un-Configure ME

Amt Wait Timer

Disable ME

ASF

Activate Remote Assistance Process

USB Configure

PET Progress

[Enabled]

[Disabled]

[Disabled]

[Disabled]

[Disabled]

0

[Disabled]

[Enabled]

[Disabled]

[Enabled]

[Enabled]

→ ←

Select Screen


Enter: Select

+- Change Field

AMT CIRA Timeout 0

F2: Previous

Watchdog [Disabled]


OS Timer 0


BIOS Timer 0

AMT Configuration

Options are Enabled and Disabled.

Note: iAMT H/W is always enabled. This option just controls the BIOS extension execution. If enabled, this requires additional firmware in the SPI device.

Unconfigure ME

Perform AMT/ME unconfigure without password operation.

Amt Wait Timer

Set timer to wait before sending ASF_GET_BOOT_OPTIONS.

Activate Remote Assistance Process

Trigger CIRA boot.

PET Progress

24

User can Enable/Disable PET Events progress to receive PET events or not.

Watchdog Timer

Enable/Disable Watchdog Timer.

Acoustic Management Configuration


Main

Advanced

Chipset

Acoustic Management Configuration

Automatic Acoustic Management

Boot

[Disabled]


→ ←

Select Screen

Enter: Select

+- Change Field





Smart fan function Enable or Disable.

USB Configuration


Main

Advanced

Chipset Boot

USB Configuration

USB Devices:

1 Keyboard, 1 Mouse, 2 Hubs

Legacy USB Support

USB3.0 Support

XHCI Hand-off

EHCI Hand-off

Port 60/64 Emulation

USB hardware delays and time-outs:

USB Transfer time-out [20 sec]

Device reset tine-out

Device power-up delay

[20 sec]

[Auto]

[Enabled]

[Enabled]

[Enabled]

[Disabled]

[Enabled]


→ ←

Select Screen


Enter: Select

+- Change Field



Legacy USB Support

Enables Legacy USB support.

AUTO option disables legacy support if no USB devices are connected.

DISABLE option will keep USB devices available only for EFI applications.

USB3.0 Support

Enable/Disable USB3.0 (XHCI) Controller support.

XHCI Hand-off

This is a workaround for OSes without XHCI hand-off support. The XHCI ownership change should be claimed by

XHCI driver.

EHCI Hand-off

Enabled/Disabled. This is a workaround for OSes without EHCI hand-off support. The EHCI ownership change should be claimed by EHCI driver.

Port 64/60 Emulation

Enables I/O port 60h/64h emulation support. This should be enabled for the complete USB keyboard legacy support for non-USB aware OSes.

USB Transfer time-out

The time-out value for Control, Bulk, and Interrupt transfers.

Device reset tine-out

USB mass Storage device start Unit command time-out.

Device power-up delay

Maximum time the device will take before it properly reports itself to the Host Controller.

‘Auto’ uses default value: for a Root port it is 100ms, for a Hub port the delay is taken from Hub descriptor.

F81866 Super IO Configuration


25

Main

Advanced

Chipset

Super IO Configuration

F81866 Super IO Chip

► Serial Port 0 Configuration

► Serial Port 1 Configuration

Power Failure

KB/MS Power On

Boot

F81866

[Always off]

[None]


→ ←

Select Screen


Enter: Select

+- Change Field



Serial Port Configuration

Set Parameters of Serial Ports. User can Enable/Disable the serial port and Select an optimal settings for the Super IO

Device.

F81866 H/W Monitor


Main

Advanced

Chipset

PC Health Status

Fan1 smart fan control



System temperature1

System temperature2

System temperature3

FAN1 Speed

FAN2 Speed

FAN3 Speed

Boot

[50 C]

[50 C]

[Disabled]

+41 C

+38 C

+37 C

1545 RPM

1550 RPM

1546 RPM


→ ←

Select Screen


Enter: Select

+- Change Field



VBAT

Temperatures/Voltages

These fields are the parameters of the hardware monitoring function feature of the motherboard. The values are readonly values as monitored by the system and show the PC health status.

Fan1/Fan2/Fan3 Smart Fan Control

This field enables or disables the smart fan feature. At a certain temperature, the fan starts turning. Once the temperature drops to a certain level, it stops turning again.

Chipset Settings



Main Advanced

Chipset

►

PCH-IO Configuration

►

System Agent (SA) Configuration

+3.264 V


→ ←

Select Screen


Enter: Select

+- Change Field





26

PCH-IO Configuration

This section allows you to configure the North Bridge Chipset.


Main Advanced

Chipset

Boot

Intel PCH RC Version 1.6.2.0

Intel PCH SKU Name C226

Intel PCH Rev ID O5/C2

► PCI Express Configuration

► USB Configuration

► PCH Azalia Configuration

► BIOS Security Configuration

PCH LAN Controller

Wake on LAN

DeepSx Power Policies

Display Logic

CLKRUN# Logic

SB CRID

SLP_S4 Assertion Width

Restore AC Power Loss

[Enabled]

[Enabled]

[Disabled]

[Enabled]

[Enabled]

[Disabled]

[4-5 Seconds]

[Last State]


→ ←

Select Screen


Enter: Select

+- Change Field





PCH LAN Controller

Enable or disable onboard NIC.

Wake on LAN

Enable or disable integrated LAN to wake the system. (The Wake On LAN cannot be disabled if ME is on at Sx state.)

SLP_S4 Assertion Width

Select a minimum assertion width of the SLP_S4# signal.

Restore AC Power Loss

Select AC power state when power is re-applied after a power failure.

PCI Express Configuration

Main Advanced

Chipset

PCI Express Configuration

PCI Express Clock Gating

DMI Link ASPM Control

DMI Link Extended Synch Control

PCIE Root Port Function

Subtractive Decode

PCIE Port 1 is assign

► PCI Express Root Port 2







Boot

[Enabled]

[Enabled]

[Disabled]

[Disabled]

[Disabled]


→ ←

Select Screen


Enter: Select

+- Change Field



PCI Express Clock Gating

Enable or disable PCI Express Clock Gating for each root port.

DMI Link ASPM Control

The control of Active State Power Management on both NB side and SB side of the DMI link.

PCIE Root Port Function

Enable or disable PCI express Root Port function swapping.

27

USB Configuration

Main Advanced

Chipset


USB Configuration

USB Precondition [Disabled]

→ ←

Select Screen

XHCI Mode [Smart Auto]


Enter: Select

USB Ports Per-Port Disable Control [Disabled]

+- Change Field



USB Precondition

Precondition work on USB host controller and root ports for faster enumeration.

xHCI Mode

Mode of operation of xHCI controller

BTCG

Enable or disable trunk clock gating.

USB Ports Per-Port Disable Control

Control each of the USB ports (0~13) disabling.

PCH Azalia Configuration

Main Advanced

Chipset

PCH Azalia Configuration

Azalia

Azalia Docking Support

Azalia PME

Boot

[Auto]

[Disabled]

[Disabled]


→ ←

Select Screen


Enter: Select

+- Change Field

Azalia

Control Detection of the Azalia device.

Disabled = Azalia will unconditionally disabled.

Enabled Azalia will be unconditionally enabled.

Auto = Azalia will enabled if present, disabled otherwise.

System Agent (SA) Configuration




Main Advanced

Chipset


System Agent Bridge Name Haswell

System Agent RC Version 1.6.2.0

VT-d Capability Supported

VT-d [Enabled]

CHAP Device (B0:D7:F0) [Disabled]

→ ←

Select Screen

Thermal Device (B0:D4:F0)

Enable NB CRID

BDAT ACPI Table Support

[Disabled]

[Disabled]

[Disabled]


Enter: Select

+- Change Field


► Graphics Configuration

► DMI Configuration

► NB PCIe Configuration

► Memory Configuration

► Memory Thermal Configuration

► GT – Power Management Control




VT-d

Check to enable VT-d function on MCH.

Enable NB CRID

Enable or disable NB CRID WorkAround.

28

Boot Settings

Graphics Configuration


Main Advanced

Chipset

Graphics Configuration

IGFX VBIOS Version

IGfx Frequency

Graphics Turbo IMON

Primary Display

Internal Graphics

GTT Size

Aperture Size

DVMT Pre-Allocated

DVMT Total Gfx Mode

Gfx Low Power Mode

Graphics Performance

► LCD Control

Boot

2164

700 MHz

31

[Auto]

[Auto]

[2MB]

[256MB]

[32M]

[256M]

[Enabled]

[Disabled]


→ ←

Select Screen


Enter: Select

+- Change Field





Primary Display

Select which of IGFX/PEG/PCI graphics device should be primary display or select SG for switchable Gfx.

Internal Graphics

Keep IGD enabled based on the setup options.

DVMT Pre-Allocated

Select DVMT 5.0 Pre-Allocated (Fixed) graphics memory size used by the internal graphics device.

DVMT Total Gfx Mem

Select DVMT 5.0 total graphics memory size used by the internal graphics device.

Gfx Low Power Mode

This option is applicable for SFF only.

Primary IGFX Boot Display (LCD Control)

Select the Video Device that will be activated during POST. This has no effect if external graphics present.

Secondary booty display selection will appear based on your selection. VGA modes will be supported only on primary display.

Memory Configuration


Main Advanced

Chipset

Memory Information

Memory Frequency

Total Memory

DIMM#0

DIMM#1

DIMM#2

DIMM#3

CAS Latency (tCL)

Minimum delay time

CAS to RAS (tRCDmin)

Row Precharge (tRPmin)

Active to Precharge (tRASmin)

XMP Profile 1

XMP Profile 2

Boot

1600 MHz

32768 MB (DDR3)

8192 MB (DDR3)

8192 MB (DDR3)

8192 MB (DDR3)

8192 MB (DDR3)

11

11

11

28

Not Supported

Not Supported


→ ←

Select Screen


Enter: Select

+- Change Field






29

Main Advanced

Chipset

Boot Configuration

Setup Prompt Timeout

Bootup NumLock State

Quiet Boot

Fast Boot

Boot mode select

FIXED BOOT ORDER Priorities

Boot Option #1

Boot Option #2

Boot Option #3

Boot Option #4

Boot Option #5

Boot Option #6

Boot Option #7

► CSM16 parameters

Boot

1

[On]

[Disabled]

[Disabled]

[LEGACY]

[Hard Disk]

[CD/DVD]

[USB Hard Disk]

[USB CD/DVD]

[USB Key]

[USB Floppy]

[Network]


→ ←

Select Screen


Enter: Select

+- Change Field





Setup Prompt Timeout

Number of seconds to wait for setup activation key.

65535(0xFFFF) means indefinite waiting.

Bootup NumLock State

Select the keyboard NumLock state.

Quiet Boot

Enables/Disables Quiet Boot option.

Fast Boot

Enables/Disables boot with initialization of a minimal set of devices required to launch active boot option. Has no effect for BBS boot options.

Boot Option Priorities

Sets the system boot order.

CSM16 parameters

This section allows you to configure the boot settings.


Main Advanced

CSM16 Parameters

CSM16 Module Version

GateA20 Active

Option ROM Messages

INT19 Trap Response

Chipset

Boot

07.70

[Upon Request]

[Force BIOS]

[Immediate]


→ ←

Select Screen


Enter: Select

+- Change Field



GateA20 Active

UPON REQUEST: GA20 can be disabled using BIOS services

ALWAYS: do not allow disabling GA20; this option is useful when any RT code is executed above 1MB.

Option ROM Messages

Set display mode for Option ROM

INT19 Trap Response

BIOS reaction on INT19 trapping by option ROM:

IMMEDIATE: execute the trap right away.

POSTPONED: execute the trap during legacy boot.

Security Settings


30


Main Advanced

Chipset Boot

Security

Password Description

If ONLY the Administrator’s password is set, then this only limit access to Setup and is only asked for when entering Setup.

If ONLY the User’s password is set, then this is a power on password and must be entered to boot or enter Setup. In Setup the User will have

Administrator rights

The password length must be in the following range:

Minimum length

Maximum length

Administrator Password

User Password

3

20

Save & Exit

→ ←

Select Screen


Enter: Select

+- Change Field





Administrator Password

Set Setup Administrator Password.

User Password

Set User Password.

Save & Exit Settings

Main

Advanced

Chipset

Save Changes and Exit

Discard Changes and Exit

Save Changes and Reset

Discard Changes and Reset

Save Options

Save Changes

Discard Changes

Restore Defaults

Save as User Defaults

Restore User Defaults

Boot Override

Launch EFI Shell from filesystem device



→ ←

Select Screen


Enter: Select

+- Change Field





Save Changes and Exit

Exit system setup after saving the changes.

Discard Changes and Exit

Exit system setup without saving any changes.

Save Changes and Reset

Reset the system after saving the changes.

Discard Changes and Reset

Reset system setup without saving any changes.

Save Changes

Save Changes done so far to any of the setup options.

Discard Changes

Discard Changes done so far to any of the setup options.

Restore Defaults

Restore/Load Defaults values for all the setup options.

Save as User Defaults

Save the changes done so far as User Defaults.

Restore User Defaults

Restore the User Defaults to all the setup options.

31

Chapter 14 Watchdog Timer Configuration

The WDT is used to generate a variety of output signals after a user programmable count. The WDT is suitable for use in the prevention of system lock-up, such as when software becomes trapped in a deadlock. Under these sorts of circumstances, the timer will count to zero and the selected outputs will be driven. Under normal circumstance, the user will restart the WDT at regular intervals before the timer counts to zero.

SAMPLE CODE:

This code and information is provided "as is" without warranty of any kind, either expressed or implied, including but not limited to the implied warranties of merchantability and/or fitness for a particular purpose.

//---------------------------------------------------------------------------

//

// THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY

// KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE

// IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A PARTICULAR

// PURPOSE.

//

//---------------------------------------------------------------------------

#include <dos.h>

#include <conio.h>

#include <stdio.h>

#include <stdlib.h>

#include "F81866.H"

//--------------------------------------------------------------------------- int main (int argc, char *argv[]); void EnableWDT(int); void DisableWDT(void);

//--------------------------------------------------------------------------- int main (int argc, char *argv[])

{ char

unsigned

char

char printf("Fintek 81866 watch dog program\n");

SIO = Init_F81866(); if (SIO == 0)

{ not

return(1);

}//if (SIO == 0) if (argc != 2)

{

Parameter

(1);

} bTime = strtol (argv[1], endptr, 10); printf("System will reset after %d seconds\n", bTime);

(bTime)

{ EnableWDT(bTime);

else

{ DisableWDT();

32

}

//--------------------------------------------------------------------------- void EnableWDT(int interval)

{

unsigned bBuf = Get_F81866_Reg(0x2B); bBuf &= (~0x20);

Set_F81866_Reg(0x2B,

//switch 7 bBuf = Get_F81866_Reg(0xF5); bBuf &= (~0x0F);

bBuf

Set_F81866_Reg(0xF5,

Set_F81866_Reg(0xF6, bBuf = Get_F81866_Reg(0xFA);

bBuf

Set_F81866_Reg(0xFA, bBuf = Get_F81866_Reg(0xF5);

bBuf


}

//--------------------------------------------------------------------------- void DisableWDT(void)

{

unsigned

//switch 7 bBuf = Get_F81866_Reg(0xFA); bBuf &= ~0x01;

Set_F81866_Reg(0xFA, bBuf = Get_F81866_Reg(0xF5); bBuf &= ~0x20;

|=


}

//---------------------------------------------------------------------------

//---------------------------------------------------------------------------

//




// PURPOSE.

//

//---------------------------------------------------------------------------

#include "F81866.H"

#include <dos.h>

//--------------------------------------------------------------------------- unsigned int F81866_BASE; void Unlock_F81866 (void); void Lock_F81866 (void);

//--------------------------------------------------------------------------- unsigned int Init_F81866(void)

{ unsigned int result;

unsigned

F81866_BASE = 0x4E; result = F81866_BASE;

33

ucDid = Get_F81866_Reg(0x20);

(ucDid

{ goto

F81866_BASE = 0x2E; result = F81866_BASE; ucDid = Get_F81866_Reg(0x20);

(ucDid

{ goto

F81866_BASE = 0x00; result = F81866_BASE;

Init_Finish:

return

}

//--------------------------------------------------------------------------- void Unlock_F81866 (void)

{

F81866_UNLOCK);

outportb(F81866_INDEX_PORT,

}

//--------------------------------------------------------------------------- void Lock_F81866 (void)

{

F81866_LOCK);

}

//--------------------------------------------------------------------------- void Set_F81866_LD( unsigned char LD)

{

Unlock_F81866();

F81866_REG_LD);

Lock_F81866();

}

//--------------------------------------------------------------------------- void Set_F81866_Reg( unsigned char REG, unsigned char DATA)

{

Unlock_F81866();

REG);

DATA);

Lock_F81866();

}

//--------------------------------------------------------------------------- unsigned char Get_F81866_Reg(unsigned char REG)

{

unsigned

Unlock_F81866();

REG);

Result = inportb(F81866_DATA_PORT);

Lock_F81866();

return

}

//---------------------------------------------------------------------------

//---------------------------------------------------------------------------

//




// PURPOSE.

//

//---------------------------------------------------------------------------

#ifndef __F81866_H

#define

//---------------------------------------------------------------------------

#define F81866_INDEX_PORT (F81866_BASE)

#define F81866_DATA_PORT (F81866_BASE+1)

//---------------------------------------------------------------------------

F81866_REG_LD

//---------------------------------------------------------------------------

34

F81866_LOCK

//--------------------------------------------------------------------------- unsigned int Init_F81866(void); void Set_F81866_LD( unsigned char); void Set_F81866_Reg( unsigned char, unsigned char); unsigned char Get_F81866_Reg( unsigned char);

//---------------------------------------------------------------------------

#endif //__F81866_H

Chapter 15 Digital I/O Sample Configuration

Filename：Main.cpp

//---------------------------------------------------------------------------

//




// PURPOSE.

//

//---------------------------------------------------------------------------

#include <dos.h>

#include <conio.h>

#include <stdio.h>

#include <stdlib.h>

#include "F81865.H"

#define BIT0 0x01

#define BIT1 0x02

#define BIT2 0x04

#define BIT3 0x08

#define BIT4 0x10

#define BIT5 0x20

#define BIT6 0x40

#define BIT7 0x80

//--------------------------------------------------------------------------- int main (void); void Dio5Initial(void); void Dio5SetOutput(unsigned char); unsigned char Dio5GetInput(void); void Dio5SetDirection(unsigned char); unsigned char Dio5GetDirection(void);

//--------------------------------------------------------------------------- int main (void)

{

SIO; unsigned char DIO; printf("Fintek 81865/81866 digital I/O test program\n");

SIO = Init_F81865(); if (SIO == 0)

{ printf("Can not detect Fintek 81865/81866, program abort.\n");

return(1);

}//if (SIO == 0)

Dio5Initial();

/*

GPIO50..57

Dio5SetDirection(0xF0); //GP50..53 = input, GP54..57=output printf("Current DIO direction = 0x%X\n", Dio5GetDirection()); printf("Current DIO status = 0x%X\n", Dio5GetInput()); printf("Set DIO output to high\n");

Dio5SetOutput(0x0F); printf("Set DIO output to low\n");

Dio5SetOutput(0x00);

*/

//for

Dio5SetDirection(0xF0); //GP50..53 = input, GP54..57=output


// DIO = Dio5GetInput() & 0x0F;

35


DIO = Dio5GetInput() & 0x0F; if (DIO != 0x0A)

{ printf("The Fintek 81865 digital IO abnormal, abort.\n");

return(1);

}//if (DIO != 0x0A)

Dio5SetOutput(0xA0);

Dio5SetOutput(0xF0);

//clr#

//clk and clr# is high

Dio5SetOutput(0xA0);

DIO = Dio5GetInput() & 0x0F; if (DIO != 0x05)

{ printf("The Fintek 81865 digital IO abnormal, abort.\n");

return(1);

} printf("!!! Pass !!!\n");

return

}

//--------------------------------------------------------------------------- void Dio5Initial(void)

{ unsigned char ucBuf;

//switch GPIO multi-function pin for ucBuf = Get_F81865_Reg(0x26); ucBuf |= BIT0; gpio 50~57

//gpio53~57 UR5_FULL_EN(bit1), clear UR6_FULL_EN(bit3)

//set UR5_FULL_EN,should set UR_GP_PROG_EN = 1 (reg26,bit0) first

Set_F81865_Reg(0x26,

//set UR5_FULL_EN(bit1), clear UR6_FULL_EN(bit3) ucBuf = Get_F81865_Reg(0x2A); ucBuf &= ~BIT3;//clear bit 3, ucBuf |= BIT1;//set bit 1,

//GPIO51 ~ GPIO52

//GPIO50

//set FDC_GP_EN(bit3), clear RTS6_ALT_EN(RTS6_2_ALT_EN)(bit6) ucBuf = Get_F81865_Reg(0x2A); ucBuf &= ~(BIT4+BIT5+BIT6); //clear UR6_ALT_EN(bit5), IR_ALT_EN(bit4), RTS6_ALT_EN(RTS6_2_ALT_EN)(bit6)

Set_F81865_Reg(0x2a,

//set FDC_GP_EN(bit3), should clear UR_GP_PROG_EN (reg26,bit0) first ucBuf = Get_F81865_Reg(0x26); ucBuf &= ~BIT0;

Set_F81865_Reg(0x26, ucBuf);//clear UR_GP_PROG_EN = 0 (reg26,bit0) ucBuf = Get_F81865_Reg(0x2A); ucBuf |= BIT3; //set FDC_GP_EN(bit3),

Set_F81865_Reg(0x2a, to 6

//enable the GP5 group ucBuf = Get_F81865_Reg(0x30); ucBuf |= 0x01;

Set_F81865_Reg(0xA0,


}

//---------------------------------------------------------------------------

36

void Dio5SetOutput(unsigned char NewData)

{

{


}

//--------------------------------------------------------------------------- unsigned char Dio5GetInput(void) unsigned char result; result = Get_F81865_Reg(0xA2);

(result);

}

//--------------------------------------------------------------------------- void Dio5SetDirection(unsigned char NewData)

{

//NewData : 1 for input, 0 for output

Set_F81865_LD(0x06);


}

//--------------------------------------------------------------------------- unsigned char Dio5GetDirection(void)

{ unsigned char result;

Set_F81865_LD(0x06); result = Get_F81865_Reg(0xA0);

(result);

}

//---------------------------------------------------------------------------

Filename：81865.cpp

//---------------------------------------------------------------------------

//




// PURPOSE.

//

//---------------------------------------------------------------------------

#include "F81865.H"

#include <dos.h>

//--------------------------------------------------------------------------- unsigned int F81865_BASE; void Unlock_F81865 (void); void Lock_F81865 (void);

//--------------------------------------------------------------------------- unsigned int Init_F81865(void)

{ unsigned int result; unsigned char ucDid;


== ==

{ goto


if 0x10)

{ goto

Init_Finish:

F81865_BASE = 0x00; result = F81865_BASE;

}

//--------------------------------------------------------------------------- void Unlock_F81865 (void)

{

F81865_UNLOCK);


}

//--------------------------------------------------------------------------- void Lock_F81865 (void)

{

}

//--------------------------------------------------------------------------- void Set_F81865_LD( unsigned char LD)

{

Unlock_F81865();

outportb(F81865_DATA_PORT,

Lock_F81865();

}

//--------------------------------------------------------------------------- void Set_F81865_Reg( unsigned char REG, unsigned char DATA)

{

Unlock_F81865();

REG);

outportb(F81865_DATA_PORT,

Lock_F81865();

}

//--------------------------------------------------------------------------- unsigned char Get_F81865_Reg(unsigned char REG)

{ unsigned char Result;

Unlock_F81865();

37

to 6 to 6 to 6 to 6


Result = inportb(F81865_DATA_PORT);

Lock_F81865();

Result;

}

//---------------------------------------------------------------------------

Filename：81865.h

//---------------------------------------------------------------------------

//




// PURPOSE.

//

//---------------------------------------------------------------------------

#ifndef __F81865_H

#define

//---------------------------------------------------------------------------

#define F81865_INDEX_PORT

#define F81865_DATA_PORT

(F81865_BASE)

(F81865_BASE+1)

//---------------------------------------------------------------------------

#define 0x07

//---------------------------------------------------------------------------

F81865_UNLOCK

#define 0xAA

//--------------------------------------------------------------------------- unsigned int Init_F81865(void); void Set_F81865_LD( unsigned char); void Set_F81865_Reg( unsigned char, unsigned char); unsigned char Get_F81865_Reg( unsigned char);

//---------------------------------------------------------------------------

#endif //__F81865_H

38

Chapter 16 Drivers Installation

This section describes the installation procedures for software and drivers under the Windows. The software and drivers are included with the board. If you find the items missing, please contact the vendor where you made the purchase. The contents of this section include the following:

Intel® Chipset Software Installation Utility

Intel® Graphics Driver Installation

LAN Drivers Installation

Intel® Management Engine Interface

IMPORTANT NOTE:

After installing your Windows operating system, you must install first the Intel® Chipset Software Installation Utility before proceeding with the drivers installation.

Intel® Chipset Software Installation Utility

The Intel Chipset Drivers should be installed first before the software drivers to enable Plug & Play

INF support for Intel chipset components. Follow the instructions below to complete the installation.

1. Insert the CD that comes with the board. Click Intel and then Intel(R) 7 Series Chipset Drivers.

2. Click Intel(R) Chipset Software Installation Utility.

[

39

3. When the Welcome screen to the Intel® Chipset Device Software appears, click Next to continue.

4. Click Yes to accept the software license agreement and proceed with the installation process.

5. On the Readme File Information screen, click Next to continue the installation.

6. The Setup process is now complete. Click Finish to restart the computer and for changes to take effect.

40

VGA Drivers Installation

NOTE: Before installing the Intel(R) C216 Chipset Family Graphics Driver, the Microsoft .NET Framework 3.5 SPI should be first installed.

To install the VGA drivers, follow the steps below.

1. Insert the CD that comes with the board. Click Intel and then Intel(R) Q7 Series Chipset

Drivers

.

2. Click Intel(R) C216 Chipset Family Graphics Driver.

41

3. When the Welcome screen appears, click Next to continue.

4. Click Yes to to agree with the license agreement and continue the installation.

5. On the Readme File Information screen, click Next to continue the installation of the Intel® Graphics Media

Accelerator Driver.

42

6. On Setup Progress screen, click Next to continue.

7. Setup complete. Click Finish to restart the computer and for changes to take effect.

LAN Drivers Installation

1. Insert the CD that comes with the board. Click Intel and then Intel(R) Q7 Series Chipset

Drivers

.

2. Click Intel(R) PRO LAN Network Driver.

43

3. Click Install Drivers and Software.

4. When the Welcome screen appears, click Next.

5. Click Next to to agree with the license agreement.

44

6. Click the checkbox for Drivers in the Setup Options screen to select it and click Next to continue.

7. The wizard is ready to begin installation. Click Install to begin the installation.

8. When InstallShield Wizard is complete, click Finish.

45

Intel® Management Engine Interface

Follow the steps below to install the Intel Management Engine.

1. Insert the CD that comes with the board. Click Intel and then Intel(R) AMT 8.0 Drivers.

2. When the Welcome screen to the InstallShield Wizard for Intel® Management Engine Components, click the checkbox for Install Intel® Control Center & click Next.

3. Click Yes to to agree with the license agreement.

46

4. When the Setup Progress screen appears, click Next. Then, click Finish when the setup progress has been successfully installed.

[

Intel® USB 3.0 Drivers

47

1. Insert the CD that comes with the board. Click Intel and then Intel(R) C216 Series Chipset Drivers.

2. Click Intel(R) USB 3.0 Drivers.

3. When the Welcome screen to the InstallShield Wizard for Intel® USB 3.0 eXtensible Host Controller Driver, click

Next

.

4. Click Yes to to agree with the license agreement and continue the installation.

48

5. On the Readme File Information screen, click Next to continue the installation of the Intel® USB 3.0 eXtensible

Host Controller Driver.

6. Setup complete. Click Finish to restart the computer and for changes to take effect.

49

Appendix-A I/O Port Address Map

Each peripheral device in the system is assigned a set of I/O port addresses which also becomes the identity of the device. The following table lists the I/O port addresses used.

Address

000h - 01Fh

020h - 03Fh

040h - 05Fh

060h - 06Fh

070h - 07Fh

080h - 09Fh

0A0h - 0BFh

0C0h - 0DFh

0F0h

0F1h

1F0h - 1F7h

2F8h - 2FFh

2B0h- 2DFh

360h - 36Fh

3F8h - 3FFh

Device Description

DMA Controller #1

Interrupt Controller #1

Timer

Keyboard Controller

Real Time Clock, NMI

DMA Page Register

Interrupt Controller #2

DMA Controller #2

Clear Math Coprocessor Busy Signal

Reset Math Coprocessor

IDE Interface

Serial Port #2(COM2)

Graphics adapter Controller

Network Ports

Serial Port #1(COM1)

Appendix-B Interrupt Request Lines (IRQ)

Peripheral devices use interrupt request lines to notify CPU for the service required. The following table shows the

IRQ used by the devices on board.

Level Function

IRQ0 System Timer Output

IRQ1 Keyboard

IRQ3 Serial Port #2

IRQ4

IRQ8

Serial Port #1

Real Time Clock

50

Appendix-C FWA8308 Series Configurations

The following lists the available SKUs of FWA8308 for different system requirement.

FWA8308

2.5” HDD x1, PCI-e add-on card rear expansion x1, front panel expansion card x1, 300W PSU

 MB968 x1

 IP331 x1: 1-to-1 Riser Card

 IP332 x1: PCI-e Adapter

 Single 2.5” HDD Bracket x1

 4-pin Smart Fan x3

 300W Single Power Supply

FWA8308 Optional Items

 IBP161, IBP162…: Expansion LAN Card

 Dual 2.5” HDD Bracket Kit SC2FWA8308-0A1100P

 VGA cable: C501VGA0415272000P

 Console Cable: C501PK15108A12000P

 Rear Rackmount Kit: 600 or 800mm

FWA8308-2SLOT

3.5” HDD x1, PCI-e add-on card rear expansion x2, 300W PSU

 MB968 x1




Single 3.5” HDD Bracket x1


 300W Single Power Supply

FWA8308-2SLOT Optional Items

 Dual 2.5” HDD Bracket Kit SC2FWA8308-0A1100P

 VGA cable: C501VGA0415272000P



FWA8308-RPSU

2.5” HDD x1, PCI-e add-on card rear expansion x1, front panel expansion card x1, 275W 1+1 Redundant PSU

 MB968 x1


 IP332 x1: PCI-e Adapter

 Single 2.5” HDD Bracket x1


 275W 1+1 Redundant Power Supply

FWA8308-RPSU Optional Items

 IBP161, IBP162…: Expansion LAN Card

 VGA cable: C501VGA0415272000P



51

FWA8308

FWA8308 Series

Networking Appliance

s Manual

Table of Contents

Foreword

WARNING!

Chapter 1 Introduction

Chapter 2 System Specification

Chapter 3 Hardware Configuration

Jumper Locations on MB968

Jumper Settings on MB968

Front Panel Features

Rear Panel Features

Chapter 4 Console Mode Information

Chapter 5 Open the Chassis

Chapter 6 Installing DDR3 Memory

Chapter 7 Installing CompactFlash Card

Chapter 8 Removing and Installing the Battery

Chapter 9 Installing 2.5” HDD (FWA8308 & FWA8308-RPSU)

Chapter 10 Installing Optional Dual 2.5” HDD Kit

Chapter 11 Installing Add-on Card

Chapter 12 Installing Mini PCI-e Card

Chapter 13 BIOS Information

Chapter 14 Watchdog Timer Configuration

Chapter 15 Digital I/O Sample Configuration

Chapter 16 Drivers Installation

Intel® Chipset Software Installation Utility

VGA Drivers Installation

Drivers

LAN Drivers Installation

Drivers

Intel® Management Engine Interface

Intel® USB 3.0 Drivers

Appendix-A I/O Port Address Map

Appendix-B Interrupt Request Lines (IRQ)

Appendix-C FWA8308 Series Configurations

2.5” HDD x1, PCI-e add-on card rear expansion x1, front panel expansion card x1, 300W PSU

3.5” HDD x1, PCI-e add-on card rear expansion x2, 300W PSU

2.5” HDD x1, PCI-e add-on card rear expansion x1, front panel expansion card x1, 275W 1+1 Redundant PSU

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Table of contents