EVALUATION KIT AVAILABLE MAX8989 Multimode PA Step-Down Converter with Linear Bypass Mode General Description The MAX8989 step-down converter is optimized for powering the power amplifier (PA) in multistandard handsets such as LTE, WCDMA, GSM, and EDGE. The device integrates a high-efficiency PWM step-down converter for medium- and low-power transmission with an 85mI (typ) low dropout (LDO) bypass regulator, in parallel with the step-down converter, enabling high-power transmission. The IC uses an analog input driven by an external DAC to control the output voltage linearly for continuous PA power adjustment. The bypass LDO powers the PA directly from the battery during high-power transmission or in case of insufficient headroom between the input and programmed output. The bypass LDO is enabled when the output voltage is greater than 1.0V. In the case where the output current exceeds the step-down converter current limit, the bypass LDO provides supplementary current to the output, ensuring a stable output voltage. The bypass LDO also provides a smooth transition between step-down regulation and operation in dropout. The IC is available in a 9-bump, 1.6mm x 1.6mm WLP package (0.69mm max height). Applications Features S PA Step-Down Converter 25µs (typ) Settling Time for 0.4V to 3.2V Output Voltage Change Dynamic Output Voltage Setting from 0.4V to VIN 85mI pFET and 100% Duty Cycle for Low Dropout 2MHz Switching Frequency Low Output Voltage Ripple 2% Output Voltage Accuracy Over Load, Line, and Temperature Tiny External Components S 2.5A Output Current Capability S Simple Logic On/Off Control S Low 0.1µA Shutdown Current S 2.7V to 5.5V Supply Voltage Range S Thermal Overload Protection S 1.6mm x 1.6mm WLP Package (0.69mm max Height) LTE, WCDMA, GSM, and EDGE Cell Phones/ Smartphones Typical Operating Circuit Ordering Information PART MAX8989EWL+T TEMP RANGE PIN-PACKAGE -40NC to +85NC 9 WLP 0.5mm pitch +Denotes lead(Pb)-free/RoHS-compliant package. T = Tape and reel. This device has a minimum order increment of 2500 pieces. BATTERY INPUT 2.7V TO 5.5V MAX8989 IN2 OUT OUTPUT 0.4V TO VBATT UP TO 2.5A 4.7µF BYPASS LDO IN1 4.7µF ANALOG CONTROL 0.2V TO 2.1V OFF FPWM REFIN 1000pF STEP-DOWN LOGIC LX 4.7µH 4 x 4.7µF ON SKIP EN SKIP For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com. PGND AGND 19-5489; Rev 1; 1/11 MAX8989 Multimode PA Step-Down Converter with Linear Bypass Mode ABSOLUTE MAXIMUM RATINGS IN1, IN2, SKIP, EN, REFIN to AGND.....................-0.3V to +6.0V OUT to AGND............................................ -0.3V to (VIN2 + 0.3V) IN1 to IN2..............................................................-0.3V to +0.3V PGND to AGND.....................................................-0.3V to +0.3V IN1, IN2, OUT, LX Current (Note 1).................................. 1ARMS OUT Short Circuit to AGND........................................Continuous Continuous Power Dissipation (TA = +70NC) 9-Bump WLP 0.5mm Pitch (derate 14.1mW/NC above +70NC)...................................1.1W Operating Temperature Range........................... -40NC to +85NC Junction to Ambient Thermal Resistance (BJA) (Note 2)...............................71NC/W Operating Temperature Range........................... -40NC to +85NC Junction Temperature (TJMAX)........................................+150NC Storage Temperature Range............................. -65NC to +150NC Soldering Temperature (reflow).......................................+260NC Note 1: LX has internal clamp diodes to PGND and IN1. Applications that forward bias this diode should take care not to exceed the power dissipation limits of the device. Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VIN1 = VIN2 = VSKIP = VEN = 3.6V, VREFIN = 0.9V, TA = -40NC to +85NC. Typical values are at TA = +25NC, unless otherwise noted.) (Note 3) PARAMETER CONDITIONS MIN TYP MAX UNITS 5.5 V 2.63 2.70 V INPUT SUPPLY Input Voltage Range (VIN) VIN1 = VIN2 2.7 Input Undervoltage Threshold VIN2 rising, 180mV typical hysteresis 2.52 VEN = VIN_, IOUT = 0A, SKIP = AGND, switching No-Load Supply Current VEN = VIN_, IOUT = 0A, VSKIP = VIN_, VREFIN = 0.35V, no switching Shutdown Supply Current VEN = 0V 3 mA 0.115 TA = +25NC 0.1 TA = +85NC 0.1 1 FA THERMAL PROTECTION Thermal Shutdown +160 TJ rising, 20NC typical hysteresis NC LOGIC CONTROL EN and SKIP Logic-Input High Voltage 1.3 V EN and SKIP Logic-Input Low Voltage 0.4 EN Internal Pulldown Resistor SKIP Logic-Input Current 800 VIL = 0V, VIH = 5.5V TA = +25NC 0.01 TA = +85NC 0.1 V kI 1 FA POWER-UP TIMING (Figure 2) Time Delay from EN Until LX Starts Switching (tEN_BUCK) 2 62 130 Fs Maxim Integrated MAX8989 Multimode PA Step-Down Converter with Linear Bypass Mode ELECTRICAL CHARACTERISTICS (continued) (VIN1 = VIN2 = VSKIP = VEN = 3.6V, VREFIN = 0.9V, TA = -40NC to +85NC. Typical values are at TA = +25NC, unless otherwise noted.) (Note 3) PARAMETER CONDITIONS MIN TYP MAX UNITS 1.7 V REFIN Common-Mode Range REFIN to OUT Gain 0.2 VREFIN = 0.32V, ILX = 0A 1.89 2 2.11 VREFIN = 1.32V, ILX = 0A 1.96 2.0 2.04 V/V Input Resistance 800 kI REFIN Source Current 30 FA Forced Dropout Mode Threshold Above this threshold, the MAX8989 is forced into dropout mode, no hysteresis is implemented 1.80 1.95 2.10 V LINEAR BYPASS On-Resistance p-channel MOSFET bypass, IOUT = 400mA VREFIN = 0.6V 77 mI A 1.2 1.8 Step-Down Converter Current Limit in Bypass Mode 1.3 1.6 Total Current Limit in Bypass Mode 2.5 3.4 Bypass LDO Current Limit TA = +25NC 0.01 TA = +85NC 1 1.8 A A 1 Bypass LDO Off-Leakage Current VIN2 = 5.5V, VOUT = 0V Linear Bypass Regulation Threshold Below nominal output voltage, IOUT = 0mA, VREFIN = 0.5V or 1.2V 50 mV Linear Bypass Regulation Enable Threshold Linear bypass is enabled when VOUT rises above this threshold 1.0 V 25 mV Linear Bypass Enable Threshold Hysteresis FA STEP-DOWN CONVERTER LX On-Resistance LX Leakage Current p-channel MOSFET, ILX = 100mA 0.175 0.300 n-channel MOSFET, ILX = 100mA 0.260 0.425 TA = +25NC 0.1 5 TA = +85NC 1 VEN = 0V, VLX = 0V I FA p-Channel MOSFET Peak Current Limit 1.3 1.6 1.8 A n-Channel MOSFET Valley Current Limit 1.0 1.3 1.5 A n-Channel MOSFET Negative Current Limit 1.2 1.5 1.8 A Skip mode is disabled when VOUT rises above this threshold 1.0 V Automatic Skip Mode Enable Threshold Hysteresis 25 mV Static Zero-Crossing Threshold 20 mA Minimum On- and Off-Times 70 Automatic Skip Mode Enable Threshold No Load Switching Frequency ns TA = +25NC 1.74 2 2.35 TA = -40NC to +85NC 1.6 2 2.4 MHz Note 3: The device is 100% production tested at TA = +25NC. Limits over the operating temperature range are guaranteed by design. Maxim Integrated 3 MAX8989 Multimode PA Step-Down Converter with Linear Bypass Mode Typical Operating Characteristics (Typical Operating Circuit, VIN1 = VIN2 = 3.7V, VREFIN = 0.9V, L1 = 4.7µH (TOKO DFE252012C), TA = +25NC, unless otherwise noted.) 75 73 71 69 65 0 1000 FPWM 500 1000 1500 2000 2500 0 2000 1500 1000 FPWM 500 SKIP 0 0.4 MAX8989 toc03 2500 SKIP 0 0.8 1.2 1.6 0 2.0 0.4 0.8 1.2 1.6 2.0 REFIN VOLTAGE (V) SWITCHING FREQUENCY vs. REFIN VOLTAGE NO LOAD SUPPLY CURRENT vs. SUPPLY VOLTAGE (SKIP MODE) NO LOAD SUPPLY CURRENT vs. SUPPLY VOLTAGE (FPWM MODE) 500 SKIP 0 0.8 1.2 1.6 TA = -40°C TA = +25°C 60 VREFIN = 1.4V -50 VREFIN = 0.2V -100 VREFIN = 1.6V -150 VREFIN = 0.4V FORCED PWM -200 500 1000 1500 LOAD CURRENT (mA) 2000 2500 1.5 0.5 0 3.1 3.5 3.9 4.3 4.7 LINE REGULATION ERROR vs. SUPPLY VOLTAGE VREFIN = 0.6V 2.0 0 2.7 100 500mA LOAD 50 0 5.1 5.5 DROPOUT VREFIN = 0.4V VREFIN = 1.6V -150 2.7 3.1 3.5 3.9 4.3 4.7 SUPPLY VOLTAGE (V) 3.5 3.9 4.3 4.7 5.1 20 FORCED PWM 10 5.5 0 SKIP -10 -20 DROPOUT -30 NO LOAD VIN = 3.7V VREFIN = 1.4V -200 2.7 3.1 OUTPUT VOLTAGE ERROR vs. REFIN VOLTAGE VREFIN = 0.6V VREFIN = 0.8V VREFIN = 1.0V VREFIN = 1.2V VREFIN = 0.2V VREFIN = 0.2V SUPPLY VOLTAGE (V) -50 -100 VREFIN = 1.7V 2.5 20 LOAD REGULATION ERROR vs. LOAD CURRENT 0 3.0 1.0 SUPPLY VOLTAGE (V) 50 3.5 40 2.0 ERROR = VOUT - 2VREFIN 0 100 REFIN VOLTAGE (V) OUTPUT VOLTAGE ERROR (mV) 100 0.4 MAX8989 toc07 0 120 80 4.0 5.1 5.5 MAX8989 toc09 FPWM TA = +85°C 140 TA = -40°C AND +85°C 4.5 SUPPLY CURRENT (µA) 1500 1000 160 5.0 OUTPUT VOLTAGE ERROR (mV) 2000 VREFIN < 0.5V 180 MAX8989 toc05 2500 200 SUPPLY CURRENT (µA) VIN = 3.7V 40I LOAD MAX8989 toc06 REFIN VOLTAGE (V) MAX8989 toc04 SWITCHING FREQUENCY (kHz) 1500 VIN = 3.7V 10I LOAD LOAD CURRENT (mA) 3000 OUTPUT VOLTAGE ERROR (mV) 2000 500 67 4 2500 3000 SWITCHING FREQUENCY (kHz) 77 VIN = 3.7V 4I LOAD MAX8989 toc08 RESISTANCE (mI) 79 MAX8989 toc02 81 SWITCHING FREQUENCY vs. REFIN VOLTAGE SWITCHING FREQUENCY vs. REFIN VOLTAGE 3000 SWITCHING FREQUENCY (kHz) VIN = 3.4V VREFIN = 2V 83 MAX8989 toc01 DROPOUT RESISTANCE vs. LOAD CURRENT 85 -40 0 0.4 0.8 1.2 REFIN VOLTAGE (V) 1.6 2.0 Maxim Integrated MAX8989 Multimode PA Step-Down Converter with Linear Bypass Mode Typical Operating Characteristics (continued) (Typical Operating Circuit, VIN1 = VIN2 = 3.7V, VREFIN = 0.9V, L1 = 4.7µH (TOKO DFE252012C), TA = +25NC, unless otherwise noted.) EFFICIENCY vs. OUTPUT VOLTAGE VREFIN = 0.2V, SKIP = 0 0 VREFIN = 1.6V, SKIP = 0 OR 1 -10 -20 VREFIN = 0.2V, SKIP = 1 -45 -32 -19 -6 7 75 70 20 33 46 59 72 85 60 55 55 50 0.2 0.6 1.0 1.4 1.8 2.2 2.6 3.0 3.4 3.8 4.2 OUTPUT VOLTAGE (V) MAX8989 toc13 VIN = 3.2V 80 VIN = 3.7V 90 VIN = 4.2V 75 70 VIN = 3.2V 95 85 100 VIN = 3.7V VIN = 4.2V 95 80 75 70 85 70 65 60 60 55 55 50 50 80 VIN = 4.2V 75 VIN = 3.7V 70 100 LOAD CURRENT (mA) Maxim Integrated 1000 VREFIN = 0.3V 20mA LOAD VOUT 10mV/div (AC-COUPLED) 50 SKIP = 0 60 30 10 LIGHT-LOAD SWITCHING WAVEFORMS (SKIP) 60 60 50 EFFICIENCY vs. LOAD CURRENT 70 40 VREFIN = 0.6V 1000 LOAD CURRENT (mA) SKIP = 1 80 65 55 100 MAX8989 toc18 90 EFFICIENCY (%) 85 10 LOAD CURRENT (mA) MAX8989 toc17 VIN = 3.2V 90 VREFIN = 0.9V 50 1000 100 MAX8989 toc16 95 55 VREFIN = 1.2V EFFICIENCY vs. LOAD CURRENT 100 VIN = 3.7V 75 60 100 VIN = 4.2V 80 65 10 VIN = 3.2V 90 65 0.2 0.6 1.0 1.4 1.8 2.2 2.6 3.0 3.4 3.8 4.2 OUTPUT VOLTAGE (V) EFFICIENCY (%) 0.2 0.6 1.0 1.4 1.8 2.2 2.6 3.0 3.4 3.8 4.2 OUTPUT VOLTAGE (V) EFFICIENCY vs. LOAD CURRENT 100 EFFICIENCY (%) EFFICIENCY (%) 85 70 EFFICIENCY vs. LOAD CURRENT 10I LOAD 90 75 65 EFFICIENCY vs. OUTPUT VOLTAGE 95 VIN = 3.2V 80 60 50 VIN = 3.7V VIN = 4.2V 85 65 AMBIENT TEMPERATURE (°C) 100 MAX8989 toc11 VIN = 3.7V MAX8989 toc14 NO LOAD VIN = 3.7V -15 VIN = 4.2V 80 90 EFFICIENCY (%) -5 85 7.5I LOAD 95 MAX8989 toc15 EFFICIENCY (%) OUTPUT VOLTAGE ERROR (mV) 90 10 5 VIN = 3.2V 5I LOAD 95 EFFICIENCY vs. OUTPUT VOLTAGE 100 EFFICIENCY (%) NO LOAD VIN = 3.7V 15 100 MAX8989 toc10 20 MAX8989 toc12 OUTPUT VOLTAGE ERROR vs. TEMPERATURE 2V/div VLX VIN = 4.2V VIN = 3.7V 20 VIN = 3.2V VREFIN = 0.3V 10 0 10 100 IL 50mA/div 4µs/div LOAD CURRENT (mA) 5 MAX8989 Multimode PA Step-Down Converter with Linear Bypass Mode Typical Operating Characteristics (continued) (Typical Operating Circuit, VIN1 = VIN2 = 3.7V, VREFIN = 0.9V, L1 = 4.7µH (TOKO DFE252012C), TA = +25NC, unless otherwise noted.) LIGHT-LOAD SWITCHING WAVEFORMS (FPWM) MEDIUM-LOAD SWITCHING WAVEFORMS MAX8989 toc20 MAX8989 toc19 VREFIN = 0.9V 500mA LOAD VREFIN = 0.3V 20mA LOAD 10mV/div (AC-COUPLED) VOUT 2V/div VLX 10mV/div (AC-COUPLED) VOUT VLX 2V/div 200mA/div IL IL 50mA/div 400ns/div 400ns/div HEAVY-LOAD SWITCHING WAVEFORMS ENABLE WAVEFORMS MAX8989 toc21 MAX8989 toc22 VREFIN = 1.6V NO LOAD VREFIN = 1.2V 2000mA LOAD VOUT 10mV/div (AC-COUPLED) 2V/div EN 2V/div VLX 2V/div IL VOUT 1A/div IL 400ns/div 500mA/div 40µs/div LINE TRANSIENT 4.2V TO 3.2V TO 4.2V ENABLE WAVEFORMS MAX8989 toc24 MAX8989 toc23 VREFIN = 1.6V 5I LOAD VIN VREFIN = 0.9V 36I LOAD 2V/div EN 2V/div VOUT 10mV/div VOUT IL IL 50mA/div 500mA/div 40µs/div 6 1V/div 20µs/div Maxim Integrated MAX8989 Multimode PA Step-Down Converter with Linear Bypass Mode Typical Operating Characteristics (continued) (Typical Operating Circuit, VIN1 = VIN2 = 3.7V, VREFIN = 0.9V, L1 = 4.7µH (TOKO DFE252012C), TA = +25NC, unless otherwise noted.) LOAD TRANSIENT 0mA TO 500mA (FPWM) LOAD TRANSIENT 0mA TO 500mA (SKIP) MAX8989 toc26 MAX8989 toc25 VREFIN = 0.4V VOUT IOUT 100mV/div VOUT 200mA/div IOUT VREFIN = 0.4V 200mA/div 20µs/div 20µs/div LOAD TRANSIENT 0mA TO 2500mA REFIN TRANSIENT 0.2V TO 1.6V MAX8989 toc27 VOUT VREFIN = 1.6V FPWM MAX8989 toc28 5I LOAD FPWM VREFIN 100mV/div 1V/div LDO TURN-ON VOUT IL 2V/div 1A/div IL 0A 1A/div 1A/div IOUT 10µs/div 10µs/div REFIN TRANSIENT 0.6V TO 1.6V REFIN TRANSIENT 0.2V TO 1.6V MAX8989 toc29 IL 0A VOUT Maxim Integrated VREFIN 2V/div IL 0A 1A/div 10µs/div NO LOAD 1V/div 1V/div LDO TURN-ON 2V/div MAX8989 toc31 NO LOAD FPWM 1V/div VREFIN VOUT REFIN TRANSIENT 0.6V TO 1.6V MAX8989 toc30 5I LOAD VREFIN 100mV/div VOUT 2V/div 0A IL 1A/div 10µs/div 1A/div 10µs/div 7 MAX8989 Multimode PA Step-Down Converter with Linear Bypass Mode Typical Operating Characteristics (Typical Operating Circuit, VIN1 = VIN2 = 3.7V, TA = +25°C, unless otherwise noted. PA operating characteristics based on SKY77604 PA Module.) GSM LOW-BAND PA VOLTAGE/CURRENT vs. OUTPUT POWER 1000 90 800 1.5 600 1.0 400 0.5 200 70 0 65 1400 1200 1000 80 75 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 OUTPUT POWER AT ANTENNA (dBm) OUTPUT POWER AT ANTENNA (dBm) GSM LOW-BAND BATTERY CURRENT vs. OUTPUT POWER GSM HIGH-BAND PA VOLTAGE/CURRENT vs. OUTPUT POWER MAX8989 toc34 3.0 ASSUMES 1.1dBm INSERTION LOSS BETWEEN PA AND ANTENNA 2.5 GSM LB w/o DCDC GSM LB w DC-DC 800 600 2.0 MAX8989 toc35 ASSUMES 1.8dBm INSERTION LOSS BETWEEN PA AND ANTENNA 900 750 PA VOLTAGE PA CURRENT 600 1.5 450 1.0 300 0.5 150 PA CURRENT (mA) 1600 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 ASSUMES 1.1dBm INSERTION LOSS BETWEEN PA AND ANTENNA 85 EFFICIENCY (%) PA VOLTAGE PA CURRENT MAX8989 toc33 1200 2.0 0 400 200 0 0 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 OUTPUT POWER AT ANTENNA (dBm) GSM HIGH-BAND CONVERTER EFFICIENCY vs. OUTPUT POWER 100 90 ASSUMES 1.8dBm INSERTION LOSS BETWEEN PA AND ANTENNA 80 EFFICIENCY (%) 0 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 OUTPUT POWER AT ANTENNA (dBm) MAX8989 toc36 BATTERY CURRENT (mA) 95 PA VOLTAGE (V) PA VOLTAGE (V) 2.5 1400 ASSUMES 1.1dBm INSERTION LOSS BETWEEN PA AND ANTENNA PA CURRENT (mA) 3.5 3.0 GSM LOW-BAND CONVERTER EFFICIENCY vs. OUTPUT POWER MAX8989 toc32 70 60 50 40 30 20 10 0 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 OUTPUT POWER AT ANTENNA (dBm) 8 Maxim Integrated MAX8989 Multimode PA Step-Down Converter with Linear Bypass Mode Typical Operating Characteristics (continued) (Typical Operating Circuit, VIN1 = VIN2 = 3.7V, TA = +25°C, unless otherwise noted. PA operating characteristics based on SKY77604 PA Module.) GSM HIGH-BAND BATTERY CURRENT vs. OUTPUT POWER 2.5 800 GSM HB w/o DCDC GSM HB w DC-DC 400 200 0 0.5 75 80 12.5 10.0 70 7.5 60 5.0 50 2.5 40 3 9 15 21 -50 -30 -15 -9 -3 6 12 18 24 -40 -20 -12 -6 0 OUTPUT POWER AT ANTENNA (dBm) Maxim Integrated 1000 15.0 0 BATTERY CURRENT (mA) EFFICIENC Y (%) 90 ASSUMES 2dBm INSERTION LOSS BETWEEN PA AND ANTENNA 3 9 15 21 -50 -30 -15 -9 -3 6 12 18 24 -40 -20 -12 -6 0 OUTPUT POWER AT ANTENNA (dBm) 0 WCDMA BAND 5 BATTERY CURRENT vs. OUTPUT POWER DG09 (%) MAX8989 toc39 EFFICIENCY 225 150 WCDMA BAND 5 PA CONVERTER EFFICIENCY vs. OUTPUT POWER DG09 PA VOLTAGE 1.0 OUTPUT POWER AT ANTENNA (dBm) 100 300 PA CURRENT 0 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 375 2.0 1.5 450 100 MAX8989 toc40 ASSUMES 2dBm INSERTION LOSS BETWEEN PA AND ANTENNA 15.0 WCDMA w/o DCDC 12.5 WCDMA w/ DC-DC DG09 10.0 7.5 DG09 (%) 600 MAX8989 toc38 ASSUMES 2dBm INSERTION LOSS BETWEEN PA AND ANTENNA PA CURRENT (mA) ASSUMES 1.8dBm INSERTION LOSS BETWEEN PA AND ANTENNA PA VOLTAGE (V) BATTERY CURRENT (mA) 1000 3.0 MAX8989 toc37 1200 WCDMA BAND 5 PA VOLTAGE/CURRENT vs. OUTPUT POWER 5.0 10 2.5 1 0 9 15 21 -50 -30 -15 -9 -3 3 -40 -20 -12 -6 0 6 12 18 24 OUTPUT POWER AT ANTENNA (dBm) 9 MAX8989 Multimode PA Step-Down Converter with Linear Bypass Mode Bump Configuration TOP VIEW BUMPS ON BOTTOM MAX8989 + AGND REFIN PGND A1 A2 A3 EN IN1 LX B1 B2 B3 SKIP IN2 OUT C1 C2 C3 WLP Bump Description PIN FUNCTION AGND Low-Noise Analog Ground. Connect AGND to the ground plane at a single point away from high switching currents. See the PCB Layout section. A2 REFIN Reference Input. REFIN typically connects to the output of an external DAC used to control the IC’s output voltage for continuous PA power adjustment. To improve noise immunity, bypass REFIN with a 1000pF capacitor to AGND. The output voltage regulates to 2.0 x VREFIN. REFIN is pulled down to ground through an internal 800kI resistor. A3 PGND Power Ground. Connect PGND to the ground plane near the input and output capacitor grounds. See the PCB Layout section. B1 EN Enable Input. Connect EN to IN_ or logic-high for normal operation. Connect EN to ground or logic-low to shut down the output. EN is internally pulled down to ground through an 800kI resistor. B2 IN1 Supply Voltage Input for the Step-Down Converter. Connect IN1 and IN2 to a battery or supply voltage from 2.7V to 5.5V. Bypass IN1 with a 4.7FF ceramic capacitor as close as possible between IN1 and PGND. B3 LX Inductor Connection C1 SKIP Skip Mode Enable Input. Connect SKIP to IN_ or logic-high to enable low-power skip mode during lightload operation when the output voltage is less than 1.0V. Connect SKIP to ground or logic-low for forced PWM operation. C2 IN2 Supply Voltage Input for the Bypass LDO. Connect IN1 and IN2 to a battery or supply voltage from 2.7V to 5.5V. Bypass IN2 with a 4.7FF ceramic capacitor as close as possible between IN2 and PGND. C3 OUT Output of the Linear Bypass LDO. Connect OUT to the output of the step-down converter. Bypass OUT with four 4.7FF ceramic capacitors as close as possible to OUT and PGND. A1 10 NAME Maxim Integrated MAX8989 Multimode PA Step-Down Converter with Linear Bypass Mode IN1 IN2 OUT BYPASS LDO C1 R3 BYPASS LDO CONTROL BIAS AGND REFIN PWM ERROR COMPARATOR R4 C2 800kI LX STEP-DOWN LOGIC PGND SKIP STEP-DOWN CURRENT LIMIT R2 OUT EN EN CONTROL LOGIC R1 IN2 BANDGAP MAX8989 800kI Figure 1. Functional Diagram tEN_BUCK tBUCK_SS VIN_ VEN VOUT Figure 2. Power-Up Timing Maxim Integrated 11 MAX8989 Multimode PA Step-Down Converter with Linear Bypass Mode Detailed Description The MAX8989 step-down converter is optimized for powering the power amplifier (PA) in multistandard cellular handsets such as LTE, WCDMA, GSM, and EDGE. The IC integrates a high-efficiency PWM step-down converter for medium and low-power transmission with an 85mI (typ) bypass regulator, in parallel with the step-down converter, to power the PA during high-power transmission. Step-Down Converter A hysteretic PWM control scheme ensures high efficiency, fast switching, fast transient response, low output ripple, and physically tiny external components. The control scheme is simple: when the output voltage is below the regulation threshold, the error comparator begins a switching cycle by turning on the high-side switch. This high-side switch remains on until the minimum on-time expires and the output voltage is within regulation, or the inductor current is above the currentlimit threshold. Once off, the high-side switch remains off until the minimum off-time expires and the output voltage falls again below the regulation threshold. During the off period, the low-side synchronous rectifier turns on and remains on until the high-side switch turns on again. The internal synchronous rectifier eliminates the need for an external Schottky diode. Hysteretic control is sometimes referred to as ripple control, since voltage ripple is used to control when the high-side and low-side switches are turned on and off. To ensure stability with low ESR ceramic output capacitors, the IC combines ripple from the output with the ramp signal generated by the switching node (LX). This is seen in Figure 1 with resistor R1 and capacitor C1 providing the combined ripple signal. Injecting ramp voltage from the switching node also improves line regulation because the slope of the ramp adjusts with changes in input voltage. Hysteretic control has a significant advantage over fixedfrequency control schemes: fast transient response. Hysteretic control uses an error comparator, instead of an error amplifier with compensation, and there is no fixed-frequency clock. Therefore, a hysteretic converter reacts virtually immediately to any load transient on the output without having to wait for a new clock pulse or for the output of the error amplifier to move as with a fixedfrequency converter. 12 With a fixed-frequency step-down converter, the magnitude of output voltage ripple is a function of the switching frequency, inductor value, output capacitor and ESR, and input and output voltage. Since the inductance value and switching frequency are fixed, the output ripple varies with changes in line voltage. With a hysteretic stepdown converter, since the ripple voltage is essentially fixed, the switching frequency varies with changes in line voltage. Some variation with load current can also be seen, however, this is part of what gives the hysteretic converter its great transient response. The IC is trimmed to provide a 2MHz switching frequency during 50% duty cycle condition (3.6V input and 1.8V output). See the Typical Operating Characteristics section for more information on how switching frequency can vary with respect to load current and supply voltage. Voltage-Positioning Load Regulation The IC step-down converter utilizes a unique feedback network. By taking DC feedback from the LX node through R1 of Figure 1, the usual phase lag due to the output capacitor is removed, making the loop exceedingly stable and allowing the use of very small ceramic output capacitors. To improve the load regulation, resistor R3 is included in the feedback. This configuration yields load regulation equal to half of the inductor’s series resistance multiplied by the load current. This voltage-positioning load regulation greatly reduces overshoot during load transients and when changing the output voltage from one level to another. However, when calculating the required REFIN voltage, the load regulation should be considered. Because inductor resistance (RL) is typically well specified and the typical PA is a resistive load, the VREFIN to VOUT gain is slightly less than 2.0V/V. The output voltage is approximately: VOUT =2 × VREFIN - 1 × R L × ILOAD 2 When the output voltage drops by more than 60mV (typ) due to load regulation (0.5 x RL x ILOAD > 60mV) and the output voltage is above the linear bypass threshold (1V typ), the linear bypass regulator starts to supplement current to the output ensuring that the output is kept in regulation. While the linear bypass regulator is sourcing current, the step-down converter continues to supply most of the load to maximize efficiency. Maxim Integrated MAX8989 Multimode PA Step-Down Converter with Linear Bypass Mode Skip Mode The IC has an optional skip mode that provides the highest possible efficiency during light load conditions. Skip mode is active when SKIP is logic-high and VOUT is less than 1V. In addition, when the bypass LDO is sourcing current, skip mode is automatically enabled to prevent the stepdown converter from sinking current in an overvoltage condition. During skip mode, the hysteretic comparator turns on the high-side switch based on the output voltage value. Once the output voltage is high enough, the high-side switch is turned off and the low-side switch is turned on to return the inductor current to zero. A zero-crossing comparator is enabled in this mode to minimize power consumption by turning off the low-side switch as close as possible to the true inductor-current zero-crossing. In skip mode, the output ripple remains low at all loads, and the switching frequency decreases with lighter loads. Linear Bypass and Dropout A low-dropout linear regulator is connected in parallel with the step-down converter. The output voltage of the linear regulator is set slightly lower than the nominal regulation voltage of the step-down converter (60mV typ). This allows the output to maintain regulation when the output is slewed at a rate faster than the bandwidth of the step-down converter and when the load current exceeds the current limit of the step-down converter. Linear bypass operation is disabled when the output voltage is below the linear bypass regulation enable threshold (1V typ). The IC enters full dropout under two conditions: U The IC is commanded to regulate to a setting higher than VIN. U REFIN is set to more than 2.1V (min). Under either condition, the step-down converter goes to 100% duty cycle by turning on its p-channel MOSFET, and the linear regulator enters dropout by turning on fully. Note that forced dropout mode (the second condition) does not implement hysteresis on REFIN. Shutdown Connect EN to ground or logic-low to place the IC in shutdown mode, reducing the input current to 0.1FA (typ). In shutdown, the control circuitry, bypass linear regulator, internal switching MOSFET, and synchronous rectifier turn off, and LX becomes high impedance. Connect EN to IN_ or logic-high for normal operation. Maxim Integrated Thermal Overload Protection Thermal overload protection limits total power dissipation in the IC. If the junction temperature exceeds +160NC, the IC turns off, allowing it to cool. The IC turns on and begins soft-start after the junction temperature cools by 20NC. This results in a pulsed output during continuous thermal-overload conditions. Applications Information Inductor Selection The step-down converter operates with a typical switching frequency of 2MHz. A 4.7FH is recommended for best performance. The inductor’s DC current rating only needs to match the maximum load of the application because the IC features zero-current overshoot during startup and load transients. See Table 1 for suggested inductors and manufacturers. Output Capacitor Selection The output capacitor keeps the output voltage ripple small and ensures regulation loop stability. COUT must have low impedance at the switching frequency. Ceramic capacitors with X5R or X7R temperature characteristics are highly recommended due to their small size, low ESR, and small temperature coefficients. Note that some ceramic dielectrics exhibit large capacitance and ESR variation with temperature and DC bias. Ceramic capacitors with Z5U or Y5V temperature characteristics should be avoided. Tantalum capacitors are not recommended. Four 4.7FF output capacitors are recommended for most applications. For optimum load-transient performance and very low output ripple, the output capacitor value can be increased, however, care should be taken with regards to output voltage slew rate requirements. Input Capacitor Selection The input capacitors reduce the current peaks drawn from the battery or input power source and reduce switching noise in the IC. The impedance of CIN1 and CIN2 at the switching frequency should be kept very low. Ceramic capacitors with X5R or X7R temperature characteristics are highly recommended due to their small size, low ESR, and small temperature coefficients. Note that some ceramic dielectrics exhibit large capacitance and ESR variation with temperature and DC bias. Ceramic capacitors with Z5U or Y5V temperature characteristics should be avoided. For most applications, connect a 4.7FF capacitor from IN1 to PGND and a 4.7FF capacitor from IN2 to PGND. For optimum noise immunity and low input ripple, the input capacitor value can be increased. 13 MAX8989 Multimode PA Step-Down Converter with Linear Bypass Mode Table 1. Suggested Inductors MANUFACTURER TOKO TDK Samsung SERIES INDUCTANCE (µH) RL (mI typ) CURRENT RATING (mA) DIMENSIONS (mm max) DEM2810C 4.7 170 1000 3.0 x 3.2 x 1.0 DFE252010C 4.7 320 1600 2.7 x 2.2 x 1.0 DFE252012C 4.7 210 1600 2.7 x 2.2 x 1.2 VLF302510 4.7 140 950 3.0 x 2.5 x 1.0 VLS252010T 4.7 367 980 2.6 x 2.1 x 1.0 CIG22H4R7MNE 4.7 233 1000 2.7 x 2.2 x 1.2 Thermal Considerations In applications where the IC runs at high ambient temperatures or with heavy loads, the heat dissipated may exceed the maximum junction temperature of the part. If the junction temperature reaches approximately +160NC, the thermal overload protection is activated. The IC maximum power dissipation depends on the thermal resistance of the package and circuit board, the temperature difference between the die junction and ambient air, and the rate of airflow. The maximum allowed power dissipation is: PMAX = (TJMAX - TA)/BJA where TA is the ambient temperature, TJMAX is the maximum junction temperature, and BJA is the junction to ambient thermal resistance. See the Absolute Maximum Ratings section. The power dissipated in the device is approximately: ( 1 PD = VOUT × ILOAD x - 1 - IL2 × R L η ) Grounding of the IC is also critical. The AGND and PGND must be routed as separate nets, and connected together as close as possible to the PGND bump of the IC. AGND can be used to shield REFIN along its routing. AGND must be connected to the ground of the source generating REFIN. To avoid noise coupling into AGND, care must be taken in the layout to ensure isolation from AGND to PGND, having cuts in the ground plane wherever necessary. The input decoupling capacitor on IN1 filters the input supply of the step-down converter. The layout needs to ensure as short a path as possible from IN1, through CIN1, to PGND for optimal decoupling. The point in the layout where this input capacitor connects to PGND serves as the star-connection ground point for all three critical capacitors (CIN1, CIN2, and COUT). The input decoupling capacitor on IN2 filters the input supply for the linear regulator. Its bottom plate should be routed to the star-ground point in the layout. The OUT trace needs to be short and wide because it carries the current from the linear regulator. where E is the efficiency of the MAX8989 (see the Typical Operating Characteristics section), ILOAD is the RMS load current, IL is the RMS inductor current, and RL is the inductor resistance. The trace between the inductor and LX should also be low impedance as this trace has a noisy, switching waveform. Keep LX away from noise-sensitive traces such as REFIN and AGND. PCB Layout The capacitor from REFIN to AGND is optional. The REFIN capacitor can be used when needed to prevent high-frequency noise from coupling into REFIN. High switching frequencies and relatively large peak currents make the PCB layout a very important part of design. Good design minimizes excessive EMI on the feedback paths and voltage gradients in the ground plane, resulting in a stable and well-regulated output. For the input supplies, it is critical to route them as separate lines from the power source with separate decoupling capacitors on IN1 and IN2. This is necessary to prevent switching noise on IN1 from coupling into IN2. 14 The ground connection among CIN, COUT, and the PA ground is also extremely critical. Parasitic impedance in this ground connection results in degraded RF performance. Contact your Maxim representative for more detailed information and assistance. For a PCB layout example, refer to the MAX8989 Evaluation Kit data sheet. Maxim Integrated MAX8989 Multimode PA Step-Down Converter with Linear Bypass Mode Chip Information PROCESS: BiCMOS Maxim Integrated Package Information For the latest package outline information and land patterns, go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. 9 WLP W91B1+1 21-0067 Refer to Application Note 1891 15 MAX8989 Multimode PA Step-Down Converter with Linear Bypass Mode Revision History REVISION NUMBER REVISION DATE 0 11/10 Initial release — 1 1/11 Updated IN1, IN2, OUT, LX current absolute maximum rating 2 DESCRIPTION PAGES CHANGED Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. 16 © 2011 Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000 Maxim Integrated Products, Inc. Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
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