KVR16LS11/4
Memory Module Specifications
KVR16LS11/4
4GB 1Rx8 512M x 64-Bit PC3L-12800
CL11 204-Pin SODIMM
DESCRIPTION
SPECIFICATIONS
This document describes ValueRAM's 512M x 64-bit (4GB)
CL(IDD)
11 cycles
DDR3L-1600 CL11 SDRAM (Synchronous DRAM), 1Rx8, low
Row Cycle Time (tRCmin)
48.125ns (min.)
components. The SPD is programmed to JEDEC standard
Refresh to Active/Refresh
Command Time (tRFCmin)
260ns (min.)
latency DDR3-1600 timing of 11-11-11 at 1.35V or 1.5V. This
Row Active Time (tRASmin)
35ns (min.)
204-pin SODIMM uses gold contact fingers. The electrical and
Maximum Operating Power
(1.35V) = 2.376 W*
UL Rating
94 V - 0
Operating Temperature
0o C to 85o C
FEATURES
Storage Temperature
-55o C to +100o C
● JEDEC standard 1.35V (1.28V ~ 1.45V) and
1.5V (1.425V ~1.575V) Power Supply
*Power will vary depending on the SDRAM.
voltage, memory module, based on eight 512M x 8-bit FBGA
mechanical specifications are as follows:
● VDDQ = 1.35V (1.28V ~ 1.45V) and 1.5V (1.425V ~ 1.575V)
● 800MHz fCK for 1600Mb/sec/pin
● 8 independent internal bank
● Programmable CAS Latency: 11, 10, 9, 8, 7, 6, 5
● Programmable Additive Latency: 0, CL - 2, or CL - 1 clock
● 8-bit pre-fetch
● Burst Length: 8 (Interleave without any limit, sequential with starting
address “000” only), 4 with tCCD = 4 which does not allow seamless
read or write [either on the fly using A12 or MRS]
● Bi-directional Differential Data Strobe
● Internal(self) calibration : Internal self calibration through ZQ pin
(RZQ : 240 ohm ± 1%)
● On Die Termination using ODT pin
● Average Refresh Period 7.8us at lower than TCASE 85°C, 3.9us at
85°C < TCASE ≤ 95°C
● Asynchronous Reset
● PCB: Height1.18” (30mm), double sided component
● Lead Free RoHS Compliant
Continued >>
Document No. VALUERAM1347-001.D00
12/23/16
Page 1
MODULE DIMENSIONS:
All measurements are in millimeters.
(Tolerances on all dimensions are ±0.12 unless otherwise specified)
Document No. VALUERAM1347-001.D00
Page 2
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