Preliminary Single-Channel 1.1A USB High
fitipower integrated technology lnc.
Preliminary
FP6861
Single-Channel 1.1A USB
High-Side Power Switch with Flag
Description
Features
The FP6861 is a single channel USB power switch
which is optimized for the self-powered and the
bus-powered
Universal
Serial
Bus
(USB)
applications. It is cost-effective, low voltage and
equipped single N-Channel high-side MOSFET
switch.
● Guaranteed 1.1A Continuous Load Current
● Input Voltage Ranges : 2V to 5.5V
● Open-Drain Fault Flag Output
● Built-In N-Channel MOSFET : Typically 95mΩ
● Output Can Be Forced Higher Than Input
(Off-State)
● 1.7V Typical Under-Voltage Lockout (UVLO)
● Low Supply Current :
33µA Typical at Switch On State
0.1µA Typical at Switch Off State
● Hot Plug-In Application (Soft-Start)
● Current Limiting Protection
● Thermal Shutdown Protection
● Reverse Current Flow Blocking (No Body Diode)
● RoHS Compliant
For driving the internal MOSFET switch, a charge
pump circuitry is built in the FP6861. The switch's
low RDS(ON), 95mΩ, meets USB voltage drop
requirement, and a fault flag output is available to
indicate fault conditions to the local USB controller.
Other additional features include under-voltage
lockout (UVLO) to ensure that the device keeps off
until input a valid voltage, thermal shutdown to
prevent catastrophic switch failure from high loading
current and fault current is limited to typically 1.5A for
in accordance with the USB power requirements.
Soft-start to limit inrush current during plug-in and
lower quiescent current as 33µA making this device
ideal for portable battery-operated equipment.
The FP6861 is available in SOT-23-5 package
requiring minimum board space and smallest
components.
FP6861□□□
S5 Package (SOT-23-5)
1
4
2
3
TR: Tape / Reel
Blank: Tube
TOP VIEW
1. EN
2. GND
3. FLG
4. VIN
5. VOUT
Figure 1. Pin Assignment of FP6861
FP6861-Preliminary 0.2-2007
● Notebook PCs
● LCD Monitors
● USB Bus/Self Powered Hubs
● USB Peripherals
● ACPI Power Distribution
Ordering Information
Pin Assignments
5
Applications
P: Pb Free with Commercial
Standard (RoHS Compliant)
Package Type
S5: SOT-23-5
SOT-23-5 Marking
Part Number
Product Code
FP6861S5P
J1
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fitipower integrated technology lnc.
Preliminary
FP6861
Typical Application Circuit
Figure 2. Typical Application Circuit of FP6861
Functional Pin Description
Pin Name
VIN
VOUT
GND
EN
FLG
Pin Function
Input Power Supply
Switch Output
Ground
Chip Enable. Pull the pin high to enable IC; Pull the pin low to shutdown IC. Do not let the pin floating.
Open-Drain Fault Flag Output
Block Diagram
Figure 3. Block Diagram of FP6861
FP6861-Preliminary 0.2-2007
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fitipower integrated technology lnc.
Preliminary
FP6861
Absolute Maximum Ratings
● Supply Voltage------------------------------------------------------------------------------------------------ 6V
● Chip Enable Input Voltage--------------------------------------------------------------------------------- -0.3V to 6V
● Flag Voltage--------------------------------------------------------------------------------------------------- 6V
● Power dissipation @TA=25℃, SOT-23-5 (PD) --------------------------------------------------------- 0.4W
● Package Thermal Resistance, SOT-23-5 (θJA)-------------------------------------------------------- 250°C/W
● Lead Temperature (Soldering, 10 sec.)----------------------------------------------------------------- 260℃
● Storage Temperature Range------------------------------------------------------------------------------- -65℃ to +150℃
Note:Stresses beyond those listed under “Absolute Maximum Ratings" may cause permanent damage to the device.
Recommended Operating Conditions
● Supply Voltage (VIN)----------------------------------------------------------------------------------------- +2V to + 5.5V
● Operation Temperature Range (TOPR)------------------------------------------------------------------- - 40°C to +85°C
Electrical Characteristics
(VIN=5V, CIN=COUT=1µF, TA=25℃, unless otherwise specified.)
Parameter
Switch On Resistance
Symbol
RDS(ON)
Conditions
Min
IOUT=1.2A
Typ
Max
95
Unit
mΩ
ISW_ON
Switch on, Vout = Open
33
ISW_OFF
Switch off, Vout = Open
0.1
Logic-Low voltage
VIL
VIN=5v, switch off
Logic-High voltage
VIH
VIN=5V, switch on
EN Input Current
IEN
VEN = 0V to 5.5V
0.01
Output Leakage Current
ILEAKAGE
VEN = 0V, RLOAD = 0Ω
0.5
Output Turn-On Rise Time
TON_RISE
10% to 90% of VOUT rising
330
Current Limit
ILIM
RLOAD = 1Ω
Short Circuit Fold-Back Current
ISC_FB
VOUT = 0V, measured prior to
thermal shutdown
1.0
FLAG Output Resistance
RFLG
ISINK = 1mA
20
400
Ω
FLAG Off Current
IFLG_OFF
VFLG = 5V
0.01
1
µA
FLAG Delay Time
tD
From fault condition to FLG
assertion
Under - Voltage Lockout
VUVLO
VIN increasing
Under - Voltage Hysteresis
ΔVUVLO
VIN decreasing
Thermal Shutdown Protection
Thermal Shutdown Hysteresis
Supply Current
EN Threshold
FP6861-Preliminary 0.2-2007
1
0.8
2.0
1.1
1.5
µA
V
µA
10
µA
µs
2.0
A
A
60
ms
1.7
V
0.1
V
TSD
160
°C
ΔTSD
30
°C
1.3
3
Preliminary
fitipower integrated technology lnc.
FP6861
Test Circuit
RFG
VIN
VIN
CIN
FLG
VFLG
FP6861
EN
Chip Enable
VOUT
VOUT
GND
A
RL
COUT
Fig.4 Electrical Characteristic Test Circuit of FP6861
Typical Performance Curves
40
60
35
Supply Current (uA)
Supply Current (uA)
50
40
30
20
0
2.0
2.5
3.0
3.5
4.0
4.5
5.0
20
15
VIN=VEN=5V
CIN=COUT=10u
RL=Open
5
0
-40
5.5
-20
0
20
40
60
2.4
1.8
2.2
1.6
2.0
1.4
1.8
Current Limit (A)
2.0
1.2
1.0
0.8
0.6
1.4
1.2
2.5
3.0
3.5
4.0
4.5
5.0
Input Voltage (V)
Fig. 7 Current Limit vs. Input Voltage
FP6861-Preliminary 0.2-2007
VIN=5V
CIN=10uF
COUT=10uF
0.8
VIN=VEN=5V
CIN=COUT=10u
0.0
2.0
120
1.6
1.0
0.2
100
Fig. 6 Supply Current vs. Temperature
Fig.5 Supply Current vs. Input Voltage
0.4
80
Temperature (DEG_C)
Input Voltage (V)
Current Limit (A)
25
10
VIN=VEN=5V
CIN=10u
RL=Open
10
30
0.6
5.5
0.4
-40
-20
0
20
40
60
80
100
120
Tempature (DEG_C)
Fig. 8 Current Limit vs. Temperature
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Preliminary
fitipower integrated technology lnc.
FP6861
160
160
140
140
120
120
On-Resistance (mohm)
On-Resistance (mohm)
Typical Performance Curves (Continued)
100
80
60
IOUT=1.1A
CIN=COUT=10u
40
2.5
3.0
3.5
4.0
4.5
5.0
VIN=5V
IOUT=1.1A
CIN=COUT=10u
40
-20
0
60
80
100
120
2.4
1.6
EN Pin Threshold Voltage (V)
VIN=5V
CIN=COUT=10u
RL=0Ω
1.8
1.4
1.2
1.0
2.0
1.6
1.2
0.8
CIN=COUT=10u
IL=100mA
0.4
0.8
-20
0
20
40
60
80
100
0.0
2.0
120
2.5
3.0
Temperature (DEG_C)
3.5
4.0
4.5
5.0
5.5
Input Voltage (V)
Fig. 11 Short Circuit Current vs. Temperature
Fig. 12 EN Pin Threshold Voltage vs. Input Voltage
2.4
720
630
2.0
Turn-On Rising Time (us)
EN Pin Threshold Voltage (V)
40
Fig. 10 On-Resistance vs. Temperature
2.0
1.6
1.2
0.8
VIN=5V
CIN=COUT=10u
IL=100mA
0.4
0.0
-40
20
Tempature (DEG_C)
Fig. 9 On-Resistance vs. Input Voltage
Short Circuit Current (A)
60
0
-40
5.5
Input Voltage (V)
0.6
-40
80
20
20
0
2.0
100
-20
0
20
40
60
80
100
450
360
270
VIN=5V
CIN=10uF
COUT=1uF
RL=30Ω
180
90
120
Temperature (DEG_C)
Fig. 13 EN Pin Threshold Voltage vs. Temperature
FP6861-Preliminary 0.2-2007
540
0
-40
-20
0
20
40
60
80
100
120
Temperature (DEG_C)
Fig. 14 Turn-On Rising Time vs. Temperature
5
Preliminary
fitipower integrated technology lnc.
FP6861
Typical Performance Curves (Continued)
1.0
140
0.8
Short Circuit Current (A)
Turn-Off Falling Time (us)
120
100
80
60
VIN=5V
CIN=10uF
COUT=1uF
RL=30Ω
40
20
0
-40
-20
0
20
40
60
80
100
0.6
0.4
0.2
0.0
-0.2
VIN=5V
CIN=10uF
COUT=10uF
RL=0Ω
-0.4
-0.6
-0.8
-1.0
-40
120
-20
0
Temperature (DEG_C)
Fig. 15 Turn-Off Falling Time vs. Temperature
60
80
100
120
3.5
VIN=5V, VEN=0V
CIN=10uF
COUT=10uF
RL=0Ω
2.5
CIN=10uF
COUT=10uF
RL=1kΩ
3.0
UVLO Threshold (V)
3.0
Short Circuit Current (uA)
40
Fig. 16 Switch Off Supply Current vs. Temperature
3.5
2.0
1.5
1.0
2.5
2.0
1.5
1.0
0.5
0.5
0.0
-40
20
Temperature (DEG_C)
-20
0
20
40
60
80
100
120
0.0
-40
-20
0
20
40
60
80
100
120
Temperature (DEG_C)
Temperature (DEG_C)
Fig. 17 Turn-off Leakage Current vs. Temperature
Fig. 18 UVLO Threshold vs. Temperature
VEN
VOUT
VIN=5V
CIN=10uF
COUT=1uF
RL=30Ω
Fig. 19 Turn-On Response
FP6861-Preliminary 0.2-2007
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Preliminary
fitipower integrated technology lnc.
FP6861
Typical Performance Curves (Continued)
VEN
VOUT
VIN=5V
CIN=10uF
COUT=1uF
RL=30Ω
VIN
IL
VIN=5V
CIN=10uF
COUT=1uF
RL=30Ω
VOUT
Fig. 21 UVLO at Rising
Fig. 20 Turn-off Response
VEN
VIN
VIN=5V
CIN=10uF
COUT=1uF
RL=30Ω
IL
VIN=5V
CIN=10uF
COUT=1uF
RL=5Ω
VOUT
Fig. 22 UVLO at Falling
VEN
Fig. 23 Soft Start Response
VEN
VIN=5V, RL=0Ω
CIN=10uF, COUT=1uF
VFLG
IOUT
IOUT
VIN=5V, RL=5Ω
CIN=10uF, COUT=1uF
Fig. 24 Flag Response
FP6861-Preliminary 0.2-2007
I
Fig. 25 Short Circuit Thermal Shutdown Response
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fitipower integrated technology lnc.
Preliminary
FP6861
Typical Performance Curves (Continued)
COUT=1000uF
COUT=220uF
VOUT
COUT=1u
IOUT
VIN=5V
CIN=10u
COUT=1u
RL=0Ω
Fig. 26 Short Circuit Current Response
FP6861-Preliminary 0.2-2007
CIN=10uF
COUT=10uF
RL=1Ω
Fig. 27 Short Circuit Current Response
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fitipower integrated technology lnc.
Preliminary
FP6861
Functional Description
Application Information
The FP6861 is a single, current-limited switch
designed for USB applications. It has one switch with
enable control input. The switch has an error flag
output to notify the USB controller when the
current-limit, short-circuit, under-voltage-lockout or
thermal-shutdown occurs.
The FP6861 is a single N-Channel MOSFET
high-side power switch with active-low enable
input, optimized for self-powered and bus-powered
Universal Serial Bus (USB) applications. The
FP6861 equipped with a charge pump circuitry to
drive the internal NMOS switch; the switch's low
RDS(ON), 95mΩ, meets USB voltage drop
requirements; and a flag output is available to
indicate fault conditions to the local USB
controller.
The FP6861 operates from 2.0V to 5.5V input
voltage range and guarantees a minimum 1.1A
output current. Independent current limit and thermal
shutdown circuit permit the switch to operate
independently, improving system robustness.
1. Under voltage-lockout and Input-Voltage
Requirements
Under voltage-lockout (UVLO) circuit prevents the
output switch from turning on until input voltage
exceeds approximately 1.7V.
2. Thermal Shutdown
Thermal shutdown is employed to protect the
device from damage should the die temperature
exceed safe margins due mainly to short-circuit or
current-limit. Thermal shutdown shuts off the
switch when in current-limit or short-circuit and
asserts the FLG output if the die temperature
reaches 160 ºC.
3. Reverse Current Blocking
The USB specification does not allow an output
device to source current back into the USB port.
However, the FP6861 is designed to safely power
noncompliant devices. When disable, the output is
switched to a high-impedance state, blocking
reverse current flow from the output back to the
input. The switch is bi-directional when enable.
4. Error Flag
The FP6861 provides an open drain error flag
output for the switch. For most applications,
connect FLG and IN through a pull-up resistor.
FLG goes low when any following conditions
occur:
1. The input voltage is below the UVLO threshold
2. The thermal shutdown occurs
3. The switch is in current-limit and short-circuit
conditions.
Input and Output
VIN (input) is the power source connection to the
internal circuitry and the drain of the MOSFET.
VOUT (output) is the source of the MOSFET. In a
typical application, current flows through the
switch from VIN to VOUT toward the load. If VOUT
is greater than VIN, current will flow from VOUT to
VIN since the MOSFET is bidirectional when on.
Unlike a normal MOSFET, there is no a
parasitic body diode between drain and source
of the MOSFET, the FP6861 prevents reverse
current flow if VOUT being externally forced to a
higher voltage than VIN when the output
disabled (VEN > 2V).
Normal MOSFET
FP6861
Chip Enable input
The switch will be disabled when the EN pin is
in a logic high condition. During this condition,
the internal circuitry and MOSFET are turned
off, reducing the supply current to 0.1uA typical.
The maximum guaranteed voltage for a logic
low at the EN pin is 0.8V. A minimum
guaranteed voltage of 2V at the EN pin will turn
the FP6861 off. Floating the input may cause
unpredictable operation. EN should not be
allowed to go negative with respect to GND.
Soft Start for Hot Plug-In Application
In order to eliminate the upstream voltage droop
caused by the large inrush current during
hot-plug
events,
the“soft-start”
feature
effectively isolates the power source from
extremely large capacitive loads, satisfying the
USB voltage droop requirements.
FP6861-Preliminary 0.2-2007
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fitipower integrated technology lnc.
Fault Flag
The FP6186 provides a FLG signal pin which is an
N-Channel open drain MOSFET output. This open
drain output goes low when VOUT < VIN − 1V,
current limit or the die temperature exceeds
160°C approximately. The FLG output is capable
of sinking a 10mA load to typically 200mV above
ground. The FLG pin requires a pull-up resistor,
this resistor should be large in value to reduce
energy drain. A 100kΩ pull-up resistor works well
for most applications. In the case of an
over-current condition, FLG will be asserted only
after the flag response delay time, tD, has elapsed.
This ensures that FLG is asserted only upon valid
over-current conditions and that erroneous error
reporting is eliminated.
For example, false over-current conditions may
occur during hot-plug events when extremely
large capacitive loads are connected and causes
a high transient inrush current that exceeds the
current limit threshold. The FLG response delay
time tD is typically 60ms.
UVLO Under-Voltage lockout
Under-voltage lockout (UVLO) prevents the
MOSFET switch from turning on until input voltage
exceeds approximately 1.7V. If input voltage
drops below approximately 1.6V, UVLO turns off
the MOSFET switch, FLG will be asserted
accordingly. Under-voltage detection functions
only when the switch is enabled.
Current Limiting and Short-Circuit Protection
The current limit circuitry prevents damage to the
MOSFET switch and the hub downstream port but
can deliver load current up to the current limit
threshold of typically 1.6A through the switch of
FP6861. When a heavy load or short circuit is
applied to an enabled switch, a large transient
current may flow until the current limit circuitry
responds. Once this current limit threshold is
exceeded the device enters constant current
mode until the thermal shutdown occurs or the
fault is removed.
Thermal Shutdown
Thermal shutdown is employed to protect the
device from damage if the die temperature
exceeds approximately 160°C. The power switch
will auto-recover when the IC is cooling down. The
thermal hysteresis temperature is about 30°C.
Power Dissipation
FP6861-Preliminary 0.2-2007
Preliminary
FP6861
The device’ s junction temperature depends on
several factors such as the load, PCB layout,
ambient temperature and package type. The
output pin of FP6861 can deliver a current up to
1.5A, respectively over the full operating
junction temperature range. However, the
maximum output current must be derated at
higher ambient temperature to ensure the
junction temperature does not exceed 160°C.
With all possible conditions, the junction
temperature must be within the range specified
under operating conditions. Power dissipation
can be calculated based on the output current
and the RDS(ON) of switch as below.
PD = RDS(ON) x (IOUT)2
Although the devices are rated for 1.5A of
output current, but the application may limit the
amount of output current based on the total
power dissipation and the ambient temperature.
The final operating junction temperature for any
set of conditions can be estimated by the
following thermal equation :
PD (MAX) = ( TJ(MAX) − TA ) / θJA
Where TJ(MAX) is the maximum operation
junction temperature 125°C, TA is the ambient
temperature and the θ JA is the junction to
ambient thermal resistance.
The junction to ambient thermal resistance θJA
is layout dependent. For SOT-23-5 packages,
the thermal resistance θJA is 250°C/W on the
standard JEDEC 51-3 single-layer thermal test
board.
Universal Serial Bus (USB) & Power
Distribution
The goal of USB is to enable devices from
different vendors to interoperate in an open
architecture. USB features include ease of use
for the end user, a wide range of workloads
and applications, robustness, synergy with the
PC industry, and low-cost implement- ation.
Benefits include self-identifying peripherals,
dynamically attachable and reconfigurable
peripherals, multiple connections (support for
concurrent operation of many devices), support
for as many as 127 physical devices, and
compatibility
with
PC
Plug-and-Play
architecture.
Supply Filter/Bypass Capacitor
A 10uF low-ESR ceramic capacitor from VIN to
GND, located at the device is strongly
10
fitipower integrated technology lnc.
bypass capacitor, an output short may cause
sufficient ringing on the input (from source lead
inductance) to destroy the internal control circuitry.
The input transient must not exceed 6.5V of the
absolute maximum supply voltage even for a short
duration.
Output Filter Capacitor
A low-ESR 150uF aluminum electrolytic or
tantalum between VOUT and GND is strongly
recommended to meet the 330mV maximum
droop requirement in the hub VBUS (Per USB 2.0,
output ports must have a minimum 120oF of
low-ESR bulk capacitance per hub). Standard
bypass methods should be used to minimize
inductance and resistance between the bypass
capacitor and the downstream connector to
reduce EMI and decouple voltage droop caused
when downstream cables are hot-insertion
transients. Ferrite beads in series with VBUS, the
ground line and the 0.1uF bypass capacitors at the
power connector pins are recommended for EMI
and ESD protection. The bypass capacitor itself
should have a low dissipation factor to allow
decoupling at higher frequencies.
FP6861
requirements, careful PCB layout is necessary.
The following guidelines must be considered :
●
●
●
●
●
●
●
Voltage Drop
Preliminary
Keep all VBUS traces as short as possible and
use at least 50-mil, 2 ounce copper for all VBUS
traces.
Avoid vias as much as possible. If vias are
necessary, make them as large as feasible.
Place a ground plane under all circuitry to lower
both resistance and inductance and improve DC
and transient performance (Use a separate
ground and power plans if possible).
Place cuts in the ground plane between ports to
help reduce the coupling of transients between
ports.
Locate the output capacitor and ferrite beads as
close to the USB connectors as possible to
lower impedance (mainly inductance) between
the port and the capacitor and improve transient
load performance.
Locate the FP6861 as close as possible to the
output port to limit switching noise.
Locate the ceramic bypass capacitors as close
as possible to the VIN pins of the FP6861.
The USB specification states a minimum
port-output voltage in two locations on the bus,
4.75V out of a Self- Powered Hub port and 4.4V
out of a Bus-Powered Hub port. As with the
Self-Powered Hub, all resistive voltage drops for
the Bus-Powered Hub must be accounted for to
guarantee voltage regulation.
The following calculation determines VOUT (MIN) for
multiple ports (NPORTS) ganged together through
one switch (if using one switch per port, NPORTS is
equal to 1) :
VOUT (MIN) = 4.75V − [ II x ( 4 x RCONN + 2 x
RCABLE ) ] −(0.1A x NPORTS x RSWITCH ) − VPCB
Where :
RCONN : Resistance of connector contacts
(two contacts per connector)
RCABLE : Resistance of upstream cable wires
(one 5V and one GND)
RSWITCH : Resistance of power switch
(95mΩ typical for FP6861)
VPCB : PCB voltage drop
PCB Layout
In order to meet the voltage drop, droop, and EMI
FP6861-Preliminary 0.2-2007
11
Preliminary
fitipower integrated technology lnc.
FP6861
Outline Information
SOT-23-5 Package (Unit: mm)
SYMBOLS
UNIT
A
DIMENSION IN MILLIMETER
MIN
NOM
MAX
----1.45
A1
0.00
---
0.15
A2
0.90
1.15
1.30
b
0.30
---
0.50
c
0.08
---
0.22
D
---
2.90
---
E
---
2.80
---
E1
---
1.60
---
e
0.95
e1
1.90
L
0.3
L1
θ
0.45
0.60
0.60
0°
4°
8°
Note 1:Followed From JEDEC MO-178-C.
Life Support Policy
Fitipower’s products are not authorized for use as critical components in life support devices or other medical systems.
FP6861-Preliminary 0.2-2007
12
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