JMF670H SATA III SSD Controller Overview Features

JMF670H SATA III SSD Controller Overview Features
JMicron/JMF670H
JMF670H SATA III SSD Controller
Overview
JMF670H is a single chip, supports external DDR3 DRAM, SATA III to NAND flash interface. It is native design to
provide higher bandwidth for flash memory access.
JMF670H can support the maximum read and write speed to drive the limit of flash memory. JMF670H has the
best supporting to the latest NAND flash memory, including Toshiba/Sandisk 32nm/24nm HBL/ABL,19nm Flash, Intel
and Micron 20/25 nm Flash. It also provides the embedded hardware error correction code (ECC), wear leveling, and
bad block management technology in this chip. In order to resolve compatibility issue, JMF670H provides the on line
firmware upgrade ability.
JMF670H provides embedded processor, internal masked ROM, data SRAM, SATA link/transport layer, SATA PHY.
Data swap between different interfaces can be done very efficiency by DMA without CPU involvement. Based on the
efficient architecture, the JMF670H can provide the best performance.
Features
SATA

Compliant with Serial ATA International Organization: Serial ATA Revision 3.1.

Supports 1-port 1.5/3.0/6.0Gbps SATA I/II/III interface

Support ATA-8 Command Set
CPU

32bits Embedded processor - ARM9 base Instruction Set

32 KB Embedded masked program ROM

192 KB Embedded system RAM with ITCM
Flash

Support maximum 8CE’s Flash per channel

Support Toshiba/Sandisk 32/24/19 nm Flash

Support Intel/Micron 25/20 nm Flash

Support legacy/toggle 1.0/toggle 2.0 mode Flash

Enhanced endurance by dynamic/static wear-leveling

Supports 4K/8K/16K bytes page size

Supports dynamic power management

SMART (Self-Monitoring, Analysis and Reporting Technology)

Data integrity under power-cycling

Supports BCH 60/72 bits ECC

Support Shift read feature of NAND flash when ECC fail
SDRAM

Supports one module DDR3
JMicron/JMF670H

Support up-to 4Gbits
System

Integrated SATA III port and 4-channels Flash controller

LED indicator for SATA read/write access. (optional)

LED indicator for SATA PHY link up. (optional)

Provides 22 GPIO pins for customer

Provides UART and JTAG for S/W debugging

Built-in power-up self-test (BIST)

Manual and automatic self-diagnostics

Provides voltage low detect interrupt

288-ball TFBGA package
Firmware

Supports online SATA firmware update

Support 1/2/4/8 banks selected free

Support 1/2/4 channels selected free
SATA III I/F
Flash Controller 1
&
ECC engine
Flash I/F
H/W Accelerator
Bus
SATA
Controller
SATA III
PHY
Flash Controller 4
&
ECC engine
DATA RAM
GPIO
Chip
Configuration
DRAM
Controller
CPU
Mask RAM
Program RAM
GPIO
Chip Config.
Figure 1
DDR3 DRAM
Block diagram of JMF670H
Document
1
JMF670H Datasheet
2
JMF670H Flash Support List
XTALI
Flash I/F
JMF670H
JMF667H
JMicron/JMF670H
3
JMF670H Hardware Design Guide
4
JMF670H Hardware Schematic
Contact Window
Department
Email
Sales
sales@jmicron.com
Tech. Support fae@jmicron.com
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