40Gb/s QSFP+ IR4 Optical Transceiver WT-QSFP+-IR4

40Gb/s QSFP+ IR4 Optical Transceiver WT-QSFP+-IR4
40Gb/s QSFP+ IR4 Optical Transceiver
WT-QSFP+-IR4
1.Features

4 CWDM lanes MUX/DEMUX design

Up to 12.5Gbps data rate per wavelength

QSFP MSA compliant

IEEE 802.3ba Electrical Interface

Up to 2 km transmission

Optical link budget: 9.5dB

Operating case temperature: 20~65C

Maximum 3.5W operation power

SMF LC duplex connector

RoHS compliant
2.Applications

Data Center Interconnect

40G Ethernet

Infiniband QDR

40G Campus Link
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3. General Description
This product is a transceiver module designed for 2Km optical communication
applications. The design is compliant to 40GBASE-LR4 of the IEEE P802.3ba standard.
The module converts 4 inputs channels (ch) of 10Gb/s electrical data to 4 CWDM optical
signals, and multiplexes them into a single channel for 40Gb/s optical transmission.
Reversely, on the receiver side, the module optically de-multiplexes a 40Gb/s input into
4 CWDM channels signals, and converts them to 4 channel output electrical data.
The central wavelengths of the 4 CWDM channels are 1271, 1291, 1311 and 1331
nm as members of the CWDM wavelength grid defined in ITU-T G694.2. It contains a
duplex LC connector for the optical interface and a 38-pin connector for the electrical
interface. To minimize the optical dispersion in the long-haul system, single-mode fiber
(SMF) has to be applied in this module.
The product is designed with form factor, optical/electrical connection and digital
diagnostic interface according to the QSFP Multi-Source Agreement (MSA). It has been
designed to meet the harshest external operating conditions including temperature,
humidity and EMI interference.
4. Functional Description
This product converts the 4-channel 10Gb/s electrical input data into CWDM
optical signals (light), by a driven 4-wavelength Distributed Feedback Laser (DFB) array.
The light is combined by the MUX parts as a 40Gb/s data, propagating out of the
transmitter module from the SMF. The receiver module accepts the 40Gb/s CWDM
optical signals input, and de-multiplexes it into 4 individual 10Gb/s channels with
different wavelength. Each wavelength light is collected by a discrete photo diode, and
then outputted as electric data after amplified by a TIA. Figure 1 shows the functional
block diagram of this product.
A single +3.3V power supply is required to power up this product. Both power
supply pins VccTx and VccRx are internally connected and should be applied
concurrently. As per MSA specifications the module offers 7 low speed hardware control
pins (including the 2-wire serial interface): ModSelL, SCL, SDA, ResetL, LPMode, ModPrsL
and IntL.
Module Select (ModSelL) is an input pin. When held low by the host, this product
responds to 2-wire serial communication commands. The ModSelL allows the use of this
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product on a single 2-wire interface bus – individual ModSelL lines must be used.
Serial Clock (SCL) and Serial Data (SDA) are required for the 2-wire serial bus
communication interface and enable the host to access the QSFP memory map.
The ResetL pin enables a complete reset, returning the settings to their default
state, when a low level on the ResetL pin is held for longer than the minimum pulse
length. During the execution of a reset the host shall disregard all status bits until it
indicates a completion of the reset interrupt. The product indicates this by posting an
IntL (Interrupt) signal with the Data_Not_Ready bit negated in the memory map. Note
that on power up (including hot insertion) the module should post this completion of
reset interrupt without requiring a reset.
Low Power Mode (LPMode) pin is used to set the maximum power consumption
for the product in order to protect hosts that are not capable of cooling higher power
modules, should such modules be accidentally inserted.
Module Present (ModPrsL) is a signal local to the host board which, in the absence
of a product, is normally pulled up to the host Vcc. When the product is inserted into
the connector, it completes the path to ground though a resistor on the host board and
asserts the signal. ModPrsL then indicates its present by setting ModPrsL to a “Low”
state.
Interrupt (IntL) is an output pin. When Low”, it indicates a possible operational
fault or a status critical to the host system. The host identifies the source of the
interrupt using the 2-wire serial interface. The IntL pin is an open collector output and
must be pulled to the Host Vcc voltage on the Host board.
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5. Transceiver Block Diagram
TX2
4-wavelength
DFB laser
Array (4ch)
Optical
TIA
PIN
Optical
Array (4ch)
Array (4ch)
DeMUX
DFB Driver
Array (4ch)
TX1
MUX
TX0
RX3
RX2
RX1
Dual-LC
Connector
TX3
RX0
Figure 1: 40Gb/s QSFP IR4 Transceiver Block Diagram
6. Pin Assignment and Pin Description
Figure 2: MSA compliant Connector
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Single
Mode
Fiber
7. Pin Definition
PIN
Logic
1
Symbol
Name/Description
Note
GND
Ground
1
2
CML-I
Tx2n
Transmitter Inverted Data Input
3
CML-I
Tx2p
Transmitter Non-Inverted Data output
GND
Ground
4
5
CML-I
Tx4n
Transmitter Inverted Data Input
6
CML-I
Tx4p
Transmitter Non-Inverted Data output
GND
Ground
7
8
LVTLL-I
ModSelL
Module Select
9
LVTLL-I
ResetL
Module Reset
VccRx
﹢3.3V Power Supply Receiver
10
11
LVCMOS-I/O
SCL
2-Wire Serial Interface Clock
12
LVCMOS-I/O
SDA
2-Wire Serial Interface Data
GND
Ground
13
14
CML-O
Rx3p
Receiver Non-Inverted Data Output
15
CML-O
Rx3n
Receiver Inverted Data Output
GND
Ground
16
1
1
2
1
17
CML-O
Rx1p
Receiver Non-Inverted Data Output
18
CML-O
Rx1n
Receiver Inverted Data Output
19
GND
Ground
1
20
GND
Ground
1
21
CML-O
Rx2n
Receiver Inverted Data Output
22
CML-O
Rx2p
Receiver Non-Inverted Data Output
GND
Ground
1
1
23
24
CML-O
Rx4n
Receiver Inverted Data Output
25
CML-O
Rx4p
Receiver Non-Inverted Data Output
GND
Ground
26
27
LVTTL-O
ModPrsL
Module Present
28
LVTTL-O
IntL
Interrupt
VccTx
+3.3 V Power Supply transmitter
29
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1
2
30
31
LVTTL-I
32
Vcc1
+3.3 V Power Supply
LPMode
Low Power Mode
GND
Ground
2
1
33
CML-I
Tx3p
Transmitter Non-Inverted Data Input
34
CML-I
Tx3n
Transmitter Inverted Data Output
GND
Ground
35
1
36
CML-I
Tx1p
Transmitter Non-Inverted Data Input
37
CML-I
Tx1n
Transmitter Inverted Data Output
GND
Ground
38
1
Note:
1. GND is the symbol for signal and supply (power) common for QSFP modules. All are common
within the QSFP module and all module voltages are referenced to this potential unless otherwise noted.
Connect these directly to the host board signal common ground plane.
2. VccRx, Vcc1 and VccTx are the receiving and transmission power suppliers and shall be applied
concurrently. Recommended host board power supply filtering is shown below. Vcc Rx, Vcc1 and Vcc Tx
may be internally connected within the QSFP transceiver module in any combination. The connector pins
are each rated for a maximum current of 500mA.
8. Absolute Maximum Ratings
It has to be noted that the operation in excess of any individual absolute maximum ratings might
cause permanent damage to this module.
Parameter
Symbol
Min
Max
Unit
Storage Temperature
Tst
-40
85
degC
Operating Case Temperature
Topc
20
65
degC
0.002
2
km
3.15
3.47
V
Operating Range
Supply Voltage
VCC
Note
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9. Optical Characteristics
Parameter
Symbol
Wavelength Assignment
Min.
Typical
Max
Unit
L0
1264.5
1271
1277.5
nm
L1
1284.5
1291
1297.5
nm
L2
1304.5
1311
1317.5
nm
L3
1324.5
1331
1337.5
nm
30
-
-
dB
Notes
Transmitter
Side-mode Suppression Ratio
SMSR
Total Average Launch Power
PT
-
-
8.3
dBm
OMA
-2
-
+3.5
dBm
-
-
5
dB
dB
Optical Modulation Amplitude,
each Lane
Difference in Launch Power
between any two Lanes (OMA)
Extinction Ratio
ER
3.5
-
-
Relative Intensity Noise
Rin
-
-
-128
-
-
1
nm
-12
dB
-20dB Spectral Width
Transmitter Reflectance
RT
Total Jitter
0.2
dB/Hz
12dB
reflection
Modulated
UI
Transmitter Eye Mask
Definition {X1, X2, X3, Y1, Y2,
{0.25, 0.4, 0.45, 0.25, 0.28, 0.4}
Y3}
Transmitter Output Power
Monitoring Accuracy
OPMA
-2
2
dB
Receiver
Damage Threshold
THd
Receiver Sensitivity, each Lane
SR
Difference in Receive Power
between any two Lanes (OMA)
3.5
-
dBm
-
-11.5
7.5
dBm
dB
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1
Receive Electrical 3 dB upper
Cutoff Frequency, each Lane
RSSI Accuracy
-2
12.3
GHz
2
dB
Notes:
1.
The receiver shall be able to tolerate, without damage, continuous exposure to a modulated
optical input signal having this power level on one lane. The receiver does not have to operate
correctly at this input power.
2.
Vertical eye closure penalty and stressed eye jitter are test conditions for measuring stressed
receiver sensitivity. They are not characteristics of the receiver.
10.Electrical Characteristics
The following electrical characteristics are defined over the Recommended Operating temperature
and supply voltage unless otherwise specified.
Parameter
Symbol
Min.
Typical
Max
Unit
-0.5
-
3.6
V
-
10.3125
11.2
Gbps
100
115
ohm
1200
mV
Vccl,
Supply Voltage
VccTx,
VccRx
Data Rate, each Lane
Transmitter
Differential Input Impedance
85
Differential Input Swing
150
Differential Return Loss
Compliant to IEEE 802.3ba
dB
Receiver
Differential Output Impedance
Differential Output Swing
85
100
370
Receiver J9 Jitter
Receiver electrical mask
Compliant to IEEE 802.3ba
Output differential return Loss
Compliant to IEEE 802.3ba
115
ohm
950
mV
0.65
UI
dB
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Notes
11.Mechanical Dimensions
12. ESD
This transceiver is specified as ESD threshold 1kV for SFI pins and 2KV for all others electrical
input pins, tested per MIL-STD-883, Method 3015.4 /JESD22-A114-A (HBM). However, normal ESD
precautions are still required during the handling of this module. This transceiver is shipped in ESD
protective packaging. It should be removed from the packaging and handled only in an ESD
protected environment.
13. Laser Safety
This is a Class 1 Laser Product according to IEC 60825-1:2007. This product complies with 21 CFR
1040.10 and 1040.11 except for deviations pursuant to Laser Notice No. 50, dated (June 24, 2007).
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