Serial/Audio/Ethernet Project Overview

Serial/Audio/Ethernet Project Overview
EECS150 - Digital Design
Lecture 14 - Serial/Audio/Ethernet
March 7, 2013
John Wawrzynek
Spring 2013
EECS150 - Lec13-io
Page 1
Project Overview
A.Serial Interface
B. Digital Audio
C. Networking and Ethernet
Spring 2013
EECS150 - Lec13-io
Page 2
Board-level Physical Serial Port
DB-9 connector
RS-232 Transmitter/Receiver
Implements standard
signaling voltage
levels for serial
communication.
Allows FPGA board to
communicate with any
other RS-232 device.
Oscilloscope
trace of ASCII
“K” transmission.
Spring 2013
EECS150 - Lec13-io
Page 3
FPGA Serial Port
CPU
UART: Universal
Asynchronous
Receiver and
Transmitter
converts to/from
serial format with
start/stop bits.
UART-CPU Adapter
FPGA
UART
Software communicates with
More generally, how UART
does software
using “UART-CPU Adapter”.
Spring 2013
EECS150 - Lec13-io
interface to I/O devices?
Page 4
MIPS uses Memory Mapped I/O
• Certain addresses are not regular memory
• Instead, they correspond to registers in I/O
devices
MIPS address map
0xFFFFFFFF
0xFFFF0004
0xFFFF0000
Example: Serial Line
Output Registers
data reg.
control reg.
Stores (sw) to the serial line data
register is sent over the serial line.
0
Spring 2013
EECS150 - Lec13-io
Page 5
Processor Checks Status before Acting
• Path to device generally has 2 registers:
• Control Register, says it’s OK to read/write
(I/O ready) [think of a flagman on a road]
• Data Register, holds data for transfer
• Processor reads from Control Register in loop,
waiting for device to set Ready bit in Control
reg (0 ⇒ 1) to say its OK
• Processor then loads from (input) or writes to
(output) data register
Spring 2013
EECS150 - Lec13-io
Page 6
MIPS150 Serial Line Interface
• Serial-Line Interface is a memory-mapped device.
• Modeled after SPIM terminal/keyboard interface.
• Read from keyboard (receiver); 2 device regs
• Writes to terminal (transmitter); 2 device regs
Unused (00...00)
Unused
Ready
Spring 2013
Received
Byte
(I.E.)
Transmitter Control
0xffff0008
Transmitter Data
0xffff000c
Unused (00...00)
Ready
Receiver Data
0xffff0004
(IE)
Unused (00...00)
(I.E.)
Receiver Control
0xffff0000
Transmitted
Byte
EECS150 - Lec13-io
Page 7
Serial I/O
• Control register rightmost bit (0): Ready
– Receiver: Ready==1 means character in Data Register
not yet been read;
1 ⇒ 0 when data is read from Data Reg
– Transmitter: Ready==1 means transmitter is ready to
accept a new character;
0 ⇒ Transmitter still busy writing last char
• I.E. bit (not used in our implementation)
• Data register rightmost byte has data
– Receiver: last char from serial port; rest = 0
– Transmitter: when write rightmost byte, writes goes to
serial port.
Spring 2013
EECS150 - Lec13-io
Page 8
“Polling” MIPS code
• Input: Read from keyboard into $v0
Waitloop1:
lui
lw
andi
beq
lw
$t0, 0xffff #ffff0000
$t1, 0($t0) #control
$t1,$t1,0x1
$t1,$zero, Waitloop1
$v0, 4($t0) #data
• Output: Write to display from $a0
Waitloop2:
Spring 2013
lui
lw
andi
beq
nop
sw
$t0, 0xffff #ffff0000
$t1, 8($t0) #control
$t1,$t1,0x1
$t1,$zero, Waitloop2
$a0, 12($t0) #data
EECS150 - Lec13-io
Page 9
Digital Audio
– Music waveform
–
A series of numbers is used to represent the waveform,
rather than a voltage or current, as in analog systems.
• Discrete time: regular spacing of sample values in time. Most
digital audio system use 44.1KHz (consumer) sample rate or
48KHz (professional) sample rate.
– Lower frequency would limit the maximum representable frequency
content. (Human hearing max is 20KHz)
• Digital: All inputs/outputs and internal values (signals) take on
discrete values (not analog). Most digital audio systems use 16-bit
values (64K possible values for any point in waveform). Using much
fewer than 16 bits generates noticeable noise from distortion.
Spring 2013
EECS150 lec14-io
Page 10
Analog / Digital Conversion
sample clock
sound
source
(microphone)
Analog to Digital
Converter (ADC)
Digital to Analog
Converter (DAC)
Digital System
26, 46, 51, 55, 51, …
26, 46, 51, 55, 51, …
compression
recording
processing
synthesis
decompression
playback
sample clock
power
amplifier
•
•
•
Converters are used to move from/to the analog domain.
ADC & DAC often combined in a single chip called CODEC (coder/
decoder).
Other types of CODECs perform other functions (ex: video conversion,
audio compression/decompression).
Spring 2013
EECS150 lec14-io
Page 11
Digital Audio Data-rates
44.1K samples/sec x 2 (stereo) x 16 bits/samples
= 1.4 Mbit/sec = 176,400 Bytes/sec
1 minute ≈ 10MByte total
•
Relatively small storage devices and network bandwidth limits has
prompted the development and application of many compression
algorithms for music and speech:
– Typically compression ratios of 10-100
– MP3: 32Kbits/sec - 320Kbits/sec (factor of 4x to 44x)
– These techniques are lossy; information is lost. However the better ones
(MP3 & AAC for example) used techniques based on characteristics of
human auditory perception to drop information of little importance.
•
Uncompressed audio is often referred to as PCM (pulse code
modulation) . (.wav files in windows)
Spring 2013
EECS150 lec14-io
Page 12
Board-level Physical Audio Port
Audio Jacks
Spring 2013
AC ’97 Audio Codec
EECS150 lec14-io
Page 13
FPGA Audio Port
FPGA design
produces or
consumes audio
FPGA
samples at audio
rate. FIFO
decouples
More generally, how does software consumer from
producer.
EECS150 - Lec13-io
Page 14
interface to I/O devices?
FIFO
Spring 2013
Local Area Network (LAN) Basics
•
to router
or gateway
switch
switch
host
host
•
switch
host
host
•
host
Spring 2013
A LAN is made up physically of a
set of switches, wires, and hosts.
Routers and gateways provide
connectivity out to other LANs
and to the internet.
Ethernet defines a set of
standards for data-rate
(10/100/1000 Mbps), and
signaling to allow switches and
computers to communicate (IEEE
802.3)
Most Ethernet implementations
these days are “switched” (point
to point connections between
switches and hosts, no contention
or collisions).
EECS150 lec14-io
Page 15
Ethernet
•
•
An Ethernet interface card or Network Interface Card (NIC)
is used to bring the network into the host:
Information travels in variable sized blocks, called Ethernet Frames
(or packets), each frame includes preamble, header (control)
information, data, and error checking.
host
•
•
message
network
host
Link level protocol on Ethernet is called the Medium Access Control
(MAC) protocol. It defines the format of the packets.
Frame format:
Preamble MAC Payload CRC
(8 bytes) header
– Preamble is a fixed pattern used by receivers to synchronize their clocks
to the data.
– Payload is the actual information the host is sending.
Spring 2013
EECS150 lec14-io
Page 16
Ethernet (802.3) Frame Format
destination
address
source
address
length
payload (data)
14 Bytes
•
•
•
•
46-1500 Bytes
CRC
4B
MAC protocol encapsulates a payload by adding a 14 byte header before the
data and a 4-byte cyclic redundancy check (CRC) after the data.
Each network hardware device is assigned a unique address (called MAC
address), assigned globally.
A 6-Byte destination address,
• A 2-byte length field, indicates the
specifies either a single recipient
number of bytes in the payload field.
node (unicast mode), a group of
recipient nodes (multicast mode), or
• The 4-Byte CRC provides error
the set of all recipient nodes
detection in the case where line
(broadcast mode).
errors result in corruption of the MAC
frame. Any frame with an invalid CRC
A 6-Byte source address, is set to
should discarded by the MAC
the sender’s globally unique node
receiver without further processing.
address. Its main function is to allow
address learning which may be
used to configure the filter tables in
switches.
Spring 2013
EECS150 lec14-io
Page 17
Ethernet Control – old style CSMA/CD
•
•
To keep cost down, inventors of Ethernet wanted no switches – just
hosts and Ethernet interfaces.
They used a protocol called Carrier Sense Multiple Access/Collision
Detect (CSMA/CD):
host A
host D
•
•
host B
host C
host E
host F
A host wanting to transmit senses whether the line is idle and therefore
available to be used. If it is, the host begins to transmit its frame and
listens as it does. If another device has tried to send at the same time,
a collision occurs and the frames are discarded.
Each device then waits a random amount of time and retries. If
another collision occurs it waits longer before trying again (exponential
backoff).
Spring 2013
EECS150 lec14-io
Page 18
Switched Ethernet
• Modern style Ethernet uses buffering and flow-control to
handle collisions in the network.
to router
or gateway
switch
switch
Buffers in switch allow one
packet to wait while the other
uses the output.
switch
host
host
host
Receivers (switches and hosts)
use special “pause” and
“resume” frames to control
sender.
host
host
Spring 2013
EECS150 lec14-io
Page 19
NIC connection into Machine
main memory
bridge
chip
fire-wire
PCIe BUS
graphics
Input:
CPU
Output:
1. CPU prepares payload and leaves
in memory buffer.
2. If NIC buffer space available, then
initiate DMA transfer to NIC.
3. If no space wait for interrupt.
4. NIC transfers frame out to switch,
then interrupts CPU with “buffer
space” update.
Spring 2013
EECS150 lec14-io
NIC
to switch
1. Packet arrives to NIC from switch.
2. If not proper MAC address or if
CRC error ignore
3. Else save payload in buffer and
interrupt CPU
4. CPU initiates DMA transfer to
memory buffer.
5. DMA finishes and notifies CPU
6. CPU processes packet according
to high-level protocol and
application.
Page 20
So far …
• Ethernet (IEEE 802.3):
– Good for routing within local
area network (LAN).
– Difficult for truly global
routing, every switch
everywhere would need to
store all MAC addresses –
(we really need some kind of
address hierarchy).
– Unreliable:
switch
switch
• No automatic
host
retransmission on
error.
host
• No acknowledgements
– sender doesn’t know
if receiver got the data.
Spring 2013
to router
or gateway
switch
host
host
host
EECS150 lec14-io
Page 21
TCP/IP
A suite of protocols for global host addressing and
reliable transmission on the internet.
•
•
TCP/IP is an example of a
• Each protocol layer
layered protocol: each layer
encapsulates the layer above it:
builds upon the layer below it,
adding new functionality.
packet format:
The protocol stack is the
P0 header P1 header P2 header
data
collection of protocol that
make up the suite:
protocol for transferring files /
delivering mail
P2
protocol for routing and reliability P1
•
Stacks are modular, so they can
easily change when a new
hardware model is adapted or
needs of applications change.
(Replace one module).
protocol for sending and receiving
P0
data using specific hardware
Spring 2013
EECS150 lec14-io
Page 22
TCP/IP
• TCP/IP is used as part of a 4-layer protocol:
Application layer:
FTP, SMTP, HTTP
Transport layer:
TCP, UDP
Network layer:
IP
Link Layer:
IEEE 802.x, PPP, SLIP
• Link level examples:
– IEEE 802.3 for Ethernet, 802.5 for token-ring, 802.11 for wireless,
– Used with dial-up modems: Serial line IP (SLIP), Point-to-Point
protocol (PPP).
Spring 2013
EECS150 lec14-io
Page 23
IP (Internet Protocol)
Extends the idea of host address from MAC to a hierarchical
“soft” address. All hosts take on an IP address.
•
•
The job of IP is to enable data to
be transmitted between
networks (adds very little in the
context of a LAN over what is
possible with MAC addresses).
Features of IP:
– Connectionless – no concept of
a job or session. Every packet
treated individually.
– In-order delivery not ensured.
– Unreliable protocol.
Spring 2013
The link layer (Ethernet) needs to
know the unique address (MAC) of
the specific place to next deliver the
message. TCP/IP suite include
ARP (address resolution protocol)
to map from IP address to MAC
address. Protocol works by
broadcasting a request on the
network – if a host sees its IP
address, it replies with its MAC. If
the IP is outside this subnet, then
the router (connecting out) will
reply).
EECS150 lec14-io
Page 24
IP Packets
Version IHL Type of Service
Total Length
Identification
Flags Fragment Offset
Time to live Protocol
header Checksum
Source Address
Destination Address
Options (optional)
16 bits
•
•
16 bits
Protocol field: says which high-level
protocol sent the data – used by
destination to pass packet to right
protocol module.
TTL (time to live): Initialized by the
sender (usually 64) then decr. by 1
by every router the packet passes
through. When reaches 0, the
packet is discarded and the sender
is notified with the Internet control
message protocol (ICMP). This
keeps packets from getting stuck in
loops. (Also, used by traceroute).
Spring 2013
•
•
•
Internet Addressing: every host
directly connected to the internet
has a unique address (issued by
IANA, iana.org).
These days many hosts connect
indirectly with NAT.
Internet addresses are 32-bits
long written as 4-Bytes separated
by periods. Range:
1.0.0.1 to 223.255.255.255
EECS150 lec14-io
Page 25
IP Routing
•
•
Local routing is done according to the specifics of the LANs own protocol.
Routing to outside networks is done through routers (these are either hosts
with multiple NICs and special routing software, or special router hardware.)
– Each host on the LAN is assigned a default router, used to connect it to outside.
•
A router examines every packet and
compares the destination address with •
a table of addresses.
Routers build up their tables in
multiple ways:
1. If it finds an exact match, it forwards
the packet to the address associated
with that entry in the table.
2. If the router doesn’t find a match, it
runs through to the table looking for a
match just on the network ID. If a
match is found, the packet is sent on
to the address associated with that
entry.
3. If no match, the router sends it to the
default, next-hop router, if present.
4. If no default router present, the router
sends an ICMP “host unreachable”
messsage back to the sender.
Spring 2013
EECS150 lec14-io
– Static – read from a file on startup.
– Dynamically, by broadcasting
ICMP router solicitation messages
to which other routers respond.
– Other protocols are used to
discover the shortest path to a
location.
– Routers are updated periodically
in response to traffic conditions
and availability of a route.
Page 26
Transport Layer
Two most popular transport protocols are TCP and UDP.
16 bits
Source Port
length
Destination Port
Checksum
UDP Header
•
UDP – User Datagram Protocol
– Port numbers represent a software port.
– They identify which protocol module sent (or is to receive) the data.
– Standard port numbers exist:
Telnet: port 23, Simple Mail Transfer Protocol: port 25
– UDP and TCP use the port numbers to determine which application
layer protocol should receive the data.
– UDP isn’t reliable, but appropriate for many applications like real-time
audio and video (where if data is lost it is better to do without it than to
send it again.) Also, gets used for online games.
Spring 2013
EECS150 lec14-io
Page 27
TCP – Transmission Control Protocol
• Transport layer protocol used by most internet applications:
FTP, HTTP, Telnet, …
•
•
•
•
Connection-oriented: 2 hosts, one
a client, and the other a server must
establish a connection before any
data can be transferred between
them (SYN/ACK handshake).
Once done the connection must be
closed (FIN flag).
TCP sends data using IP in blocks
called segments.
TCP includes mechanisms for
ensuring data which arrives out of
sequence is put back into the order
it was sent.
TCP implements flow-control, so a
sender app. cannot overwhelm a
receiver app with data.
Spring 2013
•
•
TCP provides reliability: When data
is received correctly, TCP sends an
acknowledgement back to the
sender. If the sender doesn’t
receive an ack within a certain
period, the data is recent. For
efficiency, the sender will usually
send multiple segments without
waiting for acks. It keeps track of
what segments have or have not
been acked – keeping a copy of
those that have not, in case they
need to be resent.
ACKs are piggy-backed on data
segments for efficiency.
EECS150 lec14-io
Page 28
Standard Hardware-Network-Interface
application
level
interface
MAC
(MAC layer processing)
PHY
(Ethernet signal)
Media Independent Interface (MII)
•
Spring 2013
Ethernet
connection
– MAC. Media access layer
processing. Processes Ethernet
frames: preambles, headers,
computes CRC to detect errors on
receiving and to complete packet for
transmission. Buffers (stores) data
for/from application level.
Usually divided into three hardware
blocks. (Application level
processing could be either
hardware or software.)
– MAG. “Magnetics” chip is a
transformer for providing electrical
isolation.
– PHY. Provides serial/parallel and
parallel/serial conversion and
encodes bit-stream for Ethernet
signaling convention. Drives/
receives analog signals to/from
MAG. Recovers clock signal from
data input.
MAG
(transformer)
•
Application level interface
– Could be a standard bus (ex: PCI)
– or designed specifically for
application level hardware.
•
MII is an industry standard for
connection PHY to MAC.
XUP board has no MAC chip, must
be handled in FPGA (hardcore).
EECS150 lec14-io
Page 29
Board-level Physical Network Port
RJ-45
connector
Marvel Alaska PHY device (88E1111),
supports 10/100/1000 Mb/s.
RJ-45 with built-in magnetics
Spring 2013
EECS150 lec14-io
Page 30
Was this manual useful for you? yes no
Thank you for your participation!

* Your assessment is very important for improving the work of artificial intelligence, which forms the content of this project

Download PDF

advertising