Cool RoadRunner II “All-in-one” PC/104-Plus CPU board

Cool RoadRunner II
“All-in-one” PC/104-Plus CPU board
Technical Manual
TME-104P-CRR2-R1V16.doc
Version 1.16 / April 04
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Technical Manual PC/104-Plus “Cool RoadRunner II” Version 1.16
1
April 2004
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FUNCTIONAL SPECIFICATION..................................................................................5
1.1 The “Cool RoadRunner II” at a glance .................................................................................................... 5
1.2 Functional block diagram ......................................................................................................................... 7
1.3 Processor ................................................................................................................................................... 8
1.4 I/O Companion ........................................................................................................................................... 8
1.5 Integrated Chipset features ...................................................................................................................... 9
1.6 On Board Power Supply ........................................................................................................................... 9
1.7 PC/104-Plus bus interface ...................................................................................................................... 10
1.8 PC/104 bus interface ............................................................................................................................... 11
1.9 Super I/O................................................................................................................................................... 11
1.10 PC-AT keyboard interface..................................................................................................................... 12
1.11 Speaker................................................................................................................................................... 12
1.12 Reset-In Signal....................................................................................................................................... 12
1.13 Floppy disk interface............................................................................................................................. 13
1.14 Serial port COM1 and COM2................................................................................................................. 13
1.15 Parallel Port LPT1 .................................................................................................................................. 13
1.16 PS/2 mouse interface ............................................................................................................................ 14
1.17 Audio interface....................................................................................................................................... 14
1.18 IrDA interface ......................................................................................................................................... 15
1.19 USB ports ............................................................................................................................................... 15
1.20 EIDE port ................................................................................................................................................ 16
1.21 Compact flash connector ..................................................................................................................... 16
1.22 CRT / LCD Graphic-Controller.............................................................................................................. 16
1.23 Video Input Port ..................................................................................................................................... 19
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1.24 TV-OUT ................................................................................................................................................... 19
1.25 Ethernet-Controller................................................................................................................................ 20
1.26 Watchdog ............................................................................................................................................... 21
1.26.1 Short-time watchdog timer.................................................................................................................... 21
1.26.2 Long-time watchdog timer .................................................................................................................... 21
2
HARDWARE INSTALLATION ...................................................................................24
2.1 Adapter cable set..................................................................................................................................... 24
2.2 BIOS .......................................................................................................................................................... 24
2.3 Software installation ............................................................................................................................... 25
3
CONNECTORS ..........................................................................................................26
3.1 Power connector pin definition.............................................................................................................. 26
3.2 COM1 port connector pin definition ...................................................................................................... 26
3.3 COM2 port connector pin definition ...................................................................................................... 26
3.4 LPT1 port connector pin definition........................................................................................................ 26
3.5 Keyboard connector pin definition ........................................................................................................ 27
3.6 VGA connector pin definition................................................................................................................. 27
3.7 10/100BaseT connector pin definition................................................................................................... 28
3.8 PS/2 Mouse / USB / IrDA / Audio connector pin definition.................................................................. 28
3.9 EIDE connector pin definition ................................................................................................................ 28
3.10 Floppy connector pin definition........................................................................................................... 29
3.11 TV-OUT connector pin definition ......................................................................................................... 29
3.12 Flat Panel connector pin definition...................................................................................................... 30
3.13 PC/104-Plus bus pin definition............................................................................................................. 31
3.14 PC/104 bus pin definition...................................................................................................................... 32
3.15 Video Input Port ..................................................................................................................................... 33
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MOTHERBOARD SOFTWARE SPECIFICATIONS...................................................34
4.1 System address map............................................................................................................................... 34
4.2 Interrupts and DMA channels................................................................................................................. 36
5
TECHNICAL CHARACTERISTICS............................................................................37
5.1 Electrical specifications.......................................................................................................................... 37
5.2 Environment specifications.................................................................................................................... 37
5.3 Mechanical specification ........................................................................................................................ 38
6
OPTIONS ...................................................................................................................41
7
HISTORY....................................................................................................................42
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Technical Manual PC/104-Plus “Cool RoadRunner II” Version 1.16
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1 Functional specification
The “Cool RoadRunner II” is an “All-in-one” CPU board with on-board 10/100 BaseT
Ethernet interface and graphic acceleration. The CPU is an x86-compatible 64-bit microprocessor with sixth generation features and is available with speeds up to 300 MHz. The
graphic interface supports all kinds of LCD and TFT Flat Panels and complies with the ordinary SVGA standard. It includes 2 Mbytes graphic memory and has a maximum resolution of 1280 x 1024, 16.7 million colors. An Audio interface with two lines in and out each
and a microphone line is supported. Memory is expandable up to 512 Mbytes with 3.3V
SDRAM SODIMMs (144p.). The board conforms to the official PC/104Plus Specification.
1.1 The “Cool RoadRunner II” at a glance
CPU:
National Geode™ MMX™ with I/O Companion CX5530™
Cache Memory:
16 KB unified L1 Write-Back Cache
No L2 cache subsystem can be installed
Main Memory:
Supports a 64-bit memory bank using single- or double-sided 144-pin SO
DIMM modules up to 512MB SDRAM
Extension slots:
1x 32-bit PC/104Plus slot
1x 16-bit PC/104 slot
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Interfaces:
Minimal model:
Power supply
PS/2 Keyboard
one parallel port
two serial ports
PS/2 Mouse
two USB ports
IrDA
Floppy
EIDE
SVGA monitor
Flat Panel
Compact Flash socket
PC/104 Bus
PC/104+ Bus
Options:
Ethernet:
10/100 BaseT Intel 82559 Ethernet controller
Sound:
AC97 Sound Codec National LM4548, Line-In (left/right),
Line-Out (left/right), Microphone-In
TV-OUT:
S-Video and BAS signal
Other models are possible on high volumes.
Dimensions:
95.9mm x 115.6mm (including I/O extension)
Mounting:
4 mounting holes
Note: It is strongly recommend using plastic spacers instead of
metal spacers to mount the board. With metal spacers
there is a possible danger to create a short circuit with
the components located around the mounting holes.
This can damage the board!
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1.2 Functional block diagram
PC/104
bus extension
Floppy
LPT 1
COM 1
COM 2
KB
RTC
Watchdog
ISA bus
Audio
Compact
Flash socket
National
GEODE
CX5530
I/O
Companion
2xUSB / Audio / Mouse / IrDA
Super I/O
BIOS
EIDE
Ultra DMA/33
SODIMM SDRAM
PCI bus
PC/104Plus
bus extension
Ethernet
controller
Graphic
controller
10/100BaseT
Flat Panel
SVGA
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1.3 Processor
The National Geode™ MMX™ is an advanced 64-bit x86 compatible processor offering
high performance, fully accelerated 2D graphics, a 64-bit synchronous DRAM controller
and a PCI bus controller, all on a single chip. Plus it supports the MMX™ instruction set
extension for the acceleration of multimedia applications. The processor is a split rail design with 3.3V I/O and 1,6 to 2.6V Core voltage and is offered in speeds up to 300 MHz.
The core has integer and floating point execution units that are based on sixth-generation
technology. The integer core contains a single, six-stage execution pipeline and offers advanced features such as operand forwarding, branch target buffers, and extensive write
buffering. A 16Kbyte write-back L1 cache is accessed in a unique fashion that eliminates
pipeline stalls to fetch operands that hit in the cache.
A separate on-chip video buffer enables >30FPS MPEG1 video playback together with the
CX5530™ I/O Companion chip. A tightly coupled synchronous DRAM memory controller
supports graphics and system memory accesses. This tightly coupled memory subsystem
eliminates the need for an external L2 cache. Software handler routines for XpressGRAPHICS™ and XpressAUDIO™ are included in the BIOS and provide compatible VGA
and 16-bit industry standard audio emulation.
1.4 I/O Companion
The Cx5530™ I/O Companion is a PCI-to-ISA bridge (South Bridge), ACPI-compatible
chipset that provides AT/ISA functionality. The device also contains state-of-the-art power
management enabling notebook designs as well as “Deep Green” implementations. Hardware support for the Cyrix Virtual System Architecture™ (VSA™) is provided, thus enabling Microsoft® PC97 and PC98-compatible audio. The integrated bus master EIDE controller supports two ATA-compatible devices. A two-port Universal Serial Bus (USB) provides high speed, Plug & Play expansion for a variety of new consumer peripheral devices
such as digital cameras.
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1.5 Integrated Chipset features
-
x86 compatibility and support of MMX™ instruction set extension
-
fully 2D graphic acceleration
-
synchronous memory interface
-
PCI bus controller (PCI 2.1 compatible)
-
ISA interface
-
Ultra DMA/33 (ATA-4) support
-
EIDE interface
-
Two-port USB interface
-
AT compatibility
-
SMM power management
-
full VGA and VESA video
-
16-bit stereo sound
-
MPEG2 assist
-
AC97 Version 2.0 compatible
1.6 On Board Power Supply
The on board power supply generates all necessary voltages from the single supply voltage of 5 volts. The generated voltage of 3.3 Volts, which is available on the connectors
„PC/104+“ and „Flat Panel“, must not be used to supply external electronic devices with
high power consumption like other PC/104 boards or displays.
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1.7 PC/104-Plus bus interface
The PC/104-Plus bus is a modification of the standard PCI PC bus. It incorporates all of
the PC/104 features, with the added advantage of the high speed PCI bus.
The main features are:
-
PC/104 Plus Bus slot fully compatible with PCI version 2.1 specifications.
-
Integrated PCI arbitration interface (32 bit wide, 3.3V).
-
Translation of PCI cycles to ISA bus.
-
Translation of ISA master initiated cycle to PCI.
-
Support for burst read/write from PCI master.
-
33 MHz PCI clock.
The "Cool RoadRunner II" supports only signal levels at 3.3 Volt. Adapter boards on the
PC/104-Plus bus must tolerate this voltage. Signal levels of 5 Volt are not allowed.
Note: The internal DC/DC converter does not supply the 3.3 Volt
pins on the PC/104-Plus bus.
Because of the complete functionality in on board, there are some restrictions for extension boards on the PC/104 Plus bus:
SLOT0:
no restrictions are known for this slot.
SLOT1:
only extensions boards that will not use the busmaster function can operate
on this slot number. If an extension board with busmaster function is used on
this slot number the system might hang during boot-time. This restriction is
only valid if the board is shipped with the onboard Ethernet controller (standard configuration).
SLOT2:
no restrictions are known for this slot.
SLOT3:
this slot is used by the onboard VGA controller and cannot be used for extension boards. This restriction is only valid if the board is shipped with the
onboard VGA controller (standard configuration).
Note: The "Cool RoadRunner II" supports only one busmaster
extension board. This can be used only in SLOT0 or
SLOT2.
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1.8 PC/104 bus interface
The PC/104 bus is a modification of the industry standard (ISA) PC bus specified in IEEE
P996. The PC/104 bus has different mechanics than P966 to allow the stacking of modules. The main features are:
-
Supports programmable extra wait state for ISA cycles.
-
Supports I/O recovery time for back-to-back I/O cycles.
The specification for the PC/104 bus and the PC/104-Plus bus are available from the
PC/104 Consortium (http://www.PC104.org).
1.9 Super I/O
The onboard Super I/O (SMSC FDC37B72x) provides:
-
PC-AT keyboard interface on IDC10 connector
-
floppy disk interface on FFC connector
-
COM1 and COM2 on IDC10 connectors
-
LPT1 on IDC26 connector
-
PS/2 mouse interface on IDC16 connector
-
IrDA interface on IDC16 connector
-
General purpose pins are used for the watchdog functions
To use the watchdog function of the Super I/O it is necessary to program the registers.
This can be done through the two I/O addresses 370h and 371h. At the I/O address 370h
the index-register is located, at the I/O address 371h the data-register. To change the registers or to read them the Super I/O controller has to be in configuration mode. Therefore
the data byte 55h has to be written to the I/O address 370h. After configuration the configuration mode can be left by writing AAh to the I/O address 370h. Reading from or writing
to a register works as follows:
OUT (0x370, 0x55)
OUT (0x370, register-index)
OUT (0x371, register-data), or IN (0x371, register-data)
OUT (0x370, 0xAA)
On request there are DOS programs SMCW.EXE (to write) and SMCR.EXE (to read)
available that work that way (hex-letters ‘ a ’ to ‘ f ’ have to be entered as small letters)
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To change a register enter:
SMCW <register-index (in hex)> <register-data (in hex)>
Example:
SMC e2 0a
To read a register enter:
SMCR <register-index (in hex)>
Example:
SMCR e2
Output:
INDEX e2 VALUE a
The Super I/O controller is divided in functional groups. Before the value of a register of a
functional group can be changed, this group has to be selected. This happens by writing
the number of the corresponding functional group in the index-register 07. For example the
registers for the General Purpose Pins of the controller have 8 as number of functional
group. To select this group the following should be entered:
Example:
SMCW 07 08
1.10 PC-AT keyboard interface
The keyboard interface is located on the IDC10 Header “KEYBOARD”. An adapter cable is
available to use a standard PC-AT keyboard with this connector.
1.11 Speaker
The speaker signal is located on the IDC10 Header “KEYBOARD”. A standard PC
Speaker can be connected between the signal SPEAKER and VCC.
1.12 Reset-In Signal
The RESET-IN signal is located on the IDC10 Header “KEYBOARD”. To reset the board
the signal RESET-IN must be connected to GND.
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1.13 Floppy disk interface
The floppy interface connector is built for slimline floppy disk drives. For connection of a
conventional floppy disk drive an optional adapter connector is available.
1.14 Serial port COM1 and COM2
The serial ports are located on two IDC headers “COM1” and “COM2”. Adapter cables with
standard DB9 male connectors are available.
The serial ports are programmable in BIOS setup by pressing DEL at boot time. When entering Integrated Peripherals and then choosing Onboard Serial Port 1 or Onboard Serial Port 2, configuration of the serial ports is accessible.
The following settings are possible for COM1:
-
Auto
-
3F8 / IRQ4 (base address / interrupt channel)
-
3F8 / IRQ3 (base address / interrupt channel)
-
3E8 / IRQ4 (base address / interrupt channel)
-
2E8 / IRQ3 (base address / interrupt channel)
The following settings are possible for COM2:
-
Disabled
-
Auto
-
3F8 / IRQ4 (base address / interrupt channel)
-
2F8 / IRQ3 (base address / interrupt channel)
-
3E8 / IRQ4 (base address / interrupt channel)
-
2E8 / IRQ3 (base address / interrupt channel)
1.15 Parallel Port LPT1
The parallel port is located on an IDC26 header. An adapter cable with a standard DB25
female connector is available.
The parallel port is programmable in BIOS setup by pressing DEL at boot time. Entering
Integrated Peripherals and then choosing Onboard Parallel Port, configuration of LPT1
is accessible.
Configuring LPT1, the following settings are possible:
-
Disabled
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3BC/IRQ7 (base address / interrupt channel)
-
378/IRQ7 (base address / interrupt channel)
-
278/IRQ5 (base address / interrupt channel)
April 2004
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While not disabled, Parallel Port Mode can be selected by choosing:
-
Normal
-
SPP
-
EPP 1.7+SPP
-
EPP 1.9+SPP
-
ECP
-
ECP+EPP 1.7
-
ECP+EPP 1.9
If Parallel Port Mode is switched to ECP or ECP+EPP 1.x, ECP Mode Use DMA is accessible. DMA channel 1 or 3 can be selected.
1.16 PS/2 mouse interface
The PS/2 mouse signals MCLK and MDAT are located on the IDC16 header “AUDIO”. The
PS/2 mouse function is programmable in BIOS setup by pressing DEL at boot time. Entering BIOS features Setup and then choosing PS/2 mouse function control PS/2 mouse
function can be disabled or enabled.
1.17 Audio interface
The audio signals are located on the IDC16 header “AUDIO”. The signals are LINE-IN
(left/right), LINE-OUT (left right) and MICROPHONE-IN of the optional available Audio Codec. The audio function is programmable in BIOS setup by pressing DEL at boot time.
Entering Integrated peripherals and then choosing Build in CPU Audio the audio function can be disabled or enabled. If enabled the following settings can be made:
Audio I/O Base Address:
220H, 240H, 260H or 280H
MPU-401 I/O Base Address:
Disabled, 300H or 330H
Audio IRQ Select:
IRQ5, IRQ7, IRQ10 or Disabled
Audio Low DMA Select:
DMA0, DMA1, DMA3 or Disabled
Audio High DMA Select:
DMA5, DMA6, DMA7 or Disabled
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The Audio port is Soundblaster16 compatible under MS-DOS. For Windows95/98 a driver
package is available. Also an adapter cable with standard audio connectors is available.
1.18 IrDA interface
The IrDA interface signals IRRX and IRTX are located on the IDC16 header “AUDIO”. The
IrDA interface is available as serial port 2 by selecting it in the BIOS setup. The normal
serial port2 can be not used at the same time. Entering Integrated Peripherals and then
choosing Auto or one of the available base addresses in the menu point Serial Port 2, the
menu point UART2 Mode will appear. There are three different possibilities to choose.
- Standard
- IrDA 1.0
- ASK-IR
Choosing IrDA 1.0 or ASK-IR, two menu points are accessible. With Duplex Select you
can choose between half duplex and full duplex communication. With TxD, RxD it is possible to select independently whether the functions data transmission (Hi, Lo), data reception (Lo, Hi), data transmission and reception (Hi, Hi) or no data communication (Lo, Lo)
are enabled.
To use the IrDA interface an external transmitter must be connected to the IrDA signals.
1.19 USB ports
Two USB ports are located on the IDC16 header “AUDIO”. When using USB it has to be
enabled in the BIOS.
Entering Chipset Features Setup and then choosing USB Controller: Enabled.
It is possible to use an USB keyboard under DOS without special driver software. Therefore USB legacy support has to be enabled in the BIOS. (Note: not all keyboard manufacturers are supported)
Entering Chipset Features Setup and then choosing USB Controller: Enabled and also
USB Legacy Support: Enabled.
An adapter cable with two standard USB connectors is available.
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1.20 EIDE port
An EIDE (Extended Intelligent Drive Electronics) port is provided by the chipset to connect
intelligent drives that integrate the controller (hard disk, CD-ROM etc.). This port supports
LBA (Logic Block Addressing) that allows the use of hard disks larger than 512 Mbytes. To
enhance the performance, this port supports DMA F type of transfer. The EIDE port is located on a standard 44-pin header (2mm) for 2,5” hard disks and the compact flash connector. An adapter cable is available to connect standard EIDE devices with a 40 pin IDC
header.
1.21 Compact flash connector
On the bottom side of the board a compact flash connector is located that allows the use
of compact flash cards instead of a mechanical hard disk. This socket is also connected to
the primary EIDE port of the chipset. Care must be taken when using a compact flash card
and another EIDE device (hard disk, CDROM) on the EIDE port at the same time. The
compact flash card is always the master device; the device on the EIDE port must be set
up as slave. Compact flash cards are available as solid-state disks from 4 to 300 Mbytes
and also as IBM MicroDrive up to 1 GByte.
1.22 CRT / LCD Graphic-Controller
The graphic-controller CT69000 from Chips&Technologies combines state-of-the-art flat
panel controller capabilities with low power, high performance integrated memory. It incorporates 2Mbytes of proprietary integrated SDRAM for the graphics/video frame buffer. The
integrated SDRAM memory supports up to 83MHz operation, thus increasing the available
memory bandwidth for the graphics subsystem. The result is support for additional highcolor / high-resolution graphics modes combined with real-time video acceleration. This
additional bandwidth also allows more flexibility in graphics functions intensely used in
Graphical User Interfaces (GUIs) such as Microsoft™ Windows™.
The CT69000 supports a wide variety of monochrome and color Single-Panel, SingleDrive (SS) and Dual-Panel, Dual-Drive (DD), standard and high resolution, passive STN
and active matrix TFT/MIM LCD and EL panels. Up to 256 gray scales are supported on
passive STN LCD’s. Up to 16.7M different colors can be displayed on passive STN LCDs
and up to 16.7M colors on 24-bit active matrix LCDs.
Vertical centering and stretching are provided for handling modes with less than 480 lines
on 480-line panels. Horizontal and vertical stretching capabilities are also available for
both text and graphics modes for optimal display of VGA text and graphics modes on
800x600, 1024x768 and 1280x1024 panels.
The CT69000 uses independent multimedia capture and display systems on-chip. The
capture system places data in display memory and the display system places the data in a
window on the screen.
The capture system can receive data from the system bus (PCI) in either RGB or YUV
format. The input data can also be scaled down before storage in display memory. Capture of input data may also be double buffered for smoothing and to prevent image tearing.
To better support MPEG2 (DVD) video decompression, the CT69000 includes a line buffer
to directly support the native format of MPEG2 data of 720 pixels wide.
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The capture engine also supports image mirroring and rotation for camera support. This
feature is important for applications such as video teleconferencing because it allows the
image movements to appear on the display as it actually occurs. The image and movement is not a mirror image of what is actually taking place. The display system can independently place either RGB or YUV data from anywhere in display memory into an onscreen window which can be any size and located at any pixel boundary (YUV is converted to RGB “on-the-fly” on output).
Non-rectangular windows are supported via color keying. The data can be fractionally
zoomed on output up to 8x to fit the on-screen window and can be horizontally and vertically interpolated. Interlaced and non-interlaced data are both supported in the capture
and display systems.
The internal logic of the CT69000 is optimized for 3.3V operation, bus and panel interfaces
at 3.3V but can tolerate 5V operation.
The CT69000 graphics engine is designed to support high performance graphics and
video acceleration for all supported display resolutions, display types and color modes.
There is no compromise in performance operating in 8, 16 or 24 bpp color modes allowing
true acceleration while displaying up to 16.7M colors.
Supported Display Modes
The following display modes are supported:
Resolution
640x480
640x480
640x480
800x600
800x600
800x600
1024x768
1024x768
1280x1024
Color (bpp)
8
16
24
8
16
24
8
16
8
Refresh Rates (Hz)
60, 75, 85
60, 75, 85
60, 75, 85
60, 75, 85
60, 75, 85
60, 75, 85
60, 75, 85
60, 75, 85
60
The CT69000 supports CRT and most kind of Displays like, STN DSTN, EL and TFT. The
CT69000 can boot on CRT, LCD or simultaneous. Up to 16 different displays are supported in the VGA BIOS. This functions can be programmed in BIOS setup by pressing
DEL at boot time. Entering Special Features Setup and then choosing:
CT69000 Display Device: CRT, LCD or simultaneous
The display can be selected through the following options, if CT69000 Display device is
LCD or simultaneous:
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LCD Panel Select: read pins PS0-PS3 on panel connector
With this setup option the display type is selected by connecting the panel select signals
PS0 – PS3 on the LCD connector to GND. The other possibility is to select the display directly in the BIOS, e.g.
LCD Panel Select: #01:1024x768 DSTN Col
The following panels are supported in the standard BIOS:
LCD
Resolution
Panel
#01
#02
#03
#04
#05
#06
#07
#08
#09
#10
#11
#12
#13
#14
#15
#16
Type
320 x 240 STNMonochrom
1280 x 1024 TFT Color
640 x 480 EL Monochrome
800 x 600 DSTN Color
640 x 480 TFT Color
640 x 480 TFT Color
1024 x 768 TFT Color
800 x 600 TFT Color
800 x 600 TFT Color
800 x 600 TFT Color
800 x 600 DSTN Color
800 x 600 DSTN Color
1024 x 768 TFT Color
1280 x 1024 DSTN Color
1024 x 600 DSTN Color
1024 x 600 TFT Color
Manufacturer
Hitachi
Planar
Sharp
NEC
Sharp
Hosiden
Alternatively connect
PS0 PS1 PS2 PS3
LMG 7520
GND GND GND GND
n.c.
GND GND GND
EL640.480-AG1 GND n.c.
GND GND
n.c.
n.c.
GND GND
LQ084V1DG21
GND GND n.c.
GND
NL6448AC33-24 n.c.
GND n.c.
GND
LQ12X12
GND n.c.
n.c.
GND
HLD1210-010000 n.c.
n.c.
n.c.
GND
GND GND GND n.c.
n.c.
GND GND n.c.
GND n.c.
GND n.c.
n.c.
n.c.
GND n.c.
GND GND n.c.
n.c.
n.c.
GND n.c.
n.c.
GND n.c.
n.c.
n.c.
n.c.
n.c.
n.c.
n.c.
Part no.
Note: n.c. = leave this pin open. The above table is depending on the used VGA BIOS and may be changed for product improvement.
The actual supported displays can be seen in the BIOS menu.
Remember it is only necessary to connect PS0 – PS3 on the panel connector if the option
LCD Panel Select is set to read pins PS0-PS3 on panel connector.
This option is useful if you want to automatically select the proper display type through the
display cable.
The supply voltages of the backlight converter (normally 12V or 5V) and the supply voltage
oft the display (normally 5V or 3,3V) can be switched over the board. This is necessary for
the correct power sequence of the display. On the panel connector the used signals are:
Signal Name
VDD-SRC
SW-VDD
VBKL-SRC
SW-VBKL
Pin
37
36
39
38
Description
Display Power Supply Source
Switched Power Supply
Display Backlight Supply Source
Switched Backlight Supply
Maximum ratings
+ 5V / 1 A
+ 5V / 1 A
+ 12V / 1A
+ 12V / 1A
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Note: On the panel connector are also the 3,3 Volt, generated by
the on board power supply. This 3,3 Volt must be not used
to supply connected displays with high power consumption.
An adapter cable IDC10 to Sub-D HD15 female for CRT Monitors and several cable
adapters for a direct connection of the display are available.
1.23 Video Input Port
The CT69000 has a digital video input port that may be used for overlaying a picture on
the screen. The data of the video input port is directly transferred to the video output and is
therefore not accessible by other application programs. The video input port cannot be
used as a frame grabber device. The signals of the video input port are located on the
video input port connector. Because the signals on this connector are routed directly to the
pins of the CT69000 the user may have to build his own hardware around to connect a
video device like a camera.
The video input port is located on the bottom side marked as VIDEO CON in the drawing.
The video input port is not available on all board models, but only on the model that includes all peripheral functions (TV-OUT, Sound, Ethernet, Graphics Controller).
1.24 TV-OUT
The TV-OUT option offers the possibility to connect directly a TV. The VGA-Signals (RGB)
is converted on board to a BAS signal (COMP) and a S-VHS signal (LUMA and CRMA).
The signals are located on a 12-pin IDC header (1,27 mm).
TV-OUT can be used together with a CRT Monitor or stand-alone. For proper timing of the
TV signals the currently used VGA mode must be changed to PAL or NTSC timing by a
VGA BIOS call via software interrupt 10h, function 5F19h (examples in assembler):
For PAL timing:
mov ax,5F19
mov bl,01
mov bh,02
int 10
For NTSC timing:
mov ax,5F19
mov bl,01
mov bh,01
int 10
Because the setting will be lost if the VGA mode changes, this must be executed whenever the VGA mode changes. To come back to normal VGA timing the software interrupt
looks like this:
mov ax,5F19
mov bl,01
mov bh,00
int 10
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In addition the right frequency generator for PAL or NTSC timing must be selected over
the general-purpose pin GP16 of the Super I/O.
For PAL timing this general-purpose pin must be held high. This can be done with the
DOS program SMCW.EXE:
SMCW 07, 08
SMCW E6, 02
For NTSC timing this general-purpose pin must be held low. This can be done with the
DOS program SMCW.EXE:
SMCW 07, 08
SMCW E6, 00
If a CRT-Monitor is used at the same time it must tolerate this timing. Because of the load
on the VGA signals by the CRT monitor the display on the TV becomes a little darker,
when connecting a CRT monitor at the same time.
When using Windows95, 98 or NT as operating system, the switch to TV PAL mode can
be done in the VGA driver. Because this will not affect the state of the GP16 pin of the Super I/O, this will only result in TV PAL mode (the default setting after power-up of GP16 is
high).
1.25 Ethernet-Controller
The controller-controller 82559ER from Intel is a fully integrated 10/100 Base-TX LAN solution and consists of both the Media Access Controller (MAC) and the physical layer
(PHY) interface combined into a single component solution.
The 32-bit PCI controller provides enhanced scatter-gather bus mastering capabilities and
enables the 82559ER to perform high-speed data transfers over the PCI bus. Its bus master capabilities enable the component to process high level commands and perform multiple operations, which lowers CPU utilization by off-loading communication tasks from the
CPU: Two large transmit and receive FIFOs of 3 Kbytes each help prevent data underruns
and overruns while waiting for bus accesses. This enables the 82559ER to transmit data
with minimum interframe spacing (IFS).
The 82559ER can operate in either full duplex or half duplex mode. In full duplex mode the
82559 adheres to the IEEE 802.3x Flow Control specification. Half duplex performance is
enhanced by a proprietary collision reduction mechanism.
The CSMA/CD unit of the 82559ER allows it to be connected to either a 10 or 100 Mbps
Ethernet network. The CSMA/CD unit performs all of the functions of the 802.3 protocol
such as frame formatting, frame stripping, collision handling, deferral to link traffic, etc. The
CSMA/CD unit can also be placed in a full duplex mode, which allows simultaneous
transmission and reception of frames.
The PHY unit of the 82559ER supports Auto-Negotiation for 10BaseT-/100BaseTX Half
Duplex and 10BaseT-/100BaseTX Full Duplex.
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The signals of the Ethernet interface are located on the IDC10 header “Ethernet”. An
adapter cable from IDC10 to RJ45 connector is available.
1.26 Watchdog
The board has two different independent watchdog systems, which are programmed
through the Super I/O.
1.26.1 Short-time watchdog timer
A short-time watchdog is realized with a Maxim 691 Reset/Watchdog circuit. The trigger
time of this watchdog is 400ms and accessible by the Super I/O controller through the
functional group 8. To activate the short-time watchdog the contents of the register ‘0xE2’
has to be set to ’00’. To trigger this watchdog the contents of the register ‘0xE2’ has to be
changed within 400ms from ‘00’ to ‘02’ or back from ‘02’ to ‘00’. If there is no change of the
register within 400ms the watchdog releases and generates a full hardware reset.
Program example:
SMCW 07 08
SMCW E2 00
SMCW E2 02
SMCW E2 00
…
…
…
SMCW E2 02
SMCW E2 00
…
The status of the watchdog can be read through the register F6, Bit1 (Bit0 and Bit2-Bit7
are don’t care) of the Super I/O. A low level at this pin indicates that a watchdog time-out
has occurred.
1.26.2 Long-time watchdog timer
A long-time watchdog timer is implemented in the Super I/O. The watchdog time-out status
bit may be mapped to an interrupt. It can also brought out as hardware reset. Both options
have to be programmed to the corresponding configuration registers of the Super I/O.
This watchdog timer has a time-out ranging from either 1 to 255 minutes with one-minute
resolution or 1 to 255 seconds with one-second resolution. As soon as the watchdog timer
is activated it starts counting down from the value loaded. When the count value reaches
zero the counter stops and sets the watchdog time-out status bit. Regardless of the current
state of the watchdog timer, the time-out status bit can be directly set or cleared by the
host CPU.
There are three system events that can reset the watchdog timer. These are a keyboard
interrupt, a mouse interrupt or I/O reads/writes to address 0x201. The effect on the watchdog timer for each of these system events may be individually enabled or disabled. When
a system event is enabled the occurrence of this event will cause the watchdog timer to
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reload the stored value and reset the watchdog timer time-out status bit if set. If all three
system events are disabled the watchdog timer will inevitably time out.
The watchdog timer may be configured to generate an interrupt on the rising edge of the
time-out status bit. The watchdog timer interrupt is mapped to an interrupt channel through
a configuration register. When mapped to an interrupt the interrupt request pin reflects the
value of the watchdog timer time-out status bit.
The used registers of the Super-I/O are shown in the following table:
Index-register
0x07
Data
0x08
Program
SMCW 07 08
0x00
Action
select functional
group 08
timer unit in minutes
0xf1
(default = 00)
0xf1
0xf2
(default = 00)
0xf2
…
0xf2
0x80
0x00
timer unit in seconds
time-out disabled
SMCW f1 80
SMCW f2 00
0x01
…
0xff
time-out = 1 min/sec
…
time-out = 255
min/sec
WDT is not affected
upon I/O read/write
of I/O port 0x201
WDT is reset upon
I/O read/write of I/O
port 0x201
WDT is not affected
by keyboard
interrupts
WDT is reset upon a
keyboard interrupt
WDT is not affected
by mouse interrupts
WDT is reset upon a
mouse interrupt
-----------------WDT interrupt
mapping disable
WDT interrupt
mapping to IRQ 1
Invalid
WDT interrupt
mapping to IRQ 3
WDT interrupt
mapping to IRQ 4
…
WDT interrupt
mapping to IRQ 15
SMCW f2 01
…
SMCW f2 ff
0xf3
(default = 00)
Bit [0] = 0
0xf3
Bit [0] = 1
0xf3
Bit [1] = 0
0xf3
Bit [1] = 1
0xf3
Bit [2] = 0
0xf3
Bit [2] = 1
0xf3
0xf3
bit [3] = reserved
bit [7..4] = 0
0xf3
bit [7..4] = 1
0xf3
0xf3
bit [7..4] = 2
bit [7..4] = 3
0xf3
bit [7..4] = 4
…
0xf3
…
bit [7..4] = f
SMCW f1 00
SMCW f3 x0
SMCW f3 x1
SMCW f3 x0
SMCW f3 x2
SMCW f3 x0
SMCW f3 x4
-----------------SMCW f3 0x
SMCW f3 1x
-----------------SMCW f3 3x
SMCW f3 4x
…
SMCW f3 fx
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Index-register
0xf4
(default = 00)
0xf4
0xf4
Data
Bit [0] = 0
Action
WD timer counting
Program
SMCR/W f3 x0
bit [0] = 1
bit [2] = 1
SMCR/W f3 x1
SMCR/W f3 x4
0xf4
0xe2
bit [1] , [7..3] = 0
0x8a
0xf6
bit [1] = 0
bit [0] , [7..2] =
dont care
WD timer occurred
forces time-out event
(self-clearing)
Reserved
hardware reset upon
WDT time-out
WDT has generated
a reset
----------------SMCW e2 8a
SMCR f6
Program example:
SMCW 07 08
SMCW f1 80
SMCW f2 1e
SMCW f3 02
SMCW e2 8a
(select functional group)
(timer unit in seconds)
(time-out in 30 timer units)
(WDT reset upon keyboard interrupt)
(hardware reset upon WDT time-out)
The status if the watchdog has generated a reset can be read through the register F6, Bit1
(Bit0 and Bit2-Bit7 are don’t care) of the Super I/O. A low level at this pin indicates that a
watchdog time-out has occurred and the watchdog has generated a reset.
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2 Hardware installation
The “Cool RoadRunner II” is delivered with a correct jumper setting for proper operation.
The customer must not change the default jumper settings. Improper jumper settings will
cause system instability or system hang-ups.
Warning!
The board must not be connected or disconnected to
PC/104 bus or PC/104Plus bus with power supply
switched ON!
2.1 Adapter cable set
With the optional available cable set standard PC devices can be easily connected to the
board. The adapter cable set comprises the following items:
-
adapter cable 3.5’’ power supply connector female to 5.25’’ power supply connector
male for supplying the board with a standard PC power supply
-
two adapter cables IDC10 female to DB9 male for serial port 1 and 2
-
adapter cable IDC26 female to DB25 female for parallel port
-
adapter cable IDC10 female to DB9 female plus adapter to SUB-D 15p. female for
standard VGA monitors
-
adapter cable IDC44 / 2mm female to IDC44 / 2mm female to connect 2.5’’ EIDE hard
disks
-
flat foil cable 26p. plus PCB adapter to 34p. female 2 row 2.54mm grid
The flat foil cable must be inserted in the FFC connector with the blank side on the top. Be
careful not to damage the little safety lever at the floppy connector.
2.2 BIOS
The “Cool RoadRunner II” is delivered with a standard PC BIOS. By default all setup settings are done to have a “ready to run” system, even without a BIOS setup backup battery.
If the user wants to change some settings, pressing the <DEL> key on power up can access the setup. The BIOS is located in a flash prom and can be easily updated on board
with software under DOS.
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All changes in the setup of the BIOS are stored in the CMOS RAM of the real time clock. A
copy of the CMOS RAM excluding date and time data is stored in the flash ROM. This
means that even if the backup battery runs out of power, the CMOS settings are not lost.
Only date and time will be set to a default value of. This battery is designed to last about
ten years in use. To store the board the battery should be disconnected.
The default values of the BIOS can be automatically loaded at boot time. Therefore the
key
“ 0 / INSERT ” on the num pad has to be pressed before the system is turned on. While
pressing this key and turning the system on, the default values will be loaded.
2.3 Software installation
For the “Cool RoadRunner II” are software drivers for Sound, Ethernet and graphic available. These drivers are delivered on request. For installation follow the instructions on the
driver disks.
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3 Connectors
Connector position refer to chapter 5.2 Mechanical specifications
3.1 Power connector pin definition
Connector type: 3.5” FDD Power connector
Signal name
+5 Volt
GND
Pin
1
3
Signal name
GND
+ 12 Volt
Pin
2
4
3.2 COM1 port connector pin definition
Connector type: IDC10 pin header 2.54 mm
Signal name
DCD
RXD
TXD
DTR
GND
Pin
1
3
5
7
9
Signal name
DSR
RTS
CTS
RI
+5 Volt
Pin
2
4
6
8
10
3.3 COM2 port connector pin definition
Connector type: IDC10 pin header 2.54 mm
Signal name
DCD
RXD
TXD
DTR
GND
Pin
1
3
5
7
9
Signal name
DSR
RTS
CTS
RI
+5 Volt
Pin
2
4
6
8
10
3.4 LPT1 port connector pin definition
Connector type: IDC26 pin header 2.54 mm
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Technical Manual PC/104-Plus “Cool RoadRunner II” Version 1.16
Signal name
Strobe
Data0
Data1
Data2
Data3
Data4
Data5
Data6
Data7
ACK
Busy
Paper End
Select
Pin
1
3
5
7
9
11
13
15
17
19
21
23
25
April 2004
Signal name
Auto LF
Error
Init
Select In
GND
GND
GND
GND
GND
GND
GND
GND
n.c.
Page 27 of 42
Pin
2
4
6
8
10
12
14
16
18
20
22
24
26
3.5 Keyboard connector pin definition
Connector type: IDC10 pin header 2.54 mm
Signal name
Speaker
Reset-In (PowerGood)
KB Data
GND
n.c.
Pin
1
3
5
7
9
Signal name
GND
n.c.
KB Clock
+5 Volt
Reset-In
Good)
Pin
2
4
6
8
(Power- 10
3.6 VGA connector pin definition
Connector type: IDC10 pin header 2.54 mm
Signal name
Red
Green
Blue
HSYNC
VSYNC
Pin
1
3
5
7
9
Signal name
GND
GND
GND
GND
n.c.
Pin
2
4
6
8
10
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3.7 10/100BaseT connector pin definition
Connector type: IDC10 pin header 2.54 mm
Signal name
TX+
RX+
PE
PE
n.c.
Pin
1
3
5
7
9
Signal name
TXPE
RXPE
n.c.
Pin
2
4
6
8
10
3.8 PS/2 Mouse / USB / IrDA / Audio connector pin definition
Connector type: IDC16 pin header 2.54 mm
Signal name
IRRX
MS Data
USBDT0+
USBDT1+
+5 Volt
Line In L
Line Out L
Microphone
Pin
1
3
5
7
9
11
13
15
Signal name
IRTX
MS Clock
USBDT0USBDT1GND
Line In R
Line Out R
GND Audio
Pin
2
4
6
8
10
12
14
16
3.9 EIDE connector pin definition
Connector type: IDC14 pin header 2.00 mm
Signal name
/Reset
Data7
Data6
Data5
Data4
Data3
Data2
Data1
Data0
GND
DRQ0
Pin
1
3
5
7
9
11
13
15
17
19
21
Signal name
GND
Data8
Data9
Data10
Data11
Data12
Data13
Data14
Data15
n.c.
GND
Pin
2
4
6
8
10
12
14
16
18
20
22
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Technical Manual PC/104-Plus “Cool RoadRunner II” Version 1.16
Signal name
Write
Read
Ready
DACK0
IRQ
Address1
Address0
CS1
LED
+5 Volt
GND
Pin
23
25
27
29
31
33
35
37
39
41
43
April 2004
Signal name
GND
GND
PU0
GND
/CS16
GND
Address2
CS3
GND
+5 Volt
n.c.
Page 29 of 42
Pin
24
26
28
30
32
34
36
38
40
42
44
3.10 Floppy connector pin definition
Connector type: FFC 26 pin 1.00 mm
Signal name
+5 Volt
+5 Volt
+5 Volt
n.c.
n.c.
n.c.
n.c.
GND
GND
GND
GND
GND
GND
Pin
1
3
5
7
9
11
13
15
17
19
21
23
25
Signal name
Index
Drive Select 0
Disk Change
n.c.
Motor On 0
Direction
Step
Write Data
Write Gate
Track 0
Write Protect
Read Data
Head Select
Pin
2
4
6
8
10
12
14
16
18
20
22
24
26
3.11 TV-OUT connector pin definition
Connector type: IDC 12-pin header 1.27 mm
Recommended cable connector: manufacturer: ERNI / Part no.: 103634
Signal name
CRMA
GND
LUMA
GND
COMP
Pin
1
3
5
7
9
Signal name
GND
GND
GND
GND
GND
Pin
2
4
6
8
10
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Technical Manual PC/104-Plus “Cool RoadRunner II” Version 1.16
Signal name
GND
Pin
11
April 2004
Signal name
GND
Page 30 of 42
Pin
12
3.12 Flat Panel connector pin definition
Connector type: IDC 50-pin header 1.27 mm
Recommended cable connector: manufacturer: ERNI / Part no.: 103632
Signal name
FLM
SHFCLK
GND
P1
P3
P4
P6
GND
P9
P11
P12
P14
GND
P17
P19
P20
P22
GND
VDD-SRC
VBKL-SRC
ENAVEE
+12 Volt (PC/104
Bus)
+ 3.3 Volt/max.
500mA
Panel Select PS0
Panel Select PS2
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
Pin
Signal name
LP
M
P0
P2
GND
P5
P7
P8
P10
GND
P13
P15
P16
P18
GND
P21
P23
SW-VDD
SW-VBKL
ENABKL
GND
+5 Volt (PC/104 Bus)
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
Pin
45
GND
46
47
49
Panel Select PS1
Panel Select PS3
48
50
Note: The 3,3 Volt is generated by the on board power supply
from the 5 Volt supply voltage of the board. This 3,3 Volt
must be not used to supply connected displays with high
power consumption.
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3.13 PC/104-Plus bus pin definition
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
A
GND
VI/O
AD05
C/BE0
GND
AD11
AD14
+3.3 Volt
SERR
GND
STOP
+3.3 Volt
FRAME
GND
AD18
AD21
+3.3 Volt
IDSEL0
AD24
GND
AD29
+5 Volt
REQ0
GND
GNT1
+5 Volt
CLK2
GND
+12 Volt
-12 Volt
B
Reserved
AD02
GND
AD07
AD09
VI/O
AD13
C/BE1
GND
PERR
+3.3 Volt
TRDY
GND
AD16
+3.3 Volt
AD20
AD23
GND
C/BE3
AD26
+5 Volt
AD30
GND
REQ2
VI/O
CLK0
+5 Volt
INTD
INTA
Reserved
C
+5 Volt
AD01
AD04
GND
AD08
AD10
GND
AD15
SB0
+3.3 Volt
LOCK
GND
IRDY
+3.3 Volt
AD17
GND
AD22
IDSEL
VI/O
AD25
AD28
GND
REQ1
+5 Volt
GNT2
GND
CLK3
+5 Volt
INTB
Reserved
D
AD00
+5 Volt
AD03
AD06
GND
M66EN
AD12
+3.3 Volt
PAR
SDONE
GND
DEVSEL
+3.3 Volt
C/BE2
GND
AD19
+3.3 Volt
IDSEL2
IDSEL3
GND
AD27
AD31
VI/O
GNT0
GND
CKL1
GND
RST
INTC
GND
All VIO pins are connected to 3.3 Volt by default.
-12 Volt is not supported on this board.
© LIPPERT Automationstechnik GmbH • Hans-Thoma-Str. 11 • 68163 Mannheim • Tel: 0621/43214-0 • Fax: 0621/43214-30
Technical Manual PC/104-Plus “Cool RoadRunner II” Version 1.16
April 2004
Page 32 of 42
3.14 PC/104 bus pin definition
Pin
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
D
GND
MEMCS16
IOCS16
IRQ10
IRQ11
IRQ12
IRQ13
IRQ14
DACK0
DRQ0
DACK5
DRQ5
DACK6
DRQ6
DACK7
DRQ7
+5 Volt
MASTER
GND
GND
C
GND
SBHE
LA23
LA22
LA21
LA20
LA19
LA18
LA17
MEMR
MEMW
SD8
SD9
SD10
SD11
SD12
SD13
SD14
SD15
GND
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
A
IOCHCK
D7
D6
D5
D4
D3
D2
D1
D0
IOCHRDY
AEN
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
GND
B
GND
RSTDRV
+5 Volt
IRQ9
-5 Volt
DRQ2
-12 Volt
ENDXFR
+12 Volt
GND / KEY
SMEMW
SMEMR
IOW
IOR
DACK3
DRQ3
DACK1
DRQ1
REFRESH
SYSCLK
IRQ7
IRQ6
IRQ5
IRQ4
IRQ3
DACK2
TC
BALE
+5 Volt
OSC
GND
GND
-5 Volt and –12 Volt are not supported on this board.
© LIPPERT Automationstechnik GmbH • Hans-Thoma-Str. 11 • 68163 Mannheim • Tel: 0621/43214-0 • Fax: 0621/43214-30
Technical Manual PC/104-Plus “Cool RoadRunner II” Version 1.16
April 2004
Page 33 of 42
3.15 Video Input Port
Connector type: FFC 40 pin 0.50 mm
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Signal
GND
CT-VID-VP0
GND
CT-VID-VP1
GND
CT-VID-VP2
GND
CT-VID-VP3
GND
CT-VID-VP4
GND
CT-VID-VP5
GND
CT-VID-VP6
GND
CT-VID-VP7
GND
CT-VID-VP8
GND
CT-VID-VP9
Pin
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Signal
GND
CT-VID-VP10
GND
CT-VID-VP11
GND
CT-VID-VP12
GND
CT-VID-VP13
GND
CT-VID-VP14
GND
CT-VID-VP15
GND
CT-VID-HREF
GND
CT-VID- VREF
GND
CT-VID-VCLK
GND
CT-VID-PCLK
© LIPPERT Automationstechnik GmbH • Hans-Thoma-Str. 11 • 68163 Mannheim • Tel: 0621/43214-0 • Fax: 0621/43214-30
Technical Manual PC/104-Plus “Cool RoadRunner II” Version 1.16
April 2004
Page 34 of 42
4 Motherboard software specifications
4.1 System address map
This section describes the mapping of the CPU memory and I/O address spaces. Also
covered in this section are the PCI configuration space mapping.
Memory address map
Address Range
(Dec)
1024K - 16384K
896K - 1024K
812K - 895K
768K - 811K
736K - 768K
704K - 736K
640K - 704K
0K - 640K
Address Range
(Hex)
100000 - FFFFFF
E0000 FFFFF
CB000 - DFFFF
C0000 - CAFFF
B8000 - BFFFF
B0000 B7FFF
A0000 - AFFFF
0 9FFFF
Size
15360K
128K
88K
44K
32K
32K
64K
640K
Description
Extended Memory
System BIOS
unused
Graphics BIOS
Monochrome Text Memory
Color Text Memory
Graphic Memory
Conventional Memory
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Technical Manual PC/104-Plus “Cool RoadRunner II” Version 1.16
April 2004
Page 35 of 42
I/O address map
The system chip set implements a number of registers in I/O address space. These registers occupy the following map in the I/O space (depending on enabled or disabled functions in the BIOS, other or more resources may be used).
Address Range (Hex)
0000 – 000F
0020 – 0021
0022 – 0023
0040 – 0043
0060
0061
0064
0070, bit 7
0070, bit6:0
0078
0079
0080 – 008F
00A0 – 00A1
00C0 – 00DE
00F0
0102
0170 – 0177
01F0 – 01F7
0201
0278 – 027B
02F8 – 02FF
0378 – 037F
03B4, 03B5, 03BA
03D4, 03D5, 03DA
03C0 – 03CF
03F0 – 03F5
03F6
03F7 (Write)
03F7, bit 7
03F7, bits 6:0
03F8 – 03FF
0481 – 0483
0CF8
0CFC – 0CFF
046E8
C000 – C0FF
Size
16 bytes
2 bytes
2 bytes
4 bytes
1 bytes
1 byte
1 byte
1 bit
7 bits
1 byte
1 byte
16 bytes
2 bytes
31 bytes
1 byte
1 byte
8 bytes
8 bytes
1 byte
4 bytes
8 bytes
8 bytes
3 bytes
3 bytes
16 bytes
6 bytes
1 byte
1 byte
1 bit
7 bits
8 bytes
3 bytes
1 byte
8 bytes
1 byte
256 bytes
Description
DMA Controller 1 (8237)
Interrupt Controller 1 (8259)
ST486 Specific Registers
Timer Controller (8254)
Keyboard Controller Data Byte
NMI, Speaker Control
Keyboard Controller, CMD,STAT Byte
Enable
Real Time Clock Address
Internally used
Watchdog
DMA Page Registers
Interrupt Controller 2 (8259)
DMA Controller 1 (8237)
Reset Numeric Error
VGA Setup Register
Secondary IDE Channel
Primary IDE Channel
Super I/O
Parallel Port 2 (Bidir)
Serial Port 2
Parallel Port 1
VGA Registers
VGA Registers
VGA Registers
Floppy Controller Registers
IDE Command Port
Floppy Command Port
Floppy Disk Change
IDE Status Port
Serial Port 2
DMA high page registers, used by the chipset
PCI Configuration Address Register
PCI Configuration Data Registers
VGA Add-in mode enable Register
PCI Configuration Registers
© LIPPERT Automationstechnik GmbH • Hans-Thoma-Str. 11 • 68163 Mannheim • Tel: 0621/43214-0 • Fax: 0621/43214-30
Technical Manual PC/104-Plus “Cool RoadRunner II” Version 1.16
April 2004
Page 36 of 42
4.2 Interrupts and DMA channels
Interrupts
IRQ
NMI
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
System Resource
Parity Error
Timer
Keyboard
Interrupt Controller 2
Serial Port 2
Serial Port 1
available (PC/104 or -Plus)
Floppy
Parallel Port 1
Real Time Clock
available (PC/104 or -Plus)
available (PC/104 or -Plus)
Ethernet Controller
PS/2 Mouse
Math coprocessor
EIDE
EIDE, if the Secondary IDE controller is disabled in BIOS setup, IRQ15 can be used on
the PC/104 or -Plus bus.
DMA channels
DMA
0
1
2
3
4
5
6
7
data
width
8 bits
8 bits
8 bits
8 bits
16 bits
16 bits
16 bits
System Resource
available
available
Floppy
Parallel Port
Reserved, Cascade Channel
IDE Controller
available
available
Note: Depending on enabled or disabled functions in the BIOS, other or more resources
may be used
© LIPPERT Automationstechnik GmbH • Hans-Thoma-Str. 11 • 68163 Mannheim • Tel: 0621/43214-0 • Fax: 0621/43214-30
Technical Manual PC/104-Plus “Cool RoadRunner II” Version 1.16
April 2004
Page 37 of 42
5 Technical characteristics
5.1 Electrical specifications
Supply voltage:
+5 Volt
Supply voltage ripple:
±5 %
Supply current:
depending on CPU frequency
approx. 1.2 A at 166 MHz (CPU GXLV 2,2V)
approx. 0.8 A at 200 MHz (CPU GX1 1,6V)
approx. 1.5 A at 233 MHz (CPU GXLV 2,5V)
approx. 1.1 at 300 MHz
BIOS setup backup battery:
(CPU GX1 2,0V)
2.8 Volt / 49 mAh
5.2 Environment specifications
Temperature range:
-20°..+60°C (optional –40°..+85 °C)
Storage temperature:
-40°..+70°C
Temperature change:
max. 10K / 30 minutes
Humidity (relative):
10..90 %
Pressure:
450..1100 hPa
© LIPPERT Automationstechnik GmbH • Hans-Thoma-Str. 11 • 68163 Mannheim • Tel: 0621/43214-0 • Fax: 0621/43214-30
Technical Manual PC/104-Plus “Cool RoadRunner II” Version 1.16
April 2004
Page 38 of 42
5.3 Mechanical specification
Dimensions (LxW) :
95.9mm x 115.6mm
(including I/O extension)
Height :
15mm
Weight :
140g
(including Battery and 32Mbyte RAM Module)
Mechanical dimensions :
Top side :
© LIPPERT Automationstechnik GmbH • Hans-Thoma-Str. 11 • 68163 Mannheim • Tel: 0621/43214-0 • Fax: 0621/43214-30
Technical Manual PC/104-Plus “Cool RoadRunner II” Version 1.16
April 2004
Page 39 of 42
Bottom side :
© LIPPERT Automationstechnik GmbH • Hans-Thoma-Str. 11 • 68163 Mannheim • Tel: 0621/43214-0 • Fax: 0621/43214-30
Technical Manual PC/104-Plus “Cool RoadRunner II” Version 1.16
April 2004
Page 40 of 42
Self-stacking system (standard) :
Customized system :
© LIPPERT Automationstechnik GmbH • Hans-Thoma-Str. 11 • 68163 Mannheim • Tel: 0621/43214-0 • Fax: 0621/43214-30
Technical Manual PC/104-Plus “Cool RoadRunner II” Version 1.16
April 2004
Page 41 of 42
6 Options
•
Graphic driver software
•
Ethernet driver software
•
Sound driver software
•
Compact flash cards
•
Adapter cable set (including standard PC connectors for COM 1 and 2, LPT, Keyboard,
flat foil cable adapter for 3,5” Floppy, VGA adapter cable, cable for 2,5’’ hard disk
drives and Power supply)
•
Adapter cable for Ethernet, Sound, USB, PS/2 Mouse
© LIPPERT Automationstechnik GmbH • Hans-Thoma-Str. 11 • 68163 Mannheim • Tel: 0621/43214-0 • Fax: 0621/43214-30
Technical Manual PC/104-Plus “Cool RoadRunner II” Version 1.16
April 2004
Page 42 of 42
7 History
File name
Date
Edited by
Changes
RoRa2.doc
11/21/99 A. Glos
created
TME-104P-CRR2-R1V0.doc
07/02/00 R. Arnold
edited
TME-104P-CRR2-R1V1.doc
12/05/00 M. Fellhauer
edited
TME-104P-CRR2-R1V2.doc
19/05/00 M. Fellhauer
edited
TME-104P-CRR2-R1V3.doc
10/07/00 M. Fellhauer
edited TV-OUT
TME-104P-CRR2-R1V4.doc
20/07/00 M. Fellhauer
edited Display-List
TME-104P-CRR2-R1V5.doc
18/09/00 C.Lehrmann
New dimension top-layer
TME-104P-CRR2-R1V6.doc
18/09/00 M. Fellhauer
Edited Long Time Watchdog
TME-104P-CRR2-R1V7.doc
30/04/01 M. Fellhauer
Edited Long Time Watchdog
TME-104P-CRR2-R1V8.doc
06/07/01 M. Fellhauer
added video input port
TME-104P-CRR2-R1V9.doc
20/08/01 M. Fellhauer
New dimension drawings
TME-104P-CRR2-R1V10.doc
29/11/01 P.Kannegießer
- General formatting
- correct PCI bus clock
TME-104P-CRR2-R1V11.doc
07/06/02 P.Kannegießer
- SDRAM from 32…256MB
- PanelLink is no longer
recommended
TME-104P-CRR2-R1V12.doc
13/09/02 P.Kannegießer
Enhance I/O address map
TME-104P-CRR2-R1V13.doc
22/01/03 M.Fellhauer
- mounting note added
- picture on front page added
TME-104P-CRR2-R1V14.doc
03-07-30 P.Kannegießer
PanelLink removed
TME-104P-CRR2-R1V15.doc
03-08-28 P.Kannegießer
Extended temperature range
corrected
TME-104P-CRR2-R1V16.doc
04-04-19 P.Kannegießer
SDRAM up to 512 MB supported
© LIPPERT Automationstechnik GmbH • Hans-Thoma-Str. 11 • 68163 Mannheim • Tel: 0621/43214-0 • Fax: 0621/43214-30

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