The Evolving NAND Flash Business Model for SSD

A Look Under the Hood at Some Unique
SSD Features
Jeremy Werner
Director, Marketing
SandForce, Inc.
Flash Memory Summit 2010
Santa Clara, CA
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Overview
• Firmware Design must consider key SSD
attributes
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Performance
Reliability
Endurance
Power Consumption
Security and Integrity
Flexibility
Flash Memory Summit 2010
Santa Clara, CA
2
Native Command Queuing (NCQ)
• SATA NCQ supports sending up to 32
commands to SSD prior to completion
• Supporting NCQ can significantly improve
random read and write performance
• Firmware must be able mange the queue
• Service commands strategically out of order
to achieve greatest performance
• Queued commands complicate
error handling
Flash Memory Summit 2010
Santa Clara, CA
3
Make Flash your Bottleneck
• Flash parallelism is a major factor in SSD
performance
• Multi-plane – allows programming more than
one Flash plane at a time
• Multi-LUN – allows programming/reading
from more than one die per CE
• Goal – Keep all dies active at all times
Flash Memory Summit 2010
Santa Clara, CA
4
Recycling/Garbage Collection
• The process of moving data in flash to create
empty blocks to write to
• Steals Flash bandwidth from the host
• Efficient Recycling is a MUST
• Support TRIM to reduce the amount of data which must be moved
• Choose your blocks wisely
• Block picking algorithms
must factor free space and
factor cycle counts for
Wear leveling
Flash Memory Summit 2010
Santa Clara, CA
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Enhancing the Media
• Low cost (MLC/TLC) is optimized for
consumer applications (USB, card, MP3)
• Just enough Spare area per page to meet these
requirements
• SSDs need more ECC for lower UBER (10-17)
• Up to 80bit/1KByte for 20nm class NAND
Conventional Error Correction:
Stores ECC in spare field
NAND Page
Spare
ECC
Adaptive Error Correction:
Stores ECC in spare field and
uses some of the NAND page
NAND Page
Spare
ECC
Flash Memory Summit 2010
Santa Clara, CA
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Advanced Error Recovery
• Advanced Error Recovery Techniques are needed
• Ability to recover completely lost sectors, pages, blocks
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SandForce supports RAISE™
• Handle error recovery and notification
• Rewrite recovered data
• May need to overprovision to enable extra reliability
Flash Memory Summit 2010
Santa Clara, CA
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End-to-End Protection
• End-to-End Cyclic Redundancy Check (CRC) must
be supported for Enterprise SSDs
• Manage the remainder
• Error handling
Write LBA
Buffer
Mgr
CRC
Gen
SATA
Flash
Buffer
ECC
CRC
Check
End-to-end Protection
Read LBA
Flash Memory Summit 2010
Santa Clara, CA
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Read Disturb Management
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Read Disturb is a growing source of flash errors
Must track reads to blocks efficiently
Must move data when a block is read too often
Beginning of life and End of life
behaviors differ greatly
• 100K Æ 10K Æ ? Reads
• Page and Block sizes
increasing
• More Data to move means
increased WA and overhead
Flash Memory Summit 2010
Santa Clara, CA
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Designing FW for Endurance
• Write Amplification can extend Flash life or kill it!
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Page Based vs. Block Based Volume Manager
DuraWrite™ SandForce Write Reduction Technology
TRIM
Background Garbage Collection
Flash Memory Summit 2010
Santa Clara, CA
10
Life Curve Throttling
• Some users may want to guarantee flash
usage will meet a calendar duration
• FW can limit writes if drive is used too heavily
Flash Memory Summit 2010
Santa Clara, CA
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Designing FW for Power
Consumption
• SSDs must fit within their power envelope
• Designing an SSD without DRAM helps but
complicates FW
• Must meet all requirements with limited volatile
memory
• Means Mapping algorithms must be outstanding
• 2 possible limiting factors
• Peak Power (3W-25W)
• Thermal Dissipation (Varies Greatly)
Flash Memory Summit 2010
Santa Clara, CA
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Basic Power Management
• State based power Management Techniques
• Serial ATA Power Management
• Active, Idle, Standby, Sleep
• PUIS – Power Up in Standby
• PHY Power Management
• Generally these:
• reduce power consumption
• increase wake-up latency
Flash Memory Summit 2010
Santa Clara, CA
13
Controlling Peak Power
• Two main contributors to power
consumption: Flash and Processor
• To control max power limit the number
of active Flash die
• Different applications have different
requirements
• SATA – 2 to 5W typical
• SAS - 9W typical
• PCIe - 25W typical
Flash Power
Processor
Power
• Give the power to the customer!
Flash Memory Summit 2010
Santa Clara, CA
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Temperature Management
• Monitor surface temperature
with onboard sensors
• Allow maximum performance in
typical conditions
• Manipulate behavior under
extreme temperatures
Flash Memory Summit 2010
Santa Clara, CA
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Secure User’s Data
• Use encryption to ensure confidentiality
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Not all encryption methods are created equally
SW often uses Electronic Codebook (ECB) mode
SW encryption has a high cycle overhead vs. HW
SW must manage keys that HW uses securely
Original
• Destroy User Data
• Secure Erase
• Sanitize
Encrypted using ECB mode
• Multiple Standards to Implement
• ATA Security, TCG Opal/Enterprise, IEEE 1667
• TCG Enterprise Requires multiple user bands
• Industry wide collaboration is critical
• Ecosystem must work together
Flash Memory Summit 2010
Santa Clara, CA
Other modes than ECB results in
pseudo-randomness
Source: Wikipedia
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Protect User’s Data
• Guaranteeing data integrity is
difficult
• MLC much harder than SLC
• Lower Page Corruption is little
known issue
Source: Electronic Design: MLC Challenges Mobile-Entry Barriers
• Absolutely Required in Enterprise applications
• Previously written data
• Data in flight
• Use supercap to protect against sudden power loss
• Designing for no DRAM is an important element
• Monitor supercap health to ensure capability
Flash Memory Summit 2010
Santa Clara, CA
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Mapping Strategies for Integrity
and Availability
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Full Map resident in Flash – Best Approach
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Must end there eventually
Easier power failure recovery techniques
Very Complex Algorithms
Cache full map in DRAM
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More costly and power intensive
Difficult to power fail
ECC on DRAM components is not typical
Easier lookup and algorithm design
Cache partial map in DRAM
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Similar to full map with better cost and power but more complex algorithms
Onload to Host CPU and DRAM
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Custom Drivers, every OS and even HW is unique driver
Resource intensive on host
Very long recovery times after power failure
Flash Memory Summit 2010
Santa Clara, CA
18
Design for Media Flexibility
• Support for many flash devices is critical
• Component availability fluctuates greatly
• Every NAND is different
• Makes software complex to design and qualify!
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Page/Block size
Page/Block count
Spare Area
Planes
Commands
Interfaces
Reliability characteristics
Multi-LUN support
Performance/Response Times
Etc. etc. etc.
Flash Memory Summit 2010
Santa Clara, CA
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Design for Manufacturing Flexibility
• SSD vendors differentiate by
optimizing for different markets
• Achieved through
Manufacturing time
customizations
• Ideal settings vary across
applications
• Firmware must be flexible to
provide support
Flash Memory Summit 2010
Santa Clara, CA
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Wrap Up
Putting it all together is what makes it great!
Flash Memory Summit 2010
Santa Clara, CA
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SSD Related Standards Bodies
– Flash standards, Form Factors, Rel. + End.
– Flash standards
– SATA Standards
– PCIe Standards
– SSD Performance Testing
Contact Andy Tomlin – atomlin@SandForce.com
Contact Jeremy Werner – jwerner@SandForce.com
Flash Memory Summit 2010
Santa Clara, CA
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SandForce SSD Processors
World-class reliability, performance, & power efficiency for
enterprise, client, and industrial SSD applications
ƒVisit us at booth #407 to see our DuraClass™ technology in action
with the latest 30nm MLC flash technology
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MO297 – Ultra compact high-density industrial standard SATA form factor
with up to 30K read/write IOPS* per watt
PCIe – Industry leading IOPS* for read, write, and mixed workloads
SAS – 25K sustained write IOPS* through Emulex’s high-performance SASSATA embedded storage bridge technology
SATA – Updates on SSDs, testing, and infrastructure equipment collaboration
•Stop by to enter our free drawing for one of three Corsair Force
120GB SandForce Driven SSDs
•See other SandForce Driven SSDs in our partners’ booths as well
*Random 4K transfers
Flash Memory Summit 2010
Santa Clara, CA
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