FM801-AU
F
FM801-AU
PCI Audio Controller
ortéMedia
The ForteMedia FM801-AU is designed to
suit the most cost-effective, practical, PCI
Audio solution for both desktop computer
and notebook computer. It integrates the
essential features of today’s gaming
requirements without compromising the
PC98 criterion for audio quality. FM801-AU
integrates the PCI 2.2 bus master controller,
music synthesis, SoundBlaster Pro Engine,
sampling rate converter, digital mixer,
CODEC interface, game ports, I2S ports and
S/PDIF port. The FM801 solution leverages
its simple but effective hardware/software
architecture and the uprising HSP (hostbased signal processing) support on Direct
Sound, WaveTable and Direct 3D positional
audio, and is therefore the most practical
PCI audio solution. The CODEC interface
is fully compliant to AC-97 ver.2.1 and is
capable of supporting multiple speakers for
either docking application or merely a PC
theater set up for gaming and audio
enjoyment. With its 3.3 volts operating
voltage, ACPI power management, PME
and PCI clock-run supports, plus a small
100-pin PQFP package size, the FM801
surely is the right choice for today’s PCI
audio solution.
Audio Features
•
•
•
•
•
•
•
•
•
•
•
Proprietary Logic for Real DOS SoundBlaster
Pro games support
Hardware Synthesizer for AdLib and General
MIDI compatibility
Optional QSound HSP dynamic 3-D positional
audio support
Variable Rate SRC(sampling rate converter) support
AC-97 2.1 compliance
Multiple speakers, 2/4/6 channels support
Hardware push button volume control
(up/down/mute)
Dual game ports support; MPU-401 and I2S port
S/PDIF Digital input
S/PDIF AC-3 raw data output support
18 bits Audio CODEC support
PCI and Others
•
•
•
•
•
•
•
3.3 V operating voltage with 5V tolerance
PCI v.2.2 compliance with bus master and
scatter-and-gather capability
Proprietary Legacy mode, DDMA, Serial IRQ,
and PC/PCI support
Four GPIO (General Purpose I/O) pins
ACPI and PCI CLKRUN power management
DOS,Win95,98,NT,WDM,Linux,OSS drivers
100 pin PQFP package, 14 x 14 x 1.4 mm
FM801 Typical Add-On Card Application
Rev. 2.0
May 00
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 1
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FM801-AU
ortéMedia
PCI Audio Controller
ARCHITECTURE ..................................................................................................................... 5
PCI INTERFACE ......................................................................................................................... 6
PC/PCI................................................................................................................................. 6
FM SYNTHESIZER...................................................................................................................... 6
LEGACY DOS GAME ENGINE, MIDI PORT AND GAME PORT ....................................................... 6
Legacy DOS Game Engine ................................................................................................... 6
MIDI Port............................................................................................................................. 6
Game Port ............................................................................................................................ 7
PERIPHERAL INTERFACES ........................................................................................................... 7
I2S (Enhanced) ..................................................................................................................... 7
S/PDIF Digital Input ............................................................................................................ 7
S/PDIF AC-3 Raw Data Output Support ............................................................................... 7
Shared I/O Interfaces............................................................................................................ 7
AC97 INTERFACE, SRC AND DIGITAL MIXING ........................................................................... 8
AC97 Interface ..................................................................................................................... 8
SRC and Digital Mixing........................................................................................................ 9
FM801-AU PIN-OUT ............................................................................................................... 11
100 PIN QFP PIN DIAGRAM ...................................................................................................... 11
FM801-AU I/O PINS DESCRIPTIONS ........................................................................................ 12
PINS DESCRIPTION IN DETAIL:.................................................................................................. 15
PCI Interface...................................................................................................................... 15
AC97 Interface ................................................................................................................... 16
I2S and S/PDIF IF .............................................................................................................. 16
Peripheral Interface ........................................................................................................... 16
Miscellaneous IO Pins ........................................................................................................ 17
Power and Ground.............................................................................................................. 17
Strap Selection Option........................................................................................................ 17
FM801-AU PCI CONFIGURATION REGISTERS................................................................ 18
FM801-AU PCI AUDIO DEVICE CONFIGURATION REGISTERS SUMMARY TABLE ........................ 18
FM801-AU PCI AUDIO DEVICE CONFIG. REGISTERS DETAILED DESCRIPTION ........................... 19
Vendor ID Register ( R ) ..................................................................................................... 19
Device ID Register ( R )...................................................................................................... 19
PCI Command Register ( R/W ) .......................................................................................... 19
PCI Status Register ( R /W)................................................................................................. 20
Revision ID Register ( R ) ................................................................................................... 20
Programming Interface Register of Class Code ( R )........................................................... 20
Sub-class code Register of Class Code ( R )........................................................................ 20
Base-class Code Register of Class Code ( R ) ..................................................................... 21
Latency Timer Register ( R/W )........................................................................................... 21
Header Type Register ( R ) ................................................................................................. 21
Base Address Register ( R/W ) ............................................................................................ 21
Subsystem Vendor ID ( R ) .................................................................................................. 22
Subsystem ID ( R ) .............................................................................................................. 22
Capabilities Pointer ( R ).................................................................................................... 22
Interrupt Line Register ( R/W )............................................................................................ 22
Rev. 2.0
Page 2
FM801-AU DataSheet
May 00
ForteMedia, Inc. San Jose, CA
F
FM801-AU
ortéMedia
PCI Audio Controller
Interrupt Pin Register ( R ) ................................................................................................. 22
Min Grant Period for PCI burst ( R ) .................................................................................. 23
Max Latency for PCI Grant( R ).......................................................................................... 23
Legacy Audio Control Register ( R/W ) ............................................................................... 23
Vendor ID Writeable Register ( R/W )................................................................................. 23
Device ID Writeable Register ( R/W ) ................................................................................. 24
Subsystem Vendor ID Writeable Register ( R/W )................................................................ 24
Subsystem ID Writeable Register ( R/W ) ............................................................................ 24
Capabilities ID ( R ) ........................................................................................................... 24
Next Item Pointer ( R )........................................................................................................ 24
Power Management Capabilities ( R )................................................................................. 25
Power Management Control/Status ( R/W )......................................................................... 25
FM801-AU PCI GAMEPORT DEVICE CONFIG. REGISTERS SUMMARY TABLE ............................. 26
FM801-AU PCI GAMEPORT DEVICE CONFIG. REGISTERS DETAILED DESCRIPTION ................... 27
Vendor ID Register ( R ) ..................................................................................................... 27
Device ID Register ( R )...................................................................................................... 27
PCI Command Register ( R/W ) .......................................................................................... 27
PCI Status Register ( R /W)................................................................................................. 28
Revision ID Register ( R ) ................................................................................................... 28
Programming Interface Register of Class Code ( R )........................................................... 28
Sub-class code Register of Class Code ( R )........................................................................ 28
Base-class Code Register of Class Code ( R ) ..................................................................... 29
Latency Timer Register ( R/W )........................................................................................... 29
Header Type Register ( R ) ................................................................................................. 29
Base Address Register ( R/W ) ............................................................................................ 29
Subsystem Vendor ID ( R ) .................................................................................................. 30
Subsystem ID ( R ) .............................................................................................................. 30
Capabilities Pointer ( R ).................................................................................................... 30
Interrupt Line Register ( R/W )............................................................................................ 30
Interrupt Pin Register ( R ) ................................................................................................. 30
Min Grant Period for PCI burst ( R ) .................................................................................. 30
Max Latency for PCI Grant( R ).......................................................................................... 31
Legacy Audio Control Register ( R ) ................................................................................... 31
Vendor ID Writeable Register ( R/W )................................................................................. 31
Device ID Writeable Register ( R/W ) ................................................................................. 31
Subsystem Vendor ID Writeable Register ( R/W ) ................................................................ 32
Subsystem ID Writeable Register ( R/W ) ............................................................................ 32
Capabilities ID ( R ) ........................................................................................................... 32
Next Item Pointer ( R )........................................................................................................ 32
Power Management Capabilities ( R )................................................................................. 32
Power Management Control/Status ( R/W )......................................................................... 33
FM801-AU PCI CONTROL REGISTERS.............................................................................. 34
FM801-AU AUDIO DEVICE CONTROL REGISTERS SUMMARY TABLE ......................................... 34
FM801-AU AUDIO DEVICE CONTROL REGISTERS DETAILED DESCRIPTION ................................ 35
PCM Out Volume................................................................................................................ 35
FM Out Volume .................................................................................................................. 35
I2S Volume ......................................................................................................................... 35
Digital Recording Source Select ......................................................................................... 36
Playback Channel Control.................................................................................................. 36
Rev. 2.0
Page 3
FM801-AU DataSheet
May 00
ForteMedia, Inc. San Jose, CA
F
FM801-AU
ortéMedia
PCI Audio Controller
Playback Channel Data Length/Current Count................................................................... 36
Playback Channel Buffer I System Starting Address ........................................................... 37
Playback Channel Buffer II System Starting Address .......................................................... 37
Capture Channel Control ................................................................................................... 37
Capture Channel Data Length/Current Count..................................................................... 38
Capture Channel Buffer I System Starting Address ............................................................. 38
Capture Channel Buffer II System Starting Address............................................................ 38
Codec Control .................................................................................................................... 39
I2S Mode / SPDIF Control.................................................................................................. 39
Volume Up/Dn/Mute Status & Volume Counter Enable....................................................... 39
I2C Control ........................................................................................................................ 40
Codec Index Register Command Port ................................................................................. 40
Codec Index Register Data Port ......................................................................................... 40
MPU401 Data Port............................................................................................................. 40
MPU401 Command/Status Port .......................................................................................... 41
General Purpose I/O Control.............................................................................................. 41
FM801-AU Blocks Power Down Control............................................................................. 41
FM801-AU GAMEPORT DEVICE CONTROL REGISTERS SUMMARY TABLE .................................. 42
FM801-AU GAMEPORT DEVICE CONTROL REGISTERS DETAILED DESCRIPTION......................... 42
Conventional Game Port .................................................................................................... 42
Game Port J1-X Counter .................................................................................................... 42
Game Port J1-Y Counter..................................................................................................... 43
Game Port J2-X Counter .................................................................................................... 43
Game Port J2-Y Counter..................................................................................................... 43
Game Port Control ............................................................................................................. 43
TIMING REQUIREMENT ..................................................................................................... 45
PCI TIMING REQUIREMENT ...................................................................................................... 45
I2S TIMING (I/O OPERATION)............................................................................................ 47
AC-LINK TIMING .................................................................................................................. 47
ABSOLUTE MAXIMUM RATINGS...................................................................................... 48
ELECTRICAL CHARACTERISTICS.................................................................................... 49
AC-LINK SIGNALS DC CHARACTERISTIC.................................................................................. 49
ELECTRICAL CHARACTERISTICS FOR 3V POWER SUPPLY ......................................... 49
PACKAGING DIMENSIONS ................................................................................................. 50
Rev. 2.0
May 00
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 4
F
FM801-AU
PCI Audio Controller
ortéMedia
Architecture
FM801-AU is a cost effective, highly integrated PCI audio controller for today’s
high performance multimedia PC audio requirements. Based on ForteMedia’s own
proprietary DOS game interface, hardware MIDI synthesis engine and high
bandwidth PCI interface, FM801-AU supports games under both Microsoft
Windows and DOS environments without compatibility issues. With its low cost
structure and support high sound quality AC97 architecture along with the assured
game compatibility, the FM801-AU is the desired PCI audio solution. FM801-AU
can be physically partitioned into the following functional blocks:
•
•
•
•
•
PCI Interface
FM synthesizer
Legacy DOS Game Engine, MIDI Port and Game Port
Peripheral Interfaces (I2S, VOL, GPIOs and SPDIF, EEPROM)
AC97 CODEC Interface, SRC and Digital Mixing
FM801-AU Block Diagram
PCI Bus
PME
PC/PCI
PCI
Slave
FM
Synthesizer
PCI
Bus
Master
AC97
I/F
Sample
Rate
Converter
DOS Game
Legacy
Engine
MIDI I/F
&
Game Port
I2S
&
S/PDIF
I2S
MIDI/GamePort
Rev. 2.0
May 00
AC-Link
Digital
Mixer
S/PDIF In/Out
GPIO/VOL
EEPROM
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 5
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FM801-AU
ortéMedia
PCI Audio Controller
PCI Interface
The PCI Interface is designed per specification of PCI rev.2.2 with scatter and gather capability, it
provides the interface to the 33MHz, 32-bit PCI bus with the ability to support PCI configuration
(PCI Plug & Play), PCI slave I/O cycles and PCI bus master memory read/write cycles. It interfaces
to all the internal blocks, serving as the gate to the system. This block can be further partitioned
into 3 sub-blocks, DMA Controller, PCI slave IF and PCI master IF. PCI slave IF handles the PCI
configuration and also translates the PCI I/O cycles to internal I/O cycles. Moreover, this sub-block
is also the center of power controlling to the whole chip. PCI master IF mainly interfaces to the
Streaming Engine and internal DMAC, providing the scheme of system memory access or DMA
emulation to the SB Engine. It contains 2 sets of Ping-Pong buffer(16bytesX2) for playback and
capture. DMA Controller will provide the functionality of ISA DMA Controller, thus resolving the
legacy Audio issues on PCI bus. It also provides the address when PCI bus master is activated. It
also provides the Plug-and-Play (PnP) compatibility with the Intel/Microsoft PnP specification. It
support PCI interrupts and DMA channels, and allows the PC to automatically configure it into the
system upon power up
PC/PCI
PC/PCI is a mechanism that was defined and developed by Intel's Mobile/Handheld Products Group
(MHPG) as a mobile docking solution which allows ISA slots to exist in docking stations connected
to the notebook's PCI bus. This scheme is now being applied to the desktop PC as well. By
providing a new arbitration construct, consisting of a serialization protocol for encoding and
decoding DMA requests/grants, a request/grant pair, distinct from the PCI bus pair, is used to
bundle requests for any combination of 8237 supported DMA channel(s) for each device needing
DMA support. This encoded mapping on the PC/PCI agent's request/grant pair provides the
pathway that enables a PCI resident agent to deliver 8237 style DMA requests to the system without
requiring separate and distinct DREQ/DACK# pins for each DMA channel that is used by the
PC/PCI agent.
Intel LX chipsets are currently support PC/PCI functionality .
FM Synthesizer
This is a 20-voice, 4-operator music synthesis. This block interfaces to the PCI slave block,
allowing the host system to control the synthesis parameters via I/O access.
Legacy DOS Game Engine, MIDI Port and Game Port
This section includes 3 sub-blocks: SB-Pro compatible state machine, bi-directional MPU401/MIDI port and Game port.
Legacy DOS Game Engine
It interfaces to the PCI for Real DOS Game legacy I/O port access and DMA emulation. It
supports DDMA, “Serial-IRQ”, PC/PCI and ForteMedia’s own proprietary modes.
MIDI Port
A bi-directional MIDI interface is provided to allow connection of external MIDI devices. The
MIDI interface includes 16-byte FIFOs for the MIDI TX and RX paths.
Rev. 2.0
May 00
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 6
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FM801-AU
ortéMedia
PCI Audio Controller
Game Port
The FM801-AU game port interface is designed to work in two modes: 1) hardware polling
digital mode and 2) analog mode. The game port control signals include four button signals
and four position signals. For both modes, the processing of the button signals are the same.
They are not latch, but the switch states are just passed to the data bus when they are required.
The position signals are handled differently, depending upon the mode being used.
Peripheral Interfaces
Peripheral Interface includes all the miscellaneous input and output interfaces: AC97 Codec IF, I2S
input ports for ZV audio application and one S/PDIF output port.
I2S (Enhanced)
The I2S interface which is designed for the purpose of interconnecting consumer and
professional digital audio products with very low Jitter clock recovery for precise digital to
analog conversion.
S/PDIF Digital Input
The FM801-AU utilized the digital audio interface S/PDIF bi-phase-mark encoding to
reduce cross-talk from the data portion of the clock. The FM801-AU device can auto detect
if there is the S/PDIF input connection is ON or OFF. It also can distinguish if an input
stream is an audio PCM stream or an AC-3 raw data stream. When detecting an audio PCM
stream, FM801-AU can accept the following sampling rate: 32KHz, or 44.1 KHz, or 48KHz.
S/PDIF AC-3 Raw Data Output Support
The FM801-AU can support S/PDIF output in both audio PCM format or as an AC-3 raw
data format. The output audio stream can be formatted as a 16-bit audio stream with the
sampling rate of 48KHz.
Shared I/O Interfaces
In order to maintain the minimum pin count to 100, few functional pins are shared and
multiplexed internally. They are the hardware volume control pins, GPI/O pins and
EEPROM pins. They are shared with SPDIF, AC97, PCLKRUN pins or among themselves.
GPI/O and Volume Control
Four GPI/O multiplexed with volume control pins can be exercised on FM801-AU.
GPIO[3:1] are multiplex pins shared with volume control and EEPROM. The definition is
as following:
GPIO[3]/Volume Mute/EEPROM(93c57) Data Out
GPIO[2]/Volume Down/EPROM(93c57) Data In
GPIO[1]/Volume Up/EPROM Serial Clock
for general purpose I/O pin use -- FM801-AU output pin, you can control/program on
board other device logic action. E.g. AM/FM radio chip or as input pin for Host polling
status of signals.
for volume control purpose -- the Volume Control can offer user direct control master
volume output over a range of 46.5 dB in 32 steps with most convenience.
Volume Down: support discrete push or continuous push.
Rev. 2.0
Page 7
FM801-AU DataSheet
May 00
ForteMedia, Inc. San Jose, CA
F
FM801-AU
PCI Audio Controller
ortéMedia
Volume Up: support discrete push or continuous push.
Mute: supports discrete push only, repeat push will trigger mute to unmute
EEPROM
Three types are supported, 93C57, 24C00 and 24C01, the selection is through the pin#
86 and pin# 90
AC97 Interface, SRC and Digital Mixing
The FM801-AU supports the AC-Link, which is defined in the Audio Codec’97 Component
Specification, as a peer-to-peer communications link between a digital audio controller and an
Audio Codec. The FM801-AU functions as the “AC’97 Digital Controller referred to in the
Audio Codec’97 Component Specification. FM801-AU also provide SRC and Digital Mixing
for FM Midi, Wave, Sound Blaster, I2S, S/PDIF and AC97 audio streams.
AC97 Interface
The FM801-AU AC97 interface compliant with the rev. 2.1 specification, and support one master
CODEC and one slave CODEC.
FM801-AU CONNECTION TO THE AC’97 CODEC
The FM801-AU communicates with the AC’97 via a digital serial link called AC-Link. AC:Link is a 5-pin, bi-directional, fixed data rate, serial, PCM digital stream. It handles
multiple input and output audio streams, as well as control register accesses to the AC’97
Codec device employing a time division multiplexed (TDM) scheme. For details of AC97
CODEC, please refer to individual CODEC manufacture’s IC specification.
FM801-AU
Signal Name
FM801-AU
I/O Type
O
AC’97
Signal
Name
RESET#
AC97
I/O
Type
I
AC97_RST
AC97_FS
O
SYNC
I
AC97_SDI
I
SDATA_IN
O
AC97_SD
O
AC97_SCL
K
O
SDATA_OUT
I
I
BIT_CLK
O
Description
Master H/W Reset AC’97
Codec from FM801-AU
48-Khz fixed rate frame
sync from FM801-AU
Serial, time div/multiplex in
stream to FM801-AU
Serial, time div/multiplex
out stream from FM801-AU
12.288-Mhz serial data
clock
AC97 control register access
1.
2.
Rev. 2.0
May 00
Host can access the Codec index registers through FM801-AU control register
(0x2A~2D). For register write, Host has to poll bit-9 of Codec Command Port
(0x2A~2B) first until it’s ready. After making sure that Hw is ready to access Codec
registers, host can program the data port (0x2C~2D) first, then it should issue
‘write command’ and the index address to register 0x2A to trigger the Hw to start
programming Codec.
For register read from Codec, Host has to poll bit-9 of Codec Command Port
(0x2A~2B) first until it’s ready. Host is then allowed to issue the ‘read command’
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 8
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FM801-AU
ortéMedia
PCI Audio Controller
and the address to register 0x2A . To read the data, Host starts polling bit-8 of it
until it is set, then it can read the data from data port at 0x2C~2D.
Resetting the AC’97 CODEC
The AC’97 Codec Specification provides for three types of AC’97 Codec reset:
1. Cold AC’97 Reset, where all AC’97 Codec logic is initialized to its default state
2. Warm AC’97 Reset, where the contents of the AC’97 Codec register set are left
unaltered
3. Register Reset, which only initializes the AC’97 Codec registers to their default
states
AC-Link Low Power Mode
The AC-Link signals can be placed in a low-power mode. When the AC’97 Codec
General Purpose register is programmed to the appropriate value, both AC-Link signals,
(BIT_CLK) and (SDATA_IN) will be brought to and held at a logic low-voltage level
(BIT_CLK) and (SDATA_IN) from the AC’97 Codec to the FM801-AU are transitioned
low immediately following the decode of the write to the General Purpose register.
When the FM801-AU driver is ready to program the AC-Link into its low-power mode,
slots 1 and 2 are the only valid stream in the audio output frame. At this point in time it
is assumed that all sources of audio input have also been neutralized. The FM801-AU
driver should also drive the FM801-AU AC-Link signals, (AC97_FS), and
(AC97_SDO), low after programming AC’97 to this low power, “halted” mode.
Waking Up AC-Link
Once the AC’97 Codec has been instructed to halt AC97_SCLK, a special “Wake Up”
protocol must be used to bring the AC-Link to the active mode since normal audio
output and input frames cannot be communicates in the absence of AC97_SCLK. There
are two methods for bringing the AC-Link out of a low power, halted mode: Cold
AC’97 Reset and Warm AC’97 Reset. The current Power Down State would ultimately
dictate which form of AC’97 reset is appropriate. Regardless of the method used, the
FM801-AU will perform the Wake -up task.
Once powered down, re-activation of the AC-Link via re-assertion of the (AC97_FS)
signal (Warm AC’97 Reset method) must not occur for a minimum of four audio frame
times following the frame in which the Power Down was triggered. When AC-Link
powers up it indicates readiness via the Codec ready bit (input slot 0, bit 15).
SRC and Digital Mixing
Streaming Engine includes 3 main sub-blocks: Data Flow Controller, Sample Rate Converter and
Digital Mixer. FM801-AU supports variable sampling rate AC 97 CODEC. Three sampling rates
are supported, 48KHz, 44.1KHz, and 32KHz. Sample Rate Converter will read the data from each
sound source (FM, PCM Data, I2S) and converted it to 48khz data streams. Digital Mixer will then
mix these sound sources into one output stream @48Khz and send it to Codec IF and SPDIF. For
Capture, SRC will read the recording data either from Codec IF, FM or I2S. After converting the
data stream from 48Khz to the designate sample rate, SRC will write the recording data into PCI
Capture FIFO. PCI master will then execute bus master to write the data back to the system
memory when one of the Ping-Pong FIFO is filled. Data Flow Controller will convert and pack the
data into the desired format. For playback, it will throw away the junk and data and convert the
non-16 bit PCM data into one uniform format: 16-bit stereo signed data for SRC to process. For
Rev. 2.0
May 00
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 9
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FM801-AU
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PCI Audio Controller
capture, DFC will convert the 16-bit signed data into the desired format(8-bit/16-bit, Mono/Stereo)
and pack into right alignment. Peripheral Interface includes all the miscellaneous input/output
interfaces: Codec IF, I2S, Volume Control and S/PDIF In/Out interface. I2S and S/PDIF IF will be
accessed by Streaming Engine based on the fixed-rate interrupt (@48Khz).
Rev. 2.0
May 00
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 10
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FM801-AU
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PCI Audio Controller
FM801-AU Pin-Out
100 pin QFP Pin Diagram
Rev. 2.0
May 00
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 11
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FM801-AU
PCI Audio Controller
ortéMedia
FM801-AU I/O Pins Descriptions
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
Rev. 2.0
May 00
Pin Name
GP2_X
GP1_X
GP2_BUTA
GP1_BUTA
VCC
PCI_INTA
PSERIRQ
GND
PCI_RST
PCI_CLK
PCI_GNT
GND
PCI_REQ
PPME
PAD[31]
PAD[30]
PAD[29]
PAD[28]
PAD[27]
PAD[26]
VCC
PAD[25]
GND
PAD[24]
PCBE[3]
PIDSEL
PAD[23]
PAD[22]
PAD[21]
PAD[20]
VCC
PAD[19]
GND
PAD[18]
PAD[17]
PAD[16]
PCBE[2]
I/O Type
B
B
I
I
O
O
I
I
I
O
O
B
B
B
B
B
B
B
B
B
I
B
B
B
B
B
B
B
B
B
Description
Game port 2 joystick X-axis
Game port 1 joystick X-axis
Game port 2 button A
Game port 1 button A
3.3V Power for Core
PCI interrupt A
Serial IRQ
Ground
PCI system reset
PCI clock
PCI bus grant
Ground
PCI bus request
PCI power management event
PCI address/data
PCI address/data
PCI address/data
PCI address/data
PCI address/data
PCI address/data
3.3V Power for PCI
PCI address/data
Ground for PCI
PCI address/data
PCI command/byte enable
PCI ID select
PCI address/data
PCI address/data
PCI address/data
PCI address/data
3.3V Power for PCI
PCI address/data
Ground for PCI
PCI address/data
PCI address/data
PCI address/data
PCI command/byte enable
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 12
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ortéMedia
Pin #
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
Rev. 2.0
May 00
Pin Name
NC
PFRAME
PIRDY
PTRDY
VCC
PDEVSEL
PSTOP
PPERR
PP_REQ
PPAR
PCBE[1]
PAD[15]
VCC
PAD[14]
GND
GND
PAD[13]
PAD[12]
PAD[11]
PAD[10]
PAD[9]
VCC
PAD[8]
PCBE[0]
GND
PAD[7]
NC
PAD[6]
PAD[5]
PAD[4]
PAD[3]
PAD[2]
VCC
PAD[1]
PAD[0]
PCLKRUN/EE_CS/
EE_SCL
PP_GNT
SPDIFO/GPIO0
GND
I/O Type
B
B
B
B
B
B
O
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
I
O
Description
No Connect
PCI frame
PCI initiator ready
PCI target ready
3.3V Power for PCI
PCI device select
PCI stop
PCI parity error
PC/PCI request
PCI parity
PCI command/byte enable
PCI address/data
3.3V Power for core
PCI address/data
Ground
Ground
PCI address/data
PCI address/data
PCI address/data
PCI address/data
PCI address/data
3.3V Power for PCI
PCI address/data
PCI command/byte enable
Ground
PCI address/data
No connect
PCI address/data
PCI address/data
PCI address/data
PCI address/data
PCI address/data
3.3V Power for I/O
PCI address/data
PCI address/data
Clk Run/EEPROM chip select
PC/PCI grant
S/PDIF output
Ground
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 13
F
FM801-AU
PCI Audio Controller
ortéMedia
Pin #
77
78
79
80
81
82
83
84
85
86
Pin Name
XTAL_I
XTAL_O
I2LRCK/SPDIFI
I2BCLK
I2SD
VOL_UP/GPIO1/EE_CK
VOL_DN/GPIO2/EE_DI/
EE_SDA
MUTE/GPIO3/EE_DO
AC97_RST
AC97_FS/EE_SEL
87
88
89
90
AC97_SDI
NC
AC97_SCLK
AC97_SDO/EE_EN
91
92
93
94
95
96
97
98
99
100
AC97_CLK
AC97_SDI2
MIDI_RXD
GP1_BUTB
GP2_BUTB
GP1_Y
GND
GP2_Y
VCC
MIDI_TXD
Rev. 2.0
May 00
I/O Type
Description
I
O
I
I
I
B
B
Main clock crystal in
Main clock crystal out
I2s L/R clock
I2s bit clock
I2s serial data
Volume up/EEPROM clock
Volume down/EEPROM data in
B
O
B
Volume mute/EEPROM data out
CODEC reset
CODEC frame sync/EEPROM
select
CODEC data in
No connect
CODEC clock
CODEC data out/EEPROM enable
(tie HIGH for disable the EEPROM,
tie LOW for enable the EEPROM)
CODEC main clock
Data in from 2nd CODEC
MIDI receiving data
Game port 1 button B
Game port 2 button B
Game port 1 joystick Y-axis
Ground
Game port 2 joystick Y-axis
3.3V Power for I/O
MIDI transmitting data
I
I
O
O
I
I
I
I
B
B
O
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 14
F
FM801-AU
PCI Audio Controller
ortéMedia
Pins Description in Detail:
I/O Type -- B-Bidirectional, I-Input, O-Output
PCI Interface
Name
PAD[31:0]
PCBE[3:0]
Pin #
15:20
22, 24
27:30, 32
34:36,49
51, 54:58
60, 63
65:69
71:72
25,37,
48,61
I/O
PCI address/data
B
Multiplexed command/byte enable. These pins are
inputs during slave operation and outputs during bus
mastering operation.
PCI Bus clock. This clock times all PCI transactions.
All PCI synchronous signals are generated and
sampled relative to the rising edge of this clock.
Bus master agent send out signal request access to bus
Bus master grant, active low. The system arbiter drives
this pin to indicate to the device that access to the PCI
bus has been granted.
PCI interrupt A
Reset
PCI Clock Run/EPROM(93c57) chip select/EPROM
(24c00) serial clock. The external EEPROM will load
6-words of data into Subsystem Vendor ID, Subsystem
ID (func0), Subsystem ID (func1), Vendor ID, Device
ID (func0), Device ID (func1) in this order.
Device Select, active low. The PCI bus target device
drives this pin to indicate that it has decoded the
address of the current transaction as its own chip select
range.
Cycle frame, active low. The current PCI bus master
drives this pin to indicate the beginning and duration of
a transaction.
ID select, active-high. This pin is used as a chip select
during PCI configuration read and write cycles.
Initiator ready, active low. The current PCI bus master
drives this pin to indicate that as the initiator it is ready
to transmit or receive.
Parity active high. This pin indicates even parity
across{31:0} and PCBE{3:0} for both address and data
phases. The signal is delay one PCI clock from either
PCI_CLK
10
I
PCI_REQ
PCI_GNT
13
11
I
I
PCI_INT
PCI_RST
PCLKRUN/
EE_CS/
EE_SCL
6
9
73
O
I
B
PDEVSEL
43
B
PFRAME
39
B
PIDSEL
26
I
PIRDY
40
B
PPAR
47
B
Rev. 2.0
May 00
Description
B
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 15
F
FM801-AU
PCI Audio Controller
ortéMedia
the address or data phase for which parity is generated.
PCI Parity error check
Power management enable interrupt output to wake up
the system.
PC/PCI request
Serial IRQ
Stop transaction, active low. The current PCI bus target
drives this pin active to indicate a request to the master
to stop the current transaction.
Target ready, active low. The current PCI bus master
drives this pin to indicate that as the target ready to
transmit or receive.
PPERR
PPME
45
14
B
O
PP_REQ
PSERIRQ
PSTOP
46
7
44
O
O
B
PTRDY
41
B
Pin #
I/O
Description
85
86
87
89
90
91
92
O
O
I
I
O
O
I
CODEC reset
CODEC frame sync
CODEC data in
CODEC clock
CODEC data out
CODEC main clock
Data in from 2nd CODEC
Pin #
80
81
79
I/O
I
I
I
Description
I2S Bit clock
I2S serial data
I2S left/right clock
/SPDIF Input
S/PDIF Data / GPIO[0]
AC97 Interface
Pin Name
AC97_RST
AC97_FS
AC97_SDI
AC97_SCLK
AC97_SDO
AC97_CLK
AC97_SDI2
I2S and S/PDIF IF
Pin Name
I2BCLK
I2SD
I2LRCK
/SPDIFI
SPDIFO
/GPIO0
75
Peripheral Interface
Pin Name
Pin #
GP_X [1,2]
GP_BUTA [1,2]
GP_BUTB[1,2]
GP_Y[1,2]
MIDI_RXD
MIDI_TXD
Rev. 2.0
May 00
1,2
4,3
94,95
96,98
93
100
B
I/O
Description
B
I
I
B
I
O
Game Port Data
Game Port Data
Dual Purpose pin, data input pin
Game Port Data
Receive Data
Transmitting Data
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 16
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FM801-AU
PCI Audio Controller
ortéMedia
Miscellaneous IO Pins
Pin Name
Pin #
VOL_UP/GPIO1
VOL_DN/
GPIO2/
EE_DI
MUTE/
GPIO3/
EE_DO
XTAL_I
XTAL_O
PSERIRQ
I/O
Description
82
83
I/B
I/B
84
I/B
VOL_UP is a volume increase input.
VOL_DN is a volume decrease input.
/GPIO(2)/EPROM(93c57) data in, or EPROM (24c00)
data in and out.
Volume mute/ GPIO(3)/EPROM(93c57) data out.
77
78
74
I
O
B
Main clock crystal in
Main clock crystal out
Special Protocol able to interface interrupts together in
a single pin
I/O
Description
Pwr
+3.3V power pins
Pwr
Ground
Power and Ground
Pin Name
Pin #
NC
VCC
GND
38,64, 88
5,21,31,
42,50,59,
70,99
8,12,23,3
3,52,
53,62,
76,97
Strap Selection Option
Pin Name
Pin #
EE-EN
EE_SEL
Rev. 2.0
May 00
90
86
I/O
Description
Low/High
Low/High
0=E2PROM on board, 1=No E2PROM.
0=93c57, 1=24c00/24c01
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 17
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FM801-AU
PCI Audio Controller
ortéMedia
FM801-AU PCI Configuration Registers
This section describes the summary and detailed description of FM801-AU
Configuration registers. FM801-AU is a PCI multi-functions device (2 functions),
Audio device(Function-0) and Game port device(Function-1). Therefore, there are 2
devices’ configuration space defined in FM801-AU.
FM801-AU PCI Audio Device Configuration Registers Summary
Table
Table PCI Audio Device (Function-0) Configuration Register Summary
Host Config
Address
0x00~01
0x02~03
0x04~05
0x06~07
0x08
0x09~0B
0x0D
0x0E
0x10~13
0x2C~2D
0x2E~2F
0x34
0x3C
0x3D
0x3E
0x3F
0x40~41
0x98~99
0x9A~9B
0x9C~9D
0x9E~9F
0xDC
0xDD
0xDE~DF
0xE0~E1
Rev. 2.0
May 00
Host
R/W
R
R
R/W
R/W
R
R
R/W
R
R/W
R
R
R
R/W
R
R
R
R/W
R/W
R/W
R/W
R/W
R
R
R
R/W
Power-on
Value
0x1319
0x0801
0x0000
0x0290
0xB2
0x040100
0x00
0x80
0x00000001
0x1319
0x1319
0xDC
0x00
0x01
0x04
0x28
0x907F
0x1319
0x0801
0x1319
0x1319
0x01
0x00
0x0421
0x0000
Description
Vendor ID (shadow of 0x98~99)
Device ID (shadow of 0x9A~9B)
PCI Command Register
PCI Status Register
Revision ID Register
Class Code (multimedia audio device)
Latency Timer
Header Type
I/O Base Register (offset=0x00~0x7F)
Subsystem Vendor ID (shadow of 0x9C~9D)
Subsystem ID (shadow of 0x9E~9F)
Capabilities Pointer
Interrupt Line Register
Interrupt Pin Register (INTA#)
Min Grant PCI Burst period
Max Latency PCI grant period
Legacy Audio Control
Vendor ID Writeable
Device ID Writeable
Subsystem Vendor ID Writeable
Subsystem ID Writeable
Capability ID
Next Item Pointer
Power Management Capabilities
Power Management Control/Status
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 18
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FM801-AU
PCI Audio Controller
ortéMedia
FM801-AU PCI Audio Device Config. Registers Detailed
Description
Vendor ID Register ( R )
•
•
•
15
0
14
0
Host Configuration Address: 0x00 – 0x01
Power-on value: 0x1319
Description: ForteMedia Vendor ID, can be programmed througth 0x98~99.
13
12
11
10
9
8
7
6
5
4
3
2
0
1
0
0
1
1
0
0
0
1
1
0
1
0
0
1
Device ID Register ( R )
•
•
•
15
0
14
0
Host Configuration Address: 0x02 – 0x03
Power-on value: 0x0801
Description: FM801-AU part number - 801, can be programmed througth 0x9A~9B.
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
1
0
0
0
0
0
0
0
0
0
0
1
PCI Command Register ( R/W )
•
•
•
15
14
Host Configuration Address: 0x04 – 0x05
Power-on value: 0x0000
Description: Device capability on PCI operations.
13
12
11
10
9
8
7
6
0
0
0
0
5
0
4
0
3
0
2
0
1
0
B0: Response to PCI I/O access - A value of 0 disables FM801-AU’s response to I/O access. A
value of 1 enables FM801-AU’s response to I/O access.
B1: Response to PCI Memory access - A value of 0 disables FM801-AU’s response to memory
access. A value of 1 enables FM801-AU’s response to memory access.
B2: Bus Master Capability - A value of 0 disables FM801-AU from generating PCI accesses. A
value of 1 allows FM801-AU to behave as a bus master.
B3: Response to Special cycle - Zero always. Read only.
B4: Memory Write and Invalidate Command Generation - Zero always. Read only.
B5: VGA Palette Snoop - Zero always. Read only.
B6: PERR# Generation - If zero, FM801-AU ignore parity error it detects. If one FM801-AU will
assert PERR# if parity error occurs.
B7: Address/Data stepping - Zero always. Read only.
B8: SERR# Generation - A value of 0 disables FM801-AU to generate SERR#. A value of 1 enables
FM801-AU to generate SERR#.
B9: Fast Back-to-Back - Zero always. Read only.
B15~B10: Reserved.
Rev. 2.0
May 00
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 19
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FM801-AU
PCI Audio Controller
ortéMedia
PCI Status Register ( R /W)
•
•
•
15
0
14
0
Host Configuration Address: 0x06 – 0x07
Power-on value: 0x0290
Description: Status information for PCI bus related events.
13
12
11
10
9
8
7
6
5
4
0
0
0
0
1
0
1
0
0
1
3
2
1
0
B3~B0: Reserved
B4: PCI Power Management features appear in the standard configuration space header. Read
Only.
B5: 66 MHz Capable- Zero always. Read only.
B6: UDF(User Definable Features) Support – Zero always
B7: Fast Back-to-Back - One always. Read only.
B8: PERR# active as Master - This bit is set when FM801-AU, as a master, asserts PERR# or
detects the assertion of PERR# by other agent. This bit is cleared by writing an one to it.
B10~9: DEVSEL# Timing (Read only) 0 0 = Fast
0 1 = Medium (Always)
1 0 = Slow
1 1 = reserved
B11: Signaled Target Abort - 0 = No, 1 = Yes. Write one to clear.
B12: Received Target Abort - 0 = No, 1 = Yes. Write one to clear.
B13: Received Master Abort - 0 = No, 1 = Yes. Write one to clear.
B14: Signaled System Error - 0 = No, 1 = Yes. Write one to clear.
B15: Detected Parity Error - 0 = No, 1 = Yes. Write one to clear.
Revision ID Register ( R )
•
•
•
15
14
Host Configuration Address: 0x08
Power-on value: 0xB2
Description: B2h for 4th revision.
13
12
11
10
9
8
7
1
6
0
5
1
4
1
3
0
2
0
1
1
0
0
3
2
1
0
3
0
2
0
1
0
0
1
Programming Interface Register of Class Code ( R )
•
•
•
15
0
14
0
Host Configuration Address: 0x09
Power-on value: 0x00
Description: Specific register-level programming interface
13
12
11
10
9
8
7
6
5
4
0
0
0
0
0
0
Sub-class code Register of Class Code ( R )
•
•
•
15
14
Rev. 2.0
May 00
Host Configuration Address: 0x0A
Power-on value: 0x01(Func-0)
Description: Sub-Class Code, Audio device
13
12
11
10
9
8
7
0
6
0
5
0
4
0
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 20
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FM801-AU
PCI Audio Controller
ortéMedia
Base-class Code Register of Class Code ( R )
•
•
•
15
0
14
0
Host Configuration Address: 0x0B
Power-on value: 0x04(Func-0)
Description: Base Class Code, Multimedia device
13
12
11
10
9
8
7
6
0
0
0
1
0
0
5
4
3
2
1
0
Latency Timer Register ( R/W )
•
•
•
15
0
14
0
Host Configuration Address: 0x0D
Power-on value: 0x00
Description: Specifies the maximum number of PCI clocks that FM801-AU, as a bus
master, will stay on the bus.
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
Header Type Register ( R )
• Host Configuration Address: 0x0E
• Power-on value: 0x80
• Description: Header type
15
14
13
12
11
10
9
8
7
1
6
0
5
0
4
0
3
0
2
0
1
0
0
0
B7: Set to one to indicate multifunctional device.
B6~B0: Specify layout type of bytes 10h~3Fh; type “0” for bytes 10~3Fh, as defined
in the PCI spec.
Base Address Register ( R/W )
•
•
•
31
0
15
0
30
0
14
0
Host Configuration Address: 0x10 – 0x13
Power-on value: 0x00000001
Description: Starting address of FM801-AU control register.
29
28
27
26
25
24
23
22
21
20
0
0
0
0
0
0
0
0
0
0
13
12
11
10
9
8
7
6
5
4
0
0
0
0
0
0
0
0
0
0
19
0
3
0
18
0
2
0
17
0
1
0
B0: I/O Indicator - One always. Read only.
B1: reserved. Zero always. Read only.
B6~B2: Hardwired to zero. Read only.
B31~B7: Base Address - This address determines the starting address of 128 byte FM801-AU I/O
registers mapped into PCI I/O space.
Rev. 2.0
May 00
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 21
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PCI Audio Controller
Subsystem Vendor ID ( R )
•
•
•
15
0
14
0
Host Configuration Address : 0x2C – 0x2D
Power-on value : 0x1319
Description : Subsystem Vendor ID. Can be written by external EPROM or
programmed througth 0x9C~9D. This register is shared between 2 functions.
13
12
11
10
9
8
7
6
5
4
3
2
0
1
0
0
1
1
0
0
0
1
1
0
1
0
0
1
Host Configuration Address : 0x2E – 0x2F
Power-on value : 0x1319
Description : Subsystem ID. Can be written by external or programmed througth
0x9E~9F. This register is shared between 2 functions.
13
12
11
10
9
8
7
6
5
4
3
2
1
0
1
0
0
1
1
0
0
0
1
1
0
0
0
1
Subsystem ID ( R )
•
•
•
15
0
14
0
Capabilities Pointer ( R )
•
•
•
15
14
Host Configuration Address: 0x34
Power-on value: 0xDC
Description: This register is indicated where the PCI Power Management features
appear in the standard configuration space header.
13
12
11
10
9
8
7
6
5
4
3
2
1
1
1
0
1
1
1
0
0
0
Interrupt Line Register ( R/W )
•
•
•
15
14
Host Configuration Address: 0x3C
Power-on value: 0x00
Description: This register is used to communicate the interrupt line routing
information.
13
12
11
10
9
8
7
6
5
4
3
2
0
0
0
0
0
0
1
0
0
0
Interrupt Pin Register ( R )
•
•
•
Host Configuration Address: 0x3D
Power-on value: 0x01(Func-0)
Description: This register of Func-0 is hardwired to 0x01, which indicates that
FM801-AU uses INTA# as interrupt pin.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
1
***** NOTE: Other registers not implemented will be read back as 00h.
Rev. 2.0
May 00
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 22
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FM801-AU
ortéMedia
PCI Audio Controller
Min Grant Period for PCI burst ( R )
•
•
•
15
14
Host Configuration Address: 0x3E
Power-on value: 0x04 (1 us)
Description: This register is used to specify how long of a burst period the device
needs(in ¼ microsecond unit). FM801-AU will use 1 us burst period.
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
1
0
0
0
Max Latency for PCI Grant( R )
•
•
•
15
0
14
0
Host Configuration Address: 0x3F
Power-on value: 0x28 (10 us)
Description: This register is used to specify how often the device needs(in ¼
microsecond unit) to gain access to the PCI bus. FM801-AU needs the PCI bus grant
every 10 us.
13
12
11
10
9
8
7
6
5
4
3
2
1
0
1
0
1
0
0
0
Legacy Audio Control Register ( R/W )
•
•
•
15
1
14
0
Host Configuration Address: 0x40 – 0x41
Power-on value: 0x907F
Description: This register provides control for independent enable/disable for each of
the legacy audio subfunctions. This register can only be accessed through Func0.
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
1
0
0
0
0
0
1
1
1
1
1
1
1
B0: Sound Blaster Enable. 1=Enable SB I/O positive decoding, 0=Disable.
B1: FM Synthesis Enable. 1=Enable FM Synthesis register positive decoding, 0=Disable.
B2: Game Port Enable. 1=Enable Game Port register positive decoding, 0=Disable.
B3: MPU-401 I/O Enable. 1=Enable MPU-401 register positive decoding, 0=Disable.
B4: MPU-401 IRQ Enable. 1=Enable IRQ specified in B13-B11, 0=Disable.
B5: I/O Address Alias Control. 1=10-bit address decoding, 0=16-bit address decoding.
B7~B6: SB DMA Channel Select. 00=DMA CH0, 01=DMA CH1, 10=Reserved, 11=DMA CH3.
B10~B8: SB IRQ Select. 000=IRQ5, 001=IRQ7, 010=IRQ9, 011=IRQ10, 100=IRQ11,
others=Reserved.
B13~B11: MIDI I/O IRQ Select. 000=IRQ5, 001=IRQ7, 010=IRQ9, 011=IRQ10, 100=IRQ11,
others=Reserved.
B14: Serial IRQ. 1=Serial IRQ enable, 0=Disbale.
B15: Global Legacy Audio Disable, supersede B4~B0. 1=Disable legacy audio, 0=Enable.
Vendor ID Writeable Register ( R/W )
•
•
•
15
0
14
0
Rev. 2.0
May 00
Host Configuration Address: 0x98 – 0x99
Power-on value: 0x1319
Description: ForteMedia Vendor ID, the value of this register will also show in
0x00~01. This register shares with Func-1.
13
12
11
10
9
8
7
6
5
4
3
2
1
0
1
0
0
1
1
0
0
0
1
1
0
0
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 23
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FM801-AU
ortéMedia
PCI Audio Controller
Device ID Writeable Register ( R/W )
•
•
•
15
0
14
0
Host Configuration Address: 0x9A – 0x9B
Power-on value: 0x0801
Description: FM801-AU part number – 801. The value of this register will also show
in 0x02~03.
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
1
0
0
0
0
0
0
0
0
0
0
1
Subsystem Vendor ID Writeable Register ( R/W )
•
•
•
15
0
14
0
Host Configuration Address : 0x9C – 0x9D
Power-on value : 0x1319
Description : Subsystem Vendor ID. The value of this register will also show in
0x2C~2D. This register shares with Func-1.
13
12
11
10
9
8
7
6
5
4
3
2
1
0
1
0
0
1
1
0
0
0
1
1
0
0
0
1
Subsystem ID Writeable Register ( R/W )
•
•
•
15
0
14
0
Host Configuration Address : 0x9E – 0x9F
Power-on value : 0x1319
Description : Subsystem ID. The value of this register will also show in 0x2E~2F
13
12
11
10
9
8
7
6
5
4
3
2
1
0
1
0
0
1
1
0
0
0
1
1
0
0
0
1
Capabilities ID ( R )
•
•
•
15
14
Host Configuration Address: 0xDC
Power-on value: 0x01
Description: “01” indicates that the linked list item as being the PCI Power
Management Registers.
13
12
11
10
9
8
7
6
5
4
3
2
0
0
0
0
0
0
1
0
0
1
Next Item Pointer ( R )
•
•
•
15
0
14
0
Rev. 2.0
May 00
Host Configuration Address: 0xDD
Power-on value: 0x00
Description: “00” indicates that there are no additional items in the Capabilities list.
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 24
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PCI Audio Controller
Power Management Capabilities ( R )
•
•
•
15
0
14
0
Host Configuration Address: 0xDE – 0xDF
Power-on value: 0x0421(Func-0)
Description: Describes information on the capabilities of the function related to power
management.
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
B2~B0: Version number. PCI PM v1.0
B3: PME Clock. ‘0’ indicates that no PCI clock is required to generated PME#.
B4: Reserved.
B5: Device Specific Initialization. ‘1’ indicates that the function requires that a device specific
initialization sequence following transition to the D0 uninitialized state.
B8~B6: Reserved.
B9(read only): D1 Support. 1=Yes, 0=No.
B10(read only): D2 Support. 1=Yes(Shutdown 24Mhz clock, I2S & AC97 DAC, ADC, Mixer),
0=No.
B15~B11: PME Support. For Func-0 device, power-on value is “00000”, there’s no PME support.
Power Management Control/Status ( R/W )
•
•
•
15
0
14
0
Host Configuration Address: 0xE0 – 0xE1
Power-on value: 0x0000
Description: This register is used to manage the PCI function’s power management
state as well as to enable/monitor power management events.
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
B1~B0: Power state.
B7~B2: Reserved.
B8: PME Enable.
B12~B9: Data select. (Read only)
B14~B13: Data scale. (Read only)
B15: PME Status. Writing ‘1’ to this bit will clear it and cause the function to stop asserting a
PME. This bit defaults to ‘0’ indicates the function does not support PME# generation from
D3cold.
Rev. 2.0
May 00
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 25
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ortéMedia
FM801-AU PCI GamePort Device Config. Registers Summary
Table
Table PCI GamePort Device (Function-1) Configuration Register Summary
Host Config
Address
0x00~01
0x02~03
0x04~05
0x06~07
0x08
0x09~0B
0x0D
0x0E
0x10~13
0x2C~2D
0x2E~2F
0x34
0x3C
0x3D
0x3E
0x3F
0x40~41
0x98~99
0x9A~9B
0x9C~9D
0x9E~9F
0xDC
0xDD
0xDE~DF
0xE0~E1
Rev. 2.0
May 00
Host
R/W
R
R
R/W
R/W
R
R
R/W
R
R/W
R
R
R
R/W
R
R
R
R
R/W
R/W
R/W
R/W
R
R
R
R/W
Power-on
Value
0x1319
0x0802
0x0000
0x0290
0xB2
0x098000
0x00
0x80
0x00000001
0x1319
0x1319
0xDC
0x00
0x00
0x04
0x28
0x907F
0x1319
0x0802
0x1319
0x1319
0x01
0x00
0x5221
0x0000
Description
Vendor ID (shadow of 0x98~99)
Device ID (shadow of 0x9A~9B)
PCI Command Register
PCI Status Register
Revision ID Register
Class Code (Other input controller)
Latency Timer
Header Type
I/O Base Register (offset=0x00~0x0F)
Subsystem Vendor ID (shadow of 0x9C~9D)
Subsystem ID (shadow of 0x9E~9F)
Capabilities Pointer
Interrupt Line Register
Interrupt Pin Register (INTB#)
Min Grant PCI Burst period
Max Latency PCI grant period
Legacy Audio Control (only bit-2 is writeable)
Vendor ID Writeable
Device ID Writeable
Subsystem Vendor ID Writeable
Subsystem ID Writeable
Capability ID
Next Item Pointer
Power Management Capabilities
Power Management Control/Status
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 26
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FM801-AU
PCI Audio Controller
ortéMedia
FM801-AU PCI GamePort Device Config. Registers Detailed
Description
Vendor ID Register ( R )
•
•
•
15
0
14
0
Host Configuration Address: 0x00 – 0x01
Power-on value: 0x1319
Description: ForteMedia Vendor ID, can be programmed througth 0x98~99.
13
12
11
10
9
8
7
6
5
4
3
2
0
1
0
0
1
1
0
0
0
1
1
0
1
0
0
1
Host Configuration Address: 0x02 – 0x03
Power-on value: 0x0802
Description: FM801-AU Gameport device ID – 802, can be programmed througth
0x9A~9B.
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
1
0
0
0
0
0
0
0
0
0
1
0
0
Device ID Register ( R )
•
•
•
15
0
14
0
PCI Command Register ( R/W )
•
•
•
15
14
Host Configuration Address: 0x04 – 0x05
Power-on value: 0x0000
Description: Device capability on PCI operations.
13
12
11
10
9
8
7
6
0
0
0
0
5
0
4
0
3
0
2
0
1
0
B0: Response to PCI I/O access - A value of 0 disables FM801-AU’s response to I/O access. A
value of 1 enables FM801-AU’s response to I/O access.
B1: Response to PCI Memory access - A value of 0 disables FM801-AU’s response to memory
access. A value of 1 enables FM801-AU’s response to memory access.
B2: Bus Master Capability - A value of 0 disables FM801-AU from generating PCI accesses. A
value of 1 allows FM801-AU to behave as a bus master.
B3: Response to Special cycle - Zero always. Read only.
B4: Memory Write and Invalidate Command Generation - Zero always. Read only.
B5: VGA Palette Snoop - Zero always. Read only.
B6: PERR# Generation - If zero, FM801-AU ignore parity error it detects. If one FM801-AU will
assert PERR# if parity error occurs.
B7: Address/Data stepping - Zero always. Read only.
B8: SERR# Generation - A value of 0 disables FM801-AU to generate SERR#. A value of 1 enables
FM801-AU to generate SERR#.
B9: Fast Back-to-Back - Zero always. Read only.
B15~B10: Reserved.
Rev. 2.0
May 00
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 27
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PCI Audio Controller
ortéMedia
PCI Status Register ( R /W)
•
•
•
15
0
14
0
Host Configuration Address: 0x06 – 0x07
Power-on value: 0x0290
Description: Status information for PCI bus related events.
13
12
11
10
9
8
7
6
5
4
0
0
0
0
1
0
1
0
0
1
3
2
1
0
B3~B0: Reserved
B4: PCI Power Management features appear in the standard configuration space header. Read
Only.
B5: 66 MHz Capable- Zero always. Read only.
B6: UDF(User Definable Features) Support – Zero always
B7: Fast Back-to-Back - One always. Read only.
B8: PERR# active as Master - This bit is set when FM801-AU, as a master, asserts PERR# or
detects the assertion of PERR# by other agent. This bit is cleared by writing an one to it.
B10~9: DEVSEL# Timing (Read only) 0 0 = Fast
0 1 = Medium (Always)
1 0 = Slow
1 1 = reserved
B11: Signaled Target Abort - 0 = No, 1 = Yes. Write one to clear.
B12: Received Target Abort - 0 = No, 1 = Yes. Write one to clear.
B13: Received Master Abort - 0 = No, 1 = Yes. Write one to clear.
B14: Signaled System Error - 0 = No, 1 = Yes. Write one to clear.
B15: Detected Parity Error - 0 = No, 1 = Yes. Write one to clear.
Revision ID Register ( R )
•
•
•
15
14
Host Configuration Address: 0x08
Power-on value: 0xB2
Description: B0h for 2nd revision.
13
12
11
10
9
8
7
1
6
0
5
1
4
1
3
0
2
0
1
1
0
0
3
2
1
0
Programming Interface Register of Class Code ( R )
•
•
•
15
0
14
0
Host Configuration Address: 0x09
Power-on value: 0x00
Description: Specific register-level programming interface
13
12
11
10
9
8
7
6
5
4
0
1
0
0
0
0
Sub-class code Register of Class Code ( R )
Host Configuration Address: 0x0A
Power-on value: 0x80(Func-1)
Description: Sub-Class Code, Other Input controller
15
14
13
12
11
10
9
8
7
0
Rev. 2.0
May 00
6
0
5
0
4
0
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
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2
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Base-class Code Register of Class Code ( R )
•
•
•
15
0
14
0
Host Configuration Address: 0x0B
Power-on value: 0x09(Func-1)
Description: Base Class Code, Input device
13
12
11
10
9
8
7
0
0
1
0
0
1
6
5
4
3
2
1
0
Latency Timer Register ( R/W )
•
•
•
15
0
14
0
Host Configuration Address: 0x0D
Power-on value: 0x00
Description: Specifies the maximum number of PCI clocks that FM801-AU, as a bus
master, will stay on the bus.
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
Header Type Register ( R )
•
•
•
15
14
Host Configuration Address: 0x0E
Power-on value: 0x80
Description: Header type
13
12
11
10
9
8
7
1
6
0
5
0
4
0
3
0
2
0
1
0
0
0
B7: Set to one to indicate multifunctional device.
B6~B0: Specify layout type of bytes 10h~3Fh; type “0” for bytes 10~3Fh, as defined in the PCI
spec.
Base Address Register ( R/W )
•
•
•
31
0
15
0
30
0
14
0
Host Configuration Address: 0x10 – 0x13
Power-on value: 0x00000001
Description: Starting address of FM801-AU control register.
29
28
27
26
25
24
23
22
21
20
0
0
0
0
0
0
0
0
0
0
13
12
11
10
9
8
7
6
5
4
0
0
0
0
0
0
0
0
0
0
19
0
3
0
18
0
2
0
17
0
1
0
B0: I/O Indicator - One always. Read only.
B1: reserved. Zero always. Read only.
B3~B2: Hardwired to zero. Read only.
B31~B4: Base Address - This address determines the starting address of 16 byte FM801-AU I/O
registers mapped into PCI I/O space for Gameport.
Rev. 2.0
May 00
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 29
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PCI Audio Controller
Subsystem Vendor ID ( R )
•
•
•
15
0
14
0
Host Configuration Address : 0x2C – 0x2D
Power-on value : 0x1319
Description : Subsystem Vendor ID. Can be written by external EPROM or
programmed througth 0x9C~9D. This register is shared between 2 functions.
13
12
11
10
9
8
7
6
5
4
3
2
0
1
0
0
1
1
0
0
0
1
1
0
1
0
0
1
1
0
0
1
Host Configuration Address: 0x34
Power-on value: 0xDC
Description: This register is indicated where the PCI Power Management features
appear in the standard configuration space header.
13
12
11
10
9
8
7
6
5
4
3
2
1
1
1
0
1
1
1
0
0
0
Subsystem ID ( R )
•
•
•
15
0
14
0
Host Configuration Address : 0x2E – 0x2F
Power-on value : 0x1319
Description : Subsystem Vendor ID. Can be written by external EPROM or
programmed througth 0x9E~9F. This register is shared between 2 functions.
13
12
11
10
9
8
7
6
5
4
3
2
0
1
0
0
1
1
0
0
0
1
1
0
Capabilities Pointer ( R )
•
•
•
15
14
Interrupt Line Register ( R/W )
•
•
•
15
14
Host Configuration Address: 0x3C
Power-on value: 0x00
Description: This register is used to communicate the interrupt line routing
information.
13
12
11
10
9
8
7
6
5
4
3
2
0
0
0
0
0
0
1
0
0
0
Interrupt Pin Register ( R )
•
•
•
15
0
14
0
Host Configuration Address: 0x3D
Power-on value: 0x00(Func-1)
Description: The register of Func-1 is hardwired to 0x00, which indicates that
FM801-AU Func-1 does not use interrupt pin
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
Min Grant Period for PCI burst ( R )
•
•
•
Rev. 2.0
May 00
Host Configuration Address: 0x3E
Power-on value: 0x04 (1 us)
Description: This register is used to specify how long of a burst period the device
needs(in ¼ microsecond unit). FM801-AU will use 1 us burst period.
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 30
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PCI Audio Controller
ortéMedia
14
13
12
11
10
9
8
7
0
6
0
5
0
4
0
3
0
2
1
1
0
0
0
Max Latency for PCI Grant( R )
•
•
•
15
0
14
0
Host Configuration Address: 0x3F
Power-on value: 0x28 (10 us)
Description: This register is used to specify how often the device needs(in ¼
microsecond unit) to gain access to the PCI bus. FM801-AU needs the PCI bus grant
every 10 us.
13
12
11
10
9
8
7
6
5
4
3
2
1
0
1
0
1
0
0
0
Legacy Audio Control Register ( R )
•
•
•
15
1
14
0
Host Configuration Address: 0x40 – 0x41
Power-on value: 0x907F
Description: This register provides control for independent enable/disable for each of
the legacy audio subfunctions. This register can only be accessed through Func0.
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
1
0
0
0
0
0
1
1
1
1
1
1
1
B0: Sound Blaster Enable. 1=Enable SB I/O positive decoding, 0=Disable.
B1: FM Synthesis Enable. 1=Enable FM Synthesis register positive decoding, 0=Disable.
B2 (R/W): Game Port Enable. 1=Enable Game Port register positive decoding, 0=Disable.
B3: MPU-401 I/O Enable. 1=Enable MPU-401 register positive decoding, 0=Disable.
B4: MPU-401 IRQ Enable. 1=Enable IRQ specified in B13-B11, 0=Disable.
B5: I/O Address Alias Control. 1=10-bit address decoding, 0=16-bit address decoding.
B7~B6: SB DMA Channel Select. 00=DMA CH0, 01=DMA CH1, 10=Reserved, 11=DMA CH3.
B10~B8: SB IRQ Select. 000=IRQ5, 001=IRQ7, 010=IRQ9, 011=IRQ10, 100=IRQ11,
others=Reserved.
B13~B11: MIDI I/O IRQ Select. 000=IRQ5, 001=IRQ7, 010=IRQ9, 011=IRQ10, 100=IRQ11,
others=Reserved.
B14: Serial IRQ. 1=Serial IRQ enable, 0=Disbale.
B15: Global Legacy Audio Disable, supersede B4~B0. 1=Disable legacy audio, 0=Enable.
Vendor ID Writeable Register ( R/W )
Host Configuration Address: 0x98 – 0x99
Power-on value: 0x1319
Description: ForteMedia Vendor ID, the value of this register will also show in 0x00~01. This
register shares with Func-0.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
1
0
0
1
1
0
0
0
1
1
0
0
Device ID Writeable Register ( R/W )
•
•
•
Rev. 2.0
May 00
Host Configuration Address: 0x9A – 0x9B
Power-on value: 0x0801
Description: FM801-AU part number – 801. The value of this register will also show
in 0x02~03.
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 31
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FM801-AU
PCI Audio Controller
ortéMedia
14
0
13
0
12
0
11
1
10
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
1
Subsystem Vendor ID Writeable Register ( R/W )
Host Configuration Address : 0x9C – 0x9D
Power-on value : 0x1319
Description : Subsystem Vendor ID. The value of this register will also show in 0x2C~2D. This
register shares with Func-0.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
1
0
0
1
1
0
0
0
1
1
0
0
0
1
Subsystem ID Writeable Register ( R/W )
•
•
•
15
0
14
0
Host Configuration Address : 0x9E – 0x9F
Power-on value : 0x1319
Description : Subsystem ID. The value of this register will also show in 0x2E~2F
13
12
11
10
9
8
7
6
5
4
3
2
1
0
1
0
0
1
1
0
0
0
1
1
0
0
0
1
Capabilities ID ( R )
•
•
•
15
14
Host Configuration Address: 0xDC
Power-on value: 0x01
Description: “01” indicates that the linked list item as being the PCI Power
Management Registers.
13
12
11
10
9
8
7
6
5
4
3
2
0
0
0
0
0
0
1
0
0
1
Next Item Pointer ( R )
•
•
•
15
0
14
0
Host Configuration Address: 0xDD
Power-on value: 0x00
Description: “00” indicates that there are no additional items in the Capabilities list.
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
Power Management Capabilities ( R )
•
•
•
15
0
14
1
Host Configuration Address: 0xDE – 0xDF
Power-on value: 0x5221(Func-1)
Description: Describes information on the capabilities of the function related to power
management.
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
1
0
0
1
0
0
0
1
0
0
0
0
1
B2~B0: Version number. PCI PM v1.0
B3: PME Clock. ‘0’ indicates that no PCI clock is required to generated PME#.
B4: Reserved.
B5: Device Specific Initialization. ‘1’ indicates that the function requires that a device specific
initialization sequence following transition to the D0 uninitialized state.
Rev. 2.0
May 00
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 32
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FM801-AU
ortéMedia
PCI Audio Controller
B8~B6: Reserved.
B9(read only): D1 Support. 1=Yes(Gameport power saving mode), 0=No.
B10(read only): D2 Support. 1=Yes, 0=No.
B15~B11: PME Support. For Func-0 device, power-on value is “00000”, there’s no PME support.
For Func-1, it’s “01010” which indicates that PME# can be asserted from D3hot or D0.
Power Management Control/Status ( R/W )
•
•
•
15
0
14
0
Host Configuration Address: 0xE0 – 0xE1
Power-on value: 0x0000
Description: This register is used to manage the PCI function’s power management
state as well as to enable/monitor power management events.
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
B1~B0: Power state.
B7~B2: Reserved.
B8: PME Enable.
B12~B9: Data select. (Read only)
B14~B13: Data scale. (Read only)
B15: PME Status. Writing ‘1’ to this bit will clear it and cause the function to stop asserting a
PME. This bit defaults to ‘0’ indicates the function does not support PME# generation from
D3cold.
Rev. 2.0
May 00
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 33
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FM801-AU
PCI Audio Controller
ortéMedia
FM801-AU PCI Control Registers
This section describes the summary and detailed description of FM801-AU I/O
Control registers.
FM801-AU Audio Device Control Registers Summary Table
This section describes the summary and details of FM801-AU Audio Device Control
Registers.
Table FM801-AU Audio Device Control Registers Summary Table
Host Offset
0x00~01
0x02~03
0x04~05
0x06
0x08~09
0x0A~0B
0x0C~0F
0x10~13
0x14~15
0x16~17
0x18~1B
0x1C~1F
0x22~23
0x24~25
0x26
0x28
0x29
0x2A~2B
0x2C~2D
0x30
0x31
0x52~53
0x70~71
Rev. 2.0
May 00
Host
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Power-on Value
0x8808
0x8808
0x8808
0x00
0xCA00
0xCA00
0x0020
0x0003
0xXX
0x00
0x00
0x00
0x80
0x0E00
0x0000
Description
PCM Out Volume
FM Out Volume
I2S Volume
Digital Recording Source Select
Playback Channel Control
Playback Channel Data Length
Playback Channel Buffer I System Starting Address
Playback Channel Buffer II System Starting Address
Capture Channel Control
Capture Channel Data Length
Capture Channel Buffer I System Starting Address
Capture Channel Buffer II System Starting Address
Codec Control
I2S Mode/SPDIF Control
Volume Up/Dn/Mute Status
SRC/Mixer Test Control/DFC Status
I2C Control
Codec Index Register Command Port
Codec Index Register Data Port
MPU401 Data port
MPU401 Command/Status port
General Purpose I/O Control
FM801-AU Blocks Power down control
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 34
F
FM801-AU
PCI Audio Controller
ortéMedia
FM801-AU Audio Device Control Registers Detailed Description
PCM Out Volume
•
•
•
15
1
14
Host Offset Address: 0x00 - 0x01
Power-on value: 0x8808
Description: PCM Out Volume
13
12
11
10
9
8
0
1
0
0
0
7
6
5
4
0
3
1
2
0
1
0
0
0
B15: PCM Out Mute.
B14~B13: Reserved.
B12~B8: PCM Right Channel Gain. 00000=+12db gain, 01000=0db gain, 11111=-34.5db gain.
(each step corresponds to approximately 1.5db)
B7~B5: Reserved.
B4~B0: PCM Left Channel Gain. 00000=+12db gain, 01000=0db gain, 11111=-34.5db gain. (each
step corresponds to approximately 1.5db)
* B15, B12~B8, B4~B0: read/write by host.
FM Out Volume
•
•
•
15
1
14
Host Offset Address: 0x02 - 0x03
Power-on value: 0x8808
Description: FM Out Volume
13
12
11
10
9
8
0
1
0
0
0
7
6
5
4
0
3
1
2
0
1
0
0
0
B15: FM Out Mute.
B14~B13: Reserved.
B12~B8: FM Right Channel Gain. 00000=+12db gain, 01000=0db gain, 11111=-34.5db gain.
(each step corresponds to approximately 1.5db)
B7~B5: Reserved.
B4~B0: FM Left Channel Gain. 00000=+12db gain, 01000=0db gain, 11111=-34.5db gain. (each
step corresponds to approximately 1.5db)
* B15, B12~B8, B4~B0: read/write by host.
I2S Volume
• Host Offset Address: 0x04 - 0x05
• Power-on value: 0x8808
• Description: I2S Volume
15
14
13
12
11
10
9
8
1
0
1
0
0
0
7
6
5
4
0
3
1
2
0
1
0
B15: I2S Out Mute.
B14~B13: Reserved.
B12~B8: I2S Right Channel Gain. 00000=+12db gain, 01000=0db gain, 11111=-34.5db gain.
(each step corresponds to approximately 1.5db)
B7~B5: Reserved.
B4~B0: I2S Left Channel Gain. 00000=+12db gain, 01000=0db gain, 11111=-34.5db gain. (each
step corresponds to approximately 1.5db)
* B15, B12~B8, B4~B0: read/write by host.
Rev. 2.0
Page 35
FM801-AU DataSheet
May 00
ForteMedia, Inc. San Jose, CA
0
0
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FM801-AU
PCI Audio Controller
ortéMedia
Digital Recording Source Select
•
•
•
7
6
Host Offset Address: 0x06
Power-on value: 0x00
Description: Digital Recording Source Select.
5
4
3
2
1
0
7
6
5
4
3
2
0
1
0
0
0
B2~B0: Digital Recording Source Select. 000=Recording Data from ADC of AC97 primary codec,
001=FM, 010=I2S, 011=PCM, 100=Recording Data from ADC of AC97 secondary codec.
B7~B3: Reserved.
* B2~B0: read/write by host.
Playback Channel Control
•
•
•
15
1
14
1
Host Offset Address: 0x08 – 0x09
Power-on value: 0xCA00
Description: Direct Sound Playback Channel Control.
13
12
11
10
9
8
7
6
5
0
0
1
0
1
0
0
0
0
4
0
3
0
2
0
1
0
0
0
B0: DFC/PFIFO data empty. 1=Empty, 0=Not empty.
B1: Current buffer I transfer is the last transfer. 0=No, 1=Yes.
B2: Current buffer II transfer is the last transfer. 0=No, 1=Yes.
B4~B3: SRC Output sampling rate. 00=48KHz, 01=44.1KHz, 10=32KHz, 11=reserved.
B5: Channel Action. 0=Stop Transfer, 1=Start Transfer.1
B6: Channel Pause. 0=Normal, 1=Transfer Pause. (To pause, bit-5 has to remain ‘1’)
B7: Channel Stop Point. 0=At the end of current buffer, 1=Immediately stop when receiving Stop
command.
B11~B8: Sampling Rate. 0000=5.5Khz, 0001=8Khz, 0010=9.6Khz, 0011=11.025Khz,
0100=16Khz, 0101=19.2Khz, 0110=22.05Khz, 0111=32Khz, 1000=38.4Khz, 1001=44.1Khz,
1010=48Khz.
B13~B12: Channel Format2. 00=2 Ch, 01=4 Ch, 10=6 Ch, 11=MS 6-Ch.
B14: Data Format. 0=8-bit unsigned, 1=16-bit signed.
B15: Stereo/Mono. 0=Mono, 1=Stereo.
* B15~B5, B2~B1: read/write by host. B0:read only.
Playback Channel Data Length/Current Count
•
•
•
15
-
14
-
Host Offset Address: 0x0A - 0x0B
Power-on value: 0xXXXX
Description: Direct Sound Playback Channel Data Length & Current Count.
13
12
11
10
9
8
7
6
5
4
3
2
-
1
-
1
When 'stop transfer' command is received, current buffer transfer has to be finished before PCI
actually stops sending any transfer request so that Sw driver can track where the current pointer
is. When it overruns, the DFC has to overwrite the old data with the latest data.
2
4-channel format will be: L/R/LS/RS. 6-channel format will be: L/R/LS/RS/CT/LFE.
Rev. 2.0
May 00
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 36
0
-
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FM801-AU
ortéMedia
PCI Audio Controller
B15~B0(write): DS Channel Data Length for buffer I and II (Have to be the same size for both
buffers). The actual transfer count will be this register value plus 1.
B15~B0(read): DS Channel Data Current Remaining Count.(not available until playback starts)
* B15~B0: read/write by host.
Playback Channel Buffer I System Starting Address
•
•
•
31
15
-
30
14
-
Host Offset Address: 0x0C - 0x0F
Power-on value: 0xXXXX
Description: Direct Sound Playback Channel Buffer I System Starting Address.
29
28
27
26
25
24
23
22
21
20
19
18
17
13
12
11
10
9
8
7
6
5
4
3
2
1
-
16
0
-
B31~B0(write): DS Playback Channel Buffer I System Starting Address.
B31~B0(read): DS Playback Channel Buffer I current address.
* B31~B0: read/write by host.
Playback Channel Buffer II System Starting Address
•
•
•
31
15
-
30
14
-
Host Offset Address: 0x10 - 0x13
Power-on value: 0xXXXX
Description: Direct Sound Playback Channel Buffer II System Starting Address.
29
28
27
26
25
24
23
22
21
20
19
18
17
13
12
11
10
9
8
7
6
5
4
3
2
1
-
16
0
-
B31~B0(write): DS Playback Channel Buffer II System Starting Address.
B31~B0(read): DS Playback Channel Buffer II current address.
* B31~B0: read/write by host.
Capture Channel Control
•
•
•
15
1
14
1
Host Offset Address: 0x14 – 0x15
Power-on value: 0xCA00
Description: Direct Sound Capture Channel Control.
13
12
11
10
9
8
7
6
5
0
1
0
1
0
0
0
0
4
0
3
0
2
0
1
0
B0: Reserved.
B1: Current buffer I transfer is the last transfer. 0=No, 1=Yes.
B2: Current buffer II transfer is the last transfer. 0=No, 1=Yes.
B4~B3: SRC Input Sampling Rate. 00=48KHz, 01=44.1KHz, 10=32KHz, 11=reserved.
B5: Channel Action. 0=Stop Transfer, 1=Start Transfer3.
B6: Channel Pause. 0=Normal, 1=Transfer Pause. (To pause, bit-5 has to remain ‘1’)
3
When 'stop transfer' command is received, current buffer transfer has to be finished before PCI
actually stops sending any transfer request so that Sw driver can track where the current pointer
is. When it overruns, the DFC has to overwrite the old data with the latest data.
Rev. 2.0
May 00
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 37
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FM801-AU
ortéMedia
PCI Audio Controller
B7: Channel Stop Point. 0=At the end of current buffer, 1=Immediately stop when receiving Stop
command.
B11~B8: Sampling Rate. 0000=5.5Khz, 0001=8Khz, 0010=9.6Khz, 0011=11.025Khz,
0100=16Khz, 0101=19.2Khz, 0110=22.05Khz, 0111=32Khz, 1000=38.4Khz, 1001=44.1Khz,
1010=48Khz.
B12: Reserved.
B13: Capture SRC bypass enable. 1=Bypass mode, 0=Normal.
B14: Data Format. 0=8-bit unsigned, 1=16-bit signed.
B15: Stereo/Mono. 0=Mono, 1=Stereo.
* B15~B14, B11~B5, B2~B0: read/write by host.
Capture Channel Data Length/Current Count
•
•
•
15
-
14
-
Host Offset Address: 0x16 - 0x17
Power-on value: 0xXXXX
Description: Capture Channel Data Length & Current Count.
13
12
11
10
9
8
7
6
5
4
-
3
-
2
-
1
-
0
-
B15~B0(write): Capture Channel Data Length for buffer I and II (Have to be the same size for both
buffers). The actual transfer count will be this register value plus 1.
B15~B0(read): DS Channel Data Current Remaining Count.(not available until capture starts)
* B15~B0: read/write by host.
Capture Channel Buffer I System Starting Address
•
•
•
31
15
-
30
14
-
Host Offset Address: 0x18 - 0x1B
Power-on value: 0xXXXX
Description: Capture Channel Buffer I System Starting Address.
29
28
27
26
25
24
23
22
21
20
19
13
12
11
10
9
8
7
6
5
4
3
-
18
2
-
17
1
-
16
0
-
Host Offset Address: 0x1C - 0x1F
Power-on value: 0xXXXX
Description: Direct Sound Playback Channel Buffer II System Starting Address.
29
28
27
26
25
24
23
22
21
20
19
18
17
13
12
11
10
9
8
7
6
5
4
3
2
1
-
16
0
-
B31~B0(write): Capture Channel Buffer I System Starting Address.
B31~B0(read): Capture Channel Buffer I current address.
* B31~B0: read/write by host.
Capture Channel Buffer II System Starting Address
•
•
•
31
15
-
30
14
-
B31~B0(write): Capture Channel Buffer II System Starting Address.
B31~B0(read): Capture Channel Buffer II current address.
* B31~B0: read/write by host.
Rev. 2.0
May 00
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 38
F
FM801-AU
PCI Audio Controller
ortéMedia
Codec Control
•
•
•
15
14
Host Offset Address: 0x22 - 0x23
Power-on value: 0x0000
Description: Audio Codec Control.
13
12
11
10
9
8
0
0
0
0
7
0
6
0
5
1
4
3
2
1
0
2
1
1
0
1
B4~B0: Reserved.
B5: Codec Cold Reset. 1=Cold Reset, 0=Normal.
B6: AC’97 Warm Reset. 1=Warm Reset, 0=Normal.
B7: 2-Ch to 4-Ch copy mode enable. 1=Enable, 0=Disable.
B8: AC’97 ATE Test Mode. 1=ATE Test Mode On, 0=Normal.
B9: AC’97 GPIO Mode is enable. 1=Enable, 0=Disable.
B10: AC97 16/18bit mode. 1=18-bit, 0=16-bit.
B11: AC97 Variable Sample Rate support. 1=Yes, 0=No.
B15~B12: Reserved.
*B11~B5: read/write by Host.
I2S Mode / SPDIF Control
•
•
•
15
14
Host Offset Address: 0x24 – 0x25
Power-on value: 0x0003
Description: I2S Serial Port Data Format Mode and SPDIF Control.
13
12
11
10
9
8
7
6
5
4
3
0
0
0
0
0
0
B1~B0: I2S Format. 00, 01=DAC, Digital Format. 10=ADC, DSP Serial Port, 11=I2S Mode.
B4~B2: Reserved.
B5: I2S Sample Rate Source Select. 1=Sw Control, 0=Hw Logic Detect.
B7~B6: I2S Sampling Rate. 00=48Khz, 01=44.1Khz, 10=32Khz.
B8: I2S Mode/SPDIF Data In mode. I-SPDIF Data In Mode. 0=I2S Mode.
B9: SPDIF Data Out Pass Through. 1=AC-3 Raw Data Pass Through Mode. 0=Decoded Audio
Data Mode.
B10: SPDIF Data In Pass Through. 1=AC-3 Raw Data Pass Through Mode. 0=Decoded Audio
Data Mode.
B15~B11: Reserved.
*B10~B5, B1~B0: read/write by Host.
Volume Up/Dn/Mute Status & Volume Counter Enable
•
•
•
7
6
Host Offset Address: 0x26
Power-on value: 0xXX
Description: Volume Up/Dn/Mute Status(Read) & Volume Counter Enable(Write).
5
4
3
2
1
0
7
6
5
4
3
2
1
0
0
B0: Volume Up button is pushed. 1=Pushed, 0=No activity.
B1: Volume Down button is pushed. 1=Pushed, 0=No activity.
B2: Volume Mute button is pushed. 1=Pushed, 0=No activity.
B7~B3: Reserved.
* B2~B0: read only by host.
Rev. 2.0
May 00
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 39
0
0
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FM801-AU
PCI Audio Controller
ortéMedia
** When write to this register will enable the volume control counter to start counting.
** When both volume up and down are pushed at the same time, it will mute the volume.
I2C Control
•
•
•
•
15
0
14
0
Host Offset Address : 0x29
DSP I/O Address : N/A
Power-on value : 0x00
Description : I2C Control.
13
12
11
10
9
0
0
0
0
0
8
0
7
6
5
4
3
2
1
0
Host Offset Address: 0x2A – 0x2B
Power-on value: 0x0000
Description: Audio Codec Index Register Command Port.
13
12
11
10
9
8
7
6
5
4
0
0
0
0
0
-
3
-
2
-
1
-
0
-
3
-
2
-
1
-
0
-
B8: I2C Clock output.
B9: I2C Data output.
B10: I2C Chip select. 1=Enable, 0=Disable.
B11: I2C Port Enable. 1=Enable, 0=Disable.
B12: I2C read. 1=Read from EPROM, 0=Disable.
B13: I2C read from beginning of EPROM.
B14: I2C 4 bytes data are ready. 1=Ready, 0=Not ready.
B15: I2C Data Input. 1=Enable, 0=Disable.
* B15~B14: read only by host. B11~B8: read/write by host.
Codec Index Register Command Port
•
•
•
15
14
B6~B0: Codec Index Address.
B7: Read/Write Command. 0=Write, 1=Read.
B8: Data Port Valid Flag. 0=Invalid, 1=Valid.
B9: Command Port Status. 0=Ready, 1=Busy.
B11~B10: Codec ID been programmed.
* B9~B8: read only. B11~B10, B7~B0: read/write by host.
Codec Index Register Data Port
•
•
•
15
-
14
-
Host Offset Address: 0x2C - 0x2D
Power-on value: 0xXXXX
Description: Audio Codec Index Register Data port
13
12
11
10
9
8
7
6
5
-
4
-
B15~B0: Codec Register data port.
* B15~B0: read/write by host.
MPU401 Data Port
•
•
Rev. 2.0
May 00
Host Offset Address: 0x30
Power-on value: N/A
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 40
F
FM801-AU
•
15
PCI Audio Controller
ortéMedia
14
Description: MPU401 Data Port.
13
12
11
10
9
8
7
-
6
-
5
-
4
-
3
-
2
-
1
-
0
-
5
4
3
2
1
0
5
4
3
0
2
0
1
0
0
0
1
0
B7~B0: MPU401 Data [7:0]
* B7~B0: read/write by Host.
MPU401 Command/Status Port
•
•
•
15
1
14
0
Host Offset Address: 0x31
Power-on value: 0x80
Description: MPU401 Command/Status Port.
13
12
11
10
9
8
7
6
0
0
0
0
0
0
B15~B8(Write): MPU401 Command [7:0]
* B15~B8: Write by Host.
B15(Read): MIDI Data Valid. 1=Not Valid, 0=Valid.
B14(Read): MIDI Cmd/Data Port Status. 1=Busy, 0=Not Busy.
B13~B10(Read): MIDI Valid Data Count.
B9~B8(Read): Reserved.
* B13~B10: read by Host.
General Purpose I/O Control
•
•
•
15
0
14
0
Host Offset Address: 0x52 – 0x53
Power-on value: 0x0E00
Description: General Purpose I/O Pins Control.
13
12
11
10
9
8
7
6
0
0
1
1
1
0
B3~B0: General Purpose I/O [3:0] (Go through FM801-AU)
B7~B4: Reserved.
B11~B8: General Purpose I/O [3:0] Configuration. 1=Input, 0=Output.
B15~B12: General Purpose Output Pins Select [3:0]. 1=GPIO select, 0=Other functions.
* B15~B0: read/write by Host.
FM801-AU Blocks Power Down Control
•
•
•
15
0
14
Host Offset Address: 0x70 - 0x71
Power-on value: 0x0000
Description: This register will power down the Hw blocks in FM801-AU.
13
12
11
10
9
8
7
6
5
4
3
2
0
B15: Shutdown 24.576Mhz to Audio block. 1=Shutdown, 0=Normal.
B14~B9: Reserved.
B8: PCI Clock can be turn off. 1=Ready, 0=Not ready to power down.
* B15, B8: read/write by host
Rev. 2.0
May 00
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 41
F
FM801-AU
ortéMedia
PCI Audio Controller
FM801-AU GamePort Device Control Registers Summary Table
This section describes the summary and details of FM801-AU GamePort Control
Registers.
Table FM801-AU GamePort Device Control Registers Summary Table
Host Offset Host
Power-on Value Description
R/W
0x00~01
R/W
Conventional Game Port
0x02~03
R
Game Port J1-X Counter
0x04~05
R
Game Port J1-Y Counter
0x06~07
R
Game Port J2-X Counter
0x08~09
R
Game Port J2-Y Counter
0x0D
R/W
0x6000
Game Port Control
FM801-AU GamePort Device Control Registers Detailed
Description
Conventional Game Port
•
•
•
15
-
14
-
GamePort Host Offset Address: 0x00 – 0x01
Power-on value: N/A
Description: Game Port. Write any value to this port will reset the register value. This
register is an alias of the legacy gameport register at 0x200~0x201.
13
12
11
10
9
8
7
6
5
4
3
2
1
0
-
B8, B0: Joystick 1P X-axis.
B9, B1: Joystick 1P Y-axis.
B10, B2: Joystick 2P X-axis.
B11, B3: Joystick 2P Y-axis.
B12, B4: Joystick 1P Button A.
B13, B5: Joystick 1P Button B.
B14, B6: Joystick 2P Button A.
B15, B7: Joystick 2P Button B.
* B15~B8, B7~B0: read/write by Host
Game Port J1-X Counter
•
•
•
15
-
14
-
GamePort Host Offset Address: 0x02 - 0x03
Power-on value: N/A
Description: Game Port Joystick 1P X-counter. Write any value to “Conventional
game port”(0x00) will reset the register value.
13
12
11
10
9
8
7
6
5
4
3
2
1
-
B12~B0: Game Port Joystick 1P X-axis counter value.
B13: Reserved.
B14: Joystick 1P Button A.
B15: Joystick 1P Button B.
* B15~B14, B12~B0: read only by Host.
Rev. 2.0
FM801-AU DataSheet
May 00
ForteMedia, Inc. San Jose, CA
Page 42
0
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F
FM801-AU
PCI Audio Controller
ortéMedia
Game Port J1-Y Counter
•
•
•
15
14
GamePort Host Offset Address: 0x04 - 0x05
Power-on value: N/A
Description: Game Port Joystick 1P Y-counter. Write any value to “Conventional
game port”(0x00) will reset the register value.
13
12
11
10
9
8
7
6
5
4
3
2
1
-
0
-
B12~B0: Game Port Joystick 1P Y-axis counter value.
B15~B13: Reserved.
* B12~B0: read only by Host.
Game Port J2-X Counter
•
•
•
15
-
14
-
GamePort Host Offset Address: 0x06 - 0x07
Power-on value: N/A
Description: Game Port Joystick 2P X-counter. Write any value to “Conventional
game port”(0x00) will reset the register value.
13
12
11
10
9
8
7
6
5
4
3
2
1
-
0
-
B12~B0: Game Port Joystick 2P X-axis counter value.
B13: Reserved.
B14: Joystick 1P Button A.
B15: Joystick 1P Button B.
* B15~B14, B12~B0: read only by Host.
Game Port J2-Y Counter
•
•
•
15
14
GamePort Host Offset Address: 0x08 - 0x09
Power-on value: N/A
Description: Game Port Joystick 2P Y-counter. Write any value to “Conventional
game port”(0x00) will reset the register value.
13
12
11
10
9
8
7
6
5
4
3
2
1
-
0
-
B12~B0: Game Port Joystick 2P Y-axis counter value.
B15~B13: Reserved.
* B12~B0: read only by Host.
Game Port Control
•
•
•
15
0
14
1
GamePort Host Offset Address: 0x0D
Power-on value: 0x6000
Description: Game Port Control.
13
12
11
10
9
8
7
1
0
0
0
0
0
0
6
0
5
0
4
0
3
0
2
1
B2~B0: Reserved.
B3: Game Port trigger PME Enable. 1=Enable, 0=Disable.
Rev. 2.0
May 00
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 43
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FM801-AU
ortéMedia
PCI Audio Controller
B4: Shutdown 24.576MHz to GamePort. 1=Shutdown. 0=Normal.
B5: GamePort INT Status/Clear. (Read) 1=GamePort is triggered. 0=Not triggered. Write "1" to
this bit will clear the status, write "0" to this bit will have no effect.
B7~B6: GamePort Discharge Time. 00=1us. 01=2us. 10=4us. 11=8us.
B9~B8: Game Port Movement Resolution. 00=9-bit, 01=8-bit, 10=7-bit, 11=6-bit.
B10: Intelligent Game Port Mode Enable. 1=On(Motion/push button auto detect), 0=Off.
B11: Func1 PCI clock can be turned off. 1=Ready. 0=Not ready to power down.
B12: Game Port Power Saving Mode. 1=On(No discharge after charging to 1), 0=Off.
B13: Game port Joystick 1 enable/disable. 1=Enable, 0=Disable.
B14: Game port Joystick 2 enable/disable. 1=Enable, 0=Disable.
B15: Game Port Sw reset. 1=Reset, 0=Normal.
*B15~B3: read/write by host.
Rev. 2.0
May 00
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 44
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FM801-AU
PCI Audio Controller
ortéMedia
TIMING REQUIREMENT
PCI Timing Requirement
Symbol
tPCKP
tPCKL
tPCKH
tSPCI
tHPCI
tPPCI
T_val
T_su
T_hold
Parameter
PCI Bus Clock Period
PCI Bus Clock Low Time
PCI Bus Clock High Time
Input Setup Time to PCI_CLK
Input Hold Time to PCI_CLK
Output propagation
delay from PCI_CLK
Min.
30
12
12
Max.
Units
ns
ns
ns
ns
ns
ns
20
PCI clock to bus valid delay
Input set up time to clock
Input hold time from clock
1
Typ
7
2
0
2
17
3
Notes
0 pf load
50 pf load
ns
ns
ns
4
5
6
PCI_CLK
tspc
PFRAME
thpci
Tspci
PAD[31:0]
tppci
tppci
DATA 1
ADDRESS
Tspci
CBE#[3:0]
thpci
thpci
BE#[3:0]
C[3:0]
tspci
thpci
PIRDY
tppci
tppci
PTRDY
PDEVSEL
tppci
tppci
PPAR
tppci
VALID
Figure: PCI Bus Timing (I/O Read Operation)
Rev. 2.0
May 00
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 45
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FM801-AU
PCI Audio Controller
ortéMedia
1
2
3
4
PCI_CLK
tspc
PFRAME
tspci
PAD[31:0]
PIRDY
tspci
ADDRESS
Tspci
CBE#[3:0]
thpci
thpci
thpci
C[3:0]
tspci
thpci
tppci
PTRDY
PDEVSEL
tppci
Figure:
Rev. 2.0
May 00
PCI Bus Timing (I/O Write Operation)
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 46
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FM801-AU
PCI Audio Controller
ortéMedia
I2S TIMING (I/O OPERATION)
Symbol
Ti2scyc
Tir_setup
Tir_hold
Tsd_setup
Tsd_hold
Parameter
I2S clock cycle time
LRCK setup
LRCK hold time
I2S Data setup time
I2S Data hold time
Min.
Typ
Max.
Units
Notes
Typ
Max.
Units
Notes
54
10
2
10
2
AC-Link TIMING
Symbol
Tsdi_setup
Tsdi_hold
Tsdo_dly
Tsync_dly
Tsclk_cyc
Rev. 2.0
May 00
Parameter
AC97 SDI setup time
AC97 SDI hold time
SCLK positive-dege to SDO
ready
SCLK positive-edge to SYNC
ready
SCLK cycle time
Min.
15
5
6
15
6
15
81.38
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 47
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FM801-AU
PCI Audio Controller
ortéMedia
ABSOLUTE MAXIMUM RATINGS
The values listed below are stress ratings only. Functional operation at the maximum ratings is not
recommended or guaranteed. The device’s reliability is affected if the operated for extended
periods a maximum ratings. Electrostatic discharge damage may result from high static voltages or
electric fields.
Symbol
DVDD
VID
VESD
TOPER
TSTG
PDMAX
Parameter
Digital Power Supply
Digital Input Voltage
ESD Tolerance
Operating Temperature
Storage Temperature
Maximum Power Dissipation at Tj=125οC
DIGITAL CHARACTERISTICS
Symbol
Parameter
lil
lih
loz
Vil
Vih
Vol
Voh
Cin
Cout
Rev. 2.0
May 00
Low level Input Current
High level Input Current
Tristate Output Leakage Current
Low level Input Voltage
High level Input Voltage
Low level Output Voltage
High level Output Voltage
Input Capacitance
Output Capacitance
Condition
Vin=Vss
Vin=Vdd
Vout=Vdd/Vss
TTL-static
TTL-static
TTL-static
TTL-static
1Mhz @ 0V
1Mhz @ 0V
Min.
-10
-10
-10
Min
Max
Units
-0.3
-0.3
2000
0
-65
5.5
5.5
V
V
V
ο
C
ο
C
mW
Typ.
+70
+150
1000
Max.
units
10
10
10
0.8
uA
uA
uA
V
V
V
V
pF
pF
2.0
0.4
2.4
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
10
10
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PCI Audio Controller
ortéMedia
ELECTRICAL CHARACTERISTICS
AC-Link Signals DC Characteristic
Symbol
Parameter
Min.
Vin
Input Voltage Range
Vss
Vil
Low level input Voltage
Vih
High level input Voltage
2.0
Voh
High level output Voltage
2.4
Vol
Low level output Voltage
Input leakage Current
-1
Output leakage Current
-1
ο
ο
Note: TA= C to 70 C; VDD= 3.3V+-10%; VSS=0V
Max.
5.5
0.8
0.4
1
1
Units
V
V
V
V
V
uA
uA
ELECTRICAL CHARACTERISTICS FOR 3V POWER SUPPLY
The FM801-AU device operates properly when the case Temperature (Tc) is within the specified
temperature range of 0οC to 70οC
PARAMETER
SYMBOL
CONDITIONS
MIN.
Input Voltage
(LV-TTL level)
Schmidt Trigger
Voltage
Output Voltage
VLHT
VLLT
Vtt+
VttDelta Vtt
VOHT
Vdd=Max
Vdd=Min
Vdd=Min
Ioh=-2/6/12mA
Output Voltage
Vohc
PCI
(Vcc=3.3V+/-0.3v)
Input Leakage(I)
Output Leakage(I)
Pull_Down
Resistance
Supply Current
Rev. 2.0
May 00
TYP.
MAX.
2.0
Vss
-1.1
0.6
0.1
Vdd-0.4
-
5.5
0.8
2.4
1.8
-
V
V
V
V
V
V
Ioh=-200uA
Vcc-0.1
-
-
V
Vih
Vil
Vdd=Max
Vdd=Min
1.71
-
0.98
V
V
Ili
Ilo
R
At High Impedance
Vin=Vdd
40
100
1
1
240
uA
uA
K-ohm
Idd
At operating State
-
25
40
ma
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 49
UNITS
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FM801-AU
ortéMedia
PCI Audio Controller
PACKAGING DIMENSIONS
100 pin QFP – Plastic Low Profile Quad Flat Pack,
14 mm x 14 mm x 1.4 mm Body.
Units: mm
Rev. 2.0
May 00
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 50
F
FM801-AU
PCI Audio Controller
ortéMedia
Note:
•
•
ForteMedia reserves the right to make changes to its Products and documents without notice.
ForteMedia also assumes no responsibilities for inaccuracies and makes no commitment to
update or to keep current the information contained in this document.
ForteMedia assumes no liability for incidental, consequential or special damages or injury that
may result from misapplication or improper use or operation of the products.
ForteMedia Inc.
1150 S. Bascom Ave.
Suite 28
San Jose, California 95128
Tel: (408) 294-7888
Fax: (408) 294-8089
Rev. 2.0
May 00
FM801-AU DataSheet
ForteMedia, Inc. San Jose, CA
Page 51
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