CH7530A Chrontel Brief Datasheet CH7530A DP++ to HDMI/DVI Level Shifter FEATURES GENERAL DESCRIPTIONS Chrontel’s CH7530A is a low-cost, low-power semiconductor device that translates the DisplayPort dual mode HDMI output is compliant with HDMI specification signal to HDMI/DVI signal. This innovative device, which version 1.4b and DVI specification version 1.0 integrates programmable equalizer, high speed TMDS level HDMI output supports up to 300 MHz TMDS shifter and IIC to AUX translator, is specially designed to clock for video transport with resolution up to target the DP++ to HDMI/DVI adaptor device, docking [email protected] or [email protected] station and PC market segments. IIC-over-AUX transaction supported DDC buffer and related control register integrated The CH7530A is compliant with the DisplayPort dual HDMI Identifier supported mode standard specification version 1.1. With Single 3.3V power supply sophisticated equalizer and high-speed TMDS level shifter 5V HDMI power supply output supported with over integrated, the device’s TMDS signal output is compliant 50mA current output capability with HDMI specification version 1.4b and DVI Programmable equalizer specification version 1.0, and supports video resolution up Programmable Pre-Emphasis on output driver to [email protected] or [email protected] for 3D supported applications. CEC isolation switch supported Low power architecture The CH7530A also integrates the HDMI identifier, IIC Anti-Back Drive design on sink-side pins over AUX translator and the related DDC control RoHS compliant and Halogen free package registers, which enables the programmable HDMI or DVI Crystal free output and supports both DDC and AUX signaling on the Offered in 40-Pin QFN Package (5 x 5 mm) upstream DisplayPort connector. With step-up regulator integrated, CH7530A supports 5V power supply output for HDMI/DVI configuration. Compliant with DisplayPort Dual mode Specification version 1.1 Application DP++ to HDMI/DVI type 2 Cable Adaptor Docking Station Notebook/Ultrabook/AIO 209-1000-126 Rev 0.4 2016-4-1 1 CHRONTEL CH7530A HDMI / DVI DP ++ Programmable Equalizer High-speed Level Shifter PreEmphasis HDMI Identifier & DDC Control Registers DDC AUX/DDC IIC over AUX Translation DDC Buffer HPD HPD_IN CEC CEC Gate Circuit 3.3V 5V 3.3V to 5V Regulator Figure 1: CH7530A Functional Block Diagram 2 209-1000-126 Rev 0.4 2016-4-1 CHRONTEL CH7530A 1.0 PIN-OUT Package Diagram CEC_SC CEC_SK AVCC PCN PCP V5OUT EQ PREEM CFG DDC_MOD 40 39 38 37 36 35 34 33 32 31 VCC12 1 30 TDC2+ D0P 2 29 TDC2- D0N 3 28 AVCC D1P 4 27 TDC1+ D1N 5 26 TDC1- AVCC 6 25 TDC0+ D2P 7 24 TDC0- D2N 8 23 AVCC D3P 9 22 TLC+ D3N 10 21 TLC- CHRONTEL CH7530A 12 13 14 15 16 17 18 19 20 AUXP AUXN DDC_SDA DDC_SCL DDC_EN VSWING AVCC VCC12 HPD_OUT HPD_IN QFN40 11 1.1 Figure 2: CH7530A 40-Pin QFN Pin Out 209-1000-126 Rev 0.4 2016-4-1 3 CHRONTEL 1.2 CH7530A Pin Description Table 1: CH7530A QFN 40-Pin Descriptions 4 Pin # 2,3,4,5, 7,8,9,10 Type In Symbol D[3:0]P/N 11 Out HPD_OUT Description DP Dual Mode Main Link Differential Line Input These pins accept four AC-coupled differential pairs signals from the DisplayPort transmitter. DP Dual Mode Receiver Hot Plug Output 12 In HPD_IN HDMI/DVI Transmitter Hot Plug Input 13,14 In/Out AUXP, AUXN 15 In/Out DDC_SDA 16 Out DDC_SCL 17 In DDC_EN 18 Out VSWING 21,22 Out TLC-,TLC+ 24,25 Out TDC0-,TDC0+ 26,27 Out TDC1-,TDC1+ 29,30 Out TDC2-,TDC2+ 31 In DDC_MOD 32 In CFG 33 In PREEM 34 In EQ 35 Out V5OUT 36 In PCP AUX Channel Differential Input/Output These two pins are DisplayPort AUX Channel control, which supports a half-duplex, bi-directional AC-coupled differential signal. Serial Port Data to HDMI/DVI Receiver The pin should be connected to data signal of HDMI DDC. This pin requires a pull-up 10 kΩ resistor to the desired voltage level Serial Port Clock Output to HDMI/DVI Receiver The pin should be connected to clock signal of HDMI DDC. This pin requires a pull-up 10 kΩ resistor to the desired voltage level Enables the DDC buffer and level shifter When DDC_EN = LOW, buffer/level shifter is disabled. When DDC_EN = HIGH, buffer and level shifter are enabled To prevent the back drive from sink via DDC channel. This pin requires a pull-up kΩ resistor to AVCC HDMI/DVI Swing Control This pin sets the swing level of the HDMI/DVI outputs. A 10kΩ with 1% tolerance resistor should be connected between this pin and TGND using short and wide traces. HDMI/DVI Clock Outputs These pins provide the differential clock output for the HDMI/DVI . HDMI/DVI Data Channel 0 Outputs These pins provide the DVI differential outputs for data channel 0 HDMI/DVI Data Channel 1 Outputs These pins provide the DVI differential outputs for data channel 1 HDMI/DVI Data Channel 2 Outputs These pins provide the DVI differential outputs for data channel 2 DDC buffer selection This pin can be board-strapped to one of four decode values: short to AVCC, 10kΩ resistor to AVCC, open-circuit, 10kΩ resistor to AVSS[1] HDMI/DVI selection HIGH for HDMI, LOW for DVI Pre-emphasis Setting This pin can be board-strapped to one of five decode values: short to AVSS, 10kΩ resistor to AVSS, open-circuit, 10kΩ resistor to AVCC, short to AVCC[2] Programmable Equalizer Setting Equalizer setting. This pin can be board-strapped to one of five decode values: short to AVSS, 10kΩ resistor to AVSS, open-circuit, 10kΩ resistor to AVCC, short to AVCC[3] 5V Power Supply Output 5V regulated output from the integrated voltage regulator Positive terminal for the Power regulator external capacitor 37 In PCN Negative terminal for the Power regulator external capacitor 39 In/Out CEC_SK CEC Pin to HDMI Sink 209-1000-126 Rev 0.4 2016-4-1 CHRONTEL CH7530A 40 In/Out CEC_SC CEC Pin to DP dual mode Source 1,20 Power VCC12 Analog Power Supply (1.2V) with internal LDO 6,19,23, 28,38 Therma l Pad Power AVCC Analog Power Supply (3.3V) Power AVSS Analog Ground Notes: 1. This pin provides DDC buffer configuration, the details are as follow: Table 2: Pin DDC_MOD Configuration Short to AVCC 10k to AVCC OPEN CIRCUIT Options 10k or short to AVSS DDC buffer Active buffer Passive buffer Active buffer Passive buffer PD_LDO 1 1 0 0 2. Table 3: Driver settings Short to AVCC Options Driver Settings 0dB 3. Table 4: Equalizer settings Short to AVCC Options EQ Settings 1dB 209-1000-126 Rev 0.4 10k to AVCC OPEN CIRCUIT 10k to AVSS Short to AVSS 3dB 5dB 7dB 10dB 10k to AVCC OPEN CIRCUIT 10k to AVSS Short to AVSS 4dB 7dB 10dB 13dB 2016-4-1 5 CHRONTEL CH7530A 2.0 PACKAGE DIMENSIONS Figure 3: 40 Pin QFN Package Table 5: Table of Dimensions No. of Leads 40 (5 X 5 mm) MIN Millimeters MAX A 4.90 5.10 B 3.20 3.40 C 3.20 3.40 D 0.4 SYMBOL E F 0.15 0.35 0.25 0.45 G 0.80 0.90 H 0 0.05 I 0.203 REF Notes: 1. Conforms to JEDEC standard JESD-30 MO-220. 6 209-1000-126 Rev 0.4 2016-4-1 CHRONTEL CH7530A 3.0 REVISION HISTORY Rev. # 0.1 0.2 Date 02/18/2014 10/28/2014 0.3 0.4 03/18/2015 03/30/2016 209-1000-126 Rev 0.4 Section All Feature List 1.1, 1.2 2.0 1.2 Feature List 2016-4-1 Description Initial Draft for CH7530A RevA Update the feature list Update the pin out and the description information Update the package dimensions Update the pin out description Update the feature list 7 CHRONTEL CH7530A Disclaimer This document provides technical information for the user. Chrontel reserves the right to make changes at any time without notice to improve and supply the best possible product and is not responsible and does not assume any liability for misapplication or use outside the limits specified in this document. We provide no warranty for the use of our products and assume no liability for errors contained in this document. The customer should make sure that they have the most recent data sheet version. Customers should take appropriate action to ensure their use of the products does not infringe upon any patents. Chrontel, Inc. respects valid patent rights of third parties and does not infringe upon or assist others to infringe upon such rights. Chrontel PRODUCTS ARE NOT AUTHORIZED FOR AND SHOULD NOT BE USED WITHIN LIFE SUPPORT SYSTEMS OR NUCLEAR FACILITY APPLICATIONS WITHOUT THE SPECIFIC WRITTEN CONSENT OF Chrontel. Life support systems are those intended to support or sustain life and whose failure to perform when used as directed can reasonably expect to result in personal injury or death. ORDERING INFORMATION Part Number Package Type Operating Temperature Range CH7530A-BF 40 QFN, Lead-free Commercial : 0 to 70C Minimum Order Quantity 490/Tray Chrontel Chrontel International Limited 129 Front Street, 5th floor, Hamilton, Bermuda HM12 www.chrontel.com E-mail: [email protected] 2016 Chrontel - All Rights Reserved. 8 209-1000-126 Rev 0.4 2016-4-1
* Your assessment is very important for improving the work of artificial intelligence, which forms the content of this project
advertisement