RDA5807SP - Elechouse

RDA5807SP - Elechouse
RDA5807SP
SINGLE-CHIP BROADCAST FM RADIO TUNER
1
Rev.1.1 Jun.2009
General Description
The RDA5807SP is a single-chip broadcast FM
stereo radio tuner with fully integrated synthesizer,
IF selectivity and MPX decoder. The tuner uses
the CMOS process, support multi-interface and
require the least external component. The
package size is SOP16. It is completely
adjustment-free. All these make it very suitable for
portable devices.
The RDA5807SP has a powerful low-IF digital
audio processor, this make it have optimum sound
quality with varying reception conditions.
The RDA5807SP can be tuned to the worldwide
frequency band.
1.1
Features
l
CMOS single-chip fully-integrated FM tuner
l
Low power consumption
Signal dependent mono to stereo blend [Stereo
l
Adjustment-free stereo decoder
l
Autonomous search tuning function
Support worldwide frequency band
l
Bass boost
Ø 76 -108 MHz
l
Standby mode
Digital low-IF tuner
Ø Image-reject down-converter
l
l
Programmable de-emphasis (50/75 µs)
Directly support 32Ω resistance loading
Ø High performance A/D converter
l
Integrated LDO regulator
e
at 3.3V power supply
l
l
Noise Cancelling (SNC)]
Ø Total current consumption low r than 17.5mA
l
Figure 1-1. RDA5807SP Top View
Ø IF selectivity performed internally
l
Autonomous search tuning
l
Support crystal oscillator
l
32.768 KHz 12M,24M,13M,26M,19.2M,38.4MHz
Reference clock
l
2-wire serial control bus interface
l
Digital auto gain control (AGC)
Ø
Mono/stereo switch
Ø
Soft mute
Ø
High cut
Ø 2.7 to 5.5 V operation voltage
l
1.2
SOP16 package
Applications
l
Cellular handsets
l
MP3, MP4 players
l
Portable radios
l
PDAs, Notebook PCs
Copyright © RDA Microelectronics Inc. 2008. All rights are reserved.
The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA.
RDA Microelectronics, Inc.
RDA5807SP FM Tuner V1.1
2
Table of Contents
1
General Description.................................................................................................................................... 1
1.1
Features ......................................................................................................................................... 1
1.2
Applications .................................................................................................................................. 1
2
3
Table of Contents ........................................................................................................................................ 2
Functional Description ............................................................................................................................... 3
3.1
FM Receiver ................................................................................................................................. 3
3.2
Synthesizer.................................................................................................................................... 3
3.3
Power Supply................................................................................................................................ 3
3.4
RESET and Control Interface select ............................................................................................. 4
3.5
Control Interface ........................................................................................................................... 4
3.6
GPIO Outputs ............................................................................................................................... 4
4
5
6
Electrical Characteristics ........................................................................................................................... 5
Receiver Characteristics............................................................................................................................. 6
Serial Interface............................................................................................................................................ 7
6.1
I2C Interface Timing ..................................................................................................................... 7
7
Pins Description ........................................................................................................................................ 8
8
Application Diagram ................................................................................................................................ 10
8.1
Audio Loading Resistance Lower than 32Ω & SOP16 Application: .......................................... 10
8.1.1
Bill of Materials: ......................................................................................................................... 10
9
Package Physical Dimension.................................................................................................................... 11
10 PCB Land Pattern: ................................................................................................................................ 12
11 Change list ................................................................................................................................................. 15
12 Contact Information ................................................................................................................................. 15
The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA.
Page 2 of 15
RDA Microelectronics, Inc.
3
RDA5807SP FM Tuner V1.1
Functional Description
Figure 3-1. RDA5807SP FM Tuner Block Diagram
3.1
FM Receiver
The receiver uses a digital low-IF architecture that
avoids the difficulties associated with direct
conversion while delivering lower solution cost
and reduces complexity, and integrates a low
noise amplifier (LNA) supporting the FM
broadcast band (76 to 108MHz), a quadrature
image-reject mixer, a programmable gain control
(PGA), a high resolution analog-to-digital
converters (ADCs), an audio DSP and a highfidelity digital-to-analog converters (DACs).
The LNA has differential input ports (LNAP and
LNAN). The LNA default input resistance is 150
Ohm under single or dual input mode. It default
input common mode voltage is GND.
The limiter prevents overloading and limits the
amount of intermodulation products created by
strong adjacent channels.
The quadrature mixer down converts the LNA
output differential RF signal to low-IF, it also has
image-reject function.
The PGA amplifies the mixer output IF signal and
then digitized with ADCs.
The DSP core finishes the channel selection, FM
demodulation, stereo MPX decoder and output
audio signal. The MPX decoder can autonomous
switch from stereo to mono to limit the output
noise.
The DACs convert digital audio signal to analog
and change the volume at same time. The DACs
has low-pass feature and -3dB frequency is about
30 KHz.
3.2
Synthesizer
The frequency synthesizer generates the local
oscillator signal which divide to quadrature, then
be used to down convert the RF input to a
constant low intermediate frequency (IF). The
synthesizer reference clock is 32.768 KHz,12M,
24M, 13M, 26M, 19.2M, 38.4MHz. select by CLK MODE[2:0]
BIT.
3.3
Power Supply
The RDA5807SP integrated one LDO which
supplies power to the chip. The external supply
voltage range is 2.7-5.5 V.
The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA.
Page 3 of 15
RDA Microelectronics, Inc.
3.4
RDA5807SP FM Tuner V1.1
after command byte from MCU, RDA5807SP
RESET and Control Interface select
sends out the first register high byte, then the first
The RDA5807SP is RESET itself When VIO is
Power up. And also support soft reset. The control
interface is select by MODE Pin. The MODE Pin
is low ,I2C Interface is select. The MODE Pin is
set to VIO, SPI Interface is select.
register low byte, then the second register high
The RDA5807SP could enter into a power-down
RDA5807SP will return the bus to MCU, and MCU
mode to reduce power consumption.
will give out STOP condition.
byte, till receives NACK from MCU. MCU gives out
ACK for data bytes besides last data byte. MCU
gives out NACK for last data byte, and then
In power-down mode, analog and digital circuitry
The RDA5807SP supported two type I2C
are both disabled, while maintaining register
interface:RDA5807SP Mode and TEA5767 Mode.
configuration and keeping control interface active.
Details refer to RDA5807SP Programming Guide.
The different register defined in different interface
3.5
Mode.
Details refer to RDA5807SP Programming Guide.
Control Interface
3.6
GPIO Outputs
2
The RDA5807SP supports I C control interface.
User could program the chip through the bus.
2
2
The I C interface is compliant to I C Bus
Specification 2.1. It includes two pins: SCLK and
2
SDIO. An I C interface transfer begins with
START condition, a command byte and data bytes,
each byte has a followed ACK (or NACK) bit, and
ends with STOP condition. The command byte
includes a 7-bit chip address and an R/W bit. The
ACK (or NACK) is always sent out by receiver.
When in write transfer, data bytes is written out
from MCU, and when in read transfer, data bytes
is read out from RDA5807SP. There is no visible
2
register address in I C interface transfers.
The RDA5807SP has three GPIOs and only used
in RDA5807SP Mode. The function of GPIOs
could programmed with bits GPIO1[1:0],
GPIO2[1:0], GPIO3[1:0] and I2SEN.
If I2SEN is set to low, GPIO pins could be
programmed to output low or high or high-Z, or be
programmed to output interrupt and stereo
indicator with bits GPIO1[1:0], GPIO2[1:0],
GPIO3[1:0]. GPIO2 could be programmed to
output a low interrupt (interrupt will be generated
only with interrupt enable bit STCIEN is set to high)
when seek/tune process completes. GPIO3 could
be programmed to output stereo indicator bit ST.
Constant low, high or high-Z functionality is
available regardless of the state of VDD supplies
or the ENABLE bit.
RDA5807SP always gives out ACK after every
byte, and MCU gives out STOP condition when
register programming is finished. For read transfer,
SCK
LEFTCHANNEL
WS
RIGHTCHANNEL
1SCK
SD
1SCK
MSB
LSB
MSB
LSB
Figure 3-2. I2S Digital Audio Format
The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA.
Page 4 of 15
RDA Microelectronics, Inc.
4
RDA5807SP FM Tuner V1.1
Electrical Characteristics
Table 4-1
SYMBOL
DC Electrical Specification (Recommended Operation Conditions):
DESCRIPTION
MIN
TYP
MAX
UNIT
VDD
Analog Supply Voltage
2.7
3.3
5.5
V
Tamb
Ambient Temperature
-20
27
+70
℃
VIL
CMOS Low Level Input Voltage
0
0.3*VDD
V
VIH
CMOS High Level Input Voltage
0.7*VDD
VDD
V
VTH
CMOS Threshold Voltage
Table 4-2
SYMBOL
Tamb
IIN
0.5*VDD
V
DC Electrical Specification (Absolute Maximum Ratings):
DESCRIPTION
MIN
MAX
UNIT
-40
+90
°C
(1)
-10
+10
mA
(1)
-0.3
VIO+0.3
V
-20
dBm
Ambient Temperature
Input Current
VIN
Input Voltage
Vlna
LNA FM Input Level
TYP
Notes:
1. for Pin: SCLK, SDIO, SEN, RST.
Table 4-3
Power Consumption Specification
(VDD = 2.7 to 5.5 V, TA = -25 to 85 ℃, unless otherwise specified)
SYMBOL
DESCRIPTION
CONDITION
TYP
UNIT
I
Analog Supply Current
ENABLE=1
17.5
mA
IPD
Analog Powerdown Current
ENABLE=0
5
µA
The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA.
Page 5 of 15
RDA Microelectronics, Inc.
5
RDA5807SP FM Tuner V1.1
Receiver Characteristics
Table 5-1
Receiver Characteristics
(VDD = 2.7 to 5.5 V, TA = -25 to 85 °C, unless otherwise specified)
SYMBOL
PARAMETER
CONDITIONS
MIN
BAND=0
BAND=1
TYP
MAX
UNIT
87
108
MHz
76
91
MHz
2
µV EMF
General specifications
Fin
FM Input Frequency
Vrf
Sensitivity
Rin
1,2,3
(S+N)/N=26dB
LNA Input Resistance
Cin
LNA Input Capacitance
2
Input IP3
AGCD=1
80
m=0.3
40
±200KHz
45
1,2
αam
AM Suppression
S200
Ω
150
7
4
IP3in
1.5
7
Adjacent Channel Selectivity
4
-
6
pF
-
dBµV
-
dB
-
dB
Left and Right Audio
VAFL; VAFR
Frequency Output Voltage
Volume_dac[3:0] =1111
110
mV
(Pins LOUT and ROUT)
(S+N)/N
αSCS
Maximum Signal Plus Noise
1,2,3,5
to Noise Ratio
Stereo Channel Separation
60
-
dB
35
-
-
dB
0.3
0.5
%
1
dB
-
Ω
Audio Total Harmonic
THD
αAOI
54
1,3,6
Distortion
Audio Output L/R Imbalance
Audio Output Loading
RL
Resistance
Single-ended
32
-
Pins LNAN, LNAP, LOUT, ROUT and NC(22,23)
Vcom_rfin
Pins LNAN and LNAP Input
Audio Output Common
Vcom
Vcom_nc
Mode Voltage8
Pins NC (22, 23) Common
Mode Voltage
V
Float
Common Mode Voltage
1.2
1.25
1.3
V
0.45
0.5
0.55
V
! The NC(22, 23) pins SHOULD BE left floating.
Notes:
1. Fin=76 to 108MHz; Fmod=1KHz; de-emphasis=75µs; MONO=1; L=R unless noted otherwise;
2. ∆f=22.5KHz;
3. BAF = 300Hz to 15KHz, RBW <=10Hz;
4. |f2-f1|>1MHz, f0=2xf1-f2, AGC disable, Fin=76 to 108MHz;
5. PRF=60dBUV;
6. ∆f=75KHz.
7. Measured at VEMF = 1 m V, f RF = 76 to 108MHz
8. At LOUT and ROUT pins
The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA.
Page 6 of 15
RDA Microelectronics, Inc.
6
6.1
RDA5807SP FM Tuner V1.1
Serial Interface
I2C Interface Timing
Table 6-1
I2C Interface Timing Characteristics
(VDD = 2.7 to 5.5 V, TA = -25 to 85 °C, unless otherwise specified)
PARAMETER
SYMBOL
TEST CONDITION
MIN
TYP
MAX
UNIT
SCLK Frequency
fscl
0
-
400
KHz
SCLK High Time
thigh
0.6
-
-
µs
SCLK Low Time
tlow
1.3
-
-
µs
Setup Time for START Condition
tsu:sta
0.6
-
-
µs
Hold Time for START Condition
thd:sta
0.6
-
-
µs
Setup Time for STOP Condition
tsu:sto
0.6
-
-
µs
SDIO Input to SCLK↑ Setup
tsu:dat
100
-
-
ns
SDIO Input to SCLK↓ Hold
thd:dat
0
-
900
ns
STOP to START Time
tbuf
1.3
-
-
µs
SDIO Output Fall Time
tf:out
20+0.1Cb
-
250
ns
tr:in / tf:in
20+0.1Cb
-
300
ns
Input Spike Suppression
tsp
-
-
50
ns
SCLK, SDIO Capacitive Loading
Cb
-
-
50
pF
5
pF
SDIO Input, SCLK Rise/Fall Time
Digital Input Pin Capacitance
2
Figure 6-1. I C Interface Write Timing Diagram
Figure 6-2. I2C Interface Read Timing Diagram
The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA.
Page 7 of 15
RDA Microelectronics, Inc.
7
RDA5807SP FM Tuner V1.1
Pins Description
1
GPIO1
GPIO2
16
2
GND
GPIO3
15
3
GND
GND
14
4
FMIN
ROUT
13
5
GND
LOUT
12
6
GND
GND
11
7
SCLK
VDD
10
8
SDA
RCLK
9
RDA5807SP
SOP16
Figure 7-1. SOP16 Top View
Table 7-2
RDA5807SP SOP16 Pins Description
SYMBOL
PIN
GND
2,3,5,6,11,14
FMIN
4
RCLK
VDD
LOUT,ROUT
SCLK
SDA
GPIO1,GPIO2,GPIO3
9
10
12,13
7
8
1,16,15
DESCRIPTION
Ground. Connect to ground plane on PCB
FM single input
32.768KHz reference clock input
Power supply
Right/Left audio output
Clock input for serial control bus
Data input/output for serial control bus
General purpose input/output
The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA.
Page 8 of 15
RDA Microelectronics, Inc.
Table 7-2
RDA5807SP FM Tuner V1.1
Internal Pin Configuration
SYMBOL
PIN
FMIN
4
RCLK
9
DESCRIPTION
47K
Sin
SDIO\SCLK
SCLK/SDA
7/8
Sout
MN1
GPIO1/GPIO2/GPIO3
1/16/15
The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA.
Page 9 of 15
RDA Microelectronics, Inc.
8
RDA5807SP FM Tuner V1.1
Application Diagram
8.1
Audio Loading Resistance Lower than 32Ω & SOP16 Application:
Figure 8-2. RDA5807SP SOP16 FM Tuner Application Diagram
8.1.1
Bill of Materials:
COMPONENT
U1
VALUE
RDA5807SP
DESCRIPTION
Broadcast FM Radio Tuner
SUPPLIER
RDA
SOP16
J1
Common 32Ω Resistance Headphone
L1/C2
100nH/24pF
LC Chock for LNA Input
Murata
C4,C5
125µF
Audio AC Couple Capacitors
Murata
C1
24nF
Power Supply Bypass Capacitor
Murata
F1/F2
1.5K@100MHz
FM Band Ferrite
Murata
The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA.
Page 10 of 15
RDA Microelectronics, Inc.
9
RDA5807SP FM Tuner V1.1
Package Physical Dimension
Figure 9-1 illustrates the package details for the RDA5807SP. The package is lead-free and
RoHS-compliant.
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
1.350
1.750
0.053
0.069
A1
0.100
0.250
0.004
0.010
A2
1.350
1.550
0.053
0.061
b
0.330
0.510
0.013
0.020
c
0.170
0.250
0.007
0.010
D
9.800
10.200
0.386
0.402
E
3.800
4.000
0.150
0.157
E1
5.800
6.200
0.228
0.244
e
1.270(BSC)
。
0.050(BSC)
。
。
。
Θ
1
7
1
7
L
0.400
1.270
0.016
0.050
Figure 9-1. 16 PIN SOP
The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA.
Page 11 of 15
RDA Microelectronics, Inc.
RDA5807SP FM Tuner V1.1
10 PCB Land Pattern:
Figure 10-1.Classification Reflow Profile
Profile Feature
Sn-Pb Eutectic Assembly
Pb-Free Assembly
Average Ramp-Up Rate
3 oC/second max.
3 oC/second max.
-Temperature Min (Tsmin)
100 oC
150 oC
-Temperature Max (Tsmax)
100 oC
200 oC
-Time (tsmin to tsmax)
60-120 seconds
60-180 seconds
-Temperature (TL)
183 oC
217oC
-Time (tL)
60-150seconds
60-150 seconds
Peak /Classification
Temperature(Tp)
See Table-II
See Table-III
Time within 5 oC of actual
Peak Temperature (tp)
10-30 seconds
20-40 seconds
Ramp-Down Rate
6 oC/second max.
6 oC/seconds max.
Time 25 oC to Peak
Temperature
6 minutes max.
8 minutes max.
(TSmax to Tp)
Preheat
Time maintained above:
Table-I Classification Reflow Profiles
The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA.
Page 12 of 15
RDA Microelectronics, Inc.
RDA5807SP FM Tuner V1.1
Volume mm3
Volume mm3
<350
≥350
<2.5mm
240 + 0/-5 o C
225 + 0/-5 o C
≥2.5mm
225 + 0/-5 o C
225 + 0/-5 o C
Package Thickness
Table – II SnPb Eutectic Process – Package Peak Reflow Temperatures
Package
Volume mm3
Volume mm3
Volume mm3
Thickness
<350
350-2000
>2000
<1.6mm
260 + 0 o C *
260 + 0 o C *
260 + 0 o C *
1.6mm – 2.5mm
260 + 0 o C *
250 + 0 o C *
245 + 0 o C *
≥2.5mm
250 + 0 o C *
245 + 0 o C *
245 + 0 o C *
*Tolerance : The device manufacturer/supplier shall assure process compatibility up to and
including the stated classification temperature(this mean Peak reflow temperature + 0 o C. For
example 260+ 0 o C ) at the rated MSL Level.
Table – III Pb-free Process – Package Classification Reflow Temperatures
Note 1: All temperature refer topside of the package. Measured on the package body surface.
Note 2: The profiling tolerance is + 0
capability)whatever
o
C, - X
o
C (based on machine variation
is required to control the profile process but at no time will it exceed – 5 o C. The
producer assures process compatibility at the peak reflow profile temperatures defined
in Table –III.
Note 3: Package volume excludes external terminals(balls, bumps, lands, leads) and/or non
integral heat sinks.
Note 4: The maximum component temperature reached during reflow depends on package the
thickness and volume. The use of convection reflow processes reduces the thermal
gradients between packages. However, thermal gradients due to differences in
thermal mass of SMD package may sill exist.
Note 5: Components intended for use in a “lead-free” assembly process shall be evaluated
using the “lead free” classification temperatures and profiles defined in Table-I II III
whether or not lead free.
The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA.
Page 13 of 15
RDA Microelectronics, Inc.
RDA5807SP FM Tuner V1.1
RoHS Compliant
The product does not contain lead, mercury, cadmium, hexavalent chromium, polybrominated biphenyls (PBB)
or polybrominated diphenyl ethers (PBDE), and are therefore considered RoHS compliant.
ESD Sensitivity
Integrated circuits are ESD sensitive and can be damaged by static electricity. Proper ESD techniques should
be used when handling these devices.
Buy Module:
http://www.elechouse.com/elechouse/index.php?main_page=product_info&cPath=168_170&products_id=2207
The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA.
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