Keysight M8085A MIPI D-PHY Receiver Test Software

Keysight M8085A MIPI D-PHY Receiver Test Software
Keysight M8085A MIPI D-PHY
Receiver Test Software
Calibration, Conformance and Characterization
Procedures
User Guide
Notices
© Keysight Technologies 2016
No part of this manual may be reproduced
in any form or by any means (including
electronic storage and retrieval or translation into a foreign language) without prior
agreement and written consent from
Keysight Technologies as governed by
United States and international copyright
laws.
Trademarks
MIPI C-PHY™ and MIPI D-PHY™ are
registered trademarks of the MIPI Alliance.
Manual Part Number
M8085-91020
Edition
Edition 2.0, September 2016
Keysight Technologies Deutschland GmbH
Herrenberger Strasse 130,
71034 Böblingen, Germany
Technology Licenses
The hardware and/or software described in
this document are furnished under a
license and may be used or copied only in
accordance with the terms of such license.
U.S. Government Rights
The Software is “commercial computer
software,” as defined by Federal Acquisition
Regulation (“FAR”) 2.101. Pursuant to FAR
12.212 and 27.405-3 and Department of
Defense FAR Supplement
(“DFARS”) 227.7202, the U.S. government
acquires commercial computer software
under the same terms by which the software is customarily provided to the public.
Accordingly, Keysight provides the Software to U.S. government customers under
its standard commercial license, which is
embodied in its End User License Agree2
ment (EULA), a copy of which can be found
at http://www.keysight.com/find/sweula.
The license set forth in the EULA represents
the exclusive authority by which the U.S.
government may use, modify, distribute, or
disclose the Software. The EULA and the
license set forth therein, does not require
or permit, among other things, that Keysight: (1) Furnish technical information
related to commercial computer software
or commercial computer software documentation that is not customarily provided
to the public; or (2) Relinquish to, or otherwise provide, the government rights in
excess of these rights customarily provided
to the public to use, modify, reproduce,
release, perform, display, or disclose commercial computer software or commercial
computer software documentation. No
additional government requirements
beyond those set forth in the EULA shall
apply, except to the extent that those
terms, rights, or licenses are explicitly
required from all providers of commercial
computer software pursuant to the FAR and
the DFARS and are set forth specifically in
writing elsewhere in the EULA. Keysight
shall be under no obligation to update,
revise or otherwise modify the Software.
With respect to any technical data as
defined by FAR 2.101, pursuant to FAR
12.211 and 27.404.2 and DFARS 227.7102,
the U.S. government acquires no greater
than Limited Rights as defined in FAR
27.401 or DFAR 227.7103-5 (c), as applicable in any technical data.
Warranty
THE MATERIAL CONTAINED IN THIS DOCUMENT IS PROVIDED "AS IS," AND IS SUBJECT TO BEING CHANGED, WITHOUT
NOTICE, IN FUTURE EDITIONS. FURTHER,
TO THE MAXIMUM EXTENT PERMITTED BY
APPLICABLE LAW, KEYSIGHT DISCLAIMS
ALL WARRANTIES, EITHER EXPRESS OR
IMPLIED WITH REGARD TO THIS MANUAL
AND ANY INFORMATION CONTAINED
HEREIN, INCLUDING BUT NOT LIMITED TO
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. KEYSIGHT SHALL NOT
BE LIABLE FOR ERRORS OR FOR INCIDENTAL OR CONSEQUENTIAL DAMAGES IN
CONNECTION WITH THE FURNISHING,
USE, OR PERFORMANCE OF THIS DOCUMENT OR ANY INFORMATION CONTAINED
HEREIN. SHOULD KEYSIGHT AND THE
USER HAVE A SEPARATE WRITTEN AGREEMENT WITH WARRANTY TERMS COVERING THE MATERIAL IN THIS DOCUMENT
THAT CONFLICT WITH THESE TERMS, THE
WARRANTY TERMS IN THE SEPARATE
AGREEMENT WILL CONTROL.
Safety Notices
CAUTION
A CAUTION notice denotes a hazard.
It calls attention to an operating procedure, practice, or the like that, if
not correctly performed or adhered
to, could result in damage to the
product or loss of important data. Do
not proceed beyond a CAUTION
notice until the indicated conditions
are fully understood and met.
WARNING
A WARNING notice denotes a hazard.
It calls attention to an operating procedure, practice, or the like that, if
not correctly performed or adhered
to, could result in personal injury or
death. Do not proceed beyond a
WARNING notice until the indicated
conditions are fully understood and
met.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Contents
1 Introduction
Configuration Window 11
Configuration 12
Parameters Panel 16
Logger Panel 19
Performing Procedures
20
2 Sequence and Data Files
Data File Format
27
Sequence File Format
29
3 Results Description and Procedure Parameters
Resul t Description
34
MIPI D-PHY Receiver Test Software Procedure Parameters
35
4 Calibrations
Connections and Probing Methods
38
Probing for LP Levels Calibration and e-Spike Calibration 38
Probing for HS Levels Calibration 38
Probing for Jitter Calibrations / Eye Opening Calibration 39
Commonly used Procedure Parameters for Calibration Tests
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
40
3
Contents
Calibration Procedures
42
Skew Calibration Module 1 42
Amplifier Level Calibration Module 1 44
Skew Calibration Module 2 47
Amplifier Level Calibration Module 2 47
Inter module Skew Calibration 48
LP Level Calibration Clock 50
V_ILHS Calibration Clock 53
Differential Amplitude Calibration Clock 55
LP Level Calibration Data0 57
V_ILHS Calibration Data0 59
e-Spike Calibration 61
Differential Amplitude Calibration Data0 64
Intrinsic Jitter Calibration 66
Sinusoidal Jitter Calibration 68
Eye Opening Calibration with Jitter 70
4
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Contents
5 Test Procedures
Connection Diagrams for the Test Procedures
Clock Tests
74
76
Test 2.3.1 Vcmrx Tolerance Clock 76
Test 2.3.2/3 V_IDTH/V_IDTL Sensitivity Clock 78
Test 2.3.4 V_IHHS Sensitivity Clock 80
Test 2.3.5 V_ILHS Sensitivity Clock 82
Test 2.3.6 HS RX CM Interference 50-450 MHz Clock 84
Test 2.3.7 HS RX CM Interference beyond 450 MHz Clock 86
Test 2.3.8 HS RX Clock-to-Data Skew 88
Test 2.4.7 T_Clk-Prepare-Zero Compliance Procedure 91
Test 2.4.7a T_Clk-Prepare - Clock Procedure 93
Test 2.4.7b T_Clk-Prepare_Zero - Clock Procedure 95
Test 2.4.8 T_Clock- Settle - Clock Procedure 97
Test 2.4.9 T_Clk-Trail - Clock Procedure 100
Test 2.4.10 T_Clk-Miss Procedure 102
Test 2.4.11a T_Clk-Pre - Clock Procedure 104
Test 2.4.11b T_Clk-Post Clock Procedure 106
Data Tests
107
Test 2.3.1 Vcmrx Tolerance Data 107
Test 2.3.2/3 V_IDTH/V_IDTL Sensitivity Data 107
Test 2.3.4 V_IHHS Sensitivity Data 108
Test 2.3.5 V_ILHS Sensitivity Data 108
Test 2.3.6 HS RX CM Interference 50-450 MHz Data 108
Test 2.3.7 HS RX CM Interference beyond 450 MHz Data 109
Test 2.3.8 HS RX Data-to-Clock Skew Data 109
Test 2.4.2 T_HS-Prepare_Zero Compliance Procedure Data 111
Test 2.4.2a T_HS-Prepare Data Procedure 113
Test 2.4.2b T_HS_Zero - Data Procedure 115
Test 2.4.3 T_HS Settle - Data Procedure 117
Test 2.4.4 T_HS Trail - Data Procedure 119
Test 2.4.5 T_HS Skip - Data Procedure 121
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
5
Contents
Semi-Automated Tests
123
Test 2.1.8 LP-CD Logic Contention Thresholds Manual Procedure
Test 2.4.6 Clock Lane T_CLK-TERM-EN 126
Test 2.4.1 Data Lane T_HS-TERM-EN 128
LP Tests
123
129
Test 2.1.1 V_IH Sensitivity Clock 129
Test 2.1.2 V_IL Sensitivity Clock 131
Test 2.1.4 V_HYST Sensitivity Clock 132
Test 2.1.4 V_HYST Dynamic Clockp 134
Test 2.1.4 V_HYST Dynamic Clockn 136
Test 2.1.5 LP-RX Minimum Pulse Width Response (T_Min-RX)
Clock 137
Test 2.1.6 LP-RX Input pos Pulse Rejection (e_spike) Clock 139
Test 2.1.6 LP-RX Input neg Pulse Rejection (e_spike) Clock 141
Test 2.1.7 LP-RX Interference Tolerance (V_INT and f_INT) Clock 143
Test 2.1.1 V_IH Sensitivity Data 145
Test 2.1.2 V_IL Sensitivity Data 145
Test 2.1.4 V_HYST Sensitivity Data 145
Test 2.1.4 V_HYST Dynamic Datap 145
Test 2.1.4 V_HYST Dynamic Datan 146
Test 2.1.5 LP-RX Minimum Pulse Width Response (T_Min-RX)
Data 146
Test 2.1.6 LP-RX Input positive Pulse Rejection (e_spike) 146
Test 2.1.6 LP-RX Input negative Pulse Rejection (e_spike) Data0 146
Test 2.1.7 LP-RX Interference Tolerance (V_INT and f_INT) Data0 147
Behavioral Tests
148
Test 2.2.1 Init. Period T_INIT 148
Test 2.2.2 ULPS Exit TWakeup 150
Test 2.2.3 Clock Invalid/Aborted Escape Entry 152
Test 2.2.4 Data Invalid/Aborted Escape Entry 154
Test 2.2.5 Data Invalid/Aborted Escape Command 156
Test 2.2.7 Data Post-Trigger-Command 158
Test 2.2.8 Data LP-RX Escape Mode Unsupported/Unassigned
Commands 160
6
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Contents
6 SCPI Plug-in Interface
Architecture of a plug-in / sub-model concept
164
SCPI Commands
165
:PLUGin:CATalog? 165
:PLUGin:RNODes[:LIST]? 165
:PLUGin:rootnode:CATalog? 165
:PLUGin:rootnode:NEW 'UserNameOfPlugin' 166
:PLUGin:rootnode:DELete 'UserNameOfPlugin' 166
:PLUGin:rootnode:RESet 'UserNameOfPlugin#SubmodelID 166
:PLUGin:rootnode:STARt 'UserNameOfPlugin#SubmodelID' (IRunnable
interface) 167
:PLUGin:rootnode:STOP 'UserNameOfPlugin#SubModelID' (IRunnable
interface) 167
:PLUGin:rootnode:RUN[:STATus]? 'UserNameOfPlugin#SubModelID'
(IRunnable interface) 167
:PLUGin:rootnode:RUN:PROGress? 'UserNameOfPlugin#SubModelID'
(IRunnable interface) 168
:PLUGin:rootnode:RUN:MESSage? 'UserNameOfPlugin#SubModelID'
(IRunnable interface) 168
:PLUGin:rootnode:RUN:HISTory[:STATe][?]
'UserNameOfPlugin#SubModelID' (IRunnable interface) 168
:PLUGin:rootnode:ERRor? 'UserNameOfPlugin#SubModelID' (IRunnable
interface) 169
:PLUGin:CTSuit:LOG? 'UserNameOfPlugin#SubModelID' (IRunnable
interface) 169
:PLUGin:rootnode:BREak 'UserNameOfPlugin#SubModelID'
(IsBreakContinuePosssible interface) 169
:PLUGin:rootnode:STEP 'UserNameOfPlugin#SubModelID'
(IsBreakContinuePosssible interface) 170
:PLUGin:rootnode:CONTinue 'UserNameOfPlugin#SubModelID'
(IsBreakContinuePosssible interface) 170
:PLUGin:rootnode:CONFigure 'UserNameOfPlugIn' (IHasSubModels
interface) 171
:PLUGin:rootnode:SELect[?] 'UserNameOfPlugIn#SubModelID'
(IHasSubModels interface) 171
:PLUGin:rootnode:CLEar 'UserNameOfPlugin#SubModelID'
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
7
Contents
(IHasSubModels interface) 172
:PLUGin:rootenode:PARameter[:VALue][?]
'UserNameOfPlugin#SubModelID:Location&FunctionalBlock.Parameter',
"Value" (IHasSubModels interface) 172
:PLUGin:rootnode:LIST? 'UserNameOfPlugIn' (IHasSubModels
interface) 173
:PLUGin:rootnode:FETCh:DATA?
'UserNameOfPlugIn#SubModelID' 173
:PLUGin:rootnode:FETCh:RESult?
'UserNameOfPlugIn#SubModelID 174
7 IBerReader Interface
IBerReader Interface Definition
176
IBerReader Usage 181
Integration 181
Example Code Description 184
IBerReader Test GUI 184
MipiCustomBerReader 184
OfflineBerReader 185
LogicAnalyserBerReader 185
Debugging
186
Debugging using the Test GUI
8
186
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Keysight M8085A MIPI D-PHY Receiver Test Software
User Guide
1
Introduction
Configuration Window / 11
Performing Procedures / 20
MIPI D-PHY Receiver Tests with the M8070A Software supports the MIPI
D-PHY signal generator configurations for single- and multi-lane testing.
The following figure shows M8085A D-PHY Receiver Test setup with clock
and data from a separate module:
Figure 1
M8085A D-PHY Receiver Test Setup
1
Introduction
The following figure shows M8085A D-PHY Receiver Test setup showing
single lane with clock and data combined from one module:
Figure 2
10
M8085A D-PHY Receiver Test Setup
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Introduction
1
Configuration Window
Once you start the software, the D-PHY Receiver Test Configuration
window appears as shown in Figure 3:
Figure 3
D-PHY CTS Configuration Window
The D-PHY Receiver Test user interface consists of the following GUI
panels:
•
Configuration
•
Parameters
•
Logger
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
11
1
Introduction
Configuration
Configuration allows you to define the attributes for System Connection
and for Receiver Test Configuration.
System Connection
This area includes the following attributes:
•
Offline Mode: Select this check box to use the D-PHY Receiver Test
software in an offline mode, i.e. without a proper physical connection to
the DUT. In this mode, the application offers limited functionality and
certain features are disabled.
•
AWG Setup
• AWG Model: Select the AWG module from the drop down list.
Currently, there are two supported modules: M8190A and M8195A.
The parameters for the connection setup of M8190A and M8195A
are described below:
•
•
•
M8190A Connection Setup: The M8190A AWG supports only
one Data Lane. It does not have an integrated synchronization
module to align the two required AWG modules. The AWG
Setup Characteristics for M8190A are:
•
Number of AWGs: It has only two AWGs by default.
•
AWGs Host IP: Provide the IP address of the AWG.
•
AWG Module (1/2) HiSlip: Provide the HiSlip address of the
two connected AWGs.
M8195A Connection Setup: The M8195A AWG supports up to 4
Data lanes. The AWG Setup Characteristics for M8195A are:
•
Number of AWGs: Select the number of AWGs from the
drop-down list. You can select up to three M8195A AWGs.
•
AWGs Host IP: Provide the IP address of the AWG.
•
Clock Sync Module HiSlip: Provide the HiSlip address of the
Clock Sync module.
•
AWG Module (1/2/3) HiSlip: Provide the HiSlip address of
all the three connected AWGs
Oscilloscope Setup
• Offline Mode: Select this check box to use the oscilloscope in offline
mode, i.e. without a live signal.
• Address: Specify the VISA address of the connected oscilloscope.
12
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Introduction
1
Receiver Test Configuration
It includes the following attributes:
•
Mode: There are two modes:
• Compliance Mode: The Compliance Mode strictly adheres to the
tests and its parameter limits are defined in the D-PHY CTS. By
default, the CTS limit values for the parameters used in the
Calibration and Test procedures are defined within the application.
The application does not allow you to modify values to the test
parameters in Compliance Mode.
NOTE
In the Compliance Mode, all tests are performed within the minimum and
maximum values of the test parameters.
• Expert Mode: The Expert Mode allows you to customize the
parameter limits, only if needed, to non-standard values, which can
be helpful in debugging. By default, the CTS limit values for the
parameters used in the Calibration and Test procedures are defined
within the software. However, in Expert Mode, you may edit the
parameter fields to indicate different values supported by your DUT.
NOTE
In the Expert Mode, the software allows you to change the parameter
values within or beyond the maximum and minimum limits.
•
Specification: This drop-down field displays the different versions of the
MIPI Alliance Specification for D-PHY, such that D-PHY Receiver Test
software defines the corresponding values for parameters from each
specification standard. Currently, there are three specifications
available: 1.00, 1.10, and 1.20 (default). Primarily, it is the Data Rate
that differs across the specification versions.
•
Number of Data Lanes: The M8190A module has a single-lane structure
while the M8195A module has a multi-lane structure. Therefore, the
D-PHY Receiver Test software displays, by default, only 1 Lane for the
M8190A module. For the M8195A module, select up to 4 Lanes i.e.
either 1 Lane, 2 Lanes, 3 Lanes or 4 Lanes from the drop-down options.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
13
1
Introduction
NOTE
NOTE
For the M8195A module, if you select only one AWG, only one Data Lane
is available. But if you select more than one AWG, you can extend up to
four Data Lanes.
•
HS Data Rate: Specify a value for the high speed data rate for the
signal. You can edit these fields, both in Compliance and Expert Modes.
•
LP Data Rate: Specify a value for the low power data rate for the signal.
You can edit these fields, both in Compliance and Expert Modes.
•
Manual Deskew: This check box is available for both M8190A and
M8195A modules. However, the M8195A module has a stable skew and
does not require the process of automatic or manual deskew. Select the
Manual Deskew checkbox to enable a manual process of AWG Skew
Calibration for the M8190A module. Alternatively, the software
performs the AWG Skew Calibration for M8190A automatically if this
checkbox is not selected. Note that calibration is dependent on sample
rate. Whenever the sample rate changes, you need not disconnect the
DUT, but the AWG Skew must be re-calibrated.
•
Triggered Start: Select the checkbox to trigger the LP-11 sequence in
the signal. The D-PHY Receiver Test software performs this action for
all tests except Test 2.2.2 where it triggers the LP-00 sequence.
•
All Lanes Simultaneously: This checkbox is applicable only for the
M8195A module, which uses multi-lanes. Select the check box to
enable all data lanes simultaneously for the M8195A module.
By selecting the option All Lanes Simultaneously, you can save a lot of
time if the test passes because all lanes are operating together
simultaneously. However, if the test fails, you have to check each lane
individually to find out the lane, where the error occurred.
•
Data Pattern
• HS Sync Word: The value in this field indicates on the receiver side
that the data transmission has started.
• LSB First: Select this check box to transmit the LSB bit first in the
Data Pattern.
• Compliance Pattern: Select this radio button to use the HS and LP
compliance patterns defined in the CTS.
14
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Introduction
1
• Frame (Sequence): Select this radio button to define sequence files
for HS, LP, ULPS and Behavioral parameters. To select the sequence
file for each parameter, click the corresponding ... button.
• Frame, Continuous Clock: Similar to “Frame (Sequence)”, but it
enables continuous clock signal, even during the LP mode.
• Restart Seq. Before DUT: Select this check box to restart the
sequences before the DUT transmission.
• Restart Seq. After DUT: Select this check box to restart the
sequences after the DUT transmission.
•
BER Configuration
• BER Limit: Select the BER limit for the tests.
• BER Reader: For this method, following are the choices:
• iBERreader: It requires a BER Reader address; a file, directory or an
IP address.
• Offline BER reader: It does not require any address.
• Address: Provide BER Reader address here, after selecting
iBERreader.
Once the connections to the instrument are made successfully, click the
Apply button.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
15
1
Introduction
Parameters Panel
The Parameters Panel allows you to change the Protocol timings
supported by the DUT and the signal levels.
Figure 4
Parameters Panel
Protocol Timings
The parameters provided by Protocol Timings are shown in the Figure 5
and described in Table 1 on page 17.
Figure 5
16
Parameters of Protocol Timings
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Introduction
Table 1
1
Parameters of Protocol Timings
Parameter
Description
Clock-Prepare Duration
Time taken by the high speed clock to drive bridge state (LP-00).
Clock-Zero Duration
Time taken in the HS-0 state while high speed driver is enabled and low power driver is disabled.
Clock-Pre Duration
Time (in UI) taken to drive the high speed clock in data rate before the startup of any data lane. UI are related to data
channel’s data rate (reciprocal relation) and has granularity of 2 as clock is of “two bits” granularity.
Clock-Post Duration
Time (in UI) taken to drive the high speed clock is driven in data rate after last data lane goes into low power mode. UI are
related to data channel’s data rate (reciprocal relation) and has granularity of 2 as clock is of “two bits” granularity.
Clock-Trail Duration
Time taken by the transmitter to drive HS-0 state after last payload clock bit of high speed transmission burst.
Clock-Miss Duration
Time taken by the receiver to detect the absence of clock transitions and disable the clock lane HS-RX..
TX-HS-Prepare Duration
Time taken by the transmitter to drive the data lane LP-00 state immediately before the HS-0-line state starting the HS
transmission.
TX-HS-Zero Duration
Time taken by the transmitter to drive the HS-0 state until the TX-HS-Settle timer expires in order to neglect transition
effects.
TX-HS-Trail Duration
Time taken by the transmitter to drive the Flipped Differential state after the burst of last payload data bit of high speed.
TX-HS-Exit Duration
Time taken by the transmitter to drive the LP-11 state following a HS burst.
TX-HS-Wakeup Duration
Time taken by the transmitter to drive a Mark-1 state prior to a stop state in order to initiate an exit from ULPS.
TX-Init Duration
Time taken by the transmitter to drive a Stop state (LP_11).
TX-InitialSkewCal
Duration
Time taken by the transmitter to drive the Skew Calibration pattern in the Initial Skew-Calibration mode.
TX-PeriodicSkewCal
Duration
Time taken by the transmitter to drive the Skew Calibration pattern in the Periodic Skew-Calibration mode.
Set Min. Timings.
Set all the PHY timings to the minimum values based on the selected data rates.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
17
1
Introduction
Signal Levels
The parameters provided by Signal Levels are shown in the Figure 6 and
described in Table 2 on page 18.
Figure 6
Table 2
Parameters of Signal Levels
Parameters of Signal Levels
Parameter
Description
LP High Level (Voh)
High Level voltage (Voh) at low power.
LP Low Level (Vol)
Low Level voltage (Vol) at low power.
Offset
•
•
Sets Common High Speed Offset for both Dp and Dn, when Track Normal Line is “ON”.
Sets Single Ended Offset for Dp and Dn, Track Normal Line is “OFF”.
Amplitude
•
•
Sets Common High Speed Amplitude for both Dp and Dn, Track Normal Line is “ON”.
Sets Single Ended Amplitude for Dp and Dn, Track Normal Line is “OFF”.
18
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Introduction
1
Logger Panel
The Logger Panel displays errors, warnings and information messages
along with their respective descriptions, applications (from where they are
generated) and their time stamps.
Figure 7
Logger Panel
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
19
1
Introduction
Performing Procedures
After performing the configuration setup in the Configuration Panel; when
you click Apply, the following test selection window is displayed.
Figure 8
Performing the tests
This window allows you to select and perform the tests. For each selected
procedure, it displays the connection diagram. It also provides you
instructions to connect the output of the AWG to the Oscilloscope. Click
the button to begin running tests. During the execution of all calibration
and test procedures, the Status Indicator (Refer below for details on Status
Indicator) displays the current state of a test. The results are displayed
automatically in a data table and for some tests, graphical results are also
available. Click the Configure button any time you wish to return to the
Configuration Panel to re-configure the DUT and the test modes.
20
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Introduction
1
This window has the following options:
•
Toolbar Buttons: The following table shows the available buttons on the
toolbar:
Table 3
•
Toolbar Buttons
Start
/Continue Test
Starts a test.
Stop Test
Stops the test.
Step Into Test
Steps further into the test.
Enable/Disable Test
Run History
Enables or disables the test’s run history.
Clear
Test History
Clears the test run history.
Copy
Test History Properties
Copies the test history properties to the currently running test.
Reset
Resets the test to its default values.
Measurement History: It maintains the history of executed tests along
with their time stamp. It allows you to refer the previously run
measurements and also compare their results.
Figure 9
Measurement History
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
21
1
Introduction
Click the
button present on the toolbar if you wish to toggle between
the enable/disable measurement run history.
Click the
button to copy the properties of run measurements on to the
currently running measurement.
•
Status Indicator: The status indicator shows the current state of a test.
A test can have various states such as Not Started, Running, Stop,
Error, Suspended and Finished.
The following figure displays the status indicator while the test is
running:
•
Results (Tabular view): It shows results in tabular format for each
procedure, i.e. measured values for calibrations and values for tests
after they are complete.
Figure 10
22
Tabular view for results
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Introduction
•
1
Results (Graphical view): It shows the graphical results for some
procedures, i.e. measured values for calibrations and tested values for
the tests. For example, the following figure shows the calibration
corresponding to the V_ILHS Calibration Clock.
Figure 11
Graphical view for results
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
23
Keysight M8085A MIPI D-PHY Receiver Test Software
User Guide
2
Sequence and Data
Files
Data File Format / 27
Sequence File Format / 29
The test data are contained in sequence files, with the extension ‘.seq’. A
sequence file consists of two parts: the Block definitions and the Sequence
definition.
2
Sequence and Data Files
The MIPI D-PHY Frame Generator software supports two different mode
groups:
•
The Burst mode: In the Burst Modes (Burst, Burst Continuous Clock,
Pure HS) a block of data is repeated infinitely. This block can contain LP
Data and HS Data, pure LP data or pure HS data depending on the
content of the data given for HS and LP. If either HS or LP data is empty
(empty text box for that particular data type), the software generates
pure LP/HS data. If Pure HS is selected, no LP11 transitions are
included and all LP data is neglected. The burst modes require two
sequences of data, one sequence for HS and other for LP. Each
sequence can be set manually or be read by the software from a data
file.A block consists of a name followed by one or more LP blocks:
• LP Blocks: The format is LPxyNn. x and y can be 0 or 1, depending
on the desired LP state. n represents the number of LP states.
•
26
The Frame mode: In these modes (Frames and Frames, Continuous HS
Clock) a sequence file allows running a sequence of blocks ending with
an infinite loop over the complete number of blocks or an selection of
the last blocks. Each individual block can be repeated (“looped”)
N-times and the number of repetitions N can be selected for each block
separately. In addition to the data files, the frame modes require a
sequence file. It specifies the data rates and the sequence of blocks.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Sequence and Data Files
2
Data File Format
For data the hexadecimal (HEX) format is required. Bytes are represented
in two digits ranging from 0 to 9 and A to F each. The leading string “0x” is
optional. Supported separators between data bytes are:
•
,(comma)
•
; (semicolon)
•
space (blank)
•
tab
•
line feed
•
nothing
Some examples:
•
x01, 0xF3, 0x23
•
0134E734FF
•
32 FF E5 44
In addition to the pure HEX data, special commands are abbreviations of
lists of hex bytes:
• 0x<HEX code>N<count>: repeat the byte <HEX code> N times
Example: 0xABN5 is equal to AB AB AB AB AB
• 0x<HEX code 1>x<HEX code 2>: count up/down from <HEX code 1>
to <HEX code 2>
Example: 0x05x0A is equal to 05 06 07 08 09 0A.
• 0x<HEX code 1>c<HEX code 2>: count up/down from <HEX code 1>
to <HEX code 2> for each data line separately. If there is only one
data line, this command is equal to the one before. However in case
of multiple data lines, the values are counted with a step size of one
for each data line separately.
Example for 2 data lines: 0x02c05 is equal to D0: 02 03 04 05 and
D1: 02 03 04 05.
The counter with the “x” and two data lines would lead to: 0x02x05
would lead to D0: 02 04 and D1: 03 05.
NOTE
The special commands require the leading “0x”, otherwise they will not
be recognized.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
27
2
Sequence and Data Files
• LP<LP state 00,01,10, or 11>[<LP state 00,01,10, or 11>...] Only
available in the Manual LP Framing mode and for LP pattern. It
allows to define a sequence of LP states in one statement.
Example LP1101001011
28
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Sequence and Data Files
2
Sequence File Format
In the sequence file the data rate, data blocks and sequence are defined.
The structure of a sequence file (see Figure 12 on page 30, note: all
parameters are even integers) is:
HSFreq: <frequency in bits/s>
Blocks:
<BlockName 1>: <Block Definition 1>, …, <Block Definition n1>;
…
<BlockName M>: <Block Definition 1>, …,<Block Definition nM>;
Sequence:
1. <BlockName J>, <Loop Count R>; - First block
…
<N>. <BlockName K>, <Loop Count S>; - Nth block
…
<P>. <BlockName L>, <Loop Count T>; - Pth block
[LoopTo N]
The following example shows a typical sequence file:
Blocks:
Init: LP11N128
Data: LP11N128, B"HsCompliancePattern.dat", LP11N128
Escape: LP1110000100
Mark1andStop: LP10,LP11N1280
Sequence:
1 Init,1;
2 Data,1;
3 Escape,1;
4 Mark1andStop,1;
LoopTo 2;
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
29
2
Sequence and Data Files
The data files can be written as follows:
0xAAS4,0x55S300,0x33S300,0xF0S300,0x7FS300,0x55S300,0x33S
300,0xF0S300,0x80S300,0xAAS2
Figure 12
30
Example sequence
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Sequence and Data Files
2
Each block can comprise multiple sub-blocks (1 to n). Sub-blocks can be
used in multiple blocks. In the sequence, blocks can be used as often as
needed. Within the sequence, the LoopTo expression starts an infinite loop
from block <N> to the last block <P>. If no LoopTo expression is specified,
an infinite loop is created from block 1 to block P. Valid block definitions
are:
LP00, LP01, LP10, LP11: for a single LP state
NOTE
•
LPB”<filename>”: for generating LP data specified in the file with the
name <filename>. The file should be in the same folder as the sequence
file. At the beginning of the data an escape trigger for LP or ULP data
mode is sent before the data and a Mark-0/1 sequence is sent after the
end of the data. For the data, the data file format given above must be
used.
•
LP<00, 01, 10, or 11>N<number of bits>: The LP state is sent <number
of [HS] bits> times.
•
LP<00, 01, 10, or 11>E<number of bits>: The LP state is sent until the
block size reaches the number of HS bits given in <number of bits>.
•
LPHSE<number of bits>: The block is filled with LP11 states and a
LP-HS transition until the number of HS bits <number of bits> is
reached.
•
B”<filename>”: for generating HS data given in the file <filename>. The
file should be in the same folder as the sequence file. If necessary, a LP
to HS transition is generated before the data. A HS to LP transition is
added if the following block is containing LP states.
•
BL<number of blanking bytes>: for generating HS blanking packets
with a number of blanking bytes given in <number of blanking bytes>.
The id (0x19), word counter, ECC and CRC are calculated and added
that the number of bits is equal to (<number of blanking bytes>+6)*8;
• If blocks are looped, then the beginning of the block should have the
same kind of data mode (LP or HS) as the block following it, otherwise
the block loop will result in invalid LP to HS transitions.
• Video Frames which contain LP11 blanking periods should be rotated
so that the block definition always ends with a LP11E command.
• If only the header contains LP11 states, then the header block should
end with LPHSE to start the HS transmission at the end of the header
blocK.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
31
2
Sequence and Data Files
In any case to each sequence a LP11 block is added. A LP-HS transition is
added if needed to switch the device into HS mode. Also a sync block is
added for the synchronization of the ParBERT LP and HS subsystems.
These blocks need not to be added explicitly to the sequence. They are
added automatically for all sequences, i.e. even if a sequence with pure HS
blocks is given.
Sequence Example:
HSFreq: 200MBit/s;
Blocks:
LPInit1: LPB"Esc0ms.txt",LP11E13728;
LPPause: LP11N1024;
LPInit2: LPB"Esc100ms.txt",LP11E13728;
LPInit3: LPB"Esc200ms.txt",LP11E13728;
Header: B"FirstHsLine.txt",LP11E6016;
Video: B"VideoLine.txt",LP11E6016;
Sequence:
1
LPInit1,1;
2
LPPause,20000;
3
LPInit2,1;
4
LPPause,20000;
5
LPInit3,1;
6
LPPause,20000;
7
Header,1;
8
Video,319;
LoopTo 6;
32
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Keysight M8085A MIPI D-PHY Receiver Test Software
User Guide
3
Results Description
and Procedure
Parameters
Result Description / 34
MIPI D-PHY Receiver Test Software Procedure Parameters / 35
During the execution of all calibration and test procedures, the results are
displayed automatically in a data table as well as graphically.
CAUTION
Before executing the calibration or test procedures, ensure that the
System Connections are made properly with all necessary Setups. All
calibrations and test procedures can be run in offline mode, that is,
without any instrument connected. The offline mode is intended for
product demonstrations with simulated data. CALIBRATIONS RUN IN
OFFLINE MODE. DO NOT GENERATE VALID CALIBRATION DATA.
3
Results Description and Procedure Parameters
Result Description
Once the selected procedure is finished, an indicator shows the final status
(e.g. Pass / Fail / Incomplete) of a procedure. The meaning of the indicator
is described in the Table 4.
Table 4
Ind icator
Indicator's result description table
Description
It indicates that the procedure successfully passed the present run in online mode.
It indicates that the procedure successfully passed the present run in offline mode.
It indicates that the procedure could not proceed with the present run. Most likely the DUT failed during initialization or
the test was stopped, so no test was conducted.
It indicates that the procedure failed the present run in online mode.
It indicates that the procedure failed the present run in offline mode.
34
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Results Description and Procedure Parameters
3
MIPI D-PHY Receiver Test Software Procedure Parameters
The Procedure Parameters are available for each calibration and test
procedure. You can see the selected Parameters at the right hand side of
the user interface. The displayed parameters are only associated with the
selected procedure. Procedures often have parameters with the same
name, but the meaning may be slightly different and a change of a
parameter value only affects the selected procedure.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
35
Keysight M8085A MIPI D-PHY Receiver Test Software
User Guide
4
Calibrations
Connections and Probing Methods / 38
Commonly used Procedure Parameters for Calibration Tests / 40
Calibration Procedures / 42
During the execution of all calibration and test procedures, the results are
displayed automatically in a data table as well as graphically.
CAUTION
Before executing the calibration or test procedures, ensure that the
System Connections are made properly with all necessary Setups. All
calibrations and test procedures can be run in offline mode, that is,
without any instrument connected. The offline mode is intended for
product demonstrations with simulated data. CALIBRATIONS RUN IN
OFFLINE MODE. DO NOT GENERATE VALID CALIBRATION DATA.
4
Calibrations
Connections and Probing Methods
The valid probing combinations are shown in Table 5.
Table 5
Valid Probing Combinations
Probe Head
Probe Amplifier
N5445A
N5439A + N2838A, N5440A, N5447A
N5441A
N2836A
N2800A/01A/02A/03A
N2830A/31A/32A
N7000A/01A/02A/03A
N5425A + N5426A, N5451A, N5451A, N2884A
N5381A
N5382A
E2677A
E2678B
E2675B
1169A
1168A
Probing for LP Levels Calibration and e-Spike Calibration
For the LP Calibration, the connection must be Single Ended, Into the
Open. A Solder-In probe can be soldered to the fixture (a Reference
Termination Board is recommended), one contact to the trace of the line
that is going to be calibrated, the other contact to Ground. Set the
connection as Single-Ended in the DSO.
Probing for HS Levels Calibration
For the HS Calibration, the connection must be Differential (one output of
AWG is connected to the Normal and other is to the Complement for the
calibrated channel), 100 Ohm Terminated. A Solder-In probe can be
soldered to the fixture, one contact to the trace of the line that is going to
be calibrated, the other contact to Ground. Set the connection as
Differential in the DSO.
38
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Calibrations
4
Probing for Jitter Calibrations / Eye Opening Calibration
For the Jitter Calibrations, connect the lanes normal and Complement
Differentially, 100 Ohm terminated to the DSO.
The following are the two ways to achieve this:
1 Use probes as in shown in Table 5 on page 38. Instead of probing
Single Ended, in the line that is being calibrated and GND, probe
differentially in lines Normal and Complement. A 100 Ohm
termination is required in the fixture.
2 Connect the outputs of the AWG lines Normal and Complement
differentially to the scope, using an N5380B differential probe head
+ 1169A/1168A probe amplifier, leaving the middle pin open.
Alternatively, a combination of N5444A and compatible probe
amplifier may be used.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
39
4
Calibrations
Commonly used Procedure Parameters for Calibration Tests
The following Table 6 shows commonly used Procedure Parameters for
Calibration Tests.
Table 6
MIPI D-PHY commonly used Procedure Parameters for Calibration Procedures
Common Parameter Name
Parameter Description
HS Sequence File
Sequence file that is used for the HS data instead of the sequence file specified while configuring the DUT.
Logical 0 Threshold
It is the threshold voltage for the spike to meet logic 0.
Logical 1 Threshold
It is the threshold voltage for the spike to meet logic 1.
Max Energy Value
It is the maximum energy value calibrated for the e-Spike calibration.
Min Energy Value
It is the minimum energy value calibrated for the e-Spike calibration.
Max Level
It is the maximum V_ILHS value that is calibrated.
Max LP High Level
It is the maximum V_OH value that is calibrated.
Max LP Low Level
t is the maximum V_OL value that is calibrated.
Max Swing Value
It is the maximum value of the differential amplitude that is calibrated.
Max Threshold Difference
It is the maximum difference value of VIH-V_IL.
Min Level
It is the minimum V_ILHS value that is calibrated.
Min LP High Level
It is the minimum V_OH value that is calibrated.
Min LP Low Level
It is the maximum V_OL value that is calibrated.
Min Swing Value
It is the minimum value of the differential amplitude that is calibrated.
Min Threshold Difference
It is the minimum difference value of VIH-V_IL.
Offline
It indicates that the procedures are running offline or not.
Show Real Time Eye
If it is “True” – it will show the Real Time on the oscilloscope during the measurements, otherwise it will
suppress the display of the Real Time Eye, this speeds up the measurement.
SJ Frequency
It is the sinusoidal jitter frequency.
Skew Tolerance
It is the skew limit value. The calibration is finished if the skew between normal and complement channels is
below this limit.
Step Size
It is the value used to decrement/increment at each step from min to max or max to min.
40
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Calibrations
Transfer Function Chan1
Set the transfer function file for channel 1.
Transfer Function Chan2
Set the transfer function file for channel 2.
Use Infiniisim
It can be selected as “True” or “False” to use the InfiniiSim transfer function of the scope instead of the replica
trace.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
4
41
4
Calibrations
Calibration Procedures
Skew Calibration Module 1
The following diagrams illustrate the connection settings for Skew
Calibration for the both AWGs, M8190A and M8195A respectively. This
procedure applies to all modules.
42
Figure 13
Connection Settings for Skew Calibration Module 1 (for M8190A)
Figure 14
Connection Settings for Skew Calibration Module 1(for M8195A)
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Calibrations
4
Purpose
This procedure is used to calibrate the skew of all channels within a
module by adjusting the skew of each channel so that the signals are
aligned in the reference plane. This calibration should be run at each
module.
Dependencies
No other calibration is required for this procedure.
Prior to conducting this calibration, the oscilloscope channels need to be
de-skewed to avoid errors caused by the internal skew of the oscilloscope
channels. This calibration is needed for all CTS tests.
Procedure
The normal data output signals of all channels within the module are
connected to the DSO channels (1 to 4) respectively with SMA cables. For
this procedure, the skew must be calibrated with the values lesser than the
Skew Tolerance value. At first, a clock pattern is generated at the first
channel and the skew is adjusted for all channels with respect to the first
channel. The skew is measured and calibrated iteratively until its value is
smaller than the given tolerance value.
Parameters
The parameters used for this calibration are listed alphabetically in Table 6
on page 40.
Results
Table 7
Calibration data table “Skew Calibration”
Parameter name
Parameter description
Result
•
•
Skew Value [ps]
It is the skew value of the channel with respect to the first channel of the module.
Pass: the system skew was adjusted below the skew limit value.
Fail: the adjustment failed.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
43
4
Calibrations
Amplifier Level Calibration Module 1
The following diagrams illustrate the connection settings for Amplifier
Level Calibration for the both AWGs, M8190A and M8195A. The procedure
applies to all modules.
44
Figure 15
Connection Settings for Amplifier Level Calibration Module 1 (for M8190A)
Figure 16
Connection Settings for Amplifier Level Calibration Module 1 (for M8195A)
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Calibrations
4
Purpose
It is used to calibrate the amplitude and offset values of all channels within
a module. It also adjusts the amplitude and offset settings in order to make
the measured values should be equal at all channels. It is run at each
module of the AWG (separately for each channel).
Dependencies
No other procedure is required for this calibration.
Procedure
To start the calibration procedure, follow the steps given below:
•
Connect the normal data output of all channels within the module to
the DSO channels (1 to 4) respectively with SMA cables
•
It sets Target values for the Amplitude (difference between the LP high
level and low level values) and Offset using the default values. Then, the
AWG generates an LP signal with the default values of LP high level, LP
low level and offset
•
Once the LP signal is generated, the LP high level, LP low level, and
offset are measured using an oscilloscope. Then, it checks whether the
measured values are within the limits or not. If not, it continues to set
the difference value (between measured and default) with-in the step
till it finds the measured values within the limits
•
At each Generator, the above two steps are repeated and at the same
time, both target and measured values are stored.
Parameters
The parameters used for this calibration are listed alphabetically Table 6
on page 40.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
45
4
Calibrations
Results
Table 8
Calibration data table “Amplifier Level Calibration Module 1”
Parameter name
Parameter description
Result
•
•
Generator Number
It is the number of the Generator at AWG module.
Target Amplitude [mV]
It is the set value of the amplitude.
Amplitude [mV]
It is the actual/measured value of the amplitude.
Target Offset [mV]
It is the set value of the offset.
Offset [mV]
It is the actual/measured value of the offset.
46
Pass: the adjustment passed.
Fail: the adjustment failed.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Calibrations
4
Skew Calibration Module 2
Purpose, Dependencies, Procedure, Parameters and Results
Same as Skew Calibration Module 1 on page 42.
Amplifier Level Calibration Module 2
Purpose, Dependencies, Procedure, Parameters and Results
Same as Amplifier Level Calibration Module 1 on page 44.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
47
4
Calibrations
Inter module Skew Calibration
The following diagram illustrates the connection settings for Inter module
Skew Calibration for M8195A:
Figure 17
Connection Settings for Inter Module Skew Calibration
Purpose
It calibrates the skew among the modules of AWG. It is available only for
the M8195A module, because the modules of M8195A are aligned by the
M8197A sync module and do not need an in-situ skew calibration. It
requires only a static correction of the skew (i.e. the cable skews need to
be compensated). It is not available for M8190A as it needs an in-situ skew
adjustment. When the sample rate changes, then the M8190A modules do
not have an unpredictable skew between the modules.
Dependencies
This procedure does not depend on any other calibration. This calibration
is required for all CTS tests.
However, before conducting the test, the oscilloscope channels need to be
de-skewed to avoid errors caused by the internal skew of the oscilloscope
channels.
48
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Calibrations
4
Procedure
At each module, the first channel normal data output signals are
connected to the DSO channels (1 to 3) respectively with SMA cables. For
this procedure, the skew must be calibrated with the values lesser than the
Skew Tolerance value. At first, a clock (generally a step) pattern is
generated at the first channel and the skew is adjusted for all other
channels with respect to the first channel. The skew is measured and
calibrated iteratively until its value is smaller than the given tolerance
value.
Parameters
The parameters used for this calibration are listed alphabetically in Table 6
on page 40.
Results
Table 9
Calibration data table “Inter module Skew”.
Parameter name
Parameter description
Result
•
•
Skew Value [ps]
It is the skew value of the channel with respect to the first channel of the module.
Pass: it was possible to adjust the skew between lanes below the given tolerance.
Fail: it was not possible to adjust the skew.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
49
4
Calibrations
LP Level Calibration Clock
The following diagrams illustrate the connection settings for the LP Level
Calibration for the both AWGs, M8190A and M8195A respectively. The
procedure applies to all the data lanes:
50
Figure 18
Connection Settings for LP Level Calibration Clock (for M8190A)
Figure 19
Connection Settings for LP Level Calibration Clock (for M8195A)
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Calibrations
4
Purpose
This procedure calibrates the “LP-RX Logic 1 Input Voltage (V_OH)” and
the “LP-RX Logic 0 Input Voltage, Non-ULP State (V_IL)” of the clock lane.
This calibration should be run at all data lanes.
Dependencies
This calibration is required for the CTS test groups 2.1 and 2.2.
It depends on the Amplifier Level calibration procedure.
Procedure
To start the calibration, follow the steps given below:
•
Connect the normal and the complement data output signals of the
lane that is being calibrated to the DSO channels 1 and channel 2
respectively, with high-impedance probes with a
reference-termination-board (Into-open).
•
At first, the AWG generates an LP pattern and for this procedure, some
LP high level values are set according to the specification range from
the Max LP high level and decreased with a Step size value until the
Min LP high value is reached.
•
For each set LP high level value, a sweep performed at a range of the
LP low level value starts from the Max LP low level and decreases with
the Step Size value till the Min LP low level value is reached.
•
Before doing the measurements, the signal is auto scaled so that a new
trigger level is set based on the measured levels of the scaled signal.
This is required in order to keep the signal stable during the
measurement.
•
At each step, the V_OH and V_OL values are measured at the normal
and complement levels of the signal independently using an
oscilloscope and at the same time, the set and measured values are
stored.
Parameters
The parameters used for this calibration are listed alphabetically in Table 6
on page 40.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
51
4
Calibrations
Result
Table 10
Calibration data table “LP Low Level Calibration Clock”
Parameter name
Parameter description
Result
•
•
Set High Level [mV]
It is the set amplitude value of the LP high level according to specification.
Measured Normal for LP Low Level
[mV]
It is the V_OH or V_OL amplitude value measured at the normal signal for the LP low level voltage.
Measured Complement for LP Low
Level
It is the V_OH or V_OL amplitude value measured at the compliment signal for the Low LP low level voltage.
52
Pass: the measured level is within the expected range of +20 % of the set level.
Fail: the measured level deviates more than 20 % from the set level.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Calibrations
4
V_ILHS Calibration Clock
The following diagrams illustrate the connection settings for V_ILHS
Calibration for both AWGs, M8190A and M8195A respectively. This
calibration procedure applies to all data lanes.
Figure 20
Connection Settings for V_ILHS Calibration Module 1 (for M8190A)
Figure 21
Connection Settings for V_ILHS Calibration Module 1 (for M8195A)
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
53
4
Calibrations
Purpose
This procedure calibrates the “HS-RX Single-Ended Input Low Voltage
(V_ILHS)” of the clock lane. This calibration procedure should be run at all
data lanes.
Dependencies
This calibration is required for the CTS test groups 2.3 and 2.4, specially
for Test 2.3.1 HS-RX Common Mode Voltage Tolerance (V_CMRX(DC)),
Test 2.3.2 – HS-RX Differential Input High Threshold (V_IDTH), Test 2.3.3 –
HS-RX Differential Input Low Threshold (V_IDTL), Test 2.3.4 – HS-RX
Single-Ended Input High Voltage (V_IHHS) and Test 2.3.5 – HS-RX
Single-Ended Input Low Voltage (V_ILHS).
It depends on the Amplifier Level Calibration procedure.
Procedure
Connect the normal and the complement data output signals of the lane
that is being calibrated to the DSO channels 1 and 2 respectively, with
high-impedance probes with a reference-termination-board (Into-open).
The procedure sets some V_ILHS values, starts with the “Max Level” and
decreases it subsequently by the “Step Size” until the “Min Level” value is
reached. At each set V_ILHS value, the actual V_ILHS value is measured
independently at the normal and complement signals using a DSO and at
the same time, all measured values are stored.
Parameters
The parameters used for this calibration are listed alphabetically in Table 6
on page 40.
Results
Table 11
Calibration data table “V_ILHS Calibration Clock”
Parameter name
Parameter description
Result
•
•
Set Level [mV]
It is the set V_ILHS value
Measured Normal V_ILHS [mV]
Actual normal value as measured on channel 1 of the DSO using the most frequent value of a histogram
measurement.
Measured Complement V_ILHS
[mV]
Actual complement value as measured on channel 2 of the DSO using the most frequent value of a histogram
measurement.
54
Pass: the measured level is within the expected range of ±20% of the set level.
Fail: the measured level deviates more than ±20% from the set level.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Calibrations
4
Differential Amplitude Calibration Clock
The following diagrams illustrate the connection settings for Differential
Amplitude Calibration Clock for M8190A and M8195A respectively:
Figure 22
Connection Settings for Differential Amplitude Calibration Clock
(for M8190A)
Figure 23
Connection Settings for Differential Amplitude Calibration Clock
(for M8195A)
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
55
4
Calibrations
Purpose
This procedure calibrates the differential amplitude. This calibration
procedure must be run for all data lanes.
Dependencies
This calibration is required for all CTS test groups.
It does not depend on other calibration procedures.
Procedure
Connect the normal and the complement data output signals of the lane
being calibrated to the DSO channels 1 and 2 respectively, with SMA
cables with a 100 Ohm reference-termination-board (terminated). It sets
some amplitude values with the Max Swing Value and decreases with the
Step Size till the Min Swing Value is reached. At each Set Amplitude value,
the normal and complement amplitude levels are measured and at the
same time, the set and measured values are stored.
Parameters
The parameters used for this calibration are listed alphabetically in Table 6
on page 40.
Results
Table 12
Calibration data table “Differential Amplitude Calibration”
Parameter name
Parameter description
Result
•
•
Set Amplitude [mV]
It is the set differential amplitude value.
Measured Normal Amplitude [mV]
Actual normal amplitude as measured on channel1 of the DSO using the most frequent value of a histogram
measurement.
Measured Complement Amplitude [mV]
Actual complement amplitude as measured on channel 2 of the DSO using the most frequent value of a
histogram measurement.
Measured Normal Low Level [mV]
Actual normal low level as measured on channel 1 of the DSO using the most frequent value of a histogram
measurement.
Measured Complement Low Level [mV]
Actual complement low level as measured on channel 2 of the DSO using the most frequent value of a
histogram measurement.
56
Pass: the measured amplitude is within the expected range of ±20% of the set level.
Fail: the measured amplitude deviates more than ±20% from the set level.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Calibrations
4
LP Level Calibration Data0
The following diagrams illustrate the connection settings for LP Level
Calibration Clock Data0 for M8190A and M8195A respectively:
Figure 24
Connection Settings for LP Level Calibration Clock Data0 (for M8190A)
Figure 25
Connection Settings for LP Level Calibration Clock Data0 (for M8195A)
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
57
4
Calibrations
Purpose, Dependencies, Procedure, Parameters and Results
Same as LP Level Calibration Clock on page 50.
58
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Calibrations
4
V_ILHS Calibration Data0
The following diagrams illustrate the connection settings for V_ILHS
Calibration Data0 for M8190A and M8195A respectively:
Figure 26
Connection Settings for V_ILHS Calibration Data0 (for M8190A)
Figure 27
Connection Settings for V_ILHS Calibration Data0 (for M8195A)
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
59
4
Calibrations
Purpose, Dependencies, Procedure, Parameters and Results
Same as V_ILHS Calibration Clock on page 53.
60
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Calibrations
4
e-Spike Calibration
The following diagrams illustrate the connection settings for the e-Spike
Calibration for both AWGs, M8190A and M8195A respectively:
Figure 28
Connection Settings for e-Spike Calibration (for M8190A)
Figure 29
Connection Settings for e-Spike Calibration (for M8195A)
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
61
4
Calibrations
Purpose
The D-PHY input glitch rejection of the LP receivers is tested with the
e-Spikes. The e-Spike calibration procedure calibrates the spike energy.
For more details, refer to the D-PHY specification.
Dependencies
The LP level calibrations must be completed before starting the e-Spike
calibration.
This calibration is only needed for Test 2.1.6 – LP-RX Input Pulse Rejection
(e_SPIKE). Since it takes a very long time to complete, it can be skipped if
test 2.1.6 is not going to be run.
Procedure
To start the e-spike calibration, follow the steps given below:
•
Connect the normal and the complement data output signal of the data
lane to the DSO channels 1 and 2 respectively, with SMA cables with a
reference-termination-board (Into-open).
•
The AWG runs at a higher data rate than the actual LP data rate so the
signal is created by combining multiple ones and zeros.Additinally, the
method sets some Threshold Difference values, starting with the Min
Threshold Difference and then incremented with a Step Size value until
the Max Threshold Difference Value is reached.
•
At each set Threshold Difference value, a sweep performed at the
Energy range starts from the Min Energy Value and incremented with a
Step Size Value till the Max Energy Value is reached.
•
For this calibration measurement, the oscilloscope math functions such
as Subtract, Add, Absolute Value, and Integrate are used in order to
achieve the “PVs” (Energy) units.
•
At each step, the Energy is measured and both (set and measured)
values are stored.
Parameters
The parameters used for this calibration are listed alphabetically in Table 6
on page 40.
62
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Calibrations
4
Results
Table 13
Calibration data table "e-Spike Calibration data rate"
Parameter name
Parameter description
Result
•
•
Threshold Difference [mV]
Difference V_IH – V_IL.
Measured Energy for <n> ns [pVs]
For every Rise Time step, a column with the Threshold energy for each Threshold.
Difference will be created. The value of these Steps will be defined by the minimum and maximum Rise Time
Value as well as the Step size.
Pass: the measured levels are within the expected range of ±20% of the set levels.
Fail: the measured levels deviate more than ±20% from the set levels.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
63
4
Calibrations
Differential Amplitude Calibration Data0
The following diagrams illustrate the connection settings for Differential
Amplitude Calibration Data0 for M8190A and M8195A respectively:
64
Figure 30
Connection Settings for Differential Amplitude Calibration Data0
(for M8190A)
Figure 31
Connection Settings for Differential Amplitude Calibration Data0
(for M8195A)
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Calibrations
4
Purpose, Dependencies, Procedure, Parameters and Results
Same as Differential Amplitude Calibration Clock on page 55.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
65
4
Calibrations
Intrinsic Jitter Calibration
The following diagrams illustrate the connection settings for Intrinsic Jitter
Calibration for M8190A and M8195A respectively:
66
Figure 32
Connection Settings for Intrinsic Jitter Calibration (for M8190A)
Figure 33
Connection Settings for Intrinsic Jitter Calibration (for M8195A)
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Calibrations
4
Purpose
This procedure calibrates the intrinsic jitter amplitude.
Dependencies
This calibration is required for the CTS Test 2.3.8 – HS-RX Setup/Hold and
Jitter Tolerance.
It does not depend on other calibration procedures.
Procedure
Connect the complement of the clock channel to the oscilloscope channel
1 and the normal and complement data outputs of the data lane to the 100
Ohm differential probe and probe to the oscilloscope channel 2. This
procedure measures the intrinsic jitter.
Parameters
The parameters used for this calibration are listed alphabetically in Table 6
on page 40.
Results
Table 14
Calibration data table "Intrinsic Jitter Calibration"
Parameter name
Parameter description
Result
•
•
Measured Jitter [mUI]
It is the measured value of the intrinsic jitter.
Pass: the measured jitter amplitude is within the expected range of ±20% of the set value.
Fail: the measured jitter amplitude deviates more than ±20% from the set levels
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
67
4
Calibrations
Sinusoidal Jitter Calibration
It is available only for the data rates higher than 1500 MBits/s, when CTS
1.2 is selected. The following diagrams illustrate the connection settings
for Sinusoidal Jitter Calibration (>1500 MBits/s) for the both AWGs,
M8190A and M8195A respectively:
68
Figure 34
Connection Settings for Sinusoidal Jitter Calibration(>1500Mbit/s)
(for M8190A)
Figure 35
Connection Settings for Sinusoidal Jitter Calibration (>1500Mbit/s)
(for M8195A)
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Calibrations
4
Purpose
This procedure calibrates the sinusoidal jitter.
Dependencies
This calibration is required for the Eye Opening calibration which in turn is
required for CTS Test 2.3.8 – HS-RX Setup/Hold and Jitter Tolerance.
It does not depend on other calibration procedures.
Procedure
During the initialization, the jitter, which is already present in the channel,
is measured and is subtracted at each and every step so that the SJ is
measured for the applied jitter value. At Step 0, for applied jitter = 0 mUI,
the measured jitter will be 0 and then the jitter to be applied is
incremented till the measured SJ is greater than Max Jitter value.
Parameters
The parameters used for this calibration are listed alphabetically Table 6
on page 40.
Results
Table 15
Calibration data table "Sinusoidal Jitter Calibration (>1500 Mbits/s)"
Parameter name
Parameter description
Result
•
•
Set Jitter [mUI]
It is the set value of the sinusoidal jitter.
Measured Jitter [mUI]
It is the measured value of the sinusoidal jitter.
Pass: pass: the measured jitter amplitude is below maximum value.
Fail: the measured jitter amplitude deviates more than maximum value.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
69
4
Calibrations
Eye Opening Calibration with Jitter
It is available only for data rates higher than 1500 MBits/s and only in
expert mode. The following diagrams illustrate the connection settings for
Eye Opening Calibration with Jitter (>1500 MBits/s) for M8190A and
M8195A respectively:
70
Figure 36
Connection Settings for Eye Opening Calibration with Jitter (>1500Mbit/s)
(for M8190A)
Figure 37
Connection Settings for Eye Opening Calibration with Jitter
(>1500 MBits/s) (for M8195A)
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Calibrations
4
Purpose
This procedure calibrates the eye height and eye-width.
Dependencies
This calibration is required for Test 2.3.8 – HS-RX Setup/Hold and Jitter
Tolerance. Ensure that the Sinusoidal Jitter Calibration, all Skew
calibrations and all Level Calibrations have been performed before the
actual test starts. It also depends on the HS data rate.
Procedure
For the Eye-Width calibration, the amount of sinusoidal jitter that is
required to close the eye to the specified eye width is obtained. At first, it
measures the eye-width and checks whether it is in the specified variation
limits. If not, the sinusoidal jitter is adjusted till the Eye Width Target is
reached. For the Eye-Height calibration, the default differential voltage is
applied and the eye-height is measured. Then, the differential voltage is
reduced by 20% and applied and the eye-height is the measurement is
done. This method is repeated till the Eye-Height Target is reached. At
each measurement, all the values are stored. This procedure needs to be
run again when a different HS data rate is selected.
Parameters
It needs some other parameters than those are listed inTable 3, as
following:
•
Acquisition Length: It is the number of UI’s to be captured to for the eye
•
Calibration Sequence File: It is the HS sequence used during the jitter
calibration.
•
Differential Voltage Amplitude: It is the differential voltage value
applied during the Eye-height calibration.
•
DSO Number of Samples: It is the number of samples used by
oscilloscope to form the eye.
•
Eye Height Target: It is the required eye-height according to the
specification.
•
Eye Width Max. Variation: It is the maximum allowed variation of the
eye-width.
•
Eye Width Target: It is the required eye-width according to the
specification
•
Jitter Frequency: It is the frequency of the induced jitter.
•
Reference Channel S: Parameter File.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
71
4
Calibrations
Results
Table 16
Calibration data table “Eye Opening Calibration with Jitter (>1500 MBits/s)”
Parameter name
Parameter description
Result
•
•
SJ Frequency (MHz)
It is the applied value of the sinusoidal jitter.
SJ Amplitude (UI)
It is the applied SJ amplitude value to close the eye having eye-width between 500 mUI and 525 mUI.
Eye Width (mUI)
It is the measured eye-width value.
Voltage Amplitude (mV)
It is the applied differential voltage amplitude value during the eye-height calibration.
Eye-Height (mV)
It is the measured eye-height value.
Maximum Vppd (mV)
It is the measured value of the peak-to-peak differential voltage.
72
Pass: it was possible to close the eye to the required specification.
Fail: it was not possible to close the eye to the required specification.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Keysight M8085A MIPI D-PHY Receiver Test Software
User Guide
5
Test Procedures
Connection Diagrams for the Test Procedures / 74
Clock Tests / 76
Data Tests / 107
Semi-Automated Tests / 123
LP Tests / 129
Behavioral Tests / 148
The MIPI D-PHY receiver tests comprise of the following test groups:
•
Clock
•
Data
•
Semi-Automated Tests
•
LP Tests
•
Behavioral Tests
This grouping streamlines the test process by minimizing the number of
physical reconnection of cables and other test accessories.
5
Test Procedures
Connection Diagrams for the Test Procedures
The following diagrams illustrate the connection settings, which is
common for all Test Procedures:
74
Figure 38
Connection Settings for Test Procedures (for M8190A)
Figure 39
Connection Settings for Test Procedures (for M8195A)
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Each test can be performed in two modes: Compliance Mode and Expert
Mode. (Refer to Configuration Window on page 11). While the Compliance
Mode has pre-defined optimal values for the test parameters that cannot
be modified; the Expert Mode allows you to customize values or limits for
the parameters, only if required, so that you may analyze the behavior and
limitations of a test. By default, the field for each parameter displays the
values/limits from the CTS. If needed, edit the parameter values/limits to
those supported by your DUT, which may be less than or beyond the CTS
limits.
In Compliance Mode and in the Expert Mode, follow the steps given below,
which are common to all test procedures under the test groups—Clock,
Data, Semi-Automated Tests and LP Tests:
•
Make the connections for the selected test procedure as per the
connection diagram shown in Figure 38 on page 74 and Figure 39 on
page 74 for M8190A and M8195A respectively.
•
Click Run to transmit the test sequence to the DUT. Refer to Performing
Procedures on page 20 to know how to run procedures.
•
From the Results Table, verify that the DUT received the test sequence
without errors.
For the remaining test groups, some of the tests additionally require some
manual steps to be performed, which have been described in the
respective sections.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
75
5
Test Procedures
Clock Tests
Test 2.3.1 Vcmrx Tolerance Clock
CTS Test Number and Name
Test 2.3.1 HS-RX Common Mode Voltage Tolerance (V_CMRX(DC))
Purpose
To verify that the DUT’s HS receiver can successfully receive signals with
common-mode voltage levels (V_CMRX (DC)) within the conformance
limits.
Dependencies
For this test, run the following Calibration procedures as a prerequisite.
(Refer to Performing Procedures on page 20 to know how to run
procedures).
76
•
High Speed Level (V_ILHS) Calibration
•
Skew Calibration
•
Skew Calibration Module 1
•
Skew Calibration Module 2
•
Amplifier Level Calibration
•
Amplifier Level Calibration Module 1
•
Amplifier Level Calibration Module 2
•
Inter Module Skew Calibration
•
V_ILHS Calibration Clock
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Parameters
Table 17
Parameters used in Test 2.3.1 Vcmrx Tolerance Clock
Parameter
Description
BER Limit
Limit used for bit-error-ratio test.
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Maximum Tested value
Maximum common mode levels represented as V_CMRX.
Minimum Tested value
Minimum common mode levels V_CMRX.
Offline
Offline Mode.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
V_OD Array
HS transmission differential voltage array. The first value indicates the differential voltage amplitude
and the second value (1 or -1) indicates the polarity. 1.
Results
The DUT must receive all the test sequences for the maximum and the
minimum common mode voltage without errors.
Table 18
Parameters in the result data table for “Test 2.3.1 Vcmrx Tolerance Clock”
Parameter name
Parameter description
Result
•
•
V_OD [mV]
Tested V_OD for this Step.
Min Passed V_CMRX [mV]
Minimum passed V_CMRX between all test cases.
Min Tested V_CMRX [mV]
Minimum V_CMRX tested so far.
Min Spec V_CMRX [mV]
Minimum V_CMRX according to specification.
Max Passed V_CMRX [mV]
Maximum passed V_CMRX between all test cases.
Max Tested V_CMRX [mV]
Maximum V_CMRX tested so far.
Max Spec V_CMRX [mV]
Maximum V_CMRX according to specification.
Pass: the DUT was able to receive the test sequence for all test cases.
Fail: one or more test cases failed.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
77
5
Test Procedures
Test 2.3.2/3 V_IDTH/V_IDTL Sensitivity Clock
CTS Test Number and Name
Test 2.3.2 – HS-RX Differential Input High Threshold (V_IDTH)
Test 2.3.3 – HS-RX Differential Input Low Threshold (V_IDTL)
Purpose
To verify that the DUT’s HS receiver can properly detect HS-1 voltage
levels that are at least as small as the minimum required value (V_IDTH)
and HS-0 voltage levels that are at least as small as the minimum required
value (V_IDTL).
Dependencies
Ensure that the Skew Calibration procedure, Inter Module Skew
Calibration and V_ILHS Calibration Clock have been performed before the
actual test starts. If these Calibration procedures have already been
conducted in the course of running another HS test, the calibrations are
still valid and do not need to be repeated as long as the settings under the
Configuration Panel remain the same.
Parameters
Table 19
Parameters used in Test 2.3.2/3 V_IDTH/V_IDTL Sensitivity Clock
Parameter
Description
BER Limit
Limit used for bit-error-ratio test.
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be
chosen from the frequencies specified during the DUT configuration.
Maximum Tested value
Maximum common mode levels represented as V_CMRX.
Minimum Tested value
Minimum common mode levels.
Offline
Offline Mode.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
Steps
Specifies the number of steps that are tested between the Start Value and the End Value
for tests in which a range of values is tested.
V_CMTX
HS transmit static common-mode voltage The common-mode voltage VCMTX is defined
as the arithmetic mean value of the voltages at the Dp and Dn pins.
78
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Results
•
For DUTs supporting <= 1.5 Gbps, V_IDTH/V_IDTL must be less/greater
than or equal to 70 mV/-70 mV.
•
For DUTs supporting > 1.5 Gbps, V_IDTH/V_IDTL must be less/greater
than or equal to 40 mV/-40 mV
Table 20
Parameters in the result table for “Test 2.3.2/3 V_IDTH/V_IDTL Sensitivity Clock”
Parameter name
Parameter description
Result
•
•
V_OD [mV]
Differential voltage used during the test.
V_CM [mV]
Common-mode level used during the test.
Min Passed V_IDTH/V_IDTL [mV]
Minimum value of V_IDTH and V_IDTL for which the DUT passed the test.
Min Tested V_IDTH/V_IDTL [mV]
Minimum value tested for V_IDTH and V_IDTL.
Min Spec V_IDTH/V_IDTL [mV]
Minimum value of V_IDTH and V_IDTL according to the specification.
Pass: the DUT's V_IDTH and V_IDTL minimum values conform to the specification.
Fail: the DUT was not able to receive the test sequence with V_IDTH and V_IDTL values within the
specification.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
79
5
Test Procedures
Test 2.3.4 V_IHHS Sensitivity Clock
CTS Test Number and Name
Test 2.3.4 – HS-RX Single-Ended Input High Voltage (V_IHHS)
Purpose
To verify that the DUT’s HS receiver is able to successfully receive HS
signals with the maximum required single-ended voltage levels (V_IHHS).
For details, see the CTS.
Dependencies
Ensure that the Skew Calibration procedure, Inter Module Skew
Calibration and V_ILHS Calibration Clock have been performed before the
actual test starts. If these Calibration procedures have already been
conducted in the course of running another HS test, the calibrations are
still valid and do not need to be repeated as long as the settings under the
Configuration Panel remain the same.
Parameters
Table 21
Parameters used in Test 2.3.4 V_IHHS Sensitivity Clock
Parameter
Description
BER Limit
Limit used for bit-error-ratio test.
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Max Single Ended Voltage
For this test, a high-speed signal is sent to the DUT whose amplitudes are specifically chosen such
that the TX V_OHHS single-ended levels are at the maximum RX V_IHHS limit of 460mV It can be
calculated as (Common mode Voltage+(maximum allowed TX differential voltage/4)) i.e.
325+(540/4) = 460.
Offline
Offline Mode.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
Steps
Specifies the number of steps that are tested between the Start Value and the End Value for tests in
which a range of values is tested.
80
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Results
The DUT must receive the test sequence without errors.
Table 22
Parameters in the result table for “Test 2.3.4 V_IHHS Sensitivity Clock”
Parameter name
Parameter description
Result
•
•
Pass: the DUT was able to receive the test sequence without errors for V_IHHS values within the
specification.
Fail: the DUT failed to receive the test sequence.
V_OD [mV]
Differential voltage used during the test.
V_CM [mV]
The common-mode level used during the test.
Max Passed V_IHHS [mV]
Maximum value of V_IHHS for which the DUT passed the test.
Max Tested V_IHHS [mV]
Maximum value tested for V_IHHS.
Max Value V_IHHS
Maximum value of V_IHHS according to the specification.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
81
5
Test Procedures
Test 2.3.5 V_ILHS Sensitivity Clock
CTS Test Number and Name
Test 2.3.5 – HS-RX Single-Ended Input Low Voltage (V_ILHS).
Purpose
To verify that the DUT’s HS receiver is able to successfully receive HS
signals with the minimum required single-ended voltage levels (V_ILHS).
Dependencies
Ensure that the Skew Calibration procedure, Inter Module Skew
Calibration and V_ILHS Calibration Clock have been performed before the
actual test starts. If these Calibration procedures have already been
conducted in the course of running another HS test, the calibrations are
still valid and do not need to be repeated as long as the settings under the
Configuration Panel remain the same.
Parameters
Table 23
Parameters used in Test 2.3.5 V_ILHS Sensitivity Clock
Parameter
Description
BER Limit
Limit used for bit-error-ratio test.
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Min Single Ended Voltage
For this test, a high-speed signal is sent to the DUT whose amplitudes are specifically chosen such
that the TX V_OLHS single-ended levels are at the maximum RX V_ILHS limit of -40mV. It can be
calculated as (Minimum Common Mode Voltage-(maximum allowed TX differential voltage/4))
i.e.95-(540/4) = -40.
Offline
Offline Mode.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
Steps
Specifies the number of steps that are tested between the Start Value and the End Value for tests in
which a range of values is tested.
82
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Results
The DUT must receive the test sequence without errors.
Table 24
Parameters in the result table for “Test 2.3.5 V_ILHS Sensitivity Clock”
Parameter name
Parameter description
Result
•
•
Pass: the DUT was able to receive the test sequence without errors for V_ILHS values within the
specification.
Fail: the DUT failed to receive the test sequence.
V_OD [mV]
Differential voltage used during the test.
V_CM [mV]
Common-mode level used during the test.
Min Passed V_ILHS [mV]
Maximum value of V_ILHS for which the DUT passed the test.
Min Spec V_ILHS[mV]
Maximum value tested for V_ILHS.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
83
5
Test Procedures
Test 2.3.6 HS RX CM Interference 50-450 MHz Clock
CTS Test Number and Name
Test 2.3.6 – HS-RX Common-Mode Interference 50 MHz – 450 MHz
(ΔVCMRX(LF))
Purpose
To verify that the DUT’s HS receiver is capable of tolerating worst-case
common-mode interference for frequencies between 50 - 450 MHz, with
amplitudes as high as the maximum required limit (ΔV_CMRX (LF)).
Dependencies
Ensure that the Skew Calibration procedure and the Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remain the same.
NOTE
For this test, the software automatically generates a peak voltage of 50
mVpk for DUTs supporting <= 1.5 Gbps. Similarly, it generates 25 mVpk
for DUTs supporting > 1.5Gbps.
To change the value for HS data rate, refer to Configuration on page 12.
84
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Parameters
Table 25
Parameters used in Test 2.3.6 HS RX CM Interference 50-450 MHz Clock
Parameter
Description
BER Limit
Limit used for bit-error-ratio test.
Frequency Range
Range of frequencies used in a calibration or test procedure.
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Maximum Test Voltage
ΔV_CMRX (LF), Maximum Common-mode interference for 50 MHz – 450 MHz.
Minimum Test Voltage
ΔV_CMRX (LF), Minimum Common-mode interference for 50MHz – 450 MHz.
Offline
Offline Mode.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
Steps
Specifies the number of steps that are tested between the Start Value and the End Value for tests in
which a range of values is tested.
V_CMRX; V_OD
V_CMRX is the common-mode voltage HS receive mode; V_OD is defined as the difference of the
voltages V_DP and V_DN at the Dp and Dn pins respectively.
Results
The DUT must receive the test sequence without errors.
Table 26
Parameters in the result table for “Test 2.3.6 HS RX CM Interference 50-450 MHz
Clock”
Parameter name
Parameter description
Result
•
•
Pass: the DUT was able to receive the test sequence without errors for V_ILHS values within the
specification.
Fail: the DUT failed to receive the test sequence.
V_CMRX [mV]
Common-mode voltage level used during this test step.
V_OD [mV]
Differential voltage level used during this test step.
Interference Frequency [MHz]
Interference frequency used during this test step.
Max Passed [mV]
Maximum interference amplitude for which the DUT was able to receive the test sequence without errors
for the given common-mode and differential voltage levels.
Max Spec [mV]
Maximum interference amplitude for which the DUT must be able to receive the test sequence without
errors for the given common-mode and differential voltage levels according to the specification.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
85
5
Test Procedures
Test 2.3.7 HS RX CM Interference beyond 450 MHz Clock
CTS Test Number and Name
Test 2.3.7 – HS-RX Common-Mode Interference Beyond 450 MHz
(ΔVCMRX(HF))
Purpose
To verify that the DUT’s HS receiver is capable of tolerating worst-case
common-mode interference for frequencies greater than 450 MHz, with
amplitudes as high as the maximum required limit (ΔV_CMRX (HF).
Dependencies
Ensure that Skew Calibration procedure and the Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remain the same.
NOTE
For this test, the software automatically generates a peak voltage of 100
mVpk for DUTs supporting <= 1.5 Gbps. Similarly, it generates 50 mVpk
for DUTs supporting > 1.5 Gbps.
To change the value for HS data rate, refer to Configuration on page 12.
86
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Parameters
Table 27
Parameters used in Test 2.3.7 HS RX CM Interference beyond 450 MHz Clock
Parameter
Description
BER Limit
Limit used for bit-error-ratio test.
Frequency Range
Range of frequencies used in a calibration or test procedure.
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Maximum Test Voltage
ΔV_CMRX (HF), Maximum Common-mode interference beyond 450MHz.
Minimum Test Voltage
ΔV_CMRX (HF), Maximum Common-mode interference beyond 450MHz.
Offline
Offline Mode.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
Steps
Specifies the number of steps that are tested between the Start Value and the End Value for tests in
which a range of values is tested.
V_CMRX; V_OD
V_CMRX is the common-mode voltage HS receive mode; V_OD is defined as the difference of the
voltages V_DP and V_DN at the Dp and Dn pins respectively.
Results
For all Lanes the DUT must receive the test sequence without errors.
Table 28
Parameters in the result table for “Test 2.3.7 HS RX CM Interference beyond 450 MHz
Clock”
Parameter name
Parameter description
Result
•
•
Pass: the DUT was able to receive the test sequence without errors for V_ILHS values within the
specification.
Fail: the DUT failed to receive the test sequence.
V_CMRX [mV]
Common-mode voltage level used during this test step.
V_OD [mV]
Differential voltage level used during this test step.
Interference Frequency [MHz]
Interference frequency used during this test step.
Max Passed [mV]
Maximum interference amplitude for which the DUT was able to receive the test sequence without
errors for the given common-mode and differential voltage levels.
Max Spec [mV]
Maximum interference amplitude for which the DUT must be able to receive the test sequence without
errors for the given common-mode and differential voltage levels according to the specification.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
87
5
Test Procedures
Test 2.3.8 HS RX Clock-to-Data Skew
NOTE
This test is available only for DUTs operating at HS rates <= 1.5Gbps.
CTS Test Number and Name
Test 2.3.8 – HS-RX Setup/Hold and Jitter Tolerance
Purpose
To verify that the DUT can tolerate signals with worst-case timing error
between the Clock and Data Skew signals.
Dependencies
Ensure that all the Calibration procedure, except the e-Spike have been
performed before the actual test starts. For the value of the intrinsic jitter
test parameter a particular result of the jitter calibration procedure is used.
It is the jitter measured when no external jitter was injected, that is, the
jitter inherent in the test setup.
88
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Parameters
Table 29
Parameters used in Test 2.3.8 HS RX Clock-to-Data Skew
Parameter
Description
BER Limit
Limit used for bit-error-ratio test.
Binary Search
If this parameter is set to false, then the skew will be swept first with the “Initial Step Size”. As soon
as the first point is detected, at which the BER is above the given limit, the sweep ends. If this
parameter is set to, true “Initial Step Size” is used until the fail point. The skew value is then reduced
by half of the initial step size and, according to the binary search algorithm, increased or decreased
depending on the BER result. For each step the step size is divided by 2 until “Min. Step Size” is
reached.
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Initial Skew Deviation
Allows to save time by starting the test with a Clock to Data Skew different to 0.5UI. The test range
will be from 0.5 UI + Initial Skew Deviation to 1 UI and from -0.5 UI - Initial Skew Deviation to -1 UI.
Initial Step Size
This is the initial skew step size used in this test. If “Binary Search” is set to true, the skew will be
increased for the T_HOLD verification and decreased for T-SETUP with this step size. After the first
fail point, the initial step size is divided by a factor of two until the “Minimum Step Size” is reached.
If “Binary Search” is set to false, the step size will be kept constant.
Intrinsic Jitter
This parameter allows the influence of the test setup on the pass/fail criteria to be removed. Since
the specification limits are given at the pins of the RX and the eye may already be closed by ISI and
other jitter components, half of the intrinsic jitter needs to be added to the setup and hold time. The
default value is taken from the jitter calibration. If the jitter calibration was not conducted with the
board used during the test, the intrinsic jitter value can be modified.
Maximum Tested Skew
Maximum tolerable skew between data and clock edges.
Minimum Step Size
This is the minimum skew step size used with “Binary Search” set to true.
Offline
Offline Mode.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
V_CMTX
HS transmit static common-mode voltage. The common-mode voltage VCMTX is defined as the
arithmetic mean value of the voltages at the Dp and Dn pins.
V_OD max
The maximum value of differential output voltage V_OD which is defined as the difference of the
voltages V_DP and V_DN at the Dp and Dn pins, respectively.
V_OD min
The minimum value of differential output voltage V_OD which is defined as the difference of the
voltages V_DP and V_DN at the Dp and Dn pins, respectively.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
89
5
Test Procedures
Results
The DUT must receive zero errors.
Table 30
Parameters in the result table for “Test 2.3.8 HS RX Clock-to-Data Skew”
Parameter name
Parameter description
Result
•
•
Skew Type
Type of skew used during the test are:
Hold: Skew T_Hold
Setup: Skew T_Setup
Eye Opening: Skew T_Hold and T_Setup
V_OD [mV]
Differential voltage used during the test.
Skew [mUI]
Tested Skew.
Set Value [UI]
Set Jitter Value .
Max Passed [UI]
Maximum Skew value tested so far that did not prevent the DUT from receiving the test sequence.
Max Tested [UI]
Maximum tested Skew.
Max Spec [UI]
Maximum Skew that the DUT should be able to handle according to the specification.
Min Passed[UI]
Minimum Skew value tested so far that did not prevent the DUT from receiving the test sequence.
Min Tested [UI]
Minimum tested Skew.
Min Spec [UI]
Minimum Skew that the DUT should be able to handle according to the specification.
90
Pass: the DUT was able to receive the test sequence without errors.
Fail: the DUT failed to receive the test sequence.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Test 2.4.7 T_Clk-Prepare-Zero Compliance Procedure
CTS Test Number and Name
Test 2.4.7 – Clock Lane HS-RX T_CLK-PREPARE + T_CLK-ZERO Tolerance
Purpose
To verify that the DUT’s Clock Lane HS receiver can tolerate receiving
value for T_CLK-PREPARE+T_CLK-ZERO that conform to the specification.
Dependencies
Ensure that the Skew Calibration procedure and the Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remain the same.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
91
5
Test Procedures
Parameters
Table 31
Parameters used in Test 2.4.7 T_Clk-Prepare-Zero Compliance Procedure
Parameter
Description
BER Limit
Limit used for bit-error-ratio test.
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Offline
Offline Mode.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
T-Clk-Post
Time that the transmitter continues to send HS clock after the last associated Data Lane has
transitioned to LP Mode. Interval is defined as the period from the end of T_HS-Trail to the beginning
of T_Clk-Trail.
T-Clk-Pre
Time that the HS clock will be driven by the transmitter prior to any associated Data Lane beginning
the transition from LP to HS mode.
T-Clk/HS Trail
This parameter has two meanings:
• During Clock Timing tests such as the “HS-RX Clock Tests”, it is used for T_Clk-Trail, the time
that the transmitter drives the HS-0 state after last payload data bit of a HS transmission burst.
• During Data Timing tests such as the “HS-RX Data0 Tests”, it is used for T_HS-Trail, the
corresponding time for the Data Lane(s).
T- Prepare; T- Prepare -Zero
•
•
T- Prepare is the time that the HS clock will be driven by the transmitter prior to any associated
Data Lane beginning the transition from LP to HS mode.
T- Prepare –Zero is the time taken for the transmitter to drive HS -0 state prior to transmitting a
sync sequence.
Results
The DUT must receive zero errors.
Table 32
Parameter name
Result
Parameters in the result table for “Test 2.4.7 T_Clk-Prepare-Zero
Compliance Procedure”
Parameter description
•
•
Pass: the DUT was able to receive the test sequence for the given T_CLK-PREPARE + T_CLK-ZERO
combination.
Fail: the DUT failed to receive the test sequence.
T_Clk-Prepare [ns]
T_CLK-PREPARE used for this test step.
T_Clk-Zero [ns]
T_CLK-ZERO used for this test step.
T_Clk-Prepare+Zero [ns]
Total T_CLK-PREPARE + T_CLK-ZERO used for this test step.
92
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Test 2.4.7a T_Clk-Prepare - Clock Procedure
CTS Test Number and Name
Test 2.4.7a T_Clk-Prepare - Clock Procedure
This test is provided additionally for product characterization. It is based
on the CTS test 2.4.7.
Purpose
To characterize the DUT’s Clock Lane HS receiver tolerance for
T_CLK-PREPARE timing deviations.
Dependencies
This test is available in Expert Mode only.
Ensure that the Skew Calibration procedure and the Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remain the same.
Parameters
Table 33
Parameters used in Test 2.4.7a T_Clk-Prepare - Clock Procedure
Parameter
Description
BER Limit
Limit used for bit-error-ratio test.
End Value
For tests in which a range of values is tested; specifies the last value that is tested.
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Offline
Offline Mode.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
Start Value
Specifies the first value that is tested for tests in which a range of values is tested.
Steps
Specifies the number of steps that are tested between the Start Value and the End Value for tests in
which a range of values is tested.
T-Clk-Post
Time that the transmitter continues to send HS clock after the last associated Data Lane has
transitioned to LP Mode. Interval is defined as the period from the end of T_HS-Trail to the beginning
of T_Clk-Trail.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
93
5
Test Procedures
T-Clk-Pre
Time that the transmitter will drive the HS clock prior to any associated Data Lane beginning the
transition from LP to HS mode.
T-Clk/HS Prepare
This parameter has two meanings:
• During Clock Timing tests such as the “HS-RX Clock Tests”, it is used for T_Clk-Prepare, the time
that the transmitter drives the Clock Lane LP-00 Line state immediately before the HS-0 Line
state starting the HS transmission.
• During Data Timing tests such as the “HS-RX Data0 Tests”, it is used for T_HS-Prepare, the time
specified for the Data Lane(s).
T-Clk/HS Prepare + Clk/HS-Zero
This parameter has two meanings:
• During Clock Timing tests such as the “HS-RX Clock Tests”, it is used for T_Clk-Prepare +
T_Clk_Zero (T_Clk-Prepare plus time that the transmitter drives the HS-0 state prior to starting
the Clock).
• During Data Timing tests such as the “HS-RX Data0 Tests”, it is used for T_HS-Prepare +
T_Clk_Zero as specified for the Data Lane(s).
T-Clk/HS Trail
This parameter has two meanings:
• During Clock Timing tests such as the “HS-RX Clock Tests”, it is used for T_Clk-Trail, the time
that the transmitter drives the HS-0 state after last payload data bit of a HS transmission burst.
• During Data Timing tests such as the “HS-RX Data0 Tests”, it is used for T_HS-Trail, the
corresponding time for the Data Lane(s).
Results
The DUT must receive zero errors.
Table 34
Parameters in the result table for “Test 2.4.7a T_Clk-Prepare Clock Procedure”
Parameter name
Parameter description
Result
•
•
Pass: the DUT was able to receive the test sequence for the given T_CLK-PREPARE + T_CLK-ZERO
combination.
Fail: the DUT failed to receive the test sequence.
Parameter
Tested timing parameter.
Min Passed [ns]
Minimum T_CLK-PREPARE value for which the DUT passed the test.
Min Spec [ns]
Minimum T_CLK-PREPARE value according to the specification.
Max Passed [ns]
Maximum T_CLK-PREPARE value for which the DUT passed the test.
Max Spec [ns]
Maximum T_CLK-PREPARE value according to the specification.
94
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Test 2.4.7b T_Clk-Prepare_Zero - Clock Procedure
CTS Test Number and Name
Test 2.4.7 T_Clk-Prepare_Zero - Clock Procedure
This test is provided additionally for product characterization. It is based
on the CTS test 2.4.7.
Purpose
To characterize the DUT’s Clock Lane HS receiver tolerance for
T_CLK-PREPARE + T_CLK-ZERO timing deviations.
Dependencies
This test is available in Expert Mode only.
Ensure that Skew Calibration procedure and Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remain the same.
Parameters
Same as Test 2.4.7a T_Clk-Prepare - Clock Procedure on page 93.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
95
5
Test Procedures
Results
The DUT must receive zero errors.
Table 35
Parameter name
Parameter description
Result
•
•
Parameters in the result data table for “Test 2.4.7b T_Clk-Prepare_
Zero - Clock Procedure”
Pass: the DUT was able to receive the test sequence for the given T_CLK-PREPARE + T_CLK-ZERO
combination.
Fail: the DUT failed to receive the test sequence.
T_Clk-Prepare [ns]
Tested T_CLK-PREPARE value.
T_Clk-Zero [ns]
Tested T_CLK -ZERO value.
Parameter
Tested timing parameters.
Min Passed [ns]
Minimum T_CLK-PREPARE + T_CLK -ZERO value for which the DUT passed the test.
Min Spec [ns]
Minimum T_CLK-PREPARE + T_CLK -ZERO value according to the specification.
Max Passed [ns]
Maximum T_CLK-PREPARE + T_CLK -ZERO value for which the DUT passed the test.
Max Spec [ns]
Maximum T_CLK-PREPARE + T_CLK -ZERO value according to the specification.
96
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Test 2.4.8 T_Clock- Settle - Clock Procedure
CTS Test Number and Name
Test 2.4.8 – Clock Lane HS-RX TCLK-SETTLE Value
Purpose
To verify that the DUT’s Clock Lane receiver incorporates a sufficient time
out interval (T_CLK-SETTLE) to ignore transition effects that may occur
during the HS Entry sequence.
Dependencies
Ensure that the Skew Calibration procedure and the Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remain the same.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
97
5
Test Procedures
Parameters
Table 36
Parameters used in Test 2.4.8 T_Clock- Settle - Clock Procedure
Parameter
Description
BER Limit
Limit used for bit-error-ratio test.
Binary Search
If this parameter is set to false, then the skew will be swept first with the “Initial Step Size”. As soon
as the first point is detected, at which the BER is above the given limit, the sweep ends. If this
parameter is set to, true “Initial Step Size” is used until the fail point. The skew value is then reduced
by half of the initial step size and, according to the binary search algorithm, increased or decreased
depending on the BER result. For each step the step size is divided by 2 until “Min. Step Size” is
reached.
Disturbance Pattern
The methodology for this test involves sending HS burst sequences containing valid
minimum-length T_CLK-PREPARE values (38 ns), followed by a valid minimum-length T_CLK-ZERO
(262 ns), so that TCLK-PREPARE + TCLK-ZERO is at the minimum conformant value of 300ns.
However, at the beginning of TCLK-ZERO, repeating 1010 HS clock data will be inserted in place of
the first 95 - 38 = 57 ns of TCLK-ZERO. This ‘false clock’ sequence is used to create the appearance
that the HS clock signal has started, when really there will be another period of HS-0 following this
sequence, before the HS clock actually begins.
End Value
For tests in which a range of values is tested; specifies the last value that is tested
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Offline
Offline Mode.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
Start Value
Specifies the first value that is tested for tests in which a range of values is tested.
Step Size in UI
Specifies the size of the steps in UI that is used between the Start Value and the End Value for tests
in which a range of values is tested.
T-Clk-Post
Time that the transmitter continues to send HS clock after the last associated Data Lane has
transitioned to LP Mode. Interval is defined as the period from the end of T_HS-Trail to the beginning
of T_Clk-Trail.
T-Clk-Pre
Time that the HS clock will be driven by the transmitter prior to any associated Data Lane beginning
the transition from LP to HS mode. For details.
98
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
T-Clk/HS Prepare
This parameter has two meanings:
• During Clock Timing tests such as the “HS-RX Clock Tests, it is used for T_Clk-Prepare, the time
that the transmitter drives the Clock Lane LP-00 Line state immediately before the HS-0 Line
state starting the HS transmission.
• During Data Timing tests such as the “HS-RX Data0 Tests”, it is used for T_HS-Prepare, the time
specified for the Data Lane(s).
T-Clk/HS Prepare + Clk/HS-Zero
This parameter has two meanings:
• During Clock Timing tests such as the “HS-RX Clock Tests”, it is used for T_Clk-Prepare +
T_Clk_Zero (T_Clk-Prepare plus time that the transmitter drives the HS-0 state prior to starting
the Clock).
• During Data Timing tests such as the “HS-RX Data0 Tests”, it is used for T_HS-Prepare +
T_Clk_Zero as specified for the Data Lane(s).
T-Clk/HS Trail
This parameter has two meanings:
• During Clock Timing tests such as the “HS-RX Clock Tests”, it is used for T_Clk-Trail, the time
that the transmitter drives the HS-0 state after last payload data bit of a HS transmission burst.
• During Data Timing tests such as the “HS-RX Data0 Tests”, it is used for T_HS-Trail, the
corresponding time for the Data Lane(s).
Results
The image data must be properly received by the DUT without error.
Table 37
Table 36: Parameters in the result table for “Test 2.4.8 T_
Clock- Settle - Clock Procedure”
Parameter name
Parameter description
Result
•
•
max. passed T_Clk-Settle [ns]
Maximum T_CLK-SETTLE value for which the DUT passed the test
min. failed T_Clk-Settle [ns]
Minimum T_CLK-SETTLE value for which the DUT failed the test
min. Spec T_Clk-Settle [ns]
Minimum T_CLK-SETTLE value according to the specification
max. Spec T_Clk-Settle [ns]
Maximum T_CLK-SETTLE value according to the specification
Pass: the DUT was able to receive the test sequence for the given T_CLK-SETTLE value
Fail: the DUT failed to receive the test sequence
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
99
5
Test Procedures
Test 2.4.9 T_Clk-Trail - Clock Procedure
CTS Test Number and Name
Test 2.4.9 – Clock Lane HS-RX TCLK-TRAIL Tolerance
Purpose
To verify that the DUT’s Clock Lane HS receiver can tolerate receiving
values of T_CLK-TRAIL that conform to the specification.
Dependencies
Ensure that the Skew Calibration procedure and the Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remain the same.
Parameters
Table 38
Parameters used in Test 2.4.9 T_Clk-Trail - Clock Procedure
Parameter
Description
BER Limit
Limit used for bit-error-ratio test
End Value
For tests in which a range of values is tested; specifies the last value that is tested.
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Offline
Offline Mode
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
Start Value
Specifies the first value that is tested for tests in which a range of values is tested.
Steps
Specifies the number of steps that are tested between the Start Value and the End Value for tests in
which a range of values is tested.
T-Clk-Post
Time that the transmitter continues to send HS clock after the last associated Data Lane has
transitioned to LP Mode. Interval is defined as the period from the end of T_HS-Trail to the beginning
of T_Clk-Trail.
T-Clk-Pre
Time that the HS clock will be driven by the transmitter prior to any associated Data Lane beginning
the transition from LP to HS mode.
100
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
T-Clk/HS Prepare
This parameter has two meanings:
• During Clock Timing tests such as the “HS-RX Clock Tests, it is used for T_Clk-Prepare, the time
that the transmitter drives the Clock Lane LP-00 Line state immediately before the HS-0 Line
state starting the HS transmission.
• During Data Timing tests such as the “HS-RX Data0 Tests”, it is used for T_HS-Prepare, the time
specified for the Data Lane(s).
T-Clk/HS Prepare + Clk/HS-Zero
This parameter has two meanings:
• During Clock Timing tests such as the “HS-RX Clock Tests”, it is used for T_Clk-Prepare +
T_Clk_Zero (T_Clk-Prepare plus time that the transmitter drives the HS-0 state prior to starting
the Clock).
• During Data Timing tests such as the “HS-RX Data0 Tests”, it is used for T_HS-Prepare +
T_Clk_Zero as specified for the Data Lane(s).
T-Clk/HS Trail
This parameter has two meanings:
• During Clock Timing tests such as the “HS-RX Clock Tests”, it is used for T_Clk-Trail, the time
that the transmitter drives the HS-0 state after last payload data bit of a HS transmission burst.
• During Data Timing tests such as the “HS-RX Data0 Tests”, it is used for T_HS-Trail, the
corresponding time for the Data Lane(s).
Results
For all test cases, the DUT must successfully receive the HS image data
without error.
Table 39
Parameters in the result table for Test 2.4.9 T_Clk-Trail - Clock Procedure”
Parameter name
Parameter description
Result
•
•
Parameter
Tested timing parameter.
Min Passed
Minimum T_CLK-TRAIL value for which the DUT passed the test.
Min Spec [ns]
Minimum T_CLK-TRAIL value according to the specification.
Max Passed [ns]
Maximum T_CLK-TRAIL value for which the DUT passed the test.
Max Spec [ns]
Maximum T_CLK-TRAIL value according to the specification.
Pass: the DUT was able to receive the test sequence for the given T_CLK-TRAIL value.
Fail: he DUT failed to receive the test sequence.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
101
5
Test Procedures
Test 2.4.10 T_Clk-Miss Procedure
CTS Test Number and Name
Test 2.4.10 – Clock Lane HS-RX TCLK-MISS Value.
Purpose
To verify that the DUT’s Clock Lane HS receiver correctly detects the
cessation of clock activity and disconnects its line termination within the
maximum allowed interval (T_CLK-MISS).
Dependencies
This test is available in Expert Mode only.
Ensure that the Skew Calibration procedure and the Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remain the same.
Parameters
Table 40
Parameters used in Test 2.4.10 T_Clk-Miss Procedure
Parameter
Description
BER Limit
Limit used for bit-error-ratio test.
End Value
For tests in which a range of values is tested; specifies the last value that is tested.
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Offline
Offline Mode.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
Start Value
Specifies the first value that is tested for tests in which a range of values is tested.
Steps
Specifies the number of steps that are tested between the Start Value and the End Value for tests in
which a range of values is tested.
102
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Results
The TCLK-MISS (Max Passed [ns]) must be less than 60 ns.
Table 41
Parameter name
Result
Parameters in the results table for “Test 2.4.10 T_Clk-Miss Procedure”
Parameter description
•
•
Pass: the DUT was able to receive the test sequence for the given T_CLK-MISS value.
Fail: the DUT failed to receive the test sequence.
Parameter
Tested timing parameter.
Max Passed [ns]
Maximum T_CLK-MISS value for which the DUT passed the test.
Max Spec [ns]
Maximum T_CLK-MISS value according to the specification.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
103
5
Test Procedures
Test 2.4.11a T_Clk-Pre - Clock Procedure
CTS Test Number and Name
Test 2.4.11 – Clock Lane HS-RX TCLK-PRE and TCLK-POST Tolerance
Purpose
To verify that the DUT’s Clock Lane HS receiver can tolerate the reception
of bursts that has minimum-duration T_CLK-PRE values.
Dependencies
Ensure that the Skew Calibration procedure and the Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remain the same.
Parameters
Table 42
Parameters used in Test 2.4.11a T_Clk-Pre - Clock Procedure
Parameter
Description
BER Limit
Limit used for bit-error-ratio test.
End Value
For tests in which a range of values is tested; specifies the last value that is tested.
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Offline
Offline Mode.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
Start Value
Specifies the first value that is tested for tests in which a range of values is tested.
Steps
Specifies the number of steps that are tested between the Start Value and the End Value for tests in
which a range of values is tested.
T-Clk-Post
Time that the transmitter continues to send HS clock after the last associated Data Lane has
transitioned to LP Mode. Interval is defined as the period from the end of T_HS-Trail to the beginning
of T_Clk-Trail.
T-Clk-Pre
Time that the HS clock will be driven by the transmitter prior to any associated Data Lane beginning
the transition from LP to HS mode.
104
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
T-Clk/HS Prepare
This parameter has two meanings:
• During Clock Timing tests such as the “HS-RX Clock Tests,”, it is used for T_Clk-Prepare, the
time that the transmitter drives the Clock Lane LP-00 Line state immediately before the HS-0
Line state starting the HS transmission.
• During Data Timing tests such as the “HS-RX Data0 Tests”, it is used for T_HS-Prepare, the time
specified for the Data Lane(s).
T-Clk/HS Prepare + Clk/HS-Zero
This parameter has two meanings:
• During Clock Timing tests such as the “HS-RX Clock Tests”, it is used for T_Clk-Prepare +
T_Clk_Zero (T_Clk-Prepare plus time that the transmitter drives the HS-0 state prior to starting
the Clock).
• During Data Timing tests such as the “HS-RX Data0 Tests”, it is used for T_HS-Prepare +
T_Clk_Zero as specified for the Data Lane(s).
T-Clk/HS Trail
This parameter has two meanings:
• During Clock Timing tests such as the “HS-RX Clock Tests”, it is used for T_Clk-Trail, the time
that the transmitter drives the HS-0 state after last payload data bit of a HS transmission burst.
• During Data Timing tests such as the “HS-RX Data0 Tests”, it is used for T_HS-Trail, the
corresponding time for the Data Lane(s).
Results
The DUT must successfully receive the HS image data without error and
the minimum TX conformant value for T_CLK-PRE must be 8*UI.
Table 43
Parameters in the result data table “Test 2.4.11a T_Clk-Pre - Clock Procedure”
Parameter name
Parameter description
Result
•
•
Parameter
Tested timing parameter.
Min Passed [ns]
Minimum T_CLK-PRE value for which the DUT passed the test.
Min Spec [ns]
Minimum T_CLK-PRE value according to the specification.
Max Passed [ns]
Maximum T_CLK-PRE value for which the DUT passed the test.
Max Spec [ns]
Maximum T_CLK-PRE value according to the specification.
Pass: the DUT was able to receive the test sequence for the given T_CLK-MISS value.
Fail: the DUT failed to receive the test sequence.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
105
5
Test Procedures
Test 2.4.11b T_Clk-Post Clock Procedure
CTS Test Number and Name
Test 2.4.11 – Clock Lane HS-RX TCLK-PRE and TCLK-POST Tolerance.
Purpose
To verify that the DUT’s Clock Lane HS receiver can tolerate the reception
of bursts that has minimum duration T_CLK-POST values.
Dependencies
Ensure that the Skew Calibration procedure and the Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remain the same.
Parameters
Same as Test 2.4.11a T_Clk-Pre - Clock Procedure on page 104.
Results
The DUT must successfully receive the HS image data without error and
the minimum TX conformant value for T_CLK-POST must be 60 ns+52*UI.
Table 44
Parameters in the results data table “Test 2.4.11b T_Clk-Post Clock Procedure”
Parameter name
Parameter description
Result
•
•
Parameter
Tested timing parameter.
Min Passed [ns]
Minimum T_CLK-POST value for which the DUT passed the test.
Min Spec [ns]
Minimum T_CLK-POST value according to the specification.
Max Passed [ns]
Maximum T_CLK-POST value for which the DUT passed the test.
Max Spec [ns]
Maximum T_CLK-POST value according to the specification.
106
Pass: the DUT was able to receive the test sequence for the given T_CLK-MISS value.
Fail: the DUT failed to receive the test sequence.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Data Tests
NOTE
For M8195A module, in Receiver Test Configuration, if you select “1
Lane” from “Number of Data Lanes:”, only Data0 tests are available. But if
you select “2 Lanes”, then Data1 tests, corresponding to Lane 2, are also
available along with Data0 tests.
Similarly, if you select “3 Lanes” or “4 Lanes”, Data2 tests or Data3 tests
are available respectively, along with the preceding Data lane tests.
This section describes Data0 tests. Use the same description for Data1,
Data2 and Data3 tests respectively.
Test 2.3.1 Vcmrx Tolerance Data
CTS Test Number and Name
Test 2.3.1 – HS-RX Common Mode Voltage Tolerance (V_CMRX(DC))
Purpose, Dependencies, Parameters, Results
Same as Test 2.3.1 Vcmrx Tolerance Clock on page 76.
Test 2.3.2/3 V_IDTH/V_IDTL Sensitivity Data
CTS Test Number and Name
•
Test 2.3.2 – HS-RX Differential Input High Threshold (V_IDTH)
•
Test 2.3.3 – HS-RX Differential Input Low Threshold (V_IDTL)
Purpose, Dependencies, Parameters and Results
Same as Test 2.3.2/3 V_IDTH/V_IDTL Sensitivity Clock on page 78.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
107
5
Test Procedures
Test 2.3.4 V_IHHS Sensitivity Data
CTS Test Number and Name
Test 2.3.4 – HS-RX Single-Ended Input High Voltage (V_IHHS)
Purpose, Dependencies, Parameters and Results
Same as Test Test 2.3.4 V_IHHS Sensitivity Clock on page 80.
Test 2.3.5 V_ILHS Sensitivity Data
CTS Test Number and Name
Test 2.3.5 – HS-RX Single-Ended Input Low Voltage (V_ILHS)
Purpose, Dependencies, Procedure, Parameters and Results
Same as Test Test 2.3.5 V_ILHS Sensitivity Clock on page 82.
Test 2.3.6 HS RX CM Interference 50-450 MHz Data
CTS Test Number and Name
Test 2.3.6 – HS-RX Common-Mode Interference 50MHz - 450MHz
(ΔV_CMRX(LF))
Purpose, Dependencies, Parameters and Results
Same as Test Test 2.3.6 HS RX CM Interference 50-450 MHz Clock on
page 84.
108
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Test 2.3.7 HS RX CM Interference beyond 450 MHz Data
CTS Test Number and Name
Test 2.3.7 – HS-RX Common-Mode Interference Beyond 450MHz
(ΔV_CMRX(HF))
Purpose, Dependencies, Parameters and Results
Same as Test 2.3.7 HS RX CM Interference beyond 450 MHz Clock on
page 86.
Test 2.3.8 HS RX Data-to-Clock Skew Data
CTS Test Number and Name
Test 2.3.8 – HS-RX Setup/Hold and Jitter Tolerance
Purpose
To verify that the DUT can tolerate signals with worst-case timing error
between the Clock and Data Lane signals. Static skew’ test means the
skew on each bit is identical. The skew increases successively to find the
total skew window that can be tolerated by the DUT.
Dependencies (For DUTs operating at HS rates <= 1.5 Gbps)
Ensure that all the Calibration procedure, except the e-Spike have been
performed before the actual test starts. For the value of the intrinsic jitter
test parameter a particular result of the jitter calibration procedure is used.
It is the jitter measured when no external jitter was injected, that is, the
jitter inherent in the test setup.
Dependencies (For DUTs operating at HS rates > 1.5 Gbps)
Ensure that the Skew Calibration procedure and the Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remain the same.
Connect the RX Test Signal Source to the RTB, and calibrate the rise time,
ISI, and eye height and width as per the steps described in Calibration
Procedure “Eye Opening Calibration with Jitter”.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
109
5
Test Procedures
Parameters
Same as Test 2.3.8 HS RX Clock-to-Data Skew on page 88.
Results
•
For DUTs operating at an HS rate <=1Gbps the minimum valid T_HOLD
value for the DUT must be less than 0.15 UI
•
For DUTs operating at an HS rate <=1Gbps the minimum valid T_SETUP
value for the DUT must be less than 0.15 UI
•
For DUTs operating at an HS rate >1Gbps and <= 1.5Gbps the
minimum valid T_HOLD value for the DUT must be less than 0.20 UI
•
For DUTs operating at an HS rate >1Gbps and <= 1.5Gbps the
minimum valid T_ETUP value for the DUT must be less than 0.20 UI
•
For DUTs operating at an HS rate >1.5 Gbps in all Test Cases, the DUT
must receive zero errors
Table 45
Parameters in the result table for “Test 2.3.8 HS RX Clock-to-Data Skew”
Parameter name
Parameter description
Result
•
•
Skew Type
Type of skew used during the test are:
Hold: Skew T_Hold
Setup: Skew T_Setup
Eye Opening: Skew T_Hold and T_Setup
V_OD [mV]
Differential voltage used during the test.
Skew [mUI]
Tested Skew.
Set Value [UI]
Set Jitter Value.
Max Passed [UI]
Maximum Skew value tested so far that did not prevent the DUT from receiving the test sequence.
Max Tested [UI]
Maximum tested Skew .
Max Spec [UI]
Maximum Skew that the DUT should be able to handle according to the specification.
Min Passed[UI]
Minimum Skew value tested so far that did not prevent the DUT from receiving the test sequence.
Min Tested [UI]
Minimum tested Skew.
Min Spec [UI]
Minimum Skew that the DUT should be able to handle according to the specification.
110
Pass: he DUT was able to receive the test sequence without errors.
Fail: he DUT failed to receive the test sequence.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Test 2.4.2 T_HS-Prepare_Zero Compliance Procedure Data
CTS Test Number and Name
Test 2.4.2 – Data Lane HS-RX THS-PREPARE + THS-ZERO Tolerance
Purpose
To verify that the DUT’s Data Lane HS receiver can tolerate the reception
of conformant values for THS-PREPARE + THS-ZERO.
Dependencies
Ensure that the Skew Calibration procedure and the Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remain the same.
Parameters
Table 46
Parameters used in Test 2.4.2 T_HS-Prepare_Zero Compliance Procedure DataT
Parameter
Description
BER Limit
Limit used for bit-error-ratio test.
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Offline
Offline Mode
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
T-Clk-Post
Time that the transmitter continues to send HS clock after the last associated Data Lane has
transitioned to LP Mode. Interval is defined as the period from the end of T_HS-Trail to the beginning
of T_Clk-Trail.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
111
5
Test Procedures
T-Clk-Pre
Time that the HS clock will be driven by the transmitter prior to any associated Data Lane beginning
the transition from LP to HS mode.
T-Clk/HS Trail
This parameter has two meanings:
During Clock Timing tests such as the “HS-RX Clock Tests”, it is used for T_Clk-Trail, the time that
the transmitter drives the HS-0 state after last payload data bit of a HS transmission burst.
During Data Timing tests
such as the “HS-RX Data0 Tests”, it is used for T_HS-Trail, the corresponding time for the Data
Lane(s).
T- Prepare; T- Prepare -Zero
T- Prepare is the time that the HS clock will be driven by the transmitter prior to any associated Data
Lane beginning the transition from LP to HS mode.
T- Prepare –Zero is the time taken for the transmitter to drive HS -0 state prior to transmitting sync
sequence.
Results
For all test cases, the DUT must successfully receive the HS burst data
without error.
Table 47
Parameters in the result table for “Test 2.4.2 T_HS-Prepare_Zero
Compliance Procedure Data”
Parameter name
Parameter description
Result
Pass: the DUT was able to receive the test sequence without errors.
Fail: the DUT failed to receive the test sequence.
T_HS-Prepare [ns]
T_HS-PREPARE used for this test step.
T_HS-Zero [ns]
T_HS-ZERO used for this test step.
T_HS-Prepare+Zero [ns]
Total T_HS-PREPARE + T_HS-ZERO used for this test step.
112
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Test 2.4.2a T_HS-Prepare Data Procedure
CTS Test Number and Name
This test is provided additionally for product characterization. It is based
on the CTS test 2.4.2.
Purpose
To characterize the DUT’s Data Lane HS receiver tolerance for
T_HS-PREPARE timing deviations.
Dependencies
This test is available in Expert Mode only.
Ensure that the Skew Calibration procedure and the Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remain the same.
Parameters
Table 48
Parameters used in Test 2.4.2a T_HS-Prepare Data Procedure
Parameter
Description
BER Limit
Limit used for bit-error-ratio test.
End Value
For tests in which a range of values is tested; specifies the last value that is tested.
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Offline
Offline Mode.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
Start Value
Specifies the first value that is tested for tests in which a range of values is tested.
Steps
Specifies the number of steps that are tested between the Start Value and the End Value for tests in
which a range of values is tested.
T-Clk-Post
Time that the transmitter continues to send HS clock after the last associated Data Lane has
transitioned to LP Mode. Interval is defined as the period from the end of T_HS-Trail to the beginning
of T_Clk-Trail.
T-Clk-Pre
Time that the HS clock will be driven by the transmitter prior to any associated Data Lane beginning
the transition from LP to HS mode.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
113
5
Test Procedures
T-Clk/HS Prepare
This parameter has two meanings:
• During Clock Timing tests such as the “HS-RX Clock Tests, section 4.1”, it is used for
T_Clk-Prepare, the time that the transmitter drives the Clock Lane LP-00 Line state immediately
before the HS-0 Line state starting the HS transmission,
• During Data Timing tests such as the “HS-RX Data0 Tests ”, it is used for T_HS-Prepare, the time
specified for the Data Lane(s)..
T-Clk/HS Prepare + Clk/HS-Zero
This parameter has two meanings:
• During Clock Timing tests such as the “HS-RX Clock Tests”, it is used for T_Clk-Prepare +
T_Clk_Zero (T_Clk-Prepare plus time that the transmitter drives the HS-0 state prior to starting
the Clock).
• During Data Timing tests such as the “HS-RX Data0 Tests”, it is used for T_HS-Prepare +
T_Clk_Zero as specified for the Data Lane(s).
T-Clk/HS Trail
This parameter has two meanings:
• During Clock Timing tests such as the “HS-RX Clock Tests”, it is used for T_Clk-Trail, the time that
the transmitter drives the HS-0 state after last payload data bit of a HS transmission burst.
• During Data Timing tests such as the “HS-RX Data0 Tests”, it is used for T_HS-Trail, the
corresponding time for the Data Lane(s).
Results
For all test cases, the DUT must successfully receive the HS burst data
without error.
Table 49
Parameter name
Parameter description
Result
•
•
Parameters in the result table for “Test 2.4.2a T_HS-Prepare Data Procedure”
Pass: the DUT was able to receive the test sequence without errors for T_HS-PREPARE values within the
specification.
Fail: the DUT failed to receive the test sequence.
Parameter
Timing parameter that is being tested.
Min Passed [ns]
Minimum T_HS-PREPARE for which the DUT passed the test.
Min Spec [ns]
Minimum T_HS-PREPARE according to the specification.
Max Passed [ns]
Maximum T_HS-PREPARE for which the DUT passed the test.
Max Spec [ns]
Maximum T_HS-PREPARE according to the specification.
114
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Test 2.4.2b T_HS_Zero - Data Procedure
CTS Test Number and Name
This test is provided additionally for product characterization. It is based
on the CTS test 2.4.2.
Purpose
To characterize the DUT’s Data Lane HS receiver tolerance for
T_HS-PREPARE + T_HS-ZERO timing deviations.
Dependencies
This test is available in Expert Mode only.
Ensure that the Skew Calibration procedure and the Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remain the same.
Parameters
Same as Test 2.4.2a T_HS-Prepare Data Procedure on page 113.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
115
5
Test Procedures
Results
For all test cases, the DUT must successfully receive the HS burst data
without error.
Table 50
Parameters in the result table for “Test 2.4.2b T_HS_Zero - Data Procedure”
Parameter name
Parameter description
Result
•
•
Pass: the DUT was able to receive the test sequence without errors for T_HS-PREPARE + T_HS-ZERO
values within the specification.
Fail: the DUT failed to receive the test sequence.
T_HS-Prepare [ns]
T_HS-PREPARE used for this step of the test.
T_HS-Zero [ns]
T_HS-ZERO used for this step of the test.
Parameter
Timing parameter that is being tested.
Min Passed [ns]
Minimum T_HS-PREPARE + T_HS-ZERO for which the DUT passed the test.
Min Spec [ns]
Minimum T_HS- PREPARE + T_HS-ZERO according to the specification.
Max Passed [ns]
Maximum T_HS- PREPARE + T_HS-ZERO for which the DUT passed the test.
Max Spec [ns]
Maximum T_HS- PREPARE + T_HS-ZERO according to the specification.
116
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Test 2.4.3 T_HS Settle - Data Procedure
CTS Test Number and Name
Test 2.4.3 – Data Lane HS-RX THS-SETTLE Value
Purpose
To verify that the DUT’s Data Lane receiver incorporates a sufficient
time-out interval (T_HS-SETTLE) to ignore transition effects that may
occur during the HS Entry sequence.
Dependencies
Ensure that the Skew Calibration procedure and the Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remain the same.
Parameters
Table 51
Parameters used in Test 2.4.3 T_HS Settle - Data Procedure
Parameter
Description
BER Limit
The Limit used for bit-error-ratio test.
Binary Search
If this parameter is set to false, then the skew will be swept first with the “Initial Step Size”. As soon
as the first point is detected, at which the BER is above the given limit, the sweep ends. If this
parameter is set to, true “Initial Step Size” is used until the fail point. The skew value is then reduced
by half of the initial step size and, according to the binary search algorithm, increased or decreased
depending on the BER result. For each step the step size is divided by 2 until “Min. Step Size” is
reached.
Disturbance Pattern
Additional HS data byte appended after the valid HS burst.
End Value
For tests in which a range of values is tested; specifies the last value that is tested.
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Offline
Offline Mode.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
Start Value
Specifies the first value that is tested for tests in which a range of values is tested.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
117
5
Test Procedures
Step Size in UI
Specifies the size of the steps in UI that is used between the Start Value and the End Value for tests
in which a range of values is tested; depending on the specific procedure.
T-Clk-Post
Time that the transmitter continues to send HS clock after the last associated Data Lane has
transitioned to LP Mode. Interval is defined as the period from the end of T_HS-Trail to the beginning
of T_Clk-Trail.
T-Clk-Pre
Time that the HS clock will be driven by the transmitter prior to any associated Data Lane beginning
the transition from LP to HS mode.
T-Clk/HS Prepare
This parameter has two meanings:
• During Clock Timing tests such as the “HS-RX Clock Tests, section 4.1”, it is used for
T_Clk-Prepare, the time that the transmitter drives the Clock Lane LP-00 Line state immediately
before the HS-0 Line state starting the HS transmission.
• During Data Timing tests such as the “HS-RX Data0 Tests”, it is used for T_HS-Prepare, the time
specified for the Data Lane(s).
T-Clk/HS Prepare + Clk/HS-Zero
This parameter has two meanings:
• During Clock Timing tests such as the “HS-RX Clock Tests”, it is used for T_Clk-Prepare +
T_Clk_Zero (T_Clk-Prepare plus time that the transmitter drives the HS-0 state prior to starting
the Clock).
• During Data Timing tests such as the “HS-RX Data0 Tests”, it is used for T_HS-Prepare +
T_Clk_Zero as specified for the Data Lane(s).
T-Clk/HS Trail
This parameter has two meanings:
• During Clock Timing tests such as the “HS-RX Clock Tests”, it is used for T_Clk-Trail, the time
that the transmitter drives the HS-0 state after last payload data bit of a HS transmission burst.
• During Data Timing tests such as the “HS-RX Data0 Tests”, it is used for T_HS-Trail, the
corresponding time for the Data Lane(s).
Results
The T_HS-SETTLE must be greater than 85 ns + 6*UI.
Table 52
Parameter name
Parameter description
Result
•
•
Parameters in the result table for “Test 2.4.3 T_HS Settle - Data Procedure”
Pass: the DUT was able to receive the test sequence without errors for T_HS-SETTLE values within the
specification.
Fail: the DUT failed to receive the test sequence.
max. passed T_HS-Settle [ns]
Maximum T_HS-SETTLE for which the DUT passed the test.
min. failed T_HS-Settle [ns]
Minimum T_HS-SETTLTE for which the DUT failed the test.
min. Spec. T_HS-Settle [ns]
Minimum T_HS-SETTLE according to the specification.
max. Spec T_HS-Settle [ns]
Maximum T_HS-SETTLE according to the specification.
118
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Test 2.4.4 T_HS Trail - Data Procedure
CTS Test Number and Name
Test 2.4.4 – Data Lane HS-RX THS-TRAIL Tolerance
Purpose
To verify that the DUT’s Data Lane HS receiver can tolerate receiving value
for T_HS-TRAIL that conform to the specification.
Dependencies
Ensure that the Skew Calibration procedure and the Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remains the same.
Parameters
Table 53
Parameters used in Test 2.4.4 T_HS Trail - Data Procedure
Parameter
Description
BER Limit
The Limit used for bit-error-ratio test.
End Value
For tests in which a range of values is tested; specifies the last value that is tested.
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Offline
Offline Mode.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
Start Value
Specifies the first value that is tested for tests in which a range of values is tested.
Steps
Specifies the number of steps that are tested between the Start Value and the End Value for tests in
which a range of values is tested.
T-Clk-Post
Time that the transmitter continues to send HS clock after the last associated Data Lane has
transitioned to LP Mode. Interval is defined as the period from the end of T_HS-Trail to the beginning
of T_Clk-Trail.
T-Clk-Pre
Time that the HS clock will be driven by the transmitter prior to any associated Data Lane beginning
the transition from LP to HS mode.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
119
5
Test Procedures
T-Clk/HS Prepare
This parameter has two meanings:
• During Clock Timing tests such as the “HS-RX Clock Tests”, it is used for T_Clk-Prepare, the time
that the transmitter drives the Clock Lane LP-00 Line state immediately before the HS-0 Line
state starting the HS transmission.
• During Data Timing tests such as the “HS-RX Data0 Tests”, it is used for T_HS-Prepare, the time
specified for the Data Lane(s).
T-Clk/HS Prepare + Clk/HS-Zero
This parameter has two meanings:
• During Clock Timing tests such as the “HS-RX Clock Tests”, it is used for T_Clk-Prepare +
T_Clk_Zero (T_Clk-Prepare plus time that the transmitter drives the HS-0 state prior to starting
the Clock).
• During Data Timing tests such as the “HS-RX Data0 Tests”, it is used for T_HS-Prepare +
T_Clk_Zero as specified for the Data Lane(s)..
T-Clk/HS Trail
This parameter has two meanings:
• During Clock Timing tests such as the “HS-RX Clock Tests”, it is used for T_Clk-Trail, the time
that the transmitter drives the HS-0 state after last payload data bit of a HS transmission burst.
• During Data Timing tests such as the “HS-RX Data0 Tests”, it is used for T_HS-Trail, the
corresponding time for the Data Lane(s).
Results
The DUT must successfully receive the HS image data without error.
Table 54
Parameter name
Parameter description
Result
•
•
Parameters in the result table for“Test 2.4.4 T_HS Trail - Data Procedure”
Pass: the DUT was able to receive the test sequence without errors for T_HS-TRAIL values within the
specification.
Fail: the DUT failed to receive the test sequence.
Parameter
Timing parameter that is being tested.
Min Passed [ns]
Minimum T_HS-TRAIL for which the DUT passed the test.
Min Spec [ns]
Minimum T_HS-TRAIL according to the specification.
Max Passed [ns]
Maximum T_HS-TRAIL for which the DUT passed the test.
Max Spec [ns]
Maximum T_HS-TRAIL according to the specification.
120
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Test 2.4.5 T_HS Skip - Data Procedure
CTS Test Number and Name
Test 2.4.5 – Data Lane HS-RX T_HS-SKIP Value
Purpose
To verify that the DUT’s Data Lane receiver ignores any transition in the
data lane following a validly formed HS burst for T_HS-SKIP periods within
the specification.
Dependencies
Ensure that the Skew Calibration procedure and the Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remains the same.
Parameters
Table 55
Parameters used in Test 2.4.5 T_HS Skip - Data Procedure
Parameter
Description
BER Limit
The Limit used for bit-error-ratio test.
Default T_Reot
Time needed by the system to transition from HS to LP. If a DSO is available, its value will be
calibrated at the beginning of the test. In other case, the provided value will be used.
Disturbance Pattern
Additional HS data byte appended after the valid HS burst.
End Value
For tests in which a range of values is tested; specifies the last value that is tested.
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Offline
Offline Mode.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
Start Value
Specifies the first value that is tested for tests in which a range of values is tested.
Step Size in UI
Specifies the size of the steps in UI that is used between the Start Value and the End Value for tests
in which a range of values is tested; depending on the specific procedure.
T-Clk-Post
Time that the transmitter continues to send HS clock after the last associated Data Lane has
transitioned to LP Mode. Interval is defined as the period from the end of T_HS-Trail to the beginning
of T_Clk-Trail.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
121
5
Test Procedures
T-Clk-Pre
Time that the HS clock will be driven by the transmitter prior to any associated Data Lane beginning
the transition from LP to HS mode.
T-Clk/HS Prepare
This parameter has two meanings:
• During Clock Timing tests such as the “HS-RX Clock Tests,”, it is used for T_Clk-Prepare, the
time that the transmitter drives the Clock Lane LP-00 Line state immediately before the HS-0
Line state starting the HS transmission.
• During Data Timing tests such as the “HS-RX Data0 Tests”, it is used for T_HS-Prepare, the time
specified for the Data Lane(s).
T-Clk/HS Prepare + Clk/HS-Zero
This parameter has two meanings:
• During Clock Timing tests such as the “HS-RX Clock Tests”, it is used for T_Clk-Prepare +
T_Clk_Zero (T_Clk-Prepare plus time that the transmitter drives the HS-0 state prior to starting
the Clock).
• During Data Timing tests such as the “HS-RX Data0 Tests”, it is used for T_HS-Prepare +
T_Clk_Zero as specified for the Data Lane(s)..
T-Clk/HS Trail
This parameter has two meanings:
• During Clock Timing tests such as the “HS-RX Clock Tests”, it is used for T_Clk-Trail, the time
that the transmitter drives the HS-0 state after last payload data bit of a HS transmission burst.
• During Data Timing tests such as the “HS-RX Data0 Tests”, it is used for T_HS-Trail, the
corresponding time for the Data Lane(s).
Results
•
The presence of the extra data byte must not negatively affect proper
reception of data for T_HS-SKIP values up to and including 40 ns.
•
Optional, Informative: The presence of the extra data byte must affect
proper reception of data (via the observation of errors) for T_HS-SKIP
values greater than (55 ns + 4*UI).
Table 56
Parameter name
Parameter description
Result
•
•
Parameters in the result table for “Test 2.4.5 T_HS Skip - Data Procedure”
Pass: the DUT was able to receive the test sequence without errors, therefore ignoring the extra data byte
following the T_HS-TRAIL interval.
Fail: the DUT failed to receive the test sequence.
max. passed T_HS-Skip [ns]
Maximum T_HS-SKIP for which the DUT passed the test.
min. failed T_HS-Skip [ns]
Minimum T_HS-SKIP for which the DUT failed the test.
min. Spec. T_HS-Skip [ns]
Minimum T_HS-SKIP according to the specification.
max. Spec. T_HS-Skip [ns]
Maximum T_HS-SKIP according to the specification.
122
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Semi-Automated Tests
Test 2.1.8 LP-CD Logic Contention Thresholds Manual Procedure
CTS Test Number and Name
Test 2.1.8 – LP-CD Logic Contention Thresholds (V_IHCD and V_ILCD)
Purpose
To verify that the LP Contention Detector detects the proper high and low
contention voltage thresholds.
Dependencies
This test is available in Expert Mode only.
All calibrations are required.
Procedure
Since the output impedance of the AWG is always 50 Ohm to ground and
cannot be switched off, this test cannot be run as it is required. As a
workaround, the software implements a static test and provides a constant
level, where you receive a prompt whenever a contention event occurs. To
implement the test:
•
Click Run to transmit the test sequence to the DUT. Performing
Procedures on page 20 to know how to run procedures.
Test case 1a:
•
The software sets the AWG at a constant level of 550 mV.
•
You shall receive a prompt to drive an LP-11 state with the DUT.
•
The software prompts you to check if the contention event has
occurred. If not, the software reduces the voltage level until the
contention event is occurred.
•
For each voltage step, the software prompts you to read out the
contention event flag.
Test case 1b:
•
The software repeats the same procedure for Test case 1a but instead
of the LP-11 state, the HS BURST sequence is sent.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
123
5
Test Procedures
Test case 2 and 3:
NOTE
•
The software sets the AWG at a constant level of 0V.
•
You shall receive a prompt to drive an LP-00 state with the DUT.
•
The software prompts you to check if the contention event has
occurred. If not, the software increases the voltage level until the
contention event is occurred.
•
For each voltage step, the software prompts you to read out a
contention event flag. In these two cases, the contention event shall
occur at a measured voltage between 200 mV and 450 mV.
The voltage level is determined by a Real-Time Oscilloscope.
Parameters
Table 57
Parameters used in Test 2.1.8 LP-CD Logic Contention Thresholds Manual Procedure
Parameter
Description
HS Amplitude
Amplitude of the high speed signal.
HS Frequency
Frequency of the high speed signal.
Initial Offset Voltage
The initial offset set for the test.
Maximum Offset Voltage
The maximum offset voltage set on the DUT.
Minimum Offset Voltage
The minimum offset voltage set on the DUT.
Offline
Offline Mode.
Offset Voltage Step Size
Step size for the modification of the common-mode level.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
124
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Results
•
For Test Case 1a, the DUT must detect an LP High Fault.
•
For Test Case 1b, the DUT must detect an LP High Fault.
•
For Test Case 2, the DUT must detect an LP Low Fault.
•
For Test Case 3, the DUT must not detect an LP Low Fault.
Table 58
Parameters in the result table for “Test 2.1.8 LP-CD Logic Contention Thresholds
Manual Procedure”
Parameter name
Parameter description
Result
•
•
Test
Test Steps are:
• LP11
• LP11 + HS
• LP00
First Triggered [mV]
First offset value that triggered the Contention Detection.
Last Not Triggered [mV]
Last offset value that did not trigger the Contention Detection.
Min Spec [mV]
Minimum level for the contention event to be triggered.
Max Spec [mV]
Maximum level for the contention event to be triggered.
Pass: the DUT detected the proper contention voltage threshold.
Fail: the DUT did not detect the proper contention voltage threshold.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
125
5
Test Procedures
Test 2.4.6 Clock Lane T_CLK-TERM-EN
CTS Test Number and Name
Test 2.4.6 – Clock Lane HS-RX T_CLK-TERM-EN Value
Purpose
To verify that the time required the DUT’s Clock Lane receiver to enable its
HS line termination (T_CLK-TERM-EN) is within the conformance limits.
Dependencies
Ensure that the Skew Calibration procedure and the Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remains the same.
Parameters
Table 59
Parameters used in Test 2.4.6 Clock Lane T_CLK-TERM-EN
Parameter
Description
BER Limit
Limit used for bit-error-ratio test.
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Offline
Offline Mode.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
Trigger Level
The voltage level at which the other test sequences are inserted into the main signal.
126
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Results
The T_CLK-TERM-EN must be greater than (the time for Dn to reach
V_TERM-EN), and less than 38 ns
Table 60
Parameters in the result data table “Test 2.4.6 Clock Lane T_CLK-TERM-EN”
Parameter name
Parameter description
Result
•
•
Signal
Signal that is being tested.
Timing [ns]
Time that the DUT took to enable the termination.
Max Spec [ns]
Maximum T_CLK-TERM-EN according to the specification.
Pass: the termination is enabled within the specified time.
Fail: the termination was not enabled on time.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
127
5
Test Procedures
Test 2.4.1 Data Lane T_HS-TERM-EN
CTS Test Number and Name
Test 2.4.1 – Data Lane HS-RX TD-TERM-EN Value
Purpose
To verify that the time required the DUT’s Data Lane receiver to enable its
HS line termination (T_CLK-TERM-EN) is within the conformance limits.
Dependencies
Ensure that the Skew Calibration procedure and the Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remains the same.
Parameters
Same as Test 2.4.6 Clock Lane T_CLK-TERM-EN on page 126.
Results
For all Data Lanes, the T_D-TERM-EN must be greater than the time for
Dn to reach 450 mV, and less than (35 ns + 4*UI) ns.
Table 61
Parameters in the result table for “Test 2.4.1 Data Lane T_HS-TERM-EN”
Parameter name
Parameter description
Result
•
•
Signal
Signal that is being tested.
Timing [ns]
Time that the DUT took to enable the termination.
Max Spec [ns]
Maximum T_CLK-TERM-EN according to the specification.
128
Pass the termination is enabled within the specified time.
Fail: the termination was not enabled on time.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
LP Tests
Test 2.1.1 V_IH Sensitivity Clock
CTS Test Number and Name
Test 2.1.1 – LP-RX Logic 1 Input Voltage (V_IH)
Purpose
To verify that the DUT’s LP receiver can properly detect Logic 1 voltage
levels as low as the minimum required conformance limit (V_IH).
Dependencies
Ensure that the Skew Calibration procedure and the Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remains the same.
NOTE
The DUT’s LP-RX Logic-1 Detection Threshold must be less than or equal
to 880 mV (for DUTs supporting a maximum HS rate <= 1.5Gbps) or 740
mV (for DUTs supporting a maximum HS rate > 1.5Gbps) in order to
satisfy the conformance requirements for VIH. This demonstrates that
the DUT can detect logic levels at least as low as 880 mV (or 740 mV),
which is the minimum voltage level a receiver is required to detect as a
Logic 1.
Parameters
Table 62
Test 2.1.1 V_IH Sensitivity Clock
Parameter
Description
BER Limit
Limit used for bit-error-ratio test.
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Max Tested Value
Maximum Input Voltage (V_IH).
Min Tested Value
Minimum Input Voltage (V_IH).
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
129
5
Test Procedures
Offline
Offline Mode.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
Steps
Specifies the number of steps that are tested between the Start Value and the End Value for tests in
which a range of values is tested.
Results
•
For DUTs supporting a max HS rate <= 1.5Gbps the V_IH must be less
than or equal to 880 mV.
•
For DUTs supporting a max HS rate > 1.5Gbps) the V_IH must be less
than or equal to 740 mV.
Table 63
Parameter name
Parameter description
Result
•
•
Parameters in the result table for “Test 2.1.1 V_IH Sensitivity Clock”
Pass: the minimum V_IH that the DUT can handle without errors is smaller than or equal to the minimum
value in the specification.
Fail: the minimum V_IH that the DUT can handle without errors is larger than the minimum value in the
specification.
Min Passed V_IH [mV]
Minimum input high-level voltage, VIH, is the voltage at which the receiver is required to detect a high state in
the input signal.
Min Tested V_IH [mV]
Minimum tested V_IH .
Min Spec [mV]
Minimum V_IH for which the DUT must receive the data without errors according to the specification.
130
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Test 2.1.2 V_IL Sensitivity Clock
CTS Test Number and Name
Test 2.1.2 – LP-RX Logic 0 Input Voltage, Non-ULP State (V_IL)
Purpose
To verify that the DUT’s LP receiver can correctly detect Logic 0 voltage
levels as high as the maximum required conformance limit (V_IL), when in
the non-ULP state.
Dependencies
Ensure that the Skew Calibration procedure and the Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remains the same.
Parameters
Same as Test 2.1.1 V_IH Sensitivity Clock on page 129.
Results
The V_IL must be greater than or equal to 550 mV.
Table 64
Parameters in the result table for “Test 2.1.2 V_IL Sensitivity Clock”
Parameter name
Parameter description
Result
•
•
Pass: the maximum V_IL that the DUT can handle without errors is larger than or equal to the
maximum value in the specification.
Fail: the minimum V_IL that the DUT can handle without errors is smaller than the maximum value in
the specification.
Max Passed V_IL [mV]
Maximum V_IL for which the tests data was transmitted without errors.
Max Tested V_IL [mV]
Maximum tested V_IL.
Max Spec V_IL [mV]
Maximum V_IL for which the DUT must receive the data without errors according to the specification.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
131
5
Test Procedures
Test 2.1.4 V_HYST Sensitivity Clock
CTS Test Number and Name
Test 2.1.4 – LP-RX Input Hysteresis (V_HYST)
Purpose
To verify that the Input Hysteresis value (V_HYST) of the DUT’s LP receiver
is within the conformance limits.
Dependencies
Ensure that the Skew Calibration procedure and the Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remains the same.
Parameters
Table 65
Parameters used in Test 2.1.4 V_HYST Sensitivity Clock
Parameter
Description
BER Limit
Limit used for bit-error-ratio test.
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Initial Voltage Step Size
Initial voltage step size used at the beginning of the test, when the test value is close to the minimum
value according to specification.
Maximum test Voltage
Maximum Input Hysteresis (V_HYST).
Minimum test Voltage
Minimum Input Hysteresis (V_HYST).
Offline
Offline Mode.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
Voltage Step Size
The step size by which the voltage is increased/decreased while running test.
132
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Results
For all measured Lanes:
•
The V_HYST-V_IH(Dp) must be greater than or equal to 25 mV.
•
The V_HYST-V_IH(Dn) must be greater than or equal to 25 mV.
•
The V_HYST-V_IL(Dp) must be greater than or equal to 25 mV.
•
The V_HYST-V_IL(Dn) must be greater than or equal to 25 mV.
Table 66
Parameters in the result table for “Test 2.1.4 V_HYST Sensitivity Clock”
Parameter name
Parameter description
Result
Pass: the Input Hysteresis value of the DUT’s LP receiver is within the conformance limits.
Fail: the Input Hysteresis value of the DUT’s LP receiver is not within the conformance limits.
Min Passed V_IH [mV]
Minimum V_IH supported by the DUT.
Min Spec V_IH [mV]
Minimum V_IH that the DUT must support according to the specification.
V_IH Recover [mV]
V_IH value for which the DUT stops reporting errors after it failed.
V_HYST [mV]
Actual value of the DUT's V_HYST as measured during the test
Min Spec V_HYST [mV]
Minimum V_HYST of the DUT according to the specification.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
133
5
Test Procedures
Test 2.1.4 V_HYST Dynamic Clockp
CTS Test Number and Name
Test 2.1.4 – LP-RX Input Hysteresis (V_HYST)
Purpose
To verify that the Input Hysteresis value (V_HYST) of the DUT’s LP receiver
is within the conformance limits.
Dependencies
All calibrations are required.
In order to run this test, it is necessary to know the minimum V_IH and
maximum V_IL values that the DUT supports. If Test 2.1.1 V_IH Sensitivity
Clock (and Data0–Data3) and Test 2.1.2 V_IL Sensitivity Clock (and
Data0–Data3) are run before this test procedure, the parameters “Tested
V_IH” and “Tested V_IL” are filled automatically with the corresponding
values. It is also possible to input these parameters manually before the
test starts.
Parameters
Table 67
Parameters used in Test 2.1.4 V_HYST Dynamic Clockp
Parameter
Description
BER Limit
Limit used for bit-error-ratio test.
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Interference Frequency
Interference frequency used during this test step.
Interference Step Size
The step size by which the interference voltage is increased/decreased while running test
Maximum Interference Amplitude (Vpk)
Maximum interference amplitude for which the DUT was able to receive the test sequence without
errors for the given common-mode and differential voltage levels.
Offline
Offline Mode.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
Tested VIH
Minimum V_IH supported by the DUT.
134
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
Tested VIL
Maximum V_IL supported by the DUT.
VIH during VIL Test
The Value obtained by V_IH while running V_IL test.
VIL during VIH Test
The Value obtained by V_IL while running V_IH test.
5
Results
Table 68
Parameters in the result table for “Test 2.1.4 V_HYST Dynamic Clockp”
Parameter name
Parameter description
Result
•
•
Max Passed Interference V_IH [mV]
Maximum V_IH single ended interference supported by the DUT.
Min Failed Interference V_IH [mV]
Minimum V_IH single ended interference that caused the DUT to fail.
Max Passed Interference V_IL [mV]
Maximum V_IL single ended interference supported by the DUT.
Min Failed Interference V_IL [mV]
Minimum V_IL single ended interference that caused the DUT to fail.
Min Spec [mV]
Minimum single ended interference that the DUT must be able to handle according to the specification.
Pass: the Input Hysteresis value of the DUT’s LP receiver is within the conformance limits.
Fail: the Input Hysteresis value of the DUT’s LP receiver is not within the conformance limits.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
135
5
Test Procedures
Test 2.1.4 V_HYST Dynamic Clockn
CTS Test Number and Name
Test 2.1.4 – LP-RX Input Hysteresis (V_HYST)
Purpose
To verify that the Input Hysteresis value (V_HYST) of the DUT’s LP receiver
is within the conformance limits.
Dependencies
All calibrations are required.
In order to run this test, it is necessary to know the minimum V_IH and
maximum V_IL values that the DUT supports. If Test 2.1.1 V_IH Sensitivity
Clock (and Data0–Data3) and Test 2.1.2 V_IL Sensitivity Clock (and
Data0–Data3) are run before this test procedure, the parameters “Tested
VIH” and “Tested VIL” are filled automatically with the corresponding
values. It is also possible to input these parameters manually before the
test starts.
Parameters
Same as Test 2.1.4 V_HYST Dynamic Clockp on page 134.
Results
Table 69
Parameters in the result table for “Test 2.1.4 V_HYST Dynamic Clockn”
Parameter name
Parameter description
Result
•
•
Max Passed Interference V_IH [mV]
Maximum V_IH single ended interference supported by the DUT.
Min Failed Interference V_IH [mV]
Minimum V_IH single ended interference that caused the DUT to fail.
Max Passed Interference V_IL [mV]
Maximum V_IL single ended interference supported by the DUT.
Min Failed Interference V_IL [mV]
Minimum V_IL single ended interference that caused the DUT to fail.
Min Spec [mV]
Minimum single ended interference that the DUT must be able to handle according to the specification.
136
Pass: the Input Hysteresis value of the DUT’s LP receiver is within the conformance limits.
Fail: the Input Hysteresis value of the DUT’s LP receiver is not within the conformance limits.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Test 2.1.5 LP-RX Minimum Pulse Width Response (T_Min-RX) Clock
CTS Test Number and Name
Test 2.1.5 – LP-RX Minimum Pulse Width Response (T_MIN-RX)
Purpose
To verify that the DUT’s LP receiver can detect LP pulses with the
minimum required duration.
Parameters
Table 70
Parameters used in Test 2.1.5 LP-RX Minimum Pulse Width Response (T_Min-RX)
Clock
Parameter
Description
BER Limit
Limit used for bit-error-ratio test.
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Max Pulse Width
The maximum Pulse width for which the sequence can be received without error.
Min Pulse Width
The minimum Pulse width for which the sequence can be received without error.
Offline
Offline mode.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
Steps
Specifies the number of steps that are tested between the Start Value and the End Value for tests in
which a range of values is tested.
V_OH
Output high voltage.
V_OL
Output low voltage.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
137
5
Test Procedures
Results
The smallest T_LPX value for which the DUT can consistently receive the
test sequence without errors must be less than or equal to 20 ns.
Table 71
Parameters in the result data table “Test 2.1.5 LP-RX Minimum Pulse Width Response
(T_Min-RX) Clock”
Parameter name
Parameter description
Result
•
•
Min Passed [ns]
Minimum pulse duration detected by the DUT
Min Spec [ns]
Minimum pulse duration according to the specification.
138
Pass: the minimum pulse duration detected by the DUT is smaller than or equal to the specification value.
Fail: the minimum pulse duration detected by the DUT is larger than the specification value.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Test 2.1.6 LP-RX Input pos Pulse Rejection (e_spike) Clock
CTS Test Number and Name
Test 2.1.6 – LP-RX Input Pulse Rejection (e_SPIKE)
Purpose
To verify that the DUT’s LP receiver rejects short-term signal glitches that
is smaller than the specified conformance limit.
Dependencies
All calibrations are required.
Parameters
Table 72
Parameters used in Test 2.1.6 LP-RX Input pos Pulse Rejection (e_spike) Clock
Parameter
Description
BER Limit
Limit used for bit-error-ratio test.
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Max Pulse Energy
The maximum Pulse energy for which the sequence can be received without error.
Min Pulse Energy
The minimum Pulse energy for which the sequence can be received without error.
Offline
Offline mode.
Positive Spikes
Positive Input pulse rejection.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
Steps
Specifies the number of steps that are tested between the Start Value and the End Value for tests in
which a range of values is tested.
V_OL Threshold
Output low level threshold voltage.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
139
5
Test Procedures
Results
For all test cases, verify the DUT must receive the LP test sequence
without errors.
Table 73
Parameter name
Parameter description
Result
•
•
Parameters in the result data table “Test 2.1.6 LP-RX Input pos Pulse Rejection
(e_spike) Clock”
Pass: the DUT’s LP receiver rejects short-term signal glitches that are smaller than the specified
conformance limit.
Fail: the DUT’s LP receiver does not reject short-term signal glitches that are smaller than the
specified conformance limit.
Set Transition Time [ns]
e-Spike rise time needed to achieve the desired glitch depth.
Max Passed [pVs]
Maximum glitch width tolerated by the DUT.
Max Spec [pVs]
Maximum glitch width that the DUT must tolerate according to the specification.
140
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Test 2.1.6 LP-RX Input neg Pulse Rejection (e_spike) Clock
CTS Test Number and Name
Test 2.1.6 – LP-RX Input Pulse Rejection (e_SPIKE)
Purpose
To verify that the DUT’s LP receiver rejects short-term signal glitches that
are smaller than the specified conformance limit.
Dependencies
All calibrations are required.
Parameters
Table 74
Parameters used in Test 2.1.6 LP-RX Input neg Pulse Rejection (e_spike) Clock
Parameter
Description
BER Limit
Limit used for bit-error-ratio test.
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Max Pulse Energy
The maximum Pulse energy for which the sequence can be received without error.
Min Pulse Energy
The minimum Pulse energy for which the sequence can be received without error.
Offline
Offline mode.
Positive Spikes
Positive Input pulse rejection.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
Steps
Specifies the number of steps that are tested between the Start Value and the End Value for tests in
which a range of values is tested.
V_OH Threshold
Output high level threshold voltage.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
141
5
Test Procedures
Results
Table 75
Parameter name
Parameter description
Result
•
•
Parameters in the result table for “Test 2.1.6 LP-RX Input neg Pulse Rejection
(e_spike) Clock”
Pass: the DUT’s LP receiver rejects short-term signal glitches that are smaller than the specified
conformance limit.
Fail: the DUT’s LP receiver does not reject short-term signal glitches that are smaller than the specified
conformance limit.
Set Transition Time [ns]
e-Spike rise time needed to achieve the desired glitch depth.
Max Passed [pVs]
Maximum glitch width tolerated by the DUT.
Max Spec [pVs]
Maximum glitch width that the DUT must tolerate according to the specification.
142
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Test 2.1.7 LP-RX Interference Tolerance (V_INT and f_INT) Clock
CTS Test Number and Name
Test 2.1.7 LP-RX Interference Tolerance (V_INT and f_INT)
Purpose
To verify that the DUT Data Lane LP receiver can tolerate interference with
voltage and frequency values within the conformance limits.
Dependencies
Ensure that the Skew Calibration procedure and the Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remain the same.
Parameters
Table 76
Parameters used in Test 2.1.7 LP-RX Interference Tolerance (V_INT and f_INT) Clock
Parameter
Description
BER Limit
Limit used for bit-error-ratio test.
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Maximum Test Voltage
Maximum voltage of V_INT.
Minimum Test Voltage
Minimum voltage of V_INT.
Offline
Offline mode.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
Steps
Specifies the number of steps that are tested between the Start Value and the End Value for tests in
which a range of values is tested.
Test Frequencies
Defines the valid frequencies for the test.
V_OH
V_OH is the Thevenin output, high-level voltage in the high-level state, when the pad pin is not
loaded
V_OL
V_OL is the Thevenin output, low-level voltage in the LP transmit mode. This is the voltage at an
unloaded pad pin in the low-level state.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
143
5
Test Procedures
Results
In all test cases the DUT must be able to successfully receive the test
sequence in the presence of the interfering signaling.
Table 77
Parameters in the result data table Test 2.1.7 LP-RX Interference Tolerance (V_INT
and f_INT) Clock”
Parameter name
Parameter description
Result
•
•
Interference Frequency [MHz]
Interference frequency used during this test step.
Max Passed [mV]
Maximum interference amplitude for which the DUT was able to receive the test sequence without errors for
the given LP levels.
Max Spec [mV]
Maximum interference amplitude for which the DUT must be able to receive the test sequence without errors
according to the specification.
144
Pass: the DUT received the test sequence without errors.
Fail: the DUT failed to receive the test sequence.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Test 2.1.1 V_IH Sensitivity Data
CTS Test Number and Name
Test 2.1.1 – LP-RX Logic 1 Input Voltage (V_IH)
Purpose, Dependencies, Parameters and Result
Same as Test 2.1.1 V_IH Sensitivity Clock on page 129.
Test 2.1.2 V_IL Sensitivity Data
CTS Test Number and Name
Test 2.1.2 – LP-RX Logic 0 Input Voltage, Non-ULP State (V_IL)
Purpose, Dependencies, Parameters and Result
Same as Test 2.1.2 V_IL Sensitivity Clock on page 131.
Test 2.1.4 V_HYST Sensitivity Data
CTS Test Number and Name
Test 2.1.4 V_HYST Sensitivity Data0p
Purpose, Dependencies, Parameters and Result
Same as Test 2.1.4 V_HYST Sensitivity Clock on page 132.
Test 2.1.4 V_HYST Dynamic Datap
CTS Test Number and Name
Test 2.1.4 V_HYST Dynamic Data0p
Purpose Dependencies, Parameters and Result
Same as Test 2.1.4 V_HYST Dynamic Clockp on page 134.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
145
5
Test Procedures
Test 2.1.4 V_HYST Dynamic Datan
CTS Test Number and Name
Test 2.1.4 V_HYST Dynamic
Purpose Dependencies, Procedure, Parameters and Result
Same as Test 2.1.4 V_HYST Dynamic Clockn on page 136.
Test 2.1.5 LP-RX Minimum Pulse Width Response (T_Min-RX) Data
CTS Test Number and Name
Test 2.1.5 LP-RX Minimum Pulse Width Response (T_Min-RX)
Purpose, Dependencies, Procedure, Parameters and Result
Same as Test 2.1.5 LP-RX Minimum Pulse Width Response (T_Min-RX)
Clock on page 137.
Test 2.1.6 LP-RX Input positive Pulse Rejection (e_spike)
CTS Test Number and Name
Test 2.1.6 LP-RX Input Positive Pulse Rejection (e_spike)
Purpose, Dependencies, Parameters and Result
Same as Test 2.1.6 LP-RX Input pos Pulse Rejection (e_spike) Clock on
page 139.
Test 2.1.6 LP-RX Input negative Pulse Rejection (e_spike) Data0
CTS Test Number and Name
Test 2.1.6 LP-RX Input Negative Pulse Rejection (e_spike) Data0
Purpose, Dependencies, Parameters and Result
Same as Test 2.1.6 LP-RX Input neg Pulse Rejection (e_spike) Clock on
page 141.
146
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Test 2.1.7 LP-RX Interference Tolerance (V_INT and f_INT) Data0
CTS Test Number and Name
Test 2.1.7 LP-RX Interference Tolerance (V_INT and f_INT)
Purpose, Dependencies, Parameters and Result
Same as Test 2.1.7 LP-RX Interference Tolerance (V_INT and f_INT) Clock
on page 143.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
147
5
Test Procedures
Behavioral Tests
Test 2.2.1 Init. Period T_INIT
CTS Test Number and Name
Test 2.2.1 – LP-RX Initialization period (T_INIT)
Purpose
To verify that the Slave meets the minimum T_INIT requirement. Each link
has a master and a slave side. The master always generates the clock and
is the main data source. The slave always receives the clock signal and is
the main data receiver.
Dependencies
Ensure that the Skew Calibration procedure and the Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remain the same.
For this test the LP calibrations are also required. If an IberReader
interface is being used, please make sure that its ResetDut function
performs a full restart of the DUT. As the DUT will enter ULPS during this
test, a reset of the bit and error counters is not enough.
Procedure
NOTE
This test is available only for the M8195A module.
It is required that the Master DUT initializes the Slave DUT by driving LP11
for a period longer than T_INIT (100 µs). If the initialization period is
shorter or non-existent, all transitions on the line will be ignored by the
Slave.
148
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
To implement the test:
•
Click Run to send valid HS or LP data. Refer to Performing Procedures
on page 20 to know how to run procedures.
•
The software causes an observable result after T_INIT <100 µs. Observe
whether the DUT has received the test data or not.
•
Restart the DUT. The software slowly increases T_INIT (e.g. by steps of
10 µs) up to the point where the DUT receives the data properly.
•
The DUT passes the test if minimum T_INIT ≥ 100 µs, otherwise it fails.
Parameters
Table 78
Parameters used in Test 2.2.1 Init. Period T_INIT
Parameter
Description
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Maximum Tested Value
Maximum Init. Period T_INIT.
Minimum Tested Value
Minimum Init. Period T_INIT.
Offline
Offline Mode.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
Steps
Specifies the number of steps that are tested between the Start Value and the End Value for tests in
which a range of values is tested.
Test Sequence
The name of the sequence file to be used for the test. It does not matter if it contains HS or LP data,
as long as it produces an observable result.
Results
The value of T_INIT must be greater than the minimum protocol-specific
conformance limit.
Table 79
Parameters in the result table for “Test 2.2.1 Init. Period T_INIT
Parameter name
Parameter description
Result
•
•
TInit [ms]
TINIT is considered a protocol-dependent parameter and the minimum value of T_Init according to the
specification is 100 ns.
Pass: the value of T_Init is greater than the minimum limit defined in the specification.
Fail: one or more test cases failed.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
149
5
Test Procedures
Test 2.2.2 ULPS Exit TWakeup
CTS Test Number and Name
Test 2.2.2 – ULPS Exit: LP-RX T_WAKEUP Timer Value
Purpose
To verify that the Slave meets the minimum T_Wakeup requirement.
Dependencies
Ensure that the Skew Calibration procedure and the Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remain the same.
For this test the LP calibrations are also required. If an IberReader
interface is being used, please make sure that its ResetDut function
performs a full restart of the DUT. As the DUT will enter ULPS during this
test, a reset of the bit and error counters is not enough.
Procedure
When in ULPS mode, the Slave DUT should wait for an Exit Sequence
formed by a Mark-1 State (LP-10) with a minimum duration of TWakeup =
1 ms, followed by a Stop State (LP-11). If the duration of TWakeup is
shorter than 1 ms, the Slave should remain in ULPS mode.
To implement the test:
150
•
Click Run. The DUT is set to ULPS. Refer to Section 1.2 Executing the
Tests how to run procedures.
•
The software sends an Exit Sequence with T_Wakeup = 0 ms and sends
valid data.
•
Observe that the DUT stays in ULPS state (valid data is ignored).
•
The software gradually increases TWakeup (e.g. by 200 µs)
•
The previous step is repeated until the DUT comes out of ULPS, where
the valid data causes an observable result.
•
If TWakeup ≥ 1 ms the DUT has passed the test, otherwise it has failed
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Parameters
Table 80
Parameters used in Test 2.2.2 ULPS Exit TWakeup
Parameter
Description
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Maximum Tested Value
Maximum T_Wakeup.
Minimum Tested value
Minimum T_Wakeup.
Offline
Offline Mode.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
Steps
Specifies the number of steps that are tested between the Start Value and the End Value for tests in
which a range of values is tested.
ULPS Entry and exit Sequence
A ULPS entry sequence is sent to the DUT, followed by a Mark-1/Stop plus a valid HS burst on all
lanes using nominal voltage levels. ULP Exit Sequence.is active high signal, asserted when ULP state
is active and the protocol is ready to leave ULP state.
ULPS Entry Sequence
A ULPS entry sequence is sent to the DUT, followed by a Mark-1/Stop plus a valid HS burst on all
lanes using nominal voltage levels.
Results
The DUT must exit the ULPS mode.
Table 81
Parameters in the result table for “Test 2.2.2 ULPS Exit TWakeup”
Parameter name
Parameter description
Result
•
•
TWakeUP [ms]
Pass: the value of T_Wakeup is greater than or equal to the minimum limit defined in the
specification.
Fail: the value of T_ Wakeup is smaller than the minimum limit defined in the specification.
Time that a transmitter drives a Mark-1 state prior to a Stop state in order to initiate an exit from ULPS.
Its minimum value is 1 ms.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
151
5
Test Procedures
Test 2.2.3 Clock Invalid/Aborted Escape Entry
CTS Test Number and Name
Test 2.2.3 Clock Lane LP-RX Invalid/Aborted ULPS Entry
Purpose
To verify that the Slave ignores invalid/aborted ULPS Clock Lane Entry
Sequences.
Dependencies
Ensure that the Skew Calibration procedure and the Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remain the same.
For this test the LP calibrations are also required. If an IberReader
interface is being used, please make sure that its ResetDut function
performs a full restart of the DUT. As the DUT may enter ULPS during this
test, a reset of the bit and error counters is not enough.
Procedure
Being in Stop State (LP-11), the Clock Lane ULPS is set via TX-ULPS-Rqst
State (LP-10) and then TX-ULPS State (LP-00). Any sequence other than
LP-11/10/00 should not bring the Clock Lane into ULPS, neither
erroneous sequences such as LP11/10/01 and LP11/10/11 nor a valid
Data Lane ULPS Entry Sequence (LP11/10/00/01/00).
To implement the test:
152
•
Click Run to transmit a test sequence to the DUT. Refer to Performing
Procedures on page 20 to know how to run procedures.
•
For all three mentioned invalid ULPS Clock Lane Entry Sequences,
verify that the Clock Lane does not enter ULPS. The software sends the
invalid sequence and then valid HS data, which should be processed by
the DUT.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Parameters
Table 82
Parameters used in Test 2.2.3 Clock Invalid/Aborted Escape Entry
Parameter
Description
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Offline
Offline Mode.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
Results
In both cases, the integrity of the received data, as well as the overall
operation of the DUT must not negatively affected by the presence of the
invalid ULPS Entry sequences.
Table 83
Parameters in the result table for “Test 2.2.3 Clock Invalid/Aborted Escape Entry”
Parameter name
Parameter description
Result
•
•
Test Pattern
The final bit pattern received by the DUT.
Pass: the test data was received by the DUT, which therefore did not enter ULPS.
Fail: the test data was not received by the DUT.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
153
5
Test Procedures
Test 2.2.4 Data Invalid/Aborted Escape Entry
CTS Test Number and Name
Test 2.2.4 – Data Lane LP-RX Invalid/Aborted Escape Mode Entry.
Purpose
To verify that invalid Data Lane Escape Sequences are ignored by the
Slave.
Dependencies
Ensure that the Skew Calibration procedure and the Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remain the same.
For this test the LP calibrations are required. If an IberReader interface is
being used, please make sure that its ResetDut function performs a full
restart of the DUT. As the DUT may enter ULPS during this test, a reset of
the bit and error counters is not enough.
Procedure
NOTE
This test is considered as informative in CTS, the result graph cannot be
drawn from the behavior of the DUT during the test run.
Any Escape-Entry sequence that has a Stop state (LP-11) other than the
valid LP-11/10/00/01/00 sequence, eg. LP-11/10/00/01/11 or
LP-11/10/11/11/11 should be ignored by the Data Lane:
To implement the test:
154
•
Click Run to transmit a test sequence to the DUT.Refer to Performing
Procedures on page 20to know how to run procedures.
•
For both mentioned invalid Data Lane Escape Entry Sequences, verify
that the Data Lane ignores the invalid sequences. The software sends
the invalid sequence between HS Bursts on the Data Lane, but the HS
data should be received by the DUT.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Parameters
Same as Test 2.2.3 Clock Invalid/Aborted Escape Entry
Results
In both cases, the integrity of the received data, as well as the overall
operation of the DUT does not negatively affected by the presence of the
invalid/aborted Data Lane Escape Mode Entry sequences.
Table 84
Parameters in the result table for “Test 2.2.4 Data Invalid/Aborted Escape Entry”
Parameter name
Parameter description
Result
•
•
Test Pattern
The final bit pattern received by the DUT.
Pass: the test data was received by the DUT, therefore did not enter ULPS.
Fail: the test data was not received by the DUT.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
155
5
Test Procedures
Test 2.2.5 Data Invalid/Aborted Escape Command
CTS Test Number and Name
Test 2.2.5 – Data Lane LP-RX Invalid/Aborted Escape Mode Command
Purpose
To verify that the Slave ignores an invalid Entry Command in Escape Mode,
which waits for the Transmitter to return to Stop State.
Dependencies
Ensure that the Skew Calibration procedure and the Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remain the same.
For this test the LP calibrations are required. If an IberReader interface is
being used, please make sure that its ResetDut function performs a full
restart of the DUT. As the DUT may enter ULPS during this test, a reset of
the bit and error counters is not enough.
Procedure
Using the ULPS Entry Command as a base for the corrupted command
sequences, each valid Escape Entry sequence will have an LP-11 state
aborting the Escape mode command. The invalid sequences should be
ignored by the Data Lane.
To implement the test:
156
•
Click Run to transmit a test sequence to the DUT. Refer to Performing
Procedures on page 20 to know how to run procedures.
•
For all the following invalid Escape-Entry command sequences, the
software send each followed by valid HS data. The data lane must
ignore the invalid sequences and the valid data is observable.
1
Valid Escape Mode Entry] +
LP-01/00/01/00/01/00/10/00/10/00/10/00/10/00/01/11 + [Stop]
2
[Valid Escape Mode Entry] +
LP-01/00/01/00/01/00/10/00/10/00/10/00/10/11/11/11 + [Stop]
3
[Valid Escape Mode Entry] +
LP-01/00/01/00/01/00/10/00/10/00/10/11/11/11/11/11 + [Stop]
4
[Valid Escape Mode Entry] +
LP-01/00/01/00/01/00/10/00/10/11/11/11/11/11/11/11 + [Stop]
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
5
[Valid Escape Mode Entry] +
LP-01/00/01/00/01/00/10/11/11/11/11/11/11/11/11/11 + [Stop]
6
[Valid Escape Mode Entry] +
LP-01/00/01/00/01/11/11/11/11/11/11/11/11/11/11/11 + [Stop]
7
[Valid Escape Mode Entry] +
LP-01/00/01/11/11/11/11/11/11/11/11/11/11/11/11/11 + [Stop]
8
[Valid Escape Mode Entry] +
LP-01/11/11/11/11/11/11/11/11/11/11/11/11/11/11/11 + [Stop]
Parameters
Table 85
Parameters used in Test 2.2.5 Data Invalid/Aborted Escape Command
Parameter
Description
Entry Command Pattern
Escape Entry Code used during the test (default is ULPS Escape Entry Code).
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Offline
Offline Mode.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
Results
In all cases, the integrity of the received data, as well as the overall
operation of the DUT must not negatively affected by the presence of the
invalid/aborted ULPS command sequences.
Table 86
Parameters in the result data table “Test 2.2.5 Data Invalid/Aborted Escape
Command”
Parameter name
Parameter description
Result
•
•
Test Pattern
The final bit pattern received by the DUT.
Pass: the test data was received by the DUT, which therefore did not enter ULPS.
Fail: the test data was not received by the DUT.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
157
5
Test Procedures
Test 2.2.7 Data Post-Trigger-Command
CTS Test Number and Name
Test 2.2.7 – Data Lane LP-RX Escape Mode, Ignoring of
Post-Trigger-Command Extra Bits.
Purpose
To verify that the DUT LP-RX ignores any extra bits received following a
Trigger Command.
Dependencies
Ensure that the Skew Calibration procedure and the Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remain the same.
For this test. The LP calibrations are required. If an IberReader interface is
being used, please make sure that its ResetDut function performs a full
restart of the DUT. As the DUT may enter ULPS during this test, a reset of
the bit and error counters is not enough.
Procedure
An Escape mode sequence containing a Trigger sequence followed by
extra post-command bits, which is a combination of an extra byte of data
after the Trigger command, and the ULPS Entry command as an extra byte
is used. The invalid ULPS command byte should be ignored by the DUT.
To implement the test:
158
•
Click Run to transmit a test sequence to the DUT. Refer to Performing
Procedures on page 20 to know how to run procedures.
•
For each of the available Trigger commands (Reset-Trigger,
Unknown-3, Unknown-4, Unknown-5), the software sends the
appropriate Escape Mode Entry sequence + Reset-Trigger command
(01100010) + ULPS command (00011110) on all Data Lanes followed
by the valid HS data.
•
Verify that valid data is received at the DUT.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
Parameters
Table 87
Parameters used in Test 2.2.7 Data Post-Trigger-Command
Parameter
Description
Extra bits
Bits added after the valid Trigger Command and before the Mark-1/Stop Exit sequence (default is
ULPS Escape Entry Code).
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Offline
Offline Mode.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
Results
In all test cases the DUT must ignore all bits occurring after the last bit of
the Trigger Command, by observing that the DUT properly received the
image data stream without error.
Table 88
Parameters in the result table for “Test 2.2.7 Data Post-Trigger-Command”
Parameter name
Parameter description
Result
•
•
Test Pattern
The final bit pattern received by the DUT.
Pass: the test data was received by the DUT, which therefore did not enter ULPS.
Fail: the test data was not received by the DUT.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
159
5
Test Procedures
Test 2.2.8 Data LP-RX Escape Mode Unsupported/Unassigned Commands
CTS Test Number and Name
Test 2.2.8 Data LP-RX Escape Mode Unsupported/Unassigned Commands
Purpose
An Entry Command Pattern consists of 8 bits, therefore there are 256
possible combinations. Of these, one is assigned to the Low-Power Data
Transmission Mode (11100001), one to the Ultra-Low-Power State Mode
(00011110) and one to the Reset Trigger (01100010). The remaining 253
combinations are either Undefined modes (2), Unknown triggers (3), or
Unassigned (248), and must be ignored by the DUT. This test verifies that
all Unsupported and Unassigned commands are ignored by the DUT.
Dependencies
Ensure that the Skew Calibration procedure and the Inter Module Skew
Calibration have been performed before the actual test starts. If the Skew
Calibration procedure and Inter Module Skew Calibration have already
been conducted in the course of running another HS test, the calibrations
are still valid and do not need to be repeated as long as the settings under
the Configuration Panel remain the same.
For this test the LP calibrations are also required. If an IberReader
interface is being used, please make sure that its ResetDut function
performs a full restart of the DUT. As the DUT may enter ULPS during this
test, a reset of the bit and error counters is not enough.
Procedure
An Escape mode sequence containing an unassigned Escape Command,
which is combination of 248 unassigned command codes, is used. The
invalid undefined/unknown/unassigned command codes should be
ignored by the DUT.
To implement the test:
160
•
Click Run to transmit a test sequence to the DUT. Refer to Performing
Procedures on page 20 to know how to run procedures.
•
For each of the available 248 unassigned command codes, the software
sends the appropriate Escape Mode Entry sequence + the Undefined 1
command code (10011111), on all Data Lanes followed by the valid HS
data.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Test Procedures
5
•
The software repeats the previous step by replacing the Undefined 1
command code with Undefined 2 command code (11011110); Trigger
commands (Reset Trigger, Unknown-3, Unknown-4, Unknown-5) and
the 248 unassigned command codes followed by the valid HS data.
•
Verify that valid data is received at the DUT
Parameters
Table 89
Parameters used in Test 2.2.8 Data LP-RX Escape Mode Unsupported/Unassigned
Commands
Parameter
Description
HS Frequency
Frequency of the High-Speed operation mode during the execution of a procedure. To be chosen
from the frequencies specified during the DUT configuration.
Offline
Offline Mode.
Setup file name
The PPI BER Reader searches for a file name with the extension Setup.ala in the directory.
Results
For all test cases, the DUT must ignore the unsupported/unassigned
command, and successfully receives the image data stream.
Table 90
Parameters in the result table for “Test 2.2.8 Data LP-RX Escape Mode
Unsupported/Unassigned Commands”
Parameter name
Parameter description
Result
•
•
Test Pattern
The final bit pattern received by the DUT.
Pass: the test data was received by the DUT, which therefore did not enter ULPS.
Fail: the test data was not received by the DUT.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
161
Keysight M8085A MIPI D-PHY Receiver Test Software
User Guide
6
SCPI Plug-in Interface
Architecture of a plug-in / sub-model concept / 164
SCPI Commands / 165
Description of already generated generic commands for plug-ins adapted
to the new requirements based on the sub-model approach.
The structure of an identifier attached to a SCPI command contains now
additional delimiter. A full qualified identifier has following structure:
‘PluginName#SubModel:Location&FunctionalBlock.Parameter’
In many cases it is not necessary to add a full qualified identifier to every
SCPI command. For example a plug-in is implemented a singleton or a
location/parameter exists on once. Later on a detailed description will
explain the usage and simplification of an identifier that comes along with
a SCPI command for addressing plug-ins / sub-models / parameters and
so on.
The identifier appended to every SCPI command should be optional to
avoid SCPI commands like :PLUGin:rootnode:BREak ‘ ’ // empty identifier
6
SCPI Plug-in Interface
Architecture of a plug-in / sub-model concept
Figure 40
164
Plug-in / Sub-Model approach
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
SCPI Plug-in Interface
6
SCPI Commands
:PLUGin:CATalog?
This command returns the names of all available plug-ins.
Example:
:PLUGin:CATalog?
"Pattern Capture","Script Editor","Error Ratio","Jitter Tolerance","Jitter
Tolerance Template Editor","Output Level","Output Timing","C-Phy Frame
Generator","D-Phy Frame Generator"
:PLUGin:RNODes[:LIST]?
Returns the rootnodes of the SCPI tree for addressing the corresponding
plug-in.
Notes:
CTSuit - It’s just a nickname of a plug-in that represents the new type of
plug-in/sub-model approach. It illustrates the usage of the ‘new’ Identifier
attached to a SCPI command.
Example:
:PLUGin:RNODes[:LIST]?
Returns: "
“CCAPture","CPHYTests","DPHYTests","DPHYplugin","CPHYplugin"
:PLUGin:rootnode:CATalog?
This command returns a list of all created plug-in names currently
available.
Example:
PLUGin:rootnode:CATalog?
:PLUGin:CTSuit:CATalog?
”Error Ratio 1","Error Ratio 2
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
165
6
SCPI Plug-in Interface
:PLUGin:rootnode:NEW 'UserNameOfPlugin'
This command creates a new plug-in. The type of the created plug-in is
specified bythe rootnode of the SCPI tree.
Example:
:PLUGin:rootnode:NEW 'Identifier'
:PLUGin:CTSuit:NEW 'UserNameOfPlugin'
:PLUGin:rootnode:DELete 'UserNameOfPlugin'
This command deletes a previously created plug-in addressed by the
identifier.
Example:
:PLUGin:rootnode:DELete 'Identifier'
:PLUGin:CTSuit:DELete 'UserNameOfPlugin'
:PLUGin:rootnode:RESet 'UserNameOfPlugin#SubmodelID
This command resets a plug-in / sub-model addressed by the identifier /
sub-model ID.
Notes:
•
Which tasks are covered by the :RESet command?
• If a sub-model is a test and external instruments are connected it
sends a *RST to every connected instrument?
• Sets the sub-model to a defined state?
Example:
:PLUGin:rootnode:RESet 'Identifier'
:PLUGin:CTSuit:RESet 'UserNameOfPlugin'
166
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
SCPI Plug-in Interface
6
:PLUGin:rootnode:STARt 'UserNameOfPlugin#SubmodelID' (IRunnable interface)
This command starts an action implemented in the addressed plug-in /
sup-model. An action can be for example a measurement or a complete
test or …
Example:
:PLUGin:rootnode:STARt 'Identifier'
:PLUGin:CTSuit:STARt 'UserNameOfPlugin#Test523098’
:PLUGin:rootnode:STOP 'UserNameOfPlugin#SubModelID' (IRunnable interface)
This command stops an action implemented in the addressed plug-in /
sub-model. An action can be for example a measurement or a complete
test or …
Example:
:PLUGin:rootnode:STOP ‘Identifier’
:PLUGin:CTSuit:STOP 'UserNameOfPlugin#Test523098’
:PLUGin:rootnode:RUN[:STATus]? 'UserNameOfPlugin#SubModelID' (IRunnable interface)
This command returns the running status of the addressed plug-in /
sub-model.
•
A 0 indicates the plug-in / sub-model is not running and
•
a 1 indicates the plug-in / sub-model is running.
Example:
:PLUGin:rootnode:RUN[:STATus]? 'Identifier'
:PLUGin:CTSuit:RUN[:STATus]? 'UserNameOfPlugin#Test523098’
Return: 1
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
167
6
SCPI Plug-in Interface
:PLUGin:rootnode:RUN:PROGress? 'UserNameOfPlugin#SubModelID' (IRunnable interface)
This command returns a number in the range of 0.0 to 1.0 to indicate the
progress of the implemented action in the plug-in / sub-model.
•
A 0.0 indicates no progress so far or the action was not started
•
1.0 indicates the measurement is finished (100%); all work done.
Example:
:PLUG:rootnode:RUN:PROG? ‘Identifier’
:PLUG:CTSuit:RUN:PROG? 'UserNameOfPlugin#Test523098’
Return: 0.51
:PLUGin:rootnode:RUN:MESSage? 'UserNameOfPlugin#SubModelID' (IRunnable interface)
This command returns a string describing the state of an action
implemented by a plug-in / sub-model. Possible states include
NotStarted, Running, Suspended, Finished, Error, or Stopped.
Example:
:PLUGin:rootnode:RUN:MESSage? 'Identifier'
:PLUGin:CTSuit:RUN:MESSage? 'UserNameOfPlugin#Test523098'
Return: "Finished”
:PLUGin:rootnode:RUN:HISTory[:STATe][?] 'UserNameOfPlugin#SubModelID' (IRunnable interface)
This command enables / disables the storage of a plug-in / sub-model
result’s history.
Example:
:PLUG:rootnode:RUN:HISTory ‘Identifier’,<Argument>
:PLUG:CTSuit:RUN:HISTory 'UserNameOfPlugin#Test523098', 1
168
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
SCPI Plug-in Interface
6
:PLUGin:rootnode:ERRor? 'UserNameOfPlugin#SubModelID' (IRunnable interface)
Reports a list of error and clears the error queue.
Notes:
•
New command
•
If no sub-model ID is specified the ‘default ‘sub-model is used
•
If the ‘Configure’ sub-model ID is used error queue of that sub-model is
returned and cleared
•
The format of the returned error string is similar to the SCPI
:SYSTem:ERRor? response
Example:
:PLUG:rootnode:ERRor? 'Identifier'
:PLUG:CTSuit:ERRor? 'UserNameOfPlugin#Test523098'
Returns: 0,"No error
:PLUGin:CTSuit:LOG? 'UserNameOfPlugin#SubModelID' (IRunnable interface)
Reports the log and clears it.
Notes:
•
New command
•
Format of the returned stream
•
If no sub-model ID defined the default sub-model will be addressed
Example:
:PLUG:rootnode:LOG? 'Identifier'
:PLUG:CTSuit:ERRor? 'UserNameOfPlugin#Test523098'
Returns: 0,"No error"
:PLUGin:rootnode:BREak 'UserNameOfPlugin#SubModelID' (IsBreakContinuePosssible interface)
This command breaks / pauses an action implemented in a plug-in /
sub-model.
Notes:
If no sub-model is specified the default sub-model will be used
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
169
6
SCPI Plug-in Interface
Example:
:PLUGin:rootnode:BREak ‘Identifier’
:PLUGin:CTSuit:BREak ‘UserNameOfPlugin#Test523098
:PLUGin:rootnode:STEP 'UserNameOfPlugin#SubModelID' (IsBreakContinuePosssible interface)
This command allows you to step through a plug-in’s / sub-model’s action
(single step). The action implemented in the plug-in / sub-model was
stopped using the :BREak command.
Notes:
If no sub-model is specified the default sub-model will be used
Example:
:PLUGin:rootnode:STEP ‘Identifier’
:PLUGin:CTSuit:STEP ‘UserNameOfPlugin#Test523098’
:PLUGin:rootnode:CONTinue 'UserNameOfPlugin#SubModelID' (IsBreakContinuePosssible interface)
This command allows you to continue an action implemented in a plug-in /
sub-model. The implemented action was stopped using the :BREak
command.
Notes:
If no sub-model is specified the default sub-model will be used
Example:
:PLUGin:rootnode:CONTinue ‘Identifier’
:PLUGin:CTSuit:CONTinue ‘UserNameOfPlugin#Test523098’
170
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
SCPI Plug-in Interface
6
:PLUGin:rootnode:CONFigure 'UserNameOfPlugIn' (IHasSubModels interface)
Configure is an initial task needed for creating the sub-models within the
plug-in. Depending on global parameters a set of sub-models are created
and provide single actions (e.g. completed tests). Every individual
sub-model can be controlled by a SCPI commands.
Notes:
New command
•
Specifies the initial ‘default’ sub-model (can be overwritten be the
…:SELect command)
•
All previously created sub-models are removed (disposed)
•
All results will be removed
•
Content of the global parameter will be applied to the new created
sub-models
•
The ‘:CONfigure’ functionality (global parameters etc.) is also
implemented as addressable sub-model. It has a certain name and can
also be selected by the :SELect command as default sub-model.
Example:
:PLUGin:rootnode:CONFigure ‘Identifier’
:PLUGin:CTSuit:CONFigure ‘UserNameOfPlugin’
:PLUGin:rootnode:SELect[?] 'UserNameOfPlugIn#SubModelID' (IHasSubModels interface)
Determines the addressed sub-model as ‘default’ sub-model (e.g. default
test). If the sub-model ID is omitted in an attached identifier of a SCPI
command this selected sub-model will be used.
Notes:
•
New command
•
:CONFigure step defines a ‘default’ sub-model. So we have always an
active sub-model.
Example:
:PLUGin:rootnode:SELect 'UserNameOfPlugIn#SubModelID'
:PLUGin:CTSuit:SELect 'UserNameOfPlugin#Test523098'
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
171
6
SCPI Plug-in Interface
:PLUGin:rootnode:CLEar 'UserNameOfPlugin#SubModelID' (IHasSubModels interface)
Clears all the result data of the addressed sub-model.
Notes:
•
New command
•
If the sub-model ID is omitted the result data of the specified default
sub-model is cleared
•
If the ‘Configure’ sub-model is addressed result data of all sub-modules
will be cleared
Example:
:PLUGin:rootnode:CLEar 'UserNameOfPlugIn#SubModelID'
:PLUGin:CTSuit:SELect 'UserNameOfPlugin#Test523098'
:PLUGin:rootenode:PARameter[:VALue][?] 'UserNameOfPlugin#SubModelID:Location&FunctionalBlock.Parameter', "Value" (IHasSubModels interface)
A generic command for setting / getting parameter values of the
addressed sub-module.
Notes:
•
New command
•
Global parameters administered by the ‘Configure’ sub-model can also
be addressed by this command; just use the sub-model ID of this
‘special’ sub-model
•
The argument of this command is always a string
•
A unit and a multiplier can be added to numerical values within the
argument string e.g. “100 mV”
•
Parts of the identifier string can be omitted based on the select
command, singleton, singularity of parameter. let’s define here what is
possible
Example:
:PLUGin:rootnode:PARameter UserNameOfPlugin#SubModel:Amplitude’,
“Value”
:PLUGin:CTSuit:PARameter ‘#SubModel:Amplitude’, “100 mV
172
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
SCPI Plug-in Interface
6
:PLUGin:rootnode:LIST? 'UserNameOfPlugIn' (IHasSubModels interface)
Returns a list of sub-model IDs of currently existing sub-models. These
sub-model IDs can be used in the identifier attached to a SCPI command
for addressing a specific sub-model (e.g. testxy)
Notes:
•
New command
•
Sub-model ID of the ‘Configure’ sub-model is also contained in the list
•
If the ‘configure’ step was not executed it should be the sole sub-model
ID in the list
Example:
:PLUGin:rootnode:LIST? 'UserNameOfPlugIn'
:PLUGin:CTSuit:LIST? 'UserNameOfPlugIn'
Returns:
“ImTheConfigureSubModelID”, “Test523098”,” Test523999”,”
Test525588”,” Test545878”
:PLUGin:rootnode:FETCh:DATA? 'UserNameOfPlugIn#SubModelID'
This command returns the raw data of the addressed plug-in / sub-model.
Notes:
•
If the sub-model ID is omitted the default sub-model is used
•
If storing of passed data (history switched on) is enabled accessing that
chunk of result data is very similar like talking to other sub-models.
Every blob of past result data behaves like a sub-model.
•
Implementation of …:DATA is up to the designer of the plug-in
Example:
:PLUGin:rootnode:FETCh:DATA? 'Identifier‘
:PLUGin:CTSuit:FETCh:DATA? 'UserNameOfPlugIn#SubModelID
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
173
6
SCPI Plug-in Interface
:PLUGin:rootnode:FETCh:RESult? 'UserNameOfPlugIn#SubModelID
Returns the results of a plug-in / sub-models (e.g. results of tests, etc.).
The existing plug-ins have a command named ..:DATA? implemented; it
returns the raw data of a measurement. For the plug-in / sub-model
(tests) approach a command is needed for returning a more
comprehensive response format, like XML or ???. This …:RESult command
returns the results of e.g. tests and not only a raw data stream.
Notes:
•
New command
•
If the sub-model ID is omitted the default sub-model is used
•
If storing of passed result (history switched on) is enabled accessing
that chunk of results is very similar like talking to other sub-models.
Every blob of past results behaves like a sub-model.
Example:
:PLUGin:rootnode:FETCh:RESult? 'Identifier‘
:PLUGin:CTSuit:FETCh:RESult? 'UserNameOfPlugIn#SubModelID'
174
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Keysight M8085A MIPI D-PHY Receiver Test Software
User Guide
7
IBerReader Interface
IBerReader Interface Definition / 176
IBerReader Usage / 181
Example Code Description / 184
Debugging / 186
The IBerReader interface is a .NET software interface which allows to
communicate with properitary external tools to perform automated tests
with ValiFrame. It is available for MIPI D-PHY, M-PHY, C-PHY and SATA Rx
testing. It contains methods, which will be called by ValiFrame during test
execution to configure the device under test (DUT) and request the
pass/fail information from the DUT. A dll will be loaded at run time and a
class will be instantiated, which supports the IBerReader interface. The
main function for getting the pass/fail information is the method
GetCounter(out double bitCounter, out double errorCounter). In the
following chapter the definition is shown.
7
IBerReader Interface
IBerReader Interface Definition
using System;
using System.Collections.Generic;
using System.Text;
namespace BerReader
{
public interface IBerReader
{
/// <summary>
/// This method is called to connect to
your error reader.
/// </summary>
/// <param name="address">The address
string can be used by your implementation
/// to configure the connection to the
IBerReader interface</param>
void Connect(string address);
/// <summary>
/// This method is called to close the
connection
/// </summary>
void Disconnect();
176
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
IBerReader Interface
7
/// <summary>
/// This method is called prior to
individual tests to select the channels under
/// test and the test mode. It can be used
to load pre-defined settings.
/// </summary>
/// <param name="mode"> Defines the test
mode during the test. The modes are
/// Clock_HS, DataX_HS, DataX_LP,
DataX_ULP with X: 0-<number of
/// data lines -1></param>
void Init(string mode);
/// <summary>
/// Is called at the beginning of the
error measurement and allows
/// a reset for the DUT to be implemented.
/// </summary>
void ResetDut();
/// <summary>
/// Starts the counters. This method MUST
reset all counters!
/// </summary>
void Start();
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
177
7
IBerReader Interface
/// <summary>
/// Stop the DUT to read out the counters
(see
///
GetReadCounterWithoutStopSupported()).
/// </summary>
void Stop();
/// <summary>
/// This method returns counters, the 1st
counting the bits/frames/lines
/// or bursts and the 2nd one counting the
errors detected by the MipiBerReader.
/// The automation software will compute
the BER using the following
/// equation BER=errorCounter/bitCounter.
In the case bitCounter = 0 even when
/// the stimulus is sending data, this is
also interpreted as fail.
/// </summary>
/// <param name="bitCounter"> Contains the
number of bits which are received
/// by the DUT. If it is not possible to
count bits the value can also contain
/// frames, or bursts. It is just a matter
of the value defined as target BER.
/// If it is not possible to get the
number of bits/frames/bursts then the
/// method can return a value of -1 and
the automation software can compute
178
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
IBerReader Interface
7
/// the number of bits from the data rate
and the runtime.</param>
/// <param name="errorCounter"> Total
number of errors since the last start.
/// </param>
void GetCounter(out double bitCounter, out
double errorCounter);
/// <summary>
/// This method returns a Boolean value
indicating whether the device
/// supports reading the counters while
it is running. If this method
/// returns false, the device needs to be
stopped to read the counters.
/// In this case the automation software
will stop data transmission
/// before calling the GetCounter()
function, and re-start data transmission
/// again after reading the counter values.
/// </summary>
/// <returns> false if device needs to be
stopped before reading the counters,
/// true if the counters can be read on
the fly.</returns>
bool
GetReadCounterWithoutStopSupported();
/// <summary>
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
179
7
IBerReader Interface
/// This property returns a number to
multiply the value delivered by the
/// bitCounter in the GetCounter()
function.
/// </summary>
Double NumberOfBitsPerFrame {set; get;};
/// This property returns the number of
payload
/// bits in a frame used for the detection
of the BER.
/// If i.e. the errorCounter in the
GetCounter() function is just the
/// checksum error then this parameter is
the number of the payload.
/// </summary>
double NumberOfCountedBitsPerFrame {set;
get;};
}
}
180
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
IBerReader Interface
7
IBerReader Usage
Each of the methods and properties of this interface will be used during
test execution. To understand the meaning and duty of the functionality it
is required to understand at which point of a test these functions will be
called. A helpful source for understanding the meaning are the comments
above of each methods in the previous chapter “IBerReader Interface
Definition”.
Integration
Copy your compiled version, which is a dll, into the ValiFrame program
files folder. Each application (MIPI, MPhy, SATA) has a separate program
files folder which is named like the application name. By name of the dll
(MIPI D-PhyCustomBERReader.dll: MipiCustomBerReader.dll, MIPI
M-Phy: MPhyCustomBerReader.dll, SATA: SataCustomBerReader.dll) it
will be identified and loaded. If the loading is successful, a new entry in the
BerReader list of the Configure DUT dialog is visible. After selection of the
“Custom BER Reader” the address field will be editable, and the text of the
address field will be used as argument for the Init(string address) method.
Connect/Disconnect
If the operator presses the start button in the ValiFrame user interface,
which is thestart of the execution of the test list the Connect(string
address) will be called, before the execution of the first test. If this fails
with an exception, the test automation aborts the execution. In it is needed
to check why the connect function did not work. Check the functionality by
using the Test GUI with the same text in the address field. At the end of
each run the Disconnect() method will be called. A run is the time between
the press on the start button and the final completed dialog, which is
shown at the end. In case that the repetition parameter is >0 the
Disconnect() will be called after the last repetition.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
181
7
IBerReader Interface
Init
Init(string mode) will be called once at the beginning of each test. The
default parameters are set for the signalling and it is expected that the
DUT can handle these default levels and timings at the RX side.
The content of the argument string “mode” is application dependent and
needs to be requested from the application specific documentation. A
more direct way to find out the exact string which is given as mode is to
put a break point in the init method, and see what ValiFrame is setting for
each test. In some applications like M-Phy the argument of the mode
string is available via the property grid and can even be modified for each
test individually.
ResetDUT and GetCounter
ResetDut() will be called just before each test point. It should be used to
reset the bit and error counter and re-initialize the DUT to be ready for
testing. A RX test procedure requires in the most cases several test points.
For example, during a voltage sensitivity test several voltages will be set
and for each test point a ResetDUT() will be called. After the ResetDUT()
the test automation will wait with the GetCounter(out double bitCounter,
out double errorCounter) until the expected number of bits are
transmitted. The number of bits are depending on the target bit error rate
and the confidence level which needs to be reached. As a simple
calculation the number of bits which needs to be compared is about three
times of the target BER. Example target BER: 1e-10, Data Rate 1 GBit/s ?
3e10 bits are required ? 30 seconds test time is needed for each test
point.
For a target BER below 1e-9 it may be suitable to request the bit and error
counter before the theoretical integration time is reached to speed up the
testing in case that errors are already visible. In this case the test
automation will call the GetCounter() method several times for each test
point. It is expected that the bit and the error counters will not be reseted
by these calls.
182
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
IBerReader Interface
7
Configuration and Conditions
GetReadCounterWithoutStopSupported() will be called before of each test
point. If the return value is true, then no Stop() and Start() method will be
called. For some implementation it is necessary to stop the execution of
the bit comparison (see the Logic Analyser Example), before it is possible
to read out the counter.
NumberOfBitsPerFrame and NumberOfCountedBitsPerFrame will be used
to compute the test time and BER. By these properties it is possible to give
a frame counter instead of a bit counter in the GetCounter() function. The
BER will be calculated in this case by multiplying the bit counter with the
NumberOfCountedBitsPerFrame. In applications in which the data stream
contains blanking periods, or bits which will not be taken into account for
the bit comparison, the NumberOfBitsPerFrame and
NumberOfCountedBitsPerFrame will be different, and the test time will be
extended. The values for these parameters depend on the pattern which is
used for testing. For some applications the test pattern is well defined, but
the test automation allows to use another one. In this case the IBerReader
should provide suitable values for these parameters.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
183
7
IBerReader Interface
Example Code Description
The SDK for implementing the IBerReader interface comes with several
example Visual Studio Projects and a project containing a test user
interface, to test the implementation beforehand. The projects are:
•
IBerReaderTestGui: project for building the IBerReader Test GUI. Via
this GUI the functionality of the own implementation can be tested.
•
LogicAnalyserBerReader: implementation using a logic analyser as
configuration tool and error detector.
•
MipiCustomBerReader: example code with empty method
implementations, which can be used as start for the own
implementation.
•
OfflineBerReader: example code for a offline BER reader. Instead of a
direct access to a tool that configures the DUT, dialogs are shown to let
the user do the configuration, and finally ask, if the DUT is working
properly.
All projects require two references, one to VFBase and the other to
VFInstruments, which are libraries of ValiFrame. They can be added by do
a right-clicking on the References folder of the Visual Studio Project and
select “Add References...”. By doing so a dialog pops up in which the user
can select the “Browse...” tab and select VFBase.dll and VFInstruments.dll
from the ValiFrame Program Files folder.
IBerReader Test GUI
The Test GUI allows to test the own implementation of a
CustomBerReader. The GUI allows to execute all methods of the own
IBerReader implementation without having them integrated into ValiFrame
alreadey to separate the development and debugging from the ValiFrame
integration. Since the source code is available debugging can be done via
this user interface.
MipiCustomBerReader
The MIPICustomBerReader project is a project containing an empty
CustomBerReader class. All necessary methods and properties are
available but just contains a throw new Exception (“Not implemented.”)
call. This project can be used as template for implementation.
184
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
IBerReader Interface
7
OfflineBerReader
The OfflineBerReader project contains the implementation of an “offline”
version of a IBerReader supporting class. All methods will show a dialog to
the operator instead of doing a call to the DUT or tools directly. It can be
used to see when and how the IBerReader methods are used inside of the
test automation.
LogicAnalyserBerReader
The LogicAnalyserBerReader IBerReader implementation is using the
ValiFrame Logic Analyser driver for controlling an Agilent 16900A Logic
Analyser. ValiFrame is using a .Net Remoting Server running on the LA for
accessing instrument settings, stopping and starting the analyser and
generator modules, and accessing the trigger counter. It is the same
implementation which will be used in MIPI D-Phy for controlling the DUT
via the PPI interface. In this application, the LA is configuring the device via
the pattern generator modules, and the analyser modules are connected
to the parallel interface of the DUT. Via this parallel interface the same
data which are received via the high speed D-Phy interface are sampled,
and via a special trigger setup the pattern is compared. The counter of the
trigger are used for gaining the number of received bursts, and the number
of errors. The configuration of the DUT is done by loading and executing a
LA pattern generator setup file, and the setup for the analyser contains the
necessary port assignment for the PPI. It is in the hand of the customer, to
create a suitable setup for the actual DUT.
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
185
7
IBerReader Interface
Debugging
Debugging using the Test GUI
The easiest way for debugging is using the Test GUI. The source code is
available and therefore it is possible to set break points in each method
which is using the IBerReader functionality. If the developer puts the
project of the IBerReader implementation in the same Visual Studio
solution, then it will also follow the source lines of the IBerReader class in
case of stepwise running the debugger (Key F10, step over, and F11, step
into). To get a reasonable signal at the inputs of the DUT the test
automation, a frame generator, or any other signal source, which can
generate specification conform signals can be used. If the test automation
is used, then either the offline BER reader can be used to stop the
execution of the test at each IBerReader call, or the compiled dll. If the
compiled dll is used it makes more sense to use the test automation as
startup application for debug than the Test GUI. Using the frame generator
as controller for the signal sources is the most flexible way, because by the
frame generator all parameters can be set in the optimum range to test
the error free behavior of the DUT, and setting one parameter at the edge
of the DUT capability, the error counter functionality can be tested. As
minimum requirement the VFBase.dll and VFInstrument.dll needs to be
copied from the ValiFrame program files folder and referenced.
186
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
Keysight M8085A MIPI D-PHY Receiver Test Software User Guide
187
This information is subject to
change without notice.
© Keysight Technologies 2016
Edition 2.0, September 2016
www.keysight.com
Was this manual useful for you? yes no
Thank you for your participation!

* Your assessment is very important for improving the work of artificial intelligence, which forms the content of this project

Download PDF

advertisement