TS4974 - uri=media.digikey
TS4974
1W differential audio power amplifier
with up/down digital volume control pins
Features
DFN10 (3x3)
■
Operates from VCC= 2.5 V to 5.5 V
■
Zero pop & click
■
1 W output power @ VCC = 5 V, THD = 1%,
F = 1 kHz, with 8 Ω load
■
Ultra-low consumption in standby mode (2 µA
max.)
■
85 dB PSRR @ 217Hz
■
16-step digital volume control
■
Two discrete up and down volume control pins
VIN-
■
Gain range from -33 dB to + 12 dB
VIN+
■
Integrated debouncing system
BYPASS
■
Ultra-fast start-up time: 15 ms typ.
■
DFN10 3x3 mm (pitch 0.5)
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Pin connections (top view)
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Applications
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Mobile phones (cellular / cordless)
■
PDAs
■
Laptop/notebook computers
■
Portable audio devices
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Description
let
1
10
VCC
9
VOUT-
3
8
VOUT+
STANDBY
4
7
UP / DVC
GND
5
6
DOWN / DVC
The TS4974 features 16-step digital volume
control through two discrete Up and Down control
pins. The start-up gain is internally fixed to
-12 dB. An integrated debounce system prevents
voltage spikes on the UP/DOWN pins during
volume control mode from being taken into
account during a debounce time of 10 ms (typ).
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At 3.3 V, the TS4974 is a dual power audio
amplifier capable of delivering 380 mW of
continuous RMS output power into a 8 Ω bridgedtied loads with 1% THD+N. An external standby
mode control reduces the supply current to less
than 2 µA. An internal over-temperature shutdown
protection is provided.
The TS4974 has been designed for high quality
audio applications such as mobile phones and
minimizes the number of external components
necessary.
May 2007
Rev 4
1/25
www.st.com
25
Contents
TS4974
Contents
1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Typical application schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
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4.1
Differential configuration principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.2
Low frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.3
Power dissipation and efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
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Assumptions: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Wake-up time (tWU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.6
Shutdown time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.7
Pop performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.8
Single-ended input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.9
Volume setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.10
Notes on PSRR measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
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4.5
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
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Decoupling of the circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
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4.4
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
TS4974
1
Absolute maximum ratings
Absolute maximum ratings
Table 1.
Absolute maximum ratings
Symbol
Parameter
Value
Unit
6
V
GND to VCC
V
Supply voltage (1)
VCC
Vi
Input voltage
(2)
Toper
Operating free air temperature range
-40 to + 85
°C
Tstg
Storage temperature
-65 to +150
°C
150
°C
Tj
Maximum junction temperature
Thermal resistance junction to ambient
Rthja
(3)
Power dissipation
Pd
Internally
ESD
Human body model
ESD
Machine model
Latch-up
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200
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2
Latch-up immunity
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Lead temperature (soldering, 10sec)
Pr
°C/W
limited(4)
kV
200
V
200
mA
260
°C
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1. All voltage values are measured with respect to the ground pin.
2. The magnitude of input signal must never exceed VCC + 0.3 V / GND - 0.3 V.
3. Device is protected in case of over temperature by a thermal shutdown active @ 150° C.
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4. Exceeding the power derating curves during a long period, may provoke abnormal operation.
Table 2.
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Operating conditions
Symbol
VCC
Parameter
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Supply voltage
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VSTBY
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VU/D
Standby voltage input:
Device ON
Device OFF
Volume control UP/DOWN voltage input:
UP/DOWN mode ON
UP/DOWN mode OFF
Value
Unit
2.5 to 5.5
V
1.5 ≤ VSTBY ≤ VCC
GND ≤ VSTBY ≤ 0.4
V
0 ≤ VU/D ≤ 0.3xVCC,
0.7xVCC ≤ VU/D ≤ VCC
V
RL
Load resistor
≥8
Ω
TSD
Thermal shutdown temperature
150
°C
Rthja
Thermal resistance junction to ambient (1)
80
°C/W
1. With heat sink surface = 125
mm2.
3/25
Typical application schematics
2
TS4974
Typical application schematics
Figure 1.
Typical application schematics for the TS4974
VCC
Volume DOWN
Volume UP
S1
VCC
Rpu1
Rpu2
470k
470k
VCC
S2
470k
DIGITAL VOLUME
CONTROL
P1
Vin-
2
Vin+
3
BYP ASS
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330nF
Cin2
P2
Cb
1µF
)-
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Table 3.
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4/25
9
Vout+
8
Speaker
8 Ohms
STBY
STBY
TS4974 DFN10
STBY control
External component descriptions
Components
let
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BIAS
Vout-
5
Vin+
+
4
330nF
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Cin1
1
1µF
10
470k
Vcc
6
DOWN
Rpd1
GND
Vin-
7
U1
UP
Cs
Rpd1
Rpu1, Rpu2
Rpd1, Rpd2
Functional description
Pair of pull-up (Rpu1, Rpu2) or pull down (Rpd1, Rpd2) resistors that are
connected to the digital volume control pins UP/DVC and DOWN/DVC.
See Section 4.9: Volume setting on page 20.
CIN
Input coupling capacitors that block the DC voltage at the amplifier input
terminal. They form together with the amplifier’s differential input impedance
ZIN a first order high pass filter with a -3dB cut-off frequency
(fcut-off = 1 / (2 x π x ZIN x CIN)).
See Section 4.2: Low frequency response on page 16.
CS
Supply bypass capacitor that provides power supply filtering.
See Section 4.4: Decoupling of the circuit on page 19.
CB
Bypass pin capacitor that provides half supply filtering.
See Section 4.4: Decoupling of the circuit on page 19.
TS4974
Electrical characteristics
3
Electrical characteristics
Table 4.
VCC = +5 V, GND = 0 V, Tamb = 25° C (unless otherwise specified)
Symbol
Parameter
Min.
Typ.
Max.
Unit
ICC
Supply current, no input signal, no load
3.2
3.85
mA
ISTBY
Standby current
No input signal, VSTBY = GND, RL = 8Ω
300
2000
nA
IU/D
Volume control UP/DOWN current
0 ≤ VU/D ≤ 0.3 VCC
10
Voo
Output offset voltage
No input signal, RL = 8 Ω, G=0 dB, floating inputs
5
Po
Output power
THD = 1% max, f = 1 kHz, RL = 8Ω
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0.8
Total harmonic distortion + noise
THD + N Po = 500 mW rms,
20 Hz < F < 20 kHz, RL = 8 Ω, G = 0 dB, Cb= 1 µF, Cin = 330 nF
µA
Pr
1
mV
W
0.5
%
85
dB
61
dB
Signal-to-noise ratio (weighted A, G= 0 dB)
(RL = 8 Ω, THD + N ≤ 0.5%, 20 Hz < F < 20 kHz)
100
dB
Gs
Start up gain (when powered up from VCC - see Section 4.9:
Volume setting on page 20)
-12
dB
G
Gain range
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PSRR
Power supply rejection ratio(1)
F = 217Hz, RL = 8Ω)
Vripple = 200 mVpp, input grounded, Cb=1 µF, Cin=330 nF, G=0 dB
CMRR
Common mode rejection ratio(2)
F = 217 Hz, RL = 8 Ω,
Vincm = 200 mVpp, Cb = 1 µF, Cin= 330 nF, G= 0 dB
SNR
Gain step
size
)
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Gain
Tolerance between theoretical gain set and real gain
accuracy
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twu
Wake-up time
Cb=1 µF
VN
Output voltage noise F = 20 Hz to 20 kHz, RL = 8 Ω, G= 0 dB
Unweighted
A-weighted
Zin
Differential input impedance
tdebounce
Debouncing time
tautorepeat Time between volume changes
trange
During autorepeat mode, necessary time to cover the whole gain
range
-33
+12
3
-1
48
dB
dB
+1
dB
10
ms
21
14
µVRMS
60
75
kΩ
10
ms
220
ms
3200
ms
1. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is an added sinus signal to VCC @ F = 217 Hz.
2. Dynamic measurements - 20*log(rms(Vout)/rms(Vincm)).
5/25
Electrical characteristics
Table 5.
TS4974
VCC = +3.3 V, GND = 0 V, Tamb = 25° C (unless otherwise specified)
Symbol
Typ.
Max.
Unit
Supply current
No input signal, no load
3.0
3.6
mA
Standby current
No input signal, VSTBY = GND, RL = 8 Ω
260
2000
nA
IU/D
Volume control UP/DOWN current
0 ≤VU/D ≤ 0.3 VCC
10
Voo
Output offset voltage
No input signal, RL = 8 Ω, G= 0 dB, floating inputs
5
Po
Output power
THD = 1% max, f = 1 kHz, RL = 8 Ω
ICC
ISTBY
Parameter
Min.
300
Total harmonic distortion + noise
THD + N Po = 500 mW rms,
20 Hz < F < 20 kHz, RL = 8 Ω, G = 0 dB, Cb= 1 µF, Cin = 330 nF
PSRR
Power supply rejection ratio(1)
F = 217 Hz, RL = 8 Ω
Vripple = 200 mVpp, input grounded, Cb = 1 µF, Cin= 330 nF, G = 0 dB
CMRR
Common mode rejection ratio(2)
F = 217 Hz, RL = 8 Ω,
Vincm = 200 mVpp, Cb = 1 µF, Cin = 330 nF, G = 0 dB
μA
20
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mW
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%
85
dB
61
dB
Signal-to-noise ratio (weighted A, G= 0 dB)
(RL = 8 Ω, THD + N ≤ 0.5%, 20 Hz < F < 20 kHz)
100
dB
Gs
Start up gain (when powered up from VCC - See Section 4.9:
Volume setting on page 20)
-12
dB
G
Gain range
SNR
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Gain step
size
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Gain
Tolerance between theoretical gain set and real gain
accuracy
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Output voltage noise F = 20 Hz to 20 kHz, RL = 8 Ω, G = 0 dB
Unweighted
A-weighted
Zin
Differential input impedance
Debouncing time
tautorepeat Time between volume changes
trange
-33
During autorepeat mode, necessary time to cover the whole gain
range
+12
3
-1
Wake-up time
Cb= 1 µF
VN
tdebounce
48
2. Dynamic measurements - 20*log(rms(Vout)/rms(Vincm)).
dB
dB
+1
dB
10
ms
21
14
µVRMS
60
75
kΩ
10
ms
220
ms
3200
ms
1. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is an added sinus signal to VCC @ F = 217 Hz.
6/25
mV
TS4974
Table 6.
Electrical characteristics
VCC = +2.6V, GND = 0V, Tamb = 25°C (unless otherwise specified)
Symbol
Typ.
Max.
Unit
Supply current
No input signal, no load
2.8
3.4
mA
Standby current
No input signal, VSTBY = GND, RL = 8 Ω
230
2000
nA
IU/D
Volume control UP/DOWN current
0 ≤ VU/D ≤ 0.3 VCC
10
Voo
Output offset voltage
No input signal, RL = 8 Ω, G = 0 dB, floating inputs
5
Po
Output power
THD = 1% max, f = 1 kHz, RL = 8 Ω
ICC
ISTBY
THD + N
Parameter
Min.
200
Total harmonic distortion + noise
Po = 500 mW rms,
20 Hz < F < 20 kHz, RL = 8 Ω, G = 0 dB, Cb= 1 µF, Cin= 330 nF
PSRR
Power supply rejection ratio(1)
F = 217 Hz, RL = 8 Ω
Vripple = 200 mVpp, input grounded, Cb= 1 µF, Cin= 330 nF, G= 0 dB
CMRR
Common mode rejection ratio(2)
F = 217 Hz, RL = 8 Ω,
Vincm = 200 mVpp, Cb = 1 µF, Cin= 330 nF, G= 0 dB
μA
20
mV
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250
mW
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%
85
dB
61
dB
Signal-to-noise ratio (weighted A, G = 0 dB)
(RL = 8 Ω, THD + N ≤ 0.5%, 20 Hz < F < 20 kHz)
100
dB
Gs
Start up gain (when powered up from VCC - see Section 4.9:
Volume setting on page 20)
-12
dB
G
Gain range
SNR
)
(s
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s
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Gain step
size
P
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Gain
Tolerance between theoretical gain set and real gain
accuracy
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Output voltage noise F = 20 Hz to 20 kHz, RL = 8 Ω, G = 0 dB
Unweighted
A-weighted
Zin
Differential input impedance
Debouncing time
tautorepeat Time between volume changes
trange
During autorepeat mode, necessary time to cover the whole gain
range
+12
3
-1
Wake-up time
Cb=1 µF
VN
tdebounce
-33
48
dB
dB
+1
dB
10
ms
21
14
µVRMS
60
75
kΩ
10
ms
220
ms
3200
ms
1. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is an added sinus signal to VCC @ F = 217 Hz.
2. Dynamic measurements - 20*log(rms(Vout)/rms(Vincm)).
7/25
Electrical characteristics
Table 7.
TS4974
Output noise
Unweighted filter 20 Hz to 20 kHz
A-weighted filter
Vout (µA)
Vout (µA)
G=+12 dB
22
15
G=+6 dB
21.5
14.5
G=0 dB
21
14
G=-12 dB
19
13
G=-33 dB
17
12
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TS4974
Electrical characteristics
Figure 2.
THD+N vs. output power
Figure 3.
10
RL = 8 Ω
G = 0dB
F = 1kHz
Cb = 1 μ F
BW < 125kHz
Tamb = 25 ° C
Vcc=3.3V
Vcc=2.6V
1
0.1
1E-3
RL = 8 Ω
G = 12dB
F = 1kHz
Cb = 1 μ F
BW < 125kHz
Tamb = 25 ° C
Vcc=5V
THD + N (%)
THD + N (%)
10
THD+N vs. output power
0.01
0.1
Vcc=3.3V
Vcc=2.6V
1
0.1
1E-3
1
Vcc=5V
0.01
Output power (W)
Figure 4.
Output power (W)
THD+N vs. output power
Figure 5.
Vcc=3.3V
)-
Vcc=2.6V
1
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0.1
1E-3
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Pr
0.01
0.1
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THD+N vs. output power
RL = 16 Ω
G = 12dB
F = 1kHz
Cb = 1 μ F
BW < 125kHz
Tamb = 25 ° C
Vcc=5V
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Vcc=2.6V
0.01
Output power (W)
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Figure 6.
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0.1
1
Output power (W)
THD+N vs. output power
Figure 7.
10
THD+N vs. output power
10
RL = 8 Ω
G = 0dB
F = 20kHz
Cb = 1 μ F
BW < 125kHz
Tamb = 25 ° C
Vcc=3.3V
Vcc=2.6V
1
0.1
1E-3
RL = 8 Ω
G = 12dB
F = 20kHz
Cb = 1 μ F
BW < 125kHz
Tamb = 25 ° C
Vcc=5V
THD + N (%)
THD + N (%)
Vcc=5V
Vcc=3.3V
1
0.1
1E-3
1
1
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10
RL = 16 Ω
G = 0dB
F = 1kHz
Cb = 1 μ F
BW < 125kHz
Tamb = 25 ° C
THD + N (%)
THD + N (%)
10
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0.1
0.01
0.1
Output power (W)
1
Vcc=5V
Vcc=3.3V
Vcc=2.6V
1
0.1
1E-3
0.01
0.1
1
Output power (W)
9/25
Electrical characteristics
Figure 8.
TS4974
THD+N vs. output power
Figure 9.
10
10
RL = 16 Ω
G = 0dB
F = 20kHz
Cb = 1 μ F
BW < 125kHz
Tamb = 25 ° C
Vcc=3.3V
Vcc=2.6V
1
0.1
1E-3
RL = 16 Ω
G = 12dB
F = 20kHz
Cb = 1 μ F
BW < 125kHz
Tamb = 25 ° C
Vcc=5V
THD + N (%)
THD + N (%)
THD+N vs. output power
0.01
0.1
Vcc=3.3V
Vcc=2.6V
1
0.1
1E-3
1
Vcc=5V
0.01
Output power (W)
Output power (W)
Vcc=5V
Pout=500mW
0.1
100
)
(s
ct
Vcc=2.6V
Pout=150mW
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Pr
1000
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RL = 8 Ω
G = 12dB
Cb = 1 μ F
BW < 125kHz
Tamb = 25 ° C
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THD + N (dB)
THD + N (dB)
10
Vcc=3.3V
Pout=250mW
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Figure 11. THD+N vs. frequency
RL = 8 Ω
G = 0dB
Cb = 1 μ F
BW < 125kHz
Tamb = 25 ° C
1
Vcc=5V
Pout=500mW
1
Vcc=3.3V
Pout=250mW
0.1
10000
100
Frequency (dB)
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10
RL = 16 Ω
G = 0dB
Cb = 1 μ F
BW < 125kHz
Tamb = 25 ° C
1
Vcc=2.6V
Pout=90mW
0.1
100
Vcc=3.3V
Pout=150mW
1000
Frequency (dB)
10/25
1000
10000
Figure 13. THD+N vs. frequency
Vcc=5V
Pout=300mW
10000
THD + N (dB)
THD + N (dB)
10
Vcc=2.6V
Pout=150mW
Frequency (dB)
Figure 12. THD+N vs. frequency
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Figure 10. THD+N vs. frequency
10
)
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0.1
RL = 16 Ω
G = 12dB
Cb = 1 μ F
BW < 125kHz
Tamb = 25 ° C
1
Vcc=2.6V
Pout=90mW
0.1
100
Vcc=3.3V
Pout=150mW
1000
Frequency (dB)
Vcc=5V
Pout=300mW
10000
TS4974
Electrical characteristics
Figure 14. PSRR vs. frequency
Figure 15. PSRR vs. frequency
0
PSRR (dB)
-40
-20
-40
PSRR (dB)
-20
0
Vcc = 5V
Vripple = 200mVpp
G = 0dB
Inputs Grounded
Tamb = 25 ° C
Cb=1, 0.47, 0.1 μ F
-60
-80
-100
-100
100
1000
Cb=1, 0.47, 0.1 μ F
-60
-80
20
Vcc = 5V
Vripple = 200mVpp
G = 12dB
Inputs Grounded
Tamb = 25 ° C
20
10000
100
Frequency (Hz)
Frequency (Hz)
Figure 16. PSRR vs. frequency
Figure 17. PSRR vs. frequency
-20
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(s
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-80
du
-100
100
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1000
Vcc = 3.3V
Vripple = 200mVpp
G = 12dB
Inputs Grounded
Tamb = 25 ° C
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-40
Cb=1, 0.47, 0.1 μ F
-60
20
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0
Vcc = 3.3V
Vripple = 200mVpp
G = 0dB
Inputs Grounded
Tamb = 25 ° C
PSRR (dB)
PSRR (dB)
-40
Cb=1, 0.47, 0.1 μ F
-60
-80
-100
20
10000
100
1000
Frequency (Hz)
Frequency (Hz)
Figure 18. PSRR vs. frequency
Figure 19. PSRR vs. frequency
e
t
e
ol
s
b
O
0
PSRR (dB)
-40
-20
-40
Cb=1, 0.47, 0.1 μ F
-60
Cb=1, 0.47, 0.1 μ F
-80
-100
-100
100
1000
Frequency (Hz)
10000
Vcc = 2.6V
Vripple = 200mVpp
G = 12dB
Inputs Grounded
Tamb = 25 ° C
-60
-80
20
10000
0
Vcc = 2.6V
Vripple = 200mVpp
G = 0dB
Inputs Grounded
Tamb = 25 ° C
PSRR (dB)
-20
10000
u
d
o
0
-20
)
s
(
ct
1000
20
100
1000
10000
Frequency (Hz)
11/25
Electrical characteristics
TS4974
Figure 20. CMRR vs. frequency
Figure 21. CMRR vs. frequency
0
Vcc = 5V
-10 RL ≥ 8 Ω
Tamb = 25°C
-20
Vcc = 3.3V
-10 RL ≥ 8 Ω
Tamb = 25°C
-20
-30
-30
G=12dB
Cb=1, 0.47, 0.1 μ F
-40
CMRR (dB)
CMRR (dB)
0
G=0dB
Cb=1, 0.47, 0.1 μ F
-50
-60
-70
-70
100
1000
-80
10000
100
u
d
o
r
P
e
Figure 23. SNR vs. supply voltage
0
t
e
l
o
110
Vcc = 2.6V
-10 RL ≥ 8 Ω
Tamb = 25°C
-20
108
s
b
O
106
CMRR (dB)
)-
G=0dB
Cb=1, 0.47, 0.1 μ F
s
(
t
c
-50
-60
-80
du
100
o
r
P
1000
SNR (dB)
104
-30
-70
102
RL=8 Ω
100
98
96
94
92
A - weighted filter
F = 1kHz
G = 0dB
THD + N < 0.5%
Tamb = 25 ° C
90
2.5
10000
RL=16 Ω
3.0
3.5
Figure 24. SNR vs. supply voltage
s
b
O
104
102
102
100
SNR (dB)
SNR (dB)
106
104
RL=8 Ω
98
A - weighted filter
F = 1kHz
G = +12dB
THD + N < 0.5%
Tamb = 25 ° C
90
2.5
3.0
3.5
RL=16 Ω
RL=8 Ω
100
98
Unweighted filter (20Hz to 20kHz)
F = 1kHz
G = 0dB
THD + N < 0.5%
Tamb = 25 ° C
96
94
92
4.0
Vcc (V)
12/25
5.5
108
RL=16 Ω
106
92
5.0
110
108
94
4.5
Figure 25. SNR vs. supply voltage
110
96
4.0
Vcc (V)
Frequency (Hz)
e
t
e
ol
10000
Frequency (Hz)
Figure 22. CMRR vs. frequency
G=12dB
Cb=1, 0.47, 0.1 μ F
)
s
(
ct
1000
Frequency (Hz)
-40
G=0dB
Cb=1, 0.47, 0.1 μ F
-50
-60
-80
G=12dB
Cb=1, 0.47, 0.1 μ F
-40
4.5
5.0
5.5
90
2.5
3.0
3.5
4.0
Vcc (V)
4.5
5.0
5.5
TS4974
Electrical characteristics
Figure 26. SNR vs. supply voltage
Figure 27. Output power vs. supply voltage
110
Unweighted filter (20Hz to 20kHz)
F = 1kHz
G = 12dB
THD + N < 0.5%
Tamb = 25 ° C
106
SNR (dB)
104
102
100
98
RL=16 Ω
96
94
RL=8 Ω
92
90
2.5
3.0
3.5
4.0
F = 1kHz
BW < 125 kHz
Tamb = 25 ° C
1.0
Output power at 1% THD + N (mW)
108
4.5
5.0
16 Ω
0.6
0.4
32 Ω
0.2
0.0
2.5
5.5
8Ω
0.8
3.0
3.5
Vcc (V)
0.9
8Ω
)-
0.6
t(s
32 Ω
0.4
uc
0.2
0.0
2.5
d
o
r
3.0
3.5
P
e
4.0
Vcc=3.3V
0.6
Vcc=3V
0.5
0.4
0.3
0.0
4.5
5.0
Vcc=2.6V
8
12
16
20
24
28
32
Load resistance (Ω )
Vcc (V)
Figure 31. Standby current vs. supply voltage
0.4
No load
Tamb = 25 ° C
3.5
Vcc=4V
0.7
0.1
t
e
l
o
4.0
Vcc=4.5V
0.8
0.2
Figure 30. Current consumption vs. supply
voltage
s
b
O
b
O
THD+N = 1%
Cb = 1 μ F
BW < 125kHz
Tamb = 25 ° C
Vcc=5V
so
1.0
Output power (W)
Output power at 10% THD + N (mW)
Vcc=5.5V
1.1
16 Ω
r
P
e
let
1.2
F = 1kHz
BW < 125 kHz
Tamb = 25 ° C
0.8
5.0
Figure 29. Output power vs. load resistance
1.4
1.0
4.5
u
d
o
Figure 28. Output power vs. supply voltage
1.2
)
s
(
ct
4.0
Vcc (V)
No load
Tamb = 25 ° C
0.3
3.0
Istby (μ A)
Icc (mA)
2.5
2.0
1.5
1.0
0.2
0.1
0.5
0.0
0
1
2
3
Vcc (V)
4
5
6
0.0
0
1
2
3
4
5
6
Vcc (V)
13/25
Electrical characteristics
TS4974
Figure 32. Standby voltage vs. supply current Figure 33. Frequency response
4.0
No load
3.5 Tamb = 25 ° C
Vcc=5V
3.0
Vcc=2.6V
Vcc=3.3V
2.0
1.5
1.0
0.5
0.0
0.0
0.5
1.0
1.5
2.0
Gain (dB)
Icc (mA)
2.5
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
-1
-2
-3
-4
2.5
Cin=4.7 μ F
Cin=330nF
Cin=4.7 μ F
Cin=4.7 μ F
20
100
r
P
e
Figure 35. Power dissipation vs. output power
t
e
l
o
0.8
Vcc = 5V
0.7 F = 1kHz
THD+N < 1%
Vcc = 5V, 3.3V, 2.6V
ZL = 16 Ω + 500pF
Tamb = 25 ° C
G=+12dB
Cin=4.7 μ F
)-
G=+6dB
Cin=330nF
s
(
t
c
Cin=4.7 μ F
du
Cin=330nF
1000
0.6
0.5
0.4
RL=16 Ω
0.3
RL=32 Ω
0.2
0.0
0.0
10000 20k
0.2
Frequency (Hz)
P
e
RL=8 Ω
0.1
G=0dB
ro
100
s
b
O
Power Dissipation (W)
Gain (dB)
10000 20k
1000
u
d
o
Cin=4.7 μ F
20
)
s
(
ct
G=0dB
Cin=330nF
Frequency (Hz)
Figure 34. Frequency response
Cin=330nF
G=+6dB
Cin=330nF
Vstby (V)
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
-1
-2
-3
-4
Vcc = 5V, 3.3V, 2.6V
ZL = 8 Ω + 500pF
Tamb = 25 ° C
G=+12dB
0.4
0.6
0.8
1.0
Output Power (W)
t
e
l
o
Figure 36. Power dissipation vs. output power Figure 37. Power dissipation vs. output power
s
b
O
0.20
Vcc = 2.6V
0.18 F = 1kHz
THD+N < 1%
0.16
RL=8 Ω
0.2
RL=16 Ω
0.1
RL=32 Ω
Power Dissipation (W)
Power Dissipation (W)
Vcc = 3.3V
F = 1kHz
0.3
THD+N < 1%
RL=8 Ω
0.14
0.12
RL=16 Ω
0.10
0.08
0.06
RL=32 Ω
0.04
0.02
0.0
0.0
0.1
0.2
0.3
Output Power (W)
14/25
0.4
0.00
0.00
0.05
0.10
0.15
Output Power (W)
0.20
0.25
TS4974
Electrical characteristics
DFN10 Package Power Dissipation (W)
Figure 38. Power derating curves
1.5
with 4 layers PCB
1.0
0.5
AMR Value
0.0
0
25
50
75
100
)
s
(
ct
125
Ambiant Temperature ( C)
u
d
o
r
P
e
t
e
l
o
)
(s
s
b
O
t
c
u
d
o
r
P
e
t
e
l
o
s
b
O
15/25
Application information
TS4974
4
Application information
4.1
Differential configuration principle
The TS4974 is a monolithic full-differential input/ output power amplifier with a digital volume
control. It has an internal gain range of -33 dB up to +12 dB, by steps of 3dB (see
Section 4.9: Volume setting on page 20), which offers better performance in terms of noise
immunity and PSRR.
The advantages of a full-differential amplifier are:
●
Very high PSRR (power supply rejection ratio).
●
High common mode noise rejection.
●
Virtually zero pop without additional circuitry, giving a faster start-up time compared to
conventional single-ended input amplifiers.
●
Easier interfacing with differential output audio DAC.
)
s
(
ct
u
d
o
In theory, the filtering of the internal bias by an external bypass capacitor is not necessary.
But, to reach maximum performance in all tolerance situations, it is better to keep this
option.
r
P
e
4.2
Low frequency response
t
e
l
o
s
b
O
The input coupling capacitors block the DC part of the input signal at the amplifier inputs.
Input capacitors Cin and input impedance Zin forms a first-order, high pass filter with -3 dB
cut-off frequency.
)
(s
t
c
u
FCL =
1
2 × π × Rin × Cin
(Hz)
Differential input impedance of 60 kΩ is a typical value, and there is tolerance around this
value.
Note:
d
o
r
From Figure 39 you can easily establish the Cin value required for a cut-off frequency of
-3 dB.
P
e
t
e
l
o
Figure 39. -3dB lower cut-off frequency vs. input capacitance
O
100
All gain setting
Tamb=25 ° C
Low -3dB Cut Off Frequency (Hz)
bs
Minimum Input
Impedance
Typical Input
Impedance
10
Maximum Input
Impedance
0.1
0.5
Input Capacitor Cin (μ F)
16/25
1
TS4974
4.3
Application information
Power dissipation and efficiency
Assumptions:
●
Load voltage and current are sinusoidal (Vout and Iout)
●
Supply voltage is a pure DC source (VCC)
The output voltage is:
V out = V peak sinωt (V)
and
I out
)
s
(
ct
V out
= ------------- (A)
RL
u
d
o
r
P
e
t
e
l
o
and
s
b
O
V peak 2
P out = --------------------- (W)
2R L
)
(s
t
c
u
Therefore, the average current delivered by the supply voltage is:
Equation 1
d
o
r
P
e
t
e
l
o
V peak
I CC AVG = 2 ----------------- (A)
πR L
s
b
O
The power delivered by the supply voltage is:
Psupply = VCC ICC AVG (W)
Therefore, the power dissipated by each amplifier is:
Pdiss = Psupply - Pout (W)
Equation 2
2 2V CC
P diss = ---------------------- P out – P out
π RL
17/25
Application information
TS4974
and the maximum value is obtained when:
∂Pdiss
--------------------- = 0
∂P out
and its value is:
Equation 3
Pdiss max =
Note:
2 Vcc 2
π2RL
(W)
This maximum value is only dependent on the power supply voltage and load
values.
)
s
(
ct
The efficiency is the ratio between the output power and the power supply:
Equation 4
P out
πV peak
η = ------------------- = -------------------P supply
4V CC
u
d
o
r
P
e
The maximum theoretical value is reached when Vpeak = VCC, so:
t
e
l
o
π
η = ----- = 78.5%
4
)
(s
s
b
O
The maximum die temperature allowable for the TS4974 is 125°C. However, in case of
overheating, a thermal shutdown set to 150° C, puts the TS4974 in standby until the
temperature of the die is reduced by about 5° C.
t
c
u
d
o
r
To calculate the maximum ambient temperature Tamb allowable, you need to know:
P
e
●
●
t
e
l
o
●
s
b
O
Power supply voltage value, VCC
Load resistor value, RL
The package type, RTHJA
Example: VCC=5 V, RL=8 Ω, RTHJAflip-chip=80° C/W (125 mm2 copper heatsink).
Using the power dissipation formula given above in Equation 3 this gives a result of:
Pdissmax = 633mW
Tamb is calculated as follows:
Equation 5
T amb = 125° C – R TJHA × P dissmax
Therefore, the maximum allowable value for Tamb is:
Tamb = 125-80x0.633 = 74.3°C
18/25
TS4974
4.4
Application information
Decoupling of the circuit
Two capacitors are needed to correctly bypass the TS4974. A power supply bypass
capacitor CS and a bias voltage bypass capacitor Cb.
CS has particular influence on the THD+N in the high frequency region (above 7 kHz) and
an indirect influence on power supply disturbances. With a value for CS of 1 µF, you can
expect similar THD+N performance to that shown in the datasheet.
In the high frequency region, if CS is lower than 1 µF, it increases the THD+N, and
disturbances on the power supply rail are less filtered.
On the other hand, if CS is higher than 1 µF, the disturbances on the power supply rail are
more filtered.
)
s
(
ct
Cb has an influence on THD+N at lower frequencies, but its function is critical to the final
result of PSRR (with input grounded and in the lower frequency region).
4.5
u
d
o
Wake-up time (tWU)
r
P
e
When the standby is released to put the device ON, the bypass capacitor Cb is not charged
immediately. As Cb is directly linked to the bias of the amplifier, the bias will not work
properly until the Cb voltage is correct. The time to reach this voltage is called the wake-up
time or tWU and is specified in the tables in Section 3: Electrical characteristics on page 5,
with Cb=1 µF. During the wake-up phase, the TS4974 gain is close to zero. After the wakeup time, the gain is released and set to its nominal value.
t
e
l
o
s
b
O
If Cb has a value other than 1 µF, refer to Figure 40 to establish the wake-up time.
)
(s
Figure 40. Startup time vs. bypass capacitor
r
P
e
t
e
l
o
s
b
O
4.6
15
Startup Time (ms)
od
t
c
u
Tamb=25°C
Vcc=5V
10
Vcc=2.6V
Vcc=3.3V
5
0
0,4
0,8
1,2
1,6
Bypass Capacitor Cb (μF)
2,0
Shutdown time
When the standby command is set, the time required to put the two output stages in high
impedance and the internal circuitry in shutdown mode is a few microseconds.
Note:
In shutdown mode, the Bypass pin and Vin+, Vin- pins are short-circuited to ground by
internal switches. This allows a quick discharge of Cb and Cin capacitors.
19/25
Application information
4.7
TS4974
Pop performance
Due to its fully differential structure, the pop performance of the TS4974 is close to perfect.
However, due to mismatching between internal resistors Rin, Rfeed, and external input
capacitors Cin, some noise might remain at startup. To eliminate the effect of mismatched
components, the TS4974 includes pop reduction circuitry. With this circuitry, the TS4974 is
close to zero pop for all possible common applications.
In addition, when the TS4974 is in standby mode, due to the high impedance output stage in
this configuration, no pop is heard.
4.8
Single-ended input configuration
)
s
(
ct
It is possible to use the TS4974 in a single-ended input configuration. The schematic in
Figure 41 shows an example of this configuration.
u
d
o
Figure 41. Typical single-ended input application
Volume UP
S1
VCC
7
6
DOWN
-O
Cs
Rpd1
Rpd1
470k
470k
1µF
DIGITAL VOLUME
CONTROL
Cin1
1
Vin-
2
Vin+
3
BYP ASS
Vout-
9
Vout+
8
Speaker
330nF
Cin2
+
8 Ohms
330nF
BIAS
Cb
1µF
STBY
STBY
TS4974 DFN10
GND
b
O
let
o
s
b
4
so
e
t
e
l
P1
470k
5
o
r
P
470k
UP
U1
Vin
Rpu2
S2
)
s
(
t
c
u
d
Rpu1
10
Volume DOWN
r
P
e
VCC
Vcc
VCC
STBY control
4.9
Volume setting
The TS4974 features a digital volume control with an internal gain range of -33 dB up to
+12 dB, by steps of 3 dB. When the device is powered up from VCC (and not from the
standby pin), an initial gain of -12dB is internally fixed. When standby mode is activated, the
gain value is memorized and held until standby is released.
20/25
TS4974
Application information
The volume is controlled by means of two pins, UP/DVC and DOWN/DVC. When the VIL
voltage is applied, it activates the increase or decrease in gain. When one of the input pins
is grounded, volume changing is activated. When both volume UP and DOWN functions are
activated at the same time, there is no effect on the volume.
The UP/DVC and DOWN/DVC inputs need to be pulled-up or pulled-down, so a pair of
external pull-up or pull-down resistors are required. When pull-up resistors are used, it is
dependent on the application which values of resistors you should choose in the range from
10kΩ to 1MΩ. The current flowing through the switch S1 or S2 during volume changing is
adjusted by the value of the pull-up resistors.
When pull-down resistors are used, the values are chosen in the range from at least 430kΩ
to 1MΩ (a value 470kΩ is recommended). Typically, in this case a 10µA current flows through
the switch S1 or S2 during volume changing.
)
s
(
ct
Table 2 on page 3 indicates the values of the VU/D voltages required to activate an increase
or decrease in volume. The volume can also be controlled by a microcontroller. In this case,
transistors can be used as switches for grounding the UP/DVC and DOWN/DVC pins.
u
d
o
The TS4974 integrates a debouncing system which does not take into account UP or
DOWN pulses that are shorter than the tdebounce time. In addition, an autorepeat function is
implemented. When a continuous voltage is applied to the UP or DOWN pin, the gain is
continuously increased or decreased after a certain time called tautorepeat. The first period of
each autorepeat sequence is longer (tautorepeat x 1.5) to avoid any parasitic activation. In this
mode, the time trange is necessary to cover the whole gain range of the device.
r
P
e
t
e
l
o
s
b
O
Figure 42 explains the meaning of the debounce, autorepeat and range times (respectively
tdebounce, tautorepeat and trange). It shows how the volume increases over the whole volume
range from the minimum gain -33 dB to the maximum gain +12 dB by 3 dB steps.
)
(s
Figure 42. Example of volume change
t
c
u
Gain
(dB)
d
o
r
tautorepeat
G=+12dB
1.5 x tautorepeat
P
e
t
e
l
o
s
b
O
G=3dB
G=-33dB
Time
VUP
Time
tdebounce
trange
21/25
Application information
4.10
TS4974
Notes on PSRR measurement
What is the PSRR?
The PSRR is the power supply rejection ratio. The PSRR of a device is the ratio between a
power supply disturbance and the result on the output. In other words, the PSRR is the
ability of a device to minimize the impact of power supply disturbance to the output.
How is the PSRR measured?
The PSRR is measured as shown in Figure 43.
Figure 43. PSRR measurement
VCC
Volume DOWN
S1
Rpu1
Rpu2
470k
470k
u
d
o
Vripple
Volume UP
)
s
(
ct
VCC
S2
Pr
Vcc
470k
470k
10
Rpd1
Vcc
6
DOWN
7
s
b
O
e
t
e
ol
UP
U1
Rpd1
DIGITAL VOLUME
CONTROL
)
(s
Cin1
t
c
u
l
o
s
b
O
9
2
Vin+
Vout+
8
3
BYP ASS
RL
8 Ohms
+
330nF
10 Ohms
BIAS
Cb
1µF
STBY
STBY
TS4974 DFN10
GND
ete
Pr
Vout-
5
od
Vin-
4
10 Ohms
330nF
Cin2
1
STBY control
Principles of operation
●
The DC voltage supply (VCC) is fixed
●
The AC sinusoidal ripple voltage (Vripple) is fixed
●
No bypasss capacitor Cs is used
The PSRR value for each frequency is calculated as:
RMS ( Output )
PSRR = 20 × Log --------------------------------- ( dB )
RMS ( Vripple )
RMS is an rms selective measurement.
22/25
TS4974
5
Package information
Package information
In order to meet environmental requirements, STMicroelectronics offers these devices in
ECOPACK® packages. These packages have a Lead-free second level interconnect. The
category of second level interconnect is marked on the package and on the inner box label,
in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an STMicroelectronics
trademark. ECOPACK specifications are available at: www.st.com.
Table 8.
DFN10 3x3 exposed pad package mechanical data
Dimensions
Ref.
Millimeters
Min.
Typ.
Max.
Min.
0.80
0.90
1.00
31.5
A1
0.02
0.05
A2
0.70
A3
0.20
A
b
0.18
0.23
D
3.00
D2
2.21
2.26
)
(s
E
3.00
1.49
e
du
ct
E2
L
e
t
e
ol
o
r
P
0.3
1.64
0.30
s
b
O
e
t
e
ol
2.31
1.74
7.1
87.0
Typ.
Pr
u
d
o
35.4
0.8
Max.
39.4
2.0
25.6
7.9
9.1
11.8
118.1
89.0
91.0
118.1
58.7
0.50
0.4
)
s
(
ct
Mils
64.6
68.5
19.7
0.5
11.8
15.7
19.7
s
b
O
23/25
Ordering information
6
TS4974
Ordering information
Table 9.
Order codes
Temperature
range
Package
Packing
Marking
-40° C to +85° C
DFN10
Tape & reel
A74
Part number
TS4974IQT
7
Revision history
Changes
Revision
1-Nov-2005
1
Mechanical data updated for DFN10 package.
1-Oct-2006
2
Preliminary data.
25-Oct-2006
3
Final datasheet.
4
Updated Figure 1, Figure 41, and Figure 43.
Added Table 3.
Modified Section 4.9 on page 20 to add information on pull-up and
pull-down resistors.
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