LOW EMI CLOCK GENERATOR MK5814C Description Features

LOW EMI CLOCK GENERATOR MK5814C Description Features
DATASHEET
MK5814C
LOW EMI CLOCK GENERATOR
Description
Features
The MK5814C device generates a low EMI output clock
from a clock or crystal input. The device is designed to
dither a high emissions clock to lower EMI in consumer
applications. Using IDT’s proprietary mix of analog and
digital Phase Locked Loop (PLL) technology, the device
spreads the frequency spectrum of the output and reduces
the frequency amplitude peaks by several dB. The
MK5814C offers both centered and down spread from a
high-speed clock input. The multiplier is a fixed 4x.
•
•
•
•
Packaged in 8-pin SOIC
•
•
•
•
•
Input frequency range of 4 to 32 MHz with spread off
For different multiplier configurations, use the MK5811C
(1x) or MK5812 (2x).
IDT offers many other clocks for computers and computer
peripherals. Consult IDT when you need to remove crystals
and oscillators from your board.
Provides a spread spectrum output clock
Supports printers and flat panel controllers
Accepts a clock or crystal input (provides same
frequency dithered output)
Input frequency range of 4 to 25 MHz with spread on
4X frequency multiplication
Center spread, down spread, and spread off settings
Peak reduction by 8 dB to 16 dB typical on 3rd through
19th odd harmonics
• Operating voltage of 3.3 V
• Advanced, low-power CMOS process
Block Diagram
VDD
S1:0
2
Spread Direction
PLL Clock
Synthesis
and Spread
Spectrum
Circuitry
FRSEL
X1/CLK
SSCLK
Clock Buffer/
Crystal
Ocsillator
X2
The crystal requires external capacitors
for accurate tuning of the clock
IDT® LOW EMI CLOCK GENERATOR
GND
1
MK5814C
REV C 070612
MK5814C
LOW EMI CLOCK GENERATOR
SSCG
Pin Assignment
X1/ICLK
Spread Direction and Spread
Percentage
1
8
X2
GND
2
7
VDD
S1
3
6
FRSEL
S0
4
5
SSCLK
8-pin (150 mil) SOIC
S1
Pin 3
S0
Pin 4
Spread
Direction
Spread
Percentage
0
0
0
M
M
M
1
1
1
0
M
1
0
M
1
0
M
1
Center
Center
Center
Center
No Spread
Down
Down
Down
Down
±1.4
±1.1
±0.6
±0.5
-1.6
-2.0
-0.7
-3.0
0 = connect to GND
M = unconnected (floating)
1 = connect directly to VDD
Frequency Selection
Product
FRSEL
(pin 6)
Input
Freq. Range
Multiplier
Output
Freq. Range
MK5811C1
0
4.0 to 8.0 MHz
X1
4.0 to 8.0 MHz
1
8.0 to 16.0MHz
X1
8.0 to 16.0MHz
M
16.0 to 32.0MHz
X1
16.0 to 32.0MHz
0
4.0 to 8.0 MHz
X2
8.0 to 16.0MHz
1
8.0 to 16.0MHz
X2
16.0 to 32.0MHz
M
16.0 to 32.0MHz
X2
32.0 to 64.0MHz
0
4.0 to 8.0 MHz
X4
16.0 to 32.0MHz
1
8.0 to 16.0MHz
X4
32.0 to 64.0MHz
M
16.0 to 32.0MHz
X4
64.0 to 128MHz
MK58121
MK5814C
0 = connect to GND
M = unconnected (floating)
1 = connect directly to VDD
Note 1: The information in this datasheet does not apply to
the MK5811C and MK5812 as each have independent
datasheets available at www.idt.com.
IDT® LOW EMI CLOCK GENERATOR
2
MK5814C
REV C 070612
MK5814C
LOW EMI CLOCK GENERATOR
SSCG
Pin Descriptions
Pin
Number
Pin
Name
Pin Type
Pin Description
1
X1/ICLK
Input
Connect to 4-32 MHz crystal or clock input.
2
GND
Power
Connect to ground.
3
S1
Input
Function select 1 input. Selects spread amount and direction per table above.
(default-internal mid-level).
4
S0
Input
Function select 0 input. Selects spread amount and direction per table above.
(default-internal mid-level).
5
SSCLK
Output
6
FRSEL
Input
Function select for input frequency range. Default to mid-level “M”.
7
VDD
Power
Connect to +3.3 V.
8
X2
XO
Clock output with Spread spectrum
Crystal connection to 4-32 MHz crystal. Leave unconnected for clock
External Components
PCB Layout Recommendations
For optimum device performance and lowest output phase
noise, observe the following guidelines:
The MK5814C requires a minimum number of external
components for proper operation.
1) Mount the 0.01µF decoupling capacitor on the
component side of the board as close to the VDD pin as
possible. No vias should be used between the decoupling
capacitor and VDD pin. The PCB trace to the VDD pin and
the PCB trace to the ground via should be kept as short as
possible.
Decoupling Capacitor
A decoupling capacitor of 0.01µF must be connected
between VDD and GND on pins 7 and 2. Connect the
capacitor as close to these pins as possible. For optimum
device performance, mount the decoupling capacitor on the
component side of the PCB. Avoid the use of vias in the
decoupling circuit.
2) To minimize EMI, place the 33Ω series-termination
resistor (if needed) close to the clock output.
Series Termination Resistor
3) An optimum layout is one with all components on the
same side of the board, thus minimizing vias through other
signal layers. Other signal traces should be routed away
from the MK5814C device. This includes signal traces
located underneath the device, or on layers adjacent to the
ground plane layer used by the device.
Use series termination when the PCB trace between the
clock output and the load is over 1 inch. To series terminate
a 50Ω trace (a commonly used trace impedance), place a
33Ω resistor in series with the clock line. Place the resistor
as close to the clock output pin as possible. The nominal
impedance of the clock output is 20Ω.
Tri-level Select Pin Operation
The S1 and S0 select pins are tri-level, meaning that they
have three separate states to make the selections shown in
the table on page 2. To select the M (mid) level, the
connection to these pins must be eliminated by either
floating them originally, or tri-stating the GPIO pins which
drive the select pins.
IDT® LOW EMI CLOCK GENERATOR
3
MK5814C
REV C 070612
MK5814C
LOW EMI CLOCK GENERATOR
SSCG
Crystal Information
Modulation Rate
The crystal used should be a fundamental mode (do not use
third overtone), parallel resonant crystal. To optimize the
initial accuracy, connect crystal capacitors from pins X1 to
ground and X2 to ground. The value of these capacitors is
given by the following equation:
Spread Spectrum Clock Generators utilize frequency
modulation (FM) to distribute energy over a specific band of
frequencies. The maximum frequency of the clock (fmax)
and minimum frequency of the clock (fmin) determine this
band of frequencies. The time required to transition from
fmin to fmax and back to fmin is the period of the Modulation
Rate. The Modulation Rate of SSCG clocks are generally
referred to in terms of frequency, or
Crystal caps (pF) = (CL - 6) x 2
In the equation, CL is the crystal load capacitance. For
example, a crystal with a 16 pF load capacitance uses two
20 pF [(16-6) x 2] capacitors.
fmod = 1/Tmod
The input clock frequency, fin, and the internal divider
determine the Modulation Rate.
Spread Spectrum Profile
The Spread Spectrum modulation Rate, fmod, is given by
the following formula:
The MK5814C is a low EMI clock generator using a
optimized frequency slew rate algorithm to facilitate down
stream tracking of zero delay buffers and other PLL devices.
fmod = fin/DR
where; fmod is the Modulation Rate, fin is the Input
Frequency and DR is the Divider Ratio as given in the
“Modualtion Rate Divider Ratios” table. Notice that Input
Frequency Range is set by FRSEL
Modulation Rate
Frequency
Modulation Rate Divider Ratios
Time
IDT® LOW EMI CLOCK GENERATOR
4
FRSEL
Input Freq. Range
Divider Ratio (DR)
0
4 to 8 MHz
128
1
8 to 16 MHz
256
M
16 to 32 MHz
512
MK5814C
REV C 070612
MK5814C
LOW EMI CLOCK GENERATOR
SSCG
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the MK5814C. These ratings, which are
standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device, at
these or any other conditions, above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range.
Item
Rating
Supply Voltage, VDD
7V
All Inputs and Outputs
-0.5 V to VDD+0.5 V
Ambient Operating Temperature
0 to +85° C
Storage Temperature
-65 to +150° C
Junction Temperature
125° C
Soldering Temperature
260° C
Recommended Operation Conditions
Parameter
Min.
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
IDT® LOW EMI CLOCK GENERATOR
5
Typ.
Max.
Units
0
+85
°C
+3.0
3.63
V
MK5814C
REV C 070612
MK5814C
LOW EMI CLOCK GENERATOR
SSCG
DC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V ±10%, Ambient Temperature 0 to +85° C
Parameter
Symbol
Operating Voltage
VDD
Supply Current
IDD
Input High Voltage
Conditions
Min.
Typ.
Max.
Units
3.0
3.3
3.63
V
23
25
mA
No load, at 3.3 V, Fin=24 MHz
30
mA
No load, at 3.3 V, Fin=32 MHz
35
mA
No load, at 3.3 V, Fin=12 MHz
VIH
0.85VDD
VDD
VDD
V
VIHM
0.4VDD
0.5VDD
0.6VDD
V
Input Low Voltage
VIL
0.0
0.0
0.15VDD
V
Output High Voltage
VOH
CMOS, IOH = -4 mA
2.4
V
Output High Voltage
VOH
IOH = -6 mA
2.0
V
Output Low Voltage
VOL
IOL = -4 mA
0.4
V
IOL = -10 mA
1.2
V
Input Middle Voltage
Input Capacitance
CIN1
S0, S1, FRSEL pins
4
6
pF
CIN2
X1, X2 pins
6
9
pF
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V ±10%, Ambient Temperature 0 to +85° C, CL = 15 pF
Parameter
Symbol
Conditions
Min.
Typ.
Max. Units
Input Clock Frequency
S1, S0 = ANY VALUE
4
12
25
MHz
Output Clock Frequency
S1, S0 = ANY VALUE
16
48
100
MHz
Input Clock Frequency
S1, S0 = M, M (spread off)
4
12
32
MHz
Output Clock Frequency
S1, S0 = M, M (spread off)
16
48
128
MHz
Input Clock Duty Cycle
Time above VDD/2
40
60
%
Output Clock Duty Cycle
Time above 1.5 V
45
50
55
%
Fin=16 MHz, Fout=32 MHz
250
380
ps
Fin=32 MHz, Fout=128 MHz
250
380
ps
Cycle-to-cycle
Jitter1
Cycle-to-cycle Jitter
1
Output Rise Time
Output Fall Time
tR
FSEL=M, 0.4 to 2.4 V
0.8
2.2
ns
tR
FSEL=1,0; 0.4 to 2.4 V
1.0
2.2
ns
tF
FSEL=M, 0.4 to 2.4 V
0.8
2.2
ns
tF
FSEL=1,0; 0.4 to 2.4 V
1.0
2.2
ns
EMI Peak Frequency Reduction
8 to 16
dB
Note 1: Spread is enabled.
IDT® LOW EMI CLOCK GENERATOR
6
MK5814C
REV C 070612
MK5814C
LOW EMI CLOCK GENERATOR
SSCG
Thermal Characteristics for 8-pin SOIC
Parameter
Symbol
Thermal Resistance Junction to
Ambient
Conditions
Min.
Max. Units
θJA
Still air
150
° C/W
θJA
1 m/s air flow
140
° C/W
θJA
3 m/s air flow
120
° C/W
40
° C/W
θJC
Thermal Resistance Junction to Case
Typ.
Characteristic Curves
The following curves determine the characteristic behavior of the MK5814C when tested over a number of
environmental and application-specific parameters. These are typical performance curves and are not meant to
replace any parameter specified in DC and AC Characteristics tables.
Jitter vs Input frequency (No Load)
Bandwidth % vs Temperature
2.95
600
2.75
BW %
CCJ (ps)
500
400
300
200
2.55
2.35
2.15
1.95
100
1.75
0
4
8
12
16
20
24
28
-40
32
-25
-10
5
20
35
Input Frequency (MHz)
6MHz
IDD vs Frequency (FRSEL=0,1,M)
20
BW (%)
IDD (mA)
25
15
10
5
0
4.5
5
5.5
6
6.5
7
7.5
8
FRSEL=1
IDT® LOW EMI CLOCK GENERATOR
80
95
110
125
32MHz
3
2.9
2.8
2.7
2.6
2.5
2.4
2.3
2.2
2.1
2
1.9
1.8
2.8
Frequency (MHz), no load normalized to FRSEL=0, (4-8MHz)
FRSEL=0
65
Bandwidth % vs VDD
30
4
50
Temp (C)
2.9
3
3.1
3.2
3.3
3.4
3.5
3.6
3.7
VDD (volts)
FRSEL=M
4.0MHz
7
8MHz
MK5814C
REV C 070612
MK5814C
LOW EMI CLOCK GENERATOR
SSCG
SSCG Profiles
.
Min: 47.29 MHz
Max: 48.80 MHz
Min: 94.73 MHz
Max: 97.32 MHz
Rate: 46.92 kHz
Pk-Pk Jitter: 220 ps
Rate: 46.87 kHz
Pk-Pk Jitter: 190 ps
Xin = 12.0 MHz
SSCLK1 = 48.0 MHz
Xin = 24.0 MHz
SSCLK1 = 96.0 MHz
S1, S0 = 0
S1, S0 = 0
FRSEL = 1
FRSEL = M
P/N = MK5814C
P/N = MK5814C
Application Schematic
VDD
C3
7
VDD
C2
27 pF
C1
0.1 uF
1
SSCLK
Y1
25 MHz
8
27 pF
MK5811C
MK5812
MK5814C
S1
N/C
6
FRSEL
S0
5
25 MHz (MK5811C)
50 MHz (MK5812)
100 MHz (MK5814C)
3
4
GND
2
IDT® LOW EMI CLOCK GENERATOR
8
MK5814C
REV C 070612
MK5814C
LOW EMI CLOCK GENERATOR
SSCG
Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Body)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters
8
Symbol
E
Min
A
A1
B
C
D
E
e
H
h
L
α
H
INDEX
AREA
1 2
D
A
Inches
Max
Min
1.35
1.75
0.10
0.25
0.33
0.51
0.19
0.25
4.80
5.00
3.80
4.00
1.27 BASIC
5.80
6.20
0.25
0.50
0.40
1.27
0°
8°
Max
.0532
.0688
.0040
.0098
.013
.020
.0075
.0098
.1890
.1968
.1497
.1574
0.050 BASIC
.2284
.2440
.010
.020
.016
.050
0°
8°
h x 45
A1
C
-Ce
B
SEATING
PLANE
L
.10 (.004)
C
Ordering Information
Part / Order Number
Marking
Shipping Packaging
Package
Temperature
MK5814CMLF
MK5814CMLFT
5814CL
5814CL
Tubes
Tape and Reel
8-pin SOIC
8-pin SOIC
0 to +85° C
0 to +85° C
Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant.
While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology Inc. (IDT)
assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from
its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other
applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are
not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT
does not authorize or warrant any IDT product for use in life support devices or critical medical instruments.
IDT® LOW EMI CLOCK GENERATOR
9
MK5814C
REV C 070612
MK5814C
LOW EMI CLOCK GENERATOR
SSCG
Revision History
Rev.
Date
Originator
C
07/06/12
RDW
IDT® LOW EMI CLOCK GENERATOR
Description of Change
1. Max input frequency when using spread reduced from 32MHz to 25MHz.
2. Max output when using spread correspondingly reduced to 100MHz.
10
MK5814C
REV C 070612
MK5814C
LOW EMI CLOCK GENERATOR
SSCG
Innovate with IDT and accelerate your future networks. Contact:
www.IDT.com
For Sales
For Tech Support
800-345-7015
408-284-8200
Fax: 408-284-2775
www.idt.com/go/clockhelp
Corporate Headquarters
Integrated Device Technology, Inc.
www.idt.com
© 2012 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device
Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered
trademarks used to identify products or services of their respective owners.
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