California Eastern Laboratories UPC3211GR AGC AMPLIFIER

California Eastern Laboratories UPC3211GR AGC AMPLIFIER
PRELIMINARY DATA SHEET
D
AGC AMPLIFIER UPC3211GR
INTERNAL BLOCK DIAGRAM
FEATURES
• WIDE GAIN CONTROL RANGE: 55 dB (TYP)
NC 1
20
UE
• LOW DISTORTION:
IM3 = 57 dBc (TYP) at POUT = -10 dBm
VAGC 2
IM2 = 44 dBc (TYP) at POUT = -10 dBm
• SUPPLY VOLTAGE: 9 V
• PACKAGED IN 20 PIN SSOP SUITABLE FOR HIGHDENSITY SURFACE MOUNT
DESCRIPTION
Cont.
19
AGCIN1
GND 3
18
GND
GND 4
17
AGCIN2
VCC1 5
16
GND
15
PSAVE
GND 7
14
PA BIAS
GND 8
13
GND
GND 9
12
OUT1
11
OUT2
VCC2 6
REG
IN
The UPC3211GR is a Silicon RFIC designed as an AGC
amplifier for digital CATV return path applications. This IC
consists of an AGC amplifier with 55 dB gain control range which
is packaged in a 20 pin SSOP.
NT
NEC's stringent quality assurance and test procedures ensure
the highest reliability and performance.
NC
REG BYPASS 10
ELECTRICAL CHARACTERISTICS (TA = 25°C, VCC = 9 V, VAGC = 0 V, VPS = 9 V, unless otherwise specified)
PART NUMBER
PACKAGE OUTLINE
UNITS
MIN
TYP
MAX
Circuit Current (no input signal), VAGC = 0 V
VAGC = 3 V
PARAMETERS AND CONDITIONS
mA
mA
29
38
43
51
Circuit Current in Power Save Mode (no input signal), VPS = 0 V1
mA
SC
O
SYMBOLS
ICC
ICC(PS)
GMAX
UPC3211GR
S20
Maximum
Gain2
Range2,
VAGC = 0 to 3 V
3
dB
14
dB
47
16
18
55
Gain Control
Gain Flatness, fIN = 5 to 100 MHz, 6 MHz Bandwidth
PSAT
Saturated Output Power, PIN = -5 dBm
ISOL
Isolation in Sleep Mode, VPS = 0 V1
dB
IM2
2nd Order Intermodulation Level, fIN1 = 65 MHz, fIN2 = 66.8 MHz,
POUT = -10 dBm
dBc
44
40
IM3
3rd Order Intermodulation Level, fIN1 = 65 MHz, fIN2 = 66.8 MHz,
POUT = -10 dBm
dBc
57
50
Noise Figure, fIN = 65 MHz
dB
10
dBm
+16
DI
GCR
GFLAT
NF
OIP3
Output 3rd Order Intercept Point, fIN1 = 65 MHz, fIN2 = 66.8 MHz
dB
±0.1
dBm
+5
60
65
TPS (RISE)
Power Save Rise Time, VPS(OFF) → VPS(ON)
µs
200
TPS (FALL)
Power Save Fall Time, VPS(ON) → VPS(OFF)
mS
1.7
Notes:
1. Bias VPS through a 5 kΩ Resistor.
2. fIN = 65 MHz, PIN = -20 dBm.
California Eastern Laboratories
UPC3211GR
ABSOLUTE MAXIMUM RATINGS1 (TA = 25°C)
UNITS
RATINGS
V
11.0
SYMBOLS
Voltage3
V
11.0
VCC
Supply Voltage
V
8.0
AGC Control Voltage
V
3.6
VPS
Power Save Voltage
V
0
–
10.0
mW
500
VAGC
AGC Control Voltage
V
0
–
3.3
Supply Voltage
Power Save
VPS
VAGC
PD
Power Dissipation2
TA
Operating Ambient Temp.
°C
-40 to +75
TSTG
Storage Temp. Range
°C
-55 to +150
PIN(MAX)
Maximum Input Level
dBm
+5
CIRCUIT CURRENT vs.
SUPPLY VOLTAGE
Operating Ambient Temp.
°C
-40
Input Frequency
MHz
5
–
100
Maximum Input Level
dBm
–
–
0
CIRCUIT CURRENT vs.
POWER SAVE VOLTAGE
50
40
Circuit Current, ICC (mA)
NT
Circuit Current, ICC (mA)
35
40
30
20
10
30
25
20
15
10
SC
O
5
No Input Signal
VCC = 9 V
No Input Signal
0
2
4
6
8
10
0
12
2
4
6
8
10
Supply Voltage, VCC (V)
Power Save Voltage, VPS (V)
CIRCUIT CURRENT vs.
AGC VOLTAGE
PA BIAS VOLTAGE vs.
SUPPLY VOLTAGE
45
12
3
2.5
41
40
39
38
PA Bias Voltage (V)
43
DI
Circuit Current, ICC (mA)
44
42
2
1.5
1
37
36
0.5
0
0.5
1
1.5
2
No Input Signal
VCC = 9 V
VAGC = 0 V
No Input Signal
VCC = 9 V
35
2.5
AGC Voltage, VAGC (V)
3
3.5
9.0 10.0
fIN
IN
TYPICAL PERFORMANCE CURVES (TA = 25°C)
UNITS MIN TYP MAX
TA
PIN(MAX)
Notes:
1. Operation in excess of any one of these conditions may
result in permanent damage.
2. TA = 75°C Mounted on a 50x50x1.6 mm double epoxy glass
board.
3. Bias VPS through 5 k Ω resistor.
PARAMETERS
D
PARAMETERS
VCC
UE
SYMBOLS
RECOMMENDED
OPERATING CONDITIONS
0
2
4
6
8
Supply Voltage, VCC (V)
10
12
+25 +75
UPC3211GR
TYPICAL PERFORMANCE CURVES (TA = 25°C)
GAIN vs.
INPUT FREQUENCY
GAIN vs. INPUT FREQUENCY
AND SUPPLY VOLTAGE
20
-20
PIN = -20 dBm
VAGC = 3 V
D
18
Gain (dB)
16
14
-40
UE
Gain (dB)
-30
-50
12
VCC = 8 V
VCC = 9 V
VCC = 10 V
VCC = 8 to 10 V
PIN = -20 dBm
VAGC = 0 V
10
-60
0
20
40
60
80
100
0
80
100
OUTPUT POWER vs. INPUT
POWER AND SUPPLY VOLTAGE
20
10
fIN = 65 MHz
PIN = -20 dBm
fIN = 65 MHz
VAGC = 0 V
0
-10
-20
-30
VCC = 8 V
VCC = 9 V
VCC = 10 V
SC
O
-40
-50
0
0.5
1
5
NT
Output Power, POUT (dBm)
10
Gain (dB)
60
Input Frequency, fIN (MHz)
GAIN vs. AGC VOLTAGE
AND SUPPLY VOLTAGE
1.5
2
2.5
3
0
-5
-10
-15
VCC = 8 V
VCC = 9 V
VCC = 10 V
-20
3.5
-30
-25
-20
-15
-10
-5
0
AGC Voltage, VAGC (V)
Input Power, PIN (dBm)
OUTPUT POWER vs. INPUT
POWER AND AGC VOLTAGE
NOISE FIGURE vs. INPUT FREQUENCY
AND SUPPLY VOLTAGE
12
20
fIN = 65 MHz
VAGC = 0 V
VAGC = 0 V
-20
VAGC = 1.1 V
VAGC = 1.5 V
-40
VAGC = 2.2 V
Noise Figure, NF (dB)
0
DI
Output Power, POUT (dBm)
40
IN
Input Frequency, fIN (MHz)
20
11
10
9
-60
VCC = 8 V
VCC = 9 V
VCC = 10 V
VCC = 9 V
fIN = 65 MHz
VAGC = 3 V
8
-80
-30
-25
-20
-15
-10
Input Power, PIN (dBm)
-5
0
0
20
40
60
80
Input Frequency, fIN (MHz)
100
UPC3211GR
STANDARD PERFORMANCE CURVES (TA = 25°C)
2ND ORDER INTERMODULATION LEVEL
AND OUTPUT POWER vs. INPUT POWER
20
10
0
POUT
-10
-20
IM3
-30
-50
-60
VCC = 9 V
fIN1 = 65 MHz
fIN2 = 66.8 MHz
VAGC = 0 V
-70
-80
-40
-30
-20
-10
0
POUT
-10
-20
IM2
-30
-40
-50
-60
VCC = 9 V
fIN1 = 65 MHz
fIN2 = 66.8 MHz
VAGC = 0 V
-70
-80
-40
-30
-20
IN
CIRCUIT CURRENT vs.
TEMPERATURE
GAIN vs. INPUT FREQUENCY
AND TEMPERATURE
50
20
VCC = 9 V
PIN = -20 dBm
VAGC = 0 V
VAGC = 3 V
40
NT
18
VAGC = 0 V
Gain (dB)
30
20
16
14
12
10
TA = -40°C
TA = +25°C
TA = +75°C
No Input Signal
VCC = 9 V
VPS = 9 V
SC
O
0
-50
-25
0
25
50
75
100
Temperature, TA (°C)
GAIN vs.
AGC VOLTAGE AND TEMPERATURE
20
VCC = 9 V
fIN = 65 MHz
PIN = -20 dBm
10
0
-10
DI
Gain (dB)
-10
Input Power, PIN (dBm)
Input Power, PIN (dBm)
Circuit Current, ICC (mA)
10
UE
-40
20
D
2nd Order Intermodulation Level, IM2 (dbc)
Output Power, POUT (dBm)
3rd Order Intermodulation Level, IM3 (dbc)
Output Power, POUT (dBm)
3RD ORDER INTERMODULATION LEVEL
AND OUTPUT POWER vs. INPUT POWER
-20
-30
TA = -40°C
TA = +25°C
TA = +75°C
-40
-50
0
0.5
1
1.5
2
2.5
AGC Voltage, VAGC (V)
3
3.5
10
0
20
40
60
80
Input Frequency, fIN (MHz)
100
UPC3211GR
STANDARD PERFORMANCE CURVES (TA = 25°C)
INPUT IMPEDANCE (PIN 19)
3
4
2
UE
3
D
OUTPUT IMPEDANCE (PIN 11)
1
Stop 100 MHz
533.6 Ω
-16.4 Ω
515.2 Ω
-81.4 Ω
493.7 Ω
-123.3 Ω
455.9 Ω
-190.3 Ω
TA = 25°C
VCC = 9 V
PIN = -20 dBm
DI
SC
O
NT
TA = 25°C
VCC = 9 V
PIN = -20 dBm
Start 5 MHz Stop 100 MHz
∆ 1: 5 MHz
9.779 Ω
-2.306 Ω
∆ 2: 40 MHz
10.066 Ω
3.033 Ω
∆ 3: 65 MHz
10.574 Ω
5.237 Ω
∆ 4: 100 MHz
11.88 Ω
7.805 Ω
IN
Start 0.1 MHz
∆ 1: 5 MHz
∆ 2: 40 MHz
∆ 3: 65 MHz
∆ 4: 100 MHz
UPC3211GR
PIN FUNCTIONS
Pin No.
Symbol
Pin
Voltage
(V)
1
NC
–
2
VAGC
0 to 3
Automatic gain control pin. VAGC Up = Gain Down.
3
GND
0
Differential amp ground pins. These pins must be
connected to system ground. Form ground
pattern as wide as possible to minimize ground
impedance.
5
VCC1
9.0
Supply voltage pin for the AGC amp. This pin
should be connected with a bypass capacitor to
minimize ground impedance.
6
VCC2
9.0
Supply voltage pin for the differential amp and
output block. This pin should be connected with a
bypass capacitor to minimize ground impedance.
7
GND
0
Differential amp ground pins. These pins must be
connected to system ground. Form ground pattern
as wide as possible to minimize ground
impedance.
11
OUT2
D
UE
9
IN
8
REG BYPASS
Equivalent Circuit
No connection. This pin should be left open.
4
10
Description
1.64
Bypass pin of regulator block. This pin should be
bypassed to ground through a capacitor.
6.9
Signal output pins. These are emitter-follower
outputs, which feature low impedance. In case of
single-ended output, the unused pin should be
connected to ground through a load resistor.
OUT1
6.9
13
GND
0
14
PA_BIAS
2.45
This pin provides the base bias voltage to transistors configured as a power amplifier.
15
VPS
9.0
Power save control pin can control the On/Sleep
state with bias as follows:
11 ( 12 )
REG
NT
12
6
SC
O
Output block ground pin. This pin must be
connected to system ground. Form ground
pattern as wide as possible to minimize ground
impedance.
VPS (V)
3-9
0-2
5
15
VPS
5kΩ
14
STATE
ON
SLEEP
It is recommended to use a 5 kΩ in series with this
pin.
16
GND
0
AGC amp ground pin. This pin must be connected
to system ground. Form ground pattern as wide as
possible to minimize ground impedance.
AGCIN2
2.43
Signal input pins. In the case of single-ended
input, bypass the unused pin to ground through a
capacitor.
18
DI
17
5
19
19
AGCIN1
2.43
20
NC
—
No connection. This pin should be left open.
17
UPC3211GR
TYPICAL APPLICATION
LPF
UPC2799GR
UPC1686GV
1st IF
2nd IF
SAW
RFIN
50-750 MHz
RF Return
5-42 MHz
DC-10 MHz
A/D
D
SAW
HPF
UPC2798GR
UE
Video Amp.
DUAL
PLL
Bias
IN
UPC3211GR
QAM
DEMO
&
FEC
Digital
QPSK
Modulator
NT
LPF
SC
O
MEASUREMENT CIRCUIT
20
1
VAGC
0.01 µF
100 pF
100 pF
DI
VCC
0.01 µF
2
Cont.
0.1 µF
AGCIN
19
3
18
4
17
5
16
6
15
0.1 µF
5k
REG
100 pF
7
14
8
13
9
12
10
11
0.01 µF
10 k
AGCOUT1
0.1 µF
0.1 µF
0.1 µF
Note:
1. The pin that is not connected to the 50 Ω test system should be grounded through a 50 Ω resistor.
AGCOUT2
50
Ω1
VPS
UPC3211GR
PACKAGE DIMENSIONS (Units in mm)
PACKAGE OUTLINE S20
11
D
20
1
10
7.00 MAX
UE
N
6.4±0.2
4.4±0.1
1.5 ±0.1
1.0±0.1
+0.10
0.15- 0.05
0.1 ±0.1
IN
1.8 MAX
0.5±0.2
0.65
+0.10
0.22 - 0.05
NT
Note:
1. All dimensions are typical unless otherwise specified.
0.575 MAX
ORDERING INFORMATION
PART NUMBER
UPC3211GR-E1
QUANTITY
2.5 k/Reel
DI
SC
O
Notes:
Embossed tape, 12 mm wide. Pin 1 indicates pull-out direction of
tape.
EXCLUSIVE NORTH AMERICAN AGENT FOR
RF, MICROWAVE & OPTOELECTRONIC SEMICONDUCTORS
CALIFORNIA EASTERN LABORATORIES • Headquarters • 4590 Patrick Henry Drive • Santa Clara, CA 95054-1817 • (408) 988-3500 • Telex 34-6393 • FAX (408) 988-0279
24-Hour Fax-On-Demand: 800-390-3232 (U.S. and Canada only) • Internet: http://WWW.CEL.COM
PRINTED IN USA ON RECYCLED PAPER -11/98
DATA SUBJECT TO CHANGE WITHOUT NOTICE
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