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POWER DRIVER FOR STEPPER MOTORS INTEGRATED CIRCUITS
TMC2660 DATASHEET
Universal, cost-effective stepper driver for two-phase bipolar motors with state-of-the-art features.
coolStep™ load dependent current control for energy savings up to 75%
microPlyer™ microstep interpolation for increased smoothness with coarse step inputs.
spreadCycle™ high-precision chopper for best current sine wave form and zero crossing
Integrated MOSFETs for up to 4 A motor current per coil. With Step/Dir Interface and SPI.
A
PPLICATIONS
Textile, Sewing Machines
Factory Automation
Lab Automation
Liquid Handling
Medical
Office Automation
Printer and Scanner
CCTV, Security
ATM, Cash recycler
POS
Pumps and Valves
Heliostat Controller
CNC Machines
F
EATURES AND
B
ENEFITS
Drive Capability up to 4A motor current
D
ESCRIPTION
Voltage up to 30V DC
Highest Resolution up to 256 microsteps per full step
Compact Size 10x10mm QFP-44 package
The TMC2660 driver for two-phase stepper motors offers an industry-leading feature set, including high-resolution
Low Power Dissipation, very low RDSON & synchronous microstepping, sensorless mechanical load rectification
EMI-optimized programmable slope
Protection & Diagnostics overcurrent, short to GND, overtemperature & undervoltage
stallGuard2™ high precision sensorless motor load detection measurement, load-adaptive power optimization, and low-resonance chopper operation. Standard SPI™ and STEP/DIR interfaces simplify communication.
Integrated power MOSFETs handle motor currents up to 2.2A RMS continuously or
2.8A RMS boost current per coil. Integrated protection and diagnostic features support robust and reliable operation. High integration, high energy efficiency and small form factor enable miniaturized designs with low external component count for cost-effective and highly competitive solutions.
B
LOCK
D
IAGRAM
+V
M
TMC2660
VSA / B
2 Phase
Stepper
VCC_IO
Half Bridge 1
Half Bridge 1
OA1
STEP
S
N
Sine Table
4*256 entry x
OA2
DIR
Chopper
OB1
Half Bridge 2
Half Bridge 2
OB2
BRA / B
RSA / B
CSN
SCK
SDI
SDO
SPI control,
Config & Diags coolStep™
2 x Current
Comparator
R
SENSE
R
SENSE
Protection
& Diagnostics stallGuard2™
2 x DAC
SG_TST
TRINAMIC Motion Control GmbH & Co. KG
Hamburg, Germany
TMC2660 DATASHEET (Rev. 1.06 / 2017-JUN-15) 2
APPLICATION EXAMPLES: SMALL SIZE – BEST PERFORMANCE
The TMC2660 scores with power density, integrated power MOSFETs, and a versatility that covers a wide spectrum of applications and motor sizes, all while keeping costs down. Extensive support at the chips, board, and software levels enables rapid design cycles and fast time-to-market with competitive products.
High energy efficiency from TRINAMIC’s coolStep technology delivers further cost savings in related systems such as power supplies and cooling.
TMC4210+TMC2660-EVAL E
VALUATION
-
BOARD FOR
1
AXIS
Evaluation board system with TMC2660
This evaluation board is a development platform for applications based on the
TMC2660. The board features a USB interface for communication with the TMCL-IDE control software running on a PC. The power
MOSFETs of the TMC2660 support drive currents up to 2.4A RMS and 29V.
The control software provides a user-friendly
GUI for setting control parameters and visualizing the dynamic response of the motor.
Motor movement can be controlled through the Step/Dir interface using inputs from an external source or signals generated by the onboard microcontroller acting as a step generator. Optionally add a motion controller card between CPU board and TMC2660-EVAL.
Top level layout of TMC2660-EVAL
O
RDER
C
ODES
Order code
TMC2660-PA
TMC2660-EVAL
LANDUNGSBRÜCKE
ESELSBRÜCKE
Description
coolStep™ driver with internal MOSFETs, up to 30V DC,
QFP-44 with 12x12 pins
Evaluation board for TMC2660.
Baseboard for TMC2660-EVAL and further evaluation boards
Connector board for plug-in evaluation board system www.trinamic.com
Size [mm²]
10 x 10
85 x 55
85 x 55
61 x 38
TMC2660 DATASHEET (Rev. 1.06 / 2017-JUN-15)
T
ABLE OF
C
ONTENTS
1 PRINCIPLES OF OPERATION ............... 4
............................................... 4
.................................... 5
........................................ 5
PIN ASSIGNMENTS ................................. 6
......................................... 6
.................................. 6
INTERNAL ARCHITECTURE .................... 8
STALLGUARD2 LOAD MEASUREMENT 9
............................................ 11
5 COOLSTEP CURRENT CONTROL ......... 12
....................................... 14
6 SPI INTERFACE ...................................... 15
............................................... 15
................................................ 15
..................................... 16
................................................................... 20
(SGCSCONF) ............................................. 22
.......................................... 24
............................... 25
7 STEP/DIR INTERFACE ........................... 26
........................................................ 26
....................................... 27
.............................. 28
8 CURRENT SETTING ................................ 30
........................................ 31
CHOPPER OPERATION ......................... 32
.................................... 33
POWER MOSFET STAGE ...................... 37
................................................. 37
DIAGNOSTICS AND PROTECTION ... 38
www.trinamic.com
3
.............................. 39
POWER SUPPLY SEQUENCING .......... 41
SYSTEM CLOCK ...................................... 41
................................ 42
LAYOUT CONSIDERATIONS ............... 43
........................................ 43
.................................. 43
....................................... 43
........................................ 44
ABSOLUTE MAXIMUM RATINGS ....... 45
ELECTRICAL CHARACTERISTICS ....... 46
.................................. 46
PACKAGE MECHANICAL DATA .......... 50
........................... 50
........................................... 50
DISCLAIMER ........................................... 51
ESD SENSITIVE DEVICE ...................... 51
TABLE OF FIGURES ............................... 52
REVISION HISTORY ............................. 52
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14)
1 Principles of Operation
0A+
High-Level
Interface
µC
S/D
TMC2660
0A-
0B+
0B-
S
N
SPI
4
0A+
High-Level
Interface
µC
SPI
TMC429
Motion
Controller
for up to
3 Motors
S/D
TMC2660
0A-
0B+
0B-
S
N
SPI
Figure 1.1 Block diagram: applications
The TMC2660 motor driver chip with included MOSFETs is the intelligence and power between a
motion controller and the two phase stepper motor as shown in Figure 1.1. Following power-up, an
embedded microcontroller initializes the driver by sending commands over an SPI bus to write control parameters and mode bits in the TMC2660. The microcontroller may implement the motioncontrol function as shown in the upper part of the figure, or it may send commands to a dedicated motion controller chip such as TRINAMIC’s TMC429 as shown in the lower part.
The motion controller can control the motor position by sending pulses on the STEP signal while indicating the direction on the DIR signal. The TMC2660 has a microstep counter and sine table to convert these signals into the coil currents which control the position of the motor. If the microcontroller implements the motion-control function, it can write values for the coil currents directly to the TMC2660 over the SPI interface, in which case the STEP/DIR interface may be disabled.
This mode of operation requires software to track the motor position and reference a sine table to calculate the coil currents.
To optimize power consumption and heat dissipation, software may also adjust coolStep and stallGuard2 parameters in real-time, for example to implement different tradeoffs between speed and power consumption in different modes of operation.
The motion control function is a hard real-time task which may be a burden to implement reliably alongside other tasks on the embedded microcontroller. By offloading the motion-control function to the TMC429, up to three motors can be operated reliably with very little demand for service from the microcontroller. Software only needs to send target positions, and the TMC429 generates precisely timed step pulses. Software retains full control over both the TMC2660 and TMC429 through the SPI bus.
1.1 Key Concepts
The TMC2660 motor driver implements several advanced features which are exclusive to TRINAMIC products. These features contribute toward greater precision, greater energy efficiency, higher reliability, smoother motion, and cooler operation in many stepper motor applications.
stallGuard2™ High-precision load measurement using the back EMF on the coils
coolStep™ Load-adaptive current control which reduces energy consumption by as much as
75%
spreadCycle™ High-precision chopper algorithm available as an alternative to the traditional constant off-time algorithm
microPlyer™ Microstep interpolator for obtaining increased smoothness of microstepping over a
STEP/DIR interface www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 5
In addition to these performance enhancements, TRINAMIC motor drivers also offer safeguards to detect and protect against shorted outputs, open-circuit output, overtemperature, and undervoltage conditions for enhancing safety and recovery from equipment malfunctions.
1.2 Control Interfaces
There are two control interfaces from the motion controller to the motor driver: the SPI serial interface and the STEP/DIR interface. The SPI interface is used to write control information to the chip and read back status information. This interface must be used to initialize parameters and modes necessary to enable driving the motor. This interface may also be used for directly setting the currents flowing through the motor coils, as an alternative to stepping the motor using the STEP and DIR signals, so the motor can be controlled through the SPI interface alone.
The STEP/DIR interface is a traditional motor control interface available for adapting existing designs to use TRINAMIC motor drivers. Using only the SPI interface requires slightly more CPU overhead to look up the sine tables and send out new current values for the coils.
1.2.1 SPI Interface
The SPI interface is a bit-serial interface synchronous to a bus clock. For every bit sent from the bus master to the bus slave, another bit is sent simultaneously from the slave to the master.
Communication between an SPI master and the TMC2660 slave always consists of sending one 20-bit command word and receiving one 20-bit status word.
The SPI command rate typically corresponds to the microstep rate at low velocities. At high velocities, the rate may be limited by CPU bandwidth to 10-100 thousand commands per second, so the application may need to change to fullstep resolution.
1.2.2 STEP/DIR Interface
The STEP/DIR interface is enabled by default. Active edges on the STEP input can be rising edges or both rising and falling edges, as controlled by another mode bit (DEDGE). Using both edges cuts the toggle rate of the STEP signal in half, which is useful for communication over slow interfaces such as optically isolated interfaces.
On each active edge, the state sampled from the DIR input determines whether to step forward or back. Each step can be a fullstep or a microstep, in which there are 2, 4, 8, 16, 32, 64, 128, or 256 microsteps per fullstep. During microstepping, a step impulse with a low state on DIR increases the microstep counter and a high decreases the counter by an amount controlled by the microstep resolution. An internal table translates the counter value into the sine and cosine values which control the motor current for microstepping.
1.3 Mechanical Load Sensing
The TMC2660 provides stallGuard2 high-resolution load measurement for determining the mechanical load on the motor by measuring the back EMF. In addition to detecting when a motor stalls, this feature can be used for homing to a mechanical stop without a limit switch or proximity detector. The coolStep power-saving mechanism uses stallGuard2 to reduce the motor current to the minimum motor current required to meet the actual load placed on the motor.
1.4 Current Control
Current into the motor coils is controlled using a cycle-by-cycle chopper mode. Two chopper modes are available: a traditional constant off-time mode and the new spreadCycle mode. spreadCycle mode offers smoother operation and greater power efficiency over a wide range of speed and load. www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14)
2 Pin Assignments
2.1 Package Outline
OA1
-
VSA
OA2
OA1
BRA
OA2
9
10
11
7
8
3
4
1
2
5
6
TMC2660-PA
QFP44
31
30
29
28
33
32
27
26
25
24
23
OB1
BRB
OB2
-
OB1
VSB
OB2
Figure 2.1 TMC2660 pin assignment
2.2 Signal Descriptions
Pin
OA1
OA2
OB1
OB2
VSA
VSB
BRA
BRB
SRA
SRB
5VOUT
4
30
9
25
12
22
13
2, 3
7, 8
5, 6
10, 11
26, 27
31, 32
23, 24
28, 29
Number Type Function
O (VS) Bridge A1 output. Interconnect all of these pins using thick traces capable to carry the motor current and distribute heat into the PCB.
O (VS) Bridge A2 output. Interconnect all of these pins using thick traces capable to carry the motor current and distribute heat into the PCB.
O (VS) Bridge B1 output. Interconnect all of these pins using thick traces capable to carry the motor current and distribute heat into the PCB.
O (VS) Bridge B2 output. Interconnect all of these pins using thick traces capable to carry the motor current and distribute heat into the PCB.
AI
AI
Bridge A/B positive power supply. Connect to VS and provide sufficient filtering capacity for chopper current ripple.
Bridge A/B negative power supply via sense resistor in bridge foot point.
Sense resistor inputs for chopper current regulation.
Output of the on-chip 5V linear regulator. This voltage is used to supply the low-side MOSFETs and internal analog circuitry. An external capacitor to GND close to the pin is required. Place the capacitor near pins 13 and 17. A 470nF ceramic capacitor is sufficient.
DO VIO SPI serial data output. SDO 14 www.trinamic.com
6
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14)
Pin
SDI
SCK
GND
CSN
ENN
CLK
VHS
VS
TST_ANA
SG_TST
VCC_IO
DIR
STEP
TST_MODE n.c.
Number Type Function
15
16
DI VIO SPI serial data input.
(Scan test input in test mode.)
DI VIO Serial clock input of SPI interface.
(Scan test shift enable input in test mode.)
Digital and analog low power GND. 17, 39,
44
18
19
21
35
36
37
38
40
41
42
43
1, 33
DI VIO Chip select input for the SPI interface. (Active low.)
DI VIO Power MOSFET enable input. All MOSFETs are switched off when disabled. (Active low.)
DI VIO System clock input for all internal operations. Tie low to use the on-chip oscillator. A high signal disables the on-chip oscillator until power down.
High-side supply voltage (motor supply voltage - 10V)
Motor supply voltage
AO VIO Reserved. Do not connect.
DO VIO stallGuard2 output. Signals a motor stall. (Active high.)
Input/output supply voltage VIO for all digital pins. Tie to digital logic supply voltage. Operation is allowed in 3.3V and 5V systems.
DI VIO Direction input. Sampled on an active edge of the STEP input to determine stepping direction. Sampling a low increases the microstep counter, while sampling a high decreases the counter. A
60-ns internal glitch filter rejects short pulses on this input.
DI VIO Step input. Active edges can be rising or both rising and falling, as
DI VIO Test mode input. Puts IC into test mode. Tie to GND for normal operation. controlled by the DEDGE mode bit. A 60-ns internal glitch filter rejects short pulses on this input.
No internal connection - can be tied to any net, e.g., in order to improve power routing to pins VSA and VSB.
7 www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 8
3 Internal Architecture
Figure 3.1 shows the internal architecture of TMC266O.
+V
M
9-29V
VHS
100n
16V
VS
100n
3.3V or 5V
+V
CC
VCC_IO
100n
D
TMC2660
OSC
15MHz
8-20MHz CLK
D step & dir
(optional)
STEP
DIR
D
D
Clock selector
CLK
Step &
Direction interface
Step multiply
16 à 256
Sine wave
1024 entry
SIN &
COS
Phase polarity
SPI
TEST_SE
ENABLE
D
D
CSN
SCK
SDI
SDO
D
D
D
D
Digital control
SPI interface
M
U
X
V
REF
9
DAC
9
DAC
stallGuard output
SG_TST
D coolStep
Energy efficiency stallGuard 2
Protection &
Diagnostics
BACK
EMF
Phase polarity
SHORT
TO GND
ENABLE
Chopper logic
Chopper logic
ENABLE
Temperature sensor
100°C, 150°C
GND TEST_ANA
Break before make
Break before make
VM-10V linear regulator slope HS VHS
P-Gate drivers
Short to
GND detectors
N-Gate drivers slope LS +5V slope LS +5V
N-Gate drivers
Short to
GND detectors
P-Gate drivers slope HS VHS
G
S
D
D
G
S
G
S
D
D
G
S
5V linear regulator
G
S
D
D
G
S
G
S
D
D
G
S
5VOUT
5V supply
470nF
+V
M
VSA
Provide sufficient filtering capacity near bridge supply (electrolyt capacitors and ceramic capacitors)
OA1 motor coil A
OA2
BRA
SRA
22R
R
SENSE
R
R
SENSE
=75mΩ for 4A peak (2.8A RMS)
SENSE
=100mΩ for 3A peak (2.1A RMS)
10nF
SRB
10nF
22R
R
SENSE
R
SENSE
=75mΩ for 4A peak (2.8A RMS)
R
SENSE
=100mΩ for 3A peak (2.1A RMS)
BRB
Optional input protection and filter network against inductive sparks upon motor cable break
OB2 motor coil B
OB1
VSB
Provide sufficient filtering capacity near bridge supply (electrolyt capacitors and ceramic capacitors)
+V
M
Figure 3.1 TMC2660 block diagram
P
ROMINENT FEATURES INCLUDE
:
Oscillator and clock selector
Step and direction interface
SPI interface
Multiplexer
Multipliers
DACs and comparators
provide the system clock from the on-chip oscillator or an external source. uses a microstep counter and sine table to generate target currents for the coils. receives commands that directly set the coil current values. selects either the output of the sine table or the SPI interface for controlling the current into the motor coils. scale down the currents to both coils when the currents are greater than those required by the load on the motor or as set by the CS current scale parameter. convert the digital current values to analog signals that are compared with the voltages on the sense resistors. Comparator outputs terminate chopper drive phases when target currents are reached.
Break-before-make and gate drivers
ensure non-overlapping pulses, boost pulse voltage, and control pulse slope to the gates of the power MOSFETs.
On-chip voltage regulators
provide high-side voltage for P-channel MOSFET gate drivers and supply voltage for on-chip analog and digital circuits. www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 9
4 stallGuard2 Load Measurement
stallGuard2 provides an accurate measurement of the load on the motor. It can be used for stall detection as well as other uses at loads below those which stall the motor, such as coolStep loadadaptive current reduction. (stallGuard2 is a more precise evolution of the earlier stallGuard technology.)
The stallGuard2 measurement value changes linearly over a wide range of load, velocity, and current
corresponds to a load angle of 90° between the magnetic field of the coils and magnets in the rotor.
This also is the most energy-efficient point of operation for the motor.
1000 stallGuard2 reading
900
800
700
600
500
400
300
200
100
0 10
Start value depends on motor and operating conditions
20 30 40 stallGuard value reaches zero and indicates danger of stall.
This point is set by stallGuard threshold value SGT.
50 60 70 80 90 100
Motor stalls above this point.
Load angle exceeds 90° and available torque sinks.
motor load
(% max. torque)
Figure 4.1 stallGuard2 load measurement SG as a function of load
Two parameters control stallGuard2 and one status value is returned.
Parameter
SGT
SFILT
Description
7-bit signed integer that sets the stallGuard2 threshold level for asserting the SG_TST output and sets the optimum measurement range for readout. Negative values increase sensitivity, and positive values reduce sensitivity so more torque is required to indicate a stall. Zero is a good starting value. Operating at values below
-10 is not recommended.
Mode bit which enables the stallGuard2 filter for more precision. If set, reduces the measurement frequency to one measurement per four fullsteps. If cleared, no filtering is performed.
Filtering compensates for mechanical asymmetries in the construction of the motor, but at the expense of response time. Unfiltered operation is recommended for rapid stall detection. Filtered operation is recommended for more precise load measurement.
Setting
0
+1… +63
-1… -64
0
1
Comment
indifferent value less sensitivity higher sensitivity standard mode filtered mode www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 10
Status word Description
SG 10-bit unsigned integer stallGuard2 measurement value. A higher value indicates lower mechanical load. A lower value indicates a higher load and therefore a higher load angle.
For stall detection, adjust SGT to return an SG value of 0 or slightly higher upon maximum motor load before stall.
Range Comment
0… 1023 0: highest load low value: high load high value: less load
4.1 Tuning the stallGuard2 Threshold
Due to the dependency of the stallGuard2 value SG from motor-specific characteristics and applicationspecific demands on load and velocity the easiest way to tune the stallGuard2 threshold SGT for a specific motor type and operating conditions is interactive tuning in the actual application.
The procedure is:
1. Operate the motor at a reasonable velocity for your application and monitor SG.
2. Apply slowly increasing mechanical load to the motor. If the motor stalls before SG reaches zero, decrease SGT. If SG reaches zero before the motor stalls, increase SGT. A good SGT starting value is zero. SGT is signed, so it can have negative or positive values.
3. The optimum setting is reached when SG is between 0 and 400 at increasing load shortly before the motor stalls, and SG increases by 100 or more without load. SGT in most cases can be tuned together with the motion velocity in a way that SG goes to zero when the motor stalls and the stall output SG_TST is asserted. This indicates that a step has been lost.
The system clock frequency affects SG. An external crystal-stabilized clock should be used for applications that demand the highest precision. The power supply voltage also affects SG, so tighter regulation results in more accurate values. SG measurement has a high resolution, and there are a few ways to enhance its accuracy, as described in the following sections.
4.1.1 Variable Velocity Operation
Across a range of velocities, on-the-fly adjustment of the stallGuard2 threshold SGT improves the accuracy of the load measurement SG. This also improves the power reduction provided by coolStep, which is driven by SG. Linear interpolation between two SGT values optimized at different velocities is a simple algorithm for obtaining most of the benefits of on-the-fly SGT adjustment, as shown in
Figure 4.2. An optimal SGT curve in black and a two-point interpolated SGT curve in red are shown.
1000 stallGuard2 reading at no load
900
800
700 optimum
SGT setting
600
500
400 simplified
SGT setting
300
200
100
0
10
8
6
4
2
0
20
18
16
14
12
50 lower limit for stall detection 4 RPM
100 150 200 250 300 back EMF reaches supply voltage
350 400 450 500 550 600
Motor RPM
(200 FS motor)
Figure 4.2 Linear interpolation for optimizing SGT with changes in velocity.
www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 11
4.1.2 Small Motors with High Torque Ripple and Resonance
Motors with a high detent torque show an increased variation of the stallGuard2 measurement value
SG with varying motor currents, especially at low currents. For these motors, the current dependency might need correction in a similar manner to velocity correction for obtaining the highest accuracy.
4.1.3 Temperature Dependence of Motor Coil Resistance
Motors working over a wide temperature range may require temperature correction, because motor coil resistance increases with rising temperature. This can be corrected as a linear reduction of SG at increasing temperature, as motor efficiency is reduced.
4.1.4 Accuracy and Reproducibility of stallGuard2 Measurement
In a production environment, it may be desirable to use a fixed SGT value within an application for one motor type. Most of the unit-to-unit variation in stallGuard2 measurements results from manufacturing tolerances in motor construction. The measurement error of stallGuard2 – provided that all other parameters remain stable – can be as low as: 𝑠𝑡𝑎𝑙𝑙𝐺𝑢𝑎𝑟𝑑 𝑚𝑒𝑎𝑠𝑢𝑟𝑒𝑚𝑒𝑛𝑡 𝑒𝑟𝑟𝑜𝑟 = ±𝑚𝑎𝑥(1, |𝑆𝐺𝑇|)
4.2 stallGuard2 Measurement Frequency and Filtering
The stallGuard2 measurement value SG is updated with each full step of the motor. This is enough to safely detect a stall, because a stall always means the loss of four full steps. In a practical application, especially when using coolStep, a more precise measurement might be more important than an update for each fullstep because the mechanical load never changes instantaneously from one step to the next. For these applications, the SFILT bit enables a filtering function over four load measurements. The filter should always be enabled when high-precision measurement is required. It compensates for variations in motor construction, for example due to misalignment of the phase A to phase B magnets. The filter should only be disabled when rapid response to increasing load is required, such as for stall detection at high velocity.
4.3 Detecting a Motor Stall
To safely detect a motor stall, a stall threshold must be determined using a specific SGT setting.
Therefore, you need to determine the maximum load the motor can drive without stalling and to monitor the SG value at this load, for example some value within the range 0 to 400. The stall threshold should be a value safely within the operating limits, to allow for parameter stray. So, your microcontroller software should set a stall threshold which is slightly higher than the minimum value seen before an actual motor stall occurs. The response at an SGT setting at or near 0 gives some idea on the quality of the signal: Check the SG value without load and with maximum load. These values should show a difference of at least 100 or a few 100, which shall be large compared to the offset. If you set the SGT value so that a reading of 0 occurs at maximum motor load, an active high stall output signal will be available at SG_TST output.
4.4 Limits of stallGuard2 Operation
stallGuard2 does not operate reliably at extreme motor velocities: Very low motor velocities (for many motors, less than one revolution per second) generate a low back EMF and make the measurement unstable and dependent on environment conditions (temperature, etc.). Other conditions will also lead to extreme settings of SGT and poor response of the measurement value SG to the motor load.
Very high motor velocities, in which the full sinusoidal current is not driven into the motor coils also lead to poor response. These velocities are typically characterized by the motor back EMF reaching the supply voltage. www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 12
5 coolStep Current Control
coolStep allows substantial energy savings, especially for motors which see varying loads or operate at a high duty cycle. Because a stepper motor application needs to work with a torque reserve of 30% to 50%, even a constant-load application allows significant energy savings because coolStep automatically enables torque reserve when required. Reducing power consumption keeps the system cooler, increases motor life, and allows reducing cost in the power supply and cooling components.
Reducing motor current by half results in reducing power by a factor of four.
Energy efficiency - power consumption decreased up to 75%.
Motor generates less heat - improved mechanical precision.
Less cooling infrastructure - for motor and driver.
Cheaper motor - does the job.
0,9
Efficiency with coolStep
0,8
Efficiency with 50% torque reserve
0,7
0,6
0,5
Efficiency
0,4
0,3
0,2
0,1
0
0 50 100 150 200
Velocity [RPM]
250 300 350
Figure 5.1 Energy efficiency example with coolStep
Figure 5.1 shows the efficiency gain of a 42mm stepper motor when using coolStep compared to
standard operation with 50% of torque reserve. coolStep is enabled above 60rpm in the example. coolStep is controlled by several parameters, but two are critical for understanding how it works:
Parameter Description Range Comment
SEMIN 4-bit unsigned integer that sets a lower threshold. If SG goes below this threshold, coolStep increases the current to both coils. The
4-bit SEMIN value is scaled by 32 to cover the lower half of the range of the 10-bit SG value.
(The name of this parameter is derived from smartEnergy, which is an earlier name for coolStep.)
0… 15 lower coolStep threshold:
SEMINx32
SEMAX 4-bit unsigned integer that controls an upper threshold. If SG is sampled equal to or above this threshold enough times, coolStep decreases the current to both coils. The upper threshold is
(SEMIN + SEMAX + 1) x 32.
0… 15 upper coolStep threshold:
(SEMIN+SEMAX+1)x32
Figure 5.2 shows the operating regions of coolStep. The black line represents the SG measurement
value, the blue line represents the mechanical load applied to the motor, and the red line represents the current into the motor coils. When the load increases, SG falls below SEMIN, and coolStep www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 13 increases the current. When the load decreases and SG rises above (SEMIN + SEMAX + 1) x 32 the current becomes reduced.
SEMAX+SEMIN+1
SEMIN
0=maximum load motor current reduction area motor current increment area stall possible load angle optimized load angle optimized current setting CS
(upper limit)
½ or ¼ CS
(lower limit) time load angle optimized
Figure 5.2 coolStep adapts motor current to the load.
Four more parameters control coolStep and one status value is returned:
Parameter Description Range
CS
SEUP
SEDN
Current scale. Scales both coil current values as taken from the internal sine wave table or from the SPI interface. For high precision motor operation, work with a current scaling factor in the range 16 to 31, because scaling down the current values reduces the effective microstep resolution by making microsteps coarser. This setting also controls the maximum current value set by coolStep™.
Number of increments of the coil current for each occurrence of an SG measurement below the lower threshold.
Number of occurrences of SG measurements above the upper threshold before the coil current is decremented.
0… 31
0… 3
0… 3
SEIMIN
Status word
SE
Mode bit that controls the lower limit for scaling the coil current. If the bit is set, the limit is ¼
CS. If the bit is clear, the limit is ½ CS.
0
1
Description Range
5-bit unsigned integer reporting the actual current scaling value determined by coolStep.
This value is biased by 1 and divided by 32, so the range is 1/32 to 32/32. The value will not be greater than the value of CS or lower than either
¼ CS or ½ CS depending on the setting of
SEIMIN.
0… 31 www.trinamic.com
Comment
scaling factor:
1/32, 2/32, … 32/32 step width is:
1, 2, 4, 8 number of stallGuard measurements per decrement:
32, 8, 2, 1
Minimum motor current:
1/2 of CS
1/4 of CS
Comment
Actual motor current scaling factor set by coolStep:
1/32, 2/32, … 32/32
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 14
5.1 Tuning coolStep
Before tuning coolStep, first tune the stallGuard2 threshold level SGT, which affects the range of the load measurement value SG. coolStep uses SG to operate the motor near the optimum load angle of
+90°.
The current increment speed is specified in SEUP, and the current decrement speed is specified in
SEDN. They can be tuned separately because they are triggered by different events that may need different responses. The encodings for these parameters allow the coil currents to be increased much more quickly than decreased, because crossing the lower threshold is a more serious event that may require a faster response. If the response is too slow, the motor may stall. In contrast, a slow response to crossing the upper threshold does not risk anything more serious than missing an opportunity to save power.
coolStep operates between limits controlled by the current scale parameter CS and the SEIMIN bit.
5.1.1 Response Time
For fast response to increasing motor load, use a high current increment step SEUP. If the motor load changes slowly, a lower current increment step can be used to avoid motor current oscillations. If the filter controlled by SFILT is enabled, the measurement rate and regulation speed are cut by a factor of four.
5.1.2 Low Velocity and Standby Operation
Because stallGuard2 is not able to measure the motor load in standstill and at very low RPM, the current at low velocities should be set to an application-specific default value and combined with standstill current reduction settings programmed through the SPI interface. www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 15
6 SPI Interface
TMC2660 requires setting configuration parameters and mode bits through the SPI interface before the motor can be driven. The SPI interface also allows reading back status values and bits.
6.1 Bus Signals
The SPI bus on the TMC2660 has four signals:
SCK bus clock input
SDI serial data input
SDO serial data output
CSN chip select input (active low)
The slave is enabled for an SPI transaction by a low on the chip select input CSN. Bit transfer is synchronous to the bus clock SCK, with the slave latching the data from SDI on the rising edge of SCK and driving data to SDO following the falling edge. The most significant bit is sent first. A minimum of 20 SCK clock cycles is required for a bus transaction with the TMC2660.
If more than 20 clocks are driven, the additional bits shifted into SDI are shifted out on SDO after a
20-clock delay through an internal shift register. This can be used for daisy chaining multiple chips.
CSN must be low during the whole bus transaction. When CSN goes high, the contents of the internal shift register are latched into the internal control register and recognized as a command from the master to the slave. If more than 20 bits are sent, only the last 20 bits received before the rising edge of CSN are recognized as the command.
6.2 Bus Timing
SPI interface is synchronized to the internal system clock, which limits the SPI bus clock SCK to half of the system clock frequency. If the system clock is based on the on-chip oscillator, an additional
10% safety margin must be used to ensure reliable data transmission. All SPI inputs as well as the
timing parameters of an SPI bus transaction, and the table below specifies their values.
CSN t
CC t
CL t
CH t
CH t
CC
SCK t
DU t
DH
SDI bit18 bit0
SDO t
DO bit19 bit19 bit18 bit0 t
ZC
Figure 6.1 SPI Timing
www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 16
SPI Interface Timing
Parameter
SCK valid before or after change of CSN
CSN high time
AC-Characteristics clock period is t
CLK
Symbol Conditions
t
CC
Min
10
Typ Max Unit
ns
SCK low time
SCK high time
SCK frequency using internal clock
SCK frequency using external
16MHz clock
SDI setup time before rising edge of SCK
SDI hold time after rising edge of SCK
Data out valid time after falling
SCK clock edge
SDI, SCK, and CSN filter delay time t
CSH t
CL t
CH f
SCK f
SCK t
DU t
DH t
DO t
FILT
*)
Min time is for synchronous CLK t with SCK high one
CH
before CSN high only
*)
Min time is for synchronous CLK only
*)
Min time is for synchronous CLK only
Assumes minimum
OSC frequency
Assumes synchronous CLK
No capacitive load on SDO
Rising and falling edge t
CLK t
CLK t
CLK
10
10
12
>2t
CLK
+10
>t
CLK
+10
>t
CLK
+10
20
4
8 ns ns ns t
FILT
+5 ns
30
MHz
MHz ns ns ns
6.3 Bus Architecture
SPI slaves can be chained and used with a single chip select line. If slaves are chained, they behave like a long shift register. For example, a chain of two motor drivers requires 40 bits to be sent. The last bits shifted to each register in the chain are loaded into an internal register on the rising edge of the CSN input. For example, 24 or 32 bits can be sent to a single motor driver, but it latches just the last 20 bits received before CSN goes high.
Mechanical Feedback or virtual stop switch
3 x REF_L, REF_R
Real time Step &
Dir interface
VSA / B
+V
M
Stepper
#1 nSCS_C
SCK_C
SDI_C
SDOZ_C nINT
CLK
TMC429 triple stepper motor controller
SPI to master
Interrupt controller
Reference switch processing
3x linear RAMP generator
Position comparator
Motio n con trol
Step &
Direction pulse generation
Microstep table
Output select
SPI or
Step & Dir
Serial driver interface
S1 (SDO_S)
D1 (SCK_S)
S2 (nSCS_S)
D2 (SDI_S)
S3 (nSCS_2)
D3 (nSCS_3)
Driver 2
Driver 3
VCC_IO
STEP
DIR
CSN
SCK
SDI
SDO
TMC2660 stepper driver
coolS tep m drive r otor sine table
4*256 entry x chopper
SPI control,
Config & diags
Protection
& diagnostics coolStep™ stallGuard2™
2 x current comparator
2 x DAC
OA1
OA2
OB1
OB2
BRA / B
RSA / B
S
N
2 phase stepper motor
R
SENSE
Realtime event trigger POSCOMP
Motion command
SPI TM
Configuration and diagnostics SPI TM
Virtual stop switch SG_TST
Second driver and motor
Third driver and motor
System interfacing
User CPU
ntrol
Syste m co
Figure 6.2 Interfaces to a TMC429 motion controller chip and a TMC2660 motor driver
www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 17
Figure 6.2 shows the interfaces in a typical application. The SPI bus is used by an embedded MCU to
initialize the control registers of both a motion controller and one or more motor drivers. STEP/DIR interfaces are used between the motion controller and the motor drivers.
6.4 Register Write Commands
An SPI bus transaction to the TMC2660 is a write command to one of the five write-only registers that hold configuration parameters and mode bits:
Register Description
Driver Control Register
(DRVCTRL)
Chopper Configuration Register
(CHOPCONF) coolStep Configuration Register
(SMARTEN) stallGuard2 Configuration Register
(SGCSCONF)
Driver Configuration Register
(DRVCONF)
The DRVCTRL register has different formats for controlling the interface to the motion controller depending on whether or not the STEP/DIR interface is enabled.
The CHOPCONF register holds chopper parameters and mode bits.
The SMARTEN register holds coolStep parameters and a mode bit. (smartEnergy is an earlier name for coolStep.)
The SGCSCONF register holds stallGuard2 parameters and a mode bit.
The DRVCONF register holds parameters and mode bits used to control the power MOSFETs and the protection circuitry. It also holds the SDOFF bit which controls the STEP/DIR interface and the RDSEL parameter which controls the contents of the response returned in an SPI transaction
In the following sections, multibit binary values are prefixed with a % sign, for example %0111.
6.4.1 Write Command Overview
The table below shows the formats for the five register write commands. Bits 19, 18, and sometimes
17 select the register being written, as shown in bold. The DRVCTRL register has two formats, as selected by the SDOFF bit. Bits shown as 0 must always be written as 0, and bits shown as 1 must always be written with 1. Detailed descriptions of each parameter and mode bit are given in the following sections.
Register/
Bit
DRVCTRL
(SDOFF=1)
DRVCTRL
(SDOFF=0)
CHOPCONF SMARTEN SGCSCONF DRVCONF
8
7
6
5
12
11
10
9
19
18
17
16
15
14
13
4
3
2
1
0
CA3
CA2
CA1
CA0
PHB
CB7
CB6
CB5
0
0
PHA
CA7
CA6
CA5
CA4
CB4
CB3
CB2
CB1
CB0 www.trinamic.com
0
0
0
0
0
0
0
0
0
0
INTPOL
DEDGE
0
0
0
0
MRES3
MRES2
MRES1
MRES0
1
0
0
TBL1
TBL0
CHM
RNDTF
HDEC1
HDEC0
HEND3
HEND2
HEND1
HEND0
HSTRT2
HSTRT1
HSTRT0
TOFF3
TOFF2
TOFF1
TOFF0
1
0
1
0
SEIMIN
SEDN1
SEDN0
0
SEMAX3
SEMAX2
SEMAX1
SEMAX0
0
SEUP1
SEUP0
0
SEMIN3
SEMIN2
SEMIN1
SEMIN0
SGT4
SGT3
SGT2
SGT1
SGT0
0
0
0
1
1
0
SFILT
0
SGT6
SGT5
CS4
CS3
CS2
CS1
CS0
1
1
1
TST
SLPH1
SLPH0
SLPL1
SLPL0
0
DISS2G
TS2G1
TS2G0
SDOFF
VSENSE
RDSEL1
RDSEL0
0
0
0
0
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 18
6.4.2 Read Response Overview
The table below shows the formats for the read response. The RDSEL parameter in the DRVCONF register selects the format of the read response.
Bit RDSEL=%00 RDSEL=%01 RDSEL=%10
9
8
7
6
5
13
12
11
10
4
3
2
1
0
19
18
17
16
15
14
MSTEP9
MSTEP8
MSTEP7
MSTEP6
MSTEP5
MSTEP4
MSTEP3
MSTEP2
MSTEP1
MSTEP0
-
-
STST
OLB
OLA
S2GB
S2GA
OTPW
OT
SG
-
-
SG3
SG2
SG1
SG0
SG9
SG8
SG7
SG6
SG5
SG4
-
-
SE3
SE2
SE1
SE0
SG9
SG8
SG7
SG6
SG5
SE4
6.5 Driver Control Register (DRVCTRL)
The format of the DRVCTRL register depends on the state of the SDOFF mode bit.
SPI Mode
SDOFF bit is set, the STEP/DIR interface is disabled, and DRVCTRL is the interface for specifying the currents through each coil.
STEP/DIR Mode SDOFF bit is clear, the STEP/DIR interface is enabled, and DRVCTRL is a configuration register for the STEP/DIR interface.
6.5.1 DRVCTRL Register in SPI Mode
DRVCTRL
Bit Name
19 0
18 0
17 PHA
16 CA7
15 CA6
14 CA5
13 CA4
12 CA3
11 CA2
10 CA1
9 CA0
Current A MSB
Driver Control in SPI Mode (SDOFF=1)
Function
Register address bit
Register address bit
Polarity A
Comment
Sign of current flow through coil A:
0: Current flows from OA1 pins to OA2 pins.
1: Current flows from OA2 pins to OA1 pins.
Magnitude of current flow through coil A. The range is
0 to 248, if hysteresis or offset are used up to their full extent. The resulting value after applying hysteresis or offset must not exceed 255.
Current A LSB www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 19
DRVCTRL
Bit Name
8 PHB
7 CB7
6 CB6
5 CB5
4 CB4
3 CB3
2 CB2
1 CB1
0 CB0
Current B MSB
Driver Control in SPI Mode (SDOFF=1)
Function
Polarity B
Comment
Sign of current flow through coil B:
0: Current flows from OB1 pins to OB2 pins.
1: Current flows from OB2 pins to OB1 pins.
Magnitude of current flow through coil B. The range is
0 to 248, if hysteresis or offset are used up to their full extent. The resulting value after applying hysteresis or offset must not exceed 255.
Current B LSB
6.5.2 DRVCTRL Register in STEP/DIR Mode
DRVCTRL
Bit Name
19 0
18 0
17 0
16 0
15 0
14 0
13 0
12 0
11 0
10 0
9 INTPOL
8 DEDGE
7 0
6 0
5 0
4 0
3 MRES3
2 MRES2
1 MRES1
0 MRES0
Driver Control in STEP/DIR Mode (SDOFF=0)
Function
Register address bit
Register address bit
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Enable STEP interpolation
Enable double edge
STEP pulses
Reserved
Reserved
Reserved
Reserved
Microstep resolution for STEP/DIR mode
Comment
0: Disable STEP pulse interpolation.
1: Enable STEP pulse multiplication by 16.
0: Rising STEP pulse edge is active, falling edge is inactive.
1: Both rising and falling STEP pulse edges are active.
Microsteps per 90°:
%0000: 256
%0001: 128
%0010: 64
%0011: 32
%0100: 16
%0101: 8
%0110: 4
%0111: 2 (halfstep)
%1000: 1 (fullstep) www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 20
6.6 Chopper Control Register (CHOPCONF)
CHOPCONF
Bit Name
19 1
18 0
17 0
16 TBL1
15 TBL0
14 CHM
13 RNDTF
12 HDEC1
11 HDEC0
10 HEND3
9
8
7
6
HEND2
HEND1
HEND0
HSTRT2
5 HSTRT1
4 HSTRT0 www.trinamic.com
Chopper Configuration
Function
Register address bit
Register address bit
Register address bit
Blanking time
Chopper mode
Comment
Blanking time interval, in system clock periods:
%00: 16
%01: 24
%10: 36
%11: 54
This mode bit affects the interpretation of the HDEC,
HEND, and HSTRT parameters shown below.
Random TOFF time
Hysteresis decrement interval or
Fast decay mode
Hysteresis end (low) value or
Sine wave offset
Hysteresis start value or
Fast decay time setting
0 Standard mode (spreadCycle)
1 Constant t
OFF
with fast decay time.
Fast decay time is also terminated when the negative nominal current is reached. Fast decay is after on time.
Enable randomizing the slow decay phase duration:
0: Chopper off time is fixed as set by bits t
OFF
1: Random mode, t
OFF dN
CLK
is random modulated by
= -12 … +3 clocks.
CHM=0 Hysteresis decrement period setting, in system clock periods:
%00: 16
%01: 32
%10: 48
%11: 64
CHM=1 HDEC1=0: current comparator can terminate the fast decay phase before timer expires.
HDEC1=1: only the timer terminates the fast decay phase.
CHM=0
HDEC0: MSB of fast decay time setting.
%0000 … %1111:
Hysteresis is -3, -2, -1, 0, 1, …, 12
(1/512 of this setting adds to current setting)
This is the hysteresis value which becomes used for the hysteresis chopper.
CHM=1 %0000 … %1111:
Offset is -3, -2, -1, 0, 1, …, 12
This is the sine wave offset and 1/512 of the value becomes added to the absolute value of each sine wave entry.
CHM=0 Hysteresis start offset from HEND:
%000: 1 %100: 5
%001: 2
%010: 3
%101: 6
%110: 7
%011: 4 %111: 8
Effective: HEND+HSTRT must be ≤ 15
CHM=1 Three least-significant bits of the duration of the fast decay phase. The MSB is HDEC0.
Fast decay time is a multiple of system clock periods: N
CLK
= 32 x (HDEC0+HSTRT)
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 21
CHOPCONF
Bit Name
3 TOFF3
2 TOFF2
1 TOFF1
0 TOFF0
Chopper Configuration
Function
Off time/MOSFET disable
Comment
Duration of slow decay phase. If TOFF is 0, the MOSFETs are shut off. If TOFF is nonzero, slow decay time is a multiple of system clock periods:
N
CLK
= 12 + (32 x TOFF) (Minimum time is 64clocks.)
%0000: Driver disable, all bridges off
%0001: 1 (use with TBL of minimum 24 clocks)
%0010 … %1111: 2 … 15
6.7 coolStep Control Register (SMARTEN)
SMARTEN
Bit Name
19 1
18 0
17 1
16 0
15 SEIMIN
14 SEDN1
13 SEDN0
12 0
11 SEMAX3
10 SEMAX2
9 SEMAX1
8 SEMAX0
7 0
6 SEUP1
5 SEUP0
4 0
3 SEMIN3
2 SEMIN2
1 SEMIN1
0 SEMIN0
coolStep Configuration
Function
Register address bit
Register address bit
Register address bit
Reserved
Minimum coolStep current
Current decrement speed
Reserved
Upper coolStep threshold as an offset from the lower threshold
Reserved
Current increment size
Comment
0: ½ CS current setting
1: ¼ CS current setting
Number of times that the stallGuard2 value must be sampled equal to or above the upper threshold for each decrement of the coil current:
%00: 32
%01: 8
%10: 2
%11: 1
If the stallGuard2 measurement value SG is sampled equal to or above (SEMIN+SEMAX+1) x 32 enough times, then the coil current scaling factor is decremented.
Reserved
Lower coolStep threshold/coolStep disable
Number of current increment steps for each time that the stallGuard2 value SG is sampled below the lower threshold:
%00: 1
%01: 2
%10: 4
%11: 8
If SEMIN is 0, coolStep is disabled. If SEMIN is nonzero and the stallGuard2 value SG falls below SEMIN x 32, the coolStep current scaling factor is increased. www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 22
15 0
14 SGT6
13 SGT5
12 SGT4
11 SGT3
10 SGT2
9 SGT1
8 SGT0
7 0
6 0
5 0
4 CS4
3 CS3
2 CS2
1 CS1
0 CS0
6.8 stallGuard2 Control Register (SGCSCONF)
SGCSCONF
Bit Name
19 1
18 1
17 0
16 SFILT
stallGuard2™ and Current Setting
Function Comment
Register address bit
Register address bit
Register address bit stallGuard2 filter enable
0: Standard mode, fastest response time.
1: Filtered mode, updated once for each four fullsteps to compensate for variation in motor construction, highest accuracy.
Reserved stallGuard2 threshold value
The stallGuard2 threshold value controls the optimum measurement range for readout. A lower value results in a higher sensitivity and requires less torque to indicate a stall. The value is a two’s complement signed integer.
Values below -10 are not recommended.
Range: -64 to +63
Reserved
Reserved
Reserved
Current scale
(scales digital currents A and B)
Current scaling for SPI and step/direction operation.
%00000 … %11111: 1/32, 2/32, 3/32, … 32/32
This value is biased by 1 and divided by 32, so the range is 1/32 to 32/32.
Example: CS=0 is 1/32 current www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 23
6.9 Driver Control Register (DRVCONF)
DRVCONF
Bit Name
19 1
18 1
17 1
16 TST
15 SLPH1
14 SLPH0
13 SLPL1
12 SLPL0
11 0
10 DISS2G
9 TS2G1
8 TS2G0
7 SDOFF
6 VSENSE
5 RDSEL1
4 RDSEL0
3 0
2 0
1 0
0 0
Driver Configuration
Function Comment
Register address bit
Register address bit
Register address bit
Reserved TEST mode Must be cleared for normal operation. When set, the
SG_TST output exposes digital test values, and the
TEST_ANA output exposes analog test values. Test value selection is controlled by SGT1 and SGT0:
TEST_ANA: %00: anatest_2vth,
%01: anatest_dac_out,
%10: anatest_vdd_half.
SG_TST: %00: comp_A,
%01: comp_B,
%10: CLK,
%11: on_state_xy
Slope control, high side
%00: Minimum
%01: Minimum temperature compensation mode.
%10: Medium temperature compensation mode.
%11: Maximum
In temperature compensated mode (tc), the MOSFET gate driver strength is increased if the overtemperature warning temperature is reached. This compensates for temperature dependency of high-side slope control.
Slope control, low side
Reserved
Short to GND protection disable
Short to GND detection timer
%00: Minimum.
%01: Minimum.
%10: Medium.
%11: Maximum.
0: Short to GND protection is enabled.
1: Short to GND protection is disabled.
%00: 3.2µs.
STEP/DIR interface disable
Sense resistor voltage-based current scaling
%01: 1.6µs.
%10: 1.2µs.
%11: 0.8µs.
0: Enable STEP and DIR interface.
1: Disable STEP and DIR interface. SPI interface is used to move motor.
0: Full-scale sense resistor voltage is 305mV.
1: Full-scale sense resistor voltage is 165mV.
(Full-scale refers to a current setting of 31 and a DAC value of 255.)
Select value for read out (RD bits)
%00
%01
%10
Microstep position read back stallGuard2 level read back stallGuard2 and coolStep current level read back
Reserved, do not use
Reserved
Reserved
Reserved
Reserved
%11 www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 24
6.10 Read Response
For every write command sent to the motor driver, a 20-bit response is returned to the motion controller. The response has one of three formats, as selected by the RDSEL parameter in the
DRVCONF register. The table below shows these formats. Software must not depend on the value of any bit shown as reserved.
DRVSTATUS Read Response
Bit Name Function Comment
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RDSEL=%00 %01
MSTEP9
MSTEP8
MSTEP7
MSTEP6
MSTEP5
MSTEP4
MSTEP3
MSTEP2
MSTEP1
MSTEP0
Reserved
Reserved
STST
OLB
OLA
S2GB
S2GA
OTPW
OT
SG
%10
SG9 SG9 Microstep counter
SG8 SG8 for coil A
SG7
SG6
SG7
SG6
or
stallGuard2 value
SG5
SG4
SG5
SE4
SG9:0
or
SG3
SG2
SE3
SE2 stallGuard2 value
SG9:5 and
SG1
SG0
SE1
SE0 coolStep value
SE4:0
Standstill indicator
Microstep position in sine table for coil A in
STEP/DIR mode. MSTEP9 is the Polarity bit:
0: Current flows from OA1 pins to OA2 pins.
1: Current flows from OA2 pins to OA1 pins. stallGuard2 value SG9:0. stallGuard2 value SG9:5 and the actual coolStep scaling value SE4:0.
Open load indicator
0: No standstill condition detected.
1: No active edge occurred on the STEP input during the last 2 20 system clock cycles.
0: No open load condition detected.
1: No chopper event has happened during the last period with constant coil polarity.
Only a current above 1/16 of the maximum setting can clear this bit!
Hint: This bit is only a status indicator. The chip takes no other action when this bit is set. False indications may occur during fast motion and at standstill. Check this bit only during slow motion.
Short to GND detection bits on high-side transistors
0: No short to ground shutdown condition.
1: Short to ground shutdown condition. The short counter is incremented by each short circuit and the chopper cycle is suspended.
The counter is decremented for each phase polarity change. The MOSFETs are shut off when the counter reaches 3 and remain shut off until the shutdown condition is cleared by disabling and re-enabling the driver. The shutdown conditions reset by deasserting the
ENN input or clearing the TOFF parameter.
Overtemperature warning
Overtemperature shutdown
0: No overtemperature warning condition.
1: Warning threshold is active.
0: No overtemperature shutdown condition.
1: Overtemperature shutdown has occurred. stallGuard2 status 0: No motor stall detected.
1: stallGuard2 threshold has been reached, and the SG_TST output is driven high. www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 25
6.11 Device Initialization
The following sequence of SPI commands is an example of enabling the driver and initializing the chopper: or
SPI = $901B4;
SPI = $94557;
// Hysteresis mode
// Constant t off
mode
SPI = $D001F; // Current setting: $d001F (max. current)
SPI = $E0010; // low driver strength, stallGuard2 read, SDOFF=0
SPI = $00000; // 256 microstep setting
First test of coolStep current control:
SPI = $A8202; // Enable coolStep with minimum current ¼ CS
The configuration parameters should be tuned to the motor and application for optimum performance. www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 26
7 STEP/DIR Interface
The STEP and DIR inputs provide a simple, standard interface compatible with many existing motion controllers. The microPlyer STEP pulse interpolator brings the smooth motor operation of highresolution microstepping to applications originally designed for coarser stepping and reduces pulse bandwidth.
7.1 Timing
Figure 7.1 shows the timing parameters for the STEP and DIR signals, and the table below gives their
specifications. When the DEDGE mode bit in the DRVCTRL register is set, both edges of STEP are active. If DEDGE is cleared, only rising edges are active. STEP and DIR are sampled and synchronized to the system clock. An internal analog filter removes glitches on the signals, such as those caused by long PCB traces. If the signal source is far from the chip, and especially if the signals are carried on cables, the signals should be filtered or differentially transmitted.
DIR t
DSU t
SH t
SL t
DSH
STEP
Figure 7.1 STEP and DIR timing.
STEP and DIR Interface Timing AC-Characteristics clock period is t
CLK
Parameter
Step frequency (at maximum microstep resolution)
Fullstep frequency
STEP input low time
Symbol Conditions
f
STEP
DEDGE=0
DEDGE=1 f
FS t
SL
STEP input high time t
SH t
DSU t
DSH t
FILTSD
Rising and falling edge t
SDCLKHI
Before rising edge of CLK
DIR to STEP setup time
DIR after STEP hold time
STEP and DIR spike filtering time
STEP and DIR sampling relative to rising CLK input
Min
max(t
FILTSD t
CLK
+20)
, max(t
FILTSD
, t
CLK
+20)
20
20
36
Typ
60 t
FILTSD
Max Unit
½ f
CLK
¼ f
CLK f
CLK
/512 ns ns
85 ns ns ns ns www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 27
7.2 Microstep Table
23
24
25
26
27
18
19
20
21
22
28
29
30
31
14
15
16
17
9
10
11
12
13
3
4
5
6
7
8
The internal microstep table maps the sine function from 0° to 90°. Symmetries allow mapping the sine and cosine functions from 0° to 360° with this table. The angle is encoded as a 10-bit unsigned integer MSTEP provided by the microstep counter. The size of the increment applied to the counter while microstepping through this table is controlled by the microstep resolution setting MRES in the
DRVCTRL register. Depending on the DIR input, the microstep counter is increased (DIR=0) or decreased (DIR=1) by the step size with each STEP active edge. Despite many entries in the last quarter of the table being equal, the electrical angle continuously changes, because either the sine wave or cosine wave is in an area, where the current vector changes monotonically from position to
position. Figure 7.2 shows the table. The largest values are 248, which leaves headroom used for
adding an offset.
Entry
0
1
2
0-31
1
2
4
32-63
49
51
52
64-95
96
97
98
96-127 128-159 160-191 192-223 224-255
138 176 207 229 243
140
141
177
178
207
208
230
231
244
244
5
7
8
10
11
13
14
16
17
19
21
22
24
25
27
54
55
57
58
60
61
62
64
65
67
68
70
71
73
74
100
101
103
104
105
107
108
109
111
112
114
115
116
118
119
142
143
145
146
147
148
150
151
152
153
154
156
157
158
159
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
209
210
211
212
212
213
214
215
215
216
217
218
218
219
220
231
232
232
233
233
234
234
235
235
236
236
237
237
238
238
246
246
246
246
246
247
247
247
247
244
244
245
245
245
245
36
37
39
40
42
28
30
31
33
34
43
45
46
48
83
84
86
87
89
76
77
79
80
81
90
91
93
94
120
122
123
124
126
127
128
129
131
132
133
135
136
137
160
161
163
164
165
166
167
168
169
170
172
173
174
175
194
195
196
197
198
199
200
201
201
202
203
204
205
206
220
221
222
223
223
224
225
225
226
226
227
228
228
229
238
239
239
240
240
240
241
241
241
242
242
242
243
243
247
247
247
247
248
248
248
248
248
248
248
248
248
248
Figure 7.2 Internal microstep table showing the first quarter of the sine wave.
www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 28
7.3 Changing Resolution
The application may need to change the microstepping resolution to get the best performance from the motor. For example, high-resolution microstepping may be used for precision operations on a workpiece, and then fullstepping may be used for maximum torque at maximum velocity to advance to the next workpiece. When changing to coarse resolutions like fullstepping or halfstepping, switching should occur at or near positions that correspond to steps in the lower resolution, as
Step Position MSTEP Value Coil A Current Coil B Current
Half step 0
Full step 0
Half step 1
Full step 1
Half step 2
Full step 2
Half step 3
Full step 3
0
128
256
384
512
640
768
896
0%
70.7%
100%
70.7%
0%
-70.7%
-100%
-70.7%
100%
70.7%
0%
-70.7%
-100%
-70.7%
0%
70.7%
Table 7.1 Optimum positions for changing to halfstep and fullstep resolution
7.4 microPlyer Step Interpolator
For each active edge on STEP, microPlyer produces 16 microsteps at 256x resolution, as shown in
at 16x resolution, which it transforms into 256x resolution. The step rate for each 16 microsteps is determined by measuring the time interval of the previous step period and dividing it into 16 equal parts. The maximum time between two microsteps corresponds to 2 20 (roughly one million system clock cycles), for an even distribution of 1/256 microsteps. At 16MHz system clock frequency, this results in a minimum step input frequency of 16Hz for microPlyer operation (one fullstep per second).
A lower step rate causes the STST bit to be set, which indicates a standstill event. At that frequency, microsteps occur at a rate of 𝑠𝑦𝑠𝑡𝑒𝑚 𝑐𝑙𝑜𝑐𝑘 𝑓𝑟𝑒𝑞𝑢𝑒𝑛𝑐𝑦
2
16
≈ 250𝐻𝑧 = 244. microPlyer only works well with a stable STEP frequency. Do not use the DEDGE option if the STEP signal does not have a 50% duty cycle.
STEP interpolated microstep
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 motor angle
2^20 t
CLK
STANDSTILL
(STST) active
Figure 7.3 microPlyer microstep interpolation with rising STEP frequency.
www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 29
STEP active edge. Then, the STEP frequency increases and after one cycle at the higher rate microPlyer increases the interpolated microstep rate. During the last cycle at the slower rate, microPlyer did not generate all 16 microsteps, so there is a small jump in motor angle between the first and second cycles at the higher rate.
7.5 Standstill current reduction
When a standstill event is detected, the motor current should be reduced to save energy and reduce heat dissipation in the power MOSFET stage. This is especially true at halfstep positions, which are a worst-case condition for the driver and motor because the full energy is consumed in one bridge and one motor coil.
Attention:
Stand still current reduction is required when operating near the thermal limits of the application.
Refer the stand still current limitations in chapter 15 as a guideline.
www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 30
8 Current Setting
The internal 5V supply voltage available at the pin 5VOUT is used as a reference for the coil current regulation based on the sense resistor voltage measurement. The desired maximum motor current is set by selecting an appropriate value for the sense resistor. The sense resistor voltage range can be selected by the VSENSE bit in the DRVCONF register. The low sensitivity (high sense resistor voltage,
VSENSE=0) brings best and most robust current regulation, while high sensitivity (low sense resistor voltage; VSENSE=1) reduces power dissipation in the sense resistor. This setting reduces the power dissipation in the sense resistor by nearly half.
After choosing the VSENSE setting and selecting the sense resistor, the currents to both coils are scaled by the 5-bit current scale parameter CS in the SGCSCONF register. The sense resistor value is chosen so that the maximum desired current (or slightly more) flows at the maximum current setting
(CS = %11111).
Using the internal sine wave table, which has amplitude of 248, the RMS motor current can be calculated by:
𝐼
𝑅𝑀𝑆
=
𝐶𝑆 + 1
The momentary motor current is calculated as:
32
∗
𝑅
𝑉
𝐹𝑆
𝑆𝐸𝑁𝑆𝐸
∗
1
√2
𝐼
𝑀𝑂𝑇
=
𝐶𝑈𝑅𝑅𝐸𝑁𝑇
248
𝐴/𝐵
∗
𝐶𝑆 + 1
32
∗
𝑉
𝐹𝑆
𝑅
𝑆𝐸𝑁𝑆𝐸 where:
CS is the effective current scale setting as set by the CS bits and modified by coolStep. The effective value ranges from 0 to 31.
V
FS
is the sense resistor voltage at full scale, as selected by the VSENSE control bit (refer to the electrical characteristics).
CURRENT
A/B
is the value set by the current setting in SPI mode or the internal sine table in STEP/DIR mode.
Parameter
CS
VSENSE
Description
Current scale. Scales both coil current values as taken from the internal sine wave table or from the SPI interface. For high precision motor operation, work with a current scaling factor in the range 16 to 31, because scaling down the current values reduces the effective microstep resolution by making microsteps coarser. This setting also controls the maximum current value set by coolStep.
Allows control of the sense resistor voltage
range or adaptation of one electronic module to different maximum motor currents.
Setting Comment
0 … 31
0
1
Scaling factor:
1/32, 2/32, … 32/32
310mV
165mV
Pay special attention concerning the thermal design and current limits imposed by it!
Be sure to reduce the current to a value at or below the maximum standstill current limits as
bride. The worst case is standstill in a half step position where one bridge has 0 current and the other bridge has RMS value * √2 current. www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 31
8.1 Sense Resistors
Sense resistors should be carefully selected. The full motor current flows through the sense resistors.
They also see the switching spikes from the MOSFET bridges. A low-inductance type such as film or composition resistors is required to prevent spikes causing ringing on the sense voltage inputs leading to unstable measurement results. A low-inductance, low-resistance PCB layout is essential.
Any common GND path for the two sense resistors must be avoided, because this would lead to coupling between the two current sense signals. A massive ground plane is best. When using high currents or long motor cables, spike damping with parallel capacitors to ground may be needed, as
shown in Figure 8.1. Because the sense resistor inputs are susceptible to damage from negative
overvoltages, an additional input protection resistor helps protect against a motor cable break or ringing on long motor cables.
MOSFET bridge
SRA
10R to 47R optional input protection resistors
470nF R
SENSE no common GND path not visible to TMC2660
TMC2660
GND
Power supply GND optional filter capacitors
470nF R
SENSE
SRB
10R to 47R
MOSFET bridge
Figure 8.1 Sense resistor grounding and protection components
The sense resistor needs to be able to conduct the peak motor coil current in motor standstill conditions, unless standby power is reduced. Under normal conditions, the sense resistor sees a bit less than the coil RMS current, because no current flows through the sense resistor during the slow decay phases.
The peak sense resistor power dissipation is:
𝑃
𝑅𝑆𝑀𝐴𝑋
=
(𝑉
𝑆𝐸𝑁𝑆𝐸
∗
𝐶𝑆 + 1
32
)
2
𝑅
𝑆𝐸𝑁𝑆𝐸
For high-current applications, power dissipation is halved by using the lower sense resistor voltage setting and the corresponding lower resistance value. In this case, any voltage drop in the PCB traces has a larger influence on the result. A compact power stage layout with massive ground plane is best to avoid parasitic resistance effects. www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 32
9 Chopper Operation
The currents through both motor coils are controlled using choppers. The choppers work
independently of each other. Figure 9.1 shows the three chopper phases:
+V
M
+V
M
+V
M
I
COIL
I
COIL
I
COIL
R
SENSE
R
SENSE
R
SENSE
On Phase: current flows in direction of target current
Figure 9.1 Chopper phases.
Fast Decay Phase: current flows in opposite direction of target current
Slow Decay Phase: current re-circulation
Although the current could be regulated using only on phases and fast decay phases, insertion of the slow decay phase is important to reduce electrical losses and current ripple in the motor. The duration of the slow decay phase is specified in a control parameter and sets an upper limit on the chopper frequency. The current comparator can measure coil current during phases when the current flows through the sense resistor, but not during the slow decay phase, so the slow decay phase is terminated by a timer. The on phase is terminated by the comparator when the current through the coil reaches the target current. The fast decay phase may be terminated by either the comparator or another timer.
When the coil current is switched, spikes at the sense resistors occur due to charging and discharging parasitic capacitances. During this time, typically one or two microseconds, the current cannot be measured. Blanking is the time when the input to the comparator is masked to block these spikes.
There are two chopper modes available: a new high-performance chopper algorithm called spreadCycle and a proven constant off-time chopper mode. The constant off-time mode cycles through three phases: on, fast decay, and slow decay. The spreadCycle mode cycles through four phases: on, slow decay, fast decay, and a second slow decay.
Three parameters are used for controlling both chopper modes:
Parameter
TOFF
Description Setting Comment
Off time. This setting controls the duration of the slow decay time and limits the maximum chopper frequency. For most applications an off time within the range of 5µs to 20µs will fit.
If the value is 0, the MOSFETs are all shut off and the motor can freewheel.
If the value is 1 to 15, the number of system clock cycles in the slow decay phase is:
𝑁
𝐶𝐿𝐾
The SD-Time is
= (𝑇𝑂𝐹𝐹 ∙ 32) + 12
1 𝑡 = 𝑓
𝐶𝐿𝐾
∙ 𝑁
𝐶𝐿𝐾
0
1… 15
Chopper off.
Off time setting.
(1 will work with minimum blank time of 24 clocks.) www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 33
Parameter
TBL
CHM
Description
Blanking time. This time needs to cover the switching event and the duration of the ringing on the sense resistor. For most low-current applications, a setting of 16 or 24 is good. For high-current applications, a setting of 36 or 54 may be required.
Chopper mode bit
Setting Comment
0
1
2
3
0
1
16 system clock cycles
24 system clock cycles
36 system clock cycles
54 system clock cycles spreadCycle mode
Constant off time mode
9.1 spreadCycle Mode
The spreadCycle chopper algorithm (pat.fil.) is a precise and simple to use chopper mode which automatically determines the optimum length for the fast-decay phase. Several parameters are available to optimize the chopper to the application.
Each chopper cycle is comprised of an on phase, a slow decay phase, a fast decay phase and a
second slow decay phase (see Figure 9.2). The slow decay phases limit the maximum chopper
frequency and are important for low motor and driver power dissipation. The hysteresis start setting limits the chopper frequency by forcing the driver to introduce a minimum amount of current ripple into the motor coils. The motor inductance limits the ability of the chopper to follow a changing motor current. The duration of the on phase and the fast decay phase must be longer than the blanking time, because the current comparator is disabled during blanking. This requirement is satisfied by choosing a positive value for the hysteresis as can be estimated by the following calculation: 𝑑𝐼
𝐶𝑂𝐼𝐿𝐵𝐿𝐴𝑁𝐾
= 𝑉
𝑀
∗ 𝑡
𝐵𝐿𝐴𝑁𝐾
𝐿
𝐶𝑂𝐼𝐿 𝑑𝐼
𝐶𝑂𝐼𝐿𝑆𝐷
= 𝑅
𝐶𝑂𝐼𝐿
∗ 𝐼
𝐶𝑂𝐼𝐿
∗ where:
dI
COILBLANK
is the coil current change during the blanking time.
2 ∗ 𝑡
𝑆𝐷
𝐿
𝐶𝑂𝐼𝐿
dI
COILSD
is the coil current change during the slow decay time.
t
SD
is the slow decay time.
t
BLANK
is the blanking time (as set by TBL).
V
M
is the motor supply voltage.
I
COIL
is the peak motor coil current at the maximum motor current setting CS.
R
COIL
and L
COIL
are motor coil inductance and motor coil resistance.
With this, a lower limit for the start hysteresis setting can be determined:
2 ∗ 248
𝐻𝑦𝑠𝑡𝑒𝑟𝑒𝑠𝑖𝑠 𝑆𝑡𝑎𝑟𝑡 ≥ (𝑑𝐼
𝐶𝑂𝐼𝐿𝐵𝐿𝐴𝑁𝐾
+ 𝑑𝐼
𝐶𝑂𝐼𝐿𝑆𝐷
) ∗
𝐼
𝐶𝑂𝐼𝐿
∗
Example:
𝐶𝑆 + 1
32
For a 42mm stepper motor with 7.5mH, 4.5Ω phase, and 1A RMS current at CS=31, i.e. 1.41A peak current, at 24V with a blank time of 1.5µs: 𝑑𝐼
𝐶𝑂𝐼𝐿𝐵𝐿𝐴𝑁𝐾
2µ𝑠
= 24𝑉 ∗
7.5𝑚𝐻
= 6.4𝑚𝐴 𝑑𝐼
𝐶𝑂𝐼𝐿𝑆𝐷
= 4.5Ω ∗ 1.41𝐴 ∗
2 ∗ 5µ𝑠
7.5𝑚𝐻
= 8.5𝑚𝐴
With this, the minimum hysteresis start setting is 5.2. A value in the range 6 to 10 can be used. www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 34
An Excel spreadsheet is provided for performing these calculations.
As experiments show, the setting is quite independent of the motor, because higher current motors typically also have a lower coil resistance. Choosing a medium default value for the hysteresis (for example, effective HSTRT+HEND=10) normally fits most applications. The setting can be optimized by experimenting with the motor: A too low setting will result in reduced microstep accuracy, while a too high setting will lead to more chopper noise and motor power dissipation. When measuring the sense resistor voltage in motor standstill at a medium coil current with an oscilloscope, a too low setting shows a fast decay phase not longer than the blanking time. When the fast decay time becomes slightly longer than the blanking time, the setting is optimum. You can reduce the off-time setting, if this is hard to reach.
The hysteresis principle could in some cases lead to the chopper frequency becoming too low, for example when the coil resistance is high compared to the supply voltage. This is avoided by splitting the hysteresis setting into a start setting (HSTRT+HEND) and an end setting (HEND). An automatic hysteresis decrementer (HDEC) interpolates between these settings, by decrementing the hysteresis value stepwise each 16, 32, 48, or 64 system clock cycles. At the beginning of each chopper cycle, the hysteresis begins with a value which is the sum of the start and the end values (HSTRT+HEND), and decrements during the cycle, until either the chopper cycle ends or the hysteresis end value (HEND) is reached. This way, the chopper frequency is stabilized at high amplitudes and low supply voltage situations, if the frequency gets too low. This avoids the frequency reaching the audible range.
I
target current + hysteresis start target current + hysteresis end target current target current - hysteresis end target current - hysteresis start
HDEC
on sd fd sd t
Figure 9.2 spreadCycle chopper mode showing the coil current during a chopper cycle
Three parameters control spreadCycle mode:
Parameter Description
HSTRT
HEND
Hysteresis start setting. Please remark, that this value is an offset to the hysteresis end value
HEND.
Hysteresis end setting. Sets the hysteresis end value after a number of decrements. Decrement interval time is controlled by HDEC. The sum
HSTRT+HEND must be <16. At a current setting CS of max. 30 (amplitude reduced to 240), the sum is not limited.
Setting Comment
0… 7
0… 2
3
4… 15
This setting adds to
HEND.
%000: 1 %100: 5
%001: 2 %101: 6
%010: 3 %110: 7
%011: 4 %111: 8
Negative HEND: -3… -1
%0000: -3
%0001: -2
%0010: -1
Zero HEND: 0
%0011: 0
Positive HEND: 1… 12
%0100: 1 %1010: 7 1100: 9
%0101: 2 %1011: 8 1101: 10
%0110: 3 %1100: 9 1110: 11
%0111: 4 %1101: 10
%1000: 5 %1110: 11
%1001: 6 %1111: 12 www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 35
Parameter Description Setting Comment
HDEC Hysteresis decrement setting. This setting determines the slope of the hysteresis during on time and during fast decay time. It sets the number of system clocks for each decrement.
0… 3 0: fast decrement
3: very slow decrement
%00: 16
%01: 32
%10: 48
%11: 64
Example:
In the example above, a hysteresis start of 7 has been chosen. The hysteresis end is set to about half of this value, 3. The resulting configuration register values are:
HEND=6 (sets an effective end value of 3)
HSTRT=3 (sets an effective start value of hysteresis end +4)
HDEC=0 (Hysteresis decrement becomes used)
9.2 Constant Off-Time Mode
The classic constant off-time chopper uses a fixed-time fast decay following each on phase. While the duration of the on phase is determined by the chopper comparator, the fast decay time needs to be fast enough for the driver to follow the falling slope of the sine wave, but it should not be so long that it causes excess motor current ripple and power dissipation. This can be tuned using an oscilloscope or evaluating motor smoothness at different velocities. A good starting value is a fast decay time setting similar to the slow decay time setting.
I
target current + offset mean value = target current
on fd sd on fd sd t
Figure 9.3 Constant off-time chopper with offset showing the coil current during two cycles,
After tuning the fast decay time, the offset should be tuned for a smooth zero crossing. This is necessary because the fast decay phase makes the absolute value of the motor current lower than the
during current zero crossing. If it is set too high, it makes a larger microstep. Typically, a positive offset setting is required for smoothest operation.
Target current Target current
I I
Coil current Coil current t t
Coil current does not have optimum shape Target current corrected for optimum shape of coil current
Figure 9.4 Zero crossing with correction using sine wave offset.
www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 36
Three parameters control constant off-time mode:
Parameter Description
TFD
(HSTART &
HDEC0)
OFFSET
(HEND)
NCCFD
(HDEC1)
Fast decay time setting. With CHM=1, these bits control the portion of fast decay for each chopper cycle.
Sine wave offset. With CHM=1, these bits control the sine wave offset. A positive offset corrects for zero crossing error.
0
1… 15
Selects usage of the current comparator for termination of the fast decay cycle. If current comparator is enabled, it terminates the fast decay cycle in case the current reaches a higher negative value than the actual positive value.
1
0…2
3
4… 15
0
Setting Comment
Slow decay only.
Duration of fast decay phase.
Negative offset: -3… -1
No offset: 0
Positive offset: 1… 12
Enable comparator termination of fast decay cycle.
End by time only.
9.2.1 Random Off Time
In the constant off-time chopper mode, both coil choppers run freely without synchronization. The frequency of each chopper mainly depends on the coil current and the motor coil inductance. The inductance varies with the microstep position. With some motors, a slightly audible beat can occur between the chopper frequencies when they are close together. This typically occurs at a few microstep positions within each quarter wave. This effect is usually not audible when compared to mechanical noise generated by ball bearings, etc. Another factor which can cause a similar effect is a poor layout of the sense resistor GND connections.
A common cause of motor noise is a bad PCB layout causing coupling of both sense resistor voltages.
To minimize the effect of a beat between both chopper frequencies, an internal random generator is provided. It modulates the slow decay time setting when switched on by the RNDTF bit. The RNDTF feature further spreads the chopper spectrum, reducing electromagnetic emission on single frequencies.
Parameter
RNDTF
Description
Enables a random off-time generator, which slightly modulates the off time t
OFF random polynomial.
using a
0
1
Setting Comment
Disable.
Random modulation enable. www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 37
10 Power MOSFET Stage
The gate current for the power MOSFETs can be adapted to influence the slew rate at the coil outputs.
The main features of the stage are:
-
5V gate drive voltage for low-side N-MOS transistors, 8V for high-side P-MOS transistors.
-
The gate drivers protect the bridges actively against cross-conduction using an internal Q
GD protection that holds the MOSFETs safely off.
-
Automatic break-before-make logic minimizes dead time and diode-conduction time.
-
Integrated short to ground protection detects a short of the motor wires and protects the
MOSFETs.
The low-side gate driver is supplied by the 5VOUT pin. The low-side driver supplies 0V to the MOSFET gate to close the MOSFET, and 5VOUT to open it. The high-side gate driver voltage is supplied by the
VS and the VHS pin. VHS is more negative than VS and allows opening the VS referenced high-side
MOSFET. The high-side driver supplies VS to the P channel MOSFET gate to close the MOSFET and VHS to open it. The effective low-side gate voltage is roughly 5V; the effective high-side gate voltage is roughly 8V.
Parameter
SLPL
SLPH
Description
Low-side slope control. Controls the MOSFET gate driver current.
Set to 0, 1 or 2. Use fastest slope to minimize package power dissipation.
High-side slope control. Controls the MOSFET gate driver current.
For the TMC2660 set identical to SLPL to match
LS slope.
0… 3
0… 3
Setting Comment
%00: Minimum.
%01: Minimum.
%10: Medium.
%11: Maximum.
%00: Minimum.
%01: Minimum+TC.
%10: Medium+TC.
%11: Maximum.
10.1 Break-Before-Make Logic
Each half-bridge has to be protected against cross-conduction during switching events. When switching off the low-side MOSFET, its gate first needs to be discharged before the high-side MOSFET is allowed to switch on. The same goes when switching off the high-side MOSFET and switching on the low-side MOSFET. The time for charging and discharging of the MOSFET gates depends on the
MOSFET gate charge and the gate driver current set by SLPL and SLPH. The BBM (break-before-make) logic measures the gate voltage and automatically delays turning on the opposite bridge transistor until its counterpart is discharged. This way, the bridge will always switch with optimized timing independent of the slope setting.
10.2 ENN Input
The MOSFETs can be completely disabled in hardware by pulling the ENN input high. This allows the motor to free-wheel. An equivalent function can be performed in software by setting the parameter
TOFF to zero. The hardware disable is available for allowing the motor to be hot plugged. For the
TMC2660, it can be used in overvoltage situations. The TMC2660 can withstand voltages of up to 60V when the MOSFETs are disabled. If a hardware disable function is not needed, tie ENN low. www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 38
11 Diagnostics and Protection
11.1 Short to GND Detection
The short to ground detection prevents the high-side power MOSFETs from being damaged by accidentally shorting the motor outputs to ground. It disables the MOSFETs only if a short condition persists. A temporary event like an ESD event could look like a short, but these events are filtered out by requiring the event to persist.
When a short is detected, the bridge is switched off immediately, the chopper cycle on the affected coil is terminated, and the short counter is incremented. The counter is decremented for each phase polarity change. The MOSFETs are shut off when the counter reaches 3 and remain shut off until the short condition is cleared by disabling the driver and re-enabling it.
The short to ground detection status is indicated by two bits:
Status Description Range Comment
S2GA
S2GB
These bits identify a short to GND condition on coil A and coil B persisting for multiple chopper cycles. The bits are cleared when the MOSFETs are disabled.
0 / 1 0: No short condition detected.
1: Short condition detected.
An overload condition on the high-side MOSFET (short to GND) is detected by monitoring the coil voltage during the high-side on phase. Under normal conditions, the high-side power MOSFET reaches the bridge supply voltage minus a small voltage drop during the on phase. If the bridge is overloaded, the voltage cannot rise to the detection level within the time defined by the internal detection delay setting. When an overload is detected, the bridge is switched off. The short to GND detection delay needs to be adjusted for the slope time, because it must be longer than slope, but should not be unnecessarily long.
Hxy 0V
BMxy
V
VS
V
VS
-
V
BMS2G
0V
Valid area
Short detection
Short to GND detected
Driver enabled
0V
Driver off
t
S2G inactive delay Short detected
t
S2G
Short to GND monitor phase
inactive delay
Figure 11.1 Short to GND detection timing.
BM voltage monitored www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 39
The short to ground detector is controlled by a mode bit and a parameter:
Mode bit /
Parameter
DISS2G
Description
Short to ground detection disable bit.
Setting
0/1
Comment
0: Short to ground detection enabled.
1: Short to ground detection disabled.
TS2G This setting controls the short to GND detection delay time. It needs to cover the switching slope time. A higher setting reduces sensitivity to capacitive loads.
0… 3 %00: 3.2µs.
%01: 1.6µs.
%10: 1.2µs.
%11: 0.8µs.
11.2 Open-Load Detection
The open-load detection determines whether a motor coil has an open condition, for example due to a loose contact. When driving in fullstep mode, the open-load detection will also signal when the motor current cannot be reached within each step, for example due to a too-high motor velocity in which the back EMF voltage exceeds the supply voltage. The detection bit is only for information, and no other action is performed by the chip. Assertion of an open-load condition does not always indicate that the motor is not working properly. The bit is updated during normal operation whenever the polarity of the respective coil toggles.
The open-load detection status is indicated by two bits:
Status flag
OLA
OLB
Description Range
These bits indicate an open-load condition on coil A and coil B. The flags become set, if no chopper event has happened during the last period with constant coil polarity. The flag is not updated with too low actual coil current below
1/16 of maximum setting.
0 / 1
11.3 Overtemperature Detection
Comment
0: No open-load detected
1: Open-load detected
The TMC2660 integrates a two-level temperature sensor (100°C warning and 150°C shutdown) for diagnostics and for protection of the power MOSFETs. The temperature detector can be triggered by heat accumulation on the board, for example due to missing convection cooling. Most critical situations, in which the MOSFETs could be overheated, are avoided when using the short to ground protection. For most applications, the overtemperature warning indicates an abnormal operation situation and can be used to trigger an alarm or power-reduction measures. If continuous operation in hot environments is necessary, a more precise mechanism based on temperature measurement should be used. The thermal shutdown is strictly an emergency measure and temperature rising to the shutdown level should be prevented by design. The shutdown temperature is above the specified operating temperature range of the chip.
The high-side P-channel gate drivers have a temperature dependency which can be compensated to some extent by increasing the gate driver current when the warning temperature threshold is reached. The chip automatically corrects for the temperature dependency above the warning temperature when the temperature-compensated modes of SLPH is used. In these modes, the gate driver current is increased by one step when the temperature warning threshold is reached. www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 40
Status
OTPW
OT
Description Range
Overtemperature warning. This bit indicates whether the warning threshold is reached.
Software can react to this setting by reducing current.
Overtemperature shutdown. This bit indicates whether the shutdown threshold has been reached and the driver has been disabled.
0 / 1
0 / 1
11.4 Undervoltage Detection
Comment
1: temperature prewarning level reached
1: driver shut down due to overtemperature
The undervoltage detector monitors both the internal logic supply voltage and the supply voltage. It prevents operation of the chip when the MOSFETs cannot be guaranteed to operate properly because the gate drive voltage is too low. It also initializes the chip at power up.
In undervoltage conditions, the logic control block becomes reset and the driver is disabled. All
MOSFETs are switched off. All internal registers are reset to zero. Software also should monitor the supply voltage to detect an undervoltage condition. If software cannot measure the supply voltage, an undervoltage condition can be detected when the response to an SPI command returns only zero bits in the response and no bits are shifted through the internal shift register from SDI to SDO. After a reset due to undervoltage occurs, the CS parameter is cleared, which is reflected in an SE status of 0 in the read response.
V
VS
V
UV ca. 100µs ca. 100µs
Time
Device in reset: all registers cleared to 0
Reset
Figure 11.2 Undervoltage reset timing
Note: Be sure to operate the IC significantly above the undervoltage threshold to ensure reliable operation! Check for SE reading back as zero to detect an undervoltage event.
www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 41
12 Power Supply Sequencing
The TMC2660 generates its own 5V supply for all internal operations. The internal reset of the chip is derived from the supply voltage regulators in order to ensure a clean start-up of the device after power up. During start up, the SPI unit is in reset and cannot be addressed. All registers become cleared.
VCC_IO limits the voltage allowable on the inputs and outputs and is used for driving the outputs, but input levels thresholds are not depending on the actual level of VCC_IO. Therefore, the startup sequence of the VCC_IO power supply with respect to VS is not important.
13 System Clock
The clock is the timing reference for all functions. The internal system clock frequency for all operations is nominally 15MHz. An external clock of 10MHz to 20MHz can be supplied for more exact timing, especially when using coolStep and stallGuard2.
U
SING THE INTERNAL CLOCK FREQUENCY
To use the on-chip oscillator of the TMC2660, tie CLK to GND near the chip. The actual on-chip oscillator clock frequency can be determined by measuring the delay time between the last step and assertion of the STST (standstill) status bit, which is 2 20 clocks. There is some delay in reading the
STST bit through the SPI interface, but it is easily possible to measure the oscillator frequency within
1%. Chopper timing parameters can then be corrected using this measurement, because the oscillator is relatively stable over a wide range of environmental temperatures.
In case well defined precise motor chopper operation are desired, it is supposed to work with an external clock source.
U
SING THE EXTERNAL CLOCK FREQUENCY
An external clock frequency of up to 20MHz can be supplied. It is recommended to use an external clock frequency between 10MHz and 16MHz for best performance. The external clock is enabled and the on-chip oscillator is disabled with the first logic high driven on the CLK input.
Attention:
Never leave the external clock input floating. It is not allowed to remain within the transition region
(between valid low and high levels), as spurious clock signals might corrupt internal logic state.
Provide an external pull down resistor, in case the driver pin (i.e. microcontroller output) does not provide a safe level directly after power up. When repeatedly starting and stopping the clock, a clean clock switch over is important in order to avoid any clock period shorter than the minimum clock time.
If the external clock is suspended or disabled after the internal oscillator has been disabled, the chip will not operate. Be careful to switch off the power MOSFETs (by driving the ENN input high or setting the TOFF parameter to 0) before switching off the clock, because otherwise the chopper would stop and the motor current level could rise uncontrolled. If the short to GND detection is enabled, it stays active even without clock. www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14)
V
VCC_IO
3.3V/5V
V
INHI
V
CLK
V
VS
V
UV
Defined clock, no intermediate levels allowed max. VCC_IO
42
Device in reset: all registers cleared to 0
Operation, CLK is not allowed to have undefined levels between V
INLO
and V
INHI
and timing must satisfy T
CLK
(min)
Figure 13.1 Start-up requirements of CLK input
Device in reset: all registers cleared to 0
Time
13.1 Frequency Selection
A higher frequency allows faster step rates, faster SPI operation, and higher chopper frequencies. On the other hand, it may cause more electromagnetic emission and more power dissipation in the digital logic. Generally, a system clock frequency of 10MHz to 16MHz should be sufficient for most applications, unless the motor is to operate at the highest velocities. If the application can tolerate reduced motor velocity and increased chopper noise, a clock frequency of 4MHz to 10MHz should be considered. www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 43
14 Layout Considerations
The PCB layout is critical to good performance, because the environment includes both highsensitivity analog signals and high-current motor drive signals.
14.1 Sense Resistors
The sense resistors are susceptible to ground differences and ground ripple voltage, as the microstep current steps result in voltages down to 0.5mV. No current other than the sense resistor currents should flow through their connections to ground. Place the sense resistors close to chip with one or more vias to the ground plane for each sense resistor.
The sense resistor layout is also sensitive to coupling between the axes. The two sense resistors should not share a common ground connection trace or vias, because PCB traces have some resistance.
14.2 Power MOSFET Outputs
The OA and OB dual pin outputs on the TMC2660 are directly connected electrically and thermally to the drain of the MOSFETs of the power stage. A symmetrical, thermally optimized layout is required to ensure proper heat dissipation of all MOSFETs into the PCB. Use thick traces and areas for vertical heat transfer into the GND plane and enough vias for the motor outputs.
The printed circuit board should have a solid ground plane spreading heat into the board and providing for a stable GND reference. All signals of the TMC2660 are referenced to GND. Directly connect all GND pins to a common ground area.
The switching motor coil outputs have a high dV/dt, so stray capacitive coupling into high-impedance signals can occur, if the motor traces are parallel to other traces over long distances.
14.3 Power Supply Pins
Both, the VSA and VSB pins, as well as the BRA and BRB pins conduct the full motor current for a limited amount of time during each chopper cycle. Due to the resistance of bond wires connected to these pins, the pins heat up. Therefore it is essential for current capability above 2A RMS to use a wide PCB trace for cooing and in order to avoid additional heat up of the pins caused by PCB trace resistance. This is simplified by also contacting the N.C. pins located next to VSA and VSB to the supply voltage. Failure to do so might affect reliability; despite heat-up of bond wires might not be visible with a thermal camera.
14.4 Power Filtering
The 470nF ceramic filtering capacitor on 5VOUT should be placed as close as possible to the 5VOUT pin, with its GND return going directly to the nearest GND pin. Use as short and as thick connections as possible. A 100nF filtering capacitor should be placed as close as possible from the VS pin to the ground plane. The motor supply pins, VSA and VSB, should be decoupled with an electrolytic (>47 μF is recommended) capacitor and a ceramic capacitor, placed close to the device. www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 44
14.5 Layout Example
E
XAMPLE FOR UP TO
2.8A
RMS
Here, an example for a layout with small board size (≈20cm²) is shown. See also the evaluation board.
top layer (assembly side) inner layer inner layer bottom layer (solder side)
Figure 14.1 Layout example for TMC2660
www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 45
15 Absolute Maximum Ratings
The maximum ratings may not be exceeded under any circumstances. Operating the circuit at or near more than one maximum rating at a time for extended periods shall be avoided by application design.
Parameter Symbol Min Max Unit
Supply voltage
Supply voltage when disabled (ENN V
Logic supply voltage
I/O supply voltage
Logic input voltage
Analog input voltage
Maximum current to/from digital pins and analog low voltage I/Os
VIO
) with I
OXX
=0
Relative high-side gate driver voltage (V
VM
– V
HS
)
Non-destructive short time peak current into input/output pins
V
VS
V
VSDIS
V
VCC
V
VIO
V
I
V
IA
V
HSVM
I
IO
-0.5
-0.5
-0.5
30
60
6.0
6.0
-0.5 V
VIO
+0.5
-0.5
-0.5
V
CC
+0.5
15
+/-10
500
V
V
V
V
V
V
V mA
Bridge output peak current (10µs pulse)
Output current, RMS per coil,
T
A
≤ 50°C
20cm² board with sample layout,
≤40kHz chopper, fastest slope
Output current, RMS per coil,
T
A
≤ 50°C
50cm² board with sample layout
≤40kHz chopper, fastest slope running >4 fullsteps/s duty cycle 2s on 6s off standstill, single coil on
(halfstep position) *) running >4 fullsteps/s duty cycle 2s on 6s off standstill, single coil on
(halfstep position) *)
I
IO
I
OP
I
OC
I
OC
+/-7
2.0
2.5
2.2
2.2
2.8
2.4 mA
A
A
A
Output current, RMS per coil,
T
A
≤ 85°C
20cm² board with sample layout,
≤40kHz chopper, fastest slope running >4 fullsteps/s duty cycle 2s on 6s off standstill, single coil on
(halfstep position) *) running >4 fullsteps/s
I
OC
1.6
2.0
1.8
A
Output current, RMS per coil,
T
A
≤ 85°C
50cm² board with sample layout
≤40kHz chopper, fastest slope duty cycle 2s on 6s off standstill, single coil on
(halfstep position) *)
I
OC
1.8
2.3
2.0
A
5V regulator output current
5V regulator peak power dissipation (V
Junction temperature
Storage temperature
VM
-5V) * I
5VOUT
I
5VOUT
P
5VOUT
T
J
T
STG
-50
-55
50
1
150
150 mA
W
°C
°C
ESD-Protection (Human body model, HBM), in application V
ESDAP
1 kV
ESD-Protection (Human body model, HBM), device handling V
ESDDH
300 V
*) The standstill specification refers to a stepper motor stopped at a high current. Normally, standstill current should be reduced to a value far below the run current to reduce motor heating. www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 46
16 Electrical Characteristics
16.1 Operational Range
Parameter
Junction temperature
Supply voltage TMC2660
I/O supply voltage
16.2 DC and AC Specifications
Symbol Min
T
J
V
VS
V
VIO
-40
9
3.00
Max
125
29
5.25
Unit
°C
V
V
DC characteristics contain the spread of values guaranteed within the specified supply voltage range unless otherwise specified. Typical values represent the average value of all parts measured at +25°C.
Temperature variation also causes some values to stray. A device with typical values will not leave
Min/Max range within the full temperature range.
Power Supply Current
Parameter
DC Characteristics
V
VS
= 24.0V
Symbol Conditions Min Typ Max Unit
12 mA Supply current, operating
Supply current, MOSFETs off
Supply current, MOSFETs off, dependency on CLK frequency
Static supply current
I
VS f
CLK
=16MHz, 40kHz chopper, Q
G
=10nC
I
VS f
CLK
=16MHz
I
VS f
CLK
variable
additional to I
VS0
I
VS0 f
CLK
=0Hz, digital inputs at +5V or GND
I
VSHV
MOSFETs off Part of supply current NOT consumed from 5V supply
IO supply current I
VIO
No load on outputs, inputs at V
IO
or GND
High-Side Voltage Regulator DC Characteristics
V
VS
= 24.0V
Parameter Symbol Conditions
Output voltage (V
VM
– V
HS
) V
HSVM
I
OUT
= 0mA
T
J
= 25°C
R
VHS
Static load
V
VHS(DEV)
T
J
= full range
Min
9.3
10
0.32
3.2
1.2
0.3
Typ
10.0
50
60
4
Max
10.8
200 mA mA/
MHz mA mA
µA
Unit
V
mV
Output resistance
Deviation of output voltage over the full temperature range
DC Output current
Current limit
Series regulator transistor output resistance (determines voltage drop at low supply voltages)
I
VHS
(from VM to VHS)
I
VHSMAX
(from VM to VHS)
R
VHSLV
15
400
4
1000 mA mA
www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14)
Internal MOSFETs TMC2660
Parameter
N-channel MOSFET on resistance
P-channel MOSFET on resistance
N-channel MOSFET on resistance
P-channel MOSFET on resistance
Linear Regulator
Parameter
Output voltage
Output resistance
Deviation of output voltage over the full temperature range
Output current capability
(attention, do not exceed maximum ratings with DC current)
Clock Oscillator and CLK
Input
Parameter
Clock oscillator frequency
Clock oscillator frequency
Clock oscillator frequency
External clock frequency
(operating)
External clock high / low level time
DC Characteristics
V
VS
= V
VSX
≥ 12.0V, V
BRX
= 0V
Symbol Conditions
R
R
R
R
ONN
ONP
ONN
ONP
T
J
T
T
J
T
J
J
= 25°C
= 25°C
= 150°C
= 150°C
DC Characteristics
Symbol Conditions
V
5VOUT
I
5VOUT
= 10mA
T
J
= 25°C
R
5VOUT
Static load
V
5VOUT(DEV)
I
5VOUT
= 10mA
T
J
= full range
I
5VOUT
V
V
V
VS
VS
VS
= 12V
= 8V
= 6.5V
Timing Characteristics
Symbol Conditions
f
CLKOSC
t
J
=-50°C f
CLKOSC
t
J
=50°C f
CLKOSC
t
J
=150°C f
CLK t
CLK
Min
Min
4.75
100
60
20
Typ
63
93
110
160
Typ
5.0
3
30
Max
76
110
Max Unit
5.25 V
60
47
mV mA mA mA
Min
10.0
10.8
4
12
Typ
14.3
15.2
15.4
Max Unit
20.0
20.3
20
MHz
MHz
MHz
MHz ns
Unit
mΩ mΩ mΩ mΩ www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 48
Detector Levels
Parameter
V
VS
undervoltage threshold
Short to GND detector threshold
(V
VS
- V
BMx
)
Short to GND detector delay
(low-side gate off detected to short detection)
DC Characteristics
Symbol Conditions
V
UV
V
BMS2G
Min
6.5
1.0
Typ
8
1.5
Max Unit
8.5
2.3
V
V t
S2G
TS2G=00
TS2G=10
TS2G=01
2.0 3.2
1.6
1.2
4.5 µs
µs
µs
TS2G=11
Overtemperature warning
Overtemperature shutdown t
OTPW t
OT
Temperature rising
Sense Resistor Voltage Levels DC Characteristics
Parameter
Sense input peak threshold voltage (low sensitivity)
Sense input peak threshold voltage (high sensitivity)
Digital Logic Levels
Symbol Conditions
V
SRTRIPL
VSENSE=0
Cx=248; Hyst.=0
V
SRTRIPH
VSENSE=1
Cx=248; Hyst.=0
DC Characteristics
80
135
Min
290
153
0.8
100
150
Typ
310
165
120
170
Max
330
180
µs
°C
°C
Unit
mV mV
Parameter Symbol Conditions Min Typ Max Unit
Input voltage low level
Input voltage high level d)
Output voltage low level d)
Output voltage high level
V
INLO
V
INHI
V
OUTLO
I
OUTLO
= 1mA
V
OUTHI
I
OUTHI
= -1mA
-0.3
2.4
0.8V
VIO
0.8
V
VIO
+0.3
0.4
V
V
V
V
Input leakage current I
ILEAK
-10 10 µA
Note
Digital inputs left within or near the transition region substantially increase power supply current by drawing power from the internal 5V regulator. Make sure that digital inputs become driven near to 0V and up to the V
IO
I/O voltage. There are no on-chip pull-up or pull-down resistors on inputs. www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 49
16.3 Thermal Characteristics
Parameter Symbol Conditions Typ Unit
Thermal resistance bridge transistor junction to ambient, soldered to 4 layer 20cm² PCB
(or 20cm² size per driver IC for multiple driver board)
Thermal resistance bridge transistor junction to ambient, soldered to 4 layer 50cm² PCB
Power dissipation in power
R
THA14
one bridge chopping, fixed polarity
R
THA24
two bridges chopping, fixed polarity
R
R
THA44
THA44a
Motor running
Motor running
80
50
37
28
K/W
K/W
K/W
K/W bridge MOSFETs
(MOSFETs at 125°C)
P
BRIDGES
2A RMS per coil
P
BRIDGES
2.2A RMS per coil
P
BRIDGES
2.8A RMS per coil
2.6
3.2
5.0
W
W
W
24V, 30kHz chopper, fast slope
Additional power dissipation P
CORE
24V supply, 16MHz f
CLK
0.28 W from core
Especially when device is to be operated near its maximum thermal limits, care has to be taken to provide a good thermal design of the PCB layout in order to avoid overheating of the power MOSFETs integrated into the TMC2660. As the TMC2660 use discrete MOSFETs, power dissipation in each MOSFET needs to be looked over carefully. The actual values depend on the duty cycle and the die temperature. The thermal characteristics and the sample layout are intended as a guideline for your own board layout. In case, the driver is to be operated at high current levels, special care should be taken to spread the heat generated by the driver power bridges efficiently within the PCB.
Worst case power dissipation for the individual MOSFET is in standstill or at low velocity, with one coil operating at the maximum current, because one full bridge in this case takes over the full current.
This scenario can be avoided with power down current reduction and current reduction in case slow movements are required. As the single MOSFET temperatures cannot be monitored within the system, it is a good practice to react to the temperature pre-warning by reducing motor current, rather than relying on the overtemperature switch off.
The MOSFET and bond wire temperature should not exceed 150°C, despite temperatures up to 200°C will not immediately destroy the devices. But the package plastics will apply strain onto the bond wires, so that cyclic, repetitive exposure to temperatures above 150°C may damage the electrical contacts and increase contact resistance and eventually lead to contract break.
Check MOSFET temperature under worst case conditions not to exceed 150°C using a thermal camera to validate your layout. Please carefully check your layout against the sample layout or the layout of the TMC2660-Evaluation board on the TRINAMIC website in order to ensure proper cooling of the IC!
Figure 16.1 TMC2660 operating at 2.3A RMS (3.2A peak) on a 50cm² sized board
www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14)
17 Package Mechanical Data
17.1 Dimensional Drawings
Attention: Drawings not to scale.
C
I
H K
Figure 17.1 Dimensional drawings (PQFP44)
Parameter Ref
Size over pins (X and Y) A
Body size (X and Y) C
Pin length
Total thickness
Lead frame thickness
Stand off
Pin width
Flat lead length
Pitch
Coplanarity
K ccc
D
E
F
G
H
I
17.2 Package Code
Min Nom Max
0.09
0.05
0.30
0.45
12
10
1
0.10
0.8
1.6
0.2
0.15
0.45
0.75
0.08
Device
TMC2660
Package
PQFP44 (RoHS)
Temperature range Code/marking
-40° to +125°C TMC2660-PA
50 www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 51
18 Disclaimer
TRINAMIC Motion Control GmbH & Co. KG does not authorize or warrant any of its products for use in life support systems, without the specific written consent of TRINAMIC Motion Control GmbH & Co.
KG. Life support systems are equipment intended to support or sustain life, and whose failure to perform, when properly used in accordance with instructions provided, can be reasonably expected to result in personal injury or death.
Information given in this data sheet is believed to be accurate and reliable. However no responsibility is assumed for the consequences of its use nor for any infringement of patents or other rights of third parties which may result from its use.
Specifications are subject to change without notice.
All trademarks used are property of their respective owners.
19 ESD Sensitive Device
The TMC2660 is a ESD-sensitive CMOS device and sensitive to electrostatic discharge. Take special care to use adequate grounding of personnel and machines in manual handling. After soldering the device to the board, ESD requirements are more relaxed. Failure to do so can result in defects or decreased reliability.
Note: In a modern SMD manufacturing process, ESD voltages well below 100V are standard. A major source for ESD is hot-plugging the motor during operation. As the power MOSFETs are discrete devices, the device in fact is very rugged concerning any ESD event on the motor outputs. All other connections are typically protected due to external circuitry on the PCB.
www.trinamic.com
TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 52
20 Table of Figures
1.03
1.04
1.05
1.06
Figure 18.1 Dimensional drawings (PQFP44) .............................................................................................................. 50
21 Revision History
Version Date
1.00
1.01
Author
SD = Sonja Dwersteg
JP = Jonas Pröger
BD = Bernhard Dwersteg
2013-JUL-30 SD
2013-AUG-01 BD
Description
1.02 2013-OKT-30 SD
2015-FEB-09 JP
2015-OCT-08 BD
2016-JUL-14 BD
2017-JUN-15 BD
First complete version (based on V2.06 TMC260)
Corrected power dissipation values, RDSon and added thermal resistance for sample layout (p. 48, p50)
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Layout example updated, removed second example TMC4210+TMC2660 board
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Photo of evaluation board new.
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Signal descriptions updated.
Corrected MRES table
Hint to TMC2660-Evaluation board layout
Added figure for start-up requirements for CLK input
Updated evaluation board www.trinamic.com
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