RF3334

RF3334

RF3334IF Low

Noise Amplifier/Mixer

RF3334

IF LOW NOISE AMPLIFIER/MIXER

RoHS Compliant & Pb-Free Product

Package Style: QFN, 16-Pin, 4 x 4

Features

„

30dB RF Gain Control

„

40dB IF Gain Control

„

5dB Max. Noise Figure SSB

„

LNA Input Internally Matched to

75

Ω

„

Single 5V Supply

Applications

„

Cable Set Top Box

„

General Purpose Downconverter

„

Commercial and Consumer Systems

RFDEC 1

RFIN 2

GND 3

IFVCC 4

16

5

IF AMP

15

6

14

7

13

8

12 RFAGC

11 MIXLOAD

10 MIXLOADB

9 GND

Functional Block Diagram

Product Description

The RF3334 is an IF LNA/Mixer suitable for downconversion of forward channel control data in a set-top box application. It consists of a single-ended 75

Ω terminated LNA, followed by a differential gain control stage with 30dB of analog gain control and a double-balanced mixer. The mixer load is available via pins 10 and 11 should an external filter be required. The mixer output is connected to an IF amplifier that can be configured from 10dB to 40dB gain with an external resistor. The amplifier is capable of 6V pk-pk output into a 1k

Ω load.

Ordering Information

RF3334 LNA Mixer

RF3334PCBA-41X Fully Assembled Evaluation Board

GaAs HBT

GaAs MESFET

InGaP HBT

Optimum Technology Matching® Applied

9

SiGe BiCMOS

Si BiCMOS

SiGe HBT

GaAs pHEMT

Si CMOS

Si BJT

GaN HEMT

Rev A6 DS061016

RF MICRO DEVICES®, RFMD®, Optimum Technology Matching®, Enabling Wireless Connectivity™, PowerStar®, POLARIS™ TOTAL RADIO™ and UltimateBlue™ are trademarks of RFMD, LLC. BLUETOOTH is a trademark owned by Bluetooth SIG, Inc., U.S.A. and licensed for use by RFMD. All other trade names, trademarks and registered trademarks are the property of their respective owners. ©2006, RF Micro Devices, Inc.

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1 of 12

RF3334

Absolute Maximum Ratings

Parameter

Supply Voltage

IF Input Level

Operating Ambient Temperature

Storage Temperature

Parameter

DC Specifications

Supply Voltage

Supply Current

RFAGC Control Voltage

RFAGC Input Impedance

AC Specifications

LNA+AGC+Mixer

RF Frequency Range

Rating

-0.5 to 7.0

500

-40 to +85

-40 to +150

Min.

Specification

Typ.

Max.

4.75

20

0.5

5

24

5.25

4.5

300

Unit

V

DC mV pp

°C

°C

Caution! ESD sensitive device.

Exceeding any one or a combination of the Absolute Maximum Rating conditions may cause permanent damage to the device. Extended application of Absolute Maximum

Rating conditions to the device may reduce device reliability. Specified typical performance or functional operation of the device under Absolute Maximum Rating conditions is not implied.

RoHS status based on EUDirective2002/95/EC (at time of this document revision).

The information in this publication is believed to be accurate and reliable. However, no responsibility is assumed by RF Micro Devices, Inc. ("RFMD") for its use, nor for any infringement of patents, or other rights of third parties, resulting from its use. No license is granted by implication or otherwise under any patent or patent rights of

RFMD. RFMD reserves the right to change component circuitry, recommended application circuitry and specifications at any time without prior notice.

Unit

V mA

V k

Ω

Condition

0.5V=Minimum Gain

4.5V=Maximum Gain

RF Input 3dB Bandwidth

RF Input Impedance

RF Input VSWR

Mixer Output 3dB Bandwidth

Mixer Output Impedance

Mixer Output VSWR

Maximum Gain

Minimum Gain

Output 1dB Compression

Input IP3, Maximum Gain

Input IP3, Minimum Gain

Noise Figure

27

0 to 700

700

75

1.4

100

300

1.2

30

-2

90

78

79

5

MHz

MHz

On-chip signal path is DC-coupled, minimum frequency depends on external AC coupling components.

On-chip signal path is DC-coupled, minimum frequency depends on external AC coupling components.

Ω

MHz

Ω

At 100MHz

Defined by on-chip first-order low-pass filter

Differential

At 100MHz

RFAGC=4.5V

dB dB RFAGC=0.5V

dB

μV(rms)

Maximum Gain dB

μV(rms)

LNA Input to Mixer Output dB

μV(rms)

LNA Input to Mixer Output dB SSB, Cascaded LNA, AGC & Mixer

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Rev A6 DS061016

RF3334

Parameter

Min.

Specification

Typ.

LO

LO Frequency Range

LO Input Impedance

LO Input VSWR

LO Input Level

LO Bandwidth

LO Rejection to RF Input

LO Rejection to Input of IF Amplifier

IF Amplifier

IF Frequency Range

Input Impedance

Output Impedance

Differential Voltage Gain

Gain Set Resistor=2500

Ω

Gain Set Resistor=140

Ω

Gain Set Resistor=5

Ω

IF 3dB Bandwidth

Equivalent Input Noise

Output Swing

Output 1dB Compression

Output IP3

80

140

0 to 800

75

1.6:1

800

50

65

0 to 120

4000

10

Thermal

Theta

JC

65

Maximum Measured Junction

Temperature at

DC Bias Conditions

95

10

31

40

1.5

6

127

137

Max.

8

Unit

MHz

Ω dBuV

MHz dB dB

Differential

Condition

MHz

Ω

Ω

Differential

Differential dB dB

R1=1k

Ω

R1=1k

Ω dB

MHz

μVrms

R1=1k

Ω

Gain Set=5

Ω

Gain Set=140

Ω

V

P-P dB

μV(rms)

Into 1k

Ω load, at 50MHz dB

μV(rms)

Into 1k

Ω load, at 50MHz

V

CC

=5.25V, VRFAGC=4.5V, I

P

DISS

=154mW

CC

=29mA,

°C/W

°C T

AMB

=+85°C

Rev A6 DS061016

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RF3334

Pin

1

Function Description

RFDEC

External decoupling capacitor for RF single-ended to differential converter.

Interface Schematic

V

CC

3

4

5

2

6

7

8

100

Ω

RFDEC

RF

LNA Input, Internally matched to 75

Ω. Should be AC-coupled.

VBIAS

RF

GND

IFVCC

IFSET

IFSETB

Ground.

5V supply for IF section.

IF Gain select. The resistance between this pin and pin 6 (IFSETB) determines the gain of the IF amplifier. Maximum gain is achieved by placing a short circuit between the pins. Larger values of resistance will reduce the

IF gain according to the following equation where R is the value of resistance between pins 5 and 6. IFGain=20log(1600/(R=75))15.

IFSET

Complementary IF Gain select.

IFSET

IFOUT

IF Amplifier Output. Differential output of the IF amplifier. The differential load across this pin and pin 8 (IFOUTB) should be 1k

Ω or greater for optimal performance. The differential output impedance across this pin and pin 8 in 10

Ω.

VBIAS

IFOUTB

Complementary IF Amplifier Output.

V

CC

V

CC

IFSETB

IFSETB

IF OUT

VBIAS

IF OUTB

9

10

GND

Ground.

MIXLOADB

Complementary Mixer load.

MIXLOAD

MIXLOADB

11 MIXLOAD

Differential output of the RF mixer. A resonant load should be applied to this pin and pin 10 (MIXLOADB) that will act as a bandpass filter at the desired IF frequency. V

CC

should be supplied to this pin via an inductor or a resistor. Use of a resistor will degrade intermodulation performance.

MIXLOAD

MIXLOADB

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Rev A6 DS061016

RF3334

Pin

12

13

14

15

16

GND

Function Description

RFAGC

LO

RF Gain select voltage input. The voltage applied to this pin sets the gain of the RF amplifier. The voltage applied to this pin should be between 0.5V and 4.5V. The RF gain characteristic is such that 0.5V yields a gain of -2dB and 4.5V yields a gain of +30dB as measured from the input of the LNA to the output of the mixer stage.

Differential LO Input. This pin and pin 14 (LOB) are the differential LO inputs. This input should be AC-coupled. The differential input impedance across pins 13 and 14 is 75

Ω. The LO may be driven single ended but will require a higher drive level. If a single ended LO is applied, pin 14 should be AC-coupled to ground.

Interface Schematic

RFAGC

VBIAS

100 k

Ω

300

Ω

LOB

10 k

Ω

75

Ω

300 Ω

LO

LOB

Complementary LO Input. Should be AC-coupled.

300

Ω

LOB

VREF

VBIAS

75 Ω

300

Ω

LO

GND

RFVCC

Paddle

Ground.

5V supply for RF section.

Backside of package should be connected to ground.

-A-

Package Drawing

2 PLCS

0.10 C A

4.00 SQ.

2.00

TYP

0.70

0.65

0.10 C B

2 PLCS

12°

MAX

0.10 C B

2 PLCS

0.10 C A

2 PLCS

3.75 SQ

0.60

0.24

TYP

-B-

1.87

TYP

-C-

Shaded lead is pin 1.

Dim ensions in m m.

0.10

M C A B

0.35

0.23

Pin 1 ID

0.20 R

0.05 C

0.90

0.85

0.05

0.00

SEATING

PLANE

2.25

1.95

SQ.

0.75

0.50

TYP

0.65

Rev A6 DS061016

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5 of 12

RF3334

Pin-Out

RFDEC 1

RFIN 2

GND 3

IFVCC 4

16 15 14 13

12 RFAGC

11 MIXLOAD

10 MIXLOADB

9 GND

5 6 7 8

Application Schematic

LOB LO

RFIN

V

CC

+

1 uF

V

CC

10 nF 10 nF

1 nF

10 nF

10 nF

10 n

10 pF

16 15 14 13

1

2

3

4

IF AMP

5 6 7 8

10

9

12

11

1 k Ω

10 nF

R

C

L

L

V

CC

C

RFAGC

IFOUT IFOUTB

R*

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Rev A6 DS061016

RF3334

Evaluation Board Schematic

50

Ω μstrip

T1 J2

LO

VCC

J3

RF IN

+

50

C1

1 uF

Ω μstrip

C10

1 nF

C2

10 nF

C11

10 pF

16

1

C3

10 nF

VCC

C6

10 nF

J1-1

J1

1

2

VCC

GND

J1-3 3

CON3

RF AGC

2

3

4

R2

140

Ω

5

IF AMP

15 14

6

TTWB-1-A

13

12

11

10

9

7 8

R4

475

Ω

R3

475

Ω

R5

100

Ω

C7

10 n

C9

10 n

R1

1 k

Ω

C4

10 nF

C5

82 pF

L1

120 nH

R6

750

Ω

L2

120 nH

C8

82 pF

RFAGC

VCC

J4

IFOUT

J5

IFOUTB

Rev A6 DS061016

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RF3334

Evaluation Board Layout

Board Size 2.0” x 2.0”

Board Thickness 0.032”, Board Material FR-4, Multi-layer

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Rev A6 DS061016

RF3334

20.0

15.0

10.0

5.0

35.0

LNA + AGC + Mixer Gain versus Control Voltage over

Temperature

(Freq = 100 MHz, V

CC

= 5.0 V)

30.0

25.0

20.0

15.0

10.0

5.0

0.0

-5.0

0.5

35.0

30.0

4.0

-40°C

+25°C

+85°C

4.5

1.0

1.5

2.0

2.5

RFAGC (V)

3.0

3.5

SSB, Cascaded Noise Figure versus Gain over

Temperature

(Freq = 100 MHz, V

CC

= 5.0 V)

-40°C

+25°C

+85°C

25.0

0.0

25.0

30.0

35.0

40.0

45.0

Gain (dB)

50.0

55.0

60.0

LO Input VSWR versus Temperature Across

Temperature

(V

CC

= 5.0 V)

1.75

65.0

1.70

1.65

1.60

1.55

1.50

118.00

128.00

138.00

148.00

158.00

Frequency (MHz)

168.00

-40°C

+25°C

+85°C

178.00

Rev A6 DS061016

7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]

90.0

LNA + AGC + Mixer + IF AMP - IIP3 versus Gain over

Temperature

(Freq = 100 MHz, V

CC

= 5.0 V)

88.0

86.0

84.0

82.0

80.0

78.0

76.0

74.0

72.0

70.0

30.0

35.0

40.0

45.0

50.0

Gain (dB)

55.0

60.0

-40°C

+25°C

+85°C

65.0

1.40

RF Input VSWR versus Frequency Across Temperature

(V

CC

= 5.0 V)

1.38

1.36

1.34

1.32

1.30

1.28

1.26

1.24

1.22

1.20

70.00

80.00

90.00

100.00

110.00

Frequency (MHz)

120.00

-40°C

+25°C

+85°C

130.00

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RF3334

0.2

4

0.

RF Input, Temp = +25°C

.6

0

2.

0

Swp Max

0.2GHz

3.

0

4.0

5.0

10.0

-0.2

-0

.4

-0

.6

-0

.8

.0

-3

.0

-4

.0

-5

0.0

-1

.0

-2

Swp Min

0.05GHz

0.2

4

0.

LO Input, Temp = +25°C

6

0.

2.

0

Swp Max

0.2GHz

3.0

4.0

5.0

10.0

-0.2

-0

.4

-0

.6

-0

.8

0

-3.

0

0

-4.

-5.

.0

-10

.0

-2

Swp Min

0.05GHz

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Rev A6 DS061016

RF3334

PCB Design Requirements

PCB Surface Finish

The PCB surface finish used for RFMD’s qualification process is electroless nickel, immersion gold. Typical thickness is 3

μinch to 8

μinch gold over 180μinch nickel.

PCB Land Pattern Recommendation

PCB land patterns are based on IPC-SM-782 standards when possible. The pad pattern shown has been developed and tested for optimized assembly at RFMD; however, it may require some modifications to address company specific assembly processes. The PCB land pattern has been developed to accommodate lead and package tolerances.

PCB Metal Land Pattern

0.65 Typ.

Pin 16

A = 0.69 x 0.28 (mm) Typ.

B = 0.28 x 0.69 (mm) Typ.

C = 2.40 (mm) Sq.

Dimensions in mm.

1.95 Typ.

B B B B

Pin 1

Pin 12

A A

0.65 Typ.

A A

0.98

1.95 Typ.

A

C

A

A A

0.81 Typ.

B B B B

Pin 8

0.81 Typ.

0.98

Figure 1. PCB Metal Land Pattern (Top View)

Rev A6 DS061016

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RF3334

PCB Solder Mask Pattern

Liquid Photo-Imageable (LPI) solder mask is recommended. The solder mask footprint will match what is shown for the PCB metal land pattern with a 2mil to 3mil expansion to accommodate solder mask registration clearance around all pads. The center-grounding pad shall also have a solder mask clearance. Expansion of the pads to create solder mask clearance can be provided in the master data or requested from the PCB fabrication supplier.

0.65 Typ.

Pin 16

A = 0.79 x 0.38 (mm) Typ.

B = 0.38 x 0.79 (mm) Typ.

C = 2.50 (mm) Sq.

Dimensions in mm.

1.95 Typ.

B B B B

Pin 1

0.65 Typ.

A

Pin 12

A

C

A

A

0.98

1.95 Typ.

A

A

A

A

0.81 Typ.

B B B B

Pin 8

0.81 Typ.

0.98

Figure 2. PCB Solder Mask Pattern (Top View)

Thermal Pad and Via Design

The PCB land pattern has been designed with a thermal pad that matches the die paddle size on the bottom of the device.

Thermal vias are required in the PCB layout to effectively conduct heat away from the package. The via pattern has been designed to address thermal, power dissipation and electrical requirements of the device as well as accommodating routing strategies.

The via pattern used for the RFMD qualification is based on thru-hole vias with 0.203mm to 0.330mm finished hole size on a

0.5mm to 1.2mm grid pattern with 0.025mm plating on via walls. If micro vias are used in a design, it is suggested that the quantity of vias be increased by a 4:1 ratio to achieve similar results.

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Rev A6 DS061016

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