Digi-Key Catalog US2011 Pages 0649-0651 - Digi

Digi-Key Catalog US2011 Pages 0649-0651 - Digi
NEW! Arria® II GX FPGA
Development Kit, 6G Edition
USB-Blaster™ Programming Cable
The USB-Blaster download cable interfaces to a standard USB PC port. The cable is a hardware interface to either a
standard PC or UNIX workstation RS-232 port or a USB port. It provides configuration data to Excalibur™, Mercury™,
APEX™ II, APEX 20K, ACEX® 1K, FLEX® 10K, FLEX 8000 and FLEX 6000 devices and programming data to MAX®
9000, MAX 7000S, MAX 3000A, MAX 7000B and MAX 7000A devices.
544-1775-ND
(PL-USB-BLASTER-RCN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $300.00
ByteBlaster™ Programming Cable
The ByteBlaster cable can program and configure 1.8V, 2.5V, 3.3V and 5.0V devices. The cable also
provides support for active serial programming of serial configuration devices. The cable drives configuration data from
the PC to Stratix®, Stratix GX, Cyclone®, APEX™ II, APEX 20K (including APEX 20K, APEX 20KE, and APEX 20KC),
ACEX® 1K, Mercury™, Excalibur™, FLEX® 10K (including FLEX 10KA and FLEX 10KE), FLEX 8000, and FLEX 6000
devices, as well as programming data to MAX® 9000, MAX 7000S, MAX 7000AE, MAX 7000B, MAX 5000A devices and
EPC/EPCS configuration devices.
544-1289-ND
Parallel-Port Cable (PL-BYTEBLASTER2N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $150.00
NEW! EthernetBlaster™ Cable
The EthernetBlaster communications cable connects to a standard Ethernet network port with an RJ-45 connector. This
cable communicates with client systems using the TCP/IP protocol and supports both static and dynamic IP addressing.
It can be plugged into an existing 10/100 Base-T Ethernet network to communicate with clients remotely or interfaced
directly via a standard 10/100 Base-T Ethernet port using a crossover cable. Because design changes are downloaded
directly to the device, prototyping is easy and you can accomplish multiple design iterations in quick succession.
Harnessing the power of an Ethernet network, multiple users can remotely access Altera devices, bringing a new level of
productivity to prototyping and debugging.
Supported Devices: • Stratix® series FPGAs • Cyclone® series FPGAs • MAX® series CPLDs • APEX™ series FPGAs
• ACEX® 1K FPGAs • Mercury™ FPGAs • FLEX® series FPGAs • Excalibur™ FPGAs • You can perform in-system
programming of the following devices: • Advanced configuration devices, including EPC2, EPC4, EPC8 and EPC16 devices
• Serial configuration devices, including EPCS1, EPCS4, EPCS16, EPCS64 and EPCS128 devices
Power Requirements: The EthernetBlaster communications cable requires between 1.5V and 5.0V from the target circuit
board and 12VDC (0.875A) input power for the EthernetBlaster Vcc supply (12VDC wall transformer is supplied)
Software Requirements: • Windows NT 4.0 • Windows 2000 • Windows XP • Solaris 2.6 • Solaris 2.7/7 • Solaris 8/9
• Red Hat Linux version 7.3 • Red Hat Linux version 8.0 • Red Hat Enterprise Linux WS 3.0 • HP-UX version 11.0
544-2646-ND
Cable Ethernet Programming (PL-ETH2-BLASTER). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $450.00
Altera® Subscription Program
The Altera Subscription Program offers the most recent versions of the Quartus® II and MAX+PLUS® II
software which extends over a duration of a 12 month period. With a valid subscription, the program provides support
for the latest programmable logic devices, new software features, performance enhancements, and up-to-date online and
printed documentation.
544-1247-ND
FIXEDPC (SW-QUARTUS-SE-FIX). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $2995.01
544-2591-ND
(RENEWAL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $2495.00
544-2691-ND
NEW! FIXED PC REPLACEMENT (SWR-QUARTUS-SE-FIX) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $2495.00
544-2692-ND
NEW! FLOATALL REPLACEMENT (SW-QUARTUS-SE-FLT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $2995.01
544-2693-ND
NEW! ADD-FLOATALL REPLACEMENT (SW-QUARTUS-SE-ADD) . . . . . . . . . . . . . . . . . . . . . . . . $3994.99
544-2694-ND
NEW! FLOATALL RENEWAL REPLACEMENT (SWR-QUARTUS-SE-FLT) . . . . . . . . . . . . . . . . . $2495.00
ModelSim® -Altera®
Software
Shorten your FPGA verification time by using the ModelSim® -Altera® software in your FPGA Design Flow. ModelSim-Altera
software supports behavioral and gate-level simulation, including VHDL or Verilog testbenches, for all Altera devices.
544-2590-ND
(SW-MODELSIM-AE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $945.00
Max® II Development Kit
Altera’s MAX II Development Kit 1270 comes with a complete design environment. The kit enables
users to evaluate the MAX II feature set or begin prototyping a design prior to receiving custom hardware. It includes all
software, cables, and accessories needed to ensure an easy and productive evaluation of the MAX II CPLD.
Kit Includes: MAX II Development Board: • MAX II EPM1270F256C5 CPLD • USB media access control (MAC) with
physical layer (PHY) and Type B connector • PCI Edge connector (3.3V and 5V tolerant) • LCD module • SRAM (128K
x 8 bit) • Temperature gauge with serial peripheral interface (SPI) • Onboard power meter • Active I/O sense circuitry
• One 3.3V-tolerant expansion/prototype header (41 available user I/O pins) • JTAG connectors • Four user-defined pushbutton switches • Four user-defined LEDs Quartus® II Web Edition software; Cables and Accessories: • USB-Blaster
download cable • Type A-B USB cable (3 feet) Reference designs and demos for MAX II including: • USB reference
design • PCI reference design • Low power demo • Real-time in-system programmability (ISP) demo
544-2380-ND
(DK-MAXII-1270N). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $150.00
NEW! Arria® II GX FPGA Development Kit
The Arria II GX FPGA Development Kit delivers a complete system-level design environment that
includes both the hardware and software needed to immediately begin developing FPGA designs.
Kit Includes: Arria II GX EP2AGX125EF35 FPGA in the 1152-pin Fine Pitch BGA package: • 124,100
logic elements (LEs) • 49,640 adaptive logic modules (ALMs) • 8,121Kb on-chip memory • 12 high-speed transceivers
• 6 phase-locked loops (PLLs) • 576 18x18 multipliers • 0.9V core power Max® II EPM2210F256 CPLD in the 256-pin
Fine Pitch BGA Package: • 2.5V core power On-board Ports: • One HSMC expansion port • One gigabit Ethernet port
On-board Memory: • 128-MB 16-bit DDR3 device • 1-GB 64-bit DDR2 SODIMM • 2-MB SSRAM • 64-MB flash FPGA
Configuration Circuitry: • MAX II CPLD and flash fast passive parallel configuration • On-board USB-Blaster™ circuitry
using the Quartus II Programmer • On-board clocking circuitry: • Four on-board oscillators: 100 MHz, Programmable
oscillator, default frequency 125 MHz, Programmable oscillator, default frequency 100 MHz, 155.52 MHz • SMA
connectors for external LVPECL clock input • SMA connector for clock output General User I/O: • LEDs/displays:
• Four user LEDs • Two-line character LCD display • One configuration-done LED • One HSMC interface transmit/
receive LED (Tx/Rx) • Three PCI Express LEDs • Five Ethernet LEDs Push-buttons: • One user reset (CPU reset) • One
MAX II CPLD reset • One load image (program FPGA from flash) • One image select (select image to load from flash)
• Two general user push-buttons DIP Switches: • Four user DIP switches • Eight MAX II device control DIP switches
Power Supply: • 14V ~ 20V DC input • PCI Express edge connector power • On-board power measurement circuitry
Mechanical: • PCI Express full-length standard-height (8.48” x 4.376”) • PCI Express chassis or bench-top operation
Arria II GX FPGA Development Kit CD-ROM Design Examples: • Board Update Portal, featuring the Nios® II processor
web server and remote system update • Board test system • Complete documentation Altera’s Complete Design Suite
DVD: • Quartus II Software Development Kit Edition, includes support for Arria II GX FPGAs • Includes one-year license
• Nios II Embedded Design Suite • MegaCore® IP Library includes PCI Express, Triple Speed Ethernet, SDI, and DDR3
High-Performance Controller IP cores: IP evaluation available through OpenCore® Plus Power Adaptor and Cables
544-2600-ND
(DK-DEV-2AGX125N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $1495.00
The Arria II GX FPGA development board, 6G Edition provides a hardware platform for developing and prototyping
low-power, high-performance, and logic-intensive designs. The board provides a wide range of peripherals and memory
interfaces to facilitate the development of the Arria II GX FPGA designs.
Board Features: Arria II GX EP2AGX260FF35 FPGA in the 1152-pin FineLine BGA (FBGA) Package: • 244,188 LEs
• 102,600 adaptive logic modules (ALMs) • 11,756Kbit on-die memory • 16 high-speed transceivers • 6 phase locked
loops (PLLs) • 736 18x18 multipliers • 0.9V core power MAX® II EPM2210F256 CPLD in the 256-pin FBGA Package:
• 2.5V core power FPGA Configuration Circuitry: • MAX II CPLD EPM2210 System Controller and flash fast passive
parallel (FPP) configuration • On-board USB-Blaster™ for use with the Quartus® II Programmer On-Board Ports: • Two
HSMC expansion port • One gigabit Ethernet port On-Board Memory: • 128Mbyte 16-bit DDR3 memory • 1Gbyte 64-bit
DDR2 small outline DIMM (SODIMM) • 2Mbyte Synchronous Static Random Access Memory (SSRAM) • 64Mbyte flash
memory On-Board Clocking Circuitry: • Five on-board oscillator (50MHz oscillator, 100MHz oscillator, 155.52MHz
oscillator, Programmable oscillator with a default frequency of 125MHz, Programmable oscillator with a default frequency
of 100MHz) • SMA connectors for external LVPECL clock input • SMA connector for clock output
General User I/O: • LEDs and displays (Four user LEDs, Two-line character LCD display, Three configuration select LED,
One configuration done LED, Two HSMC interface transmit/receive LED (TX/RX), Three PCI Express LEDs, Five Ethernet
LEDs) • Push-Button switches (One CPU reset push-button switch, One Max II CPLD EPM2210 System Controller
configuration reset push-button switch, One load image push-button switch to program the FPGA from flash memory,
One image select push-button switch select image to load from flash memory, Two general user push-button switches)
• DIP switches (Four user DIP switches, Eight MAX II control DIP switches) • Power supply (14V ~ 20VDC input, PCI
Express edge connector power, On-board power measurement circuitry) • Mechanical (PCI Express full-length standardheight (8.48” x 4.376”), PCI Express chassis or bench-top operation)
544-2696-ND
(DK-DEV-2AGX260N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $3195.27
Cyclone® II FPGA Starter
Development Kit
The low-cost Cyclone II FPGA Starter Development Kit is ideal if you want to evaluate Altera’s high performance, lowpower, 90nm Technology. Several reference designs and demonstrations included in the kit, make for a quick “out-of-thebox” evaluation experience.
Kit Includes:
• Cyclone II Starter Development Board: • Cyclone II EP2C20F484C7N device Configuration: • USB-Blaster™ download
cable (embedded) • EPCS4 serial configuration device Memory: • 8Mbyte SDRAM • 512Kb SRAM • 1 to 4Mbyte flash
Clocking: • SMA connector (external clock input) Audio: • 24-bit coder/decoder (CODEC) Switches and Indicators: • Ten
switch and four push buttons • Four 7-segment displays • Ten red and eight green LEDs Connectors: • VGA, RS-232,
and PS/2 ports • Two 40-pin expansion ports • SD/MMC socket Cables/Power: • USB cable • External power supply
(optional, but recommended when using the kit with additional accessory daughtercards) Cyclone II FPGA Starter
Development Kit CD-ROM: • Reference designs and demonstrations targets for the Cyclone II FPGA Starter Development
Board • User manual • Reference guide • Quartus® II Web Edition CD-ROM • Nios II® Web Edition CD-ROM
544-1736-ND
(DK-CYCII-2C20N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $199.00
Cyclone® III FPGA Starter
Development Kit
The economical Cyclone III FPGA Starter Kit is easy to use and an ideal introduction for users who have never designed
with FPGAs before. The Cyclone III FPGAs are the first low-cost FPGA family available in the marketplace harnessing the
low-power advantages of 65nm process technology.
Kit Includes:
Cyclone III Starter Board: • Cyclone III EP3C25F324 FPGA Configuration: • Embedded USB-Blaster™ circuitry allowing
download of FPGA configuration files via the users USB port Power and Analog Devices from Linear Technology:
• Switching power supply LTM4603EV-1 • Switching and step-down regulators LTC3413, LT1959 Memory: • 256Mbit
DDR SDRAM • 1-Mbyte Synchronous SRAM • 16Mbyte Intel® P30/P33 flash Clocking: • 50MHz on-board oscillator
Switches and Indicators: • Six pushbutton total, 4 user controlled • Seven LEDs total, 4 user controlled Connectors:
• High-Speed Mezzanine Connector • USB type B Cables and Power: • USB cable • External power supply • Cyclone III
FPGA Starter Kit CD-ROM: • Example designs targeting the Cyclone III FPGA Starter Board • Complete Documentation:
• User guide • Reference manual • Board schematic and layout • Bill of Materials • Product and partner information
544-2370-ND
(DK-START-3C25N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $199.00
Cyclone® III Edition DSP
Development Kit
The DSP Development Kit, Cyclone III Edition delivers a complete digital signal processing (DSP) development environment
for design engineers. The kit facilitates the entire design process from design conception through hardware implementation. The DSP Development Kit, Cyclone III Edition includes the Cyclone III development board, the Data Conversion
high-speed mezzanine card (HSMC), the DSP Builder development tool, Quartus® II development software, MATLAB/
Simulink evaluation software, evaluation intellectual property (IP) cores, design examples, power supplies, cables, and
documentation.
Kit Includes:
Cyclone III Development Board: • Cyclone III EP3C120F780 FPGA • 128 x 64 graphics LCD • 2-line x 16-character LCD
• Buttons, dip-switches, LEDs, 7-segment display, speaker header Memory: • 256 Mbytes of dual-channel DDR2 SDRAM
with ECC • 8 Mbytes of synchronous SRAM • 64 Mbytes of flash Components and Interfaces: • 10/100/1000 Ethernet
(RGMII) • USB 2.0 (Type B) • Two high-speed mezzanine (HSMC) connectors Data Conversion HSMC: • Dual 14-bit,
150-MSPS A/D converter • Dual 14-bit, 250-MSPS D/A converter • Audio in/out/mic Cyclone III FPGA Development
Kit, CD-ROM: • Design examples for the Cyclone III FPGA development board • Complete documentation includes: User
guide, Reference manual, Board schematic and layout, Bill of Materials, and Product and partner information MATLAB/
Simulink Evaluation Software Altera® Complete Design Suite DVD: • Quartus II design software includes Subscription
Edition (optional feature, available for purchase) and Web Edition (no charge, Windows only) • ModelSim®-Altera software
includes Altera Edition (optional feature, available for purchase) and Web Edition (no charge, Windows only) • MegaCore®
IP Library including Nios II processor - OpenCore® Plus evaluation • Nios II Embedded Design Suite, Evaluation Edition
(free) • DSP Builder • Video demos of Quartus II software and the Nios II processor • System reference designs and labs
includes DSP Builder filtering design and Nios II processor reference designs
544-2566-ND
(DK-DSP-3C120N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $1595.00
More Product Available Online: www.digikey.com
Toll-Free: 1-800-344-4539 • Phone 218-681-6674 • Fax: 218-681-3380
(US2011)
649
C
Cyclone® III FPGA Development Kit
C
Altera’s Cylone III FPGA Development Kit combines the largest density low-cost, low-power FPGA available with a robust
set of memories and user interfaces. The kit dramatically reduces the design and verification portion of your project,
whether it’s for automotive, consumer, wireless communications, video processing, or another high-volume, cost
sensitive application.
Kit Includes:
Cylone III Development Board: • Cyclone III EP3C120F780 FPGA • Embedded USB-Blaster™ circuitry (includes
an Altera MAX II CPLD) allowing download of FPGA configuration files via the flash device or the host computer
Memory: • 256Mbytes of dual-channel DDR2 SDRAM with ECC • 8Mbytes of synchronous SRAM • 64Mbytes of
flash Communication Ports: • 10/100/1000 Ethernet • USB 2.0 Clocking: • 50MHz and 125MHz on board oscillators
• SMA Inputs/outputs • Input/outputs for the two HSMCs • Various Buttons, Switches, and Indicators Display: • 128
x 64 graphics LCD • 2-line x 16-character LCD Connectors: • Two HSMCs • USB type B Debug Tools: Three HSMC
debug cards (tow loop-back and a debug header) Cables and Power/Analog: • 14V ~ 20V DC input • On-board power
measurement circuitry • 19.8W per HSMC interface • Power cord with plug adapters (US, UK, EU) Cyclone III FPGA
Development Kit, CD-ROM: • Design examples for the Cyclone III FPGA development board • Complete documentation
includes user guide, reference manual, board schematic and layout, bill of materials and product and partner information
Altera Complete Design Suite DVD: • Quartus II Design software includes Subscription Edition (optional feature, available
for purchase) and Web Edition (no charge, Windows only) • ModelSim®-Altera software includes Altera Edition (optional
feature, available for purchase) and Web Edition (no charge, Windows only) • MegaCore® IP Library - Opencore Plus
evaluation includes Nios II® processor (evaluation license) • Nios II Embedded Design Suite, Evaluation Edition (no
charge) • DSP Builder (optional feature, available for purchase) • Video demos of Quartus II software and Nios II
embedded processor
544-2444-ND
(DK-DEV-3C120N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $995.00
NEW! Cyclone® III LS FPGA
Development Kit
Altera's Cyclone III LS FPGA Development Kit combines the largest density, low-power FPGA available with a complete
suite of security features implemented at the silicon, software, and intellectual property (IP) levels. These security features
provide passive and active protection of your IP from tampering, reverse engineering, and counterfeiting.
Kit Contents:
Cyclone III LS FPGA Development Board: • Cyclone III LS EP3CLS200F780C7N device • Embedded USB-Blaster circuitry
(includes an Altera® MAX® IIZ CPLD) allowing download of FPGA configuration files via the flash device or the host
computer Memory: • Two 512MB of DDR2 SDRAMs • 2MB of synchronous SRAM from ISSI • 64MB of Flash from Intel
Communications Port: • 10/100/1000 Ethernet Power and Analog Devices from Linear Technology: • Switching and
step-down regulators LTC3853, LTC3418, and LTC3414 • Analog-to-digital converter LTC2418 • LDO regulators LT1761
and LT3203 Clocking: • 25MHz, 50MHz and 125MHz on-board oscillators • SMA inputs/outputs • Inputs/outputs for the
two HSMC connectors • Various buttons, switches, and LED indicators Display: • 2-line x 16 character LCD Connectors:
• Two HMSC connectors • USB type B Debug Tools: • Three HSMC debug cards (two loop-back and a debug header)
Cables and Power/Analog: • Ethernet • USB • 14V ~ 20V DC input • On-board power measurement circuitry • 19.8W
per HMSC interface • AC power cord with plug adapters (US, UK, EU) Cyclone III LS FPGA Development Kit, CD ROM:
Design examples: • Board update portal design • Board test system design • MAX II CPLD system controller including an
anti-tamper design Complete Documentation: • Dear customer letter • Quick start guide • User guide • Reference manual
• Board schematic and layout • Bill of materials • Product and partner information • Quartus® II software design files
Altera Complete Design Suite DVD: Quartus II design software: • Development Kit Edition (includes one-year license)
• Subscription Edition (optional, available for purchase) ModelSim®-Altera software: • Altera Edition (optional feature,
available for purchase) MegaCore® IP Library—OpenCore Plus evaluation: • Includes Nios II processor (evaluation license) • Nios II Embedded Design Suite, Evaluation Edition (no charge) • DSP Builder (optional feature, available for
purchase) • Video demos of Quartus II software and Nios II embedded processor
544-2601-ND
(DK-DEV-3CLS200N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $3495.00
Embedded Systems Cyclone® III
FPGA Development Kit
The Embedded Systems Development Kit, Cyclone III FPGA Edition is a complete development platform for prototyping
embedded systems on Altera’s low-cost, low-power FPGA family.
Kit Includes:
Cyclone III Development Board: • EP3C120F780 FPGA • Embedded USB-Blaster™ circuitry (including an Altera MAX®
II CPLD) allowing download of FPGA configuration files via the flash device or the host computer Memory: • 256Mbytes
of dual-channel DDR2 SDRAM with ECC • 8Mbytes of pseudo SRAM • 64Mbytes of flash Communication Ports:
• 10/100/1000 Ethernet • USB 2.0 Power and Analog Devices from Linear Technology: • Switching power supply
LTM4601 • Switching and step-down regulators LT1931, LT3481, and LTC3418 • Analog-to-digital converter LTC1865
• LDO regulators LT1963 and LT1761 Clocking: • 50MHz and 125MHz on-board oscillators • SMA inputs/outputs • Inputs/outputs for the two HSMCs • Various buttons, switches, and indicators Display: • 128 x 64 graphics LCD • 2-line x
16-character LCD Connectors: • Two HSMCs • USB type B Debug Tools: • Three HSMC debug cards (two loop-back and
a debug header) Cables and Power/Analog: • 14V ~ 20V DC input • On-board power measurement circuitry • 19.8W per
HSMC interface • Power cord with plug adapters (US, UK, EU)
544-2589-ND
(DK-EMB-3C120N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $1595.00
Nios® II Embedded Evaluation Kit,
Cyclone® III Edition
The Nios II Embedded Evaluation Kit, Cyclone III Edition, is a first class, low cost evaluation platform for embedded
developers. Software developers, especially those new to FPGA design, can install and evaluate the Nios II Embedded
Design Suite (EDS) - a comprehensive software development suite for embedded applications - all at no cost.
The included software tutorials and examples come with full source code showing applications such as Picture Viewer,
Web Server, C-to-Hardware (C2H) acceleration and graphics.
Kit Includes:
Cyclone III Starter Board: • Cyclone III EP3C25F324 FPGA • Configuration: Embedded USB-Blaster™ circuitry (includes
an Altera EPM3128A CPLD) allowing download of FPGA configuration files via the user’s USB port Power and Analog
Devices from Linear Technology: • Switching power supply LTM4603EV-1 • Switching and step-down regulators
LTC3413, LT1959 Memory: • 32Mbytes of DDR SDRAM • 1Mbyte of Synchronous SRAM • 16Mbytes of Intel P30/
P33 flash Clocking: 50MHz on-board oscillator • Switches and indicators: • Six push buttons total, four user controlled
• Seven LEDs total, four user controlled LCD Daughter Card: • Color LCD touch-screen display: 800 x 480 resolution
• 24-bit CD quality Audio CODEC with line-in, line-out, and microphone-in jacks • 10/100 Ethernet physical layer/media
access control (PHY/MAC) Connectors: • VGA output • Composite TV-in • Audio-out, audio-in, and microphone-in
• Secure digital (SD) card • Serial connector (RS-232 DB9 port) • PS/2 • Ethernet connector (RJ-45) NIOS II Evaluation
Kit CD-ROM: • Example applications: • Application selector • Picture viewer • Mandelbrot acceleration with the Nios
C2H compiler • Web server/Remote FPGA configuration Hardware Tutorials: • Create an FPGA design in one hour
• Build a 32-bit soft processer system inside an FPGA Software Tutorials: My First Software Application Complete
Documentation: • Quick start guide • User guide • Reference manual • Board schematic, layout, and bill of materials
• Product and partner information Cables and Accessories: • 128Mbyte SD card and USB-to-SD card adapter • USB
cable • 9V power supply • International power cords • Ethernet (RJ-45) cable (7 ft.) • Ethernet crossover adapter Altera
Complete Design Suite DVD (Free): • Quartus® II Web Edition (FPGA design software) • ModelSim® Altera Web Edition
(FPGA simulation software from ModelSim) • Nios II Embedded Design Suite (32-bit microprocessor software) • MicroC/
OS-II real-time operating system evaluation • Nios II C-to-Hardware acceleration compiler evaluation • NicheStack TCP/
IP Network Stack - Nios II Edition evaluation • MegaCore® IP Library (Library of intellectual property cores)
544-2411-ND
(DK-N2EVAL-3C25N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $449.00
NEW! Cyclone® IV GX Tranceiver
Starter Kit
The Cyclone IV GX Transceiver Starter Kit features the following: Cyclone IV GX Transceiver Starter Board: • Cyclone IV
GX EP4CGX15BF14C8N FPGA • Configuration status and set-up elements • MAX® II CPLD EPM2210 System Controller
enabling passive serial (PS) configuration from flash • Embedded USB-Blaster™ for using the Quartus II Programmer
• JTAG header for external USB-Blaster • Altera EPCS serial configuration device Clocks: • FPGA clock sources: 50MHz,
125MHz, and SMA clock input • Other on-board oscillators: 6MHz, 24MHz, and 25MHz General user input/output:
• LEDs • Two-line character LCD display • Push-buttons Memory devices: • 16MB of flash • 2MB of synchronous
SRAM Component and interfaces: • PCI Express edge connector • 10/100/1000BASE-T Ethernet PHY with RJ-45
connector or one transceiver to SMA connectors (requires a minor board modification) • On-board power measurement
circuitry Power: • Laptop DC input • PCI Express edge connector • Power management solution from Linear Technology
• Power regulators: LT3027 and LT3023 • Step-down switching regulator: LT3510 • ADC: LTC2418
544-2569-ND
(DK-START-4CGX15N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $395.00
Stratix® III FPGA Development Kit
The Stratix III FPGA Development Kit delivers a complete environment for the development and testing
of designs requiring high-performance and high-density devices. Altera Stratix III FPGAs combine the world’s highest
performance and highest density with the lowest possible power consumption. You’ll find Stratix III FPGAs provide the
high-performance and high-integration capabilities needed for next-generation basestations, network infrastructure, and
advanced imaging equipment. Kit Includes: Stratix III EP3SL150F1152 High-Performance FPGA: • 142,500 equivalent
logic elements (LEs) • 744 user I/O pins • 384 18 x 18 multipliers Clocking: • 125.000MHz oscillator • 50.000MHz
oscillator • SMA input • SMA output Configuration: • MAX®II flash passive serial configuration circuit • MAX II
EPM2210GF256C3N CPLD • 2,210 LEs • 272 user I/O pins • 8Kbytes of user flash memory • On-board USB-Blaster™
using Quartus®II development software programming • JTAG download port General User Input/Output: • Power
consumption display • Displays each power rail individually • System reset pushbutton • Board-specific DIP switch
• JTAG bypass DIP switch • User reset pushbutton • User pushbuttons (x4) • User DIP switch (x8) • User LEDs (x8)
• User quad 7 segment display • 128 x 64 dot pixels graphics display • LCD (16 character x 2 line) Memory Devices:
• 128Mbyte DDR2 SDRAM DIMM • 16Mbyte DDR2 SDRAM devices (individually addressable) • 36Mbit QDRII SRAM
device • 4Mbyte PSRAM • 64Mbyte flash memory Components and Interfaces: • USB 2.0 • 10/100/1,000 Ethernet
• Two HSMC interfaces Power Supplies: • 12A DC/DC μModule • 1.5A low input voltage VLDO linear regulator • 100mA,
low noise, LDO micropower regulators in SOT-23 • 4.5A, 500kHz step-down switching regulator • 1.2MHz/2.2MHz
inverting DC/DC converters in ThinSOT • 1-/2-channel 24bit μPower no latency delta-sigma ADC in MSOP-10 • Quartus
II Development Kit Edition software, including a one-year License • Cable and accessories: • External AC adapter
power supply • Power cord (including support for UK, Europe)
544-2568-ND
(DK-DEV-3SL150N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $2495.01
NEW! Stratix® III DSP Development Kit
The DSP Development Kit, Stratix III Edition delivers a complete digital signal processing (DSP)
development environment. The kit facilitates the entire design process from design conception through
hardware implementation. Kit Includes: Stratix III Development Board: • High-performance Stratix
III EP3SL150F1152 FPGA • DDR2 SDRAM and QDR II SRAM • PSRAM and flash memory • USB
2.0 MAC/PHY • Graphics and character LCD displays • On-board embedded USB-BlasterTM download cable Data
Conversion HSMC: • Two 14-bit, 150-million samples per second (MSPS) analog to digital (A/D) converters • Two
14-bit, 250-MSPS digital to analog (D/A) converters • Audio in/out/mic Power regulators and data converters:
• LTM4601EV: 12A DC/DC μModule • LTC3026EDD: 1.5A low input voltage VLDO linear regulator • LT1761ES5-SD:
100mA, low noise, LDO micropower regulators in SOT-23 • LT1374CFE: 4.5A, 500kHz step-down switching regulator
• LT1931AES5: 1.2/2.2MHz inverting DC/DC converters in ThinSOT • LTC2402CMS: 1/2-channel 24bit μPower no latency
delta-sigma ADC in MSOP-10 Stratix III FPGA Development Kit, CD-ROM: • Design examples for the Stratix III FPGA
development board • Complete documentation (User guide, Reference manual, Board schematic and layout, Bill of
materials, Product and partner information) Altera Complete Design Suite DVD • Quartus II Development Kit Edition
design software • ModelSim®-Altera software • Altera MegaCore® IP Library (simulation and hardware evaluation)
• Nios®II Embedded Design Suite (EDS), Evaluation Edition (free) • DSP Builder • Video demos of Quartus II software
and the Nios II processor • System reference designs and labs (DSP Builder filtering design, Nios II processor reference
designs) • MATLAB/Simulink 30-day evaluation software
544-2604-ND
(DK-DSP-3SL150N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $2664.47
Stratix® IV GX FPGA Development Kit
The Stratix IV GX FPGA Development Kit delivers a complete system-level design environment that includes both the hardware and software needed to immediately begin developing FPGA designs. With
this PCI-SIG-compliant board and a one-year license for the Quartus®II design software, you can:
• Develop and test PCI Express 2.0 (up to x8 lane) endpoint and rootpoint designs • Develop and test
memory subsystems consisting of DDR3 and/or QDRII+ memory • Build designs capable of migrating to Altera's low-cost
HardCopy®IV ASICs • Add other Stratix IV GX supported protocol interfaces such as 10-Gigabit Ethernet, CPRI, OBSAI,
SAS/SATA, Serial RapidIO®, and many others by taking advantage of this board's modular capability through the highspeed mezzanine connectors (HSMC) and over 20 different HSMC cards available through Altera partners. Kit Includes:
Stratix IV GX FPGA Development Board: • Stratix IV GX EP4SGX230KF40C2N FPGA Configuration Status and Set-up
Elements: • Fast Passive Parallel (FPP) configuration via a MAX®II CPLD EPM2210 and flash memory • On-board USBBlaster™ download cable using Quartus II Programmer Clocks: • On-board clock oscillators: 50MHz, 100MHz, 125MHz,
148.5MHz, 155.52MHz, and 156.25MHz • SMA connectors for external clock input • SMA connectors for clock output
General User Input/Output: • LEDs • LCD display • Push-button and DIP switches Memory Devices: • 512MByte DDR3
SDRAM with a 64-bit data bus • 128MByte DDR3 SDRAM with a 16-bit data bus • Two 4MByte QDRII+ SRAMs with 18bit data buses • 64MByte Sync Flash and 2MByte SSRAM Component and Interfaces: • PCI Express x8 edge connector
• 10/100/1000BASE-T Ethernet PHY with RJ-45 connector • Two HSMC connectors • HDMI video output • 3G SDI video
input and output • Power measurement circuitry • Temperature measurement circuitry Power: • Laptop DC input • PCI
Express edge connector power • Power measurement circuitry Other Features: • PCI Express half-length full-height (6.6"
x 4.376") board format Stratix IV GX FPGA Development Kit CD-ROM: Design Examples: • Board Update Portal featuring
the Nios®II processor web server and remote system update • Board Test System • Complete documentation Altera's
Complete Design Suite DVD: • Quartus II Software Development Kit Edition includes support for Stratix IV FPGAs and
HardCopy IV ASICs: • One-year license included • Nios II Embedded Design Suite • MegaCore® IP Library includes
PCI Express, Triple-Speed Ethernet, SDI, and DDR3 High-Performance Controller MegaCore IP cores: • IP evaluation
available through OpenCore Plus • Loopback and debug HSMC cards • Power adapter and cables
544-2594-ND
(DK-DEV-4SGX230N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $4495.01
NEW! Stratix® IV Video
Development Kit GX Edition
The Audio Video Development Kit, Stratix IV GX Edition, delivers a complete video and image processing development
environment for design engineers. The kit facilitates the entire design process, from design conception through hardware
implementation.
Kit Includes: Stratix IV GX FPGA Development Board with EP4SGX230KF40C2N Device, Transceiver Serial Digital Interface (SDI) High-speed Mezzanine Card (HSMC), Video/Audio Interfaces: • HDMI video output on the FPGA host
board • One 3G-SDI video input and output on the FPGA host board • Two additional SDI inputs and outputs for triple-rate
SDI supporting 3G, and high-definition (HD) and standard-definition (SD) standards on the HSMC • Two AES inputs and
outputs on the HSMC Memory Devices: • 512MByte DDR3 SDRAM with a 64-bit data bus • 128MByte DDR3 SDRAM with
a 16-bit data bus • Two 4MByte QDR II+ SRAMs with 18-bit data buses • 64MByte sync flash and 2MByte SSRAM external
memory Loopback and Debug HSMCs, Stratix IV GX FPGA Development Kit CD-ROM: • Complete board documentation, including board design files, reference manual, and user guide • Design examples: Board Update Portal and Board
Test System Altera Complete Design Suite DVD: • Quartus II Software Development Kit Edition (1-year license) • Nios®
II Embedded Design Suite • OpenCore Plus access to the MegaCore® IP library, including the Altera Video and Image
Processing Suite of intellectual property (IP) cores • SDI reference design USB and Ethernet Cables, AC Adapter Power
Supply, Board Design Files: • Schematics • Layout (Allegro format)
544-2602-ND
(DK-VIDEO-4SGX230N). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $4994.89
More Product Available Online: www.digikey.com
650
(US2011)
Toll-Free: 1-800-344-4539 • Phone 218-681-6674 • Fax: 218-681-3380
Stratix® IV Signal Integrity
Development Kit GX Edition
Altera’s Transceiver Signal Integrity Development Kit, Stratix IV GX Edition enables a thorough evaluation of transceiver
interoperability and serializer/deserializer (SERDES) signal integrity by allowing you to: • Evaluate transceiver performance
from 600Mbps ~ 8.5Gbps • Generate and check pseudo-random binary sequence (PRBS) patterns via a simple to use GUI
(does not require Quartus® II software) • Dynamically change Voltage Output Differential (VOD), pre-emphasis, and equalization settings to optimize transceiver performance for your channel • Perform jitter analysis • Verify physical medium
attachment (PMA) compliance to PCI Express (Gen1 and Gen2), Serial RapidIO®, Gigabit Ethernet, 10 Gigabit Ethernet
XAUI, CEI-6G, Fibre Channel 1G/4G/8G, high-definition serial digital interface (HD-SDI) and other major standards.
Kit Includes: Stratix IV GX Development Board: • EP4SGX230KF40C2N Configuration Status and Set-up Elements:
• FPP configuration • Embedded USB-Blaster™ download cable Clocks: • On-board clock oscillators: 50MHz, 100MHz,
156.25MHz, 312.5MHz, and 425.0MHz • SMA connectors for supplying an external differential clock to transceiver reference clock • SMA connectors for supplying an external differential clock to the FPGA fabric • SMA connectors to output
a differential clock from the FPGA’s PLL output pin General User Input/Output: • DIP and push-button switches • LEDs
• LCD Memory Devices: • 64MByte sync flash memory (primarily to store FPGA configurations) Components and Interfaces: • Eight full-duplex transceiver channels routed to SMA connectors • One micro-strip channel with minimal board
trace length • Six strip-line channels from the same transceiver block, all the trace lengths are matched across channels: • Four channels with full PMA+PCS functionality up to 8.5Gbps • Two CMU channels with PMA functionality up to
6.375Gbps • One long channel with ~33’’ trace length on transmit and ~7” trace length on receive to simulate the degradation associated with backplanes or long traces • Power measurement circuitry on transceiver-related supplies • The voltage
on all (and only) these rails can be supplied via banana jacks Temperature Measurement Circuitry: • Die temperature
• Ambient temperature • RJ-45 jack and 10/100/1000Base-T Ethernet PHY Application GUI: • Platform independent
• Interfaces to PC via JTAG • Embedded blaster User Controllable: • VOD and pre-emphasis settings • Equalizer setting
• Test pattern Status Indicator: • Number of errors • BER • Lock signal
Note: Quartus II software license is not included and is not required for kit evaluation
544-2592-ND
(DK-SI-4SGX230N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $2995.01
NEW! Stratix® IV Tranceiver Signal
Integrity Development Kit GT Edition
Altera’s Transceiver Signal Integrity Development Kit, Stratix IV GT Edition enables a thorough evaluation of transceiver
interoperability and serializer/deserializer (SERDES) signal integrity by allowing you to: • Evaluate transceiver performance
up to 11.3Gbps • Generate and check pseudo-random binary sequence (PRBS) patterns via a simple-to-use GUI (does
not require Quartus® II software) • Dynamically change Voltage Output Differential (VOD), pre-emphasis, and equalization
settings to optimize transceiver performance for your channel • Perform jitter analysis • Verify physical medium attachment
(PMA) compliance to 40G/100G Ethernet, Interlaken, CEI-6G/11G, PCI Express (Gen1, Gen2, and Gen3), Serial RapidIO®,
and other major standards • Validate interoperability between optical modules (optical modules require SMA input to test
interoperability with the Transceiver Signal Integrity Development Kit, Stratix IV GT Edition), such as SFP, SFP+, and QSFP
Kit Includes: Stratix IV GT Development Board with EP4S100G2F40I1N Device: • Configuration status and set-up elements (Fast passive parallel (FPP) configuration, Embedded USB-BlasterTM download cable) Clocks: • On-board clock
oscillators: 50MHz, 100MHz, 644.53MHz, and 706.25MHz • SMA connectors for supplying an external differential clock to
transceiver reference clock General User Input/Output: • DIP and push-button switches • LEDs • LCD Memory Devices:
• 64MByte sync flash memory (primarily to store FPGA configurations) Components and Interfaces: • Six full-duplex
transceiver channels routed to SMA connectors (all channels support up to 11.3Gbps data rate) • Six full-duplex transceiver
channels routed to FCI Airmax Connector • Power measurement circuitry on transceiver-related supplies • Voltage on all
(and only) these rails can be supplied via banana jacks • Temperature measurement circuitry (Die temperature, Ambient
temperature) • RJ-45 jack and 10/100/1000Base-T Ethernet PHY Backplane Drive Capability at 6.5Gbps: • Directly connect the transceiver signal integrity development kit to an FCI backplane (not included) through the FCI connector header
• Couple with a second signal integrity development kit or FCI daughtercard (not included) for a complete end-to-end
backplane channel analysis Application GUI: • Platform independent • Interfaces to PC via JTAG • Embedded blaster
• User controllable (VOD and pre-emphasis settings, Equalizer setting, Test pattern) • Status indicator (Number of errors,
Bit-error rate (BER), Lock signal) • EyeQ reconstructs the eye width in the device receiver for monitoring signal quality after
equalization (up to 6Gbps) Quartus II software license is not included and is not required for kit evaluation
544-2603-ND
(DK-SI-4S100G2N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $7994.98
NEW! Stratix® IV E FPGA
Development Kit
Altera’s Stratix IV E FPGA Development Kit delivers a complete system-level design environment that includes both the
hardware and software needed to immediately begin developing FPGA designs. This board combined with a one-year
license for Quartus® II software provides all that is needed for you to begin prototyping for a variety of designs today. You
can use this development kit to: • Develop and test memory subsystems consisting of DDR3 DIMMs, QDR II+, and RLDRAM
II memory interfaces • Prototype designs and speed up your verification cycle and time-to-market • Build designs capable
of migrating to Altera’s low-cost HardCopy® IV E ASICs • Migrate designs seamlessly from Altera’s Stratix III F1152 FPGAs
• Take advantage of the modular and scalable design of this development kit by using high-speed mezzanine card (HSMC)
connectors to interface to one of over 20 different HSMCs provided by Altera partners.
Kit Includes: Stratix IV E FPGA Development Board with IV E EP4SE530H35C2NES FPGA Device, Configuration, Status,
and Set-up Elements: • Fast passive parallel (FPP) configuration via a MAX® II EPM2210 CPLD and flash memory • Onboard USB-BlasterTM download cable using Quartus II Programmer Clocks: • On-board clock oscillators: 50MHz, 66 Hz,
100MHz, and 125MHz • SMA connectors for external clock input • SMA connector for clock output General User Input/
Output: • LEDs • Push-buttons • DIP switches • Graphics LCD • Character LCD • Quad seven segment display Memory
Devices: • 2GByte DDR3 SDRAM DIMM with a 72-bit data bus • 72Mbit QDR II+ SRAM device with a 18-bit data bus
• 576Mbit RLDRAM II CIO device with a 36-bit data bus • 18Mbit SSRAM with a 36-bit data bus • 512Mbit flash with a
16-bit data bus Components and Interfaces: • Two HSMC connectors • 10/100/1000BASE-T Ethernet PHY with RJ-45
connector • Temperature measurement circuitry • Power measurement circuitry Other Features: • 8.25” x 7” Board
• Bench-top design Stratix IV E FPGA Development Kit CD-ROM: • Design Examples (Board Update Portal featuring
the Nios® II processor web server and remote system update, Board Test System) • Complete documentation Altera’s
Complete Design Suite DVD: • Quartus II Software Development Kit Edition includes support for Stratix IV FPGAs and
HardCopy IV ASICs (1-year license included) • Nios II Embedded Design Suite • MegaCore® IP Library includes TripleSpeed Ethernet, DDR3, RLDRAM II, and QDR II+ MegaCore intellectual property (IP) cores Loopback and Debug HSMCs,
Power Adapter and Cables
544-2605-ND
(DK-DEV-4SE530N). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $9994.97
Video Input Daughtercard
The Video Input Daughter Card from Altera enables composite video to be interfaced with Altera’s or
third party partner FPGA development board equipped with a standard expansion connector. It is ideal for developing
applications with the Video and Image Processing Solutions that need to perform any image processing. The daughter
card is included as part of the Video Development Kit, Cyclone II Edition and it can be purchased as a separate item.
Features: • 2 Composite Video Input Channels using the Texas Instruments (TI) TVP5146 ADC • Support for NTSC/PAL
• 10-bit BT.656 Output • Compatibility with expansion connector, standard on most Altera development kits
544-1704-ND
(DK-VIDEO-TVP5146N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $195.00
USB-Blaster™ Cable
The USB-Blaster download cable interfaces to a standard USB PC port. The cable is a hardware interface to either a
standard PC or UNIX workstation RS-232 port or a USB port. It provides configuration data to Excalibur™, Mercury™,
APEX™ II, APEX 20K, ACEX® 1K, FLEX® 10K, FLEX 8000 and FLEX 6000 devices and programming data to MAX® 9000,
MAX 7000S, MAX 3000A, MAX 7000B and MAX 7000A devices.
P0302-ND
USB Blaster Download Cable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $75.00
NEW! Highspeed AD/DA Cards
Features: • Dual AD channels with 14-bit resolution and data rate up to 65MSPS • Dual DA channels with 14-bit
resolution and data rate up to 125MSPS • Dual interfaces include HSMC and GPIO, which are fully compatible with
Cyclone III Starter Kit and DE0/DE1/DE2/DE3 etc. respectively • Clock sources include oscillator 100MHz, SMA for AD
and DA each, and PLL from either HSMC or GPIO interface • Size: 90.3mm x 78.2mm
P0003_GPIO-ND
(P0003_GPIO). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $219.00
P0003_HSMC-ND
(P0003_HSMC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $219.00
NEW! DE0 Development and
Education Board
C
Specifications: • Altera Cyclone® III 3C16 FPGA device • Altera Serial Configuration device – EPCS4 • USB Blaster (on
board) for programming and user API control; both JTAG and Active Serial • (AS) programming modes are supported
• 8Mbyte SDRAM • 4Mbyte Flash memory • SD Card socket • 3 pushbutton switches • 10 toggle switches • 10 green
user LEDs • 50MHz oscillator for clock sources • VGA DAC (4-bit resistor network) with VGA-out connector • RS-232
transceiver • PS/2 mouse/keyboard connector • Two 40-pin Expansion Headers Includes: • The DE0 board • USB
Cable for FPGA programming and control • DE0 System CD containing: • Altera’s Quartus® II Web Edition and the
Nios® II Embedded Design Suit Evaluation Edition software • DE0 documentation and supporting materials, including
the User Manual, the Control Panel utility, reference designs and demonstrations, device datasheets, tutorials, and a set
of laboratory exercises • Clear plastic cover for the board • 7.5 DC wall-mount power supply
P0037-ND
(P0037) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $119.00
DE1 Development and Education Board
Specifications: FPGA: • Cyclone II EP2C20F484C7 FPGA and EPCS4 serial configuration device I/O
Devices: • Built-in USB Blaster for FPGA configuration RS-232 port • VGA DAC resistor network (4096
colors) • PS/2 mouse or keyboard port • Line-in, Line-out, microphone-in (24-bit audio CODEC)
• Expansion headers (76 signal pins) Memory: • 8MB SDRAM, 512KB SRAM, 4MB Flash • SD memory card slot
Switches, LEDs, Displays and Clocks: • 10 toggle switches • 4 debounced pushbutton switches • 10 red LEDs, 8 green
LEDs • Four 7-segment displays • 27MHz and 50MHz oscillators, external SMA clock input
P0528-ND
(P0528) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $156.25
DE2 Development and Education Board
Specifications: FPGA: • Cyclone II EP2C35F672C6 FPGA and EPCS16 serial configuration device
I/O Devices: • Built-in USB Blaster for FPGA configuration • 10/100 Ethernet, RS-232, Infrared
port • Video Out (VGA 10-bit DAC) • Video In (NTSC/PAL/Multi-format) • USB 2.0 (type A and
type B) • PS/2 mouse or keyboard port • Line-in, Line-out, microphone-in (24-bit audio CODEC) • Expansion
headers (76 signal pins) Memory: • 8MB SDRAM, 512KB SRAM, 4MB Flash • SD memory card slot Switches,
LEDs, Displays and Clocks: • 18 toggle switches • 4 debounced pushbutton switches • 18 red LEDs, 9 green
LEDs • Eight 7-segment displays • 16 x 2 LCD display • 27MHz and 50MHz oscillators, external SMA clock input
Note: Academic pricing available; call Digi-Key for pricing.
P0301-ND
(P0301) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $466.35
DE2-70 Development and Education Board
Includes: • Altera Cyclone® II 2C70 FPGA device • Altera Serial Configurations device EPCS16
• USB Blaster (on board) for programming and user API control; both JTAG and Active Serial
(AS) programming modes are supported • 2Mbyte SSRAM • Two 32Mbyte SDRAM • 8Mbyte
Flash memory • SD Card socket • 4 pushbutton switches • 18 toggle switches • 18 red user LEDs • 9 green
user LEDs • 50MHz oscillator and 28.63MHz oscillator for clock sources • 24-bit CD-quality audio CODEC with
line-in, line-out and microphone-in jacks • VGA DAC (10-bit high-speed triple DACs) with VGA-out connector • 2
TV Decoder (NTSC/PAL/SECAM) and TV-in connector • 10/100 Ethernet Controller with a connector • USB Host/
Slave Controller with USB type A and type B connectors • RS-232 transceiver and 9-pin connector • PS/2 mouse/
keyboard connector • IrDA transceiver • 1 SMA connector • Two 40-pin Expansion Headers with diode protection
Note: Academic pricing available; call Digi-Key for pricing.
P0304-ND
(P0304) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $532.00
MAX® II Micro Package
The MAX II Micro package contains all components needed to use the MAX II Micro board in conjunction with a computer
that runs the Microsoft Windows software.
P0305-ND
(P0305) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $69.00
Digital Development Kits and Sensor
P0307-ND: The 4.3” Ultra-high Resolution LCD Touch Panel Development Kit provides users an 800 x 480 full-color
high-quality LCD Touch Panel with complete reference designs with source code to allow users to develop applications
using a touch panel on the Altera DE2-70/DE2/DE1 boards and Altera Cyclone II/Cyclone III Starter Kits.
P0001-ND: The TRDB_D5M 5 Mega Pixel Digital Camera Development Kit provides everything you need to develop a 5
Mega Pixel Digital Camera on the Terasic FPGA system board. The kit contains hardware design (in Verilog) and software
to load the picture taken into the PC and save it as BMP/JPG file. The Getting Started User Guide shows users how to
exercise the digital camera functions.
P0006-ND: THDB-SUM (HSMC to Santa Cruz/USB/Mictor Daughter Board) is an adapter board to convert High Speed
Mezzanine Connector(HSMC) to Santa Cruz(SC), USB, Mictor, and SD Card interface. It allows users to use these
interfaces on a host board with a HSMC connector.
P0033-ND: The THDB-HTG board is designed to convert a High Speed Mezzanine Connector (HSMC) I/Os to three 4-pin
expansion prototype connectors, which are compatible with Altera DE2/DE1 expansion headers. Users can connect up to
three Altera DE2/DE1 boards (or associated daughter cards) onto a HSTC/HSMC-interfaced host board via a THDB-HTG
board.
P0307-ND
P0001-ND
P0006-ND
P0033-ND
(P0307) 4.3 Inch Digital Touch Panel Development Kit (RoHS Compliant) . . . . . . . . . . . . . . . . . . . . . $170.00
(P0001) 5 Mega Pixel Digital Camera Development Kit (RoHS Compliant) . . . . . . . . . . . . . . . . . . . . . . $85.00
(P0006) THDB-SUM Adapter Board (RoHS Compliant). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $89.00
(P0033) THDB-HTG HSMC TO GPIO Daughter Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $55.00
More Product Available Online: www.digikey.com
Toll-Free: 1-800-344-4539 • Phone 218-681-6674 • Fax: 218-681-3380
(US2011)
651
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