LM4904 1 Watt Audio Power Amplifier (Rev. C)

LM4904 1 Watt Audio Power Amplifier (Rev. C)
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LM4904
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LM4904
1 Watt Audio Power Amplifier
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FEATURES
DESCRIPTION
•
•
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•
The LM4904 is an audio power amplifier primarily
designed for demanding applications in mobile
phones and other portable communication device
applications. It is capable of delivering 1 watt of
continuous average power to an 8Ω BTL load with
less than 1% distortion (THD+N) from a 5VDC power
supply.
1
2
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•
•
•
Available in Space-Saving DSBGA Package
Ultra Low Current Shutdown Mode
BTL Output Can Drive Capacitive Loads
Improved Pop & Click Circuitry Eliminates
Noise During Turn-On and Turn-Off
Transitions
2.0 - 5.5V Operation
No Output Coupling Capacitors, Snubber
Networks or Bootstrap Capacitors Required
Unity-Gain Stable
External Gain Configuration Capability
APPLICATIONS
•
•
•
Mobile Phones
PDAs
Portable Electronic Devices
KEY SPECIFICATIONS
•
•
•
•
•
Improved PSRR at 217Hz & 1KHz: 62dB
Power Output at 5.0V, 1% THD, 8Ω: 1.07W
(typ)
Power Output at 3.0V, 1% THD, 4Ω: 525mW
(typ)
Power Output at 3.0V, 1% THD, 8Ω: 390mW
(typ)
Shutdown Current: 0.1μA (typ)
Boomer audio power amplifiers were designed
specifically to provide high quality output power with a
minimal amount of external components. The
LM4904 does not require output coupling capacitors
or bootstrap capacitors, and therefore is ideally suited
for mobile phone and other low voltage applications
where minimal power consumption is a primary
requirement.
The LM4904 features a low-power consumption
shutdown mode, which is achieved by driving the
shutdown pin with logic high. Additionally, the
LM4904 features an internal thermal shutdown
protection mechanism.
The LM4904 contains advanced pop & click circuitry
which eliminates noise which would otherwise occur
during turn-on and turn-off transitions.
The LM4904 is unity-gain stable and can be
configured by external gain-setting resistors.
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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Typical Application
Figure 1. Typical Audio Amplifier Application Circuit
2
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Connection Diagrams
8 Bump DSBGA (Top View)
See Package Number YZR
8 Bump DSBGA Marking (Top View)
X - Date Code
T - Dice Traceability
G - Boomer Family
A6 - LM4904ITL
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1) (2)
Supply Voltage (3)
6.0V
−65°C to +150°C
Storage Temperature
−0.3V to VDD +0.3V
Input Voltage
Power Dissipation
(4) (5)
Internally Limited
ESD Susceptibility (6)
2000V
ESD Susceptibility (7)
200V
Junction Temperature
Thermal Resistance
150°C
θJA (DSBGA) (8)
Soldering Information
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
210°C/W
See AN-1112 "microSMD Wafers
Level Chip Scale Package."
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.
If the product is in Shutdown mode and VDD exceeds 6V (to a max of 8V VDD), then most of the excess current will flow through the
ESD protection circuits. If the source impedance limits the current to a max of 10mA, then the device will be protected. If the device is
enabled when VDD is greater than 5.5V and less than 6.5V, no damage will occur, although operation life will be reduced. Operation
above 6.5V with no current limit will result in permanent damage.
The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature
TA. The maximum allowable power dissipation is PDMAX = (TJMAX–TA)/θJA or the number given in Absolute Maximum Ratings, whichever
is lower. For the LM4904, see power derating curves for additional information.
Maximum power dissipation in the device (PDMAX) occurs at an output power level significantly below full output power. PDMAX can be
calculated using Equation 1 shown in the Application Information section. It may also be obtained from the power dissipation graphs.
Human body model, 100 pF discharged through a 1.5 kΩ resistor.
Machine Model, 220 pF–240 pF discharged through all pins.
All bumps have the same thermal resistance and contribute equally when used to lower thermal resistance. The LM4904ITL demo board
(views featured in the Application Information section) has two inner layers, one for VDD and one for GND. The planes each measure
600mils x 600mils (15.24mm x 15.24mm) and aid in spreading heat due to power dissipation within the IC.
Operating Ratings
Temperature Range
TMIN ≤ TA ≤ TMAX
Supply Voltage
4
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−40°C ≤ TA ≤ 85°C
2.0V ≤ VDD ≤ 5.5V
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Electrical Characteristics VDD = 5V (1) (2)
The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for TA = 25°C.
LM4904
Symbol
Parameter
Conditions
Typical
Limit
Units
(Limits)
(3)
(4) (5)
IDD
Quiescent Power Supply Current
VIN = 0V, Io = 0A, No Load
3
7
mA (max)
VIN = 0V, Io = 0A, 8Ω Load
4
10
mA (max)
0.1
2.0
µA (max)
ISD
Shutdown Current
VSDIH
Shutdown Voltage Input High
1.5
V (min)
VSDIL
Shutdown Voltage Input Low
1.3
V (max)
VOS
Output Offset Voltage
ROUT
VSD = VDD
(6)
7
Resistor Output to GND (7)
8.5
Po
Output Power
TWU
Wake-up time
THD+N
Total Harmonic Distortion+Noise
Po = 0.5 Wrms; f = 1kHz
Power Supply Rejection Ratio
Vripple = 200mV sine p-p
Input terminated with 10Ω
PSRR
(1)
(2)
(3)
(4)
(5)
(6)
(7)
THD = 1% (max); f = 1 kHz
1.07
50
mV (max)
9.7
kΩ (max)
7.0
kΩ (min)
0.9
W
100
mS (max)
0.2
%
60 (f = 217Hz)
64 (f = 1kHz)
55
dB (min)
All voltages are measured with respect to the ground pin, unless otherwise specified.
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
Typicals are measured at 25°C and represent the parametric norm.
Limits are ensured to TI's AOQL (Average Outgoing Quality Level).
Datasheet min/max specification limits are ensured by design, test, or statistical analysis.
For DSBGA only, shutdown current is measured in a Normal Room Environment. Exposure to direct sunlight will increase ISD by a
maximum of 2µA.
RROUT is measured from the output pin to ground. This value represents the parallel combination of the 10kΩ output resistors and the
two 20kΩ resistors.
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Electrical Characteristics VDD = 3V (1) (2)
The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for TA = 25°C.
LM4904
Symbol
Parameter
Conditions
Typical
Limit
Units
(Limits)
(3)
(4) (5)
IDD
Quiescent Power Supply Current
VIN = 0V, Io = 0A, No Load
2
7
mA (max)
VIN = 0V, Io = 0A, 8Ω Load
3
9
mA (max)
0.1
2.0
µA (max)
ISD
Shutdown Current
VSDIH
Shutdown Voltage Input High
1.1
V (min)
VSDIL
Shutdown Voltage Input Low
0.9
V (max)
VOS
Output Offset Voltage
ROUT
Resistor Output to GND
VSD = VDD
(6)
7
(7)
Output Power (8Ω)
Po
(4Ω)
8.5
THD = 1% (max); f = 1 kHz
390
THD = 1% (max); f = 1 kHz
525
50
mV (max)
9.7
kΩ (max)
7.0
kΩ (min)
mW
TWU
Wake-up time
75
mS (max)
THD+N
Total Harmonic Distortion+Noise
Po = 0.25 Wrms; f = 1kHz
0.1
%
PSRR
Power Supply Rejection Ratio
Vripple = 200mV sine p-p
Input terminated with 10Ω
62 (f = 217Hz)
68 (f = 1kHz)
(1)
(2)
(3)
(4)
(5)
(6)
(7)
6
55
dB (min)
All voltages are measured with respect to the ground pin, unless otherwise specified.
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
Typicals are measured at 25°C and represent the parametric norm.
Limits are ensured to TI's AOQL (Average Outgoing Quality Level).
Datasheet min/max specification limits are ensured by design, test, or statistical analysis.
For DSBGA only, shutdown current is measured in a Normal Room Environment. Exposure to direct sunlight will increase ISD by a
maximum of 2µA.
RROUT is measured from the output pin to ground. This value represents the parallel combination of the 10kΩ output resistors and the
two 20kΩ resistors.
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Electrical Characteristics VDD = 2.6V (1) (2)
The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for TA = 25°C.
LM4904
Symbol
Parameter
Conditions
Typical
Limit
(3)
(4) (5)
IDD
Quiescent Power Supply Current
Units
(Limits)
VIN = 0V, Io = 0A, No Load
2.0
mA (max)
VIN = 0V, Io = 0A, 8Ω Load
3.0
mA (max)
0.1
µA (max)
ISD
Shutdown Current
VSDIH
Shutdown Voltage Input High
1.0
V (min)
VSDIL
Shutdown Voltage Input Low
0.9
V (max)
VOS
Output Offset Voltage
ROUT
Po
Resistor Output to GND
VSD = VDD
(6)
5
(7)
Output Power ( 8Ω )
( 4Ω )
8.5
THD = 1% (max); f = 1 kHz
275
THD = 1% (max); f = 1 kHz
340
50
mV (max)
9.7
kΩ (max)
7.0
kΩ (min)
mW
TWU
Wake-up time
70
mS (max)
THD+N
Total Harmonic Distortion+Noise
Po = 0.15 Wrms; f = 1kHz
0.1
%
PSRR
Power Supply Rejection Ratio
Vripple = 200mV sine p-p
Input terminated with 10Ω
51 (f = 217Hz)
51 (f = 1kHz)
dB (min)
(1)
(2)
(3)
(4)
(5)
(6)
(7)
All voltages are measured with respect to the ground pin, unless otherwise specified.
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
Typicals are measured at 25°C and represent the parametric norm.
Limits are ensured to TI's AOQL (Average Outgoing Quality Level).
Datasheet min/max specification limits are ensured by design, test, or statistical analysis.
For DSBGA only, shutdown current is measured in a Normal Room Environment. Exposure to direct sunlight will increase ISD by a
maximum of 2µA.
RROUT is measured from the output pin to ground. This value represents the parallel combination of the 10kΩ output resistors and the
two 20kΩ resistors.
External Components Description
(see Figure 1)
Components
Functional Description
1.
Ri
Inverting input resistance which sets the closed-loop gain in conjunction with Rf. This resistor also forms a high pass
filter with Ci at fC= 1/(2π RiCi).
2.
Ci
Input coupling capacitor which blocks the DC voltage at the amplifiers input terminals. Also creates a highpass filter with
Ri at fc = 1/(2π RiCi). Refer to the , Proper Selection of External Components, section for an explanation of how to
determine the value of Ci.
3.
Rf
Feedback resistance which sets the closed-loop gain in conjunction with Ri.
4.
CS
Supply bypass capacitor which provides power supply filtering. Refer to the Power Supply Bypassing section for
information concerning proper placement and selection of the supply bypass capacitor.
5.
CB
Bypass pin capacitor which provides half-supply filtering. Refer to the section, Proper Selection of External
Components, for information concerning proper placement and selection of CB.
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Typical Performance Characteristics
8
THD+N vs Frequency
at VDD = 5V, 8Ω RL, and PWR = 500mW
THD+N vs Frequency
at VDD = 3V, 8Ω RL, and PWR = 250mW
Figure 2.
Figure 3.
THD+N vs Frequency
at VDD = 2.6V, 8Ω RL, and PWR = 150mW
THD+N vs Frequency
at VDD = 2.6V, 4Ω RL, and PWR = 150mW
Figure 4.
Figure 5.
THD+N vs Power Out
at VDD = 5V, 8Ω RL, 1kHz
THD+N vs Power Out
at VDD = 3V, 8Ω RL, 1kHz
Figure 6.
Figure 7.
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Typical Performance Characteristics (continued)
THD+N vs Power Out
at VDD = 2.6V, 8Ω RL, 1kHz
THD+N vs Power Out
at VDD = 2.6V, 4Ω RL, 1kHz
Figure 8.
Figure 9.
Power Supply Rejection Ratio (PSRR) vs Frequency
at VDD = 5V, 8Ω RL
Power Supply Rejection Ratio (PSRR) vs Frequency
at VDD = 5V, 8Ω RL
Figure 10. Input terminated with 10Ω
Figure 11. Input Floating
Power Supply Rejection Ratio (PSRR) vs Frequency
at VDD = 3V, 8Ω RL
Power Supply Rejection Ratio (PSRR) vs Frequency
at VDD = 3V, 8Ω RL
Figure 12. Input terminated with 10Ω
Figure 13. Input Floating
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Typical Performance Characteristics (continued)
10
Power Supply Rejection Ratio (PSRR) vs Frequency
at VDD = 2.6V, 8Ω RL
Power Supply Rejection Ratio (PSRR) vs Frequency
at VDD = 2.6V, 8Ω RL
Figure 14. Input terminated with 10Ω
Figure 15. Input Floating
Open Loop Frequency Response, 5V
Open Loop Frequency Response, 3V
Figure 16.
Figure 17.
Open Loop Frequency Response, 2.6V
Noise Floor, 5V, 8Ω
80kHz Bandwidth, Input to GND
Figure 18.
Figure 19.
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Typical Performance Characteristics (continued)
Power Derating Curves
Power Dissipation vs Output Power, 5V, 8Ω
Figure 20.
Figure 21.
Power Dissipation vs Output Power, VDD=3.0V
Power Dissipation vs Output Power, VDD=2.6V
Figure 22.
Figure 23.
Shutdown Hysteresis Voltage, 5V
Shutdown Hysteresis Voltage, 3V
Figure 24.
Figure 25.
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Typical Performance Characteristics (continued)
Shutdown Hysteresis Voltage, 2.6V
Output Power vs Supply Voltage, 8Ω
Figure 26.
Figure 27.
Output Power vs Supply Voltage, 16Ω
Output Power vs Supply Voltage, 32Ω
Figure 28.
Figure 29.
Frequency Response vs Input Capacitor Size
Figure 30.
12
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APPLICATION INFORMATION
BRIDGE CONFIGURATION EXPLANATION
As shown in Figure 1, the LM4904 has two internal operational amplifiers. The first amplifier's gain is externally
configurable, while the second amplifier is internally fixed in a unity-gain, inverting configuration. The closed-loop
gain of the first amplifier is set by selecting the ratio of Rf to Ri while the second amplifier's gain is fixed by the
two internal 20kΩ resistors. Figure 1 shows that the output of amplifier one serves as the input to amplifier two
which results in both amplifiers producing signals identical in magnitude, but out of phase by 180°. Consequently,
the differential gain for the IC is
AVD= 2 *(Rf/Ri)
By driving the load differentially through outputs Vo1 and Vo2, an amplifier configuration commonly referred to as
“bridged mode” is established. Bridged mode operation is different from the classical single-ended amplifier
configuration where one side of the load is connected to ground.
A bridge amplifier design has a few distinct advantages over the single-ended configuration, as it provides
differential drive to the load, thus doubling output swing for a specified supply voltage. Four times the output
power is possible as compared to a single-ended amplifier under the same conditions. This increase in attainable
output power assumes that the amplifier is not current limited or clipped. In order to choose an amplifier's closedloop gain without causing excessive clipping, please refer to the Audio Power Amplifier Design section.
A bridge configuration, such as the one used in LM4904, also creates a second advantage over single-ended
amplifiers. Since the differential outputs, Vo1 and Vo2, are biased at half-supply, no net DC voltage exists across
the load. This eliminates the need for an output coupling capacitor which is required in a single supply, singleended amplifier configuration. Without an output coupling capacitor, the half-supply bias across the load would
result in both increased internal IC power dissipation and also possible loudspeaker damage.
POWER DISSIPATION
Power dissipation is a major concern when designing a successful amplifier, whether the amplifier is bridged or
single-ended. A direct consequence of the increased power delivered to the load by a bridge amplifier is an
increase in internal power dissipation. Since the LM4904 has two operational amplifiers in one package, the
maximum internal power dissipation is 4 times that of a single-ended amplifier. The maximum power dissipation
for a given application can be derived from the power dissipation graphs or from Equation 1.
PDMAX = 4*(VDD)2/(2π2RL)
(1)
It is critical that the maximum junction temperature TJMAX of 150°C is not exceeded. TJMAX can be determined
from the power derating curves by using PDMAX and the PC board foil area. By adding copper foil, the thermal
resistance of the application can be reduced from the free air value of θJA, resulting in higher PDMAX values
without thermal shutdown protection circuitry being activated. Additional copper foil can be added to any of the
leads connected to the LM4904. It is especially effective when connected to VDD, GND, and the output pins.
Refer to the application information on the LM4904 reference design board for an example of good heat sinking.
If TJMAX still exceeds 150°C, then additional changes must be made. These changes can include reduced supply
voltage, higher load impedance, or reduced ambient temperature. Internal power dissipation is a function of
output power. Refer to the Typical Performance Characteristics curves for power dissipation information for
different output powers and output loading.
POWER SUPPLY BYPASSING
As with any amplifier, proper supply bypassing is critical for low noise performance and high power supply
rejection. The capacitor location on both the bypass and power supply pins should be as close to the device as
possible. Typical applications employ a 5V regulator with 10 µF tantalum or electrolytic capacitor and a ceramic
bypass capacitor which aid in supply stability. This does not eliminate the need for bypassing the supply nodes of
the LM4904. The selection of a bypass capacitor, especially CB, is dependent upon PSRR requirements, click
and pop performance (as explained in the , Proper Selection of External Components section), system cost, and
size constraints.
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SHUTDOWN FUNCTION
In order to reduce power consumption while not in use, the LM4904 contains shutdown circuitry that is used to
turn off the amplifier's bias circuitry. This shutdown feature turns the amplifier off when logic high is placed on the
shutdown pin. By switching the shutdown pin to VDD, the LM4904 supply current draw will be minimized in idle
mode. Idle current is measured with the shutdown pin connected to VDD. The trigger point for shutdown is shown
as a typical value in the Shutdown Hysteresis Voltage graphs in the Typical Performance Characteristics section.
It is best to switch between ground and supply for maximum performance. While the device may be disabled with
shutdown voltages in between ground and supply, the idle current may be greater than the typical value of
0.1µA. In either case, the shutdown pin should be tied to a definite voltage to avoid unwanted state changes.
In many applications, a microcontroller or microprocessor output is used to control the shutdown circuitry, which
provides a quick, smooth transition to shutdown. Another solution is to use a single-throw switch in conjunction
with an external pull-up resistor. This scheme ensures that the shutdown pin will not float, thus preventing
unwanted state changes.
PROPER SELECTION OF EXTERNAL COMPONENTS
Proper selection of external components in applications using integrated power amplifiers is critical to optimize
device and system performance. While the LM4904 is tolerant of external component combinations,
consideration to component values must be used to maximize overall system quality.
The LM4904 is unity-gain stable which gives the designer maximum system flexibility. The LM4904 should be
used in low gain configurations to minimize THD+N values, and maximize the signal to noise ratio. Low gain
configurations require large input signals to obtain a given output power. Input signals equal to or greater than 1
Vrms are available from sources such as audio codecs. Please refer to the, Audio Power Amplifier Design
section, for a more complete explanation of proper gain selection.
Besides gain, one of the major considerations is the closed-loop bandwidth of the amplifier. To a large extent, the
bandwidth is dictated by the choice of external components shown in Figure 1. The input coupling capacitor, Ci,
forms a first order high pass filter which limits low frequency response. This value should be chosen based on
needed frequency response for a few distinct reasons.
Selection Of Input Capacitor Size
Large input capacitors are both expensive and space hungry for portable designs. Clearly, a certain sized
capacitor is needed to couple in low frequencies without severe attenuation. But in many cases the speakers
used in portable systems, whether internal or external, have little ability to reproduce signals below 100 Hz to
150 Hz. Thus, using a large input capacitor may not increase actual system performance.
In addition to system cost and size, click and pop performance is effected by the size of the input coupling
capacitor, Ci. A larger input coupling capacitor requires more charge to reach its quiescent DC voltage (nominally
1/2 VDD). This charge comes from the output via the feedback and is apt to create pops upon device enable.
Thus, by minimizing the capacitor size based on necessary low frequency response, turn-on pops can be
minimized.
Besides minimizing the input capacitor size, careful consideration should be paid to the bypass capacitor value.
Bypass capacitor, CB, is the most critical component to minimize turn-on pops since it determines how fast the
LM4904 turns on. The slower the LM4904's outputs ramp to their quiescent DC voltage (nominally 1/2 VDD), the
smaller the turn-on pop. Choosing CB equal to 1.0 µF along with a small value of Ci (in the range of 0.1 µF to
0.39 µF), should produce a virtually clickless and popless shutdown function. While the device will function
properly, (no oscillations or motorboating), with CB equal to 0.1 µF, the device will be much more susceptible to
turn-on clicks and pops. Thus, a value of CB equal to 1.0 µF is recommended in all but the most cost sensitive
designs.
14
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AUDIO POWER AMPLIFIER DESIGN
A 1W/8Ω Audio Amplifier
Given:
Power Output
1 Wrms
Load Impedance
8Ω
Input Level
1 Vrms
Input Impedance
20 kΩ
Bandwidth
100 Hz–20 kHz ± 0.25 dB
A designer must first determine the minimum supply rail to obtain the specified output power. By extrapolating
from the Output Power vs Supply Voltage graphs in the Typical Performance Characteristics section, the supply
rail can be easily found.
5V is a standard voltage in most applications, it is chosen for the supply rail. Extra supply voltage creates
headroom that allows the LM4904 to reproduce peaks in excess of 1W without producing audible distortion. At
this time, the designer must make sure that the power supply choice along with the output impedance does not
violate the conditions explained in the Power Dissipation section.
Once the power dissipation equations have been addressed, the required differential gain can be determined
from Equation 2.
(2)
Rf/Ri = AVD/2
(3)
From Equation 2, the minimum AVD is 2.83; use AVD = 3.
Since the desired input impedance was 20 kΩ, and with a AVD impedance of 2, a ratio of 1.5:1 of Rf to Ri results
in an allocation of Ri = 20 kΩ and Rf = 30 kΩ. The final design step is to address the bandwidth requirements
which must be stated as a pair of −3 dB frequency points. Five times away from a −3 dB point is 0.17 dB down
from passband response which is better than the required ±0.25 dB specified.
fL = 100 Hz/5 = 20 Hz
fH = 20 kHz * 5 = 100 kHz
As stated in the External Components section, Ri in conjunction with Ci create a highpass filter.
Ci ≥ 1/(2π*20 kΩ*20 Hz) = 0.397 µF; use 0.39 µF
The high frequency pole is determined by the product of the desired frequency pole, fH, and the differential gain,
AVD. With a AVD = 3 and fH = 100 kHz, the resulting GBWP = 300kHz which is much smaller than the LM4904
GBWP of 2.5MHz. This figure displays that if a designer has a need to design an amplifier with a higher
differential gain, the LM4904 can still be used without running into bandwidth limitations.
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Figure 31. HIGHER GAIN AUDIO AMPLIFIER
The LM4904 is unity-gain stable and requires no external components besides gain-setting resistors, an input
coupling capacitor, and proper supply bypassing in the typical application. However, if a closed-loop differential
gain of greater than 10 is required, a feedback capacitor (C4) may be needed as shown in Figure 31 to
bandwidth limit the amplifier. This feedback capacitor creates a low pass filter that eliminates possible high
frequency oscillations. Care should be taken when calculating the -3dB frequency in that an incorrect
combination of R3 and C4 will cause rolloff before 20kHz. A typical combination of feedback resistor and
capacitor that will not produce audio band high frequency rolloff is R3 = 20kΩ and C4 = 25pf. These components
result in a -3dB point of approximately 320 kHz.
16
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Figure 32. DIFFERENTIAL AMPLIFIER CONFIGURATION FOR LM4904
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Figure 33. REFERENCE DESIGN BOARD SCHEMATIC
18
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LM4904 DSBGA BOARD ARTWORK
Composite View
Silk Screen
Top Layer
Inner VDD Layer
Inner GND Layer
Bottom Layer
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Table 1. Mono LM4904 Reference Design Boards
Bill of Material
Part Description
Quantity
Reference Designator
LM4904 Audio AMP
1
U1
Tantalum Capcitor, 1µF
2
C1, C3
Ceramic Capacitor, 0.39µF
1
C2
Resistor, 20kΩ, 1/10W
2
R2, R3
Resistor, 100kΩ, 1/10W
1
R1
Jumper Header Vertical Mount 2X1 0.100“ spacing
1
J1
PCB LAYOUT GUIDELINES
This section provides practical guidelines for mixed signal PCB layout that involves various digital/analog power
and ground traces. Designers should note that these are only "rule-of-thumb" recommendations and the actual
results will depend heavily on the final layout.
GENERAL MIXED SIGNAL LAYOUT RECOMMENDATION
Power and Ground Circuits
For 2 layer mixed signal design, it is important to isolate the digital power and ground trace paths from the
analog power and ground trace paths. Star trace routing techniques (bringing individual traces back to a central
point rather than daisy chaining traces together in a serial manner) can have a major impact on low level signal
performance. Star trace routing refers to using individual traces to feed power and ground to each circuit or even
device. This technique will require a greater amount of design time but will not increase the final price of the
board. The only extra parts required will be some jumpers.
Single-Point Power / Ground Connections
The analog power traces should be connected to the digital traces through a single point (link). A "Pi-filter" can
be helpful in minimizing High Frequency noise coupling between the analog and digital sections. It is further
recommended to put digital and analog power traces over the corresponding digital and analog ground traces to
minimize noise coupling.
Placement of Digital and Analog Components
All digital components and high-speed digital signal traces should be located as far away as possible from analog
components and circuit traces.
Avoiding Typical Design / Layout Problems
Avoid ground loops or running digital and analog traces parallel to each other (side-by-side) on the same PCB
layer. When traces must cross over each other do it at 90 degrees. Running digital and analog traces at 90
degrees to each other from the top to the bottom side as much as possible will minimize capacitive noise
coupling and cross talk.
20
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REVISION HISTORY
Changes from Revision B (April 2013) to Revision C
•
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 20
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