Transcend Transcend DDR3 1600 R-DIMM

Transcend Transcend DDR3 1600 R-DIMM
DDR3 Registered DIMM
DDR3 Registered DIMM is high-speed, low power memory module that
use DDR3 SDRAM in FBGA package, 1 pcs register in TFBGA package
and a 2048 bits serial EEPROM on a 240-pin printed circuit board. DDR3
Registered DIMM is a Dual In-Line Memory Module and is intended for
mounting into 240-pin edge connector sockets.
Synchronous design allows precise cycle control with the use of system
clock. Data I/O transactions are possible on both edges of DQS. Range
of operation frequencies, programmable latencies allow the same device
to be useful for a variety of high bandwidth, high performance memory
system applications.
Features
Pin Identification

RoHS compliant products.

JEDEC standard 1.5V ± 0.075V Power supply

VDDQ=1.5V ± 0.075V

Clock Freq: 533MHZ for 1066Mb/s/Pin
667MHZ for 1333Mb/s/Pin.
Symbol
Function
A0~A15, BA0~BA2
Address/Bank input
DQ0~DQ63
DQS0~DQS8,
/DQS0~/DQS8
CB0~CB7
Bi-direction data bus.
Data strobes

Programmable CAS Latency: 6, 7, 8, 9, 10, 11

CK0, /CK0
Data Check Bits
Parity bit for address and Control
bus
Clock Input. (Differential pair)
Programmable Additive Latency (Posted /CAS):
CKE0, CKE1
Clock Enable Input.
0,CL-2 or CL-1 clock
ODT0, ODT1
On-die termination control line
/S0, /S1, /S2, /S3
DIMM rank select lines.
= 6 (DDR3-1066), 7 (DDR3-1333), 8 (DDR3-1600)
/RAS
Row address strobe

8 bit pre-fetch
/CAS
Column address strobe

Burst Length: 4, 8
/WE
Write Enable

DM0~DM8
Data masks/high data strobes
Bi-directional Differential Data-Strobe
VDD
Core power supply

On DIMM thermal Sensor

Internal calibration through ZQ pin

On Die Termination with ODT pin

Serial presence detect with EEPROM

Asynchronous reset
800MHZ for 1600Mb/s/Pin.

Programmable /CAS Write Latency (CWL)
Par-In
VSS
Ground
VREFDQ, VREFCA
VDDSPD
I/O reference supply
Parity error found on address and
control bus
SPD EEPROM power supply
SA0~SA2
Address select for EEPROM
SCL
Clock for EEPROM
SDA
Data for EEPROM
/EVENT
Temperature Event Pin
/RESET
Set DRAMs Known State
VTT
SDRAM I/O termination supply
NC
No Connection
/ERROUT
Dimensions (Unit: millimeter)
Note:
1. Tolerances on all dimensions +/-0.15mm unless otherwise specified.
Pin Assignments
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