Narrow-Band Receiver and Ultra-Wideband Low Noise Amplifier NARROW-BAND RECEIVER AND ULTRA-WIDEBAND LOW NOISE AMPLIFIER BY GEFEI ZHOU, B.A.Se. A THESIS SUBMITTED TO THE SCHOOL OF GRADUATE STUDIES IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE OF MASTER'S OF APPLIED SCIENCE McMaster University Hamilton, Ontario, Canada © Copyright by Gefei Zhou, September 2009 Master of Applied Science (2009) McMaster University (Electrical and Computer Engineering) TITLE: Hamilton, Ontario, Canada Narrow-Band Receiver and Ultra-Wideband Low Noise Amplifier AUTHOR: GefeiZhou B.A.Sc. Electrical Engineering University of Ottawa, ON, Canada SUPERVISOR: Dr. M. Jamal Deen NUMBER OF PAGES: xix, 149 ii Abstract In past years, the evolution in communication technology has led to a need for highly-integrated, low-power, and low-cost circuit designs for wireless applications. The demand for radio frequency (RF) wireless transceiver operating at 2.4GHz band has attracted considerable research interest. The performance of such transceivers depends heavily on that of each of the individual blocks such as lownoise amplifiers and mixers. However, there are very few designs that focus on connecting the single-ended output low-noise amplifier (LNA) to a double-balanced mixer without the use of on-chip transformer. This kind of receiver front-end is designed to achieve high integration and low power consumption. In recent years, Ultra-Wideband (UWB) technology has developed very rapidly due to its high data transmitting rate and low power consumption. Meanwhile, the design of an Ultra-Wideband low-noise amplifier (LNA) has become an important challenge since it is normally the front-end of the radio frequency (RF) receiver system. Low power consumption of an UWB LNA is a critical requirement for UWB application such as portable devices or especially in biomedical systems. However, the design should not only focus on low power, but also focus on optimizing other performances at competitive levels over the entire bandwidth, where the Federal Communication Commission (FCC) has allocated 7.5 GHz of bandwidth from 3.1 iii GHz to 10.6 GHz for Ultra-Wideband. This thesis focuses on the design of a fully-integrated RF receiver front-end including a narrow-band LNA followed by a double balanced mixer. The receiver operates at 2.4 GHz and produces an output signal at 300 MHz. The circuit is designed and fabricated using TSMC O.lS-p,m CMOS technology. In order to translate the single-ended RF output signal from the LNA into the differential input pair of the mixer, a main novel idea of this design is to use one PMOS and one NMOS instead of two NMOS devices for the RF amplification stage of the double balanced mixer. The circuit achieves 16.3dB gain and 6.74mW power consumption while using 2.08 mm2 chip area. Another design presented in this thesis is a UWB LNA with special emphasize on low power consumption as well as on optimizing the overall performance. The circuit is designed using TSMC 0.13-p,m CMOS technology. It achieves a very flat gain of 10.3-12.1 dB and 3.4-5.9 dB noise figure (NF) throughout the entire bandwidth of 3.1-10.6 GHz. The power consumption is 2.81 mW which is extremely low compared to other designs and the chip area is 0.48 mm2 • The overall performance is also competitive according to its figure of merit (FoM). iv Acknowledgements I would like to express my sincerest gratitude and deep appreciation to my supervisor Dr. M. Jamal Deen for giving me this great opportunity to be involved in his research group and work on this project. I would also like to thank him for always answering me kindly and patiently whatever issue I have brought to him and his supervision and encouragement has given me enormous confidence to achieve my academic degree. His high expectations from his student have always encouraged us to do our best to be successful and I will never forget what he has taught us. It is a great honor to be one of his students. I would also like to thank Munir EI-Desouki who has given me plenty of help on my measurements and he is always patient on explaining the questions I have during the process. It is my pleasure to share his idea and work with him. I would express my gratitude to Dr. Qgnian Marinov for his valuable help and assistance throughout the project for many technical questions and laboratory which helped me significantly to complete my project. Also I would like to thank to Dr. Chili-Hung Chen for his kindly help and is always available whenever I need help on theory and measurements. I am very grateful to all my colleagues from Professor Deen's Microelectronics Research Laboratory especially Waleed Shinwari, Mohamed Abdelaziz Naser, v Hossein Kassiri, and Wei Zhou who provide me an excellent working and researching environment as well as offering me many support and suggestions I need to accomplish my measurements and project in this research laboratory. I have to specially mention a long-standing and very good friend Yanbo Xue who give me various advice and recommendation that helped me to complete my thesis sufficiently and confidently. Last but not least, I want to thank my family for their support and encouragement through my life. Their love, patience and understanding have encouraged me to pass all the difficulties and my achievements are as much mine as theirs. vi TABLE OF CONTENTS Abstract iii Acknowledgements v Table of Contents vii List of Symbols and Acronyms xii List of Figures xv List of Tables xix 1 Introduction 1.1 1.2 1.3 1 Narrow-Band Receiver 1 1.1.1 Introduction to Narrow-Band Receiver Systems 1 1.1.2 Applications of Narrow-Band Receiver Systems 2 Ultra-Wideband Communications . 4 1.2.1 Introduction to Ultra-Wideband Systems 4 1.2.2 Applications of Ultra-Wideband Systems 6 CMOS Technology . . . . . . . . . . . . . . . . . 7 vii 1.4 Motivation . . . . . . . . . . . . 2 1.4.1 Narrow-Band Receiver. 8 1.4.2 Ultra-Wideband LNA 9 1.5 Thesis Organization. ..... 10 Narrow-Band Receivers 11 2.1 11 Narrow-Band Receiver Fundamentals 2.2 Background of CMOS Technology 12 2.2.1 MOSFET Fundamentals . . 12 2.2.2 MOSFET High-Frequency Model. 17 2.2.3 PMOS Characteristic . . . . . . 19 2.3 Receiver Performance Characteristics 3 8 20 2.3.1 Gain 20 2.3.2 Noise. 22 2.3.3 Linearity . 27 2.3.4 Gain Compression 31 2.4 Narrow-Band Receiver Literature Review 33 Narrow-Band LNA and Mixer Theories 35 3.1 35 Narrow-Band LNA Fundamentals 3.2 Performance of Narrow-Band LNA . 36 3.2.1 Power Gain 36 3.2.2 Noise ... 41 3.2.3 Linearity . 43 3.2.4 Input and Output Return Loss 43 viii ... 44 3.3 Narrow-Band LNA Topologies 44 3.2.5 3.3.1 Power Dissipation Inductively Source Degenerated LNA 44 3.4 Mixer Fundamentals ..... 47 3.5 Performance of Active Mixer 52 3.5.1 Conversion Gain 52 3.5.2 Noise ... 54 3.5.3 Linearity . 56 3.5.4 Feedthrough. 57 3.5.5 Port-to-Port Isolation. 57 3.6 Mixer Topologies ..... 57 3.6.1 Unbalanced Mixer 57 3.6.2 Single Balanced Mixer 62 3.6.3 Double Balanced Mixer 66 4 Ultra-Wideband LNA Theories 71 4.1 Ultra-Wideband LNA Fundamentals. 71 4.2 UWB LNA Performance 72 4.2.1 Gain 72 4.2.2 Noise. 73 4.2.3 Linearity . 74 4.2.4 Input and Output Return Loss 74 4.3 UWB LNA Topologies ......... 4.3.1 Inductively Source Degenerated UWB LNA 4.3.2 Cascode UWB LNA .............. ix 75 75 77 4.4 4.3.3 Feedback UWB LNA . 77 4.3.4 Cascade UWB LNA . 78 4.3.5 Differential UWB LNA . 78 UWB LNA Literature Review . 79 5 Narrow-Band Receivers in 0.18-p,m CMOS Technology 5.1 82 . 82 5.1.1 Design Process of Narrow-Band LNA 83 5.1.2 Design Process of Downconversion Double Balanced Mixer 86 5.1.3 Design Process of Receiver Front-End . 90 Receiver Front-End Design 5.2 Circuit Implementation of Receiver Front-End 93 5.3 Simulation Results ... 95 5.4 Measured Performance . .100 5.5 Comparison and Discussion . .105 6 UWB LNA in 0.13-p,m CMOS Technology 108 6.1 Design Process and Theory of UWB LNA .109 6.2 Circuit Implementation of UWB LNA .115 6.3 Simulation Results .116 6.3.1 Gain .117 6.3.2 Noise. .118 6.3.3 Linearity . .119 6.3.4 Input and Output Return Loss .120 6.3.5 Power Consumption . .121 Comparison and Discussion . .122 6.4 x 7 Conclusion 126 7.1 Summary. .126 7.2 Future Work .127 7.2.1 Narrow-Band Receiver. .127 7.2.2 Ultra-Wideband Low-Noise Amplifier. .128 A Experimental Setup 130 Al Gain and output Measurement .132 A2 IIP3 Measurement .133 . A3 Noise Figure Measurement .134 B S-Parameters 138 References 140 xi List of Symbols and Acronyms Symbols Oxide capacitance per unit gate area Permittivity of the silicon oxide Oxide thickness co Permittivity of free space 9m MOSFET transconductance Conversion gain G Power gain k'n Process transconductance parameter Mobility of electrons in the n channel Mobility of holes in the induced p channel k Boltzmann constant T Temperature in Kelvin Input Third-Order Intercept Point Third-Order Intermodulation Third-Order Intercept Point xii OIPg Output Third-Order Intercept Point HdB IdB compression point fs reflection coefficient seen looking toward the source f reflection coefficient seen looking toward the load L fin Input reflection coefficient f Output reflection coefficient out VDD DC voltage supply 8 11 Input return loss 8 12 The reverse transmission (or leakage) factor 8 21 Power gain 8 22 Output return loss Zs Source impedance ZL Load impedance Zin Input impedance Zout Output impedance Zo Characteristic impedance Acronyms AC Alternating Current CMOS Complementary Metal-Oxide Semiconductor dB Decibel xiii DC Direct Current DSB Double-Sideband DUT Device Under Test FCC Federal Communication Commission FoM Figure of Merit GPS Global Positioning System IF Intermediate Frequency KCL Kirchhoff's Current Law LNA Low Noise Amplifier LO Local Oscillator MOSFET Metal-Oxide-Semiconductor Field-Effect Transistor NF Noise Figure NMOS n-channel MOSFET PMOS p-channel MOSFET PSD Power Spectral Density RMS Root Mean Square RF Radio Frequency SNR Signal-to-Noise Ratio SoC System-on-a-Chip SSB Single-Sideband TSMC Taiwan Semiconductor Manufacturing Company UWB Ultra-Wideband VLSI Very Large-Scale Integration WLANs Wireless Local Area Networks xiv List of Figures 1.1 Home network system architecture [6].. 3 1.2 Home network characteristics [5] .. 3 Bluetooth applications [8]. . . . . . 4 1.3 1.4 Envisaged scenarios for future UWB radio application [11] .. 6 1.5 General configuration of a UWB imaging system. 7 2.1 Block diagram of the receiver front-end [17]. .. 12 2.2 Cross-section of a CMOS integrated circuit [23]. 13 2.3 3-D physical structure of the NMOS transistor [23]. 14 2.4 (a) Simplified circuit symbol for the n-channel MOSFET (NMOS), and (b) simplified circuit symbol for the p-channel MOSFET (PMOS) [23]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2.5 Small-signal equivalent circuit for the MOSFET [23]. . 16 2.6 (a) Amplifier Circuit, and (b) small-signal equivalent circuit modeL 17 2.7 MOSFET High-frequency equivalent circuit model [23]. 18 2.8 Model used in noise figure calculation [25]. . . 24 2.9 Cascade of k gain stages, each with noise [25]. 25 2.10 Graphical representation of the input and output referred third-order . . . . . . . . . . . . . . . . . . . . 30 intercept points [25]. . . . . . xv 2.11 Cascade of n nonlinear stages, each with gain G [25]. 31 2.12 Illustration of the ldB compression point [25]. . . . . 31 3.1 A two-port network with general source and load impedances [24]. 36 3.2 Thermal noise of a MOSFET [22]. . . . . . 42 3.3 Inductively source degenerated amplifier. 45 3.4 Small-signal equivalent circuit of inductively source degenerated . 46 3.5 Simple switch used as mixer [32]. . 49 3.6 Implementation of a switch with an NMOS device [32]. 50 amplifier 3.7 Periodic rectangular waveform of La signal. . . . . 51 3.8 Folding of RF and image noise into the IF band [32]. 55 3.9 Unbalanced mixer [25] .. 58 3.10 RF input signal [31].... 59 3.11 Single balanced mixer [25]. . 62 3.12 Differential La signals: (a) "Vzt, and (b) "Vz;;- [31] .. 63 3.13 Double balanced mixer [25]. . . . . . . . . . . . . 66 v:.j, (b) v:.j [31]. 67 3.14 Differential RF input signals: (a) 4.1 Inductive source degeneration technique for UWB LNA. 4.2 Cascode configuration of transistors that replace M1 in the UWB 76 LNA showin in Figure 4.1. . . . . . . 77 4.3 Feedback technique for UWB LNA. . 78 4.4 The amplifiers in a cascade structure.. 79 4.5 Differential UWB LNA configuration. 79 5.1 Block diagram of designed receiver front-end. 83 xvi 5.2 Schematic of the inductively source degenerated narrow-band LNA. 5.3 Small-signal equivalent input matching network of the inductively 84 source degenerated narrow-band LNA. . . . . . . 85 5.4 Schematic of the modified double balanced mixer. 87 5.5 Ideal differential current signals of NMOS and PMOS branches. 89 5.6 Circuit schematic of the receiver. . . . . . 91 5.7 Physical layout of narrow-band receiver. . 94 5.8 Photomicrograph of narrow-band receiver. 95 5.9 The output of narrow-band receiver. 96 5.10 The gain of narrow-band receiver. . 97 5.11 The noise figure of narrow-band receiver. 98 5.12 HP3 of narrow-band receiver. 99 5.13 Measured output of narrow-band receiver from the spectrum ana101 lyzer. . 5.14 Measured output of narrow-band receiver from the output data at Pin = -30 dBm. . . . . . . . . . . . . . . . . . . . . 102 5.15 Measured noise figure of narrow-band receiver. . 103 5.16 Measured HP 3 of narrow-band receiver. . . . . . . 104 6.1 Circuit schematic of ultra-wideband low-noise amplifier. . 109 6.2 Circuit schematic of the three-section Chebyshev filter. 6.3 Physical layout of the ultra-wideband low-noise amplifier. . 117 6.4 The gain (821 ) of UWB LNA. . . . . . . . . 118 6.5 The noise figure (NF) of the UWB LNA. . 119 6.6 HP3 of UWB LNA. . . . . . . . . . . . . . . 120 xvii . . 111 6.7 The input and output return loss (811 and 8 22 ) of UWB LNA. . .121 A.1 Experimental Setup for output measurement. . .134 .. .135 A.2 Experimental Setup for IIP3 measurement. A.3 Calibration Setup for noise figure measurement. .136 A.4 Experimental Setup for noise figure measurement. .137 B.1 Incident and reflected waves of a two-port network [24]. .138 B.2 Signal flow graph of a two-port network [24]. . . . . . . . .139 xviii List of Tables 5.1 Narrow-band receiver design parameters. . . . . . . . . . . . . 94 5.2 Simulation results of the narrow-band receiver performance. . .100 5.3 Measured performance of the narrow-band receiver. . . . . . .105 5.4 Comparison to other Narrow-Band Receiver Performances.. .106 6.1 UWB LNA design parameters. 6.2 Simulation of UWB LNA Performance. .122 6.3 Comparison of UWB LNA Performance.. .124 ..... xix .116 Chapter 1 Introduction 1.1 1.1.1 Narrow-Band Receiver Introduction to Narrow-Band Receiver Systems The design of radio frequency receiver integrated circuits requires a combination of expertise in the areas of circuit design, system architecture, and Ie process technology [1]. One of the most important receiver types is the 2.4-GHz narrow-band receiver since many wireless networking architectures are based on it. Therefore, the demand for wireless transceivers operating in the 2.4-GHz band has led to extensive research on the relevant system architectures as well as integrated circuit designs that implement specific transceiver functions [2-4]. The performance of such transceivers depends heavily on that of each of the individual blocks. Also, the quality and range of the communication link is determined by the electrical performance of the transmitter and receiver [1]. These qualities, as well as the cost, and the system's marketability depend on the semiconductor technology and 1 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering design techniques used. For the receiver front-end, both the Low-Noise Amplifier (LNA) and the mixer are key circuit blocks in its operation and performance. However, very few works focus on connecting the single-ended output LNA to the double balanced mixer without the use of on-chip transformer. Realizing such a connection is one of the fulfillment for compact implementation of RF applications. In this thesis, the design of a fully-integrated LNA and a double-balanced mixer on a single chip are described in detail. 1.1.2 Applications of Narrow-Band Receiver Systems The traffic growth of audio- and video-based messages has led to the need for increasingly higher data rates for next-generation wireless communication applications [1]. Cellular telephony and wireless local area networks (WLANs) are the two primary directions and in recent years, fully integrated system-on-a-chip (SoC) realization become a major interest in receiver front-end designs while maintaining low cost [1]. This is the reason that Complementary Metal-Oxide Semiconductor (CMOS) technology is very popular in RF circuit designs. The 2.4-GHz narrow-band receiver can also be used in a wide variety of applications, including industrial control and monitoring, public safety, vehicular sensor, etc [5]. In addition, one of the largest application areas is for home automation and networking including wireless mice, keyboards, and radio or television remote controls [5], as shown in Figure 1.1. The characteristics of such a home network are shown in Figure 1.2. Note that the typical transceiver range is on the order of 10-20 m, and the individual channel bandwidths are around 800-900 MHz. 2 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering Wi·Ficlient nn_____ Wi~Fi connection Figure 1.1: Home network system architecture [6]. Figure 1.2: Home network characteristics [5]. Another application of the 2.4-GHz receiver is for use with Bluetooth technology such as cell phones, cordless headsets, cameras etc [7], as shown in Figure 1.3 [8]. This technology becomes attractive as low cost and low power, and this 3 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering points to CMOS technology as an important contender [4]. Nowadays, many researchers focus on low-power, highly-integrated, and low cost narrow-band receiver. In this thesis, we focus on low-power 2.4-GHz narrow-band receiver design while keep other performance parameters at competitive levels. WiMAX Figure 1.3: Bluetooth applications [8]. 1.2 1.2.1 Ultra-Wideband Communications Introduction to Ultra-Wideband Systems In recent years, the rapid inroads that technology has made into our daily lives was made possible by the continuing evolution of wireless communication systems. Among the new challenges for the ongoing development of these systems, are the combined problems of high data transmitting rate, low interference, low complexity, low cost and low power consumption. One approach is to make use 4 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering of ultra-wideband (UWB) technologies, which have seen much improvement in recent years. Ultra-Wideband Communications was first employed by Guglielmo Marconi in 1901 to transmit Morse code sequences across Atlantic Ocean using spark gap radio transmitters [9]. Approximately fifty years after Marconi, UWB technology was applied to impulse radars in military applications and this technology was restricted to military from 1960s to 1990s. However, ultra-wideband is now ready for commercial applications because of recent advancements in microprocessors stemming from the rapid development of semiconductor technology. Therefore, it is more appropriate to consider UWB as a new name for a long-existing technology [9]. The FCC has allocated 7.5 GHz bandwidth from 3.1-10.6 GHz frequency range for ultra-wideband technology [10]. The advantages of the UWB system are the following: • High data transmission rate, • simple transceiver architecture and low costs, • large channel capacity and high performance in multipath channels, and • low signal-to-noise ratio and low power. UWB technology can be used in radar application, biomedical imaging systems, or positioning system, etc. 5 M.A.Sc. Thesis - Gefei Zhou 1.2.2 McMaster - Electrical and Computer Engineering Applications of Ultra-Wideband Systems As shown in Figure 1.4, ultra-wideband technology can be used in high data rate wireless personal area networks, intelligent wireless area networks, as well as sensor, positioning, and identification networks [11]. For example, intelligent wireless area networks are characterized by a high density of devices in a domestic or office environment with the main requirements for such devices being that they are of low cost and have a low power consumption. Figure 1.4: Envisaged scenarios for future UWB radio application [11]. In addition to the above networking applications, UWB technology has also been developed for biomedical applications. Ultra-wideband imaging systems have shown promising results for use in early breast cancer detection. Such systems have been found to have a good detection rate and a low false alarm rate [12]. In this system, wideband pulse is transmitted from an antenna toward the target 6 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering area. As the signal propagates through various tissues, reflections occur, and the backscattered signal can be used to map different layers of the body [12]. Figure 1.5 shows the general idea of this UWB application. A very significant advantage of this technique is that it is not harmful to the human body and can be easily repeated. UWB technology can also be used in some portable devices with low power consumption. UWBQj------JN .........UWB Transceiver Antenna Target Figure 1.5: General configuration of a UWB imaging system. 1.3 CMOS Technology Radio-frequency integrated circuits using Complementary Metal-Oxide Semiconductor (CMOS) technology are developing a strong presence in the commercial world such as wireless LAN and Bluetooth [13]. The main advantages of using CMOS for designing RF circuits is that it is high speed, low cost, and allows for a high level of compact integration on a single chip. This is the reason that CMOS is commonly used in very large-scale integration (VLSI) technology in which millions of transistors can be integrated on a single die or chip [14]. Of particular importance to RF designers is the high speed capability of CMOS. This allows CMOS technology to operate effectively in the GHz frequency range 7 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering [15] with great levels of integration on a single chip while keeping high performance and low cost [16]. The current need to exploit such regions of the radio spectrum, as well as the high signalling rates required by modern digital telecommunications, therefore make CMOS a very attractive technology choice. 1.4 Motivation 1.4.1 Narrow-Band Receiver One important part of the narrow-band receiver front-end is the connection between the low noise amplifier (LNA) to the double balanced mixer. While there are severally different ways to realize such a receiver front-end as described in the current literature, these methods have their own drawbacks when fully-integrated on a single chip. For example, one way to realize this front-end is to use a transformer that can convert the single RF output of the LNA to the differential input of mixer while another way to do this is to use a narrow-band two stage tuned differential LNA that can provide a differential output. However, the first approach is not very easy to implement as integrating an efficient transformer on chip is both difficult and area intensive, which degrades the performance and increases the cost of the chip. The second approach obviously requires a differential RF input. In addition, a two-stage tuned differential LNA has a high power consumption. To overcome these two issues, we suggest a novel idea that can transform a single output signal from a single-ended LNA into a differential input signal for 8 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering a double balanced mixer. This scheme also allows all components to be fullyintegrated on a single chip. In this work, we use an NMOS-PMOS pair of devices as the RF input amplification stage of a standard double balanced mixer, rather than using a conventional NMOS-NMOS configuration which will be discussed later in this thesis. This achieves the single-ended LNA to double balanced mixer connection without the need for an on-chip transformer while also keeping all the performance characteristics at competitive levels. 1.4.2 Ultra-Wideband LNA Portable devices are required to operate for extended periods of time without need to charge or change the battery, a fact which highlights the importance of lowpower circuits [2]. This leads to a major challenge for UWB LNA design. Obviously, low power consumption requires a low supply voltage. However, reduction of the supply voltage reduces the circuit's performance parameters such as the linearity or gain. The target of this thesis is to improve the power consumption as well as optimize the overall performance of an ultra-wideband low noise amplifier. In order to obtain low power dissipation, a 1.2V supply voltage has been selected together with a reasonable bias voltage to provide a certain DC current. As a result, the power consumption can be optimized. The UWB LNA design in this thesis is built as inductive source degeneration cascode structure. Furthermore, the design also focus on optimizing the overall performance which can be measured using the figure of merit (FoM). 9 M.A.Sc. Thesis - Gefei Zhou 1.5 McMaster - Electrical and Computer Engineering Thesis Organization This thesis is divided into seven chapters beginning with Chapter 1 (this chapter). In Chapter 2, a discussion of the fundamental theories of the receiver front- end is provided including some background information on MOSFET and CMOS technology, as well as a discription of the desired performance characteristics for the narrow-band receiver. Furthermore, a review of the literature on narrow-band receivers and the relevant design targets is also provided. In Chapter 3, the details of the narrow-band receivers containing narrow-band low-noise amplifier designs and downconversion double balanced mixer designs are discussed. The fundamental design theories, performance characteristics, and design topologies are reviewed and discussed for both LNAs and mixers. In Chapter 4, the details of ultra-wideband low-noise amplifiers including fun- damentals theories, performance characteristics, and different design topologies are explained. A brief literature review and discussion of the design targets for UWB LNA systems are also presented in this chapter. Chapter 5 discusses the narrow-band receiver front-end design. The design theories and circuit implementation process are described. In addition, the simulation and implementation results are also discussed and compared with other results found in the published literature. Chapter 6 describes the ultra-wideband low-noise amplifier design including the design theories, circuit implementation, simulation results, discussions, as well as comparisons to other existing published works. Finally, Chapter 7 presents a summary of the entire thesis. Possible future work for improving the designs presented in this thesis is also discussed in this chapter. 10 Chapter 2 Narrow-Band Receivers 2.1 Narrow-Band Receiver Fundamentals The purpose of the receiver system front-end is to receive a relatively weak signal from an antenna assembly and to perform the initial stages of amplification and frequency conversion while maintaining a good signal-to-noise ratio (SNR). The receiver front-end architecture is shown in Figure 2.1 where the input is an RF signal from the antenna and the output is an intermediate frequency (IF) signal [17]. The incoming RF signal is first amplified by a low-noise amplifier (LNA) and then is fed into the mixer stage to produce the IF output. The IF amplifier is designed to amplify the IF output if needed. The receiver design in this thesis is focused on the narrow-band LNA and the downconversion double balanced mixer with particular emphasis on the double balanced Gilbert Mixer design. Normally, an upconversion mixer is used in transmitter design [18-21] while the downconversion mixer is used in receiver circuit. 11 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering LO Differential Inputs Downconversion Mixer Figure 2.1: Block diagram of the receiver front-end [17]. 2.2 Background of CMOS Technology Complementary Metal-Oxide Semiconductor (CMOS) devices were first introduced in the mid-1960s, initiating a revolution in the semiconductor industry [22]. The low cost of fabrication and the possibility of greater improvements to the speed of MOSFETs have made it the technology of choice for the integrated circuit designs. A CMOS chip is fabricated with both the NMOS and PMOS transistors instead of NMOS transistors alone. Figure 2.2 shows a cross-sectional view of a CMOS device, where the NMOS transistor is implemented directly in the p-type substrate, and the PMOS transistor is fabricated in a special n region, known as an n well [23]. The two devices are isolated from each other by a thick region of oxide that functions as an insulator [23]. Indeed, CMOS is most widely used of all integrated circuits and our circuits are based on O.18-f.Lm and O.13-f.Lm CMOS technologies. 2.2.1 MOSFET Fundamentals The metal-oxide-semiconductor field-effect transistor (MOSFET) is a major type of semiconductor device. The physical structure for the n-channel type (NMOS) is 12 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering NMOS r S A G PMOS '\ r D D A G '\ S Figure 2.2: Cross-section of a CMOS integrated circuit [23]. shown in Figure 2.3 [23]. The device has a total of four terminals: the gate (G), source (S), drain (D), and substrate or body (B). The value of Vas at which a sufficient number of mobile electrons are induced in the channel region to form a conducting channel is called the threshold voltage and is denoted as vt [23]. Normally, the threshold voltage is used to determine whether the transistor is on or off. For the n-channel MOSFET (NMOS), whose simplified circuit symbol is shown in Figure 2.4(a), there are three distinct regions of operation: • when Vas < vt, the NMOS transistor is in the cutoff region since no current flows, • when Vas > vt and VDs < Vas - vt, the NMOS transistor is in the triode 13 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering s Source region p-type sUbstra~te~""""'~ (Body) B region Drain region Figure 2.3: 3-D physical structure of the NMOS transistor [23]. region. In this case, the current flowing from drain to source (ID - VDs characteristic) is calculated as [23]: (2.1) where /In is the mobility of electrons in the n channel, and Cox = ~t ox is the ox- ide capacitance per unit gate area. The constant, cox is the permittivity of the silicon oxide, where cox = 3.9co and co is the permittivity of free space. The current I D enters the drain terminal and leaves through the source terminal. • When Vas 2:: vt and VDs 2:: Vas - vt, the NMOS transistor is in the saturation region. Current flowing in this operating region is calculated according to 14 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering s D 1-----0 Ge-----1 B 1----oB s D (b) (a) Figure 2.4: (a) Simplified circuit symbol for the n-channel MOSFET (NMOS), and (b) simplified circuit symbol for the p-channel MOSFET (PMOS) [23]. [23]: (2.2) In most analog circuit designs, the MOSFET needs to be biased, which means that the gate-to-source voltage Vas must be fixed in order to provide the desired DC current I D • In addition, the MOSFET is normally working in the saturation region which leads to the DC current I D , which is calculated using equation (2.2). When MOSFET is biased, it will provide a transconductance gain gm, which is given by [23]: gm id == - I vgs W L = kn-(Vas - vt), (2.3) where k~ is the process transconductance parameter and is k~ = f-LnCox [23]. Note that gm is equal to the slope of the i D - vas characteristic at the bias point [23]: gm== aiD avas' 15 (2.4) M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering This is the formal definition of 9m, which can be shown to yield the expression given in equation (2.3) [23]. The small-signal equivalent circuit, shown in Figure 2.5, is a very important tool for analyzing MOSFET circuit. For example, applying this equivalent model G o---~o D + V gs s Figure 2.5: Small-signal equivalent circuit for the MOSFET [23]. to a basic circuit, Figure 2.6(a) can be modeled by its small-signal equivalent circuit as shown in Figure 2.6(b). Then the circuit performance such as gain, input impedance, or output impedance can be obtained easily. To analyze the voltage gain from Figure 2.6(b), it is obvious that (2.5) Furthermore, we know Vgs = Vin, this indicates that the voltage gain is (2.6) 16 McMaster - Electrical and Computer Engineering M.A.Sc. Thesis - Gefei Zhou (a) lin ~ Vin G Ra D + + ! V gs gmVgs RL Va s (b) Figure 2.6: (a) Amplifier Circuit, and (b) small-signal equivalent circuit model. This model can be applied to further complex circuits that includes more resistances, capacitances, or inductances. 2.2.2 MOSFET High-Frequency Model The small-signal equivalent circuit of the high-frequency response is shown in Figure 2.7 [23]. At high frequencies, the internal capacitances in the MOSFET device 17 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering become significant and can not be neglected. In fact, this includes four capacitances C gs , C gd , Csb, and C db . However, this becomes quite complex for hand analysis, and we usually neglect Csb and C db which results in a significant simplification of the model. The values of these internal capacitances can be calculated as follows [23] G Cgd I II-~--t---O 01----+ V gs D Cgs s Figure 2.7: MOSFET High-frequency equivalent circuit model [23]. • In the cutoff region: C gs = C gd = 0) (2.7) (2.8) • and in the triode region: (2.9) • and in the saturation region: (2.10) 18 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering Cgd 2.2.3 = O. (2.11) PMOS Characteristic The p-channel MOSFET (PMOS), shown in Figure 2.4(b), operates in the same manner as the NMOS device except that and VGS VDS are negative and the threshold voltage ltt is also negative. In addition, the current i D enters the source terminal and leaves through the drain terminal. Unlike NMOS, it is required that VGS :s; \It to turn a PMOS transistor on. Otherwise, the PMOS transistor is off. Therefore, the two distinct regions when PMOS is on can be described accordingly: • When VGS :s; \It or equivalently VSG ~ Ilttl and VDS ~ VGS - ltt, the PMOS transistor is in triode region. The current i D is the same as for NMOS from equation (2.1), except for replacing /-In with /-lp, (2.12) where /-lp is the mobility of holes in the induced p channel. Typically, /-lp = 0.25 to O.5/-ln , which depends on the specific process-technology. • When VGS :s; ltt and VDS :s; VGS - ltt, the PMOS transistor is in saturation region. The current i D can be obtained from equation (2.2) by replacing /-In with /-lp' (2.13) In CMOS technology, PMOS originally dominated MOSFET manufacturing. However, the NMOS technology has now virtually replaced PMOS due to serveral 19 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering advantages. Usually, the mobility of holes is slower than the mobility of electrons, which means that NMOS devices are faster. 2.3 Receiver Performance Characteristics 2.3.1 Gain Normally, voltage gain and power gain can be defined as [23]: Voltage gain (A v ) == vo, (2.14) VI where Vo is the output voltage and VI is the input voltage, and load power (PL ) input power (PI) voio Power gain (Ap ) -.-, (2.15) VI'/,I and can be expressed in decibels (dB) as [23]: Voltage gain in decibels 20 log IAvl 20 log Power gain in decibels I:~ (2.16) I. (2.17) 10 log IApl 10 log IVo~o VI'/,I 20 I, M.A.Sc. Thesis - Gefei Zhou Given i I = it and io = McMaster - Electrical and Computer Engineering ffi;, where R in is the input resistance and R L is the output (load) resistance, the input and output power can be obtained as: PI . 2 VI (2.18) = VI"'I = R in ' (2.19) Substituting equations (2.18) and (2.19) in equation (2.17), the power gain in decibels can be reformulated as Power gain in decibels = 10 log IV~:~L I. VI Rm (2.20) If we assume the input impedance R in is equal to the load impedance R L and are both equal to the source impedance Rs (Rin = R L = Rs), which is usually 50n, equation (2.20) can be expressed as: Power gain in decibels 10 log I:~ I 20 log I:~ I. (2.21) This result is the same as equation (2.16). Therefore, under this situation, the voltage gain is equal to the power gain when expressed in decibels. This means if a good input and output matching network is achieved (the input and output resistances are matched), the voltage gain should be equal to the power gain in decibels 21 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering (dB). However, if the input and output resistances are not matched, the relationship between power gain and voltage gain is: Power gain in decibels 1 I~~::~ = 10 log I:~~; 20 log :~ + 10 log ~: 10 log I 1 I 1 1 Voltage gain in decibels + 10 log 2.3.2 Ii; I· (2.22) Noise Noise in transistors is usually generated by the random motions of charges or charge carriers in devices and materials [24]. In RF front-end circuit designs, the noise is caused by the small current and voltage fluctuations that are generated within the devices themselves, and these various sources of noise are [24,25]: • Thermal Noise, which basically arises due to the random thermally generated motion of electrons. It occurs in resistive devices and is proportional to the temperature. • Shot Noise occurs in all energy barrier junctions, namely, in diodes and bipolar transistors. Actually, it happens whenever a flux of carriers (possessing potential energy) passes over an energy boundary. • Flicker Noise or 1/f noise arises from random trapping of charge at the oxidesilicon interface of MOS transistors and in some resistive devices. • Additive Amplitude Noise is described by noise adding to the amplitude of the desired signal. 22 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering • Additive Phase Noise is the noise adding to the phase of the desired signaL The most basic type of noise is thermal noise, which is commonly used for noise estimation in RF circuit designs. For instance, the thermal noise of a resistor exists even when there is no current flowing through it. It has a flat power spectral density (PSD) which can be given as follows [25]: v2 or 8.1 = 4kTR (2.23) where v2 and -:[2 are the mean square noise voltage and current, respectively, k is the Boltzmann constant, T is the temperature in Kelvin, and 8.1 is the unit of bandwidth in Hertz. The unit of equation (2.23) is V 2 /Hz or A 2 /Hz. A parameter called noise figure (NF) is a commonly used method of specifying the additive noise inherent in a circuit or system [25]. It describes how much the internal noise of an electronic element degrades the signal-to-noise ratio (SNR) [25]. Mathematically, the noise figure is defined as [24] NF SNRin SNRmt SinNout SoutNin' Sin/Nin Sout/Nout (2.24) where Sin, Nin are the input signal power and the input noise power while Sout, N out are the output signal power and the output noise power. In a single stage model with a power gain G, the NF can be expressed as NF = N out . GNin 23 (2.25) M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering In an RF receiver, the noise is mainly generated from the source resistance and the noisy devices which can be modeled as in Figure 2.8 [25]. Nsource_resistance Noisy two-port network with noise Ndevice V out Figure 2.8: Model used in noise figure calculation [25]. The input noise generated from the source resistance can be modeled as [25] N in = Nsource-resistance' (2.26) Assuming the power gain of this network is G, therefore, the output noise is given by [25]: N out where Ndevice = G . Nsource-resistance + Ndevice. (2.27) is the noise from the device at the output of the device. The noise figure of this network can be obtained by substituting equations (2.26) and (2.27) into (2.25), which is: NF G· Nsource-resistance + Ndevice G . Nsource-resistance 1+ Ndevice/G Nsource-resistance 24 (2.28) M.A.Sc. Thesis - Gefei Zhou Denoting Ndevicdnput McMaster - Electrical and Computer Engineering = Ndevice/ G, which means referring the noise to the input of the device. The noise figure can therefore be expressed as: NF = 1+ N.d'elVCeJl1 . pu t . (2.29) NsourceJesistance Note that this is input referred noise figure. Usually, the expression above is referred to as the noise factor in linear value, and the relationship between noise figure in decibels (dB) and the noise factor is [25]: NFdB = lOloglo (NF). (2.30) Considering Figure 2.9 where a cascade of noisy stages is shown, each individual block has an available power gain Gi , noise figure NFi , device noise N i , input noise Nin,i and output noise Nout,i' where the letter i denotes the ith stage in the cascade. Assuming that the source impedance for each stage is the same, since this assures the input noise Nin,i is the same at each stage. The overall noise figure (NF) derivation consists of the following four steps [25]: Sin Nin G1 NFl Mn,i Nout,i ••• - 1-- ... N1 Gk NFk Sout Nk N out Figure 2.9: Cascade of k gain stages, each with noise [25]. 1. The overall output signal power can be obtained from multiplying the input 25 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering signal power by the power gain of each stage. (2.31) 2. From equation (2.25), the noise figure of ith stage is: NFi Sin,iNout,i Sout,iNin,i Nout,i C·Nm,t.' (C 1 (G1 Gi-1)SinNout,i Gi)SinNin,i (2.32) ~ and applying equation (2.27), the output noise of ith stage is: (2.33) Furthermore, Nin,i = N in since we assumed the input noise Nin,i is the same at each stage. Substituting this into equation (2.33), we have: (2.34) Now substituting equation (2.34) into (2.32), yields: (2.35) Relating N i to NFi , equation (2.35) can be rearranged as: (2.36) 26 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering 3. Including all k stages, the resulting overall output noise can be obtained by using equation (2.27) iteratively: Substituting equation (2.36) into (2.37), yields: N out = (GlG Z ••• Gk)Nin + (NFl - l)(GlGZ ••• Gk)Nin + ... + (NF k -l)GkNin . (2.38) 4. Finally, the total noise figure of the cascaded stages in Figure 2.9 can be obtained by substituting equations (2.31) and (2.38) into (2.24). Therefore, the overall NF expression is: (2.39) This equation is called the Friis formula. Equation (2.39) clearly indicates that the overall noise figure is dominated by the first stage of the entire system. 2.3.3 Linearity In an ideal linear receiver system, the IF output signal is proportional to the RF input signal. However, in reality, there are higher-order non-linearities which results in intermodulation distortion. Typically, only nonlinearities of the third order and below are of interest to RF designers. Mathematically, these nonlinearities can be 27 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering represented in terms of third-order polynomial of the form [25]: (2.40) where coefficients an are constants, s(t) is the input signal, and y(t) is the output signal. In order to analyze this distortion, a so called "two-tone" test is applied since intermodulation arises if more than one tone appears at the input (wo). Therefore, we assume that two interference signals appear at the input, specified by [25]: s(t) = Al COS WIt + A 2 cOSW2t, where WI (2.41) and W2 are the angular frequencies of the two interferers. Substituting equation (2.41) into (2.40), the intermodulation products can be obtained according to [25]: al (AI coswit + A 2 cOSW2t) y(t) + a2 (AI coswit + A 2cOSW2t)2 + a3 (AI COS WIt + A 2cOSW2t)3 . (2.42) For simplicity and clarity, only third-order intermodulation products are reproduced here [25]: 2WI ±W2: 2W2 ± WI: 3a3AiA2 4 3a3A~AI 4 cOS( 2W I + W2)t + cOS( 2W2 + wr)t + 28 3a3AiA2 4 cOS( 2W I - W2)t) 3a3A~AI 4 cOS( 2W2 - wr)t. (2.43) M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering Normally, the removal of the third order intermodulation products at and 2W2 - since Wl Wl and 2Wl - W2 requires a filter with very narrow bandwidth. This is impractical W2 are to close to the desired signal at woo To quantify this distor- tion, the term 1M3 is defined as the ratio of the amplitude of the third-order intermodulation product to the amplitude of the fundamental output signal given by y(t) = a1Acoswot. Mathematically, if we assume the amplitudes of the desired and unwanted signals are the same, A=A 1 =A2 , 1M3 can be defined as [25]: (2.44) Now, we will define another performance metric, called the third-order intercept point (IP 3 ), shown in Figure 2.10 [25], where it is the intersection of the ideal first order and third order curves. Moreover,IIP3 stands for Input referred ThirdOrder Intercept Point and OIP 3 stands for Output referred Third-Order Intercept Point. Mathematically, the third-order intercept point, IP3 is defined by the relation [25]: (2.45) After solving for A IP3 , we have: (2.46) If we assume the load is SOD, then the input third-order intercept point (IIP3 ) is defined as [25]: (2.47) 29 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering Pout(dBm) OIP 3 201og(a 1A) - - - - - -\- -~\ / /.. I I I Actual ~601og(3/4a.3A) I I I Figure 2.10: Graphical representation of the input and output referred third-order intercept points [25]. In turn, we define the output third-order intercept point (OIP3) to be the multiplication of the IIP3 by the gain of the fundamental signal, OIP3=IIP 3G. Another useful approximation of the overall IIP3 of a cascaded nonlinear stages system, shown in Figure 2.11, can be expressed as [25] where Gn is the power gain of the nth stage. 30 McMaster - Electrical and Computer Engineering M.A.Sc. Thesis - Gefei Zhou S(tJ G1 ZltJ IIP 31, G2 -Z2(itJ Zn-ltJ IIP 3,2 G1 Zn(t) IIP 3,n Figure 2.11: Cascade of n nonlinear stages, each with gain G [25]. 2.3.4 Gain Compression The nonlinearity of the receiver can cause gain compression, which is defined as a point at which the output curve drops from the ideal linear curve by 1 dB, and the point is defined as the IdB compression point (P1dB ), shown in Figure 2.12. 20Iog(Aout) Ideal ---../ / / /~--= IdBI '" I Actual I I I I IdB Compression Point 20Iog(Ain) Figure 2.12: Illustration of the IdB compression point [25]. From equation (2.40), if a single tone input is applied, which is set) = A cos wot, 31 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering the output can be expanded mathematically as: alAcoswot + a 2A 2 cos 2 wot + a3A3 cos 3 wot 2 3 a 2A ( 3a3A ) -2- + alA + - 4 - cos wot y(t) a3 A3 a A2 2 + -2cos 2wot + -4- cos 3wot. (2.49) The frequency band of interest is at Wo which leads y(t) to become: (2.50) Applying the concept of 1dB compression point, PI dB is the point when the gain drops by 1 dB and it can be represented as the voltage amplitude A ldB , which is expressed as: ( al IdB = alldB + 3a3AidB) 4 IdB. (2.51) Rearranging equation (2.51) in decibels, we have: 20 log al I + 3a 3 A2IdB I = 20 log l a l l - 20 log 1.122. 4 (2.52) Therefore, solving equation (2.52), the 1dB compression point appears at the voltage level A ldB given by: (2.53) 32 M.A.Sc. Thesis - Gefei Zhou 2.4 McMaster - Electrical and Computer Engineering Narrow-Band Receiver Literature Review There are many published designs for 2.4 GHz narrow-band receiver front-ends and these focus on different aspects depending on the perceived demands of the application. However, this thesis will focus on the issue of how to connect a narrow-band low-noise amplifier to a double balanced mixer. From the existing literature, there are two principle approaches to solve this problem. One possible solution is to design a differential low noise amplifier, which is designed to produce a differential output signal pair. Existing literature [26,27] has presented such an approach by implementing the differential narrow-band LNA on-chip. The advantage of this design is that it can produce a differential output pair which can be used directly by the double balanced mixer. It is relatively simple to fabricate and presents good performance. One disadvantages however, is that it requires a differential RF input signal instead of a single input. This creates difficulties for practical application since normally an RF signal is single input. Another disadvantage is that it requires obviously one more stage in the LNA design since the two symmetric stages can produce two out-of-phase signals (the differential output pair). Therefore, the differential narrow-band LNA doubles the number of stages from the original LNA, which consumes twice the power, degrading the performance of the narrow-band receiver. Another possible method for implementing a single input narrow-band LNA followed by a double balanced mixer is to design an on-chip transformer [28]. However, this solution also degrades the performance since many components need to be added in order to implement an on-chip transformer designed to translate the single RF signal into a differential signal. This results in greater power 33 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering dissipation and increases the physical complexity of the circuit design and fabrication. Razavi [29] suggests another narrow-band receiver design that implements a single RF input narrow-band LNA connected to a single balanced mixer. The single balanced mixer requires a single RF input eliminating the problems discussed previously. However, as will be discussed in Chapter 3, the single balanced mixer has difficulties to reduce the RF and La feedthroughs and meanwhile, the gain is only half that of the double balanced mixer. These disadvantages restrict this method. As a result, it is not a very popUlar design strategy in narrow-band receiver designs. In summary, the designs discussed above have their OWn advantages and drawbacks. The problem of how to connect the narrow-band LNA to the double balanced mixer has therefore, not been satisfactorily solved, and remains a topic of active research. It is this problem therefore, that is One of the focuses of this thesis. 34 Chapter 3 Narrow-Band LNA and Mixer Theories 3.1 Narrow-Band LNA Fundamentals The narrow-band low-noise amplifier is normally the first stage of the receiver front-end. Its function is to amplify the incoming RF signal while minimizing the amount of noise added to this signal. Therefore, the noise figure is one of the most important characteristics in an LNA design. Other desirable properties include high gain, linearity, low input and output return losses, and finally, low power consumption. 35 McMaster - Electrical and Computer Engineering M.A.Sc. Thesis - Gefei Zhou 3.2 Performance of Narrow-Band LNA 3.2.1 Power Gain Usually, the performance of a low-noise amplifier (LNA) can be measured by modelling the device as a two-port network and calculating the S-parameters. Figure 3.1 is an arbitrary two-port network connected to a source impedance Zs and a load impedance ZL [24]. As derived in Chapter 2, the voltage gain is equal to the power gain if the input and output impedances are matched. This means that if a good matching network is achieved, than the power gain is almost the same as the voltage gain. Therefore, the expression for the power gain is derived in terms of S parameters. Zs VI+~ + VI V1- rs ..rulJl Two-Port Network [S] (Zo) ..rulJl V2+ + V2 ZL ~V2- rin rout rL Figure 3.1: A two-port network with general source and load impedances [24]. There are generally three types of power gain [24]: • Power Gain: G = PL/ Pin is the ratio of power dissipated in the load ZL to the power delivered to the input of the two-port network. This gain is independent of Zs, although some active circuits are strongly dependent On Zs . • Available Power Gain: GA = P avn / Pays is the ratio of the power available from 36 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering the two-port network to the power available from the source. This assumes conjugate matching of both the source and the load, and depends on Zs but not ZL' • Transducer Power Gain: GT = PL / Pays is the ratio of the power delivered to the load to the power available from the source. This depends on both Zs and ZL' Assuming Zs is the source impedance, ZL is the load impedance, Zin is the input impedance, Zout is the output impedance, and Zo is the characteristic impedance (normally SOn). In general, we define r s as the reflection coefficient seen looking toward the source, and can be shown to be [24]: r _ Zs - Zo s - Zs+ Zo' (3.1) while r L is the reflection coefficient seen looking toward the load, which is: (3.2) Applying the definition of S parameter in appendix B to Figure 3.1, we have [24]: (3.3) (3.4) where 11;.+ is the incident wave seen from the input port, V1- is the reflected wave seen from the input port, V;+ is the incident wave seen from the output port, and 37 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering 112- is the reflected wave seen from the output port. Solving for v;.- /V1+ from equations (3.3) and (3.4), the reflection coefficient seen looking toward the network model input is [24]: v;.- _ S S12 S 21 r L v;.+ - 11 + 1 - S22 r L Zin - Zo Zin + Zo' (3.5) while the reflection coefficient seen looking toward the output is [24]: (3.6) By the voltage divider rule, Vi can be expressed as [24]: (3.7) where Zin is the input impedance of the network. From equation (3.5), the input impedance is: (3.8) Solving for v;.+ in terms of Vs gives [24]: (3.9) 38 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering The average power delivered to the network can be obtained as [24]: Pin (3.10) while the power delivered to the load is: P L Then, solving for ~- = 1~_12 (I-If 12) 2Z L· o (3.11) from equation (3.4) and substituting into equation (3.11), gives [24]: IV;'+12182112(1-lfLI2) 2Zo 11- 8 22 f L I2 2 2 2 2 IVs1 1821 1 (1 - l fLI )ll - f s l 8Zo 11 - 8 22 f L 1211- f s f in l2 . (3.12) The power gain can be obtained as [24]: G = PL Pin = 2 2 1821 1 (1 - l fL I ) 2 (1-lfin I2) 11- 8 22 f L I ' In our narrow-band LNA design, we use Zs (3.1) and (3.2), we have f s = aand f L (3.13) = ZL = Zo = 50n. From equations = O. Substituting these values into equations (3.5) and (3.6), we have: Zin - Zo fin = 8 11 = Z Z ' in + 0 (3.14) (3.15) 39 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering Since our LNA is well matched (Zin ~ Zout ~ Zo), the power gain can be redefined approximately as: (3.16) Expressing equation (3.16) in decibels (dB), we have: (3.17) The available power gain is [24]: (3.18) and the transducer power gain is [24]: G T = 1821 12(1- IrsI2)(I- IrL I2). 11 - r sr in J211- 8 22 r LJ2 (3.19) Again in the hypothetical design, the source impedance is equal to the load impedance and are both equal to the characteristic impedance, which is normally son. Then rs = rL = 0, and the transducer gain from equation (3.19) can be reduced to (3.20) If expressed in decibels (dB), we have: (3.21) which is the same as equation (3.17). Therefore, 8 21 in dB is commonly used to 40 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering measure the power gain of our LNA. 3.2.2 Noise From Friis formula, equation (2.39), the overall NF is dominated by the first stage of a cascaded network. This means that the NF is dominated by the first transistor, M I , in the LNA. Furthermore, we assume that the dominant form of noise in M I is thermal noise. It follows then, that a convenient method for approximating the noise figure of a low-noise amplifier is to calculate the overall NF based only on the dominating noise. Generally, the noise figure (NF) of the amplifier core is defined as [25]: NF = Ndevice + N in = 1 + Ndevice N in N in ' (3.22) where N device stands for the input-referred noise from the amplifier, which is mainly the thermal noise of the first transistor MI' The term N in represents noise at the input side, which is mainly generated from the source resistance R s . From Chapter 2, the thermal noise of a resistor is [22]: V; = 4kTR, (3.23) where k is the Boltzmann constant and T is the temperature in Kelvin, !:If is used to emphasize that 4kTR is the noise power per unit bandwidth of !:If = 1 Hz, and V; is spectral density of the thermal noise of the resistor in the unit V 2 /Hz. The thermal noise current of a MOSFET, as shown in Figure 3.2 [22], can be modeled by a current source connected between the drain and source terminals. 41 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering This is known as drain current noise, since the most significant thermal noise is generated in the channel [22]. D Go--1 s Figure 3.2: Thermal noise of a MOSFET [22]. The resulting drain current noise of a MOSFET is [30]: (3.24) where gdO is the drain-source conductance at zero VDs. Taking!:lf = 1 Hz, the noise expression will be for the noise "power" per unit bandwidth. Furthermore, for long-channel devices, gdO with VDS is equal to gm in saturation and hence, the spectral density of the thermal noise in the drain current can be obtained as [22]: (3.25) 42 M.A.Sc. Thesis - Gefei Zhou where I' McMaster - Electrical and Computer Engineering = 2/3 for long-channel transistors. Note that this noise is given as power spectrum density of noise current in unit A 2 1Hz. 3.2.3 Linearity The linearity of a narrow-band low-noise amplifier (LNA) is usually measured by the input third-order intercept Point IIP3 . From equation (2.46) in Chapter 2, if the amplitudes are the same for both the desired and undesired input signals in a "two-tone" test, the IIP3 can be defined as: IIP3~~' where coefficients a1 and a3 (3.26) are constants, and they are the first and third order coefficients in the polynomial approximation of the non-linear characteristic of the LNA, see equation (2.40) in Chapter 2. 3.2.4 Input and Output Return Loss The source and load impedances are assumed R s = R L = 50 = Zoo If the input and output matching networks are not perfect, then from equations (3.14) and (3.15), we have fin = 8 11 and rout = 8 22 , Therefore, 8 11 is defined as the input return loss while 8 22 is defined as the output return loss. Normally both of those quantities should be below -10 dB in order to achieve good performance. 43 M.A.Sc. Thesis - Gefei Zhou 3.2.5 McMaster - Electrical and Computer Engineering Power Dissipation The power consumption of an LNA can be defined as [25]: P= IDVDD , (3.27) where I D is the DC current of the LNA circuit and V DD is the supply voltage. 3.3 3.3.1 Narrow-Band LNA Topologies Inductively Source Degenerated LNA As mentioned previously, noise from resistors is a major factor at the amplifier input stage. Theoretically therefore, we should avoid using resistors in LNA design. However, it is necessary to build an input matching network in order to optimize the performance. Therefore, implementing both low noise and input matching is a key factor of an LNA design. One possible method is to employ the so-called inductive source degeneration technique, which is widely used in narrow-band LNA circuit designs. Inductive source degeneration is implemented by placing an inductor at the source terminal, shown in Figure 3.3. Such a circuit is referred to as inductively degenerated common-source amplifier [30]. An important advantage of this method is that it can create a real input impedance without the use of real resistors. In order to simplify the analysis and more clearly show the design theory, only a single MOSFET transistor with an inductor L s at the source terminal will be analyzed here. Its high-frequency small-signal equivalent circuit can be readily 44 M,A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering D Go----1 Ls s Figure 3.3: Inductively source degenerated amplifier. obtained and is shown in Figure 3.4. In order to calculate the input impedance Zin, a test voltage and current is applied at the gate terminal. From the circuit in Figure 3.4, the gate-source voltage is: ~s = vtest - (3.28) Vs. By applying Kirchhoff's Current Law (KCL) at the node shown in Figure 3.4, we obtain: vtest - 1 Vs + 9m (vtest - ) Vs Vs = -L ' S sOgs (3.29) S where s = jw = j21r f The test current can be expressed as: _ vtest - .Itest - 1 T sOgs 45 Vs (3.30) M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering D G + Vtest + ~n s Ls ~ KCL at this node Figure 3.4: Small-signal equivalent circuit of inductively source degenerated amplifier. Rewriting equation (3.30) to express Vs: 1(.S= V;test- Itest -c. S g8 46 (3.31) M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering Substituting equation (3.31) into (3.29), we have: vtest - (vtest 1 s~:) + 9m ( vtest - sOgs [lest I If. 1, =? s~9S + 9m( ~) = test _ test 0 sCgs sL s2C gs L s ' s s gs =? I + 9m I test _ vtest I test test -s C -L - 2C L ' gs S S S gs S 1 9m) I test ( vtest - C S gs )) _ TT ~ sOgs ' sL s Vtest - vtest + 1 + -C = -L ' S gs S s =? I test ( s 2Cgs L S =? vtest I test =? Zin =? 1 9mLs Zin=sL s + - +-C . s Cgs gs = sL s ( 1 + 1 + 9m ) s2Cgs L s sCgs ' = vtest I test = sL s ( 1 + 1 + 9m ) s2Cgs L s sCgs ' (3.32) Equation (3.32) shows that there is a real part, 9"(/8, gs in the input impedance. Therefore, this inductive source degeneration method can provide a matching input impedance without real resistors. Because of this, the inductively source degenerated LNA is widely used in receiver front-end designs. The second condition for truly active matching is w2LsCgs = 1. 3.4 Mixer Fundamentals A mixer, also known as a frequency converter, is used to translate the signals from one frequency band to another frequency band, with a certain gain and low distortion. Typically, the conversion is from a Radio Frequency (RF) W r f to a desired frequency, normally called the Intermediate Frequency (IF) wif. There are two types 47 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering of mixers: passive and active. Passive mixers only use the dynamic power of the RF signal instead from a DC voltage supply. This results in a conversion gain of less than one (conversion loss). Active mixers, on the other hand, achieve high conversion gain at the cost of poor linearity (high distortion). These mixers also dissipates quiescent power due to the requirement for a DC supply. This thesis focuses on active down-conversion mixers since they are used in receiver part. The fundamental idea of frequency translation by a mixer is to multiply a local oscillator (La) signal at Wl o with a radio frequency (RF) signal at wrf and select the product with the required frequency. In mathematical terms, let the RF signal be Yrf(t) = A rf cos(wrft), and the La signal be Ylo(t) = A lo COS(Wlot). A mixer can thus be modeled by multiplying these two signals together as shown below: (3.33) which yields [25,31]: y(t) A rf coswrft· A lo coswlot, Ar~Alo [cos(wrf - Wlo)t + cos(wrf + Wlo)tJ. (3.34) From equation (3.34), it is obvious that two frequency translations of the signal wrf occur. By means of multiplication, the difference (down-conversion) and sum (up-conversion) between RF and La frequencies create an output signal whose amplitude is proportional to RF and La amplitudes. Therefore, if the La ampli- tude is constant (as it usually is), any amplitude modulation in the RF signal is transferred to the IF signal [30]. In circuit design simulators (in our case, Cadence), 48 McMaster - Electrical and Computer Engineering M.A.Sc. Thesis - Gefei Zhou the RF port and the LO port are used to represent these two distinct inputs. The RF port simulates the input signal to be converted by the mixer while the LO port simulates the periodic waveform generated by the local oscillator. The multiplication function of a mixer is implemented as a switch controlled by the LO signal in order to mix with the RF signal. Figure 3.5 shows single switch implementation of a mixer [32]. 81 10-------11---0 VRF a VLO 0 VIF I .1 00 Figure 3.5: Simple switch used as mixer [32]. When switch Sl is on, the IF output is equal to the RF input. When switch Sl is off, the IF output is zero. Therefore, this operation can be viewed as a form of mixer because it is a multiplication of the RF signal by a periodic rectangular waveform (LO signal). To implement this as an analog CMOS circuit, the LO signal is applied to the gate of a MOSFET while the RF signal is applied to the source/ drain provided that the device is biased properly. Figure 3.6 illustrates this application using an NMOS device as a transmission switch. The LO signal at the gate of the NMOS performs a switching function, which is ideally a periodic rectangular waveform with a period 'T"o = 21f /Wl o, where Wl o is the LO operating frequency, as shown in Figure 3.7. Here, Ylo(t) denotes the LO 49 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering VRFo---------' " Figure 3.6: Implementation of a switch with an NMOS device [32]. signal, Yrf(t) denotes the RF signal, and Yif(t) denotes the IF signal. The behaviour of this NMOS implementation should be discussed according to two cases. Case I: large amplitude (A lo ) of LO signal In this case, we assume A lo is large enough to switch the NMOS on and off. In this case, the transistor can be modeled as a periodic rectangular waveform that switches at frequency Wl o with unity amplitude, shown in Figure 3.7. Byapplying Fourier series representation to this periodic rectangular signal, Ylo(t) can be expanded as [25]: 1 2 + - COSWlo(t) 2 1f Ylo(t) = - 50 2 - COS3Wlo(t) 31f + .... (3.35) M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering o I t ~I I- Tlo=2n/0)10 I Figure 3.7: Periodic rectangular waveform of LO signa1. which can be further rearranged as: _ 1 Ylo(t) - 2" + L sin (n1r) cOS(nwlot). 00 !!:!!: 2 (3.36) 2 n=l Substituting into equation (3.33), y(t) can be: shown to be y(t) = A rf coswrft 1 [ 2" 00 +~ sin (n1r) ¥2 COS (nwlot) ] . (3.37) If an appropriate bandpass filter is used to filter out those signals at high frequen- cies, then the desired IF signal Yif(t) at wif = wrf - Wl o can be obtained [31]: Yif(t) = (A;f) cos(wrf - Wlo)t, (3.38) This is not a function of the amplitude A lo of the large signal, which drives the gate of the MOSFET. This is a commonly used method for mixer designs as the second case has a critical drawback. 51 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering Case II: small amplitude (A lo ) of La signal In this case, Ylo is a small signal that can not be described purely in terms of an onloff switch (1 and a in Figure 3.7), while yet) is still the same as equation (3.34). It can be shown that the desired Yif(t) is given by [31]: Yif(t) which is a function of A lo ' = (3.39) A lo ( A;f ) cos(wrf - Wlo)t, The disadvantage of this is that Yif depends on A lo , which creates difficulties in controling the conversion gain Gc, since A lo is generated outside of the mixers. 3.5 Performance of Active Mixer 3.5.1 Conversion Gain One important factor of a mixer is the conversion gain (or loss) Gc' It is defined as the IF output signal amplitude Aif (or power ~f) divided by the RF input signal amplitUde A r f (or power Pr f) at their respective centre frequencies [25]. However, this gain must be carefully defined in order to avoid confusion between voltage conversion gain and power conversion gain. Typically, power gain and voltage gain in a mixer are defined as power conversion gain and voltage conversion gain since the signal is converted from one frequency to another. • Voltage conversion gain of a mixer is defined as the ratio of the rms (root mean square) voltage of the IF signal to the rms voltage of the RF signal [32]. If a sinusoidal input wave is applied, the rms voltage is ~ms = v 0 52 k • M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering • Power conversion gain of a mixer is defined as the IF power delivered to the load divided by the available RF power from the source [32]. The definitions of equations (2.16) and (2.17) in Chapter 2 can be applied to the conversion gain of a mixer. Therefore, the voltage conversion gain Gc(voltage) and the power conversion gain Gc(power) in decibels can be obtained as: Gc(voltage) = 20 log 1 :~ (3.40) I ' o = 10log Ivoi - . - 1. 1 VI~I IPI L Gc(power) = 10 log -P (3.41) If the input and output resistances are matched, from equation (2.21), the power conversion gain is equal to the voltage conversion gain in decibels. Gc(power) = Gc(voltage). (3.42) If they are mismatched however, the relationship between the power conversion gain and the voltage conversion gain can be expressed from equation (2.22) as Gc(power) = Gc(voltage) + 10 log 1 i:: I· (3.43) For different types of mixers, the conversion gain is defined and calculated differently. For example, the conversion gain of unbalanced mixer, single balanced mixer, or double balanced mixer is different and the details will be discussed later in section for mixer topologies. 53 M.A.Sc. Thesis - Gefei Zhou 3.5.2 McMaster - Electrical and Computer Engineering Noise The definition of the noise figure (NF) of a mixer is different from that of a LowNoise Amplifier (LNA) and needs to be carefully defined and understood since the distinction is subtle. In a typical mixer, there are two input frequencies, which are the desired RF signal and the image signal. Both of them will generate the intermediate frequency (IF) and are normally referred to as sidebands. As has already been discussed, the IF frequency is the difference between the RF and La frequencies. Therefore, signals with equal amount to the IF frequency which locates above or below La frequency (wz o ) will both produce the IF signal at the same frequency (Wi!)' Hence, these two input frequencies are separated by 2Wi! centered at WZO' This phenomenon is shown in Figure 3.8. This leads to two different definitions of the noise figure for a mixer. If the desired signal only exists at the RF frequency, the term noise figure is defined as the single-sideband noise figure (SSB NF). On the other hand, if the desired signals exist at both the RF frequency and the image frequency, then the noise figure is defined as the double-sideband noise figure (DSB NF). However, DSB NF is the rarer case since the existence of an image frequency complicates noise figure computations. This is because the IF noise originates from both the desired and image frequencies where there is generally no desired signal at the image frequency [30]. Generally, the DSB noise figure is lower than the SSB noise figure due to a higher noise power at the input (Nin ). In other words, if the IF noise power for both sidebands of the input are equal, this leads to an SNRin of the case that SSB is higher than that for the DSB case since the noise power from the input N in for SSB case is lower than that for the DSB. As a result, the SSB noise figure will be higher 54 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering Image Band /' RF Signal Band I \ I \ , , I I I co co COif Figure 3.8: Folding of RF and image noise into the IF band [32]. than the DSB noise figure by 3dB if the noise powers of both sidebands are equal. The noise figure for mixers tend to be considerably higher than for amplifiers because noise from frequencies other than at the desired RF can mix down to the IF [30]. Representative values for SSB noise figure range from 10dB to 15dB or more [30]. This is why in most receiver front-end designs, low-noise amplifiers are required. If the LNA has sufficient gain, then the RF signals can be amplified so that they are well above the noise levels of the mixer. Therefore, the overall NF will be dominated by the LNA and the noise effect by the mixer will diminish. 55 McMaster - Electrical and Computer Engineering M.A.Sc. Thesis - Gefei Zhou 3.5.3 Linearity The distortion and linearity of a mixer should be discussed according to two cases: the low-frequency case and the high-frequency case. In the low-frequency case, the distortion parameters can be calculated accord- ing to [25]: 2 HD = A rj 3 1 32 (VGSI - (3.44) _=_ Vii' 3A~terference 1M - (3.45) 3 - 32 (VGSI - vt )2' and, (3.46) where VGSI is the gate to source terminal voltage of the MOSFET transistor MI , shown in Figure 3.13, and vt is the threshold voltage of the MOSFET. In the high-frequency case, the distortion parameters are [25]: 1M 3 = 3A~terference 32 (VGSI - vt)2 [11 _ ~ j(WI)Cd 3 2k(VGs - Vt) I] , (3.47) where k is defined from MOSFET small-signal equation as following: . = "2 k (Vrj '/,d - Vs )2 , (3.48) where j(WI) is a constant coefficient, and Cd is the capacitance parallel to the current source Iss due to high-frequency effect. Note that Iss is shown in Figure 3.13. Note that here we only show the final equations since the detailed derivation can be found in [25]. 56 M.A.Sc. Thesis - Gefei Zhou 3.5.4 McMaster - Electrical and Computer Engineering Feedthrough In some types of mixers (typically un-balanced mixers), the RF and LO components appear at the mixer outputs. These undesired signals are called the RF feedthrough and LO feedthrough. In principle, the double balanced mixer can eliminate feedthrough, or at least in practice, can minimize feedthrough and thus improve the mixer performance. 3.5.5 Port-to-Port Isolation Another desireable characteristic of a mixer is isolation among the RF, LO, and IF ports in order to minimize interaction. For example, if LO and IF frequencies are similar, a strong interference signal will appear at the IF output since normally the LO signal is quite large compared with that of RF signal. Therefore, the LOIF isolation is important in order to avoid this out-of-band interaction. However, a filter stage usually follows the mixer stage and this problem may not be very important. The undesired signal can be filtered out if good isolation is achieved. 3.6 Mixer Topologies 3.6.1 Unbalanced Mixer An unbalanced mixer, the simplest type of active mixers, is shown in Figure 3.9 [25]. In this circuit, the transistor M 1 is biased properly in order to convert the RF voltage signal ~f(t) to RF current signal Irf(t). Typically, the RF input is a small signal which has normally around -30dBm power, shown in Figure 3.10 [31], where 57 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering VGl is the DC bias voltage of transistor M1 . Therefore, M1 operates as a transconductance amplifier, which amplifies the RF signal by a certain gain proportional to the transconductance 9ml' We use 9ml to denote the transconductance of M1 . M 2 and M 3 are modeled as La switches to mix the RF and La signals. The basic principle behind this circuit is that: 1. the RF input voltage 1I,At) is converted to the RF current signal ITf(t) by M1, 2. the RF current signal is mixed with the La signal to create the desired IF current signal Iif(t), by switching I Tf to flow either through M 2 or M 3 , and finally, 3. the IF current signal Iif(t) flows into a resistor R L and develops the IF output signal1;if(t). VDD - - - , - - - - - - - - - - - . . t----o Vio+~ (t)~ ! Vo( t) Lit) ~ Vrt<t)~ Figure 3.9: Unbalanced mixer [25]. 58 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering o t Figure 3.10: RF input signal [31]. Considering the DC current IDe flowing through M I , the RF current signal, which is converted from the RF voltage signal is [31]: (3.49) From equation (3.36), the LO signal ~~(t) can be obtained as: (3.50) 59 M.A.Sc. Thesis - Gefei Zhou where McMaster - Electrical and Computer Engineering V;; (t) is the rectangular waveform, shown in Figure 3.12(a). Then, the mixed output signal of La and RF from Figure 3.9 can be expressed as [31]: (3.51) (3.52) Using equations (3.35) and (3.36), equation (3.52) can be rewritten as: IDC R L ( -2 + gm +(2 gmArf coswrft 2 2IDC + --coswlot 1r Arf ) coswrft· coswlot +... ) 1r , (3.53) where there are no even harmonics (n = 2,4,6...). Analyzing equation (3.53), the output voltage ~ across R L has the following components: • the DC component: R L ( ~), • the La feedthrough: R L eI~Q coswlot), and • the desired IF signal: RL C9m1rArt) coswrft· coswlot. It can be seen that the RF and La feedthrough appear significant at the output, which is undesired. Therefore, the drawback of unbalanced mixer is that it creates RF and La feedthrough. 60 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering From above, the desired IF signal can be expressed as: (3.54) which can be further expanded according to equation (3.34) as: The desired IF signal Yif(t) at Wif = Wrf - Wlo can be obtained if an appropriate bandpass filter is used to filter out high frequency terms. Hence, the expression IF Yif (t) becomes: Yif ( t ) = RL ( 2gmArf) 1 '2 cos (wrf - 7f ) Wlo t, (3.56) The amplitude of the IF signal is: (3.57) where the amplitude of the RF input signal is A rf . Therefore, the conversion gain of an unbalanced mixer is given by [31]: (3.58) 61 M.A.Sc. Thesis - Gefei Zhou 3.6.2 McMaster - Electrical and Computer Engineering Single Balanced Mixer The single balanced mixer, shown in Figure 3.11, takes differential output signals instead of single side output signal. It is an improvement over the unbalanced mixer. The working principle of the single balanced mixer is introduced here in order to confirm this improvement. VDD - - - r - - - - - - - - - - . - - + Vo(t)_ 0----. +---<> Vio+~ (t)~ 1/(1) 1 Figure 3.11: Single balanced mixer [25]. The differential LO signals, v;t(t) and V;;;(t), are 180 degree out of phase as shown in Figure 3.12. Hence, it can be expressed mathematically as: Tto) _ 1f ) V;o_(t ) -_ V;o+ ( t -"2 - V;o+ ( t - Wlo . 62 (3.59) M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering 1r--- o 1 ,"110=2n/rol0-, o t -, ,'" t 110=2n/ro l0 (a) (b) Figure 3.12: Differential LO signals: (a) Vit, and (b) Vi;;- [31]. Based on equation (3.50), Vi;;-(t) can be obtained as [31]: Vi;;- (t) Vit(t - ~), Wl o 1 "2 + ~ 1 "2 - 00 sin (n21l") ¥ [ ( 'if ) ] ' cos nwl o t - Wl o L sin~(n;) cos (nwlot) , 00 n=l (3.60) 2 where there are no even (n = 2,4,6...) RF harmonics. Recall from the expressions of Vit(t) in equations (3.51) and (3.52), Vi;;-(t) can be further expanded as [31]: (3.61) (3.62) 63 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering where V/(t) is the same as equation (3.52), recall here: R L [(IDC 9m A rf COSWrft) 2 + 2 + (IDC + 9m A rf coswrft) ~ sin(!!1!:) T2 00 COS (nwZot) ]] . (3.63) [ Since ~(t) is the differential output of two branches, it can be defined as: (3.64) Substituting equations (3.62) and (3.63) into equation (3.64), the output of a single balanced mixer can be obtained by [31]: 11,,(t) (3.65) Equation (3.65) can be rewritten as: 11,,(t) (3.66) Analyzing equation (3.66), there are mainly two terms: • the La feedthrough: 2RL eI~Q • the desired IF signal: 2RL It can be seen that only the coswzot), and Cgm7rArt) coswrft· coswzot. La feedthrough 64 appears at the output as undesired McMaster - Electrical and Computer Engineering M.A.Sc. Thesis - Gefei Zhou signal. The RF feedthrough is removed from the differential output signal. In addition, even RF harmonics also disappear in the output. However, the LO feedthrough still exists, which is the drawback of single balanced mixers. Nonetheless, it still improves the output to remove the RF feedthrough compared to unbalanced mixers. The desired IF signal is: gm 2RL ( 2 1rA rf ) g 2RL (2 :A rf coswrft· coswlot ~[COS(Wrf - ) Wlo)t + cos(wrf + Wlo)t]. (3.67) If applying an appropriate bandpass filter to filter out high frequency terms, the desired IF signal Yif(t) at Wif Vif ( t ) = Wrf - = 2RL Wl o becomes: 2gmArf) ( 1r 2"1 cos (wrf - ) Wlo t. (3.68) The amplitude of the IF signal is: (3.69) Therefore, the conversion gain of a single balanced mixer is given by [31]: Aif ( A r ! = RL 2gm R L 29m A rt ) 'If Ar ! (3.70) 1r which doubles the gain of an unbalanced mixer shown in equation (3.58). This is 65 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering another improvement from single balanced mixer to unbalanced mixer. 3.6.3 Double Balanced Mixer Double balanced mixer, a combination of two single balanced mixers, is typically called Gilbert mixer, shown in Figure 3.13 [25]. This is the most commonly used mixer in RF circuit designs and this thesis will focus on it. VDD --r-------------------,--RL ~1i/(t) M3 Vio+(t) -..--1 Figure 3.13: Double balanced mixer [25]. The method to calculate the IF output signal and conversion gain is quite similar to that of single balanced mixer. This time, there are two RF differential input signals, which are 180 degree out of phase, shown in Figure 3.14 [31]. Refereing to 66 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering equation (3.33), if we assume: (3.71) then y:'j(t) can be obtained as: ~f) = y:.} (t - W:f) y:'j(t) = y:.} (t - Arfcos [wrf (t- W:f)] -Arf cos(wrft ). Vrf-(t) V;/(t) VGl VGl o (3.72) 1 1 I.. I .'I 0 t I.. I .1 I t Trr2n/CO rf Trr2n/CO rf (a) (b) Figure 3.14: Differential RF input signals: (a) y:.}, (b) y:'j [31]. Now instead of calculating the voltage, we will calculate the current at each branch, shown in Figure 3.13. Referring to equations (3.62) and (3.63), the currents 67 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering from each branch can be obtained as [31]: (3.73) (3.74) (3.75) (3.76) From Figure 3.13, the differential output currents from these four branches can be summarized as: (3.77) (3.78) Substituting equations (3.73), (3.74), (3.75) and (3.76) into equations (3.77) and 68 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering (3.78), the differential output currents can be expressed as: (3.79) _ Iif(t) = I DC - Therefore, the differential output voltage ~(t) [00 ~ 2gmA rf coswrf t ~ sin (n27r) T COS (nwlot) ] . (3.80) can be obtained as: v;,+ (t) - v;,- (t) R L · [Ij:(t) - Iij(t)] 4RL gmA rf coswrft 00 sin (Z!:!!:) ] [~ T 2 COS (nwlot) . (3.81) Equation (3.81) can be expanded as: Analyzing equation (3.82), there is only one term: • the tesired IF signal: 4RL Cgm7rArt) cos wrft . cos Wlot It can be seen that the LO feedthrough, the RF feedthrough and even RF har- monics all disappear from the output signal. This improves the performance compared to a single balanced mixer and an unbalanced mixer. 69 McMaster - Electrical and Computer Engineering M.A.Sc. Thesis - Gefei Zhou The desired IF signal is: 9m rf 4RL ( 2 1["A ) coswrf t · coswlot, 9 rf 4RL (2 :A ) ~[COS(Wrf - Wlo)t + cos(wrf + Wlo)t]. (3.83) If applying an appropriate bandpass filter to filter out high frequency terms, the desired IF signal Yif(t) at Wif = Wrf - Wlo becomes: (3.84) The amplitude of the IF signal is (3.85) Therefore, the conversion gain of a double balanced mixer is given by [31]: Aif A r ! = 2RL ( 29m A rt ) n Ar ! 49m R L (3.86) 1[" which doubles the gain of a single balanced mixer shown in equation (3.70). This is another advantage of using a double balanced mixer. 70 Chapter 4 Ultra-Wideband LNA Theories 4.1 Ultra-Wideband LNA Fundamentals An Ultra-wideband (UWB) low-noise amplifier (LNA) is usually the first stage of an UWB receiver. As approved by the FCC, the UWB receiver has a 3.1-10.6 GHz frequency range and so our UWB LNA design will focus on this bandwidth. The UWB LNA is designed to amplify the weak incoming RF signal without adding significantly to the noise level. To meet this requirement, the noise figure of a UWB receiver should normally be less than 7 dB [33]. Recall that the noise figure is dominated by the noise from the first stage. This emphasizes that the UWB LNA should minimize the amount of noise added as much as possible. Otherwise, the following stages will simply amplify this noise along with the signal. Therefore, a low noise figure is a strict requirement for a UWB LNA, together with the requirement for as large as possible gain, discussed below. In addition to the NF, the effectiveness of the UWB device is also dependent upon the requirement of the amplifier to provide a high and flat gain over the 71 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering entire bandwidth of interest. It therefore follows that a good matching network over this frequency range is also necessary. 4.2 UWB LNA Performance 4.2.1 Gain As discussed in Chapter 3, the gain of a narrow-band LNA can be defined in terms of 8 21 if the input and output impedances are well matched. This definition is still valid in ultra-wideband low-noise amplifier design. However, unlike narrowband LNA, ultra-wideband LNA needs to achieve a flat gain through the entire 7.5GHz bandwidth (normally UWB is defined in 3.1-10.6 GHz frequency range). This implies that the input and output matching networks need to be well matched over the entire 7.5-GHz frequency range, while the narrow-band LNA only operates around a certain single frequency point, at which the matching is relatively easy to achieve. Most of the ultra-wideband LNA designs target a flat gain over the entire bandwidth. However, this requirement is so stringent that with current semiconductor technology, other performances metrics such as power or noise figure have to be sacrificed [34]. Thus, the UWB LNA design is a trade off between all of the performance characteristics, so we need to optimize all of the parameters simultaneously. Therefore, the overall performance of the amplifier is the critical objective. Usually, the published UWB LNA designs report the gain as G ± t::.G or Gmin Gmax for the entire bandwidth of interest in order to describe both the gain and the gain flatness. The term t::.G is used to define the gain flatness. Therefore, our UWB 72 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering LNA design will focus on both the gain and the gain flatness throughout the entire 3.1-10.6 GHz bandwidth. 4.2.2 Noise We can use the same noise model and method for calculating the noise figure (NF) for ultra-wideband amplifier as was used for the narrow band case. However, unlike the narrow band LNA, the UWB LNA needs to have a low noise figure over the entire bandwidth instead of at one single frequency point. This means that the NF should be low and flat from 3.1 GHz to 10.6 GHz frequency range. Therefore, we must focus not only on having low noise figure but also on the flatness of the NF. In addition, different topologies lead to slightly different calculations for the noise figure. However, a simple method for estimating the noise figure is to assume that the noise on the source side is mostly thermally generated by the source resistor Rso This results in voltage noise power spectral density (PSD) V;, reproduced from equation (3.23): V; = 4kTRs. (4.1) The noise in the amplifier, however, is dominated by the thermal noise in the first MOSFET transistor. Therefore, the noise from the LNA can be primarily characterized by equation (3.25) for the drain current noise PSD, which is reproduced below: T; = 4kT,,/gm' 73 (4.2) M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering The calculation of the noise figure itself follows equations (4.1) and (4.2). Note that we need to estimate the noise figure over the entire bandwidth to ensure that it is reasonable throughout the entire frequency range of interest. 4.2.3 Linearity Referring to Chapter 3, recall that the linearity of the UWB LNA can be quantified using the input third-order intercept point, llP3: IIP3~~1 (4.3) However, we usually report only the mid-band frequency IIP3 as the linearity does not vary much over the bandwidth of interest. The mid-band value is therefore, selected to represent the overall linearity of the UWB LNA. For this thesis, the objective is to design the UWB LNA for the range of 3.1-10.6 GHz. Therefore, we will simulate the llP3 at 6 GHz, which is approximately the mid-band frequency of the UWB amplifier. 4.2.4 Input and Output Return Loss From Chapter 3, the input and output return losses can be defined according to the 8-parameters 8 n and 8 22 , respectively. The difference in the case of UWB LNAs is that both 8 n and 8 22 are required to be low over a wide bandwidth instead of just at a single frequency point. Normally, for a good UWB LNA design, both 8 n and 8 22 should be below -10 dB over the entire frequency range. 74 M.A.Sc. Thesis - Gefei Zhou 4.3 McMaster - Electrical and Computer Engineering UWB LNA Topologies As discussed earlier, LNA designs involve tradeoffs so that we can not achieve high performance for all of the desired characteristics at the same time. As a result, there are several possible ultra-wideband LNA design topologies each with advantages and drawbacks. Therefore, a topology should be selected depending on the specific requirements of the LNA. On occasion, a combination of topologies can also be implemented in order to meet the requirements of an application. In this thesis, our UWB LNA is implemented using inductively source degenerated cascode configuration. 4.3.1 Inductively Source Degenerated UWB LNA As discussed previously, the inductive source degeneration design is widely used in ultra-wideband low noise amplifier designs as it can achieve relatively good performance through the entire 3.1-10.6 GHz band. Importantly, it does so using a simple circuit structure and it is easy to understand on a theoretical basis. Referring to Figure 3.3 in Chapter 3 and recalling from equation (3.32), the input impedance can be obtained as: 1 9mLs Zin=sLs + - +-C ' s Cg8 g8 (4.4) where input impedance can be matched to 50 D (geLS = 50D) without using real gs resistors. However, unlike narrow-band LNA, a UWB LNA requires the input matching over the entire bandwidth. 75 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering One technique used in narrow-band LNAs to act as multi-band LNAs is designed to receive input RF signals at different frequency bands using an inductive source degeneration configuration [35] and input matching LC network. Extending this idea to ultra-wideband designs, we can embed the input network of the amplifier in a multi-section reactive network so that the overall input reactance is resonting over a wider bandwidth [36]. Proper implementation can be adding on LC filter in front of the input matching circuit of the MOS transistor stage with inductive source degeneration feedback, as shown in Figure 4.1. 2nd order Chebyshev Input Matching Filte\ Networl r----------,r--------I I r···- ..... RF Input Port I Ii I! - Ii , L] c] ,I L g ,I '----11---..,.---7+' 1 II C2 11 I _ _ ...J , I I I I: , ! ,L M1 I I I rz:- : L -----, I I : Ls I 1--- I Figure 4.1: Inductive source degeneration technique for UWB LNA. A three-section Chebyshev Filter is used to control the bandwidth since it can resonate the reactive part of the input impedance over the whole frequency band from 3.1 to 10.6 GHz. An inductor L g is added at the gate terminal of the input MOSFET device M 1 and a capacitor Cp is added between the gate and the source 76 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering terminal of M 1 in order to improve the performance of the input matching network. 4.3.2 Cascode UWB LNA The cascode LNA configuration, shown in Figure 4.2, can be used to improve the input-output reverse isolation due to high output impedance at the drain terminal of M 1 [37], and thus, increase the stability of the LNA. In addition, the cascode structure has the advantage of having a high gain and a wide bandwidth [38]. Figure 4.2: Cascode configuration of transistors that replace M 1 in the UWB LNA showin in Figure 4.1. 4.3.3 Feedback UWB LNA Feedback circuits are widely used in UWB LNA design. The typical design is the resistive shunt feedback as shown in Figure 4.3. This circuit can achieve good wideband input and noise matching at the same time, [39,40]. 77 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering Figure 4.3: Feedback technique for UWB LNA. 4.3.4 Cascade UWB LNA A high output gain can be achieved by cascading several amplifiers together, as shown in Figure 4.4. The overall gain of the resulting circuit can be expressed as: (4.5) where G 1 is the gain of the first stage implemented with M1 and Gz is the gain of the second stage implemented by M z. However, this circuit consumes more power, a fact that must be weighed against the constraints of the desired application. 4.3.5 Differential UWB LNA Normally, the LNA is followed by a mixer stage. Most mixers used in UWB systems are of the double balanced type, having a pair of differential inputs. While a pair of amplifiers designed to work with a differential structures can be used in the front-end as per Figure 4.5, this does increase the overall power consumption 78 M.A.Sc. Thesis - Gefei Thou McMaster - Electrical and Computer Engineering Figure 4.4: The amplifiers in a cascade structure. of the system. Vr/(t) r · ' '1 1. -.. ..1 fn. ·..·1 run "·1 i ! i + Wout l.. -. (t) ! !Vrf'(t) L.-....J ..1 Figure 4.5: Differential UWB LNA configuration. 4.4 UWB LNA Literature Review Because of a number of design tradeoffs, it is not possible for all of the performance characteristics such as gain, noise figure, linearity, or power dissipation to be simultaneously optimized. If one of the performance goals is optimized, compromises regarding the other characteristics are impossible to avoid. Some published designs may optimize particular aspects of the UWB LNA, while other designs may focus on achieving an overall level of performance for the LNA. Therefore, a 79 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering well thoughtout UWB LNA should be designed depending on the demand of the particular application being considered. In [41-43], the UWB LNA designs focus on minimizing the noise figure. In [42], the LNA is designed using current-reuse configuration and feedback topology for noise cancellation. In [43], feedback topology is also implemented to cancel the total noise current by creating different signs of the noise current into one node. Indeed, applying these techniques can reduce the noise significantly. This is the main advantage of these designs, which is suitable for some ultra-wideband applications. However, some other parameters may be compromised simultaneously such as the gain not being very flat, or the linearity being too low. Papers [44,45] focus on the high gain UWB LNA design. Paper [44] shows a two stage cascode structure, which is a combination of cascode and cascade configurations. Clearly, refer to Chapter 4, the gain in this design is very high since a two stage cascade topology is implemented. However, this high gain is achieved at high power consumption. Paper [46] presents UWB LNA with high linearity. Simultaneously, the gain is reduced since lower gain can definitely provide higher linearity. This design also consumes large DC power. Therefore, the advantage is its high linearity while the disadvantages are the low gain and large power dissipation. In [47], the focus is on low power UWB LNA design. Obviously, the biasing currents were reduced since the DC currents can not be large if the power consumption needs to be minimized. As a result, the gain can not be high anyhow since lower drain current results in lower gm according to equation (2.3). Therefore, low power UWB LNA design in [47] has the disadvantage of low gain. 80 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering In summary, the designs discussed above have their own advantages and dis- advantages. It is obvious that the ultra-wideband LNA design is a decision between all the performance tradeoffs. In other words, the overall performance should be optimized as much as possible in order to design a competitive UWB LNA. 81 Chapter 5 Narrow-Band Receivers in O.18-JLrn CMOS Technology Considering the issues relating to the design of narrow-band receiver, a significant problem is that the receiver amplifier requires either a differential input, or an onchip transformer in order to translate the single-ended RF output signal of the LNA into a differential signal pair as the input of the double balanced mixer. 5.1 Receiver Front-End Design This chapter focuses on the 2.4 GHz receiver front-end design, shown in Figure 5.l. The main novel idea of the design is to use one PMOS and one NMOS instead of two NMOS devices for the RF amplification stage of the double balanced mixer so that the single RF input signal from the LNA can be translated into two differential inputs to the mixer. The basic properties of this block are as follows: 82 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering LO Differential Inputs RF Input IF Output Downconversion Mixer Figure 5.1: Block diagram of designed receiver front-end. • the RF input frequency is fr! = 2.4 GHz with an input power of Prj = -30 dBm, • the LO input frequency is flo = 2.1 GHz with an input power of Pto = 0 dBm, and • the desired IF output frequency is fit = 300 MHz. 5.1.1 Design Process of Narrow-Band LNA The narrow-band LNA was designed as an inductively source degenerated cascade structure, shown in Figure 5.2. This circuit should be constructed in such a way as to realize the following design objectives: • to achieve high gain (821 ) at 2.4 GHz, • to achieve low noise figure (NF) at 2.4 GHz, • to minimize the input return loss (811 ) and output return loss (822 ) at 2.4 GHz, • to optimize the linearity (IIP a), and 83 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering r" "1 !L.. nJI Rnpoly RF Output Port - V DD Input RF Port Figure 5.2: Schematic of the inductively source degenerated narrow-band LNA. • to minimize the power consumption from the given a 1.5 V supply voltage. In Figure 5.2, the RF signal is provided by the input RF port while the bias voltage is provided by the voltage source (Vbias1)' The capacitor 0 1 is used to block the DC signal and the inductor L 1 is used to block the AC signal. The elements L g , L s , Ow and the NMOS transistor M 1 build the input matching network of the LNA, and its small-signal circuit model is shown in Figure 5.3. Referring to the derivation of equation (3.32) in Chapter 3, the input matching impedance of this amplifier can be expressed as [36]: Zin 1 ( ) 9mLs = s (0gs + Cp ) + s L s + L g + 0 gs + Cp . 84 (5.1) McMaster - Electrical and Computer Engineering M.A.Sc. 'Thesis - Gefei Zhou Figure 5.3: Small-signal equivalent input matching network of the inductively source degenerated narrow-band LNA. Setting the real part of equation (5.1) to be equal to the assumed source resistance of 50 D, we have: C gmLs 9S + C = Zs = 50, (5.2) p where the input matching is realized for f = 2.4 GHz. The RF signal enters the second NMOS transistor stage and will be amplified again due to the function of the cascade structure. The voltage source of Vbias2 is used to provide the bias voltage of the NMOS transistor (M2 ) while the capacitors C1 and C2 are designed to block DC signals. The inductor L 2 and resistor Rnpol y are used for matching. The output matching is not very important since usually the front-end amplifier is followed by the mixer stage. For measurement purposes, it is usual to use an 85 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering output buffer rather than a matching network. From Chapter 3, the gain of the LNA can be measured for 8 21 and is: (5.3) Also from Chapter 3, the input return loss in defined as 8 11 while the output return loss in defined as 8 22 . Both 8 11 and 8 22 should be under -10 dB, if good LNA performance is to be achieved. 5.1.2 Design Process of Downconversion Double Balanced Mixer In order to overcome the difficulties associated with the required differential input for the double balanced mixer, a novel design idea is introduced so that a single RF input signal can be translated into two differential signals in the mixer, shown in Figure 5.4. This modified double balanced mixer requires only a single RF output signal from the low-noise amplifier (LNA) without on-chip transformer. In Figure 5.4, transistors M3 and M4 are used to transform the input RF voltage signal into the current signal. Transistors M 5 , M 6 , M 7 , and M 8 , are designed to perform the mixing stage and produce the converted intermediate frequency (IF) output, where the theory of this conversion has been discussed in Chapter 3. Then the mixer will produce a differential output. The novel idea of this design is that an NMOS-PMOS pair is implemented as the RF input amplification stage, shown as M3 and M4 transistor pair in Figure 5.4, rather than using a conventional NMOS-NMOS differential configuration. Normally, in a standard double balanced mixer, the function of these two transistors 86 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering VDD - , - - - - - - - - - - - - - - - - - - - . . . - - !I/(t) Iif-(t)! +--'-------0 T Vrr(t) _ _ C_4 NMOS + voCt) - 0---------:.-+ 11--_--+ PMOS ---1 Cs = Figure 5.4: Schematic of the modified double balanced mixer. is to translate the differential RF input voltage signals into the differential current signals, a process called V-I conversion. Typically, this stage also performs amplification as well. In the new design, the NMOS-PMOS pair not only performs V-I conversion and amplification, but can also translate the single-ended RF input into a differential signal pair. The importance of this NMOS-PMOS pair is that it can create a differential current in two branches of the circuit. Recall from equation (2.2), that the current 87 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering of an NMOS in saturation region is: (5.4) Note that both M3 (NMOS) and M4 (PMOS) in Figure 5.4 work in saturation region. As shown Figure 5.4, when \!;.f increases, Vas of the NMOS (M3 ) also increases. Equation (5.4) shows that when Vas is also increasing, (Vas - \ttl is increasing, which means that the current ID is also increasing. On the other hand, when Vas is decreasing, the current I D is decreasing. Therefore, when \!;.f increases, the voltage Vas of NMOS increases, resulting in an increasing I D • The converse is also true. This means that when the sinusoidal RF input signal is on the increasing half-cycle (1I;.f increasing), the current of this NMOS branch is increasing, and when the RF signal is on the decreasing half-cycle, the current is decreasing. Recall from equation (2.13), that the current of a PMOS transistor in the saturation region is: (5.5) Equation (5.5) shows that when Vas of the PMOS (M4) is increasing, (Vas - vt)2 is increasing, which in turn means that the current I D is also increasing. On the other hand, when Vas is decreasing, the current I D is decreasing which is exactly the same pattern for the NMOS device. However, from Figure 5.4, when 1I;.f increases, Vas of PMOS (M4 ) decreases, leading I D to decrease, because the voltage at the source terminal of PMOS is now larger than the voltage at the gate terminal. On the other hand, when 1I;.f decreases, Vas increases and I D increases as well. Therefore, when the sinusoidal RF input signal is on the increasing half-cycle, the current of 88 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering this PMOS branch is decreasing while the RF signal is on the decreasing cycle, the current of this PMOS branch increases. This V-I pattern is the exact opposite of the one in NMOS branch. The overall V-I conversion can be summarized as follows: • when the RF input signal is increasing, the current in the NMOS branch is increasing while the current in the PMOS branch is decreasing, and • when the RF input signal is decreasing, the current in the NMOS branch is decreasing while the current in the PMOS branch is increasing. Therefore, these two opposite currents create a differential signal pair, as shown in Figure 5.5. Thus the pair translates the single-ended RF input signal into a differential signal pair. . lrf o t Figure 5.5: Ideal differential current signals of NMOS and PMOS branches. Following the amplification stage, the modified double balanced mixer must be designed so as to meet the following performance objectives in addition to achieving its primary task: 89 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering • to achieve high conversion gain (Gc ) at the IF output, • to achieve a low noise figure (NF) at the IF output, • to optimize the linearity (IIP a), • to minimize the RF and LO feedthroughs, and • to minimize the power consumption given 1.5 V supply voltage. Recall from equation (3.86) in Chapter 3, that the gain of double balanced mixer can be expressed as: (5.6) Ideally, 9m and R L alone affect the conversion gain. However, in reality, the gain will be affected by various other factors such as imperfect switching, RF cable loss, etc. Equation (5.6) shows that if transconductance 9m increases, then the gain also increases. This also means that the current i D of the MOSFET also increases which results in increased power consumption by the device. Increasing the other parameter R L will also increase the gain, but at the cost of increasing the level of noise added by the resistor. 5.1.3 Design Process of Receiver Front-End The 2.4-GHz receiver in this design includes an low-noise amplifier (LNA) and a downconversion double balanced mixer, shown in Figure 5.6, where an output buffer is added for measurements. The overall performance of the receiver should meet the following objectives: • high gain at the IF output, 90 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering VDDMixer }- M9 Rbias5 ""1 Mixerr"" LO i Port ~~ .. i i i Mixer / Stage ...1 rnA I stag'\. VDDMixer r---1 C;M 1 ~~ : Vbi"3 I ~ 1--------------------------, I I 1 I Rnpoly I I 1 : Input I RF II Port r "1 'I 1.1 'I' C : II I II J ,,4 I - - - - - - - - - - - - - - - - -I i IBffi U er ..... 1 ---: Stage : l.., ,j bi V _ : 1 1 y I 1 : M4~ 3 Vbim r 1 ~ 1 I Mo M11 T,,"~i : J. i, !.Portl ,... .... I 1 II Figure 5.6: Circuit schematic of the receiver. • low noise figure (NF) at the IF output, • good linearity (IIP3), and • low power consumption given a 1.5 V supply voltage. As we have already designed the 2.4 GHz narrow-band LNA and the downconversion double balanced mixer, the overall performance can be obtained by considering the receiver as a two stage cascaded circuit with the first stage as the LNA and second stage as the mixer. With this structure, it is easy to obtain the overall performance figures. 91 McMaster - Electrical and Computer Engineering M.A.Sc. Thesis - Gefei Zhou The total gain of the receiver is: Greceiver = Gamplifier . G mixer . (5.7) where Greceiver is the gain of the receiver, Gamplifier is the gain of the LNA, and G mixer is the conversion gain of the mixer. The overall noise figure of the receiver can be obtained from equation (2.39), which in this case can be expressed as: NFreceiver = NFarnplifier + NFmixer - 1 G . receIver (5.8) where NFreceiver is the noise figure of the receiver, NFamplifier is the noise figure of the LNA, and NFmixer is the noise figure of the mixer. The overall IIP3 of the receiver can be obtained from equation (2.48) which results in: _ _1_ _ lIP 3,receiver ~ + Gamplifier. 1 lIP 3,amplifier (5.9) lIP 3,mixer where lIP3,receiver is the linearity of the receiver, lIP3,amplifier is the linearity of the LNA, and lIP3,mixer is the linearity of the mixer. The total power dissipation is: where without output buffer Preceiver = Pamplifier + Pmixer, with output buffer Preceiver = Preceiver Pamplifier + P mixer + Pbuffer. is the power consumption of the receiver, sumption of the LNA, (5.10) Pamplifier is the power con- Pmixer is the power consumption of the mixer, and the power consumption of the buffer. 92 (5.11) Pbuffer is M.A.Sc. Thesis - Gefei Zhou 5.2 McMaster - Electrical and Computer Engineering Circuit Implementation of Receiver Front-End The design for the receiver front-end is fabricated in TSMC 0.18-/-Lm CMOS Technology. The narrow-band low-noise amplifier is implemented using an inductively source degenerated cascade structure and the downconversion mixer is implemented according to double balanced configuration with complementary PMOS and NMOS transistors for the RF signal (path). In the circuit diagram shown in Figure 5.6, the first stage including M 1 and M 2 is the 2.4 GHz inductively source degenerated cascade narrow-band LNA. The second stage including M 3 - M s is the downconversion double balanced mixer stage. The third stage including MlO and M u is the output buffer stage for measurement purpose. In 0.18-/-Lm CMOS technology in the Cadence software, the width of the MOSFET transistor is fixed as 2.5 /-Lm, and the finger length is 0.18 /-Lm. As a result, the only method to control the transistor size is to change the parameter called number of fingers. This parameter together with bias voltages can be used to generate proper gm of the MOSFET. And according to the simulator, the values of number of fingers for all the transistors are shown in Table 5.l. The theory and function of the LNA and Mixer stage has been discussed before. In order to perform the function in each stage, all the MOSFET transistors should be biased properly. Therefore, the biasing voltages in this receiver design are 0.6 V. In addition, the voltage supplies for all the stages are 1.5 V. For testing purpose, a dummy load is typically used in order to simulate as 93 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering standard electric load. M g is used as a dummy load. This is for reasons of symmetry, as a single-ended output is used for the purpose of experimental measurements. The overall system design parameters are listed in Table 5.1, where the finger width is 2.5 /-tm and the finger length is 0.18 /-tm for all MOSFET transistors. Number of Fingers = 15 Number of Fingers = 10 Number of Fingers = 50 Number of Fingers = 110 Number of Fingers = 12 Number of Fingers = 100 RF Input Power -30 dBm @ 2.4 GHz LO Input Power odBm @ 2.1 GHz DC Bias Voltages 0.6V DC Supply Voltage 1.5 V M1 M2 M3 M4 M 5 -Ms Mg - Mu Table 5.1: Narrow-band receiver design parameters. The layout of the receiver circuit as designed in the Cadence software suite is shown in Figure 5.7, and a photomicrograph of the physically implemented version is shown in Figure 5.8. Figure 5.7: Physical layout of narrow-band receiver. 94 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering Figure 5.8: Photomicrograph of narrow-band receiver. 5.3 Simulation Results The simulations were run in the Cadence software suite using the Spectre RF simulator package. A 0.18 pm CMOS process was used with device models provided by CMC Microsystems. The simulator includes the narrow-band LNA as well as the double balanced mixer. The output of the receiver is simulated using Transient (TRAN) analysis. Figure 5.9 shows the simulation results for an IF output signal appearing at 300 MHz with a power amplitude of -14.68 dBm. The La feedthrough appears at 2.1 GHz with -47.0 dBm power amplitude, and the RF feedthrough appears at 2.4 GHz with a power of -47.61 dBm. Note that the La and RF feedthroughs have significantly lower amplitudes compared to the desired IF output. As mentioned before, the RF input power is -30 dBm and therefore, the gain is -14.68 - (-30) = 15.32 dBm. Refer to the schematic of the receiver in Figure 5.6, the results simulated here are single-ended in order to compare them to the measurement results. The total gain of the receiver unit is simulated using both Periodic Steady-State 95 McMaster - Electrical and Computer Engineering M.A.Sc. Thesis - Gefei Zhou -1D-r-----,-----r-----_-----,------..,..-----.,...--_-~ -2 -3 jm~::lllt . ·.·.·.·.·•. .· .·.·. co ~ 5-5 a. 5 o -6 -7 o 2 3 4 5 6 Frequency (E9) Figure 5.9: The output of narrow-band receiver. (PSS) analysis and Periodic Transfer Function (PXF) analysis as provided in Cadence software. Figure 5.10 shows the gain of the receiver circuit at different frequencies. In our design, the RF input frequency is 2.4 GHz, and therefore, the proper value of the gain should be obtained at this frequency. As marked, the simulated gain is 18.2dB at 2.4 GHz (input frequency). Note that this result is obtained from the differential output of double balanced mixer. From theory in Chapter 3, equations (3.79), (3.80), and (3.81) can be used to show that if the output is single-ended, the output power amplitude is half of the differential output power amplitude, which implies the single-ended output power is 3 dB less than the differential output power. Therefore, the gain is also 3 dB less. If we compare 96 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering this differential gain to the single-ended one that we simulated previously, the differential gain is 18.2 dB and the single-ended gain is 15.32 dB. This verified that the differential gain is 3 dB higher than the single-ended value. We will choose 15.32 dB as our simulated gain in order to compare to the experimental result. 2o-r- ~---r~~~----,~----.--~~,__~ ~,.._~~~,_~ -"'_ _ ~ -40-j+-'----;-----'-----------j-----+---~__;_____j ~__,~~~__, +-_--r_j -6o-t--;------"--+---'-------i-'---~--+--"----1-____c..............;--1 o 2 3 4 5 6 7 Frequency (GHz) Figure 5.10: The gain of narrow-band receiver. The overall noise figure (NF) of the receiver is calculated using both Periodic Steady-State (PSS) analysis and Periodic Noise (PNoise) analysis. Figure 5.11 shows the noise figure of the circuit. Because the IF output signal is centered at 300 MHz, this is also the frequency at which I measured the noise figure. As marked, the simulated NF is 9.99dB at the IF output frequency, 300MHz. The IIP3 of the receiver is simulated using swept PSS followed by Periodic AC (PAC) analysis, as shown in Figure 5.12. As described in Chapter 2, a "two-tone" 97 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering 13 130 90.0 170 210 250 290 330 370 410 450 Frequency (MHz) Figure 5.11: The noise figure of narrow-band receiver. test should be applied to evaluate lIPs. In the simulation, a second RF input was applied at frj2 ponent at frjl = 2.375 GHz with the same input power as the desired signal com= 2.4 GHz. Note that we use frjl to denote frj for the sake of simplicity in this two tone test. The first order terms of interest will be at: fijl frjl - flo = 2.4 GHz - 2.1 GHz = 300 MHz, and frj2 - flo = 2.375 GHz - 2.1 GHz = 275 MHz. (5.12) From equation (2.43), the third order terms of interest can also be obtained as: 2fijl - fij2 = 2 x 300 MHz - 275 MHz = 325 MHz, and 2fij2 - fijl = 2 x 275 MHz - 300 MHz = 250 MHz. 98 (5.13) M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering 4Q-r----,--------,-----------,---,------,-----,----------:,..-----,--------, 20+········~··--·,················-········-··-·+·········~··············-·-;~--'-_····-·f E m ~ 0> ~-2G_1_-_:::;;;i;.-=····--.·:····:··-;:·····:·····;,···;;··········/ n. S B- o -40+···-···········--··· ···············-#<··+·······························_···+;··············;····-··-1-·..- .•...•,.••- .•.•- .•---.--+- ,.- - ~,,' -6 -8o-t----i----i-~~_+_~~->--+---+-----,----i----,-----,-+_....;-~~---i....-+__~----+----,-__1 -40 -30 -20 -10 o 10 Input Power (dBm) Figure 5.12: HP3 of narrow-band receiver. Using the Cadence simulation, the first-order term was chosen to be the 275 MHz component, and the third-order term was chosen to be the 325 MHz component. The simulated HP 3 was marked and the value was found to be -18.78 dBm. The power consumption was simulated using DC analysis for a 1.5 V supply for the receiver circuit. The DC current for the narrow-band LNA is 1.322 mA which implies the power dissipation of the narrow-band LNA was found to be 1.983 m W, and the DC current of the mixer was 2.393 mA, which implies the power dissipation of this unit is 3.590mW. In addition, the DC current of the output buffer is 4.308 mA, which means that the power dissipation of the output buffer is 6.462 m W. Therefore, the overall power consumption of the receiver front-end is 5.573 m W without the output buffer and 12.035 m W with the output buffer. The total 99 M.A.Sc. Thesis - Gefei Zhou designed chip area is 2.7x 0.77 McMaster - Electrical and Computer Engineering = 2.08 mm2 • The summary of the overall simulation results is listed in Table 5.2. Technology Input frequency Gain (differential) Gain (single-ended) NF HP3 Power dissipation (without buffer) Power dissipation (with buffer) Chip area 0.18 p,m CMOS 2.4GHz 18.2 dB 15.3 dB 10 dB -18.8 dBm 5.57mW 12.0mW 2.08mm2 Table 5.2: Simulation results of the narrow-band receiver performance. 5.4 Measured Performance In addition to simulations, the performance of the fabricated receiver circuit, as shown in Figure 5.8, was also measured in the laboratory. The experimental setup, equipment, and measurement procedures are discussed in Appendix A. First of all, we will monitor the DC currents in all the stages including LNA, Mixer, Buffer stages by Semiconductor Parameter Analyzer and ensure that the DC currents are reasonable before measuring any values. Then we will start measure the receiver circuit, where the measured results and comparison to the simulated results are demonstrated here. The measured output of the receiver circuit, shown in Figure 5.13, is the original result obtained from the Spectrum Analyzer. In order to analyze and show the output result clearly, we export the data from the Spectrum Analyzer to Microsoft 100 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering Office Excel and graph the output, shown in Figure 5.14. Figure 5.13: Measured output of narrow-band receiver from the spectrum analyzer. All values of the receiver input parameters are obtained from Table 5.1, in which the input RF power is -30 dBm at 2.4 GHz and the input LO power is 0 dBm at 2.1 GHz. The output result in Figure 5.14 shows that the desired IF output power is -18.2 dBm. Note that as we discussed in Appendix A, the input losses can be easily compensated while the output losses can only be compensated manually, which implies we need to add the loss in our output. Using the method described in Appendix A, the RF cable loss at 300 MHz as measured at the output port was found to be about 1.5 dB. Hence, the actual output IF power should 101 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering o IIF Output = -18.2dBrn at 300MHz I -10 / -20 Ic-L_O_F_e_e_d_th_r_O_u_gh_=_-_31_._7d_B_rn_a_t_2_.1_G_Hz---li / S ~ -30 /IRF Feedthrough = -37.1dBrn at 2.4GHzI '-" -a .& -40 8 -50 -60 -70 o 1 234 5 6 Frequency (GHz) Figure 5.14: Measured output of narrow-band receiver from the output data at Pin = -30 dBm. be -18.2 + 1.5 = -16.7 dB. Therefore, the measured gain of the receiver circuit is in fact -16.7 - (-30) = 13.3 dB. By comparison, the simulated gain value was 15.32 dB which indicates that the measured gain was about 2 dB lower. However, the losses from the RF cables, laboratory facilities, pins or pad contacts may not have been compensated accurately, a fact which will affect the measured output values. Therefore, a 2 dB difference is acceptable as a measured result. In addition, the overall gain (13.3 dB) of the receiver is measured from single-end. As we discussed before, it is 3 dB lower than the gain measured from differential pair, which implies that the gain should be 13.3 + 3.= 16.3 dB if differential output is selected. The measured noise figure of the fabricated receiver circuit is shown in Figure 102 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering 5.15. As marked, the measured NF at 300 MHz (IF output frequncy) is 11.5 dB, and the simulated vaule is 10 dB. This indicates that the experimental noise figure is 1.5 dB higher than the simulated one which is acceptable considering the loss of 1.5 dB in the cables and that the uncertainties in the behavior of real equipment and components may affect the measurements. 35 30 ---.. f§ 25 • '--' ~ 20 bJ) u::o 15 ~ 10 Cf) /' INF=11.5dB at 300MHz I 5 O'---------'-------'--------'----------'-------'----------J 150 200 250 300 350 400 450 Frequency (MHz) Figure 5.15: Measured noise figure of narrow-band receiver. The measured IIP3 is shown in Figure 5.16. This parameter value was measured as -19 dBm, while the simulation predicted a value of -18.8 dBm. This is a reasonable result given how close the measured value is to what was predicted by the theoretical analysis. Figure 5.14 indicates that the LO feedthrough is -31.7 dBm at 2.1 GHz and the RF feedthrough is -37.1 dBm at 2.4 GHz. These are values well below the IF output signal power as desired. Furthermore, refer to the theory in Chapter 3, the feedthroughs can be significantly improved if differential outputs are taken. 103 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering 20 10 ..,.'.. ' o ....."::'i·:::······· S -10 ~ .......... -20 ~ ..... ~ -30 ~ ..... i .' -'-lst Order Curve --.- 3rd Order Curve -40 -50 -60 -70 \IIP3 = -19 dEm I -80 -45 -40 -35 -30 -25 -20 -15 -10 -5 Input Power (dBm) Figure 5.16: Measured IIP a of narrow-band receiver. The supply voltage is 1.5 V. The measured DC currents are 1.22 rnA for the amplifier stage, 3.27 rnA for the mixer, and 4.07 rnA for the output buffer. Therefore, the power consumption of each stage is 1.83 mW,4.91 mW, and 6.11 mW. The overall power consumption of the receiver front-end is 6.74 mW without the output buffer and 12.85 mW with the output buffer. A summary of both the simulated and measured results is listed in Table 5.3. 104 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering Technology Input frequency Gain (differential) Gain (single-ended) NF HP3 Power dissipation (without buffer) Power dissipation (with buffer) Chip area Simulated Measured 0.18 /-Lm CMOS 0.18 /-Lm CMOS 2.4GHz 18.2 dB 15.3 dB 10 dB -18.8 dBm 5.57mW 12.0mW 2.08mm2 2.4GHz 16.3 dB 13.3 dB 11.5 dB -19 dBm 6.74mW 12.85mW 2.08mm2 Table 5.3: Measured performance of the narrow-band receiver. 5.5 Comparison and Discussion In order to compare the results with existing published works, a performance met- ric must be selected that accounts for all the performance parameters under discussion. Such quantity is called a figure of merit (FoM), and it is defined as: FoM = 20 log(jRF) + G + HP3 - NF - 10Iog(Pdiss ), (5.14) where all values are measured in normalized units. The term fRF is the input frequency of the RF signal in Hz normalized to 1 Hz, G is the gain of the receiver in dB normalized to 1 dB, HP 3 is the linearity in dBm normalized to 1 dBm, NF is the noise figure in dB normalized to 1 dB, and Pdiss is the power consumption of the receiver circuit in mW normalized to 1 mW. Note that FoM is only a value that estimates the overall performance of the circuit. As long as each individual term is calculated in the same metric, the differences among each FoM remain the same since. Therefore, the FoM is only a rough value for the purpose of comparison and 105 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering the unit is not strictly defined. Table 5.4 shows both the simulated and measured results of our receiver design as well as comparisons with other recently published work. From Table 5,4, it is clear that the FoM of the proposed receiver is neither the best nor the worst. It is essentially average in terms of performance, and it is quite acceptable fo the practice. This is because the proposed design has its advantages. Note that the form of the NF we used here is SSB noise figure, which is usually 3dB higher than the DSB noise figure. In practice, the SSB noise figure should be reported in preference to the DSB NF, as it is a more meaningful metric. Tech. (p,m) Simulated Measured [48] [49] [50] [51] [52] [53] [54] 0.18 0.18 0.09 0.18 0.25 0.13 0.18 0.18 0.18 Input Freq. (GHz) 2.4 2.4 2,4 2,44 2,4 2,4 2,4 2.4 2,4 Gain (dB) NF (dB) IIP3 (dBm) P diss (mW) 18.2 16.3 30 8 14.5 12.5 23 21.4 20.4 10 11.5 18 8.9 4.8 28 9 13.9 19 -18.8 -19 -22 -13.5 -18 -21 -15 -18 N/A 5.57 6.74 8.5 2.754 11.3 3.4 4.8 6.5 0.5 Chip Area (mm2 ) 2.08 2.08 3,4 N/A 1.82 3.3 1.6 N/A 0.765 FoM 170 165 168 169 169 146 180 169 N/A Table 5.4: Comparison to other Narrow-Band Receiver Performances. Because the standard RF input is single-ended, the receiver front-end usually requires either a pair of differential inputs to the LNA, or an on-chip transformer to create the inputs for the double balanced mixer. However, the on-chip transformer is relatively hard to realize, requires more circuit area, and has a power consumption. It also degrades the circuit performance. Therefore, the benefit of 106 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering our receiver design is that it requires only a single RF input signal to provide an output IF signal. No on-chip transformer is needed, which means that the single RF output signal can be translated into a differential signal pair without adding any elements in the circuit. Overall, as a receiver, our design has the following advantages: • requires a single-ended RF input without a need of using on-chip transformer, • a simple circuit architecture that eases the process of fabrication, • relatively low power consumption, and • competitive overall performance compared to other designs However, there are tradeoffs involved in this receiver design. Because we translate the single-ended RF signal to a set of differential signals, we use a PMOSNMOS transistor pair, instead of NMOS differential pair. The mobility of PMOS transistor is smaller than the mobility of NMOS transistor. Therefore, the PMOS transistor normally is larger in size and switches more slowly than the NMOS transistor, a phenomenon that creates an imperfect phase relationship between the two differential signals at the output of the PMOS-NMOS pair. In addition, the current amplitude of the PMOS branch is not symmetrical with the NMOS branch due to the difference in mobility. This may degrade the performance of the mixer if the bias is not tuned precisely. Depending on what we have simulated and measured, our receiver works as a normal one and this issue could be solved in the future since we know the mobility of MOSFETS depends on process-technology from Chapter 2. 107 Chapter 6 UWB LNA in O.13-JLrn CMOS Technology Considering the issues discussed before in Chapter 4, this chapter will focus on low-power consumption design in biomedical application while optimizing other performance characteristics at competitive levels of the ultra-wide band (UWB) low-noise amplifier (LNA). Based on [36], a simple structure of inductively source degenerated cascode UWB LNA is introduced. The inductive source degeneration cascode circuit was introduced earlier as a possible candidate architecture for a UWB LNA design. However, unlike the original version described in [36], the biasing voltage of the second MOSFET transistor is connected to supply voltage instead of to another biasing voltage. The output buffer is implemented in on-chip instead of using a DC current source, another MOSFET transistor is substituted in. In a real circuit, the bias voltage input will affect the performance of the RF circuit. We should, therefore, attempt to minimize the number of bias voltages 108 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering inputs in order to obtain better performance. Therefore, our UWB LNA design only involves one off-chip biasing voltage, which is connected to the first MOSFET transistor. 6.1 Design Process and Theory of UWB LNA The UWB LNA design in this thesis, shown in Figure 6.1, applies the inductive source degeneration technique in a cascode structure. This configuration is very simple, yet still yields good performance. VDD -...._-----.>--------11-- 2nd order Chebyshev Input Matching RF r_:~~ Input Port r m .... I I L 1 C1 1 I iii ! ! ! I II i i ~------iL......... -I N::~) II II I :I II I C2 : 1 ---.J L RF Output Port I I I I~ L g M I I I 1: ------, : f Cp I·...· ..., I! M41! i! ! I I; I _I I -;- - i - i I. •••••••• 1 - IOutput Buffer I Zin I Ls I I 1_ _ - I Figure 6.1: Circuit schematic of ultra-wideband low-noise amplifier. 109 i M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering The ultra-wideband low-noise amplifier design should optimize the overall performance according to the following criteria: • wide bandwidth from 3.1 to 10.6 GHz (7.5 GHz frequency range), • high and flat gain through 3.1-10.6 GHz bandwidth, • low noise figure over the entire bandwidth, • high linearity through the entire bandwidth, • low input and output return loss through the whole bandwidth, and • low DC power consumption. In the circuit schematic shown in Figure 6.1, the input matching network is similar to that used for narrow-band amplifier designed in Chapter 5. The smallsignal equivalent circuit of the matching network can be obtained from Figure 5.3 and refer to equation (5.1). The input impedance for the matching network of the amplifier is: Zin 1 ( ) 9mLs = s(Cgs + Gp ) + s L s + L g + Cgs + Gp . (6.1) This network is designed to ensure the real part of the input impedance Rut ~=50n. Cgs+Cp In order to extend this technique to the ultra-wideband LNA, we need to add the input matching network to two filter sections to form a three-section Chebyshev filter as shown in Figure 6.2. This filter is used to control the reactive part of the input impedance over the whole bandwidth because there is a relationship between the input reflection coefficient and the constant ripple of the Chebyshev filter. 110 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering Rs RF Signal Source Figure 6.2: Circuit schematic of the three-section Chebyshev filter. The design steps for the UWB matching network are: 1. Convert the requirement for the input matching into the requirement for filter design. A three-section band-pass Chebyshev filter is suitable due to the relationship between the input reflection coefficient r and the in-band ripple PP and because the Chebyshev filter has constant ripple in the pass-band. 2. Follow standard procedure for filter synthesis [55] of a loss-less symmetrically loaded three-section band-pass Chebyshev filter to find the values of the ideal filter components such as Lv C11 L 21 0 21 Cgs + Cpt Ls + L gl and ~=50n. Ggs+Gp 3. Select proper size and bias voltage of the MOSFET transistor to produce transconductance gm in order to match the real part of the source impedance ~=Rs=50n. Ggs+Gp 4. Change the ideal models of the components to real models and tune the values in Cadence to achieve a performance close to the design with the ideal components. 111 McMaster - Electrical and Computer Engineering M.A.Sc. Thesis - Gefei Zhou Details for each design step are given below: In the first step, the input reflection coefficient r is related to the in-band ripple Pp by [36]: 1 Ir 2 = 1--, 1 (6.2) Pp where we choose the input reflection coefficient r < -10dB over the entire bandwidth. Consequently, the value of the ripple PP can be obtained from equation (6.2). From the pass-band ripple, we can determine the filter ripple parameter c by the following relationship [55]: 2 1 1 Irl = 1- -PP = 1- V1 + c 2 . (6.3) In this way, we translate the input matching design into a design of filter with requirement for max ripple c. In the second step, the transfer function of the filter can be determined by the formula that relates the gain magnitude IAI to the ripple parameter c. The transfer function of the Chebyshev filter prototype is [55]: (6.4) where To(w) = 1, T1 (w) = w and T2 (w) = 2wT1 (w) - To(w) = 2w 2 - 1. Higher order polynomials can be calculated from the recursion relationship [56]: (6.5) A(w) is the gain magnitude, Tn(w) is the Chebyshev polynomial, and n is the order 112 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering of the Chebyshev filter. This is the normalized low-pass prototype (Lpp) transfer function. Next we transform the L pp to the band-pass filter. A(w) is the transfer function of the normalized low-pass prototype L pp . The general form of the transfer function of L pp is [55]: (6.6) Through the substitution (6.7) HLpp(s) is transformed into a band-pass transfer function HBP(p) with the form H () - K' BP P - n-m P 1 + B P + B p 2 + ... + B p2m-2 + B p2m-l +p2m 1 2 2 1 1 + AlP + A 2p 2 + ... + A 2p 2m-2 + A lP2m-l + p2m' (6.8) In our design, we choose the pass-band frequencies as 3.1 and 10.6 GHz which means low angular frequency is WL = 21T(3.1 X 109) rad/s and high angular fre- quency is WH = 21T(10.6 X 109) rad/s. The parameter of Wo can be calculated as [55]: Wo = VWLWH, (6.9) and the bandwidth parameter is: BW = (WH - WL) = 21T(10.6 x 109 - 3.1 X 109 ) rad/s. (6.10) Now substituting Wo and BW back to equation (6.7), we obtain the expression of p. Then, the transfer function of the band-pass filter is determined by substituting p into equation (6.8). The transfer function is polynomial expressions which means 113 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering we can solve them to obtain the terms of each section. After that, the values of the inductors and capacitors can be selected according to the following expressions [55]: Zseries (p) ~arallel (p) 1 = pLseries + C P = pGparallel + series ' 1 L ' P parallel (6.11) (6.12) where Zseries stands for the impedance of a series combination of an inductor and a capacitor while ~arallel stands for the admittance of a parallel combination of an inductor and a capacitor. Now we Can design the three-section (third-order) Chebyshev filter by following these standard filter design synthesis. In the third step, we will choose the proper value of gm' It is generated by choosing the proper size and bias voltage of MOSFET transistor in Cadence software. Therefore, the real part of the input impedance can be matched to 50 nand the certain DC current can be determined. The last step is to change all the ideal components into real components and tune the values in Cadence. The main purpose is to achieve low power consumption. Meanwhile, other performances are also optimized as much as possible. All the values of the components are listed in Table 6.1. The output matching is not very important since usually the front-end LNA is followed by the mixer stage. However, here, output matching is needed since we can only simulate the UWB LNA by itself instead of as part of a whole receiver front-end system. Therefore, an output buffer is added to the circuit for the purposes of measurement within the simulation. The output performance of the ultra-wideband LNA can be measured and 114 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering quantified in the same manner as for the narrow-band LNA of Chapter 5. However, the critical parameter in this UWB LNA design is to minimize the power consumption. The gain should be designed flat and high through the entire bandwidth. The noise figure (NF) should also be designed to be flat and low across the entire bandwidth, as should the input and output return losses. The linearity is measured by the llP3 value however, should be high while it is desirable that DC power consumption be as low as possible. The input return loss (811 ) and output return loss (822 ) should be low and flat over the entire bandwidth. Furthermore, the DC power should be carefully minimized as welL 6.2 Circuit Implementation of UWB LNA The the proposed amplifier is designed to be implemented using IBM O.13-p,ffi CMOS technology and is simulated using the Cadence software suite package. In Figure 6.1, the NMOS transistors M1 and M 2 , which are built in cascode configuration and perform the amplification of the incoming RF signals, and the resistor R L and inductor LL, together with an output buffer built using the NMOS transistors M 3 and M 4 , form an output matching network, which is used for measurement purposes only. The relevant values of all the circuit elements can be determined from the theories discussed in Chapter 4. In order to make the NMOS transistors M1 and M 2 work properly, an appropriate biasing voltage should be selected to ensure that both transistors are working in the saturation region and that they provide a reasonable DC current I D . Therefore, our biasing voltage is set to be 465 m V. In summary, the overall design parameters are listed in Table 6.1. 115 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering M1 M2 M3 M4 DC Bias Voltages (Ybias) DC Supply Voltage L1 L2 C1 C2 Lg Cp Ls LL RL W x L = 160 J.lm x 0.13 J.lm W x L = 50 J.lm x 0.13 J.lm W x L = 48 J.lm x 0.13 J.lm W x L = 48 J.lm x 0.13 J.lm 0.465 V 1.2 V 600 pH 600 pH 500fF 300 fF 1.108nH 60.02 fF 401 pH 868 pH 122.2 n Table 6.1: UWB LNA design parameters. The resulting layout, as found using Cadence, is shown in Figure 6.3. 6.3 Simulation Results The simulations were done using the Spectre RF package from the Cadence software suite in 0.13-J.lm CMOS process and the device models were provided by CMC Microsystems. All of the performance characteristics except for the HP3 are simulated using S-Parameter (SP) analysis, the theory of which was discussed in Chapter 4. 116 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering Figure 6.3: Physical layout of the ultra-wideband low-noise amplifier. 6.3.1 Gain The gain vs. frequency was calculated for a matched input impedance Zin = Zs = 50n, and an impedance matching output buffer. The resulting gain (821 ) values are shown in Figure 6.4, where the bandwidth of the designed UWB LNA is 3.1-10.6 GHz. As marked, the maximum gain value is G max = 12.07 dB and the minimum value is Gmin = 10.27 dB. This indicates that the gain variation of our designed UWB LNA is Gvariation = G max - G min = 12.07 - 10.27 = 117 1.8 dB. Meanwhile, the M.A.Sc. Thesis - Gefei Zhou 5.0+·-·-·-·-·········-·· -5.0-1- -- o McMaster - Electrical and Computer Engineering +/-. __.-'--'--'-- j_ +-.. 2.5 -~ ..- .. ~- -..--.+--..- 5.0 __ __.._.!al!!!l,_!lli!1,1Jt"~;;.~·!1'·!J..<;,_!..q!.!.!I.!V---'-_ ------I- _._".__+._ 7.5 10.0 __ .; -i-_\_. c -1-..···········--··-----1 - .._+--\- 12.5 -. __.. ~ 15.0 Frequency (GHz) Figure 6.4: The gain (821 ) of UWB LNA. average value of the gain in Figure 6.4 is Gaverage = 11.17 dB. From this, we can ca1culatethatthe gain flatness is t1G = ±0.9 dB (11.17 -10.27 = 0.9 dB and 11.1712.07 = -0.9 dB). 6.3.2 Noise Figure 6.5 shows the noise figure over the designed bandwidth. As indicated on the plot, the minimum value is NFmin = 3.38 dB and the maximum value is NFrnax = 5.92 dB. Therefore, the noise figure variation is NFvariation = NFrnax - NFrnin = 5.92 - 3.38 = 2.54 dB. In addition, the average noise figure of this UWB LNA simulation is NFaverage = 4.65 ± 1.27 dB. 118 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering 22.5 20. 17.5 15. m ~ ~ :J .g>12.5 LL Q) '" '0 z 10. 7. 5. 2. 0 2.5 5.0 7.5 10.0 12.5 15.0 Frequency (GHz) Figure 6.5: The noise figure (NF) of the UWB LNA. 6.3.3 Linearity The simulated IIP3 is simulated using Periodic Steady-State (PSS) analysis, at the mid-band frequency of 6 GHz. The two-tone test was applied and assuming the desired RF input signal to be frj2 frjl = 6.0 GHz with another RF signal present at = 6.1 GHz. Therefore, the third order terms appeared at 2frj2 - frjl 2 x 6.1- 6.0 = 6.2 GHz, 2frjl - frj2 2 x 6.0 - 6.1 = 5.9 GHz. (6.13) In the simulator, we then picked the first order term at 6.0 GHz and third order term at 6.2 GHz. The simulated llP 3 is shown in Figure 6.6 and has a value of -3.81 119 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering dBm. 4(}-r------,------,.--,---...,---------r-----,-------,---,-----.......".---, -4(}-j----C~---~~;;!0'--~-'----~-----~'______t---'------'--1 -6O+----~--:r-=-------~--+---+-+-----+--i-------+-c-f--__'____'---------'--!------'--------'--1 -8o-t-~.--------.----<--~--;----+-+_~-+--+-~~-+-_;______f--.;.-;-~~:---.-_+_~~---<--~-___T_! -30 -20 -10 o 10 Input Power (dBm) Figure 6.6: IIP3 of UWB LNA. 6.3.4 Input and Output Return Loss The input and output return losses are quantified by the two-port parameters 8 11 standing for the input return loss, and 8 22 standing for the output return loss. As marked in Figure 6.7, the value of 8 11 is below -10 dB within most of the bandwidth. However, when the input frequency is high, the input return loss increases, although the entire curve is still below -6.66 dB. Meanwhile, the value of 8 22 is always below -10 dB throughout the entire bandwidth of interest. 120 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering -5.o-t------j--I----'-- ~ ~ c -15-1--····· · ---·..··-·-+--- \·/' -··'- ·1 \·· -.'-..-/-- 11-··--..· · -\· - · · , " ·-·' ·-·1- ·• ·..·-..· ---·1 '" ·++··'..·IRO? -2(}+·---·...........·....--·.....·......-I--·........·..·--·-~· .. -25-1-----+-----'--+--'--\-1- o 2.5 7.5 5.0 10.0 12.5 15.0 Frequency (GHz) Figure 6.7: The input and output return loss (811 and 8 22 ) of UWB LNA. 6.3.5 Power Consumption Given a 1.2 V supply voltage, the DC current of the UWB LNA core is 2.345 mA, and the DC current of the output buffer is 4.714 rnA. This implies that the power consumption of the LNA core is 2.81 mWand the power consumption of the output buffer is 5.66 mW. Therefore, the total power consumption of the LNA can be summarized as being: • 2.81 mW without the output buffer, • 8.47 mW with the output buffer. The total designed chip area is 0.6 x 0.8 = 0.48 mm2 including the on-chip output buffer and pads, shown in Figure 6.3. 121 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering A summary of the overall simulation results is listed in Table 6.2. Technology Bandwidth Gain (821 ) NF IIP3 Input return loss 8 11 Output return loss 8 22 Power dissipation (without buffer) Power dissipation (with buffer) Chip area 0.13 p,m CMOS 3.1-10.6 GHz 10.27-12.07 dB 3.38-5.92 dB -3.81 dBm <-7 dB <-10 dB 2.81mW 8.47mW 0.48mm2 Table 6.2: Simulation of UWB LNA Performance. 6.4 Comparison and Discussion In order to compare the overall performance to other existing works, we need to define a performance metric for ultra-wideband low noise amplifier. Using equation (5.14) in Chapter 5, extended over the entire bandwidth, the figure of merit (FoM) of the UWB LNA can be defined as: FoM = 20 log(BW) + G + IIP3 - NFaverage - 10log(Pdiss). (6.14) where we translate all the values into normalized unit and BW is the bandwidth in GHz normalized to 1 GHz, G is the gain of the LNA in dB normalized to 1 dB, IIP3 is the linearity in dBm normalized to 1 dBm, NF is the noise figure in dB normalized to 1 dB, and Pdiss is the power consumption of the UWB LNA circuit in mW normalized to 1 m W. 122 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering Table 6.3 shows that the FoM of our UWB LNA is much better than that of other designs published in the literature promissing design. In other words, our ultra-wideband LNA is definitely dominant among those published works. The advantages of our design are: • Fairly simple structure for fabrication and an easy architecture for the purposes of analysis and understanding. • Extremely low power consumption. • A relatively high, flat gain and great flatness of the gain (little gain variation or small gain ripple). • Large bandwidth according to FCC allocation rules. • Relatively high IIP3 at the mid-band frequency. • Small chip area. The disadvantages of our design are: • Not a perfect noise figure (NF). • Relatively high input return loss (811 ), The primary benefits of this design is that is provides a simple circuit structure, flat and high gain, as well as a low power dissipation, and a very wide bandwidth. Normally LNA design involves tradeoffs. If some particular performance criteria need to be optimized, some others may need to be sacrificed, as there is no way to optimize every parameter simultaneously. Therefore, knowing what kind of 123 ~ ~ en f.I ,.... ~ This Work [36] STD [36] TW [57] [41] [58] [59] [60] [61] [62] [39] [63] [64] [65] CMOS Technology (/Lm) 0.13 0.18 0.18 0.18 0.18 0.09 0.18 0.18 0.18 0.18 0.18 0.18 0.18 0.18 S11 (dB) <-7 <-9.9 <-9.4 <-10 <-11 <-10 <-9 <-16 <-8 <-8 <-11 <-12 <-10 <-11 Bandwidth (GHz) 3.1-10.6 2.3 - 9.2 2.4 - 9.5 0.4 -10 1.2 -11.9 2 -11 2 - 4.6 0.03 -7 0.6 - 22 3.1-10.6 3.1- 10.6 3-6 2.7 - 9.1 3-5 Gain S21 (dB) 10.3 -12.1 6.3 - 9.3 704 - lOA 9 ~ 1204 6.7 - 9.7 9 -12 9.8 7.4 - 8.6 6.5 - 8.1 13.5 -16 10.9 - 12 13.5 -15.9 10 1104 -14 NF (dB) 3.4 - 5.9 4- 9.2 4.2 - 9.2 4.4 - 6.5 4.5 - 5.1 5-6 2.3 - 5.2 4.2 - 6.2 4.3 - 6.1 3.1- 6 4.7 - 5.6 4.7 - 6.7 3.8 - 6.9 5.0 - 5.3 IIP3 a (dBm) -3.81 -6.7 -8.8 -6 -6.2 -4 -7 1.8 NjA -7 -12 -5 1 -9.7 Table 6.3: Comparison of UWB LNA Performance. allP 3 is estimated at mid-band frequency. bFoM is calculated using average gain (821 ) and average noise figure (NF). DC Power (mW) 2.81 9 9 12 20 17 12.6 9 52 11.9 10.6 59.4 7 16.4 Chip Area (mm2) 0.48 1.1 1.1 0.42 0.59 0.7 0.9 1.16 1.35 1.2 0.67 1.1 1.57 0.9 FoMb ~..... CIl CIl I CJ ro 15.8 1.73 0.88 8.10 4.78 7.78 -3.65 11.9 NjA 9.95 1.55 -4.20 13.3 -8.28 (;j' ..... ~ § ~ ~ ~ 1ti '""l I t:d ro £t..... rl Pl ...... [ n ~ a ro '""l H S· ro ro S· aq M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering performance we are interested in and then optimizing it without sacrificing other parameters too much is the key to ultra-wideband LNA design. From the simulation results, it is obvious that the advantages of the proposed design outweigh the disadvantages. In other words, we have achieved the desired UWB LNA performance with some acceptable tradeoffs. 125 Chapter 7 Conclusion 7.1 Summary In this thesis, a new narrow-band receiver front-end containing a narrow-band low-noise amplifier followed by a downconversion double balanced mixer was investigated. This investigation included the design, simulation and physical instantiation of the system using TSMC 0.18-p,ffi technology. Furthermore, the design of an ultra-wideband low-noise amplifier was also investigated through Cadence simulation of the device in IBM 0.13-p,ffi CMOS technology. The narrow-band receiver design was focused on solving the problem of connecting a LNA to a double-balanced mixer. In Chapter 5, a novel idea for solving this problem was proposed in the form of a re-designed mixer. The new doublebalanced mixer needs only a single RF input from the LNA, and does not require an on-chip transformer. The receiver circuit is designed to operate at 2.4 GHz and produce the IF output at 300 MHz. The overall measured results are about average in terms of performance when compared to other published designs. Just as 126 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering importantly however, the new approach solving the LNA-to-mixer connection is both introduced and verified. The proposed improvements therefore likely aid in the design of future receivers. The new ultra-wideband low-noise amplifier discussed in Chapter 6 is designed to optimize the overall performance with great emphasis on low-power consumption design. This inductively source degenerated UWB LNA is demonstrated in Chapter 6 through simulation in Cadence. This circuit operates through the entire UWB bandwidth from 3.1 to 10.6 GHz frequency range with good values for the different performance characteristics, such as gain, flatness, matching, linearity and noise. The power dissipation of this design is obviously much lower compared to other designs, and the overall performance of our UWB LNA in terms of FoM for UWB amplifiers is mostly superior when compared to other published works as was discussed in Chapter 6. 7.2 7.2.1 Future Work Narrow-Band Receiver The main issue to be resolved regarding the new receiver design relates to the double balanced mixer. Unlike standard mixer designs, we have placed a PMOS in one of the two circuit branches instead of using an NMOS device in each. As discussed in Chapter 2, the mobility of PMOS is much smaller than that of NMOS. This makes it hard to create a perfect differential signal pair due to the slower reaction of the PMOS. One possible solution to this problem is to improve the mobility 127 M.A.Sc. 'Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering of PMOS in the CMOS process technology. This is not far-fetched, as new technology has already improved the mobility of both PMOS and NMOS [66]. Another possible solution is that we may sacrifice the mobility of NMOS in order to achieve better balance without degrading the performances out of competitive levels. As a result, the mobility of the PMOS is almost equal to the mobility of the NMOS. For example, we may use a lower technology NMOS such as O.18-f-Lm and a higher level PMOS such as O.13-f-Lm to create more balanced differential signal pair. These could solve the mixer design problem in the future. However, the costs associated with these solutions will also need to be considered. 7.2.2 Ultra-Wideband Low-Noise Amplifier The problem with the new ultra-wideband low-noise amplifier design is that its noise figure is neither very flat nor extremely low. As discribed in Chapter 4, the noise figure of an amplifier can be significantly improved if a noise canceling technique [41,42] is applied. In the future, noise canceling methods should be investigated while trying to maintain the other performance measures at almost the same level. Another issue to be addressed is that the input return loss is relatively high. This is because the input matching network was not optimized for input return loss, as it was designed to optimize gain, noise figure and power dissipation instead. However, this problem could likely be solved by trading off increased power consumption for a better input return loss. In summary, the UWB LNA has room for improvement. However, it is impor- tant to pay attention to the overall performance (the figure of merit) in order to 128 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering decide whether a particular modification is acceptable. 129 Appendix A Experimental Setup In order to measured the receiver circuit, the following equipments has been se- lected and used • The RF and LO signals are generated by Signal Generators. Agilent E4422B Signal Generator, Agilent 83752A Synthesized Sweeper, and the Amitsu MG3694A Signal Generator have been used. • The HP 4145B Semiconductor Parameter Analyzer has been used to provide the DC voltages and DC biases. • The Agilent E4440A Spectrum Analyzer has been used to observe the output IF signal of the DUT. • The HP 8970B Noise Figure Meter with Ailtech 7616 Noise Source have been used to measure the noise figure of the Device Under Test (DUT). • The Amitsu K251 Bias Tees have been used to combine DC and RF signal to add DC offset to the signal so that the transistors in the circuits were biased 130 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering to work in saturation region. • The Krytar Double Arrow 1800 Hybrid Splitter has been used to produce a differential signal pair (180 degrees out of phase) for LO inputs of the mixers from the single-ended signal of signal generators. • The 12GHz power divider combiner has been used to combine the two signals from signal generators, where the power combiner is from American Microwave Corporation. • Two sets of Multi-Probes from GGB Industries INC are used to connect the cables to the pads of DUT. The measurements have been carried out on wafer, using Karl Suss PM8 probe station. where the circuit condition is that the RF input signal is at 2.4 GHz with -30 dBm power amplitude, the LO input signal is at 2.1 GHz with 0 dBm power amplitude, and the IF output is at 300 MHz. Note that the receiver IF output is single-ended, but not differential. As a result, we implement another MOSFET which functioned as a dummy load for 50 it matching for symmetric purpose on chip. Therefore, the actual differential out- put gain should be 3dB higher than the measured one and the actual RF and LO feedthroughs should be better if differential output is obtained according to the theory in Chapter 3. Another aspect is the RF cables, Splitter, and Bias Tees losses. One possible method to compensate the losses is that we connect a Signal Generator to the RF cables, Splitters, or Bias Tees and then feed them into a Spectrum Analyzer. Setting the frequency to 2.4 GHz, 2.1 GHz, or 300 MHz, we observed the certain losses for certain components at different frequencies. For example, we 131 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering only need to test the losses for all the RF input components at 2.4 GHz, test the losses for all the La input components at 2.1 GHz, and test the losses for the IF output components at 300 MHz. Then we have the following conditions • The RF input cable and Bias Tee has 3 dBm losses for gain measurement and if the power divider is added for lIP 3 measurement, the loss is 6 dBm since power divider has 2 dBm losses and another RF cable needs to be added for each RF inputs which has 1.6 dBm losses. Meanwhile, all the input losses are measured at 2.4 GHz. • The La input has RF cable losses, Splitter loss, and two Bias Tee losses which is approximately 4 dBm loss for each of the differential La input at 2.1 GHz. • The output RF cable has a 1.5 dBm at 300 MHz As a result, the input losses are easy to compensate. For instance, if we measure the gain of the receiver circuit, we can setup the power to be -27 dBm in Signal Generator if we want the desired actual RF input power to be -30 dBm which compensates the 3 dBm loss due to the input components losses. The same theory can be applied to the La input signal. However, at the output, we can simply add the power loss to whatever outputs we have observed from the Spectrum Analyzer. A.1 Gain and output Measurement In order to measure the gain and output of the receiver, we setup the experiment as shown in figure A.l. The 2.4 GHz RF input signal is from Signal Generator 1. Then it is fed into a Bias Tee to add necessary DC bias while the original RF input 132 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering signal passes through and flows to the DUT. In addition, Signal Generator 2 is used to generate the La input signal at 2.1 GHz and it is connected to an 180 Splitter 0 which creates a differential signal pair (180 degrees out of phase) of the La signal. Then two Bias Tees are used to add DC bias for both signals. All the voltages sources including DC supply voltages and DC biasing voltages are provided by the Semiconductor Parameter Analyzer in which the DC currents of each stage of the receiver have been monitored. The spectrum of IF signal output is read by the Spectrum Analyzer. The spectrum includes the gain, the RF feedthrough, and the La feedthrough. A.2 lIPs Measurement Figure A.2 shows an experimental setup to measure the linearity (IIP3 ) of the receiver. All the components in the setup for gain and output measurements are reused for the two-tone measurement of IIP3 , and another Signal Generator 3 and one power divider are added to combine the RF signal. Signal Generator 3 is used to produce another RF input signal at frequency close to the original 2.4 GHz in order to create a two-tone test. The summation of these two RF signals is achieved by feeding them together into the power divider and hence, the output is the desired summed RF signal with adjacent frequencies. As discussed in chapter 5, the two-tone test in simulation in Cadence uses two RF signals at 2.4 and 2.375 GHz. Therefore, the 1st order harmonics are at 300 and 275 MHz and the 3Td order harmonics are at 325 and 250 MHz. Either one in 1st order terms and 3Td order terms will be used to plot the 1st and 3Td order curves and therefore, the IIP3 can be obtained according to the theory in Chapter 2. 133 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering Semiconductor Parameter Analyzer VSl Vbias LNA Signal Generator RF Input CD VS2 SMUI SMU2 SMU3 SMU4 Vbias Mixer Vbias Buffer VDD LNA DUT V DD Mixer VDD Buffer IF Output Spectrum Analyzer LO Input Signal Generator @ Figure AI: Experimental Setup for output measurement. A.3 Noise Figure Measurement In order to measure the noise figure, a Noise Source and Noise Figure Meter are added and the experimental setup shown in figure A3. The Noise Figure Meter is controlled by entering certain codes. Referring to the manual, we setup the noise figure measurement using special function 1.4 which is coded to control a generator to measure the NF of a receiver or mixer with an external LO system, as shown in figure A3. Then we setup the conditions for our receiver circuit such as 134 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering Semiconductor Parameter Analyzer VSl V bias LNA Signal Generator RF Input CD VS2 SMUI SMU2 SMU3 SMU4 V bias V bias Mixer Buffer V DD LNA DUT V DD V DD Mixer Buffer IF Output Spectrum Analyzer LO Input Signal Generator ® Signal Generator @ Figure A.2: Experimental Setup for lIP3 measurement. La frequency, La input power, and IF frequency, etc. A calibration was performed to compensate the losses in the components used in the setup, e.g. in cables and bias Tees. After the calibration, we insert our DDT (receiver circuit) into the measurement system and the experimental setup is shown in figure A.4. Note that, the external La system is controlled by the Noise Figure Meter via System Interface Bus (SIB) 135 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering Noise Source Noise Figure Meter SIB ¢::> Signal Generator @ Figure A.3: Calibration Setup for noise figure measurement. which is HP 10833A GPIB cable. The noise figure was measured by selecting"corrected noise figure and gain" function in which the losses have been compensated. Therefore, the values on the Noise Figure Meter display are the corrected values for NF and insertion gain of DDT. 136 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering Semiconductor Parameter Analyzer VSl VS2 SMUl SMU2 SMU3 SMU4 (~ (~( (~ ~ Vbias LNA rI I Noise l Source I I Vbias Mixer RF - Input Bias Tee ~ ( ( V bias Buffer V DD LNA DDT (~ (~ ( VDD Mixer VDD Buffer IF Output e- - LO Input Noise Figure Meter ( r~ ~SIB Signal Generator @ ( I 180 0 1------; I Hybrid Spliter ~ Bias 1-_ _-' Tee Figure A.4: Experimental Setup for noise figure measurement. 137 Appendix B S-Parameters Scattering parameters or S-parameters relates the voltage waves incident on the ports to those reflected from the ports, as shown in figure B.1. The S-parameters is widely used in microwave and electronic circuit designs for its convenience to analyze the network especially when the input and output ports are matched normally to 50 D. Zs Two-Port Port 1 Network [S] Port 2 (Zo) Figure B.1: Incident and reflected waves of a two-port network [24]. The two port network shown in figure B.1 can be analyzed using its signal flow graph, shown in figure B.2. The following equations of this two-port network can 138 M.A.Sc. Thesis - Gefei Zhou McMaster - Electrical and Computer Engineering be obtained as [24]: (B.l) (B.2) where alt a2, bll and b2 indicate the amplitudes of the incident and reflected waves. Figure B.2: Signal flow graph of a two-port network [24]. The overall definition of the 8-parameters can be defined as [24] if the input and output ports are matched: 8 11 = ~I = Input reflection coefficient, (B.3) 8 22 = b = Output reflection coefficient, (B.4) S 21 = -b21 " . = Forward transffilSSlOn gaIn, (B.5) Reverse transffilSSlOn . . gam. . (B.6) a1 a2=O 2 \ a2 al=O a1 a2=O 8 12 = b1\ - = a2 al=O 139 References [1] J. Laskar, B. Matinpour, and S. Chakraborty, Modern Receiver Front-Ends, John Wiley & Sons, inc.: New Jersey, 2004. [2] M. J. Deen, R. Murji, A. Fakhr, N. Jafferali, and W. L. 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